vmwgfx_kms.c 52 KB

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  1. /**************************************************************************
  2. *
  3. * Copyright © 2009 VMware, Inc., Palo Alto, CA., USA
  4. * All Rights Reserved.
  5. *
  6. * Permission is hereby granted, free of charge, to any person obtaining a
  7. * copy of this software and associated documentation files (the
  8. * "Software"), to deal in the Software without restriction, including
  9. * without limitation the rights to use, copy, modify, merge, publish,
  10. * distribute, sub license, and/or sell copies of the Software, and to
  11. * permit persons to whom the Software is furnished to do so, subject to
  12. * the following conditions:
  13. *
  14. * The above copyright notice and this permission notice (including the
  15. * next paragraph) shall be included in all copies or substantial portions
  16. * of the Software.
  17. *
  18. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  19. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  20. * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
  21. * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
  22. * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
  23. * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
  24. * USE OR OTHER DEALINGS IN THE SOFTWARE.
  25. *
  26. **************************************************************************/
  27. #include "vmwgfx_kms.h"
  28. /* Might need a hrtimer here? */
  29. #define VMWGFX_PRESENT_RATE ((HZ / 60 > 0) ? HZ / 60 : 1)
  30. struct vmw_clip_rect {
  31. int x1, x2, y1, y2;
  32. };
  33. /**
  34. * Clip @num_rects number of @rects against @clip storing the
  35. * results in @out_rects and the number of passed rects in @out_num.
  36. */
  37. void vmw_clip_cliprects(struct drm_clip_rect *rects,
  38. int num_rects,
  39. struct vmw_clip_rect clip,
  40. SVGASignedRect *out_rects,
  41. int *out_num)
  42. {
  43. int i, k;
  44. for (i = 0, k = 0; i < num_rects; i++) {
  45. int x1 = max_t(int, clip.x1, rects[i].x1);
  46. int y1 = max_t(int, clip.y1, rects[i].y1);
  47. int x2 = min_t(int, clip.x2, rects[i].x2);
  48. int y2 = min_t(int, clip.y2, rects[i].y2);
  49. if (x1 >= x2)
  50. continue;
  51. if (y1 >= y2)
  52. continue;
  53. out_rects[k].left = x1;
  54. out_rects[k].top = y1;
  55. out_rects[k].right = x2;
  56. out_rects[k].bottom = y2;
  57. k++;
  58. }
  59. *out_num = k;
  60. }
  61. void vmw_display_unit_cleanup(struct vmw_display_unit *du)
  62. {
  63. if (du->cursor_surface)
  64. vmw_surface_unreference(&du->cursor_surface);
  65. if (du->cursor_dmabuf)
  66. vmw_dmabuf_unreference(&du->cursor_dmabuf);
  67. drm_crtc_cleanup(&du->crtc);
  68. drm_encoder_cleanup(&du->encoder);
  69. drm_connector_cleanup(&du->connector);
  70. }
  71. /*
  72. * Display Unit Cursor functions
  73. */
  74. int vmw_cursor_update_image(struct vmw_private *dev_priv,
  75. u32 *image, u32 width, u32 height,
  76. u32 hotspotX, u32 hotspotY)
  77. {
  78. struct {
  79. u32 cmd;
  80. SVGAFifoCmdDefineAlphaCursor cursor;
  81. } *cmd;
  82. u32 image_size = width * height * 4;
  83. u32 cmd_size = sizeof(*cmd) + image_size;
  84. if (!image)
  85. return -EINVAL;
  86. cmd = vmw_fifo_reserve(dev_priv, cmd_size);
  87. if (unlikely(cmd == NULL)) {
  88. DRM_ERROR("Fifo reserve failed.\n");
  89. return -ENOMEM;
  90. }
  91. memset(cmd, 0, sizeof(*cmd));
  92. memcpy(&cmd[1], image, image_size);
  93. cmd->cmd = cpu_to_le32(SVGA_CMD_DEFINE_ALPHA_CURSOR);
  94. cmd->cursor.id = cpu_to_le32(0);
  95. cmd->cursor.width = cpu_to_le32(width);
  96. cmd->cursor.height = cpu_to_le32(height);
  97. cmd->cursor.hotspotX = cpu_to_le32(hotspotX);
  98. cmd->cursor.hotspotY = cpu_to_le32(hotspotY);
  99. vmw_fifo_commit(dev_priv, cmd_size);
  100. return 0;
  101. }
  102. int vmw_cursor_update_dmabuf(struct vmw_private *dev_priv,
  103. struct vmw_dma_buffer *dmabuf,
  104. u32 width, u32 height,
  105. u32 hotspotX, u32 hotspotY)
  106. {
  107. struct ttm_bo_kmap_obj map;
  108. unsigned long kmap_offset;
  109. unsigned long kmap_num;
  110. void *virtual;
  111. bool dummy;
  112. int ret;
  113. kmap_offset = 0;
  114. kmap_num = (width*height*4 + PAGE_SIZE - 1) >> PAGE_SHIFT;
  115. ret = ttm_bo_reserve(&dmabuf->base, true, false, false, 0);
  116. if (unlikely(ret != 0)) {
  117. DRM_ERROR("reserve failed\n");
  118. return -EINVAL;
  119. }
  120. ret = ttm_bo_kmap(&dmabuf->base, kmap_offset, kmap_num, &map);
  121. if (unlikely(ret != 0))
  122. goto err_unreserve;
  123. virtual = ttm_kmap_obj_virtual(&map, &dummy);
  124. ret = vmw_cursor_update_image(dev_priv, virtual, width, height,
  125. hotspotX, hotspotY);
  126. ttm_bo_kunmap(&map);
  127. err_unreserve:
  128. ttm_bo_unreserve(&dmabuf->base);
  129. return ret;
  130. }
  131. void vmw_cursor_update_position(struct vmw_private *dev_priv,
  132. bool show, int x, int y)
  133. {
  134. __le32 __iomem *fifo_mem = dev_priv->mmio_virt;
  135. uint32_t count;
  136. iowrite32(show ? 1 : 0, fifo_mem + SVGA_FIFO_CURSOR_ON);
  137. iowrite32(x, fifo_mem + SVGA_FIFO_CURSOR_X);
  138. iowrite32(y, fifo_mem + SVGA_FIFO_CURSOR_Y);
  139. count = ioread32(fifo_mem + SVGA_FIFO_CURSOR_COUNT);
  140. iowrite32(++count, fifo_mem + SVGA_FIFO_CURSOR_COUNT);
  141. }
  142. int vmw_du_crtc_cursor_set(struct drm_crtc *crtc, struct drm_file *file_priv,
  143. uint32_t handle, uint32_t width, uint32_t height)
  144. {
  145. struct vmw_private *dev_priv = vmw_priv(crtc->dev);
  146. struct ttm_object_file *tfile = vmw_fpriv(file_priv)->tfile;
  147. struct vmw_display_unit *du = vmw_crtc_to_du(crtc);
  148. struct vmw_surface *surface = NULL;
  149. struct vmw_dma_buffer *dmabuf = NULL;
  150. int ret;
  151. /* A lot of the code assumes this */
  152. if (handle && (width != 64 || height != 64))
  153. return -EINVAL;
  154. if (handle) {
  155. ret = vmw_user_lookup_handle(dev_priv, tfile,
  156. handle, &surface, &dmabuf);
  157. if (ret) {
  158. DRM_ERROR("failed to find surface or dmabuf: %i\n", ret);
  159. return -EINVAL;
  160. }
  161. }
  162. /* need to do this before taking down old image */
  163. if (surface && !surface->snooper.image) {
  164. DRM_ERROR("surface not suitable for cursor\n");
  165. vmw_surface_unreference(&surface);
  166. return -EINVAL;
  167. }
  168. /* takedown old cursor */
  169. if (du->cursor_surface) {
  170. du->cursor_surface->snooper.crtc = NULL;
  171. vmw_surface_unreference(&du->cursor_surface);
  172. }
  173. if (du->cursor_dmabuf)
  174. vmw_dmabuf_unreference(&du->cursor_dmabuf);
  175. /* setup new image */
  176. if (surface) {
  177. /* vmw_user_surface_lookup takes one reference */
  178. du->cursor_surface = surface;
  179. du->cursor_surface->snooper.crtc = crtc;
  180. du->cursor_age = du->cursor_surface->snooper.age;
  181. vmw_cursor_update_image(dev_priv, surface->snooper.image,
  182. 64, 64, du->hotspot_x, du->hotspot_y);
  183. } else if (dmabuf) {
  184. /* vmw_user_surface_lookup takes one reference */
  185. du->cursor_dmabuf = dmabuf;
  186. ret = vmw_cursor_update_dmabuf(dev_priv, dmabuf, width, height,
  187. du->hotspot_x, du->hotspot_y);
  188. } else {
  189. vmw_cursor_update_position(dev_priv, false, 0, 0);
  190. return 0;
  191. }
  192. vmw_cursor_update_position(dev_priv, true,
  193. du->cursor_x + du->hotspot_x,
  194. du->cursor_y + du->hotspot_y);
  195. return 0;
  196. }
  197. int vmw_du_crtc_cursor_move(struct drm_crtc *crtc, int x, int y)
  198. {
  199. struct vmw_private *dev_priv = vmw_priv(crtc->dev);
  200. struct vmw_display_unit *du = vmw_crtc_to_du(crtc);
  201. bool shown = du->cursor_surface || du->cursor_dmabuf ? true : false;
  202. du->cursor_x = x + crtc->x;
  203. du->cursor_y = y + crtc->y;
  204. vmw_cursor_update_position(dev_priv, shown,
  205. du->cursor_x + du->hotspot_x,
  206. du->cursor_y + du->hotspot_y);
  207. return 0;
  208. }
  209. void vmw_kms_cursor_snoop(struct vmw_surface *srf,
  210. struct ttm_object_file *tfile,
  211. struct ttm_buffer_object *bo,
  212. SVGA3dCmdHeader *header)
  213. {
  214. struct ttm_bo_kmap_obj map;
  215. unsigned long kmap_offset;
  216. unsigned long kmap_num;
  217. SVGA3dCopyBox *box;
  218. unsigned box_count;
  219. void *virtual;
  220. bool dummy;
  221. struct vmw_dma_cmd {
  222. SVGA3dCmdHeader header;
  223. SVGA3dCmdSurfaceDMA dma;
  224. } *cmd;
  225. int i, ret;
  226. cmd = container_of(header, struct vmw_dma_cmd, header);
  227. /* No snooper installed */
  228. if (!srf->snooper.image)
  229. return;
  230. if (cmd->dma.host.face != 0 || cmd->dma.host.mipmap != 0) {
  231. DRM_ERROR("face and mipmap for cursors should never != 0\n");
  232. return;
  233. }
  234. if (cmd->header.size < 64) {
  235. DRM_ERROR("at least one full copy box must be given\n");
  236. return;
  237. }
  238. box = (SVGA3dCopyBox *)&cmd[1];
  239. box_count = (cmd->header.size - sizeof(SVGA3dCmdSurfaceDMA)) /
  240. sizeof(SVGA3dCopyBox);
  241. if (cmd->dma.guest.ptr.offset % PAGE_SIZE ||
  242. box->x != 0 || box->y != 0 || box->z != 0 ||
  243. box->srcx != 0 || box->srcy != 0 || box->srcz != 0 ||
  244. box->d != 1 || box_count != 1) {
  245. /* TODO handle none page aligned offsets */
  246. /* TODO handle more dst & src != 0 */
  247. /* TODO handle more then one copy */
  248. DRM_ERROR("Cant snoop dma request for cursor!\n");
  249. DRM_ERROR("(%u, %u, %u) (%u, %u, %u) (%ux%ux%u) %u %u\n",
  250. box->srcx, box->srcy, box->srcz,
  251. box->x, box->y, box->z,
  252. box->w, box->h, box->d, box_count,
  253. cmd->dma.guest.ptr.offset);
  254. return;
  255. }
  256. kmap_offset = cmd->dma.guest.ptr.offset >> PAGE_SHIFT;
  257. kmap_num = (64*64*4) >> PAGE_SHIFT;
  258. ret = ttm_bo_reserve(bo, true, false, false, 0);
  259. if (unlikely(ret != 0)) {
  260. DRM_ERROR("reserve failed\n");
  261. return;
  262. }
  263. ret = ttm_bo_kmap(bo, kmap_offset, kmap_num, &map);
  264. if (unlikely(ret != 0))
  265. goto err_unreserve;
  266. virtual = ttm_kmap_obj_virtual(&map, &dummy);
  267. if (box->w == 64 && cmd->dma.guest.pitch == 64*4) {
  268. memcpy(srf->snooper.image, virtual, 64*64*4);
  269. } else {
  270. /* Image is unsigned pointer. */
  271. for (i = 0; i < box->h; i++)
  272. memcpy(srf->snooper.image + i * 64,
  273. virtual + i * cmd->dma.guest.pitch,
  274. box->w * 4);
  275. }
  276. srf->snooper.age++;
  277. /* we can't call this function from this function since execbuf has
  278. * reserved fifo space.
  279. *
  280. * if (srf->snooper.crtc)
  281. * vmw_ldu_crtc_cursor_update_image(dev_priv,
  282. * srf->snooper.image, 64, 64,
  283. * du->hotspot_x, du->hotspot_y);
  284. */
  285. ttm_bo_kunmap(&map);
  286. err_unreserve:
  287. ttm_bo_unreserve(bo);
  288. }
  289. void vmw_kms_cursor_post_execbuf(struct vmw_private *dev_priv)
  290. {
  291. struct drm_device *dev = dev_priv->dev;
  292. struct vmw_display_unit *du;
  293. struct drm_crtc *crtc;
  294. mutex_lock(&dev->mode_config.mutex);
  295. list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
  296. du = vmw_crtc_to_du(crtc);
  297. if (!du->cursor_surface ||
  298. du->cursor_age == du->cursor_surface->snooper.age)
  299. continue;
  300. du->cursor_age = du->cursor_surface->snooper.age;
  301. vmw_cursor_update_image(dev_priv,
  302. du->cursor_surface->snooper.image,
  303. 64, 64, du->hotspot_x, du->hotspot_y);
  304. }
  305. mutex_unlock(&dev->mode_config.mutex);
  306. }
  307. /*
  308. * Generic framebuffer code
  309. */
  310. int vmw_framebuffer_create_handle(struct drm_framebuffer *fb,
  311. struct drm_file *file_priv,
  312. unsigned int *handle)
  313. {
  314. if (handle)
  315. *handle = 0;
  316. return 0;
  317. }
  318. /*
  319. * Surface framebuffer code
  320. */
  321. #define vmw_framebuffer_to_vfbs(x) \
  322. container_of(x, struct vmw_framebuffer_surface, base.base)
  323. struct vmw_framebuffer_surface {
  324. struct vmw_framebuffer base;
  325. struct vmw_surface *surface;
  326. struct vmw_dma_buffer *buffer;
  327. struct list_head head;
  328. struct drm_master *master;
  329. };
  330. void vmw_framebuffer_surface_destroy(struct drm_framebuffer *framebuffer)
  331. {
  332. struct vmw_framebuffer_surface *vfbs =
  333. vmw_framebuffer_to_vfbs(framebuffer);
  334. struct vmw_master *vmaster = vmw_master(vfbs->master);
  335. mutex_lock(&vmaster->fb_surf_mutex);
  336. list_del(&vfbs->head);
  337. mutex_unlock(&vmaster->fb_surf_mutex);
  338. drm_master_put(&vfbs->master);
  339. drm_framebuffer_cleanup(framebuffer);
  340. vmw_surface_unreference(&vfbs->surface);
  341. ttm_base_object_unref(&vfbs->base.user_obj);
  342. kfree(vfbs);
  343. }
  344. static int do_surface_dirty_sou(struct vmw_private *dev_priv,
  345. struct drm_file *file_priv,
  346. struct vmw_framebuffer *framebuffer,
  347. unsigned flags, unsigned color,
  348. struct drm_clip_rect *clips,
  349. unsigned num_clips, int inc)
  350. {
  351. struct vmw_display_unit *units[VMWGFX_NUM_DISPLAY_UNITS];
  352. struct drm_clip_rect *clips_ptr;
  353. struct drm_clip_rect *tmp;
  354. struct drm_crtc *crtc;
  355. size_t fifo_size;
  356. int i, num_units;
  357. int ret = 0; /* silence warning */
  358. int left, right, top, bottom;
  359. struct {
  360. SVGA3dCmdHeader header;
  361. SVGA3dCmdBlitSurfaceToScreen body;
  362. } *cmd;
  363. SVGASignedRect *blits;
  364. num_units = 0;
  365. list_for_each_entry(crtc, &dev_priv->dev->mode_config.crtc_list,
  366. head) {
  367. if (crtc->fb != &framebuffer->base)
  368. continue;
  369. units[num_units++] = vmw_crtc_to_du(crtc);
  370. }
  371. BUG_ON(!clips || !num_clips);
  372. tmp = kzalloc(sizeof(*tmp) * num_clips, GFP_KERNEL);
  373. if (unlikely(tmp == NULL)) {
  374. DRM_ERROR("Temporary cliprect memory alloc failed.\n");
  375. return -ENOMEM;
  376. }
  377. fifo_size = sizeof(*cmd) + sizeof(SVGASignedRect) * num_clips;
  378. cmd = kzalloc(fifo_size, GFP_KERNEL);
  379. if (unlikely(cmd == NULL)) {
  380. DRM_ERROR("Temporary fifo memory alloc failed.\n");
  381. ret = -ENOMEM;
  382. goto out_free_tmp;
  383. }
  384. /* setup blits pointer */
  385. blits = (SVGASignedRect *)&cmd[1];
  386. /* initial clip region */
  387. left = clips->x1;
  388. right = clips->x2;
  389. top = clips->y1;
  390. bottom = clips->y2;
  391. /* skip the first clip rect */
  392. for (i = 1, clips_ptr = clips + inc;
  393. i < num_clips; i++, clips_ptr += inc) {
  394. left = min_t(int, left, (int)clips_ptr->x1);
  395. right = max_t(int, right, (int)clips_ptr->x2);
  396. top = min_t(int, top, (int)clips_ptr->y1);
  397. bottom = max_t(int, bottom, (int)clips_ptr->y2);
  398. }
  399. /* only need to do this once */
  400. memset(cmd, 0, fifo_size);
  401. cmd->header.id = cpu_to_le32(SVGA_3D_CMD_BLIT_SURFACE_TO_SCREEN);
  402. cmd->header.size = cpu_to_le32(fifo_size - sizeof(cmd->header));
  403. cmd->body.srcRect.left = left;
  404. cmd->body.srcRect.right = right;
  405. cmd->body.srcRect.top = top;
  406. cmd->body.srcRect.bottom = bottom;
  407. clips_ptr = clips;
  408. for (i = 0; i < num_clips; i++, clips_ptr += inc) {
  409. tmp[i].x1 = clips_ptr->x1 - left;
  410. tmp[i].x2 = clips_ptr->x2 - left;
  411. tmp[i].y1 = clips_ptr->y1 - top;
  412. tmp[i].y2 = clips_ptr->y2 - top;
  413. }
  414. /* do per unit writing, reuse fifo for each */
  415. for (i = 0; i < num_units; i++) {
  416. struct vmw_display_unit *unit = units[i];
  417. struct vmw_clip_rect clip;
  418. int num;
  419. clip.x1 = left - unit->crtc.x;
  420. clip.y1 = top - unit->crtc.y;
  421. clip.x2 = right - unit->crtc.x;
  422. clip.y2 = bottom - unit->crtc.y;
  423. /* skip any crtcs that misses the clip region */
  424. if (clip.x1 >= unit->crtc.mode.hdisplay ||
  425. clip.y1 >= unit->crtc.mode.vdisplay ||
  426. clip.x2 <= 0 || clip.y2 <= 0)
  427. continue;
  428. /*
  429. * In order for the clip rects to be correctly scaled
  430. * the src and dest rects needs to be the same size.
  431. */
  432. cmd->body.destRect.left = clip.x1;
  433. cmd->body.destRect.right = clip.x2;
  434. cmd->body.destRect.top = clip.y1;
  435. cmd->body.destRect.bottom = clip.y2;
  436. /* create a clip rect of the crtc in dest coords */
  437. clip.x2 = unit->crtc.mode.hdisplay - clip.x1;
  438. clip.y2 = unit->crtc.mode.vdisplay - clip.y1;
  439. clip.x1 = 0 - clip.x1;
  440. clip.y1 = 0 - clip.y1;
  441. /* need to reset sid as it is changed by execbuf */
  442. cmd->body.srcImage.sid = cpu_to_le32(framebuffer->user_handle);
  443. cmd->body.destScreenId = unit->unit;
  444. /* clip and write blits to cmd stream */
  445. vmw_clip_cliprects(tmp, num_clips, clip, blits, &num);
  446. /* if no cliprects hit skip this */
  447. if (num == 0)
  448. continue;
  449. /* recalculate package length */
  450. fifo_size = sizeof(*cmd) + sizeof(SVGASignedRect) * num;
  451. cmd->header.size = cpu_to_le32(fifo_size - sizeof(cmd->header));
  452. ret = vmw_execbuf_process(file_priv, dev_priv, NULL, cmd,
  453. fifo_size, 0, NULL);
  454. if (unlikely(ret != 0))
  455. break;
  456. }
  457. kfree(cmd);
  458. out_free_tmp:
  459. kfree(tmp);
  460. return ret;
  461. }
  462. int vmw_framebuffer_surface_dirty(struct drm_framebuffer *framebuffer,
  463. struct drm_file *file_priv,
  464. unsigned flags, unsigned color,
  465. struct drm_clip_rect *clips,
  466. unsigned num_clips)
  467. {
  468. struct vmw_private *dev_priv = vmw_priv(framebuffer->dev);
  469. struct vmw_master *vmaster = vmw_master(file_priv->master);
  470. struct vmw_framebuffer_surface *vfbs =
  471. vmw_framebuffer_to_vfbs(framebuffer);
  472. struct drm_clip_rect norect;
  473. int ret, inc = 1;
  474. if (unlikely(vfbs->master != file_priv->master))
  475. return -EINVAL;
  476. /* Require ScreenObject support for 3D */
  477. if (!dev_priv->sou_priv)
  478. return -EINVAL;
  479. ret = ttm_read_lock(&vmaster->lock, true);
  480. if (unlikely(ret != 0))
  481. return ret;
  482. if (!num_clips) {
  483. num_clips = 1;
  484. clips = &norect;
  485. norect.x1 = norect.y1 = 0;
  486. norect.x2 = framebuffer->width;
  487. norect.y2 = framebuffer->height;
  488. } else if (flags & DRM_MODE_FB_DIRTY_ANNOTATE_COPY) {
  489. num_clips /= 2;
  490. inc = 2; /* skip source rects */
  491. }
  492. ret = do_surface_dirty_sou(dev_priv, file_priv, &vfbs->base,
  493. flags, color,
  494. clips, num_clips, inc);
  495. ttm_read_unlock(&vmaster->lock);
  496. return 0;
  497. }
  498. static struct drm_framebuffer_funcs vmw_framebuffer_surface_funcs = {
  499. .destroy = vmw_framebuffer_surface_destroy,
  500. .dirty = vmw_framebuffer_surface_dirty,
  501. .create_handle = vmw_framebuffer_create_handle,
  502. };
  503. static int vmw_kms_new_framebuffer_surface(struct vmw_private *dev_priv,
  504. struct drm_file *file_priv,
  505. struct vmw_surface *surface,
  506. struct vmw_framebuffer **out,
  507. const struct drm_mode_fb_cmd
  508. *mode_cmd)
  509. {
  510. struct drm_device *dev = dev_priv->dev;
  511. struct vmw_framebuffer_surface *vfbs;
  512. enum SVGA3dSurfaceFormat format;
  513. struct vmw_master *vmaster = vmw_master(file_priv->master);
  514. int ret;
  515. /* 3D is only supported on HWv8 hosts which supports screen objects */
  516. if (!dev_priv->sou_priv)
  517. return -ENOSYS;
  518. /*
  519. * Sanity checks.
  520. */
  521. /* Surface must be marked as a scanout. */
  522. if (unlikely(!surface->scanout))
  523. return -EINVAL;
  524. if (unlikely(surface->mip_levels[0] != 1 ||
  525. surface->num_sizes != 1 ||
  526. surface->sizes[0].width < mode_cmd->width ||
  527. surface->sizes[0].height < mode_cmd->height ||
  528. surface->sizes[0].depth != 1)) {
  529. DRM_ERROR("Incompatible surface dimensions "
  530. "for requested mode.\n");
  531. return -EINVAL;
  532. }
  533. switch (mode_cmd->depth) {
  534. case 32:
  535. format = SVGA3D_A8R8G8B8;
  536. break;
  537. case 24:
  538. format = SVGA3D_X8R8G8B8;
  539. break;
  540. case 16:
  541. format = SVGA3D_R5G6B5;
  542. break;
  543. case 15:
  544. format = SVGA3D_A1R5G5B5;
  545. break;
  546. case 8:
  547. format = SVGA3D_LUMINANCE8;
  548. break;
  549. default:
  550. DRM_ERROR("Invalid color depth: %d\n", mode_cmd->depth);
  551. return -EINVAL;
  552. }
  553. if (unlikely(format != surface->format)) {
  554. DRM_ERROR("Invalid surface format for requested mode.\n");
  555. return -EINVAL;
  556. }
  557. vfbs = kzalloc(sizeof(*vfbs), GFP_KERNEL);
  558. if (!vfbs) {
  559. ret = -ENOMEM;
  560. goto out_err1;
  561. }
  562. ret = drm_framebuffer_init(dev, &vfbs->base.base,
  563. &vmw_framebuffer_surface_funcs);
  564. if (ret)
  565. goto out_err2;
  566. if (!vmw_surface_reference(surface)) {
  567. DRM_ERROR("failed to reference surface %p\n", surface);
  568. goto out_err3;
  569. }
  570. /* XXX get the first 3 from the surface info */
  571. vfbs->base.base.bits_per_pixel = mode_cmd->bpp;
  572. vfbs->base.base.pitches[0] = mode_cmd->pitch;
  573. vfbs->base.base.depth = mode_cmd->depth;
  574. vfbs->base.base.width = mode_cmd->width;
  575. vfbs->base.base.height = mode_cmd->height;
  576. vfbs->surface = surface;
  577. vfbs->base.user_handle = mode_cmd->handle;
  578. vfbs->master = drm_master_get(file_priv->master);
  579. mutex_lock(&vmaster->fb_surf_mutex);
  580. list_add_tail(&vfbs->head, &vmaster->fb_surf);
  581. mutex_unlock(&vmaster->fb_surf_mutex);
  582. *out = &vfbs->base;
  583. return 0;
  584. out_err3:
  585. drm_framebuffer_cleanup(&vfbs->base.base);
  586. out_err2:
  587. kfree(vfbs);
  588. out_err1:
  589. return ret;
  590. }
  591. /*
  592. * Dmabuf framebuffer code
  593. */
  594. #define vmw_framebuffer_to_vfbd(x) \
  595. container_of(x, struct vmw_framebuffer_dmabuf, base.base)
  596. struct vmw_framebuffer_dmabuf {
  597. struct vmw_framebuffer base;
  598. struct vmw_dma_buffer *buffer;
  599. };
  600. void vmw_framebuffer_dmabuf_destroy(struct drm_framebuffer *framebuffer)
  601. {
  602. struct vmw_framebuffer_dmabuf *vfbd =
  603. vmw_framebuffer_to_vfbd(framebuffer);
  604. drm_framebuffer_cleanup(framebuffer);
  605. vmw_dmabuf_unreference(&vfbd->buffer);
  606. ttm_base_object_unref(&vfbd->base.user_obj);
  607. kfree(vfbd);
  608. }
  609. static int do_dmabuf_dirty_ldu(struct vmw_private *dev_priv,
  610. struct vmw_framebuffer *framebuffer,
  611. unsigned flags, unsigned color,
  612. struct drm_clip_rect *clips,
  613. unsigned num_clips, int increment)
  614. {
  615. size_t fifo_size;
  616. int i;
  617. struct {
  618. uint32_t header;
  619. SVGAFifoCmdUpdate body;
  620. } *cmd;
  621. fifo_size = sizeof(*cmd) * num_clips;
  622. cmd = vmw_fifo_reserve(dev_priv, fifo_size);
  623. if (unlikely(cmd == NULL)) {
  624. DRM_ERROR("Fifo reserve failed.\n");
  625. return -ENOMEM;
  626. }
  627. memset(cmd, 0, fifo_size);
  628. for (i = 0; i < num_clips; i++, clips += increment) {
  629. cmd[i].header = cpu_to_le32(SVGA_CMD_UPDATE);
  630. cmd[i].body.x = cpu_to_le32(clips->x1);
  631. cmd[i].body.y = cpu_to_le32(clips->y1);
  632. cmd[i].body.width = cpu_to_le32(clips->x2 - clips->x1);
  633. cmd[i].body.height = cpu_to_le32(clips->y2 - clips->y1);
  634. }
  635. vmw_fifo_commit(dev_priv, fifo_size);
  636. return 0;
  637. }
  638. static int do_dmabuf_define_gmrfb(struct drm_file *file_priv,
  639. struct vmw_private *dev_priv,
  640. struct vmw_framebuffer *framebuffer)
  641. {
  642. int depth = framebuffer->base.depth;
  643. size_t fifo_size;
  644. int ret;
  645. struct {
  646. uint32_t header;
  647. SVGAFifoCmdDefineGMRFB body;
  648. } *cmd;
  649. /* Emulate RGBA support, contrary to svga_reg.h this is not
  650. * supported by hosts. This is only a problem if we are reading
  651. * this value later and expecting what we uploaded back.
  652. */
  653. if (depth == 32)
  654. depth = 24;
  655. fifo_size = sizeof(*cmd);
  656. cmd = kmalloc(fifo_size, GFP_KERNEL);
  657. if (unlikely(cmd == NULL)) {
  658. DRM_ERROR("Failed to allocate temporary cmd buffer.\n");
  659. return -ENOMEM;
  660. }
  661. memset(cmd, 0, fifo_size);
  662. cmd->header = SVGA_CMD_DEFINE_GMRFB;
  663. cmd->body.format.bitsPerPixel = framebuffer->base.bits_per_pixel;
  664. cmd->body.format.colorDepth = depth;
  665. cmd->body.format.reserved = 0;
  666. cmd->body.bytesPerLine = framebuffer->base.pitches[0];
  667. cmd->body.ptr.gmrId = framebuffer->user_handle;
  668. cmd->body.ptr.offset = 0;
  669. ret = vmw_execbuf_process(file_priv, dev_priv, NULL, cmd,
  670. fifo_size, 0, NULL);
  671. kfree(cmd);
  672. return ret;
  673. }
  674. static int do_dmabuf_dirty_sou(struct drm_file *file_priv,
  675. struct vmw_private *dev_priv,
  676. struct vmw_framebuffer *framebuffer,
  677. unsigned flags, unsigned color,
  678. struct drm_clip_rect *clips,
  679. unsigned num_clips, int increment)
  680. {
  681. struct vmw_display_unit *units[VMWGFX_NUM_DISPLAY_UNITS];
  682. struct drm_clip_rect *clips_ptr;
  683. int i, k, num_units, ret;
  684. struct drm_crtc *crtc;
  685. size_t fifo_size;
  686. struct {
  687. uint32_t header;
  688. SVGAFifoCmdBlitGMRFBToScreen body;
  689. } *blits;
  690. ret = do_dmabuf_define_gmrfb(file_priv, dev_priv, framebuffer);
  691. if (unlikely(ret != 0))
  692. return ret; /* define_gmrfb prints warnings */
  693. fifo_size = sizeof(*blits) * num_clips;
  694. blits = kmalloc(fifo_size, GFP_KERNEL);
  695. if (unlikely(blits == NULL)) {
  696. DRM_ERROR("Failed to allocate temporary cmd buffer.\n");
  697. return -ENOMEM;
  698. }
  699. num_units = 0;
  700. list_for_each_entry(crtc, &dev_priv->dev->mode_config.crtc_list, head) {
  701. if (crtc->fb != &framebuffer->base)
  702. continue;
  703. units[num_units++] = vmw_crtc_to_du(crtc);
  704. }
  705. for (k = 0; k < num_units; k++) {
  706. struct vmw_display_unit *unit = units[k];
  707. int hit_num = 0;
  708. clips_ptr = clips;
  709. for (i = 0; i < num_clips; i++, clips_ptr += increment) {
  710. int clip_x1 = clips_ptr->x1 - unit->crtc.x;
  711. int clip_y1 = clips_ptr->y1 - unit->crtc.y;
  712. int clip_x2 = clips_ptr->x2 - unit->crtc.x;
  713. int clip_y2 = clips_ptr->y2 - unit->crtc.y;
  714. int move_x, move_y;
  715. /* skip any crtcs that misses the clip region */
  716. if (clip_x1 >= unit->crtc.mode.hdisplay ||
  717. clip_y1 >= unit->crtc.mode.vdisplay ||
  718. clip_x2 <= 0 || clip_y2 <= 0)
  719. continue;
  720. /* clip size to crtc size */
  721. clip_x2 = min_t(int, clip_x2, unit->crtc.mode.hdisplay);
  722. clip_y2 = min_t(int, clip_y2, unit->crtc.mode.vdisplay);
  723. /* translate both src and dest to bring clip into screen */
  724. move_x = min_t(int, clip_x1, 0);
  725. move_y = min_t(int, clip_y1, 0);
  726. /* actual translate done here */
  727. blits[hit_num].header = SVGA_CMD_BLIT_GMRFB_TO_SCREEN;
  728. blits[hit_num].body.destScreenId = unit->unit;
  729. blits[hit_num].body.srcOrigin.x = clips_ptr->x1 - move_x;
  730. blits[hit_num].body.srcOrigin.y = clips_ptr->y1 - move_y;
  731. blits[hit_num].body.destRect.left = clip_x1 - move_x;
  732. blits[hit_num].body.destRect.top = clip_y1 - move_y;
  733. blits[hit_num].body.destRect.right = clip_x2;
  734. blits[hit_num].body.destRect.bottom = clip_y2;
  735. hit_num++;
  736. }
  737. /* no clips hit the crtc */
  738. if (hit_num == 0)
  739. continue;
  740. fifo_size = sizeof(*blits) * hit_num;
  741. ret = vmw_execbuf_process(file_priv, dev_priv, NULL, blits,
  742. fifo_size, 0, NULL);
  743. if (unlikely(ret != 0))
  744. break;
  745. }
  746. kfree(blits);
  747. return ret;
  748. }
  749. int vmw_framebuffer_dmabuf_dirty(struct drm_framebuffer *framebuffer,
  750. struct drm_file *file_priv,
  751. unsigned flags, unsigned color,
  752. struct drm_clip_rect *clips,
  753. unsigned num_clips)
  754. {
  755. struct vmw_private *dev_priv = vmw_priv(framebuffer->dev);
  756. struct vmw_master *vmaster = vmw_master(file_priv->master);
  757. struct vmw_framebuffer_dmabuf *vfbd =
  758. vmw_framebuffer_to_vfbd(framebuffer);
  759. struct drm_clip_rect norect;
  760. int ret, increment = 1;
  761. ret = ttm_read_lock(&vmaster->lock, true);
  762. if (unlikely(ret != 0))
  763. return ret;
  764. if (!num_clips) {
  765. num_clips = 1;
  766. clips = &norect;
  767. norect.x1 = norect.y1 = 0;
  768. norect.x2 = framebuffer->width;
  769. norect.y2 = framebuffer->height;
  770. } else if (flags & DRM_MODE_FB_DIRTY_ANNOTATE_COPY) {
  771. num_clips /= 2;
  772. increment = 2;
  773. }
  774. if (dev_priv->ldu_priv) {
  775. ret = do_dmabuf_dirty_ldu(dev_priv, &vfbd->base,
  776. flags, color,
  777. clips, num_clips, increment);
  778. } else {
  779. ret = do_dmabuf_dirty_sou(file_priv, dev_priv, &vfbd->base,
  780. flags, color,
  781. clips, num_clips, increment);
  782. }
  783. ttm_read_unlock(&vmaster->lock);
  784. return ret;
  785. }
  786. static struct drm_framebuffer_funcs vmw_framebuffer_dmabuf_funcs = {
  787. .destroy = vmw_framebuffer_dmabuf_destroy,
  788. .dirty = vmw_framebuffer_dmabuf_dirty,
  789. .create_handle = vmw_framebuffer_create_handle,
  790. };
  791. /**
  792. * Pin the dmabuffer to the start of vram.
  793. */
  794. static int vmw_framebuffer_dmabuf_pin(struct vmw_framebuffer *vfb)
  795. {
  796. struct vmw_private *dev_priv = vmw_priv(vfb->base.dev);
  797. struct vmw_framebuffer_dmabuf *vfbd =
  798. vmw_framebuffer_to_vfbd(&vfb->base);
  799. int ret;
  800. /* This code should not be used with screen objects */
  801. BUG_ON(dev_priv->sou_priv);
  802. vmw_overlay_pause_all(dev_priv);
  803. ret = vmw_dmabuf_to_start_of_vram(dev_priv, vfbd->buffer, true, false);
  804. vmw_overlay_resume_all(dev_priv);
  805. WARN_ON(ret != 0);
  806. return 0;
  807. }
  808. static int vmw_framebuffer_dmabuf_unpin(struct vmw_framebuffer *vfb)
  809. {
  810. struct vmw_private *dev_priv = vmw_priv(vfb->base.dev);
  811. struct vmw_framebuffer_dmabuf *vfbd =
  812. vmw_framebuffer_to_vfbd(&vfb->base);
  813. if (!vfbd->buffer) {
  814. WARN_ON(!vfbd->buffer);
  815. return 0;
  816. }
  817. return vmw_dmabuf_unpin(dev_priv, vfbd->buffer, false);
  818. }
  819. static int vmw_kms_new_framebuffer_dmabuf(struct vmw_private *dev_priv,
  820. struct vmw_dma_buffer *dmabuf,
  821. struct vmw_framebuffer **out,
  822. const struct drm_mode_fb_cmd
  823. *mode_cmd)
  824. {
  825. struct drm_device *dev = dev_priv->dev;
  826. struct vmw_framebuffer_dmabuf *vfbd;
  827. unsigned int requested_size;
  828. int ret;
  829. requested_size = mode_cmd->height * mode_cmd->pitch;
  830. if (unlikely(requested_size > dmabuf->base.num_pages * PAGE_SIZE)) {
  831. DRM_ERROR("Screen buffer object size is too small "
  832. "for requested mode.\n");
  833. return -EINVAL;
  834. }
  835. /* Limited framebuffer color depth support for screen objects */
  836. if (dev_priv->sou_priv) {
  837. switch (mode_cmd->depth) {
  838. case 32:
  839. case 24:
  840. /* Only support 32 bpp for 32 and 24 depth fbs */
  841. if (mode_cmd->bpp == 32)
  842. break;
  843. DRM_ERROR("Invalid color depth/bbp: %d %d\n",
  844. mode_cmd->depth, mode_cmd->bpp);
  845. return -EINVAL;
  846. case 16:
  847. case 15:
  848. /* Only support 16 bpp for 16 and 15 depth fbs */
  849. if (mode_cmd->bpp == 16)
  850. break;
  851. DRM_ERROR("Invalid color depth/bbp: %d %d\n",
  852. mode_cmd->depth, mode_cmd->bpp);
  853. return -EINVAL;
  854. default:
  855. DRM_ERROR("Invalid color depth: %d\n", mode_cmd->depth);
  856. return -EINVAL;
  857. }
  858. }
  859. vfbd = kzalloc(sizeof(*vfbd), GFP_KERNEL);
  860. if (!vfbd) {
  861. ret = -ENOMEM;
  862. goto out_err1;
  863. }
  864. ret = drm_framebuffer_init(dev, &vfbd->base.base,
  865. &vmw_framebuffer_dmabuf_funcs);
  866. if (ret)
  867. goto out_err2;
  868. if (!vmw_dmabuf_reference(dmabuf)) {
  869. DRM_ERROR("failed to reference dmabuf %p\n", dmabuf);
  870. goto out_err3;
  871. }
  872. vfbd->base.base.bits_per_pixel = mode_cmd->bpp;
  873. vfbd->base.base.pitches[0] = mode_cmd->pitch;
  874. vfbd->base.base.depth = mode_cmd->depth;
  875. vfbd->base.base.width = mode_cmd->width;
  876. vfbd->base.base.height = mode_cmd->height;
  877. if (!dev_priv->sou_priv) {
  878. vfbd->base.pin = vmw_framebuffer_dmabuf_pin;
  879. vfbd->base.unpin = vmw_framebuffer_dmabuf_unpin;
  880. }
  881. vfbd->base.dmabuf = true;
  882. vfbd->buffer = dmabuf;
  883. vfbd->base.user_handle = mode_cmd->handle;
  884. *out = &vfbd->base;
  885. return 0;
  886. out_err3:
  887. drm_framebuffer_cleanup(&vfbd->base.base);
  888. out_err2:
  889. kfree(vfbd);
  890. out_err1:
  891. return ret;
  892. }
  893. /*
  894. * Generic Kernel modesetting functions
  895. */
  896. static struct drm_framebuffer *vmw_kms_fb_create(struct drm_device *dev,
  897. struct drm_file *file_priv,
  898. struct drm_mode_fb_cmd2 *mode_cmd2)
  899. {
  900. struct vmw_private *dev_priv = vmw_priv(dev);
  901. struct ttm_object_file *tfile = vmw_fpriv(file_priv)->tfile;
  902. struct vmw_framebuffer *vfb = NULL;
  903. struct vmw_surface *surface = NULL;
  904. struct vmw_dma_buffer *bo = NULL;
  905. struct ttm_base_object *user_obj;
  906. struct drm_mode_fb_cmd mode_cmd;
  907. int ret;
  908. mode_cmd.width = mode_cmd2->width;
  909. mode_cmd.height = mode_cmd2->height;
  910. mode_cmd.pitch = mode_cmd2->pitches[0];
  911. mode_cmd.handle = mode_cmd2->handles[0];
  912. drm_fb_get_bpp_depth(mode_cmd2->pixel_format, &mode_cmd.depth,
  913. &mode_cmd.bpp);
  914. /**
  915. * This code should be conditioned on Screen Objects not being used.
  916. * If screen objects are used, we can allocate a GMR to hold the
  917. * requested framebuffer.
  918. */
  919. if (!vmw_kms_validate_mode_vram(dev_priv,
  920. mode_cmd.pitch,
  921. mode_cmd.height)) {
  922. DRM_ERROR("VRAM size is too small for requested mode.\n");
  923. return ERR_PTR(-ENOMEM);
  924. }
  925. /*
  926. * Take a reference on the user object of the resource
  927. * backing the kms fb. This ensures that user-space handle
  928. * lookups on that resource will always work as long as
  929. * it's registered with a kms framebuffer. This is important,
  930. * since vmw_execbuf_process identifies resources in the
  931. * command stream using user-space handles.
  932. */
  933. user_obj = ttm_base_object_lookup(tfile, mode_cmd.handle);
  934. if (unlikely(user_obj == NULL)) {
  935. DRM_ERROR("Could not locate requested kms frame buffer.\n");
  936. return ERR_PTR(-ENOENT);
  937. }
  938. /**
  939. * End conditioned code.
  940. */
  941. /* returns either a dmabuf or surface */
  942. ret = vmw_user_lookup_handle(dev_priv, tfile,
  943. mode_cmd.handle,
  944. &surface, &bo);
  945. if (ret)
  946. goto err_out;
  947. /* Create the new framebuffer depending one what we got back */
  948. if (bo)
  949. ret = vmw_kms_new_framebuffer_dmabuf(dev_priv, bo, &vfb,
  950. &mode_cmd);
  951. else if (surface)
  952. ret = vmw_kms_new_framebuffer_surface(dev_priv, file_priv,
  953. surface, &vfb, &mode_cmd);
  954. else
  955. BUG();
  956. err_out:
  957. /* vmw_user_lookup_handle takes one ref so does new_fb */
  958. if (bo)
  959. vmw_dmabuf_unreference(&bo);
  960. if (surface)
  961. vmw_surface_unreference(&surface);
  962. if (ret) {
  963. DRM_ERROR("failed to create vmw_framebuffer: %i\n", ret);
  964. ttm_base_object_unref(&user_obj);
  965. return ERR_PTR(ret);
  966. } else
  967. vfb->user_obj = user_obj;
  968. return &vfb->base;
  969. }
  970. static struct drm_mode_config_funcs vmw_kms_funcs = {
  971. .fb_create = vmw_kms_fb_create,
  972. };
  973. int vmw_kms_present(struct vmw_private *dev_priv,
  974. struct drm_file *file_priv,
  975. struct vmw_framebuffer *vfb,
  976. struct vmw_surface *surface,
  977. uint32_t sid,
  978. int32_t destX, int32_t destY,
  979. struct drm_vmw_rect *clips,
  980. uint32_t num_clips)
  981. {
  982. struct vmw_display_unit *units[VMWGFX_NUM_DISPLAY_UNITS];
  983. struct drm_clip_rect *tmp;
  984. struct drm_crtc *crtc;
  985. size_t fifo_size;
  986. int i, k, num_units;
  987. int ret = 0; /* silence warning */
  988. int left, right, top, bottom;
  989. struct {
  990. SVGA3dCmdHeader header;
  991. SVGA3dCmdBlitSurfaceToScreen body;
  992. } *cmd;
  993. SVGASignedRect *blits;
  994. num_units = 0;
  995. list_for_each_entry(crtc, &dev_priv->dev->mode_config.crtc_list, head) {
  996. if (crtc->fb != &vfb->base)
  997. continue;
  998. units[num_units++] = vmw_crtc_to_du(crtc);
  999. }
  1000. BUG_ON(surface == NULL);
  1001. BUG_ON(!clips || !num_clips);
  1002. tmp = kzalloc(sizeof(*tmp) * num_clips, GFP_KERNEL);
  1003. if (unlikely(tmp == NULL)) {
  1004. DRM_ERROR("Temporary cliprect memory alloc failed.\n");
  1005. return -ENOMEM;
  1006. }
  1007. fifo_size = sizeof(*cmd) + sizeof(SVGASignedRect) * num_clips;
  1008. cmd = kmalloc(fifo_size, GFP_KERNEL);
  1009. if (unlikely(cmd == NULL)) {
  1010. DRM_ERROR("Failed to allocate temporary fifo memory.\n");
  1011. ret = -ENOMEM;
  1012. goto out_free_tmp;
  1013. }
  1014. left = clips->x;
  1015. right = clips->x + clips->w;
  1016. top = clips->y;
  1017. bottom = clips->y + clips->h;
  1018. for (i = 1; i < num_clips; i++) {
  1019. left = min_t(int, left, (int)clips[i].x);
  1020. right = max_t(int, right, (int)clips[i].x + clips[i].w);
  1021. top = min_t(int, top, (int)clips[i].y);
  1022. bottom = max_t(int, bottom, (int)clips[i].y + clips[i].h);
  1023. }
  1024. /* only need to do this once */
  1025. memset(cmd, 0, fifo_size);
  1026. cmd->header.id = cpu_to_le32(SVGA_3D_CMD_BLIT_SURFACE_TO_SCREEN);
  1027. blits = (SVGASignedRect *)&cmd[1];
  1028. cmd->body.srcRect.left = left;
  1029. cmd->body.srcRect.right = right;
  1030. cmd->body.srcRect.top = top;
  1031. cmd->body.srcRect.bottom = bottom;
  1032. for (i = 0; i < num_clips; i++) {
  1033. tmp[i].x1 = clips[i].x - left;
  1034. tmp[i].x2 = clips[i].x + clips[i].w - left;
  1035. tmp[i].y1 = clips[i].y - top;
  1036. tmp[i].y2 = clips[i].y + clips[i].h - top;
  1037. }
  1038. for (k = 0; k < num_units; k++) {
  1039. struct vmw_display_unit *unit = units[k];
  1040. struct vmw_clip_rect clip;
  1041. int num;
  1042. clip.x1 = left + destX - unit->crtc.x;
  1043. clip.y1 = top + destY - unit->crtc.y;
  1044. clip.x2 = right + destX - unit->crtc.x;
  1045. clip.y2 = bottom + destY - unit->crtc.y;
  1046. /* skip any crtcs that misses the clip region */
  1047. if (clip.x1 >= unit->crtc.mode.hdisplay ||
  1048. clip.y1 >= unit->crtc.mode.vdisplay ||
  1049. clip.x2 <= 0 || clip.y2 <= 0)
  1050. continue;
  1051. /*
  1052. * In order for the clip rects to be correctly scaled
  1053. * the src and dest rects needs to be the same size.
  1054. */
  1055. cmd->body.destRect.left = clip.x1;
  1056. cmd->body.destRect.right = clip.x2;
  1057. cmd->body.destRect.top = clip.y1;
  1058. cmd->body.destRect.bottom = clip.y2;
  1059. /* create a clip rect of the crtc in dest coords */
  1060. clip.x2 = unit->crtc.mode.hdisplay - clip.x1;
  1061. clip.y2 = unit->crtc.mode.vdisplay - clip.y1;
  1062. clip.x1 = 0 - clip.x1;
  1063. clip.y1 = 0 - clip.y1;
  1064. /* need to reset sid as it is changed by execbuf */
  1065. cmd->body.srcImage.sid = sid;
  1066. cmd->body.destScreenId = unit->unit;
  1067. /* clip and write blits to cmd stream */
  1068. vmw_clip_cliprects(tmp, num_clips, clip, blits, &num);
  1069. /* if no cliprects hit skip this */
  1070. if (num == 0)
  1071. continue;
  1072. /* recalculate package length */
  1073. fifo_size = sizeof(*cmd) + sizeof(SVGASignedRect) * num;
  1074. cmd->header.size = cpu_to_le32(fifo_size - sizeof(cmd->header));
  1075. ret = vmw_execbuf_process(file_priv, dev_priv, NULL, cmd,
  1076. fifo_size, 0, NULL);
  1077. if (unlikely(ret != 0))
  1078. break;
  1079. }
  1080. kfree(cmd);
  1081. out_free_tmp:
  1082. kfree(tmp);
  1083. return ret;
  1084. }
  1085. int vmw_kms_readback(struct vmw_private *dev_priv,
  1086. struct drm_file *file_priv,
  1087. struct vmw_framebuffer *vfb,
  1088. struct drm_vmw_fence_rep __user *user_fence_rep,
  1089. struct drm_vmw_rect *clips,
  1090. uint32_t num_clips)
  1091. {
  1092. struct vmw_framebuffer_dmabuf *vfbd =
  1093. vmw_framebuffer_to_vfbd(&vfb->base);
  1094. struct vmw_dma_buffer *dmabuf = vfbd->buffer;
  1095. struct vmw_display_unit *units[VMWGFX_NUM_DISPLAY_UNITS];
  1096. struct drm_crtc *crtc;
  1097. size_t fifo_size;
  1098. int i, k, ret, num_units, blits_pos;
  1099. struct {
  1100. uint32_t header;
  1101. SVGAFifoCmdDefineGMRFB body;
  1102. } *cmd;
  1103. struct {
  1104. uint32_t header;
  1105. SVGAFifoCmdBlitScreenToGMRFB body;
  1106. } *blits;
  1107. num_units = 0;
  1108. list_for_each_entry(crtc, &dev_priv->dev->mode_config.crtc_list, head) {
  1109. if (crtc->fb != &vfb->base)
  1110. continue;
  1111. units[num_units++] = vmw_crtc_to_du(crtc);
  1112. }
  1113. BUG_ON(dmabuf == NULL);
  1114. BUG_ON(!clips || !num_clips);
  1115. /* take a safe guess at fifo size */
  1116. fifo_size = sizeof(*cmd) + sizeof(*blits) * num_clips * num_units;
  1117. cmd = kmalloc(fifo_size, GFP_KERNEL);
  1118. if (unlikely(cmd == NULL)) {
  1119. DRM_ERROR("Failed to allocate temporary fifo memory.\n");
  1120. return -ENOMEM;
  1121. }
  1122. memset(cmd, 0, fifo_size);
  1123. cmd->header = SVGA_CMD_DEFINE_GMRFB;
  1124. cmd->body.format.bitsPerPixel = vfb->base.bits_per_pixel;
  1125. cmd->body.format.colorDepth = vfb->base.depth;
  1126. cmd->body.format.reserved = 0;
  1127. cmd->body.bytesPerLine = vfb->base.pitches[0];
  1128. cmd->body.ptr.gmrId = vfb->user_handle;
  1129. cmd->body.ptr.offset = 0;
  1130. blits = (void *)&cmd[1];
  1131. blits_pos = 0;
  1132. for (i = 0; i < num_units; i++) {
  1133. struct drm_vmw_rect *c = clips;
  1134. for (k = 0; k < num_clips; k++, c++) {
  1135. /* transform clip coords to crtc origin based coords */
  1136. int clip_x1 = c->x - units[i]->crtc.x;
  1137. int clip_x2 = c->x - units[i]->crtc.x + c->w;
  1138. int clip_y1 = c->y - units[i]->crtc.y;
  1139. int clip_y2 = c->y - units[i]->crtc.y + c->h;
  1140. int dest_x = c->x;
  1141. int dest_y = c->y;
  1142. /* compensate for clipping, we negate
  1143. * a negative number and add that.
  1144. */
  1145. if (clip_x1 < 0)
  1146. dest_x += -clip_x1;
  1147. if (clip_y1 < 0)
  1148. dest_y += -clip_y1;
  1149. /* clip */
  1150. clip_x1 = max(clip_x1, 0);
  1151. clip_y1 = max(clip_y1, 0);
  1152. clip_x2 = min(clip_x2, units[i]->crtc.mode.hdisplay);
  1153. clip_y2 = min(clip_y2, units[i]->crtc.mode.vdisplay);
  1154. /* and cull any rects that misses the crtc */
  1155. if (clip_x1 >= units[i]->crtc.mode.hdisplay ||
  1156. clip_y1 >= units[i]->crtc.mode.vdisplay ||
  1157. clip_x2 <= 0 || clip_y2 <= 0)
  1158. continue;
  1159. blits[blits_pos].header = SVGA_CMD_BLIT_SCREEN_TO_GMRFB;
  1160. blits[blits_pos].body.srcScreenId = units[i]->unit;
  1161. blits[blits_pos].body.destOrigin.x = dest_x;
  1162. blits[blits_pos].body.destOrigin.y = dest_y;
  1163. blits[blits_pos].body.srcRect.left = clip_x1;
  1164. blits[blits_pos].body.srcRect.top = clip_y1;
  1165. blits[blits_pos].body.srcRect.right = clip_x2;
  1166. blits[blits_pos].body.srcRect.bottom = clip_y2;
  1167. blits_pos++;
  1168. }
  1169. }
  1170. /* reset size here and use calculated exact size from loops */
  1171. fifo_size = sizeof(*cmd) + sizeof(*blits) * blits_pos;
  1172. ret = vmw_execbuf_process(file_priv, dev_priv, NULL, cmd, fifo_size,
  1173. 0, user_fence_rep);
  1174. kfree(cmd);
  1175. return ret;
  1176. }
  1177. int vmw_kms_init(struct vmw_private *dev_priv)
  1178. {
  1179. struct drm_device *dev = dev_priv->dev;
  1180. int ret;
  1181. drm_mode_config_init(dev);
  1182. dev->mode_config.funcs = &vmw_kms_funcs;
  1183. dev->mode_config.min_width = 1;
  1184. dev->mode_config.min_height = 1;
  1185. /* assumed largest fb size */
  1186. dev->mode_config.max_width = 8192;
  1187. dev->mode_config.max_height = 8192;
  1188. ret = vmw_kms_init_screen_object_display(dev_priv);
  1189. if (ret) /* Fallback */
  1190. (void)vmw_kms_init_legacy_display_system(dev_priv);
  1191. return 0;
  1192. }
  1193. int vmw_kms_close(struct vmw_private *dev_priv)
  1194. {
  1195. /*
  1196. * Docs says we should take the lock before calling this function
  1197. * but since it destroys encoders and our destructor calls
  1198. * drm_encoder_cleanup which takes the lock we deadlock.
  1199. */
  1200. drm_mode_config_cleanup(dev_priv->dev);
  1201. if (dev_priv->sou_priv)
  1202. vmw_kms_close_screen_object_display(dev_priv);
  1203. else
  1204. vmw_kms_close_legacy_display_system(dev_priv);
  1205. return 0;
  1206. }
  1207. int vmw_kms_cursor_bypass_ioctl(struct drm_device *dev, void *data,
  1208. struct drm_file *file_priv)
  1209. {
  1210. struct drm_vmw_cursor_bypass_arg *arg = data;
  1211. struct vmw_display_unit *du;
  1212. struct drm_mode_object *obj;
  1213. struct drm_crtc *crtc;
  1214. int ret = 0;
  1215. mutex_lock(&dev->mode_config.mutex);
  1216. if (arg->flags & DRM_VMW_CURSOR_BYPASS_ALL) {
  1217. list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
  1218. du = vmw_crtc_to_du(crtc);
  1219. du->hotspot_x = arg->xhot;
  1220. du->hotspot_y = arg->yhot;
  1221. }
  1222. mutex_unlock(&dev->mode_config.mutex);
  1223. return 0;
  1224. }
  1225. obj = drm_mode_object_find(dev, arg->crtc_id, DRM_MODE_OBJECT_CRTC);
  1226. if (!obj) {
  1227. ret = -EINVAL;
  1228. goto out;
  1229. }
  1230. crtc = obj_to_crtc(obj);
  1231. du = vmw_crtc_to_du(crtc);
  1232. du->hotspot_x = arg->xhot;
  1233. du->hotspot_y = arg->yhot;
  1234. out:
  1235. mutex_unlock(&dev->mode_config.mutex);
  1236. return ret;
  1237. }
  1238. int vmw_kms_write_svga(struct vmw_private *vmw_priv,
  1239. unsigned width, unsigned height, unsigned pitch,
  1240. unsigned bpp, unsigned depth)
  1241. {
  1242. if (vmw_priv->capabilities & SVGA_CAP_PITCHLOCK)
  1243. vmw_write(vmw_priv, SVGA_REG_PITCHLOCK, pitch);
  1244. else if (vmw_fifo_have_pitchlock(vmw_priv))
  1245. iowrite32(pitch, vmw_priv->mmio_virt + SVGA_FIFO_PITCHLOCK);
  1246. vmw_write(vmw_priv, SVGA_REG_WIDTH, width);
  1247. vmw_write(vmw_priv, SVGA_REG_HEIGHT, height);
  1248. vmw_write(vmw_priv, SVGA_REG_BITS_PER_PIXEL, bpp);
  1249. if (vmw_read(vmw_priv, SVGA_REG_DEPTH) != depth) {
  1250. DRM_ERROR("Invalid depth %u for %u bpp, host expects %u\n",
  1251. depth, bpp, vmw_read(vmw_priv, SVGA_REG_DEPTH));
  1252. return -EINVAL;
  1253. }
  1254. return 0;
  1255. }
  1256. int vmw_kms_save_vga(struct vmw_private *vmw_priv)
  1257. {
  1258. struct vmw_vga_topology_state *save;
  1259. uint32_t i;
  1260. vmw_priv->vga_width = vmw_read(vmw_priv, SVGA_REG_WIDTH);
  1261. vmw_priv->vga_height = vmw_read(vmw_priv, SVGA_REG_HEIGHT);
  1262. vmw_priv->vga_bpp = vmw_read(vmw_priv, SVGA_REG_BITS_PER_PIXEL);
  1263. if (vmw_priv->capabilities & SVGA_CAP_PITCHLOCK)
  1264. vmw_priv->vga_pitchlock =
  1265. vmw_read(vmw_priv, SVGA_REG_PITCHLOCK);
  1266. else if (vmw_fifo_have_pitchlock(vmw_priv))
  1267. vmw_priv->vga_pitchlock = ioread32(vmw_priv->mmio_virt +
  1268. SVGA_FIFO_PITCHLOCK);
  1269. if (!(vmw_priv->capabilities & SVGA_CAP_DISPLAY_TOPOLOGY))
  1270. return 0;
  1271. vmw_priv->num_displays = vmw_read(vmw_priv,
  1272. SVGA_REG_NUM_GUEST_DISPLAYS);
  1273. if (vmw_priv->num_displays == 0)
  1274. vmw_priv->num_displays = 1;
  1275. for (i = 0; i < vmw_priv->num_displays; ++i) {
  1276. save = &vmw_priv->vga_save[i];
  1277. vmw_write(vmw_priv, SVGA_REG_DISPLAY_ID, i);
  1278. save->primary = vmw_read(vmw_priv, SVGA_REG_DISPLAY_IS_PRIMARY);
  1279. save->pos_x = vmw_read(vmw_priv, SVGA_REG_DISPLAY_POSITION_X);
  1280. save->pos_y = vmw_read(vmw_priv, SVGA_REG_DISPLAY_POSITION_Y);
  1281. save->width = vmw_read(vmw_priv, SVGA_REG_DISPLAY_WIDTH);
  1282. save->height = vmw_read(vmw_priv, SVGA_REG_DISPLAY_HEIGHT);
  1283. vmw_write(vmw_priv, SVGA_REG_DISPLAY_ID, SVGA_ID_INVALID);
  1284. if (i == 0 && vmw_priv->num_displays == 1 &&
  1285. save->width == 0 && save->height == 0) {
  1286. /*
  1287. * It should be fairly safe to assume that these
  1288. * values are uninitialized.
  1289. */
  1290. save->width = vmw_priv->vga_width - save->pos_x;
  1291. save->height = vmw_priv->vga_height - save->pos_y;
  1292. }
  1293. }
  1294. return 0;
  1295. }
  1296. int vmw_kms_restore_vga(struct vmw_private *vmw_priv)
  1297. {
  1298. struct vmw_vga_topology_state *save;
  1299. uint32_t i;
  1300. vmw_write(vmw_priv, SVGA_REG_WIDTH, vmw_priv->vga_width);
  1301. vmw_write(vmw_priv, SVGA_REG_HEIGHT, vmw_priv->vga_height);
  1302. vmw_write(vmw_priv, SVGA_REG_BITS_PER_PIXEL, vmw_priv->vga_bpp);
  1303. if (vmw_priv->capabilities & SVGA_CAP_PITCHLOCK)
  1304. vmw_write(vmw_priv, SVGA_REG_PITCHLOCK,
  1305. vmw_priv->vga_pitchlock);
  1306. else if (vmw_fifo_have_pitchlock(vmw_priv))
  1307. iowrite32(vmw_priv->vga_pitchlock,
  1308. vmw_priv->mmio_virt + SVGA_FIFO_PITCHLOCK);
  1309. if (!(vmw_priv->capabilities & SVGA_CAP_DISPLAY_TOPOLOGY))
  1310. return 0;
  1311. for (i = 0; i < vmw_priv->num_displays; ++i) {
  1312. save = &vmw_priv->vga_save[i];
  1313. vmw_write(vmw_priv, SVGA_REG_DISPLAY_ID, i);
  1314. vmw_write(vmw_priv, SVGA_REG_DISPLAY_IS_PRIMARY, save->primary);
  1315. vmw_write(vmw_priv, SVGA_REG_DISPLAY_POSITION_X, save->pos_x);
  1316. vmw_write(vmw_priv, SVGA_REG_DISPLAY_POSITION_Y, save->pos_y);
  1317. vmw_write(vmw_priv, SVGA_REG_DISPLAY_WIDTH, save->width);
  1318. vmw_write(vmw_priv, SVGA_REG_DISPLAY_HEIGHT, save->height);
  1319. vmw_write(vmw_priv, SVGA_REG_DISPLAY_ID, SVGA_ID_INVALID);
  1320. }
  1321. return 0;
  1322. }
  1323. bool vmw_kms_validate_mode_vram(struct vmw_private *dev_priv,
  1324. uint32_t pitch,
  1325. uint32_t height)
  1326. {
  1327. return ((u64) pitch * (u64) height) < (u64) dev_priv->vram_size;
  1328. }
  1329. /**
  1330. * Function called by DRM code called with vbl_lock held.
  1331. */
  1332. u32 vmw_get_vblank_counter(struct drm_device *dev, int crtc)
  1333. {
  1334. return 0;
  1335. }
  1336. /**
  1337. * Function called by DRM code called with vbl_lock held.
  1338. */
  1339. int vmw_enable_vblank(struct drm_device *dev, int crtc)
  1340. {
  1341. return -ENOSYS;
  1342. }
  1343. /**
  1344. * Function called by DRM code called with vbl_lock held.
  1345. */
  1346. void vmw_disable_vblank(struct drm_device *dev, int crtc)
  1347. {
  1348. }
  1349. /*
  1350. * Small shared kms functions.
  1351. */
  1352. int vmw_du_update_layout(struct vmw_private *dev_priv, unsigned num,
  1353. struct drm_vmw_rect *rects)
  1354. {
  1355. struct drm_device *dev = dev_priv->dev;
  1356. struct vmw_display_unit *du;
  1357. struct drm_connector *con;
  1358. mutex_lock(&dev->mode_config.mutex);
  1359. #if 0
  1360. {
  1361. unsigned int i;
  1362. DRM_INFO("%s: new layout ", __func__);
  1363. for (i = 0; i < num; i++)
  1364. DRM_INFO("(%i, %i %ux%u) ", rects[i].x, rects[i].y,
  1365. rects[i].w, rects[i].h);
  1366. DRM_INFO("\n");
  1367. }
  1368. #endif
  1369. list_for_each_entry(con, &dev->mode_config.connector_list, head) {
  1370. du = vmw_connector_to_du(con);
  1371. if (num > du->unit) {
  1372. du->pref_width = rects[du->unit].w;
  1373. du->pref_height = rects[du->unit].h;
  1374. du->pref_active = true;
  1375. du->gui_x = rects[du->unit].x;
  1376. du->gui_y = rects[du->unit].y;
  1377. } else {
  1378. du->pref_width = 800;
  1379. du->pref_height = 600;
  1380. du->pref_active = false;
  1381. }
  1382. con->status = vmw_du_connector_detect(con, true);
  1383. }
  1384. mutex_unlock(&dev->mode_config.mutex);
  1385. return 0;
  1386. }
  1387. void vmw_du_crtc_save(struct drm_crtc *crtc)
  1388. {
  1389. }
  1390. void vmw_du_crtc_restore(struct drm_crtc *crtc)
  1391. {
  1392. }
  1393. void vmw_du_crtc_gamma_set(struct drm_crtc *crtc,
  1394. u16 *r, u16 *g, u16 *b,
  1395. uint32_t start, uint32_t size)
  1396. {
  1397. struct vmw_private *dev_priv = vmw_priv(crtc->dev);
  1398. int i;
  1399. for (i = 0; i < size; i++) {
  1400. DRM_DEBUG("%d r/g/b = 0x%04x / 0x%04x / 0x%04x\n", i,
  1401. r[i], g[i], b[i]);
  1402. vmw_write(dev_priv, SVGA_PALETTE_BASE + i * 3 + 0, r[i] >> 8);
  1403. vmw_write(dev_priv, SVGA_PALETTE_BASE + i * 3 + 1, g[i] >> 8);
  1404. vmw_write(dev_priv, SVGA_PALETTE_BASE + i * 3 + 2, b[i] >> 8);
  1405. }
  1406. }
  1407. void vmw_du_connector_dpms(struct drm_connector *connector, int mode)
  1408. {
  1409. }
  1410. void vmw_du_connector_save(struct drm_connector *connector)
  1411. {
  1412. }
  1413. void vmw_du_connector_restore(struct drm_connector *connector)
  1414. {
  1415. }
  1416. enum drm_connector_status
  1417. vmw_du_connector_detect(struct drm_connector *connector, bool force)
  1418. {
  1419. uint32_t num_displays;
  1420. struct drm_device *dev = connector->dev;
  1421. struct vmw_private *dev_priv = vmw_priv(dev);
  1422. struct vmw_display_unit *du = vmw_connector_to_du(connector);
  1423. mutex_lock(&dev_priv->hw_mutex);
  1424. num_displays = vmw_read(dev_priv, SVGA_REG_NUM_DISPLAYS);
  1425. mutex_unlock(&dev_priv->hw_mutex);
  1426. return ((vmw_connector_to_du(connector)->unit < num_displays &&
  1427. du->pref_active) ?
  1428. connector_status_connected : connector_status_disconnected);
  1429. }
  1430. static struct drm_display_mode vmw_kms_connector_builtin[] = {
  1431. /* 640x480@60Hz */
  1432. { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 25175, 640, 656,
  1433. 752, 800, 0, 480, 489, 492, 525, 0,
  1434. DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
  1435. /* 800x600@60Hz */
  1436. { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 40000, 800, 840,
  1437. 968, 1056, 0, 600, 601, 605, 628, 0,
  1438. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1439. /* 1024x768@60Hz */
  1440. { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 65000, 1024, 1048,
  1441. 1184, 1344, 0, 768, 771, 777, 806, 0,
  1442. DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
  1443. /* 1152x864@75Hz */
  1444. { DRM_MODE("1152x864", DRM_MODE_TYPE_DRIVER, 108000, 1152, 1216,
  1445. 1344, 1600, 0, 864, 865, 868, 900, 0,
  1446. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1447. /* 1280x768@60Hz */
  1448. { DRM_MODE("1280x768", DRM_MODE_TYPE_DRIVER, 79500, 1280, 1344,
  1449. 1472, 1664, 0, 768, 771, 778, 798, 0,
  1450. DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1451. /* 1280x800@60Hz */
  1452. { DRM_MODE("1280x800", DRM_MODE_TYPE_DRIVER, 83500, 1280, 1352,
  1453. 1480, 1680, 0, 800, 803, 809, 831, 0,
  1454. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
  1455. /* 1280x960@60Hz */
  1456. { DRM_MODE("1280x960", DRM_MODE_TYPE_DRIVER, 108000, 1280, 1376,
  1457. 1488, 1800, 0, 960, 961, 964, 1000, 0,
  1458. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1459. /* 1280x1024@60Hz */
  1460. { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 108000, 1280, 1328,
  1461. 1440, 1688, 0, 1024, 1025, 1028, 1066, 0,
  1462. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1463. /* 1360x768@60Hz */
  1464. { DRM_MODE("1360x768", DRM_MODE_TYPE_DRIVER, 85500, 1360, 1424,
  1465. 1536, 1792, 0, 768, 771, 777, 795, 0,
  1466. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1467. /* 1440x1050@60Hz */
  1468. { DRM_MODE("1400x1050", DRM_MODE_TYPE_DRIVER, 121750, 1400, 1488,
  1469. 1632, 1864, 0, 1050, 1053, 1057, 1089, 0,
  1470. DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1471. /* 1440x900@60Hz */
  1472. { DRM_MODE("1440x900", DRM_MODE_TYPE_DRIVER, 106500, 1440, 1520,
  1473. 1672, 1904, 0, 900, 903, 909, 934, 0,
  1474. DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1475. /* 1600x1200@60Hz */
  1476. { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 162000, 1600, 1664,
  1477. 1856, 2160, 0, 1200, 1201, 1204, 1250, 0,
  1478. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1479. /* 1680x1050@60Hz */
  1480. { DRM_MODE("1680x1050", DRM_MODE_TYPE_DRIVER, 146250, 1680, 1784,
  1481. 1960, 2240, 0, 1050, 1053, 1059, 1089, 0,
  1482. DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1483. /* 1792x1344@60Hz */
  1484. { DRM_MODE("1792x1344", DRM_MODE_TYPE_DRIVER, 204750, 1792, 1920,
  1485. 2120, 2448, 0, 1344, 1345, 1348, 1394, 0,
  1486. DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1487. /* 1853x1392@60Hz */
  1488. { DRM_MODE("1856x1392", DRM_MODE_TYPE_DRIVER, 218250, 1856, 1952,
  1489. 2176, 2528, 0, 1392, 1393, 1396, 1439, 0,
  1490. DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1491. /* 1920x1200@60Hz */
  1492. { DRM_MODE("1920x1200", DRM_MODE_TYPE_DRIVER, 193250, 1920, 2056,
  1493. 2256, 2592, 0, 1200, 1203, 1209, 1245, 0,
  1494. DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1495. /* 1920x1440@60Hz */
  1496. { DRM_MODE("1920x1440", DRM_MODE_TYPE_DRIVER, 234000, 1920, 2048,
  1497. 2256, 2600, 0, 1440, 1441, 1444, 1500, 0,
  1498. DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1499. /* 2560x1600@60Hz */
  1500. { DRM_MODE("2560x1600", DRM_MODE_TYPE_DRIVER, 348500, 2560, 2752,
  1501. 3032, 3504, 0, 1600, 1603, 1609, 1658, 0,
  1502. DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1503. /* Terminate */
  1504. { DRM_MODE("", 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0) },
  1505. };
  1506. /**
  1507. * vmw_guess_mode_timing - Provide fake timings for a
  1508. * 60Hz vrefresh mode.
  1509. *
  1510. * @mode - Pointer to a struct drm_display_mode with hdisplay and vdisplay
  1511. * members filled in.
  1512. */
  1513. static void vmw_guess_mode_timing(struct drm_display_mode *mode)
  1514. {
  1515. mode->hsync_start = mode->hdisplay + 50;
  1516. mode->hsync_end = mode->hsync_start + 50;
  1517. mode->htotal = mode->hsync_end + 50;
  1518. mode->vsync_start = mode->vdisplay + 50;
  1519. mode->vsync_end = mode->vsync_start + 50;
  1520. mode->vtotal = mode->vsync_end + 50;
  1521. mode->clock = (u32)mode->htotal * (u32)mode->vtotal / 100 * 6;
  1522. mode->vrefresh = drm_mode_vrefresh(mode);
  1523. }
  1524. int vmw_du_connector_fill_modes(struct drm_connector *connector,
  1525. uint32_t max_width, uint32_t max_height)
  1526. {
  1527. struct vmw_display_unit *du = vmw_connector_to_du(connector);
  1528. struct drm_device *dev = connector->dev;
  1529. struct vmw_private *dev_priv = vmw_priv(dev);
  1530. struct drm_display_mode *mode = NULL;
  1531. struct drm_display_mode *bmode;
  1532. struct drm_display_mode prefmode = { DRM_MODE("preferred",
  1533. DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED,
  1534. 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
  1535. DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC)
  1536. };
  1537. int i;
  1538. /* Add preferred mode */
  1539. {
  1540. mode = drm_mode_duplicate(dev, &prefmode);
  1541. if (!mode)
  1542. return 0;
  1543. mode->hdisplay = du->pref_width;
  1544. mode->vdisplay = du->pref_height;
  1545. vmw_guess_mode_timing(mode);
  1546. if (vmw_kms_validate_mode_vram(dev_priv, mode->hdisplay * 2,
  1547. mode->vdisplay)) {
  1548. drm_mode_probed_add(connector, mode);
  1549. } else {
  1550. drm_mode_destroy(dev, mode);
  1551. mode = NULL;
  1552. }
  1553. if (du->pref_mode) {
  1554. list_del_init(&du->pref_mode->head);
  1555. drm_mode_destroy(dev, du->pref_mode);
  1556. }
  1557. /* mode might be null here, this is intended */
  1558. du->pref_mode = mode;
  1559. }
  1560. for (i = 0; vmw_kms_connector_builtin[i].type != 0; i++) {
  1561. bmode = &vmw_kms_connector_builtin[i];
  1562. if (bmode->hdisplay > max_width ||
  1563. bmode->vdisplay > max_height)
  1564. continue;
  1565. if (!vmw_kms_validate_mode_vram(dev_priv, bmode->hdisplay * 2,
  1566. bmode->vdisplay))
  1567. continue;
  1568. mode = drm_mode_duplicate(dev, bmode);
  1569. if (!mode)
  1570. return 0;
  1571. mode->vrefresh = drm_mode_vrefresh(mode);
  1572. drm_mode_probed_add(connector, mode);
  1573. }
  1574. /* Move the prefered mode first, help apps pick the right mode. */
  1575. if (du->pref_mode)
  1576. list_move(&du->pref_mode->head, &connector->probed_modes);
  1577. drm_mode_connector_list_update(connector);
  1578. return 1;
  1579. }
  1580. int vmw_du_connector_set_property(struct drm_connector *connector,
  1581. struct drm_property *property,
  1582. uint64_t val)
  1583. {
  1584. return 0;
  1585. }
  1586. int vmw_kms_update_layout_ioctl(struct drm_device *dev, void *data,
  1587. struct drm_file *file_priv)
  1588. {
  1589. struct vmw_private *dev_priv = vmw_priv(dev);
  1590. struct drm_vmw_update_layout_arg *arg =
  1591. (struct drm_vmw_update_layout_arg *)data;
  1592. struct vmw_master *vmaster = vmw_master(file_priv->master);
  1593. void __user *user_rects;
  1594. struct drm_vmw_rect *rects;
  1595. unsigned rects_size;
  1596. int ret;
  1597. int i;
  1598. struct drm_mode_config *mode_config = &dev->mode_config;
  1599. ret = ttm_read_lock(&vmaster->lock, true);
  1600. if (unlikely(ret != 0))
  1601. return ret;
  1602. if (!arg->num_outputs) {
  1603. struct drm_vmw_rect def_rect = {0, 0, 800, 600};
  1604. vmw_du_update_layout(dev_priv, 1, &def_rect);
  1605. goto out_unlock;
  1606. }
  1607. rects_size = arg->num_outputs * sizeof(struct drm_vmw_rect);
  1608. rects = kcalloc(arg->num_outputs, sizeof(struct drm_vmw_rect),
  1609. GFP_KERNEL);
  1610. if (unlikely(!rects)) {
  1611. ret = -ENOMEM;
  1612. goto out_unlock;
  1613. }
  1614. user_rects = (void __user *)(unsigned long)arg->rects;
  1615. ret = copy_from_user(rects, user_rects, rects_size);
  1616. if (unlikely(ret != 0)) {
  1617. DRM_ERROR("Failed to get rects.\n");
  1618. ret = -EFAULT;
  1619. goto out_free;
  1620. }
  1621. for (i = 0; i < arg->num_outputs; ++i) {
  1622. if (rects[i].x < 0 ||
  1623. rects[i].y < 0 ||
  1624. rects[i].x + rects[i].w > mode_config->max_width ||
  1625. rects[i].y + rects[i].h > mode_config->max_height) {
  1626. DRM_ERROR("Invalid GUI layout.\n");
  1627. ret = -EINVAL;
  1628. goto out_free;
  1629. }
  1630. }
  1631. vmw_du_update_layout(dev_priv, arg->num_outputs, rects);
  1632. out_free:
  1633. kfree(rects);
  1634. out_unlock:
  1635. ttm_read_unlock(&vmaster->lock);
  1636. return ret;
  1637. }