cdv_intel_lvds.c 20 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717718719720721722723724725726727728729730731732
  1. /*
  2. * Copyright © 2006-2011 Intel Corporation
  3. *
  4. * This program is free software; you can redistribute it and/or modify it
  5. * under the terms and conditions of the GNU General Public License,
  6. * version 2, as published by the Free Software Foundation.
  7. *
  8. * This program is distributed in the hope it will be useful, but WITHOUT
  9. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  10. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  11. * more details.
  12. *
  13. * You should have received a copy of the GNU General Public License along with
  14. * this program; if not, write to the Free Software Foundation, Inc.,
  15. * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
  16. *
  17. * Authors:
  18. * Eric Anholt <eric@anholt.net>
  19. * Dave Airlie <airlied@linux.ie>
  20. * Jesse Barnes <jesse.barnes@intel.com>
  21. */
  22. #include <linux/i2c.h>
  23. #include <linux/dmi.h>
  24. #include <drm/drmP.h>
  25. #include "intel_bios.h"
  26. #include "psb_drv.h"
  27. #include "psb_intel_drv.h"
  28. #include "psb_intel_reg.h"
  29. #include "power.h"
  30. #include <linux/pm_runtime.h>
  31. #include "cdv_device.h"
  32. /**
  33. * LVDS I2C backlight control macros
  34. */
  35. #define BRIGHTNESS_MAX_LEVEL 100
  36. #define BRIGHTNESS_MASK 0xFF
  37. #define BLC_I2C_TYPE 0x01
  38. #define BLC_PWM_TYPT 0x02
  39. #define BLC_POLARITY_NORMAL 0
  40. #define BLC_POLARITY_INVERSE 1
  41. #define PSB_BLC_MAX_PWM_REG_FREQ (0xFFFE)
  42. #define PSB_BLC_MIN_PWM_REG_FREQ (0x2)
  43. #define PSB_BLC_PWM_PRECISION_FACTOR (10)
  44. #define PSB_BACKLIGHT_PWM_CTL_SHIFT (16)
  45. #define PSB_BACKLIGHT_PWM_POLARITY_BIT_CLEAR (0xFFFE)
  46. struct cdv_intel_lvds_priv {
  47. /**
  48. * Saved LVDO output states
  49. */
  50. uint32_t savePP_ON;
  51. uint32_t savePP_OFF;
  52. uint32_t saveLVDS;
  53. uint32_t savePP_CONTROL;
  54. uint32_t savePP_CYCLE;
  55. uint32_t savePFIT_CONTROL;
  56. uint32_t savePFIT_PGM_RATIOS;
  57. uint32_t saveBLC_PWM_CTL;
  58. };
  59. /*
  60. * Returns the maximum level of the backlight duty cycle field.
  61. */
  62. static u32 cdv_intel_lvds_get_max_backlight(struct drm_device *dev)
  63. {
  64. struct drm_psb_private *dev_priv = dev->dev_private;
  65. u32 retval;
  66. if (gma_power_begin(dev, false)) {
  67. retval = ((REG_READ(BLC_PWM_CTL) &
  68. BACKLIGHT_MODULATION_FREQ_MASK) >>
  69. BACKLIGHT_MODULATION_FREQ_SHIFT) * 2;
  70. gma_power_end(dev);
  71. } else
  72. retval = ((dev_priv->saveBLC_PWM_CTL &
  73. BACKLIGHT_MODULATION_FREQ_MASK) >>
  74. BACKLIGHT_MODULATION_FREQ_SHIFT) * 2;
  75. return retval;
  76. }
  77. /*
  78. * Set LVDS backlight level by I2C command
  79. */
  80. static int cdv_lvds_i2c_set_brightness(struct drm_device *dev,
  81. unsigned int level)
  82. {
  83. struct drm_psb_private *dev_priv = dev->dev_private;
  84. struct psb_intel_i2c_chan *lvds_i2c_bus = dev_priv->lvds_i2c_bus;
  85. u8 out_buf[2];
  86. unsigned int blc_i2c_brightness;
  87. struct i2c_msg msgs[] = {
  88. {
  89. .addr = lvds_i2c_bus->slave_addr,
  90. .flags = 0,
  91. .len = 2,
  92. .buf = out_buf,
  93. }
  94. };
  95. blc_i2c_brightness = BRIGHTNESS_MASK & ((unsigned int)level *
  96. BRIGHTNESS_MASK /
  97. BRIGHTNESS_MAX_LEVEL);
  98. if (dev_priv->lvds_bl->pol == BLC_POLARITY_INVERSE)
  99. blc_i2c_brightness = BRIGHTNESS_MASK - blc_i2c_brightness;
  100. out_buf[0] = dev_priv->lvds_bl->brightnesscmd;
  101. out_buf[1] = (u8)blc_i2c_brightness;
  102. if (i2c_transfer(&lvds_i2c_bus->adapter, msgs, 1) == 1)
  103. return 0;
  104. DRM_ERROR("I2C transfer error\n");
  105. return -1;
  106. }
  107. static int cdv_lvds_pwm_set_brightness(struct drm_device *dev, int level)
  108. {
  109. struct drm_psb_private *dev_priv = dev->dev_private;
  110. u32 max_pwm_blc;
  111. u32 blc_pwm_duty_cycle;
  112. max_pwm_blc = cdv_intel_lvds_get_max_backlight(dev);
  113. /*BLC_PWM_CTL Should be initiated while backlight device init*/
  114. BUG_ON((max_pwm_blc & PSB_BLC_MAX_PWM_REG_FREQ) == 0);
  115. blc_pwm_duty_cycle = level * max_pwm_blc / BRIGHTNESS_MAX_LEVEL;
  116. if (dev_priv->lvds_bl->pol == BLC_POLARITY_INVERSE)
  117. blc_pwm_duty_cycle = max_pwm_blc - blc_pwm_duty_cycle;
  118. blc_pwm_duty_cycle &= PSB_BACKLIGHT_PWM_POLARITY_BIT_CLEAR;
  119. REG_WRITE(BLC_PWM_CTL,
  120. (max_pwm_blc << PSB_BACKLIGHT_PWM_CTL_SHIFT) |
  121. (blc_pwm_duty_cycle));
  122. return 0;
  123. }
  124. /*
  125. * Set LVDS backlight level either by I2C or PWM
  126. */
  127. void cdv_intel_lvds_set_brightness(struct drm_device *dev, int level)
  128. {
  129. struct drm_psb_private *dev_priv = dev->dev_private;
  130. if (!dev_priv->lvds_bl) {
  131. DRM_ERROR("NO LVDS Backlight Info\n");
  132. return;
  133. }
  134. if (dev_priv->lvds_bl->type == BLC_I2C_TYPE)
  135. cdv_lvds_i2c_set_brightness(dev, level);
  136. else
  137. cdv_lvds_pwm_set_brightness(dev, level);
  138. }
  139. /**
  140. * Sets the backlight level.
  141. *
  142. * level backlight level, from 0 to cdv_intel_lvds_get_max_backlight().
  143. */
  144. static void cdv_intel_lvds_set_backlight(struct drm_device *dev, int level)
  145. {
  146. struct drm_psb_private *dev_priv = dev->dev_private;
  147. u32 blc_pwm_ctl;
  148. if (gma_power_begin(dev, false)) {
  149. blc_pwm_ctl =
  150. REG_READ(BLC_PWM_CTL) & ~BACKLIGHT_DUTY_CYCLE_MASK;
  151. REG_WRITE(BLC_PWM_CTL,
  152. (blc_pwm_ctl |
  153. (level << BACKLIGHT_DUTY_CYCLE_SHIFT)));
  154. gma_power_end(dev);
  155. } else {
  156. blc_pwm_ctl = dev_priv->saveBLC_PWM_CTL &
  157. ~BACKLIGHT_DUTY_CYCLE_MASK;
  158. dev_priv->saveBLC_PWM_CTL = (blc_pwm_ctl |
  159. (level << BACKLIGHT_DUTY_CYCLE_SHIFT));
  160. }
  161. }
  162. /**
  163. * Sets the power state for the panel.
  164. */
  165. static void cdv_intel_lvds_set_power(struct drm_device *dev,
  166. struct drm_encoder *encoder, bool on)
  167. {
  168. struct drm_psb_private *dev_priv = dev->dev_private;
  169. u32 pp_status;
  170. if (!gma_power_begin(dev, true))
  171. return;
  172. if (on) {
  173. REG_WRITE(PP_CONTROL, REG_READ(PP_CONTROL) |
  174. POWER_TARGET_ON);
  175. do {
  176. pp_status = REG_READ(PP_STATUS);
  177. } while ((pp_status & PP_ON) == 0);
  178. cdv_intel_lvds_set_backlight(dev,
  179. dev_priv->mode_dev.backlight_duty_cycle);
  180. } else {
  181. cdv_intel_lvds_set_backlight(dev, 0);
  182. REG_WRITE(PP_CONTROL, REG_READ(PP_CONTROL) &
  183. ~POWER_TARGET_ON);
  184. do {
  185. pp_status = REG_READ(PP_STATUS);
  186. } while (pp_status & PP_ON);
  187. }
  188. gma_power_end(dev);
  189. }
  190. static void cdv_intel_lvds_encoder_dpms(struct drm_encoder *encoder, int mode)
  191. {
  192. struct drm_device *dev = encoder->dev;
  193. if (mode == DRM_MODE_DPMS_ON)
  194. cdv_intel_lvds_set_power(dev, encoder, true);
  195. else
  196. cdv_intel_lvds_set_power(dev, encoder, false);
  197. /* XXX: We never power down the LVDS pairs. */
  198. }
  199. static void cdv_intel_lvds_save(struct drm_connector *connector)
  200. {
  201. }
  202. static void cdv_intel_lvds_restore(struct drm_connector *connector)
  203. {
  204. }
  205. int cdv_intel_lvds_mode_valid(struct drm_connector *connector,
  206. struct drm_display_mode *mode)
  207. {
  208. struct drm_device *dev = connector->dev;
  209. struct drm_psb_private *dev_priv = dev->dev_private;
  210. struct drm_display_mode *fixed_mode =
  211. dev_priv->mode_dev.panel_fixed_mode;
  212. /* just in case */
  213. if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
  214. return MODE_NO_DBLESCAN;
  215. /* just in case */
  216. if (mode->flags & DRM_MODE_FLAG_INTERLACE)
  217. return MODE_NO_INTERLACE;
  218. if (fixed_mode) {
  219. if (mode->hdisplay > fixed_mode->hdisplay)
  220. return MODE_PANEL;
  221. if (mode->vdisplay > fixed_mode->vdisplay)
  222. return MODE_PANEL;
  223. }
  224. return MODE_OK;
  225. }
  226. bool cdv_intel_lvds_mode_fixup(struct drm_encoder *encoder,
  227. struct drm_display_mode *mode,
  228. struct drm_display_mode *adjusted_mode)
  229. {
  230. struct drm_device *dev = encoder->dev;
  231. struct drm_psb_private *dev_priv = dev->dev_private;
  232. struct psb_intel_mode_device *mode_dev = &dev_priv->mode_dev;
  233. struct drm_encoder *tmp_encoder;
  234. struct drm_display_mode *panel_fixed_mode = mode_dev->panel_fixed_mode;
  235. /* Should never happen!! */
  236. list_for_each_entry(tmp_encoder, &dev->mode_config.encoder_list,
  237. head) {
  238. if (tmp_encoder != encoder
  239. && tmp_encoder->crtc == encoder->crtc) {
  240. printk(KERN_ERR "Can't enable LVDS and another "
  241. "encoder on the same pipe\n");
  242. return false;
  243. }
  244. }
  245. /*
  246. * If we have timings from the BIOS for the panel, put them in
  247. * to the adjusted mode. The CRTC will be set up for this mode,
  248. * with the panel scaling set up to source from the H/VDisplay
  249. * of the original mode.
  250. */
  251. if (panel_fixed_mode != NULL) {
  252. adjusted_mode->hdisplay = panel_fixed_mode->hdisplay;
  253. adjusted_mode->hsync_start = panel_fixed_mode->hsync_start;
  254. adjusted_mode->hsync_end = panel_fixed_mode->hsync_end;
  255. adjusted_mode->htotal = panel_fixed_mode->htotal;
  256. adjusted_mode->vdisplay = panel_fixed_mode->vdisplay;
  257. adjusted_mode->vsync_start = panel_fixed_mode->vsync_start;
  258. adjusted_mode->vsync_end = panel_fixed_mode->vsync_end;
  259. adjusted_mode->vtotal = panel_fixed_mode->vtotal;
  260. adjusted_mode->clock = panel_fixed_mode->clock;
  261. drm_mode_set_crtcinfo(adjusted_mode,
  262. CRTC_INTERLACE_HALVE_V);
  263. }
  264. /*
  265. * XXX: It would be nice to support lower refresh rates on the
  266. * panels to reduce power consumption, and perhaps match the
  267. * user's requested refresh rate.
  268. */
  269. return true;
  270. }
  271. static void cdv_intel_lvds_prepare(struct drm_encoder *encoder)
  272. {
  273. struct drm_device *dev = encoder->dev;
  274. struct drm_psb_private *dev_priv = dev->dev_private;
  275. struct psb_intel_mode_device *mode_dev = &dev_priv->mode_dev;
  276. if (!gma_power_begin(dev, true))
  277. return;
  278. mode_dev->saveBLC_PWM_CTL = REG_READ(BLC_PWM_CTL);
  279. mode_dev->backlight_duty_cycle = (mode_dev->saveBLC_PWM_CTL &
  280. BACKLIGHT_DUTY_CYCLE_MASK);
  281. cdv_intel_lvds_set_power(dev, encoder, false);
  282. gma_power_end(dev);
  283. }
  284. static void cdv_intel_lvds_commit(struct drm_encoder *encoder)
  285. {
  286. struct drm_device *dev = encoder->dev;
  287. struct drm_psb_private *dev_priv = dev->dev_private;
  288. struct psb_intel_mode_device *mode_dev = &dev_priv->mode_dev;
  289. if (mode_dev->backlight_duty_cycle == 0)
  290. mode_dev->backlight_duty_cycle =
  291. cdv_intel_lvds_get_max_backlight(dev);
  292. cdv_intel_lvds_set_power(dev, encoder, true);
  293. }
  294. static void cdv_intel_lvds_mode_set(struct drm_encoder *encoder,
  295. struct drm_display_mode *mode,
  296. struct drm_display_mode *adjusted_mode)
  297. {
  298. struct drm_device *dev = encoder->dev;
  299. struct drm_psb_private *dev_priv = dev->dev_private;
  300. u32 pfit_control;
  301. /*
  302. * The LVDS pin pair will already have been turned on in the
  303. * cdv_intel_crtc_mode_set since it has a large impact on the DPLL
  304. * settings.
  305. */
  306. /*
  307. * Enable automatic panel scaling so that non-native modes fill the
  308. * screen. Should be enabled before the pipe is enabled, according to
  309. * register description and PRM.
  310. */
  311. if (mode->hdisplay != adjusted_mode->hdisplay ||
  312. mode->vdisplay != adjusted_mode->vdisplay)
  313. pfit_control = (PFIT_ENABLE | VERT_AUTO_SCALE |
  314. HORIZ_AUTO_SCALE | VERT_INTERP_BILINEAR |
  315. HORIZ_INTERP_BILINEAR);
  316. else
  317. pfit_control = 0;
  318. if (dev_priv->lvds_dither)
  319. pfit_control |= PANEL_8TO6_DITHER_ENABLE;
  320. REG_WRITE(PFIT_CONTROL, pfit_control);
  321. }
  322. /**
  323. * Detect the LVDS connection.
  324. *
  325. * This always returns CONNECTOR_STATUS_CONNECTED.
  326. * This connector should only have
  327. * been set up if the LVDS was actually connected anyway.
  328. */
  329. static enum drm_connector_status cdv_intel_lvds_detect(
  330. struct drm_connector *connector, bool force)
  331. {
  332. return connector_status_connected;
  333. }
  334. /**
  335. * Return the list of DDC modes if available, or the BIOS fixed mode otherwise.
  336. */
  337. static int cdv_intel_lvds_get_modes(struct drm_connector *connector)
  338. {
  339. struct drm_device *dev = connector->dev;
  340. struct drm_psb_private *dev_priv = dev->dev_private;
  341. struct psb_intel_encoder *psb_intel_encoder =
  342. psb_intel_attached_encoder(connector);
  343. struct psb_intel_mode_device *mode_dev = &dev_priv->mode_dev;
  344. int ret;
  345. ret = psb_intel_ddc_get_modes(connector, &psb_intel_encoder->i2c_bus->adapter);
  346. if (ret)
  347. return ret;
  348. /* Didn't get an EDID, so
  349. * Set wide sync ranges so we get all modes
  350. * handed to valid_mode for checking
  351. */
  352. connector->display_info.min_vfreq = 0;
  353. connector->display_info.max_vfreq = 200;
  354. connector->display_info.min_hfreq = 0;
  355. connector->display_info.max_hfreq = 200;
  356. if (mode_dev->panel_fixed_mode != NULL) {
  357. struct drm_display_mode *mode =
  358. drm_mode_duplicate(dev, mode_dev->panel_fixed_mode);
  359. drm_mode_probed_add(connector, mode);
  360. return 1;
  361. }
  362. return 0;
  363. }
  364. /**
  365. * cdv_intel_lvds_destroy - unregister and free LVDS structures
  366. * @connector: connector to free
  367. *
  368. * Unregister the DDC bus for this connector then free the driver private
  369. * structure.
  370. */
  371. void cdv_intel_lvds_destroy(struct drm_connector *connector)
  372. {
  373. struct psb_intel_encoder *psb_intel_encoder =
  374. psb_intel_attached_encoder(connector);
  375. if (psb_intel_encoder->i2c_bus)
  376. psb_intel_i2c_destroy(psb_intel_encoder->i2c_bus);
  377. drm_sysfs_connector_remove(connector);
  378. drm_connector_cleanup(connector);
  379. kfree(connector);
  380. }
  381. int cdv_intel_lvds_set_property(struct drm_connector *connector,
  382. struct drm_property *property,
  383. uint64_t value)
  384. {
  385. struct drm_encoder *encoder = connector->encoder;
  386. if (!strcmp(property->name, "scaling mode") && encoder) {
  387. struct psb_intel_crtc *crtc =
  388. to_psb_intel_crtc(encoder->crtc);
  389. uint64_t curValue;
  390. if (!crtc)
  391. return -1;
  392. switch (value) {
  393. case DRM_MODE_SCALE_FULLSCREEN:
  394. break;
  395. case DRM_MODE_SCALE_NO_SCALE:
  396. break;
  397. case DRM_MODE_SCALE_ASPECT:
  398. break;
  399. default:
  400. return -1;
  401. }
  402. if (drm_connector_property_get_value(connector,
  403. property,
  404. &curValue))
  405. return -1;
  406. if (curValue == value)
  407. return 0;
  408. if (drm_connector_property_set_value(connector,
  409. property,
  410. value))
  411. return -1;
  412. if (crtc->saved_mode.hdisplay != 0 &&
  413. crtc->saved_mode.vdisplay != 0) {
  414. if (!drm_crtc_helper_set_mode(encoder->crtc,
  415. &crtc->saved_mode,
  416. encoder->crtc->x,
  417. encoder->crtc->y,
  418. encoder->crtc->fb))
  419. return -1;
  420. }
  421. } else if (!strcmp(property->name, "backlight") && encoder) {
  422. if (drm_connector_property_set_value(connector,
  423. property,
  424. value))
  425. return -1;
  426. else {
  427. #ifdef CONFIG_BACKLIGHT_CLASS_DEVICE
  428. struct drm_psb_private *dev_priv =
  429. encoder->dev->dev_private;
  430. struct backlight_device *bd =
  431. dev_priv->backlight_device;
  432. bd->props.brightness = value;
  433. backlight_update_status(bd);
  434. #endif
  435. }
  436. } else if (!strcmp(property->name, "DPMS") && encoder) {
  437. struct drm_encoder_helper_funcs *helpers =
  438. encoder->helper_private;
  439. helpers->dpms(encoder, value);
  440. }
  441. return 0;
  442. }
  443. static const struct drm_encoder_helper_funcs
  444. cdv_intel_lvds_helper_funcs = {
  445. .dpms = cdv_intel_lvds_encoder_dpms,
  446. .mode_fixup = cdv_intel_lvds_mode_fixup,
  447. .prepare = cdv_intel_lvds_prepare,
  448. .mode_set = cdv_intel_lvds_mode_set,
  449. .commit = cdv_intel_lvds_commit,
  450. };
  451. static const struct drm_connector_helper_funcs
  452. cdv_intel_lvds_connector_helper_funcs = {
  453. .get_modes = cdv_intel_lvds_get_modes,
  454. .mode_valid = cdv_intel_lvds_mode_valid,
  455. .best_encoder = psb_intel_best_encoder,
  456. };
  457. static const struct drm_connector_funcs cdv_intel_lvds_connector_funcs = {
  458. .dpms = drm_helper_connector_dpms,
  459. .save = cdv_intel_lvds_save,
  460. .restore = cdv_intel_lvds_restore,
  461. .detect = cdv_intel_lvds_detect,
  462. .fill_modes = drm_helper_probe_single_connector_modes,
  463. .set_property = cdv_intel_lvds_set_property,
  464. .destroy = cdv_intel_lvds_destroy,
  465. };
  466. static void cdv_intel_lvds_enc_destroy(struct drm_encoder *encoder)
  467. {
  468. drm_encoder_cleanup(encoder);
  469. }
  470. const struct drm_encoder_funcs cdv_intel_lvds_enc_funcs = {
  471. .destroy = cdv_intel_lvds_enc_destroy,
  472. };
  473. /**
  474. * cdv_intel_lvds_init - setup LVDS connectors on this device
  475. * @dev: drm device
  476. *
  477. * Create the connector, register the LVDS DDC bus, and try to figure out what
  478. * modes we can display on the LVDS panel (if present).
  479. */
  480. void cdv_intel_lvds_init(struct drm_device *dev,
  481. struct psb_intel_mode_device *mode_dev)
  482. {
  483. struct psb_intel_encoder *psb_intel_encoder;
  484. struct psb_intel_connector *psb_intel_connector;
  485. struct cdv_intel_lvds_priv *lvds_priv;
  486. struct drm_connector *connector;
  487. struct drm_encoder *encoder;
  488. struct drm_display_mode *scan;
  489. struct drm_crtc *crtc;
  490. struct drm_psb_private *dev_priv = dev->dev_private;
  491. u32 lvds;
  492. int pipe;
  493. psb_intel_encoder = kzalloc(sizeof(struct psb_intel_encoder),
  494. GFP_KERNEL);
  495. if (!psb_intel_encoder)
  496. return;
  497. psb_intel_connector = kzalloc(sizeof(struct psb_intel_connector),
  498. GFP_KERNEL);
  499. if (!psb_intel_connector)
  500. goto failed_connector;
  501. lvds_priv = kzalloc(sizeof(struct cdv_intel_lvds_priv), GFP_KERNEL);
  502. if (!lvds_priv)
  503. goto failed_lvds_priv;
  504. psb_intel_encoder->dev_priv = lvds_priv;
  505. connector = &psb_intel_connector->base;
  506. encoder = &psb_intel_encoder->base;
  507. drm_connector_init(dev, connector,
  508. &cdv_intel_lvds_connector_funcs,
  509. DRM_MODE_CONNECTOR_LVDS);
  510. drm_encoder_init(dev, encoder,
  511. &cdv_intel_lvds_enc_funcs,
  512. DRM_MODE_ENCODER_LVDS);
  513. psb_intel_connector_attach_encoder(psb_intel_connector,
  514. psb_intel_encoder);
  515. psb_intel_encoder->type = INTEL_OUTPUT_LVDS;
  516. drm_encoder_helper_add(encoder, &cdv_intel_lvds_helper_funcs);
  517. drm_connector_helper_add(connector,
  518. &cdv_intel_lvds_connector_helper_funcs);
  519. connector->display_info.subpixel_order = SubPixelHorizontalRGB;
  520. connector->interlace_allowed = false;
  521. connector->doublescan_allowed = false;
  522. /*Attach connector properties*/
  523. drm_connector_attach_property(connector,
  524. dev->mode_config.scaling_mode_property,
  525. DRM_MODE_SCALE_FULLSCREEN);
  526. drm_connector_attach_property(connector,
  527. dev_priv->backlight_property,
  528. BRIGHTNESS_MAX_LEVEL);
  529. /**
  530. * Set up I2C bus
  531. * FIXME: distroy i2c_bus when exit
  532. */
  533. psb_intel_encoder->i2c_bus = psb_intel_i2c_create(dev,
  534. GPIOB,
  535. "LVDSBLC_B");
  536. if (!psb_intel_encoder->i2c_bus) {
  537. dev_printk(KERN_ERR,
  538. &dev->pdev->dev, "I2C bus registration failed.\n");
  539. goto failed_blc_i2c;
  540. }
  541. psb_intel_encoder->i2c_bus->slave_addr = 0x2C;
  542. dev_priv->lvds_i2c_bus = psb_intel_encoder->i2c_bus;
  543. /*
  544. * LVDS discovery:
  545. * 1) check for EDID on DDC
  546. * 2) check for VBT data
  547. * 3) check to see if LVDS is already on
  548. * if none of the above, no panel
  549. * 4) make sure lid is open
  550. * if closed, act like it's not there for now
  551. */
  552. /* Set up the DDC bus. */
  553. psb_intel_encoder->ddc_bus = psb_intel_i2c_create(dev,
  554. GPIOC,
  555. "LVDSDDC_C");
  556. if (!psb_intel_encoder->ddc_bus) {
  557. dev_printk(KERN_ERR, &dev->pdev->dev,
  558. "DDC bus registration " "failed.\n");
  559. goto failed_ddc;
  560. }
  561. /*
  562. * Attempt to get the fixed panel mode from DDC. Assume that the
  563. * preferred mode is the right one.
  564. */
  565. psb_intel_ddc_get_modes(connector,
  566. &psb_intel_encoder->ddc_bus->adapter);
  567. list_for_each_entry(scan, &connector->probed_modes, head) {
  568. if (scan->type & DRM_MODE_TYPE_PREFERRED) {
  569. mode_dev->panel_fixed_mode =
  570. drm_mode_duplicate(dev, scan);
  571. goto out; /* FIXME: check for quirks */
  572. }
  573. }
  574. /* Failed to get EDID, what about VBT? do we need this?*/
  575. if (dev_priv->lfp_lvds_vbt_mode) {
  576. mode_dev->panel_fixed_mode =
  577. drm_mode_duplicate(dev, dev_priv->lfp_lvds_vbt_mode);
  578. if (mode_dev->panel_fixed_mode) {
  579. mode_dev->panel_fixed_mode->type |=
  580. DRM_MODE_TYPE_PREFERRED;
  581. goto out; /* FIXME: check for quirks */
  582. }
  583. }
  584. /*
  585. * If we didn't get EDID, try checking if the panel is already turned
  586. * on. If so, assume that whatever is currently programmed is the
  587. * correct mode.
  588. */
  589. lvds = REG_READ(LVDS);
  590. pipe = (lvds & LVDS_PIPEB_SELECT) ? 1 : 0;
  591. crtc = psb_intel_get_crtc_from_pipe(dev, pipe);
  592. if (crtc && (lvds & LVDS_PORT_EN)) {
  593. mode_dev->panel_fixed_mode =
  594. cdv_intel_crtc_mode_get(dev, crtc);
  595. if (mode_dev->panel_fixed_mode) {
  596. mode_dev->panel_fixed_mode->type |=
  597. DRM_MODE_TYPE_PREFERRED;
  598. goto out; /* FIXME: check for quirks */
  599. }
  600. }
  601. /* If we still don't have a mode after all that, give up. */
  602. if (!mode_dev->panel_fixed_mode) {
  603. DRM_DEBUG
  604. ("Found no modes on the lvds, ignoring the LVDS\n");
  605. goto failed_find;
  606. }
  607. out:
  608. drm_sysfs_connector_add(connector);
  609. return;
  610. failed_find:
  611. printk(KERN_ERR "Failed find\n");
  612. if (psb_intel_encoder->ddc_bus)
  613. psb_intel_i2c_destroy(psb_intel_encoder->ddc_bus);
  614. failed_ddc:
  615. printk(KERN_ERR "Failed DDC\n");
  616. if (psb_intel_encoder->i2c_bus)
  617. psb_intel_i2c_destroy(psb_intel_encoder->i2c_bus);
  618. failed_blc_i2c:
  619. printk(KERN_ERR "Failed BLC\n");
  620. drm_encoder_cleanup(encoder);
  621. drm_connector_cleanup(connector);
  622. kfree(lvds_priv);
  623. failed_lvds_priv:
  624. kfree(psb_intel_connector);
  625. failed_connector:
  626. kfree(psb_intel_encoder);
  627. }