cm_bf527.c 22 KB

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  1. /*
  2. * Copyright 2004-2009 Analog Devices Inc.
  3. * 2008-2009 Bluetechnix
  4. * 2005 National ICT Australia (NICTA)
  5. * Aidan Williams <aidan@nicta.com.au>
  6. *
  7. * Licensed under the GPL-2 or later.
  8. */
  9. #include <linux/device.h>
  10. #include <linux/export.h>
  11. #include <linux/platform_device.h>
  12. #include <linux/mtd/mtd.h>
  13. #include <linux/mtd/partitions.h>
  14. #include <linux/mtd/physmap.h>
  15. #include <linux/spi/spi.h>
  16. #include <linux/spi/flash.h>
  17. #include <linux/etherdevice.h>
  18. #include <linux/i2c.h>
  19. #include <linux/irq.h>
  20. #include <linux/interrupt.h>
  21. #include <linux/usb/musb.h>
  22. #include <asm/dma.h>
  23. #include <asm/bfin5xx_spi.h>
  24. #include <asm/reboot.h>
  25. #include <asm/nand.h>
  26. #include <asm/portmux.h>
  27. #include <asm/dpmc.h>
  28. #include <linux/spi/ad7877.h>
  29. /*
  30. * Name the Board for the /proc/cpuinfo
  31. */
  32. const char bfin_board_name[] = "Bluetechnix CM-BF527";
  33. /*
  34. * Driver needs to know address, irq and flag pin.
  35. */
  36. #if defined(CONFIG_USB_ISP1760_HCD) || defined(CONFIG_USB_ISP1760_HCD_MODULE)
  37. #include <linux/usb/isp1760.h>
  38. static struct resource bfin_isp1760_resources[] = {
  39. [0] = {
  40. .start = 0x203C0000,
  41. .end = 0x203C0000 + 0x000fffff,
  42. .flags = IORESOURCE_MEM,
  43. },
  44. [1] = {
  45. .start = IRQ_PF7,
  46. .end = IRQ_PF7,
  47. .flags = IORESOURCE_IRQ,
  48. },
  49. };
  50. static struct isp1760_platform_data isp1760_priv = {
  51. .is_isp1761 = 0,
  52. .bus_width_16 = 1,
  53. .port1_otg = 0,
  54. .analog_oc = 0,
  55. .dack_polarity_high = 0,
  56. .dreq_polarity_high = 0,
  57. };
  58. static struct platform_device bfin_isp1760_device = {
  59. .name = "isp1760",
  60. .id = 0,
  61. .dev = {
  62. .platform_data = &isp1760_priv,
  63. },
  64. .num_resources = ARRAY_SIZE(bfin_isp1760_resources),
  65. .resource = bfin_isp1760_resources,
  66. };
  67. #endif
  68. #if defined(CONFIG_USB_MUSB_HDRC) || defined(CONFIG_USB_MUSB_HDRC_MODULE)
  69. static struct resource musb_resources[] = {
  70. [0] = {
  71. .start = 0xffc03800,
  72. .end = 0xffc03cff,
  73. .flags = IORESOURCE_MEM,
  74. },
  75. [1] = { /* general IRQ */
  76. .start = IRQ_USB_INT0,
  77. .end = IRQ_USB_INT0,
  78. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  79. .name = "mc"
  80. },
  81. [2] = { /* DMA IRQ */
  82. .start = IRQ_USB_DMA,
  83. .end = IRQ_USB_DMA,
  84. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  85. .name = "dma"
  86. },
  87. };
  88. static struct musb_hdrc_config musb_config = {
  89. .multipoint = 0,
  90. .dyn_fifo = 0,
  91. .soft_con = 1,
  92. .dma = 1,
  93. .num_eps = 8,
  94. .dma_channels = 8,
  95. .gpio_vrsel = GPIO_PF11,
  96. /* Some custom boards need to be active low, just set it to "0"
  97. * if it is the case.
  98. */
  99. .gpio_vrsel_active = 1,
  100. .clkin = 24, /* musb CLKIN in MHZ */
  101. };
  102. static struct musb_hdrc_platform_data musb_plat = {
  103. #if defined(CONFIG_USB_MUSB_OTG)
  104. .mode = MUSB_OTG,
  105. #elif defined(CONFIG_USB_MUSB_HDRC_HCD)
  106. .mode = MUSB_HOST,
  107. #elif defined(CONFIG_USB_GADGET_MUSB_HDRC)
  108. .mode = MUSB_PERIPHERAL,
  109. #endif
  110. .config = &musb_config,
  111. };
  112. static u64 musb_dmamask = ~(u32)0;
  113. static struct platform_device musb_device = {
  114. .name = "musb-blackfin",
  115. .id = 0,
  116. .dev = {
  117. .dma_mask = &musb_dmamask,
  118. .coherent_dma_mask = 0xffffffff,
  119. .platform_data = &musb_plat,
  120. },
  121. .num_resources = ARRAY_SIZE(musb_resources),
  122. .resource = musb_resources,
  123. };
  124. #endif
  125. #if defined(CONFIG_MTD_NAND_BF5XX) || defined(CONFIG_MTD_NAND_BF5XX_MODULE)
  126. static struct mtd_partition partition_info[] = {
  127. {
  128. .name = "linux kernel(nand)",
  129. .offset = 0,
  130. .size = 4 * 1024 * 1024,
  131. },
  132. {
  133. .name = "file system(nand)",
  134. .offset = MTDPART_OFS_APPEND,
  135. .size = MTDPART_SIZ_FULL,
  136. },
  137. };
  138. static struct bf5xx_nand_platform bf5xx_nand_platform = {
  139. .data_width = NFC_NWIDTH_8,
  140. .partitions = partition_info,
  141. .nr_partitions = ARRAY_SIZE(partition_info),
  142. .rd_dly = 3,
  143. .wr_dly = 3,
  144. };
  145. static struct resource bf5xx_nand_resources[] = {
  146. {
  147. .start = NFC_CTL,
  148. .end = NFC_DATA_RD + 2,
  149. .flags = IORESOURCE_MEM,
  150. },
  151. {
  152. .start = CH_NFC,
  153. .end = CH_NFC,
  154. .flags = IORESOURCE_IRQ,
  155. },
  156. };
  157. static struct platform_device bf5xx_nand_device = {
  158. .name = "bf5xx-nand",
  159. .id = 0,
  160. .num_resources = ARRAY_SIZE(bf5xx_nand_resources),
  161. .resource = bf5xx_nand_resources,
  162. .dev = {
  163. .platform_data = &bf5xx_nand_platform,
  164. },
  165. };
  166. #endif
  167. #if defined(CONFIG_BFIN_CFPCMCIA) || defined(CONFIG_BFIN_CFPCMCIA_MODULE)
  168. static struct resource bfin_pcmcia_cf_resources[] = {
  169. {
  170. .start = 0x20310000, /* IO PORT */
  171. .end = 0x20312000,
  172. .flags = IORESOURCE_MEM,
  173. }, {
  174. .start = 0x20311000, /* Attribute Memory */
  175. .end = 0x20311FFF,
  176. .flags = IORESOURCE_MEM,
  177. }, {
  178. .start = IRQ_PF4,
  179. .end = IRQ_PF4,
  180. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL,
  181. }, {
  182. .start = 6, /* Card Detect PF6 */
  183. .end = 6,
  184. .flags = IORESOURCE_IRQ,
  185. },
  186. };
  187. static struct platform_device bfin_pcmcia_cf_device = {
  188. .name = "bfin_cf_pcmcia",
  189. .id = -1,
  190. .num_resources = ARRAY_SIZE(bfin_pcmcia_cf_resources),
  191. .resource = bfin_pcmcia_cf_resources,
  192. };
  193. #endif
  194. #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
  195. static struct platform_device rtc_device = {
  196. .name = "rtc-bfin",
  197. .id = -1,
  198. };
  199. #endif
  200. #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
  201. #include <linux/smc91x.h>
  202. static struct smc91x_platdata smc91x_info = {
  203. .flags = SMC91X_USE_16BIT | SMC91X_NOWAIT,
  204. .leda = RPC_LED_100_10,
  205. .ledb = RPC_LED_TX_RX,
  206. };
  207. static struct resource smc91x_resources[] = {
  208. {
  209. .name = "smc91x-regs",
  210. .start = 0x20300300,
  211. .end = 0x20300300 + 16,
  212. .flags = IORESOURCE_MEM,
  213. }, {
  214. .start = IRQ_PF7,
  215. .end = IRQ_PF7,
  216. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  217. },
  218. };
  219. static struct platform_device smc91x_device = {
  220. .name = "smc91x",
  221. .id = 0,
  222. .num_resources = ARRAY_SIZE(smc91x_resources),
  223. .resource = smc91x_resources,
  224. .dev = {
  225. .platform_data = &smc91x_info,
  226. },
  227. };
  228. #endif
  229. #if defined(CONFIG_DM9000) || defined(CONFIG_DM9000_MODULE)
  230. static struct resource dm9000_resources[] = {
  231. [0] = {
  232. .start = 0x203FB800,
  233. .end = 0x203FB800 + 1,
  234. .flags = IORESOURCE_MEM,
  235. },
  236. [1] = {
  237. .start = 0x203FB804,
  238. .end = 0x203FB804 + 1,
  239. .flags = IORESOURCE_MEM,
  240. },
  241. [2] = {
  242. .start = IRQ_PF9,
  243. .end = IRQ_PF9,
  244. .flags = (IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE),
  245. },
  246. };
  247. static struct platform_device dm9000_device = {
  248. .name = "dm9000",
  249. .id = -1,
  250. .num_resources = ARRAY_SIZE(dm9000_resources),
  251. .resource = dm9000_resources,
  252. };
  253. #endif
  254. #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
  255. #include <linux/bfin_mac.h>
  256. static const unsigned short bfin_mac_peripherals[] = P_RMII0;
  257. static struct bfin_phydev_platform_data bfin_phydev_data[] = {
  258. {
  259. .addr = 1,
  260. .irq = IRQ_MAC_PHYINT,
  261. },
  262. };
  263. static struct bfin_mii_bus_platform_data bfin_mii_bus_data = {
  264. .phydev_number = 1,
  265. .phydev_data = bfin_phydev_data,
  266. .phy_mode = PHY_INTERFACE_MODE_RMII,
  267. .mac_peripherals = bfin_mac_peripherals,
  268. };
  269. static struct platform_device bfin_mii_bus = {
  270. .name = "bfin_mii_bus",
  271. .dev = {
  272. .platform_data = &bfin_mii_bus_data,
  273. }
  274. };
  275. static struct platform_device bfin_mac_device = {
  276. .name = "bfin_mac",
  277. .dev = {
  278. .platform_data = &bfin_mii_bus,
  279. }
  280. };
  281. #endif
  282. #if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
  283. static struct resource net2272_bfin_resources[] = {
  284. {
  285. .start = 0x20300000,
  286. .end = 0x20300000 + 0x100,
  287. .flags = IORESOURCE_MEM,
  288. }, {
  289. .start = IRQ_PF7,
  290. .end = IRQ_PF7,
  291. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  292. },
  293. };
  294. static struct platform_device net2272_bfin_device = {
  295. .name = "net2272",
  296. .id = -1,
  297. .num_resources = ARRAY_SIZE(net2272_bfin_resources),
  298. .resource = net2272_bfin_resources,
  299. };
  300. #endif
  301. #if defined(CONFIG_MTD_M25P80) \
  302. || defined(CONFIG_MTD_M25P80_MODULE)
  303. static struct mtd_partition bfin_spi_flash_partitions[] = {
  304. {
  305. .name = "bootloader(spi)",
  306. .size = 0x00040000,
  307. .offset = 0,
  308. .mask_flags = MTD_CAP_ROM
  309. }, {
  310. .name = "linux kernel(spi)",
  311. .size = MTDPART_SIZ_FULL,
  312. .offset = MTDPART_OFS_APPEND,
  313. }
  314. };
  315. static struct flash_platform_data bfin_spi_flash_data = {
  316. .name = "m25p80",
  317. .parts = bfin_spi_flash_partitions,
  318. .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
  319. .type = "m25p16",
  320. };
  321. /* SPI flash chip (m25p64) */
  322. static struct bfin5xx_spi_chip spi_flash_chip_info = {
  323. .enable_dma = 0, /* use dma transfer with this chip*/
  324. };
  325. #endif
  326. #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
  327. static struct bfin5xx_spi_chip mmc_spi_chip_info = {
  328. .enable_dma = 0,
  329. };
  330. #endif
  331. #if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
  332. static const struct ad7877_platform_data bfin_ad7877_ts_info = {
  333. .model = 7877,
  334. .vref_delay_usecs = 50, /* internal, no capacitor */
  335. .x_plate_ohms = 419,
  336. .y_plate_ohms = 486,
  337. .pressure_max = 1000,
  338. .pressure_min = 0,
  339. .stopacq_polarity = 1,
  340. .first_conversion_delay = 3,
  341. .acquisition_time = 1,
  342. .averaging = 1,
  343. .pen_down_acc_interval = 1,
  344. };
  345. #endif
  346. static struct spi_board_info bfin_spi_board_info[] __initdata = {
  347. #if defined(CONFIG_MTD_M25P80) \
  348. || defined(CONFIG_MTD_M25P80_MODULE)
  349. {
  350. /* the modalias must be the same as spi device driver name */
  351. .modalias = "m25p80", /* Name of spi_driver for this device */
  352. .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
  353. .bus_num = 0, /* Framework bus number */
  354. .chip_select = 1, /* Framework chip select. On STAMP537 it is SPISSEL1*/
  355. .platform_data = &bfin_spi_flash_data,
  356. .controller_data = &spi_flash_chip_info,
  357. .mode = SPI_MODE_3,
  358. },
  359. #endif
  360. #if defined(CONFIG_SND_BF5XX_SOC_AD183X) \
  361. || defined(CONFIG_SND_BF5XX_SOC_AD183X_MODULE)
  362. {
  363. .modalias = "ad183x",
  364. .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
  365. .bus_num = 0,
  366. .chip_select = 4,
  367. },
  368. #endif
  369. #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
  370. {
  371. .modalias = "mmc_spi",
  372. .max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */
  373. .bus_num = 0,
  374. .chip_select = 5,
  375. .controller_data = &mmc_spi_chip_info,
  376. .mode = SPI_MODE_3,
  377. },
  378. #endif
  379. #if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
  380. {
  381. .modalias = "ad7877",
  382. .platform_data = &bfin_ad7877_ts_info,
  383. .irq = IRQ_PF8,
  384. .max_speed_hz = 12500000, /* max spi clock (SCK) speed in HZ */
  385. .bus_num = 0,
  386. .chip_select = 2,
  387. },
  388. #endif
  389. #if defined(CONFIG_SND_SOC_WM8731) || defined(CONFIG_SND_SOC_WM8731_MODULE) \
  390. && defined(CONFIG_SND_SOC_WM8731_SPI)
  391. {
  392. .modalias = "wm8731",
  393. .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
  394. .bus_num = 0,
  395. .chip_select = 5,
  396. .mode = SPI_MODE_0,
  397. },
  398. #endif
  399. #if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
  400. {
  401. .modalias = "spidev",
  402. .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
  403. .bus_num = 0,
  404. .chip_select = 1,
  405. },
  406. #endif
  407. };
  408. #if defined(CONFIG_SPI_BFIN5XX) || defined(CONFIG_SPI_BFIN5XX_MODULE)
  409. /* SPI controller data */
  410. static struct bfin5xx_spi_master bfin_spi0_info = {
  411. .num_chipselect = 8,
  412. .enable_dma = 1, /* master has the ability to do dma transfer */
  413. .pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
  414. };
  415. /* SPI (0) */
  416. static struct resource bfin_spi0_resource[] = {
  417. [0] = {
  418. .start = SPI0_REGBASE,
  419. .end = SPI0_REGBASE + 0xFF,
  420. .flags = IORESOURCE_MEM,
  421. },
  422. [1] = {
  423. .start = CH_SPI,
  424. .end = CH_SPI,
  425. .flags = IORESOURCE_DMA,
  426. },
  427. [2] = {
  428. .start = IRQ_SPI,
  429. .end = IRQ_SPI,
  430. .flags = IORESOURCE_IRQ,
  431. },
  432. };
  433. static struct platform_device bfin_spi0_device = {
  434. .name = "bfin-spi",
  435. .id = 0, /* Bus number */
  436. .num_resources = ARRAY_SIZE(bfin_spi0_resource),
  437. .resource = bfin_spi0_resource,
  438. .dev = {
  439. .platform_data = &bfin_spi0_info, /* Passed to driver */
  440. },
  441. };
  442. #endif /* spi master and devices */
  443. #if defined(CONFIG_MTD_GPIO_ADDR) || defined(CONFIG_MTD_GPIO_ADDR_MODULE)
  444. static struct mtd_partition cm_partitions[] = {
  445. {
  446. .name = "bootloader(nor)",
  447. .size = 0x40000,
  448. .offset = 0,
  449. }, {
  450. .name = "linux kernel(nor)",
  451. .size = 0x100000,
  452. .offset = MTDPART_OFS_APPEND,
  453. }, {
  454. .name = "file system(nor)",
  455. .size = MTDPART_SIZ_FULL,
  456. .offset = MTDPART_OFS_APPEND,
  457. }
  458. };
  459. static struct physmap_flash_data cm_flash_data = {
  460. .width = 2,
  461. .parts = cm_partitions,
  462. .nr_parts = ARRAY_SIZE(cm_partitions),
  463. };
  464. static unsigned cm_flash_gpios[] = { GPIO_PH9, GPIO_PG11 };
  465. static struct resource cm_flash_resource[] = {
  466. {
  467. .name = "cfi_probe",
  468. .start = 0x20000000,
  469. .end = 0x201fffff,
  470. .flags = IORESOURCE_MEM,
  471. }, {
  472. .start = (unsigned long)cm_flash_gpios,
  473. .end = ARRAY_SIZE(cm_flash_gpios),
  474. .flags = IORESOURCE_IRQ,
  475. }
  476. };
  477. static struct platform_device cm_flash_device = {
  478. .name = "gpio-addr-flash",
  479. .id = 0,
  480. .dev = {
  481. .platform_data = &cm_flash_data,
  482. },
  483. .num_resources = ARRAY_SIZE(cm_flash_resource),
  484. .resource = cm_flash_resource,
  485. };
  486. #endif
  487. #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
  488. #ifdef CONFIG_SERIAL_BFIN_UART0
  489. static struct resource bfin_uart0_resources[] = {
  490. {
  491. .start = UART0_THR,
  492. .end = UART0_GCTL+2,
  493. .flags = IORESOURCE_MEM,
  494. },
  495. {
  496. .start = IRQ_UART0_TX,
  497. .end = IRQ_UART0_TX,
  498. .flags = IORESOURCE_IRQ,
  499. },
  500. {
  501. .start = IRQ_UART0_RX,
  502. .end = IRQ_UART0_RX,
  503. .flags = IORESOURCE_IRQ,
  504. },
  505. {
  506. .start = IRQ_UART0_ERROR,
  507. .end = IRQ_UART0_ERROR,
  508. .flags = IORESOURCE_IRQ,
  509. },
  510. {
  511. .start = CH_UART0_TX,
  512. .end = CH_UART0_TX,
  513. .flags = IORESOURCE_DMA,
  514. },
  515. {
  516. .start = CH_UART0_RX,
  517. .end = CH_UART0_RX,
  518. .flags = IORESOURCE_DMA,
  519. },
  520. };
  521. static unsigned short bfin_uart0_peripherals[] = {
  522. P_UART0_TX, P_UART0_RX, 0
  523. };
  524. static struct platform_device bfin_uart0_device = {
  525. .name = "bfin-uart",
  526. .id = 0,
  527. .num_resources = ARRAY_SIZE(bfin_uart0_resources),
  528. .resource = bfin_uart0_resources,
  529. .dev = {
  530. .platform_data = &bfin_uart0_peripherals, /* Passed to driver */
  531. },
  532. };
  533. #endif
  534. #ifdef CONFIG_SERIAL_BFIN_UART1
  535. static struct resource bfin_uart1_resources[] = {
  536. {
  537. .start = UART1_THR,
  538. .end = UART1_GCTL+2,
  539. .flags = IORESOURCE_MEM,
  540. },
  541. {
  542. .start = IRQ_UART1_TX,
  543. .end = IRQ_UART1_TX,
  544. .flags = IORESOURCE_IRQ,
  545. },
  546. {
  547. .start = IRQ_UART1_RX,
  548. .end = IRQ_UART1_RX,
  549. .flags = IORESOURCE_IRQ,
  550. },
  551. {
  552. .start = IRQ_UART1_ERROR,
  553. .end = IRQ_UART1_ERROR,
  554. .flags = IORESOURCE_IRQ,
  555. },
  556. {
  557. .start = CH_UART1_TX,
  558. .end = CH_UART1_TX,
  559. .flags = IORESOURCE_DMA,
  560. },
  561. {
  562. .start = CH_UART1_RX,
  563. .end = CH_UART1_RX,
  564. .flags = IORESOURCE_DMA,
  565. },
  566. #ifdef CONFIG_BFIN_UART1_CTSRTS
  567. { /* CTS pin */
  568. .start = GPIO_PF9,
  569. .end = GPIO_PF9,
  570. .flags = IORESOURCE_IO,
  571. },
  572. { /* RTS pin */
  573. .start = GPIO_PF10,
  574. .end = GPIO_PF10,
  575. .flags = IORESOURCE_IO,
  576. },
  577. #endif
  578. };
  579. static unsigned short bfin_uart1_peripherals[] = {
  580. P_UART1_TX, P_UART1_RX, 0
  581. };
  582. static struct platform_device bfin_uart1_device = {
  583. .name = "bfin-uart",
  584. .id = 1,
  585. .num_resources = ARRAY_SIZE(bfin_uart1_resources),
  586. .resource = bfin_uart1_resources,
  587. .dev = {
  588. .platform_data = &bfin_uart1_peripherals, /* Passed to driver */
  589. },
  590. };
  591. #endif
  592. #endif
  593. #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
  594. #ifdef CONFIG_BFIN_SIR0
  595. static struct resource bfin_sir0_resources[] = {
  596. {
  597. .start = 0xFFC00400,
  598. .end = 0xFFC004FF,
  599. .flags = IORESOURCE_MEM,
  600. },
  601. {
  602. .start = IRQ_UART0_RX,
  603. .end = IRQ_UART0_RX+1,
  604. .flags = IORESOURCE_IRQ,
  605. },
  606. {
  607. .start = CH_UART0_RX,
  608. .end = CH_UART0_RX+1,
  609. .flags = IORESOURCE_DMA,
  610. },
  611. };
  612. static struct platform_device bfin_sir0_device = {
  613. .name = "bfin_sir",
  614. .id = 0,
  615. .num_resources = ARRAY_SIZE(bfin_sir0_resources),
  616. .resource = bfin_sir0_resources,
  617. };
  618. #endif
  619. #ifdef CONFIG_BFIN_SIR1
  620. static struct resource bfin_sir1_resources[] = {
  621. {
  622. .start = 0xFFC02000,
  623. .end = 0xFFC020FF,
  624. .flags = IORESOURCE_MEM,
  625. },
  626. {
  627. .start = IRQ_UART1_RX,
  628. .end = IRQ_UART1_RX+1,
  629. .flags = IORESOURCE_IRQ,
  630. },
  631. {
  632. .start = CH_UART1_RX,
  633. .end = CH_UART1_RX+1,
  634. .flags = IORESOURCE_DMA,
  635. },
  636. };
  637. static struct platform_device bfin_sir1_device = {
  638. .name = "bfin_sir",
  639. .id = 1,
  640. .num_resources = ARRAY_SIZE(bfin_sir1_resources),
  641. .resource = bfin_sir1_resources,
  642. };
  643. #endif
  644. #endif
  645. #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
  646. static struct resource bfin_twi0_resource[] = {
  647. [0] = {
  648. .start = TWI0_REGBASE,
  649. .end = TWI0_REGBASE,
  650. .flags = IORESOURCE_MEM,
  651. },
  652. [1] = {
  653. .start = IRQ_TWI,
  654. .end = IRQ_TWI,
  655. .flags = IORESOURCE_IRQ,
  656. },
  657. };
  658. static struct platform_device i2c_bfin_twi_device = {
  659. .name = "i2c-bfin-twi",
  660. .id = 0,
  661. .num_resources = ARRAY_SIZE(bfin_twi0_resource),
  662. .resource = bfin_twi0_resource,
  663. };
  664. #endif
  665. static struct i2c_board_info __initdata bfin_i2c_board_info[] = {
  666. #if defined(CONFIG_BFIN_TWI_LCD) || defined(CONFIG_BFIN_TWI_LCD_MODULE)
  667. {
  668. I2C_BOARD_INFO("pcf8574_lcd", 0x22),
  669. },
  670. #endif
  671. #if defined(CONFIG_INPUT_PCF8574) || defined(CONFIG_INPUT_PCF8574_MODULE)
  672. {
  673. I2C_BOARD_INFO("pcf8574_keypad", 0x27),
  674. .irq = IRQ_PF8,
  675. },
  676. #endif
  677. #if defined(CONFIG_FB_BFIN_7393) || defined(CONFIG_FB_BFIN_7393_MODULE)
  678. {
  679. I2C_BOARD_INFO("bfin-adv7393", 0x2B),
  680. },
  681. #endif
  682. };
  683. #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
  684. #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
  685. static struct resource bfin_sport0_uart_resources[] = {
  686. {
  687. .start = SPORT0_TCR1,
  688. .end = SPORT0_MRCS3+4,
  689. .flags = IORESOURCE_MEM,
  690. },
  691. {
  692. .start = IRQ_SPORT0_RX,
  693. .end = IRQ_SPORT0_RX+1,
  694. .flags = IORESOURCE_IRQ,
  695. },
  696. {
  697. .start = IRQ_SPORT0_ERROR,
  698. .end = IRQ_SPORT0_ERROR,
  699. .flags = IORESOURCE_IRQ,
  700. },
  701. };
  702. static unsigned short bfin_sport0_peripherals[] = {
  703. P_SPORT0_TFS, P_SPORT0_DTPRI, P_SPORT0_TSCLK, P_SPORT0_RFS,
  704. P_SPORT0_DRPRI, P_SPORT0_RSCLK, 0
  705. };
  706. static struct platform_device bfin_sport0_uart_device = {
  707. .name = "bfin-sport-uart",
  708. .id = 0,
  709. .num_resources = ARRAY_SIZE(bfin_sport0_uart_resources),
  710. .resource = bfin_sport0_uart_resources,
  711. .dev = {
  712. .platform_data = &bfin_sport0_peripherals, /* Passed to driver */
  713. },
  714. };
  715. #endif
  716. #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
  717. static struct resource bfin_sport1_uart_resources[] = {
  718. {
  719. .start = SPORT1_TCR1,
  720. .end = SPORT1_MRCS3+4,
  721. .flags = IORESOURCE_MEM,
  722. },
  723. {
  724. .start = IRQ_SPORT1_RX,
  725. .end = IRQ_SPORT1_RX+1,
  726. .flags = IORESOURCE_IRQ,
  727. },
  728. {
  729. .start = IRQ_SPORT1_ERROR,
  730. .end = IRQ_SPORT1_ERROR,
  731. .flags = IORESOURCE_IRQ,
  732. },
  733. };
  734. static unsigned short bfin_sport1_peripherals[] = {
  735. P_SPORT1_TFS, P_SPORT1_DTPRI, P_SPORT1_TSCLK, P_SPORT1_RFS,
  736. P_SPORT1_DRPRI, P_SPORT1_RSCLK, 0
  737. };
  738. static struct platform_device bfin_sport1_uart_device = {
  739. .name = "bfin-sport-uart",
  740. .id = 1,
  741. .num_resources = ARRAY_SIZE(bfin_sport1_uart_resources),
  742. .resource = bfin_sport1_uart_resources,
  743. .dev = {
  744. .platform_data = &bfin_sport1_peripherals, /* Passed to driver */
  745. },
  746. };
  747. #endif
  748. #endif
  749. #if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
  750. #include <linux/input.h>
  751. #include <linux/gpio_keys.h>
  752. static struct gpio_keys_button bfin_gpio_keys_table[] = {
  753. {BTN_0, GPIO_PF14, 1, "gpio-keys: BTN0"},
  754. };
  755. static struct gpio_keys_platform_data bfin_gpio_keys_data = {
  756. .buttons = bfin_gpio_keys_table,
  757. .nbuttons = ARRAY_SIZE(bfin_gpio_keys_table),
  758. };
  759. static struct platform_device bfin_device_gpiokeys = {
  760. .name = "gpio-keys",
  761. .dev = {
  762. .platform_data = &bfin_gpio_keys_data,
  763. },
  764. };
  765. #endif
  766. static const unsigned int cclk_vlev_datasheet[] =
  767. {
  768. VRPAIR(VLEV_100, 400000000),
  769. VRPAIR(VLEV_105, 426000000),
  770. VRPAIR(VLEV_110, 500000000),
  771. VRPAIR(VLEV_115, 533000000),
  772. VRPAIR(VLEV_120, 600000000),
  773. };
  774. static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {
  775. .tuple_tab = cclk_vlev_datasheet,
  776. .tabsize = ARRAY_SIZE(cclk_vlev_datasheet),
  777. .vr_settling_time = 25 /* us */,
  778. };
  779. static struct platform_device bfin_dpmc = {
  780. .name = "bfin dpmc",
  781. .dev = {
  782. .platform_data = &bfin_dmpc_vreg_data,
  783. },
  784. };
  785. static struct platform_device *cmbf527_devices[] __initdata = {
  786. &bfin_dpmc,
  787. #if defined(CONFIG_MTD_NAND_BF5XX) || defined(CONFIG_MTD_NAND_BF5XX_MODULE)
  788. &bf5xx_nand_device,
  789. #endif
  790. #if defined(CONFIG_BFIN_CFPCMCIA) || defined(CONFIG_BFIN_CFPCMCIA_MODULE)
  791. &bfin_pcmcia_cf_device,
  792. #endif
  793. #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
  794. &rtc_device,
  795. #endif
  796. #if defined(CONFIG_USB_ISP1760_HCD) || defined(CONFIG_USB_ISP1760_HCD_MODULE)
  797. &bfin_isp1760_device,
  798. #endif
  799. #if defined(CONFIG_USB_MUSB_HDRC) || defined(CONFIG_USB_MUSB_HDRC_MODULE)
  800. &musb_device,
  801. #endif
  802. #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
  803. &smc91x_device,
  804. #endif
  805. #if defined(CONFIG_DM9000) || defined(CONFIG_DM9000_MODULE)
  806. &dm9000_device,
  807. #endif
  808. #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
  809. &bfin_mii_bus,
  810. &bfin_mac_device,
  811. #endif
  812. #if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
  813. &net2272_bfin_device,
  814. #endif
  815. #if defined(CONFIG_SPI_BFIN5XX) || defined(CONFIG_SPI_BFIN5XX_MODULE)
  816. &bfin_spi0_device,
  817. #endif
  818. #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
  819. #ifdef CONFIG_SERIAL_BFIN_UART0
  820. &bfin_uart0_device,
  821. #endif
  822. #ifdef CONFIG_SERIAL_BFIN_UART1
  823. &bfin_uart1_device,
  824. #endif
  825. #endif
  826. #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
  827. #ifdef CONFIG_BFIN_SIR0
  828. &bfin_sir0_device,
  829. #endif
  830. #ifdef CONFIG_BFIN_SIR1
  831. &bfin_sir1_device,
  832. #endif
  833. #endif
  834. #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
  835. &i2c_bfin_twi_device,
  836. #endif
  837. #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
  838. #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
  839. &bfin_sport0_uart_device,
  840. #endif
  841. #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
  842. &bfin_sport1_uart_device,
  843. #endif
  844. #endif
  845. #if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
  846. &bfin_device_gpiokeys,
  847. #endif
  848. #if defined(CONFIG_MTD_GPIO_ADDR) || defined(CONFIG_MTD_GPIO_ADDR_MODULE)
  849. &cm_flash_device,
  850. #endif
  851. };
  852. static int __init cm_init(void)
  853. {
  854. printk(KERN_INFO "%s(): registering device resources\n", __func__);
  855. i2c_register_board_info(0, bfin_i2c_board_info,
  856. ARRAY_SIZE(bfin_i2c_board_info));
  857. platform_add_devices(cmbf527_devices, ARRAY_SIZE(cmbf527_devices));
  858. spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info));
  859. return 0;
  860. }
  861. arch_initcall(cm_init);
  862. static struct platform_device *cmbf527_early_devices[] __initdata = {
  863. #if defined(CONFIG_SERIAL_BFIN_CONSOLE) || defined(CONFIG_EARLY_PRINTK)
  864. #ifdef CONFIG_SERIAL_BFIN_UART0
  865. &bfin_uart0_device,
  866. #endif
  867. #ifdef CONFIG_SERIAL_BFIN_UART1
  868. &bfin_uart1_device,
  869. #endif
  870. #endif
  871. #if defined(CONFIG_SERIAL_BFIN_SPORT_CONSOLE)
  872. #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
  873. &bfin_sport0_uart_device,
  874. #endif
  875. #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
  876. &bfin_sport1_uart_device,
  877. #endif
  878. #endif
  879. };
  880. void __init native_machine_early_platform_add_devices(void)
  881. {
  882. printk(KERN_INFO "register early platform devices\n");
  883. early_platform_add_devices(cmbf527_early_devices,
  884. ARRAY_SIZE(cmbf527_early_devices));
  885. }
  886. void native_machine_restart(char *cmd)
  887. {
  888. /* workaround reboot hang when booting from SPI */
  889. if ((bfin_read_SYSCR() & 0x7) == 0x3)
  890. bfin_reset_boot_spi_cs(P_DEFAULT_BOOT_SPI_CS);
  891. }
  892. void bfin_get_ether_addr(char *addr)
  893. {
  894. random_ether_addr(addr);
  895. printk(KERN_WARNING "%s:%s: Setting Ethernet MAC to a random one\n", __FILE__, __func__);
  896. }
  897. EXPORT_SYMBOL(bfin_get_ether_addr);