devs.c 38 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717718719720721722723724725726727728729730731732733734735736737738739740741742743744745746747748749750751752753754755756757758759760761762763764765766767768769770771772773774775776777778779780781782783784785786787788789790791792793794795796797798799800801802803804805806807808809810811812813814815816817818819820821822823824825826827828829830831832833834835836837838839840841842843844845846847848849850851852853854855856857858859860861862863864865866867868869870871872873874875876877878879880881882883884885886887888889890891892893894895896897898899900901902903904905906907908909910911912913914915916917918919920921922923924925926927928929930931932933934935936937938939940941942943944945946947948949950951952953954955956957958959960961962963964965966967968969970971972973974975976977978979980981982983984985986987988989990991992993994995996997998999100010011002100310041005100610071008100910101011101210131014101510161017101810191020102110221023102410251026102710281029103010311032103310341035103610371038103910401041104210431044104510461047104810491050105110521053105410551056105710581059106010611062106310641065106610671068106910701071107210731074107510761077107810791080108110821083108410851086108710881089109010911092109310941095109610971098109911001101110211031104110511061107110811091110111111121113111411151116111711181119112011211122112311241125112611271128112911301131113211331134113511361137113811391140114111421143114411451146114711481149115011511152115311541155115611571158115911601161116211631164116511661167116811691170117111721173117411751176117711781179118011811182118311841185118611871188118911901191119211931194119511961197119811991200120112021203120412051206120712081209121012111212121312141215121612171218121912201221122212231224122512261227122812291230123112321233123412351236123712381239124012411242124312441245124612471248124912501251125212531254125512561257125812591260126112621263126412651266126712681269127012711272127312741275127612771278127912801281128212831284128512861287128812891290129112921293129412951296129712981299130013011302130313041305130613071308130913101311131213131314131513161317131813191320132113221323132413251326132713281329133013311332133313341335133613371338133913401341134213431344134513461347134813491350135113521353135413551356135713581359136013611362136313641365136613671368136913701371137213731374137513761377137813791380138113821383138413851386138713881389139013911392139313941395139613971398139914001401140214031404140514061407140814091410141114121413141414151416141714181419142014211422142314241425142614271428142914301431143214331434143514361437143814391440144114421443144414451446144714481449145014511452145314541455145614571458145914601461146214631464146514661467146814691470147114721473147414751476147714781479148014811482148314841485148614871488148914901491149214931494149514961497149814991500150115021503150415051506150715081509151015111512151315141515151615171518151915201521152215231524152515261527152815291530153115321533153415351536153715381539154015411542154315441545154615471548154915501551155215531554155515561557155815591560156115621563156415651566156715681569157015711572157315741575157615771578157915801581158215831584158515861587158815891590159115921593
  1. /* linux/arch/arm/plat-samsung/devs.c
  2. *
  3. * Copyright (c) 2011 Samsung Electronics Co., Ltd.
  4. * http://www.samsung.com
  5. *
  6. * Base SAMSUNG platform device definitions
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License version 2 as
  10. * published by the Free Software Foundation.
  11. */
  12. #include <linux/kernel.h>
  13. #include <linux/types.h>
  14. #include <linux/interrupt.h>
  15. #include <linux/list.h>
  16. #include <linux/timer.h>
  17. #include <linux/init.h>
  18. #include <linux/serial_core.h>
  19. #include <linux/platform_device.h>
  20. #include <linux/io.h>
  21. #include <linux/slab.h>
  22. #include <linux/string.h>
  23. #include <linux/dma-mapping.h>
  24. #include <linux/fb.h>
  25. #include <linux/gfp.h>
  26. #include <linux/mtd/mtd.h>
  27. #include <linux/mtd/onenand.h>
  28. #include <linux/mtd/partitions.h>
  29. #include <linux/mmc/host.h>
  30. #include <linux/ioport.h>
  31. #include <linux/platform_data/s3c-hsudc.h>
  32. #include <asm/irq.h>
  33. #include <asm/pmu.h>
  34. #include <asm/mach/arch.h>
  35. #include <asm/mach/map.h>
  36. #include <asm/mach/irq.h>
  37. #include <mach/hardware.h>
  38. #include <mach/dma.h>
  39. #include <mach/irqs.h>
  40. #include <mach/map.h>
  41. #include <plat/cpu.h>
  42. #include <plat/devs.h>
  43. #include <plat/adc.h>
  44. #include <plat/ata.h>
  45. #include <plat/ehci.h>
  46. #include <plat/fb.h>
  47. #include <plat/fb-s3c2410.h>
  48. #include <plat/hwmon.h>
  49. #include <plat/iic.h>
  50. #include <plat/keypad.h>
  51. #include <plat/mci.h>
  52. #include <plat/nand.h>
  53. #include <plat/sdhci.h>
  54. #include <plat/ts.h>
  55. #include <plat/udc.h>
  56. #include <plat/usb-control.h>
  57. #include <plat/usb-phy.h>
  58. #include <plat/regs-iic.h>
  59. #include <plat/regs-serial.h>
  60. #include <plat/regs-spi.h>
  61. #include <plat/s3c64xx-spi.h>
  62. static u64 samsung_device_dma_mask = DMA_BIT_MASK(32);
  63. /* AC97 */
  64. #ifdef CONFIG_CPU_S3C2440
  65. static struct resource s3c_ac97_resource[] = {
  66. [0] = DEFINE_RES_MEM(S3C2440_PA_AC97, S3C2440_SZ_AC97),
  67. [1] = DEFINE_RES_IRQ(IRQ_S3C244X_AC97),
  68. [2] = DEFINE_RES_DMA_NAMED(DMACH_PCM_OUT, "PCM out"),
  69. [3] = DEFINE_RES_DMA_NAMED(DMACH_PCM_IN, "PCM in"),
  70. [4] = DEFINE_RES_DMA_NAMED(DMACH_MIC_IN, "Mic in"),
  71. };
  72. struct platform_device s3c_device_ac97 = {
  73. .name = "samsung-ac97",
  74. .id = -1,
  75. .num_resources = ARRAY_SIZE(s3c_ac97_resource),
  76. .resource = s3c_ac97_resource,
  77. .dev = {
  78. .dma_mask = &samsung_device_dma_mask,
  79. .coherent_dma_mask = DMA_BIT_MASK(32),
  80. }
  81. };
  82. #endif /* CONFIG_CPU_S3C2440 */
  83. /* ADC */
  84. #ifdef CONFIG_PLAT_S3C24XX
  85. static struct resource s3c_adc_resource[] = {
  86. [0] = DEFINE_RES_MEM(S3C24XX_PA_ADC, S3C24XX_SZ_ADC),
  87. [1] = DEFINE_RES_IRQ(IRQ_TC),
  88. [2] = DEFINE_RES_IRQ(IRQ_ADC),
  89. };
  90. struct platform_device s3c_device_adc = {
  91. .name = "s3c24xx-adc",
  92. .id = -1,
  93. .num_resources = ARRAY_SIZE(s3c_adc_resource),
  94. .resource = s3c_adc_resource,
  95. };
  96. #endif /* CONFIG_PLAT_S3C24XX */
  97. #if defined(CONFIG_SAMSUNG_DEV_ADC)
  98. static struct resource s3c_adc_resource[] = {
  99. [0] = DEFINE_RES_MEM(SAMSUNG_PA_ADC, SZ_256),
  100. [1] = DEFINE_RES_IRQ(IRQ_TC),
  101. [2] = DEFINE_RES_IRQ(IRQ_ADC),
  102. };
  103. struct platform_device s3c_device_adc = {
  104. .name = "samsung-adc",
  105. .id = -1,
  106. .num_resources = ARRAY_SIZE(s3c_adc_resource),
  107. .resource = s3c_adc_resource,
  108. };
  109. #endif /* CONFIG_SAMSUNG_DEV_ADC */
  110. /* Camif Controller */
  111. #ifdef CONFIG_CPU_S3C2440
  112. static struct resource s3c_camif_resource[] = {
  113. [0] = DEFINE_RES_MEM(S3C2440_PA_CAMIF, S3C2440_SZ_CAMIF),
  114. [1] = DEFINE_RES_IRQ(IRQ_CAM),
  115. };
  116. struct platform_device s3c_device_camif = {
  117. .name = "s3c2440-camif",
  118. .id = -1,
  119. .num_resources = ARRAY_SIZE(s3c_camif_resource),
  120. .resource = s3c_camif_resource,
  121. .dev = {
  122. .dma_mask = &samsung_device_dma_mask,
  123. .coherent_dma_mask = DMA_BIT_MASK(32),
  124. }
  125. };
  126. #endif /* CONFIG_CPU_S3C2440 */
  127. /* ASOC DMA */
  128. struct platform_device samsung_asoc_dma = {
  129. .name = "samsung-audio",
  130. .id = -1,
  131. .dev = {
  132. .dma_mask = &samsung_device_dma_mask,
  133. .coherent_dma_mask = DMA_BIT_MASK(32),
  134. }
  135. };
  136. struct platform_device samsung_asoc_idma = {
  137. .name = "samsung-idma",
  138. .id = -1,
  139. .dev = {
  140. .dma_mask = &samsung_device_dma_mask,
  141. .coherent_dma_mask = DMA_BIT_MASK(32),
  142. }
  143. };
  144. /* FB */
  145. #ifdef CONFIG_S3C_DEV_FB
  146. static struct resource s3c_fb_resource[] = {
  147. [0] = DEFINE_RES_MEM(S3C_PA_FB, SZ_16K),
  148. [1] = DEFINE_RES_IRQ(IRQ_LCD_VSYNC),
  149. [2] = DEFINE_RES_IRQ(IRQ_LCD_FIFO),
  150. [3] = DEFINE_RES_IRQ(IRQ_LCD_SYSTEM),
  151. };
  152. struct platform_device s3c_device_fb = {
  153. .name = "s3c-fb",
  154. .id = -1,
  155. .num_resources = ARRAY_SIZE(s3c_fb_resource),
  156. .resource = s3c_fb_resource,
  157. .dev = {
  158. .dma_mask = &samsung_device_dma_mask,
  159. .coherent_dma_mask = DMA_BIT_MASK(32),
  160. },
  161. };
  162. void __init s3c_fb_set_platdata(struct s3c_fb_platdata *pd)
  163. {
  164. s3c_set_platdata(pd, sizeof(struct s3c_fb_platdata),
  165. &s3c_device_fb);
  166. }
  167. #endif /* CONFIG_S3C_DEV_FB */
  168. /* FIMC */
  169. #ifdef CONFIG_S5P_DEV_FIMC0
  170. static struct resource s5p_fimc0_resource[] = {
  171. [0] = DEFINE_RES_MEM(S5P_PA_FIMC0, SZ_4K),
  172. [1] = DEFINE_RES_IRQ(IRQ_FIMC0),
  173. };
  174. struct platform_device s5p_device_fimc0 = {
  175. .name = "s5p-fimc",
  176. .id = 0,
  177. .num_resources = ARRAY_SIZE(s5p_fimc0_resource),
  178. .resource = s5p_fimc0_resource,
  179. .dev = {
  180. .dma_mask = &samsung_device_dma_mask,
  181. .coherent_dma_mask = DMA_BIT_MASK(32),
  182. },
  183. };
  184. struct platform_device s5p_device_fimc_md = {
  185. .name = "s5p-fimc-md",
  186. .id = -1,
  187. };
  188. #endif /* CONFIG_S5P_DEV_FIMC0 */
  189. #ifdef CONFIG_S5P_DEV_FIMC1
  190. static struct resource s5p_fimc1_resource[] = {
  191. [0] = DEFINE_RES_MEM(S5P_PA_FIMC1, SZ_4K),
  192. [1] = DEFINE_RES_IRQ(IRQ_FIMC1),
  193. };
  194. struct platform_device s5p_device_fimc1 = {
  195. .name = "s5p-fimc",
  196. .id = 1,
  197. .num_resources = ARRAY_SIZE(s5p_fimc1_resource),
  198. .resource = s5p_fimc1_resource,
  199. .dev = {
  200. .dma_mask = &samsung_device_dma_mask,
  201. .coherent_dma_mask = DMA_BIT_MASK(32),
  202. },
  203. };
  204. #endif /* CONFIG_S5P_DEV_FIMC1 */
  205. #ifdef CONFIG_S5P_DEV_FIMC2
  206. static struct resource s5p_fimc2_resource[] = {
  207. [0] = DEFINE_RES_MEM(S5P_PA_FIMC2, SZ_4K),
  208. [1] = DEFINE_RES_IRQ(IRQ_FIMC2),
  209. };
  210. struct platform_device s5p_device_fimc2 = {
  211. .name = "s5p-fimc",
  212. .id = 2,
  213. .num_resources = ARRAY_SIZE(s5p_fimc2_resource),
  214. .resource = s5p_fimc2_resource,
  215. .dev = {
  216. .dma_mask = &samsung_device_dma_mask,
  217. .coherent_dma_mask = DMA_BIT_MASK(32),
  218. },
  219. };
  220. #endif /* CONFIG_S5P_DEV_FIMC2 */
  221. #ifdef CONFIG_S5P_DEV_FIMC3
  222. static struct resource s5p_fimc3_resource[] = {
  223. [0] = DEFINE_RES_MEM(S5P_PA_FIMC3, SZ_4K),
  224. [1] = DEFINE_RES_IRQ(IRQ_FIMC3),
  225. };
  226. struct platform_device s5p_device_fimc3 = {
  227. .name = "s5p-fimc",
  228. .id = 3,
  229. .num_resources = ARRAY_SIZE(s5p_fimc3_resource),
  230. .resource = s5p_fimc3_resource,
  231. .dev = {
  232. .dma_mask = &samsung_device_dma_mask,
  233. .coherent_dma_mask = DMA_BIT_MASK(32),
  234. },
  235. };
  236. #endif /* CONFIG_S5P_DEV_FIMC3 */
  237. /* FIMD0 */
  238. #ifdef CONFIG_S5P_DEV_FIMD0
  239. static struct resource s5p_fimd0_resource[] = {
  240. [0] = DEFINE_RES_MEM(S5P_PA_FIMD0, SZ_32K),
  241. [1] = DEFINE_RES_IRQ(IRQ_FIMD0_VSYNC),
  242. [2] = DEFINE_RES_IRQ(IRQ_FIMD0_FIFO),
  243. [3] = DEFINE_RES_IRQ(IRQ_FIMD0_SYSTEM),
  244. };
  245. struct platform_device s5p_device_fimd0 = {
  246. .name = "s5p-fb",
  247. .id = 0,
  248. .num_resources = ARRAY_SIZE(s5p_fimd0_resource),
  249. .resource = s5p_fimd0_resource,
  250. .dev = {
  251. .dma_mask = &samsung_device_dma_mask,
  252. .coherent_dma_mask = DMA_BIT_MASK(32),
  253. },
  254. };
  255. void __init s5p_fimd0_set_platdata(struct s3c_fb_platdata *pd)
  256. {
  257. s3c_set_platdata(pd, sizeof(struct s3c_fb_platdata),
  258. &s5p_device_fimd0);
  259. }
  260. #endif /* CONFIG_S5P_DEV_FIMD0 */
  261. /* HWMON */
  262. #ifdef CONFIG_S3C_DEV_HWMON
  263. struct platform_device s3c_device_hwmon = {
  264. .name = "s3c-hwmon",
  265. .id = -1,
  266. .dev.parent = &s3c_device_adc.dev,
  267. };
  268. void __init s3c_hwmon_set_platdata(struct s3c_hwmon_pdata *pd)
  269. {
  270. s3c_set_platdata(pd, sizeof(struct s3c_hwmon_pdata),
  271. &s3c_device_hwmon);
  272. }
  273. #endif /* CONFIG_S3C_DEV_HWMON */
  274. /* HSMMC */
  275. #ifdef CONFIG_S3C_DEV_HSMMC
  276. static struct resource s3c_hsmmc_resource[] = {
  277. [0] = DEFINE_RES_MEM(S3C_PA_HSMMC0, SZ_4K),
  278. [1] = DEFINE_RES_IRQ(IRQ_HSMMC0),
  279. };
  280. struct s3c_sdhci_platdata s3c_hsmmc0_def_platdata = {
  281. .max_width = 4,
  282. .host_caps = (MMC_CAP_4_BIT_DATA |
  283. MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED),
  284. .clk_type = S3C_SDHCI_CLK_DIV_INTERNAL,
  285. };
  286. struct platform_device s3c_device_hsmmc0 = {
  287. .name = "s3c-sdhci",
  288. .id = 0,
  289. .num_resources = ARRAY_SIZE(s3c_hsmmc_resource),
  290. .resource = s3c_hsmmc_resource,
  291. .dev = {
  292. .dma_mask = &samsung_device_dma_mask,
  293. .coherent_dma_mask = DMA_BIT_MASK(32),
  294. .platform_data = &s3c_hsmmc0_def_platdata,
  295. },
  296. };
  297. void s3c_sdhci0_set_platdata(struct s3c_sdhci_platdata *pd)
  298. {
  299. s3c_sdhci_set_platdata(pd, &s3c_hsmmc0_def_platdata);
  300. }
  301. #endif /* CONFIG_S3C_DEV_HSMMC */
  302. #ifdef CONFIG_S3C_DEV_HSMMC1
  303. static struct resource s3c_hsmmc1_resource[] = {
  304. [0] = DEFINE_RES_MEM(S3C_PA_HSMMC1, SZ_4K),
  305. [1] = DEFINE_RES_IRQ(IRQ_HSMMC1),
  306. };
  307. struct s3c_sdhci_platdata s3c_hsmmc1_def_platdata = {
  308. .max_width = 4,
  309. .host_caps = (MMC_CAP_4_BIT_DATA |
  310. MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED),
  311. .clk_type = S3C_SDHCI_CLK_DIV_INTERNAL,
  312. };
  313. struct platform_device s3c_device_hsmmc1 = {
  314. .name = "s3c-sdhci",
  315. .id = 1,
  316. .num_resources = ARRAY_SIZE(s3c_hsmmc1_resource),
  317. .resource = s3c_hsmmc1_resource,
  318. .dev = {
  319. .dma_mask = &samsung_device_dma_mask,
  320. .coherent_dma_mask = DMA_BIT_MASK(32),
  321. .platform_data = &s3c_hsmmc1_def_platdata,
  322. },
  323. };
  324. void s3c_sdhci1_set_platdata(struct s3c_sdhci_platdata *pd)
  325. {
  326. s3c_sdhci_set_platdata(pd, &s3c_hsmmc1_def_platdata);
  327. }
  328. #endif /* CONFIG_S3C_DEV_HSMMC1 */
  329. /* HSMMC2 */
  330. #ifdef CONFIG_S3C_DEV_HSMMC2
  331. static struct resource s3c_hsmmc2_resource[] = {
  332. [0] = DEFINE_RES_MEM(S3C_PA_HSMMC2, SZ_4K),
  333. [1] = DEFINE_RES_IRQ(IRQ_HSMMC2),
  334. };
  335. struct s3c_sdhci_platdata s3c_hsmmc2_def_platdata = {
  336. .max_width = 4,
  337. .host_caps = (MMC_CAP_4_BIT_DATA |
  338. MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED),
  339. .clk_type = S3C_SDHCI_CLK_DIV_INTERNAL,
  340. };
  341. struct platform_device s3c_device_hsmmc2 = {
  342. .name = "s3c-sdhci",
  343. .id = 2,
  344. .num_resources = ARRAY_SIZE(s3c_hsmmc2_resource),
  345. .resource = s3c_hsmmc2_resource,
  346. .dev = {
  347. .dma_mask = &samsung_device_dma_mask,
  348. .coherent_dma_mask = DMA_BIT_MASK(32),
  349. .platform_data = &s3c_hsmmc2_def_platdata,
  350. },
  351. };
  352. void s3c_sdhci2_set_platdata(struct s3c_sdhci_platdata *pd)
  353. {
  354. s3c_sdhci_set_platdata(pd, &s3c_hsmmc2_def_platdata);
  355. }
  356. #endif /* CONFIG_S3C_DEV_HSMMC2 */
  357. #ifdef CONFIG_S3C_DEV_HSMMC3
  358. static struct resource s3c_hsmmc3_resource[] = {
  359. [0] = DEFINE_RES_MEM(S3C_PA_HSMMC3, SZ_4K),
  360. [1] = DEFINE_RES_IRQ(IRQ_HSMMC3),
  361. };
  362. struct s3c_sdhci_platdata s3c_hsmmc3_def_platdata = {
  363. .max_width = 4,
  364. .host_caps = (MMC_CAP_4_BIT_DATA |
  365. MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED),
  366. .clk_type = S3C_SDHCI_CLK_DIV_INTERNAL,
  367. };
  368. struct platform_device s3c_device_hsmmc3 = {
  369. .name = "s3c-sdhci",
  370. .id = 3,
  371. .num_resources = ARRAY_SIZE(s3c_hsmmc3_resource),
  372. .resource = s3c_hsmmc3_resource,
  373. .dev = {
  374. .dma_mask = &samsung_device_dma_mask,
  375. .coherent_dma_mask = DMA_BIT_MASK(32),
  376. .platform_data = &s3c_hsmmc3_def_platdata,
  377. },
  378. };
  379. void s3c_sdhci3_set_platdata(struct s3c_sdhci_platdata *pd)
  380. {
  381. s3c_sdhci_set_platdata(pd, &s3c_hsmmc3_def_platdata);
  382. }
  383. #endif /* CONFIG_S3C_DEV_HSMMC3 */
  384. /* I2C */
  385. static struct resource s3c_i2c0_resource[] = {
  386. [0] = DEFINE_RES_MEM(S3C_PA_IIC, SZ_4K),
  387. [1] = DEFINE_RES_IRQ(IRQ_IIC),
  388. };
  389. struct platform_device s3c_device_i2c0 = {
  390. .name = "s3c2410-i2c",
  391. #ifdef CONFIG_S3C_DEV_I2C1
  392. .id = 0,
  393. #else
  394. .id = -1,
  395. #endif
  396. .num_resources = ARRAY_SIZE(s3c_i2c0_resource),
  397. .resource = s3c_i2c0_resource,
  398. };
  399. struct s3c2410_platform_i2c default_i2c_data __initdata = {
  400. .flags = 0,
  401. .slave_addr = 0x10,
  402. .frequency = 100*1000,
  403. .sda_delay = 100,
  404. };
  405. void __init s3c_i2c0_set_platdata(struct s3c2410_platform_i2c *pd)
  406. {
  407. struct s3c2410_platform_i2c *npd;
  408. if (!pd) {
  409. pd = &default_i2c_data;
  410. pd->bus_num = 0;
  411. }
  412. npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
  413. &s3c_device_i2c0);
  414. if (!npd->cfg_gpio)
  415. npd->cfg_gpio = s3c_i2c0_cfg_gpio;
  416. }
  417. #ifdef CONFIG_S3C_DEV_I2C1
  418. static struct resource s3c_i2c1_resource[] = {
  419. [0] = DEFINE_RES_MEM(S3C_PA_IIC1, SZ_4K),
  420. [1] = DEFINE_RES_IRQ(IRQ_IIC1),
  421. };
  422. struct platform_device s3c_device_i2c1 = {
  423. .name = "s3c2410-i2c",
  424. .id = 1,
  425. .num_resources = ARRAY_SIZE(s3c_i2c1_resource),
  426. .resource = s3c_i2c1_resource,
  427. };
  428. void __init s3c_i2c1_set_platdata(struct s3c2410_platform_i2c *pd)
  429. {
  430. struct s3c2410_platform_i2c *npd;
  431. if (!pd) {
  432. pd = &default_i2c_data;
  433. pd->bus_num = 1;
  434. }
  435. npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
  436. &s3c_device_i2c1);
  437. if (!npd->cfg_gpio)
  438. npd->cfg_gpio = s3c_i2c1_cfg_gpio;
  439. }
  440. #endif /* CONFIG_S3C_DEV_I2C1 */
  441. #ifdef CONFIG_S3C_DEV_I2C2
  442. static struct resource s3c_i2c2_resource[] = {
  443. [0] = DEFINE_RES_MEM(S3C_PA_IIC2, SZ_4K),
  444. [1] = DEFINE_RES_IRQ(IRQ_IIC2),
  445. };
  446. struct platform_device s3c_device_i2c2 = {
  447. .name = "s3c2410-i2c",
  448. .id = 2,
  449. .num_resources = ARRAY_SIZE(s3c_i2c2_resource),
  450. .resource = s3c_i2c2_resource,
  451. };
  452. void __init s3c_i2c2_set_platdata(struct s3c2410_platform_i2c *pd)
  453. {
  454. struct s3c2410_platform_i2c *npd;
  455. if (!pd) {
  456. pd = &default_i2c_data;
  457. pd->bus_num = 2;
  458. }
  459. npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
  460. &s3c_device_i2c2);
  461. if (!npd->cfg_gpio)
  462. npd->cfg_gpio = s3c_i2c2_cfg_gpio;
  463. }
  464. #endif /* CONFIG_S3C_DEV_I2C2 */
  465. #ifdef CONFIG_S3C_DEV_I2C3
  466. static struct resource s3c_i2c3_resource[] = {
  467. [0] = DEFINE_RES_MEM(S3C_PA_IIC3, SZ_4K),
  468. [1] = DEFINE_RES_IRQ(IRQ_IIC3),
  469. };
  470. struct platform_device s3c_device_i2c3 = {
  471. .name = "s3c2440-i2c",
  472. .id = 3,
  473. .num_resources = ARRAY_SIZE(s3c_i2c3_resource),
  474. .resource = s3c_i2c3_resource,
  475. };
  476. void __init s3c_i2c3_set_platdata(struct s3c2410_platform_i2c *pd)
  477. {
  478. struct s3c2410_platform_i2c *npd;
  479. if (!pd) {
  480. pd = &default_i2c_data;
  481. pd->bus_num = 3;
  482. }
  483. npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
  484. &s3c_device_i2c3);
  485. if (!npd->cfg_gpio)
  486. npd->cfg_gpio = s3c_i2c3_cfg_gpio;
  487. }
  488. #endif /*CONFIG_S3C_DEV_I2C3 */
  489. #ifdef CONFIG_S3C_DEV_I2C4
  490. static struct resource s3c_i2c4_resource[] = {
  491. [0] = DEFINE_RES_MEM(S3C_PA_IIC4, SZ_4K),
  492. [1] = DEFINE_RES_IRQ(IRQ_IIC4),
  493. };
  494. struct platform_device s3c_device_i2c4 = {
  495. .name = "s3c2440-i2c",
  496. .id = 4,
  497. .num_resources = ARRAY_SIZE(s3c_i2c4_resource),
  498. .resource = s3c_i2c4_resource,
  499. };
  500. void __init s3c_i2c4_set_platdata(struct s3c2410_platform_i2c *pd)
  501. {
  502. struct s3c2410_platform_i2c *npd;
  503. if (!pd) {
  504. pd = &default_i2c_data;
  505. pd->bus_num = 4;
  506. }
  507. npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
  508. &s3c_device_i2c4);
  509. if (!npd->cfg_gpio)
  510. npd->cfg_gpio = s3c_i2c4_cfg_gpio;
  511. }
  512. #endif /*CONFIG_S3C_DEV_I2C4 */
  513. #ifdef CONFIG_S3C_DEV_I2C5
  514. static struct resource s3c_i2c5_resource[] = {
  515. [0] = DEFINE_RES_MEM(S3C_PA_IIC5, SZ_4K),
  516. [1] = DEFINE_RES_IRQ(IRQ_IIC5),
  517. };
  518. struct platform_device s3c_device_i2c5 = {
  519. .name = "s3c2440-i2c",
  520. .id = 5,
  521. .num_resources = ARRAY_SIZE(s3c_i2c5_resource),
  522. .resource = s3c_i2c5_resource,
  523. };
  524. void __init s3c_i2c5_set_platdata(struct s3c2410_platform_i2c *pd)
  525. {
  526. struct s3c2410_platform_i2c *npd;
  527. if (!pd) {
  528. pd = &default_i2c_data;
  529. pd->bus_num = 5;
  530. }
  531. npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
  532. &s3c_device_i2c5);
  533. if (!npd->cfg_gpio)
  534. npd->cfg_gpio = s3c_i2c5_cfg_gpio;
  535. }
  536. #endif /*CONFIG_S3C_DEV_I2C5 */
  537. #ifdef CONFIG_S3C_DEV_I2C6
  538. static struct resource s3c_i2c6_resource[] = {
  539. [0] = DEFINE_RES_MEM(S3C_PA_IIC6, SZ_4K),
  540. [1] = DEFINE_RES_IRQ(IRQ_IIC6),
  541. };
  542. struct platform_device s3c_device_i2c6 = {
  543. .name = "s3c2440-i2c",
  544. .id = 6,
  545. .num_resources = ARRAY_SIZE(s3c_i2c6_resource),
  546. .resource = s3c_i2c6_resource,
  547. };
  548. void __init s3c_i2c6_set_platdata(struct s3c2410_platform_i2c *pd)
  549. {
  550. struct s3c2410_platform_i2c *npd;
  551. if (!pd) {
  552. pd = &default_i2c_data;
  553. pd->bus_num = 6;
  554. }
  555. npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
  556. &s3c_device_i2c6);
  557. if (!npd->cfg_gpio)
  558. npd->cfg_gpio = s3c_i2c6_cfg_gpio;
  559. }
  560. #endif /* CONFIG_S3C_DEV_I2C6 */
  561. #ifdef CONFIG_S3C_DEV_I2C7
  562. static struct resource s3c_i2c7_resource[] = {
  563. [0] = DEFINE_RES_MEM(S3C_PA_IIC7, SZ_4K),
  564. [1] = DEFINE_RES_IRQ(IRQ_IIC7),
  565. };
  566. struct platform_device s3c_device_i2c7 = {
  567. .name = "s3c2440-i2c",
  568. .id = 7,
  569. .num_resources = ARRAY_SIZE(s3c_i2c7_resource),
  570. .resource = s3c_i2c7_resource,
  571. };
  572. void __init s3c_i2c7_set_platdata(struct s3c2410_platform_i2c *pd)
  573. {
  574. struct s3c2410_platform_i2c *npd;
  575. if (!pd) {
  576. pd = &default_i2c_data;
  577. pd->bus_num = 7;
  578. }
  579. npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
  580. &s3c_device_i2c7);
  581. if (!npd->cfg_gpio)
  582. npd->cfg_gpio = s3c_i2c7_cfg_gpio;
  583. }
  584. #endif /* CONFIG_S3C_DEV_I2C7 */
  585. /* I2C HDMIPHY */
  586. #ifdef CONFIG_S5P_DEV_I2C_HDMIPHY
  587. static struct resource s5p_i2c_resource[] = {
  588. [0] = DEFINE_RES_MEM(S5P_PA_IIC_HDMIPHY, SZ_4K),
  589. [1] = DEFINE_RES_IRQ(IRQ_IIC_HDMIPHY),
  590. };
  591. struct platform_device s5p_device_i2c_hdmiphy = {
  592. .name = "s3c2440-hdmiphy-i2c",
  593. .id = -1,
  594. .num_resources = ARRAY_SIZE(s5p_i2c_resource),
  595. .resource = s5p_i2c_resource,
  596. };
  597. void __init s5p_i2c_hdmiphy_set_platdata(struct s3c2410_platform_i2c *pd)
  598. {
  599. struct s3c2410_platform_i2c *npd;
  600. if (!pd) {
  601. pd = &default_i2c_data;
  602. if (soc_is_exynos4210())
  603. pd->bus_num = 8;
  604. else if (soc_is_s5pv210())
  605. pd->bus_num = 3;
  606. else
  607. pd->bus_num = 0;
  608. }
  609. npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
  610. &s5p_device_i2c_hdmiphy);
  611. }
  612. #endif /* CONFIG_S5P_DEV_I2C_HDMIPHY */
  613. /* I2S */
  614. #ifdef CONFIG_PLAT_S3C24XX
  615. static struct resource s3c_iis_resource[] = {
  616. [0] = DEFINE_RES_MEM(S3C24XX_PA_IIS, S3C24XX_SZ_IIS),
  617. };
  618. struct platform_device s3c_device_iis = {
  619. .name = "s3c24xx-iis",
  620. .id = -1,
  621. .num_resources = ARRAY_SIZE(s3c_iis_resource),
  622. .resource = s3c_iis_resource,
  623. .dev = {
  624. .dma_mask = &samsung_device_dma_mask,
  625. .coherent_dma_mask = DMA_BIT_MASK(32),
  626. }
  627. };
  628. #endif /* CONFIG_PLAT_S3C24XX */
  629. #ifdef CONFIG_CPU_S3C2440
  630. struct platform_device s3c2412_device_iis = {
  631. .name = "s3c2412-iis",
  632. .id = -1,
  633. .dev = {
  634. .dma_mask = &samsung_device_dma_mask,
  635. .coherent_dma_mask = DMA_BIT_MASK(32),
  636. }
  637. };
  638. #endif /* CONFIG_CPU_S3C2440 */
  639. /* IDE CFCON */
  640. #ifdef CONFIG_SAMSUNG_DEV_IDE
  641. static struct resource s3c_cfcon_resource[] = {
  642. [0] = DEFINE_RES_MEM(SAMSUNG_PA_CFCON, SZ_16K),
  643. [1] = DEFINE_RES_IRQ(IRQ_CFCON),
  644. };
  645. struct platform_device s3c_device_cfcon = {
  646. .id = 0,
  647. .num_resources = ARRAY_SIZE(s3c_cfcon_resource),
  648. .resource = s3c_cfcon_resource,
  649. };
  650. void s3c_ide_set_platdata(struct s3c_ide_platdata *pdata)
  651. {
  652. s3c_set_platdata(pdata, sizeof(struct s3c_ide_platdata),
  653. &s3c_device_cfcon);
  654. }
  655. #endif /* CONFIG_SAMSUNG_DEV_IDE */
  656. /* KEYPAD */
  657. #ifdef CONFIG_SAMSUNG_DEV_KEYPAD
  658. static struct resource samsung_keypad_resources[] = {
  659. [0] = DEFINE_RES_MEM(SAMSUNG_PA_KEYPAD, SZ_32),
  660. [1] = DEFINE_RES_IRQ(IRQ_KEYPAD),
  661. };
  662. struct platform_device samsung_device_keypad = {
  663. .name = "samsung-keypad",
  664. .id = -1,
  665. .num_resources = ARRAY_SIZE(samsung_keypad_resources),
  666. .resource = samsung_keypad_resources,
  667. };
  668. void __init samsung_keypad_set_platdata(struct samsung_keypad_platdata *pd)
  669. {
  670. struct samsung_keypad_platdata *npd;
  671. npd = s3c_set_platdata(pd, sizeof(struct samsung_keypad_platdata),
  672. &samsung_device_keypad);
  673. if (!npd->cfg_gpio)
  674. npd->cfg_gpio = samsung_keypad_cfg_gpio;
  675. }
  676. #endif /* CONFIG_SAMSUNG_DEV_KEYPAD */
  677. /* LCD Controller */
  678. #ifdef CONFIG_PLAT_S3C24XX
  679. static struct resource s3c_lcd_resource[] = {
  680. [0] = DEFINE_RES_MEM(S3C24XX_PA_LCD, S3C24XX_SZ_LCD),
  681. [1] = DEFINE_RES_IRQ(IRQ_LCD),
  682. };
  683. struct platform_device s3c_device_lcd = {
  684. .name = "s3c2410-lcd",
  685. .id = -1,
  686. .num_resources = ARRAY_SIZE(s3c_lcd_resource),
  687. .resource = s3c_lcd_resource,
  688. .dev = {
  689. .dma_mask = &samsung_device_dma_mask,
  690. .coherent_dma_mask = DMA_BIT_MASK(32),
  691. }
  692. };
  693. void __init s3c24xx_fb_set_platdata(struct s3c2410fb_mach_info *pd)
  694. {
  695. struct s3c2410fb_mach_info *npd;
  696. npd = s3c_set_platdata(pd, sizeof(*npd), &s3c_device_lcd);
  697. if (npd) {
  698. npd->displays = kmemdup(pd->displays,
  699. sizeof(struct s3c2410fb_display) * npd->num_displays,
  700. GFP_KERNEL);
  701. if (!npd->displays)
  702. printk(KERN_ERR "no memory for LCD display data\n");
  703. } else {
  704. printk(KERN_ERR "no memory for LCD platform data\n");
  705. }
  706. }
  707. #endif /* CONFIG_PLAT_S3C24XX */
  708. /* MFC */
  709. #ifdef CONFIG_S5P_DEV_MFC
  710. static struct resource s5p_mfc_resource[] = {
  711. [0] = DEFINE_RES_MEM(S5P_PA_MFC, SZ_64K),
  712. [1] = DEFINE_RES_IRQ(IRQ_MFC),
  713. };
  714. struct platform_device s5p_device_mfc = {
  715. .name = "s5p-mfc",
  716. .id = -1,
  717. .num_resources = ARRAY_SIZE(s5p_mfc_resource),
  718. .resource = s5p_mfc_resource,
  719. };
  720. /*
  721. * MFC hardware has 2 memory interfaces which are modelled as two separate
  722. * platform devices to let dma-mapping distinguish between them.
  723. *
  724. * MFC parent device (s5p_device_mfc) must be registered before memory
  725. * interface specific devices (s5p_device_mfc_l and s5p_device_mfc_r).
  726. */
  727. struct platform_device s5p_device_mfc_l = {
  728. .name = "s5p-mfc-l",
  729. .id = -1,
  730. .dev = {
  731. .parent = &s5p_device_mfc.dev,
  732. .dma_mask = &samsung_device_dma_mask,
  733. .coherent_dma_mask = DMA_BIT_MASK(32),
  734. },
  735. };
  736. struct platform_device s5p_device_mfc_r = {
  737. .name = "s5p-mfc-r",
  738. .id = -1,
  739. .dev = {
  740. .parent = &s5p_device_mfc.dev,
  741. .dma_mask = &samsung_device_dma_mask,
  742. .coherent_dma_mask = DMA_BIT_MASK(32),
  743. },
  744. };
  745. #endif /* CONFIG_S5P_DEV_MFC */
  746. /* MIPI CSIS */
  747. #ifdef CONFIG_S5P_DEV_CSIS0
  748. static struct resource s5p_mipi_csis0_resource[] = {
  749. [0] = DEFINE_RES_MEM(S5P_PA_MIPI_CSIS0, SZ_4K),
  750. [1] = DEFINE_RES_IRQ(IRQ_MIPI_CSIS0),
  751. };
  752. struct platform_device s5p_device_mipi_csis0 = {
  753. .name = "s5p-mipi-csis",
  754. .id = 0,
  755. .num_resources = ARRAY_SIZE(s5p_mipi_csis0_resource),
  756. .resource = s5p_mipi_csis0_resource,
  757. };
  758. #endif /* CONFIG_S5P_DEV_CSIS0 */
  759. #ifdef CONFIG_S5P_DEV_CSIS1
  760. static struct resource s5p_mipi_csis1_resource[] = {
  761. [0] = DEFINE_RES_MEM(S5P_PA_MIPI_CSIS1, SZ_4K),
  762. [1] = DEFINE_RES_IRQ(IRQ_MIPI_CSIS1),
  763. };
  764. struct platform_device s5p_device_mipi_csis1 = {
  765. .name = "s5p-mipi-csis",
  766. .id = 1,
  767. .num_resources = ARRAY_SIZE(s5p_mipi_csis1_resource),
  768. .resource = s5p_mipi_csis1_resource,
  769. };
  770. #endif
  771. /* NAND */
  772. #ifdef CONFIG_S3C_DEV_NAND
  773. static struct resource s3c_nand_resource[] = {
  774. [0] = DEFINE_RES_MEM(S3C_PA_NAND, SZ_1M),
  775. };
  776. struct platform_device s3c_device_nand = {
  777. .name = "s3c2410-nand",
  778. .id = -1,
  779. .num_resources = ARRAY_SIZE(s3c_nand_resource),
  780. .resource = s3c_nand_resource,
  781. };
  782. /*
  783. * s3c_nand_copy_set() - copy nand set data
  784. * @set: The new structure, directly copied from the old.
  785. *
  786. * Copy all the fields from the NAND set field from what is probably __initdata
  787. * to new kernel memory. The code returns 0 if the copy happened correctly or
  788. * an error code for the calling function to display.
  789. *
  790. * Note, we currently do not try and look to see if we've already copied the
  791. * data in a previous set.
  792. */
  793. static int __init s3c_nand_copy_set(struct s3c2410_nand_set *set)
  794. {
  795. void *ptr;
  796. int size;
  797. size = sizeof(struct mtd_partition) * set->nr_partitions;
  798. if (size) {
  799. ptr = kmemdup(set->partitions, size, GFP_KERNEL);
  800. set->partitions = ptr;
  801. if (!ptr)
  802. return -ENOMEM;
  803. }
  804. if (set->nr_map && set->nr_chips) {
  805. size = sizeof(int) * set->nr_chips;
  806. ptr = kmemdup(set->nr_map, size, GFP_KERNEL);
  807. set->nr_map = ptr;
  808. if (!ptr)
  809. return -ENOMEM;
  810. }
  811. if (set->ecc_layout) {
  812. ptr = kmemdup(set->ecc_layout,
  813. sizeof(struct nand_ecclayout), GFP_KERNEL);
  814. set->ecc_layout = ptr;
  815. if (!ptr)
  816. return -ENOMEM;
  817. }
  818. return 0;
  819. }
  820. void __init s3c_nand_set_platdata(struct s3c2410_platform_nand *nand)
  821. {
  822. struct s3c2410_platform_nand *npd;
  823. int size;
  824. int ret;
  825. /* note, if we get a failure in allocation, we simply drop out of the
  826. * function. If there is so little memory available at initialisation
  827. * time then there is little chance the system is going to run.
  828. */
  829. npd = s3c_set_platdata(nand, sizeof(struct s3c2410_platform_nand),
  830. &s3c_device_nand);
  831. if (!npd)
  832. return;
  833. /* now see if we need to copy any of the nand set data */
  834. size = sizeof(struct s3c2410_nand_set) * npd->nr_sets;
  835. if (size) {
  836. struct s3c2410_nand_set *from = npd->sets;
  837. struct s3c2410_nand_set *to;
  838. int i;
  839. to = kmemdup(from, size, GFP_KERNEL);
  840. npd->sets = to; /* set, even if we failed */
  841. if (!to) {
  842. printk(KERN_ERR "%s: no memory for sets\n", __func__);
  843. return;
  844. }
  845. for (i = 0; i < npd->nr_sets; i++) {
  846. ret = s3c_nand_copy_set(to);
  847. if (ret) {
  848. printk(KERN_ERR "%s: failed to copy set %d\n",
  849. __func__, i);
  850. return;
  851. }
  852. to++;
  853. }
  854. }
  855. }
  856. #endif /* CONFIG_S3C_DEV_NAND */
  857. /* ONENAND */
  858. #ifdef CONFIG_S3C_DEV_ONENAND
  859. static struct resource s3c_onenand_resources[] = {
  860. [0] = DEFINE_RES_MEM(S3C_PA_ONENAND, SZ_1K),
  861. [1] = DEFINE_RES_MEM(S3C_PA_ONENAND_BUF, S3C_SZ_ONENAND_BUF),
  862. [2] = DEFINE_RES_IRQ(IRQ_ONENAND),
  863. };
  864. struct platform_device s3c_device_onenand = {
  865. .name = "samsung-onenand",
  866. .id = 0,
  867. .num_resources = ARRAY_SIZE(s3c_onenand_resources),
  868. .resource = s3c_onenand_resources,
  869. };
  870. #endif /* CONFIG_S3C_DEV_ONENAND */
  871. #ifdef CONFIG_S3C64XX_DEV_ONENAND1
  872. static struct resource s3c64xx_onenand1_resources[] = {
  873. [0] = DEFINE_RES_MEM(S3C64XX_PA_ONENAND1, SZ_1K),
  874. [1] = DEFINE_RES_MEM(S3C64XX_PA_ONENAND1_BUF, S3C64XX_SZ_ONENAND1_BUF),
  875. [2] = DEFINE_RES_IRQ(IRQ_ONENAND1),
  876. };
  877. struct platform_device s3c64xx_device_onenand1 = {
  878. .name = "samsung-onenand",
  879. .id = 1,
  880. .num_resources = ARRAY_SIZE(s3c64xx_onenand1_resources),
  881. .resource = s3c64xx_onenand1_resources,
  882. };
  883. void s3c64xx_onenand1_set_platdata(struct onenand_platform_data *pdata)
  884. {
  885. s3c_set_platdata(pdata, sizeof(struct onenand_platform_data),
  886. &s3c64xx_device_onenand1);
  887. }
  888. #endif /* CONFIG_S3C64XX_DEV_ONENAND1 */
  889. #ifdef CONFIG_S5P_DEV_ONENAND
  890. static struct resource s5p_onenand_resources[] = {
  891. [0] = DEFINE_RES_MEM(S5P_PA_ONENAND, SZ_128K),
  892. [1] = DEFINE_RES_MEM(S5P_PA_ONENAND_DMA, SZ_8K),
  893. [2] = DEFINE_RES_IRQ(IRQ_ONENAND_AUDI),
  894. };
  895. struct platform_device s5p_device_onenand = {
  896. .name = "s5pc110-onenand",
  897. .id = -1,
  898. .num_resources = ARRAY_SIZE(s5p_onenand_resources),
  899. .resource = s5p_onenand_resources,
  900. };
  901. #endif /* CONFIG_S5P_DEV_ONENAND */
  902. /* PMU */
  903. #ifdef CONFIG_PLAT_S5P
  904. static struct resource s5p_pmu_resource[] = {
  905. DEFINE_RES_IRQ(IRQ_PMU)
  906. };
  907. struct platform_device s5p_device_pmu = {
  908. .name = "arm-pmu",
  909. .id = ARM_PMU_DEVICE_CPU,
  910. .num_resources = ARRAY_SIZE(s5p_pmu_resource),
  911. .resource = s5p_pmu_resource,
  912. };
  913. static int __init s5p_pmu_init(void)
  914. {
  915. platform_device_register(&s5p_device_pmu);
  916. return 0;
  917. }
  918. arch_initcall(s5p_pmu_init);
  919. #endif /* CONFIG_PLAT_S5P */
  920. /* PWM Timer */
  921. #ifdef CONFIG_SAMSUNG_DEV_PWM
  922. #define TIMER_RESOURCE_SIZE (1)
  923. #define TIMER_RESOURCE(_tmr, _irq) \
  924. (struct resource [TIMER_RESOURCE_SIZE]) { \
  925. [0] = { \
  926. .start = _irq, \
  927. .end = _irq, \
  928. .flags = IORESOURCE_IRQ \
  929. } \
  930. }
  931. #define DEFINE_S3C_TIMER(_tmr_no, _irq) \
  932. .name = "s3c24xx-pwm", \
  933. .id = _tmr_no, \
  934. .num_resources = TIMER_RESOURCE_SIZE, \
  935. .resource = TIMER_RESOURCE(_tmr_no, _irq), \
  936. /*
  937. * since we already have an static mapping for the timer,
  938. * we do not bother setting any IO resource for the base.
  939. */
  940. struct platform_device s3c_device_timer[] = {
  941. [0] = { DEFINE_S3C_TIMER(0, IRQ_TIMER0) },
  942. [1] = { DEFINE_S3C_TIMER(1, IRQ_TIMER1) },
  943. [2] = { DEFINE_S3C_TIMER(2, IRQ_TIMER2) },
  944. [3] = { DEFINE_S3C_TIMER(3, IRQ_TIMER3) },
  945. [4] = { DEFINE_S3C_TIMER(4, IRQ_TIMER4) },
  946. };
  947. #endif /* CONFIG_SAMSUNG_DEV_PWM */
  948. /* RTC */
  949. #ifdef CONFIG_PLAT_S3C24XX
  950. static struct resource s3c_rtc_resource[] = {
  951. [0] = DEFINE_RES_MEM(S3C24XX_PA_RTC, SZ_256),
  952. [1] = DEFINE_RES_IRQ(IRQ_RTC),
  953. [2] = DEFINE_RES_IRQ(IRQ_TICK),
  954. };
  955. struct platform_device s3c_device_rtc = {
  956. .name = "s3c2410-rtc",
  957. .id = -1,
  958. .num_resources = ARRAY_SIZE(s3c_rtc_resource),
  959. .resource = s3c_rtc_resource,
  960. };
  961. #endif /* CONFIG_PLAT_S3C24XX */
  962. #ifdef CONFIG_S3C_DEV_RTC
  963. static struct resource s3c_rtc_resource[] = {
  964. [0] = DEFINE_RES_MEM(S3C_PA_RTC, SZ_256),
  965. [1] = DEFINE_RES_IRQ(IRQ_RTC_ALARM),
  966. [2] = DEFINE_RES_IRQ(IRQ_RTC_TIC),
  967. };
  968. struct platform_device s3c_device_rtc = {
  969. .name = "s3c64xx-rtc",
  970. .id = -1,
  971. .num_resources = ARRAY_SIZE(s3c_rtc_resource),
  972. .resource = s3c_rtc_resource,
  973. };
  974. #endif /* CONFIG_S3C_DEV_RTC */
  975. /* SDI */
  976. #ifdef CONFIG_PLAT_S3C24XX
  977. static struct resource s3c_sdi_resource[] = {
  978. [0] = DEFINE_RES_MEM(S3C24XX_PA_SDI, S3C24XX_SZ_SDI),
  979. [1] = DEFINE_RES_IRQ(IRQ_SDI),
  980. };
  981. struct platform_device s3c_device_sdi = {
  982. .name = "s3c2410-sdi",
  983. .id = -1,
  984. .num_resources = ARRAY_SIZE(s3c_sdi_resource),
  985. .resource = s3c_sdi_resource,
  986. };
  987. void __init s3c24xx_mci_set_platdata(struct s3c24xx_mci_pdata *pdata)
  988. {
  989. s3c_set_platdata(pdata, sizeof(struct s3c24xx_mci_pdata),
  990. &s3c_device_sdi);
  991. }
  992. #endif /* CONFIG_PLAT_S3C24XX */
  993. /* SPI */
  994. #ifdef CONFIG_PLAT_S3C24XX
  995. static struct resource s3c_spi0_resource[] = {
  996. [0] = DEFINE_RES_MEM(S3C24XX_PA_SPI, SZ_32),
  997. [1] = DEFINE_RES_IRQ(IRQ_SPI0),
  998. };
  999. struct platform_device s3c_device_spi0 = {
  1000. .name = "s3c2410-spi",
  1001. .id = 0,
  1002. .num_resources = ARRAY_SIZE(s3c_spi0_resource),
  1003. .resource = s3c_spi0_resource,
  1004. .dev = {
  1005. .dma_mask = &samsung_device_dma_mask,
  1006. .coherent_dma_mask = DMA_BIT_MASK(32),
  1007. }
  1008. };
  1009. static struct resource s3c_spi1_resource[] = {
  1010. [0] = DEFINE_RES_MEM(S3C24XX_PA_SPI1, SZ_32),
  1011. [1] = DEFINE_RES_IRQ(IRQ_SPI1),
  1012. };
  1013. struct platform_device s3c_device_spi1 = {
  1014. .name = "s3c2410-spi",
  1015. .id = 1,
  1016. .num_resources = ARRAY_SIZE(s3c_spi1_resource),
  1017. .resource = s3c_spi1_resource,
  1018. .dev = {
  1019. .dma_mask = &samsung_device_dma_mask,
  1020. .coherent_dma_mask = DMA_BIT_MASK(32),
  1021. }
  1022. };
  1023. #endif /* CONFIG_PLAT_S3C24XX */
  1024. /* Touchscreen */
  1025. #ifdef CONFIG_PLAT_S3C24XX
  1026. static struct resource s3c_ts_resource[] = {
  1027. [0] = DEFINE_RES_MEM(S3C24XX_PA_ADC, S3C24XX_SZ_ADC),
  1028. [1] = DEFINE_RES_IRQ(IRQ_TC),
  1029. };
  1030. struct platform_device s3c_device_ts = {
  1031. .name = "s3c2410-ts",
  1032. .id = -1,
  1033. .dev.parent = &s3c_device_adc.dev,
  1034. .num_resources = ARRAY_SIZE(s3c_ts_resource),
  1035. .resource = s3c_ts_resource,
  1036. };
  1037. void __init s3c24xx_ts_set_platdata(struct s3c2410_ts_mach_info *hard_s3c2410ts_info)
  1038. {
  1039. s3c_set_platdata(hard_s3c2410ts_info,
  1040. sizeof(struct s3c2410_ts_mach_info), &s3c_device_ts);
  1041. }
  1042. #endif /* CONFIG_PLAT_S3C24XX */
  1043. #ifdef CONFIG_SAMSUNG_DEV_TS
  1044. static struct resource s3c_ts_resource[] = {
  1045. [0] = DEFINE_RES_MEM(SAMSUNG_PA_ADC, SZ_256),
  1046. [1] = DEFINE_RES_IRQ(IRQ_TC),
  1047. };
  1048. static struct s3c2410_ts_mach_info default_ts_data __initdata = {
  1049. .delay = 10000,
  1050. .presc = 49,
  1051. .oversampling_shift = 2,
  1052. };
  1053. struct platform_device s3c_device_ts = {
  1054. .name = "s3c64xx-ts",
  1055. .id = -1,
  1056. .num_resources = ARRAY_SIZE(s3c_ts_resource),
  1057. .resource = s3c_ts_resource,
  1058. };
  1059. void __init s3c24xx_ts_set_platdata(struct s3c2410_ts_mach_info *pd)
  1060. {
  1061. if (!pd)
  1062. pd = &default_ts_data;
  1063. s3c_set_platdata(pd, sizeof(struct s3c2410_ts_mach_info),
  1064. &s3c_device_ts);
  1065. }
  1066. #endif /* CONFIG_SAMSUNG_DEV_TS */
  1067. /* TV */
  1068. #ifdef CONFIG_S5P_DEV_TV
  1069. static struct resource s5p_hdmi_resources[] = {
  1070. [0] = DEFINE_RES_MEM(S5P_PA_HDMI, SZ_1M),
  1071. [1] = DEFINE_RES_IRQ(IRQ_HDMI),
  1072. };
  1073. struct platform_device s5p_device_hdmi = {
  1074. .name = "s5p-hdmi",
  1075. .id = -1,
  1076. .num_resources = ARRAY_SIZE(s5p_hdmi_resources),
  1077. .resource = s5p_hdmi_resources,
  1078. };
  1079. static struct resource s5p_sdo_resources[] = {
  1080. [0] = DEFINE_RES_MEM(S5P_PA_SDO, SZ_64K),
  1081. [1] = DEFINE_RES_IRQ(IRQ_SDO),
  1082. };
  1083. struct platform_device s5p_device_sdo = {
  1084. .name = "s5p-sdo",
  1085. .id = -1,
  1086. .num_resources = ARRAY_SIZE(s5p_sdo_resources),
  1087. .resource = s5p_sdo_resources,
  1088. };
  1089. static struct resource s5p_mixer_resources[] = {
  1090. [0] = DEFINE_RES_MEM_NAMED(S5P_PA_MIXER, SZ_64K, "mxr"),
  1091. [1] = DEFINE_RES_MEM_NAMED(S5P_PA_VP, SZ_64K, "vp"),
  1092. [2] = DEFINE_RES_IRQ_NAMED(IRQ_MIXER, "irq"),
  1093. };
  1094. struct platform_device s5p_device_mixer = {
  1095. .name = "s5p-mixer",
  1096. .id = -1,
  1097. .num_resources = ARRAY_SIZE(s5p_mixer_resources),
  1098. .resource = s5p_mixer_resources,
  1099. .dev = {
  1100. .dma_mask = &samsung_device_dma_mask,
  1101. .coherent_dma_mask = DMA_BIT_MASK(32),
  1102. }
  1103. };
  1104. #endif /* CONFIG_S5P_DEV_TV */
  1105. /* USB */
  1106. #ifdef CONFIG_S3C_DEV_USB_HOST
  1107. static struct resource s3c_usb_resource[] = {
  1108. [0] = DEFINE_RES_MEM(S3C_PA_USBHOST, SZ_256),
  1109. [1] = DEFINE_RES_IRQ(IRQ_USBH),
  1110. };
  1111. struct platform_device s3c_device_ohci = {
  1112. .name = "s3c2410-ohci",
  1113. .id = -1,
  1114. .num_resources = ARRAY_SIZE(s3c_usb_resource),
  1115. .resource = s3c_usb_resource,
  1116. .dev = {
  1117. .dma_mask = &samsung_device_dma_mask,
  1118. .coherent_dma_mask = DMA_BIT_MASK(32),
  1119. }
  1120. };
  1121. /*
  1122. * s3c_ohci_set_platdata - initialise OHCI device platform data
  1123. * @info: The platform data.
  1124. *
  1125. * This call copies the @info passed in and sets the device .platform_data
  1126. * field to that copy. The @info is copied so that the original can be marked
  1127. * __initdata.
  1128. */
  1129. void __init s3c_ohci_set_platdata(struct s3c2410_hcd_info *info)
  1130. {
  1131. s3c_set_platdata(info, sizeof(struct s3c2410_hcd_info),
  1132. &s3c_device_ohci);
  1133. }
  1134. #endif /* CONFIG_S3C_DEV_USB_HOST */
  1135. /* USB Device (Gadget) */
  1136. #ifdef CONFIG_PLAT_S3C24XX
  1137. static struct resource s3c_usbgadget_resource[] = {
  1138. [0] = DEFINE_RES_MEM(S3C24XX_PA_USBDEV, S3C24XX_SZ_USBDEV),
  1139. [1] = DEFINE_RES_IRQ(IRQ_USBD),
  1140. };
  1141. struct platform_device s3c_device_usbgadget = {
  1142. .name = "s3c2410-usbgadget",
  1143. .id = -1,
  1144. .num_resources = ARRAY_SIZE(s3c_usbgadget_resource),
  1145. .resource = s3c_usbgadget_resource,
  1146. };
  1147. void __init s3c24xx_udc_set_platdata(struct s3c2410_udc_mach_info *pd)
  1148. {
  1149. s3c_set_platdata(pd, sizeof(*pd), &s3c_device_usbgadget);
  1150. }
  1151. #endif /* CONFIG_PLAT_S3C24XX */
  1152. /* USB EHCI Host Controller */
  1153. #ifdef CONFIG_S5P_DEV_USB_EHCI
  1154. static struct resource s5p_ehci_resource[] = {
  1155. [0] = DEFINE_RES_MEM(S5P_PA_EHCI, SZ_256),
  1156. [1] = DEFINE_RES_IRQ(IRQ_USB_HOST),
  1157. };
  1158. struct platform_device s5p_device_ehci = {
  1159. .name = "s5p-ehci",
  1160. .id = -1,
  1161. .num_resources = ARRAY_SIZE(s5p_ehci_resource),
  1162. .resource = s5p_ehci_resource,
  1163. .dev = {
  1164. .dma_mask = &samsung_device_dma_mask,
  1165. .coherent_dma_mask = DMA_BIT_MASK(32),
  1166. }
  1167. };
  1168. void __init s5p_ehci_set_platdata(struct s5p_ehci_platdata *pd)
  1169. {
  1170. struct s5p_ehci_platdata *npd;
  1171. npd = s3c_set_platdata(pd, sizeof(struct s5p_ehci_platdata),
  1172. &s5p_device_ehci);
  1173. if (!npd->phy_init)
  1174. npd->phy_init = s5p_usb_phy_init;
  1175. if (!npd->phy_exit)
  1176. npd->phy_exit = s5p_usb_phy_exit;
  1177. }
  1178. #endif /* CONFIG_S5P_DEV_USB_EHCI */
  1179. /* USB HSOTG */
  1180. #ifdef CONFIG_S3C_DEV_USB_HSOTG
  1181. static struct resource s3c_usb_hsotg_resources[] = {
  1182. [0] = DEFINE_RES_MEM(S3C_PA_USB_HSOTG, SZ_128K),
  1183. [1] = DEFINE_RES_IRQ(IRQ_OTG),
  1184. };
  1185. struct platform_device s3c_device_usb_hsotg = {
  1186. .name = "s3c-hsotg",
  1187. .id = -1,
  1188. .num_resources = ARRAY_SIZE(s3c_usb_hsotg_resources),
  1189. .resource = s3c_usb_hsotg_resources,
  1190. .dev = {
  1191. .dma_mask = &samsung_device_dma_mask,
  1192. .coherent_dma_mask = DMA_BIT_MASK(32),
  1193. },
  1194. };
  1195. #endif /* CONFIG_S3C_DEV_USB_HSOTG */
  1196. /* USB High Spped 2.0 Device (Gadget) */
  1197. #ifdef CONFIG_PLAT_S3C24XX
  1198. static struct resource s3c_hsudc_resource[] = {
  1199. [0] = DEFINE_RES_MEM(S3C2416_PA_HSUDC, S3C2416_SZ_HSUDC),
  1200. [1] = DEFINE_RES_IRQ(IRQ_USBD),
  1201. };
  1202. struct platform_device s3c_device_usb_hsudc = {
  1203. .name = "s3c-hsudc",
  1204. .id = -1,
  1205. .num_resources = ARRAY_SIZE(s3c_hsudc_resource),
  1206. .resource = s3c_hsudc_resource,
  1207. .dev = {
  1208. .dma_mask = &samsung_device_dma_mask,
  1209. .coherent_dma_mask = DMA_BIT_MASK(32),
  1210. },
  1211. };
  1212. void __init s3c24xx_hsudc_set_platdata(struct s3c24xx_hsudc_platdata *pd)
  1213. {
  1214. s3c_set_platdata(pd, sizeof(*pd), &s3c_device_usb_hsudc);
  1215. }
  1216. #endif /* CONFIG_PLAT_S3C24XX */
  1217. /* WDT */
  1218. #ifdef CONFIG_S3C_DEV_WDT
  1219. static struct resource s3c_wdt_resource[] = {
  1220. [0] = DEFINE_RES_MEM(S3C_PA_WDT, SZ_1K),
  1221. [1] = DEFINE_RES_IRQ(IRQ_WDT),
  1222. };
  1223. struct platform_device s3c_device_wdt = {
  1224. .name = "s3c2410-wdt",
  1225. .id = -1,
  1226. .num_resources = ARRAY_SIZE(s3c_wdt_resource),
  1227. .resource = s3c_wdt_resource,
  1228. };
  1229. #endif /* CONFIG_S3C_DEV_WDT */
  1230. #ifdef CONFIG_S3C64XX_DEV_SPI0
  1231. static struct resource s3c64xx_spi0_resource[] = {
  1232. [0] = DEFINE_RES_MEM(S3C_PA_SPI0, SZ_256),
  1233. [1] = DEFINE_RES_DMA(DMACH_SPI0_TX),
  1234. [2] = DEFINE_RES_DMA(DMACH_SPI0_RX),
  1235. [3] = DEFINE_RES_IRQ(IRQ_SPI0),
  1236. };
  1237. struct platform_device s3c64xx_device_spi0 = {
  1238. .name = "s3c64xx-spi",
  1239. .id = 0,
  1240. .num_resources = ARRAY_SIZE(s3c64xx_spi0_resource),
  1241. .resource = s3c64xx_spi0_resource,
  1242. .dev = {
  1243. .dma_mask = &samsung_device_dma_mask,
  1244. .coherent_dma_mask = DMA_BIT_MASK(32),
  1245. },
  1246. };
  1247. void __init s3c64xx_spi0_set_platdata(struct s3c64xx_spi_info *pd,
  1248. int src_clk_nr, int num_cs)
  1249. {
  1250. if (!pd) {
  1251. pr_err("%s:Need to pass platform data\n", __func__);
  1252. return;
  1253. }
  1254. /* Reject invalid configuration */
  1255. if (!num_cs || src_clk_nr < 0) {
  1256. pr_err("%s: Invalid SPI configuration\n", __func__);
  1257. return;
  1258. }
  1259. pd->num_cs = num_cs;
  1260. pd->src_clk_nr = src_clk_nr;
  1261. if (!pd->cfg_gpio)
  1262. pd->cfg_gpio = s3c64xx_spi0_cfg_gpio;
  1263. s3c_set_platdata(pd, sizeof(*pd), &s3c64xx_device_spi0);
  1264. }
  1265. #endif /* CONFIG_S3C64XX_DEV_SPI0 */
  1266. #ifdef CONFIG_S3C64XX_DEV_SPI1
  1267. static struct resource s3c64xx_spi1_resource[] = {
  1268. [0] = DEFINE_RES_MEM(S3C_PA_SPI1, SZ_256),
  1269. [1] = DEFINE_RES_DMA(DMACH_SPI1_TX),
  1270. [2] = DEFINE_RES_DMA(DMACH_SPI1_RX),
  1271. [3] = DEFINE_RES_IRQ(IRQ_SPI1),
  1272. };
  1273. struct platform_device s3c64xx_device_spi1 = {
  1274. .name = "s3c64xx-spi",
  1275. .id = 1,
  1276. .num_resources = ARRAY_SIZE(s3c64xx_spi1_resource),
  1277. .resource = s3c64xx_spi1_resource,
  1278. .dev = {
  1279. .dma_mask = &samsung_device_dma_mask,
  1280. .coherent_dma_mask = DMA_BIT_MASK(32),
  1281. },
  1282. };
  1283. void __init s3c64xx_spi1_set_platdata(struct s3c64xx_spi_info *pd,
  1284. int src_clk_nr, int num_cs)
  1285. {
  1286. if (!pd) {
  1287. pr_err("%s:Need to pass platform data\n", __func__);
  1288. return;
  1289. }
  1290. /* Reject invalid configuration */
  1291. if (!num_cs || src_clk_nr < 0) {
  1292. pr_err("%s: Invalid SPI configuration\n", __func__);
  1293. return;
  1294. }
  1295. pd->num_cs = num_cs;
  1296. pd->src_clk_nr = src_clk_nr;
  1297. if (!pd->cfg_gpio)
  1298. pd->cfg_gpio = s3c64xx_spi1_cfg_gpio;
  1299. s3c_set_platdata(pd, sizeof(*pd), &s3c64xx_device_spi1);
  1300. }
  1301. #endif /* CONFIG_S3C64XX_DEV_SPI1 */
  1302. #ifdef CONFIG_S3C64XX_DEV_SPI2
  1303. static struct resource s3c64xx_spi2_resource[] = {
  1304. [0] = DEFINE_RES_MEM(S3C_PA_SPI2, SZ_256),
  1305. [1] = DEFINE_RES_DMA(DMACH_SPI2_TX),
  1306. [2] = DEFINE_RES_DMA(DMACH_SPI2_RX),
  1307. [3] = DEFINE_RES_IRQ(IRQ_SPI2),
  1308. };
  1309. struct platform_device s3c64xx_device_spi2 = {
  1310. .name = "s3c64xx-spi",
  1311. .id = 2,
  1312. .num_resources = ARRAY_SIZE(s3c64xx_spi2_resource),
  1313. .resource = s3c64xx_spi2_resource,
  1314. .dev = {
  1315. .dma_mask = &samsung_device_dma_mask,
  1316. .coherent_dma_mask = DMA_BIT_MASK(32),
  1317. },
  1318. };
  1319. void __init s3c64xx_spi2_set_platdata(struct s3c64xx_spi_info *pd,
  1320. int src_clk_nr, int num_cs)
  1321. {
  1322. if (!pd) {
  1323. pr_err("%s:Need to pass platform data\n", __func__);
  1324. return;
  1325. }
  1326. /* Reject invalid configuration */
  1327. if (!num_cs || src_clk_nr < 0) {
  1328. pr_err("%s: Invalid SPI configuration\n", __func__);
  1329. return;
  1330. }
  1331. pd->num_cs = num_cs;
  1332. pd->src_clk_nr = src_clk_nr;
  1333. if (!pd->cfg_gpio)
  1334. pd->cfg_gpio = s3c64xx_spi2_cfg_gpio;
  1335. s3c_set_platdata(pd, sizeof(*pd), &s3c64xx_device_spi2);
  1336. }
  1337. #endif /* CONFIG_S3C64XX_DEV_SPI2 */