board-ap4evb.c 33 KB

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  1. /*
  2. * AP4EVB board support
  3. *
  4. * Copyright (C) 2010 Magnus Damm
  5. * Copyright (C) 2008 Yoshihiro Shimoda
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License as published by
  9. * the Free Software Foundation; version 2 of the License.
  10. *
  11. * This program is distributed in the hope that it will be useful,
  12. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  14. * GNU General Public License for more details.
  15. *
  16. * You should have received a copy of the GNU General Public License
  17. * along with this program; if not, write to the Free Software
  18. * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
  19. */
  20. #include <linux/clk.h>
  21. #include <linux/kernel.h>
  22. #include <linux/init.h>
  23. #include <linux/interrupt.h>
  24. #include <linux/irq.h>
  25. #include <linux/platform_device.h>
  26. #include <linux/delay.h>
  27. #include <linux/mfd/tmio.h>
  28. #include <linux/mmc/host.h>
  29. #include <linux/mmc/sh_mobile_sdhi.h>
  30. #include <linux/mtd/mtd.h>
  31. #include <linux/mtd/partitions.h>
  32. #include <linux/mtd/physmap.h>
  33. #include <linux/mmc/sh_mmcif.h>
  34. #include <linux/i2c.h>
  35. #include <linux/i2c/tsc2007.h>
  36. #include <linux/io.h>
  37. #include <linux/smsc911x.h>
  38. #include <linux/sh_intc.h>
  39. #include <linux/sh_clk.h>
  40. #include <linux/gpio.h>
  41. #include <linux/input.h>
  42. #include <linux/leds.h>
  43. #include <linux/input/sh_keysc.h>
  44. #include <linux/usb/r8a66597.h>
  45. #include <linux/pm_clock.h>
  46. #include <linux/dma-mapping.h>
  47. #include <media/sh_mobile_ceu.h>
  48. #include <media/sh_mobile_csi2.h>
  49. #include <media/soc_camera.h>
  50. #include <sound/sh_fsi.h>
  51. #include <video/sh_mobile_hdmi.h>
  52. #include <video/sh_mobile_lcdc.h>
  53. #include <video/sh_mipi_dsi.h>
  54. #include <mach/common.h>
  55. #include <mach/irqs.h>
  56. #include <mach/sh7372.h>
  57. #include <asm/mach-types.h>
  58. #include <asm/mach/arch.h>
  59. #include <asm/mach/map.h>
  60. #include <asm/mach/time.h>
  61. #include <asm/setup.h>
  62. /*
  63. * Address Interface BusWidth note
  64. * ------------------------------------------------------------------
  65. * 0x0000_0000 NOR Flash ROM (MCP) 16bit SW7 : bit1 = ON
  66. * 0x0800_0000 user area -
  67. * 0x1000_0000 NOR Flash ROM (MCP) 16bit SW7 : bit1 = OFF
  68. * 0x1400_0000 Ether (LAN9220) 16bit
  69. * 0x1600_0000 user area - cannot use with NAND
  70. * 0x1800_0000 user area -
  71. * 0x1A00_0000 -
  72. * 0x4000_0000 LPDDR2-SDRAM (POP) 32bit
  73. */
  74. /*
  75. * NOR Flash ROM
  76. *
  77. * SW1 | SW2 | SW7 | NOR Flash ROM
  78. * bit1 | bit1 bit2 | bit1 | Memory allocation
  79. * ------+------------+------+------------------
  80. * OFF | ON OFF | ON | Area 0
  81. * OFF | ON OFF | OFF | Area 4
  82. */
  83. /*
  84. * NAND Flash ROM
  85. *
  86. * SW1 | SW2 | SW7 | NAND Flash ROM
  87. * bit1 | bit1 bit2 | bit2 | Memory allocation
  88. * ------+------------+------+------------------
  89. * OFF | ON OFF | ON | FCE 0
  90. * OFF | ON OFF | OFF | FCE 1
  91. */
  92. /*
  93. * SMSC 9220
  94. *
  95. * SW1 SMSC 9220
  96. * -----------------------
  97. * ON access disable
  98. * OFF access enable
  99. */
  100. /*
  101. * LCD / IRQ / KEYSC / IrDA
  102. *
  103. * IRQ = IRQ26 (TS), IRQ27 (VIO), IRQ28 (QHD-TouchScreen)
  104. * LCD = 2nd LCDC (WVGA)
  105. *
  106. * | SW43 |
  107. * SW3 | ON | OFF |
  108. * -------------+-----------------------+---------------+
  109. * ON | KEY / IrDA | LCD |
  110. * OFF | KEY / IrDA / IRQ | IRQ |
  111. *
  112. *
  113. * QHD / WVGA display
  114. *
  115. * You can choice display type on menuconfig.
  116. * Then, check above dip-switch.
  117. */
  118. /*
  119. * USB
  120. *
  121. * J7 : 1-2 MAX3355E VBUS
  122. * 2-3 DC 5.0V
  123. *
  124. * S39: bit2: off
  125. */
  126. /*
  127. * FSI/FSMI
  128. *
  129. * SW41 : ON : SH-Mobile AP4 Audio Mode
  130. * : OFF : Bluetooth Audio Mode
  131. */
  132. /*
  133. * MMC0/SDHI1 (CN7)
  134. *
  135. * J22 : select card voltage
  136. * 1-2 pin : 1.8v
  137. * 2-3 pin : 3.3v
  138. *
  139. * SW1 | SW33
  140. * | bit1 | bit2 | bit3 | bit4
  141. * ------------+------+------+------+-------
  142. * MMC0 OFF | OFF | ON | ON | X
  143. * SDHI1 OFF | ON | X | OFF | ON
  144. *
  145. * voltage lebel
  146. * CN7 : 1.8v
  147. * CN12: 3.3v
  148. */
  149. /* MTD */
  150. static struct mtd_partition nor_flash_partitions[] = {
  151. {
  152. .name = "loader",
  153. .offset = 0x00000000,
  154. .size = 512 * 1024,
  155. .mask_flags = MTD_WRITEABLE,
  156. },
  157. {
  158. .name = "bootenv",
  159. .offset = MTDPART_OFS_APPEND,
  160. .size = 512 * 1024,
  161. .mask_flags = MTD_WRITEABLE,
  162. },
  163. {
  164. .name = "kernel_ro",
  165. .offset = MTDPART_OFS_APPEND,
  166. .size = 8 * 1024 * 1024,
  167. .mask_flags = MTD_WRITEABLE,
  168. },
  169. {
  170. .name = "kernel",
  171. .offset = MTDPART_OFS_APPEND,
  172. .size = 8 * 1024 * 1024,
  173. },
  174. {
  175. .name = "data",
  176. .offset = MTDPART_OFS_APPEND,
  177. .size = MTDPART_SIZ_FULL,
  178. },
  179. };
  180. static struct physmap_flash_data nor_flash_data = {
  181. .width = 2,
  182. .parts = nor_flash_partitions,
  183. .nr_parts = ARRAY_SIZE(nor_flash_partitions),
  184. };
  185. static struct resource nor_flash_resources[] = {
  186. [0] = {
  187. .start = 0x20000000, /* CS0 shadow instead of regular CS0 */
  188. .end = 0x28000000 - 1, /* needed by USB MASK ROM boot */
  189. .flags = IORESOURCE_MEM,
  190. }
  191. };
  192. static struct platform_device nor_flash_device = {
  193. .name = "physmap-flash",
  194. .dev = {
  195. .platform_data = &nor_flash_data,
  196. },
  197. .num_resources = ARRAY_SIZE(nor_flash_resources),
  198. .resource = nor_flash_resources,
  199. };
  200. /* SMSC 9220 */
  201. static struct resource smc911x_resources[] = {
  202. {
  203. .start = 0x14000000,
  204. .end = 0x16000000 - 1,
  205. .flags = IORESOURCE_MEM,
  206. }, {
  207. .start = evt2irq(0x02c0) /* IRQ6A */,
  208. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL,
  209. },
  210. };
  211. static struct smsc911x_platform_config smsc911x_info = {
  212. .flags = SMSC911X_USE_16BIT | SMSC911X_SAVE_MAC_ADDRESS,
  213. .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
  214. .irq_type = SMSC911X_IRQ_TYPE_PUSH_PULL,
  215. };
  216. static struct platform_device smc911x_device = {
  217. .name = "smsc911x",
  218. .id = -1,
  219. .num_resources = ARRAY_SIZE(smc911x_resources),
  220. .resource = smc911x_resources,
  221. .dev = {
  222. .platform_data = &smsc911x_info,
  223. },
  224. };
  225. /*
  226. * The card detect pin of the top SD/MMC slot (CN7) is active low and is
  227. * connected to GPIO A22 of SH7372 (GPIO_PORT41).
  228. */
  229. static int slot_cn7_get_cd(struct platform_device *pdev)
  230. {
  231. return !gpio_get_value(GPIO_PORT41);
  232. }
  233. /* MERAM */
  234. static struct sh_mobile_meram_info meram_info = {
  235. .addr_mode = SH_MOBILE_MERAM_MODE1,
  236. };
  237. static struct resource meram_resources[] = {
  238. [0] = {
  239. .name = "MERAM",
  240. .start = 0xe8000000,
  241. .end = 0xe81fffff,
  242. .flags = IORESOURCE_MEM,
  243. },
  244. };
  245. static struct platform_device meram_device = {
  246. .name = "sh_mobile_meram",
  247. .id = 0,
  248. .num_resources = ARRAY_SIZE(meram_resources),
  249. .resource = meram_resources,
  250. .dev = {
  251. .platform_data = &meram_info,
  252. },
  253. };
  254. /* SH_MMCIF */
  255. static struct resource sh_mmcif_resources[] = {
  256. [0] = {
  257. .name = "MMCIF",
  258. .start = 0xE6BD0000,
  259. .end = 0xE6BD00FF,
  260. .flags = IORESOURCE_MEM,
  261. },
  262. [1] = {
  263. /* MMC ERR */
  264. .start = evt2irq(0x1ac0),
  265. .flags = IORESOURCE_IRQ,
  266. },
  267. [2] = {
  268. /* MMC NOR */
  269. .start = evt2irq(0x1ae0),
  270. .flags = IORESOURCE_IRQ,
  271. },
  272. };
  273. static struct sh_mmcif_plat_data sh_mmcif_plat = {
  274. .sup_pclk = 0,
  275. .ocr = MMC_VDD_165_195 | MMC_VDD_32_33 | MMC_VDD_33_34,
  276. .caps = MMC_CAP_4_BIT_DATA |
  277. MMC_CAP_8_BIT_DATA |
  278. MMC_CAP_NEEDS_POLL,
  279. .get_cd = slot_cn7_get_cd,
  280. .slave_id_tx = SHDMA_SLAVE_MMCIF_TX,
  281. .slave_id_rx = SHDMA_SLAVE_MMCIF_RX,
  282. };
  283. static struct platform_device sh_mmcif_device = {
  284. .name = "sh_mmcif",
  285. .id = 0,
  286. .dev = {
  287. .dma_mask = NULL,
  288. .coherent_dma_mask = 0xffffffff,
  289. .platform_data = &sh_mmcif_plat,
  290. },
  291. .num_resources = ARRAY_SIZE(sh_mmcif_resources),
  292. .resource = sh_mmcif_resources,
  293. };
  294. /* SDHI0 */
  295. static struct sh_mobile_sdhi_info sdhi0_info = {
  296. .dma_slave_tx = SHDMA_SLAVE_SDHI0_TX,
  297. .dma_slave_rx = SHDMA_SLAVE_SDHI0_RX,
  298. .tmio_caps = MMC_CAP_SDIO_IRQ,
  299. };
  300. static struct resource sdhi0_resources[] = {
  301. [0] = {
  302. .name = "SDHI0",
  303. .start = 0xe6850000,
  304. .end = 0xe68500ff,
  305. .flags = IORESOURCE_MEM,
  306. },
  307. [1] = {
  308. .start = evt2irq(0x0e00) /* SDHI0_SDHI0I0 */,
  309. .flags = IORESOURCE_IRQ,
  310. },
  311. [2] = {
  312. .start = evt2irq(0x0e20) /* SDHI0_SDHI0I1 */,
  313. .flags = IORESOURCE_IRQ,
  314. },
  315. [3] = {
  316. .start = evt2irq(0x0e40) /* SDHI0_SDHI0I2 */,
  317. .flags = IORESOURCE_IRQ,
  318. },
  319. };
  320. static struct platform_device sdhi0_device = {
  321. .name = "sh_mobile_sdhi",
  322. .num_resources = ARRAY_SIZE(sdhi0_resources),
  323. .resource = sdhi0_resources,
  324. .id = 0,
  325. .dev = {
  326. .platform_data = &sdhi0_info,
  327. },
  328. };
  329. /* SDHI1 */
  330. static struct sh_mobile_sdhi_info sdhi1_info = {
  331. .dma_slave_tx = SHDMA_SLAVE_SDHI1_TX,
  332. .dma_slave_rx = SHDMA_SLAVE_SDHI1_RX,
  333. .tmio_ocr_mask = MMC_VDD_165_195,
  334. .tmio_flags = TMIO_MMC_WRPROTECT_DISABLE,
  335. .tmio_caps = MMC_CAP_NEEDS_POLL | MMC_CAP_SDIO_IRQ,
  336. .get_cd = slot_cn7_get_cd,
  337. };
  338. static struct resource sdhi1_resources[] = {
  339. [0] = {
  340. .name = "SDHI1",
  341. .start = 0xe6860000,
  342. .end = 0xe68600ff,
  343. .flags = IORESOURCE_MEM,
  344. },
  345. [1] = {
  346. .start = evt2irq(0x0e80), /* SDHI1_SDHI1I0 */
  347. .flags = IORESOURCE_IRQ,
  348. },
  349. [2] = {
  350. .start = evt2irq(0x0ea0), /* SDHI1_SDHI1I1 */
  351. .flags = IORESOURCE_IRQ,
  352. },
  353. [3] = {
  354. .start = evt2irq(0x0ec0), /* SDHI1_SDHI1I2 */
  355. .flags = IORESOURCE_IRQ,
  356. },
  357. };
  358. static struct platform_device sdhi1_device = {
  359. .name = "sh_mobile_sdhi",
  360. .num_resources = ARRAY_SIZE(sdhi1_resources),
  361. .resource = sdhi1_resources,
  362. .id = 1,
  363. .dev = {
  364. .platform_data = &sdhi1_info,
  365. },
  366. };
  367. /* USB1 */
  368. static void usb1_host_port_power(int port, int power)
  369. {
  370. if (!power) /* only power-on supported for now */
  371. return;
  372. /* set VBOUT/PWEN and EXTLP1 in DVSTCTR */
  373. __raw_writew(__raw_readw(0xE68B0008) | 0x600, 0xE68B0008);
  374. }
  375. static struct r8a66597_platdata usb1_host_data = {
  376. .on_chip = 1,
  377. .port_power = usb1_host_port_power,
  378. };
  379. static struct resource usb1_host_resources[] = {
  380. [0] = {
  381. .name = "USBHS",
  382. .start = 0xE68B0000,
  383. .end = 0xE68B00E6 - 1,
  384. .flags = IORESOURCE_MEM,
  385. },
  386. [1] = {
  387. .start = evt2irq(0x1ce0) /* USB1_USB1I0 */,
  388. .flags = IORESOURCE_IRQ,
  389. },
  390. };
  391. static struct platform_device usb1_host_device = {
  392. .name = "r8a66597_hcd",
  393. .id = 1,
  394. .dev = {
  395. .dma_mask = NULL, /* not use dma */
  396. .coherent_dma_mask = 0xffffffff,
  397. .platform_data = &usb1_host_data,
  398. },
  399. .num_resources = ARRAY_SIZE(usb1_host_resources),
  400. .resource = usb1_host_resources,
  401. };
  402. static const struct fb_videomode ap4evb_lcdc_modes[] = {
  403. {
  404. #ifdef CONFIG_AP4EVB_QHD
  405. .name = "R63302(QHD)",
  406. .xres = 544,
  407. .yres = 961,
  408. .left_margin = 72,
  409. .right_margin = 600,
  410. .hsync_len = 16,
  411. .upper_margin = 8,
  412. .lower_margin = 8,
  413. .vsync_len = 2,
  414. .sync = FB_SYNC_VERT_HIGH_ACT | FB_SYNC_HOR_HIGH_ACT,
  415. #else
  416. .name = "WVGA Panel",
  417. .xres = 800,
  418. .yres = 480,
  419. .left_margin = 220,
  420. .right_margin = 110,
  421. .hsync_len = 70,
  422. .upper_margin = 20,
  423. .lower_margin = 5,
  424. .vsync_len = 5,
  425. .sync = 0,
  426. #endif
  427. },
  428. };
  429. static struct sh_mobile_meram_cfg lcd_meram_cfg = {
  430. .icb[0] = {
  431. .marker_icb = 28,
  432. .cache_icb = 24,
  433. .meram_offset = 0x0,
  434. .meram_size = 0x40,
  435. },
  436. .icb[1] = {
  437. .marker_icb = 29,
  438. .cache_icb = 25,
  439. .meram_offset = 0x40,
  440. .meram_size = 0x40,
  441. },
  442. };
  443. static struct sh_mobile_lcdc_info lcdc_info = {
  444. .meram_dev = &meram_info,
  445. .ch[0] = {
  446. .chan = LCDC_CHAN_MAINLCD,
  447. .fourcc = V4L2_PIX_FMT_RGB565,
  448. .lcd_cfg = ap4evb_lcdc_modes,
  449. .num_cfg = ARRAY_SIZE(ap4evb_lcdc_modes),
  450. .meram_cfg = &lcd_meram_cfg,
  451. }
  452. };
  453. static struct resource lcdc_resources[] = {
  454. [0] = {
  455. .name = "LCDC",
  456. .start = 0xfe940000, /* P4-only space */
  457. .end = 0xfe943fff,
  458. .flags = IORESOURCE_MEM,
  459. },
  460. [1] = {
  461. .start = intcs_evt2irq(0x580),
  462. .flags = IORESOURCE_IRQ,
  463. },
  464. };
  465. static struct platform_device lcdc_device = {
  466. .name = "sh_mobile_lcdc_fb",
  467. .num_resources = ARRAY_SIZE(lcdc_resources),
  468. .resource = lcdc_resources,
  469. .dev = {
  470. .platform_data = &lcdc_info,
  471. .coherent_dma_mask = ~0,
  472. },
  473. };
  474. /*
  475. * QHD display
  476. */
  477. #ifdef CONFIG_AP4EVB_QHD
  478. /* KEYSC (Needs SW43 set to ON) */
  479. static struct sh_keysc_info keysc_info = {
  480. .mode = SH_KEYSC_MODE_1,
  481. .scan_timing = 3,
  482. .delay = 2500,
  483. .keycodes = {
  484. KEY_0, KEY_1, KEY_2, KEY_3, KEY_4,
  485. KEY_5, KEY_6, KEY_7, KEY_8, KEY_9,
  486. KEY_A, KEY_B, KEY_C, KEY_D, KEY_E,
  487. KEY_F, KEY_G, KEY_H, KEY_I, KEY_J,
  488. KEY_K, KEY_L, KEY_M, KEY_N, KEY_O,
  489. },
  490. };
  491. static struct resource keysc_resources[] = {
  492. [0] = {
  493. .name = "KEYSC",
  494. .start = 0xe61b0000,
  495. .end = 0xe61b0063,
  496. .flags = IORESOURCE_MEM,
  497. },
  498. [1] = {
  499. .start = evt2irq(0x0be0), /* KEYSC_KEY */
  500. .flags = IORESOURCE_IRQ,
  501. },
  502. };
  503. static struct platform_device keysc_device = {
  504. .name = "sh_keysc",
  505. .id = 0, /* "keysc0" clock */
  506. .num_resources = ARRAY_SIZE(keysc_resources),
  507. .resource = keysc_resources,
  508. .dev = {
  509. .platform_data = &keysc_info,
  510. },
  511. };
  512. /* MIPI-DSI */
  513. #define PHYCTRL 0x0070
  514. static int sh_mipi_set_dot_clock(struct platform_device *pdev,
  515. void __iomem *base,
  516. int enable)
  517. {
  518. struct clk *pck = clk_get(&pdev->dev, "dsip_clk");
  519. void __iomem *phy = base + PHYCTRL;
  520. if (IS_ERR(pck))
  521. return PTR_ERR(pck);
  522. if (enable) {
  523. clk_set_rate(pck, clk_round_rate(pck, 24000000));
  524. iowrite32(ioread32(phy) | (0xb << 8), phy);
  525. clk_enable(pck);
  526. } else {
  527. clk_disable(pck);
  528. }
  529. clk_put(pck);
  530. return 0;
  531. }
  532. static struct resource mipidsi0_resources[] = {
  533. [0] = {
  534. .start = 0xffc60000,
  535. .end = 0xffc63073,
  536. .flags = IORESOURCE_MEM,
  537. },
  538. [1] = {
  539. .start = 0xffc68000,
  540. .end = 0xffc680ef,
  541. .flags = IORESOURCE_MEM,
  542. },
  543. };
  544. static struct sh_mipi_dsi_info mipidsi0_info = {
  545. .data_format = MIPI_RGB888,
  546. .lcd_chan = &lcdc_info.ch[0],
  547. .lane = 2,
  548. .vsynw_offset = 17,
  549. .flags = SH_MIPI_DSI_SYNC_PULSES_MODE |
  550. SH_MIPI_DSI_HSbyteCLK,
  551. .set_dot_clock = sh_mipi_set_dot_clock,
  552. };
  553. static struct platform_device mipidsi0_device = {
  554. .name = "sh-mipi-dsi",
  555. .num_resources = ARRAY_SIZE(mipidsi0_resources),
  556. .resource = mipidsi0_resources,
  557. .id = 0,
  558. .dev = {
  559. .platform_data = &mipidsi0_info,
  560. },
  561. };
  562. static struct platform_device *qhd_devices[] __initdata = {
  563. &mipidsi0_device,
  564. &keysc_device,
  565. };
  566. #endif /* CONFIG_AP4EVB_QHD */
  567. /* FSI */
  568. #define IRQ_FSI evt2irq(0x1840)
  569. static int __fsi_set_rate(struct clk *clk, long rate, int enable)
  570. {
  571. int ret = 0;
  572. if (rate <= 0)
  573. return ret;
  574. if (enable) {
  575. ret = clk_set_rate(clk, rate);
  576. if (0 == ret)
  577. ret = clk_enable(clk);
  578. } else {
  579. clk_disable(clk);
  580. }
  581. return ret;
  582. }
  583. static int __fsi_set_round_rate(struct clk *clk, long rate, int enable)
  584. {
  585. return __fsi_set_rate(clk, clk_round_rate(clk, rate), enable);
  586. }
  587. static int fsi_ak4642_set_rate(struct device *dev, int rate, int enable)
  588. {
  589. struct clk *fsia_ick;
  590. struct clk *fsiack;
  591. int ret = -EIO;
  592. fsia_ick = clk_get(dev, "icka");
  593. if (IS_ERR(fsia_ick))
  594. return PTR_ERR(fsia_ick);
  595. /*
  596. * FSIACK is connected to AK4642,
  597. * and use external clock pin from it.
  598. * it is parent of fsia_ick now.
  599. */
  600. fsiack = clk_get_parent(fsia_ick);
  601. if (!fsiack)
  602. goto fsia_ick_out;
  603. /*
  604. * we get 1/1 divided clock by setting same rate to fsiack and fsia_ick
  605. *
  606. ** FIXME **
  607. * Because the freq_table of external clk (fsiack) are all 0,
  608. * the return value of clk_round_rate became 0.
  609. * So, it use __fsi_set_rate here.
  610. */
  611. ret = __fsi_set_rate(fsiack, rate, enable);
  612. if (ret < 0)
  613. goto fsiack_out;
  614. ret = __fsi_set_round_rate(fsia_ick, rate, enable);
  615. if ((ret < 0) && enable)
  616. __fsi_set_round_rate(fsiack, rate, 0); /* disable FSI ACK */
  617. fsiack_out:
  618. clk_put(fsiack);
  619. fsia_ick_out:
  620. clk_put(fsia_ick);
  621. return 0;
  622. }
  623. static int fsi_hdmi_set_rate(struct device *dev, int rate, int enable)
  624. {
  625. struct clk *fsib_clk;
  626. struct clk *fdiv_clk = &sh7372_fsidivb_clk;
  627. long fsib_rate = 0;
  628. long fdiv_rate = 0;
  629. int ackmd_bpfmd;
  630. int ret;
  631. switch (rate) {
  632. case 44100:
  633. fsib_rate = rate * 256;
  634. ackmd_bpfmd = SH_FSI_ACKMD_256 | SH_FSI_BPFMD_64;
  635. break;
  636. case 48000:
  637. fsib_rate = 85428000; /* around 48kHz x 256 x 7 */
  638. fdiv_rate = rate * 256;
  639. ackmd_bpfmd = SH_FSI_ACKMD_256 | SH_FSI_BPFMD_64;
  640. break;
  641. default:
  642. pr_err("unsupported rate in FSI2 port B\n");
  643. return -EINVAL;
  644. }
  645. /* FSI B setting */
  646. fsib_clk = clk_get(dev, "ickb");
  647. if (IS_ERR(fsib_clk))
  648. return -EIO;
  649. ret = __fsi_set_round_rate(fsib_clk, fsib_rate, enable);
  650. if (ret < 0)
  651. goto fsi_set_rate_end;
  652. /* FSI DIV setting */
  653. ret = __fsi_set_round_rate(fdiv_clk, fdiv_rate, enable);
  654. if (ret < 0) {
  655. /* disable FSI B */
  656. if (enable)
  657. __fsi_set_round_rate(fsib_clk, fsib_rate, 0);
  658. goto fsi_set_rate_end;
  659. }
  660. ret = ackmd_bpfmd;
  661. fsi_set_rate_end:
  662. clk_put(fsib_clk);
  663. return ret;
  664. }
  665. static int fsi_set_rate(struct device *dev, int is_porta, int rate, int enable)
  666. {
  667. int ret;
  668. if (is_porta)
  669. ret = fsi_ak4642_set_rate(dev, rate, enable);
  670. else
  671. ret = fsi_hdmi_set_rate(dev, rate, enable);
  672. return ret;
  673. }
  674. static struct sh_fsi_platform_info fsi_info = {
  675. .porta_flags = SH_FSI_BRS_INV,
  676. .portb_flags = SH_FSI_BRS_INV |
  677. SH_FSI_BRM_INV |
  678. SH_FSI_LRS_INV |
  679. SH_FSI_FMT_SPDIF,
  680. .set_rate = fsi_set_rate,
  681. };
  682. static struct resource fsi_resources[] = {
  683. [0] = {
  684. .name = "FSI",
  685. .start = 0xFE3C0000,
  686. .end = 0xFE3C0400 - 1,
  687. .flags = IORESOURCE_MEM,
  688. },
  689. [1] = {
  690. .start = IRQ_FSI,
  691. .flags = IORESOURCE_IRQ,
  692. },
  693. };
  694. static struct platform_device fsi_device = {
  695. .name = "sh_fsi2",
  696. .id = -1,
  697. .num_resources = ARRAY_SIZE(fsi_resources),
  698. .resource = fsi_resources,
  699. .dev = {
  700. .platform_data = &fsi_info,
  701. },
  702. };
  703. static struct fsi_ak4642_info fsi2_ak4643_info = {
  704. .name = "AK4643",
  705. .card = "FSI2A-AK4643",
  706. .cpu_dai = "fsia-dai",
  707. .codec = "ak4642-codec.0-0013",
  708. .platform = "sh_fsi2",
  709. .id = FSI_PORT_A,
  710. };
  711. static struct platform_device fsi_ak4643_device = {
  712. .name = "fsi-ak4642-audio",
  713. .dev = {
  714. .platform_data = &fsi2_ak4643_info,
  715. },
  716. };
  717. static struct sh_mobile_meram_cfg hdmi_meram_cfg = {
  718. .icb[0] = {
  719. .marker_icb = 30,
  720. .cache_icb = 26,
  721. .meram_offset = 0x80,
  722. .meram_size = 0x100,
  723. },
  724. .icb[1] = {
  725. .marker_icb = 31,
  726. .cache_icb = 27,
  727. .meram_offset = 0x180,
  728. .meram_size = 0x100,
  729. },
  730. };
  731. static struct sh_mobile_lcdc_info sh_mobile_lcdc1_info = {
  732. .clock_source = LCDC_CLK_EXTERNAL,
  733. .meram_dev = &meram_info,
  734. .ch[0] = {
  735. .chan = LCDC_CHAN_MAINLCD,
  736. .fourcc = V4L2_PIX_FMT_RGB565,
  737. .interface_type = RGB24,
  738. .clock_divider = 1,
  739. .flags = LCDC_FLAGS_DWPOL,
  740. .meram_cfg = &hdmi_meram_cfg,
  741. }
  742. };
  743. static struct resource lcdc1_resources[] = {
  744. [0] = {
  745. .name = "LCDC1",
  746. .start = 0xfe944000,
  747. .end = 0xfe947fff,
  748. .flags = IORESOURCE_MEM,
  749. },
  750. [1] = {
  751. .start = intcs_evt2irq(0x1780),
  752. .flags = IORESOURCE_IRQ,
  753. },
  754. };
  755. static struct platform_device lcdc1_device = {
  756. .name = "sh_mobile_lcdc_fb",
  757. .num_resources = ARRAY_SIZE(lcdc1_resources),
  758. .resource = lcdc1_resources,
  759. .id = 1,
  760. .dev = {
  761. .platform_data = &sh_mobile_lcdc1_info,
  762. .coherent_dma_mask = ~0,
  763. },
  764. };
  765. static long ap4evb_clk_optimize(unsigned long target, unsigned long *best_freq,
  766. unsigned long *parent_freq);
  767. static struct sh_mobile_hdmi_info hdmi_info = {
  768. .lcd_chan = &sh_mobile_lcdc1_info.ch[0],
  769. .lcd_dev = &lcdc1_device.dev,
  770. .flags = HDMI_SND_SRC_SPDIF,
  771. .clk_optimize_parent = ap4evb_clk_optimize,
  772. };
  773. static struct resource hdmi_resources[] = {
  774. [0] = {
  775. .name = "HDMI",
  776. .start = 0xe6be0000,
  777. .end = 0xe6be00ff,
  778. .flags = IORESOURCE_MEM,
  779. },
  780. [1] = {
  781. /* There's also an HDMI interrupt on INTCS @ 0x18e0 */
  782. .start = evt2irq(0x17e0),
  783. .flags = IORESOURCE_IRQ,
  784. },
  785. };
  786. static struct platform_device hdmi_device = {
  787. .name = "sh-mobile-hdmi",
  788. .num_resources = ARRAY_SIZE(hdmi_resources),
  789. .resource = hdmi_resources,
  790. .id = -1,
  791. .dev = {
  792. .platform_data = &hdmi_info,
  793. },
  794. };
  795. static struct platform_device fsi_hdmi_device = {
  796. .name = "sh_fsi2_b_hdmi",
  797. };
  798. static long ap4evb_clk_optimize(unsigned long target, unsigned long *best_freq,
  799. unsigned long *parent_freq)
  800. {
  801. struct clk *hdmi_ick = clk_get(&hdmi_device.dev, "ick");
  802. long error;
  803. if (IS_ERR(hdmi_ick)) {
  804. int ret = PTR_ERR(hdmi_ick);
  805. pr_err("Cannot get HDMI ICK: %d\n", ret);
  806. return ret;
  807. }
  808. error = clk_round_parent(hdmi_ick, target, best_freq, parent_freq, 1, 64);
  809. clk_put(hdmi_ick);
  810. return error;
  811. }
  812. static struct gpio_led ap4evb_leds[] = {
  813. {
  814. .name = "led4",
  815. .gpio = GPIO_PORT185,
  816. .default_state = LEDS_GPIO_DEFSTATE_ON,
  817. },
  818. {
  819. .name = "led2",
  820. .gpio = GPIO_PORT186,
  821. .default_state = LEDS_GPIO_DEFSTATE_ON,
  822. },
  823. {
  824. .name = "led3",
  825. .gpio = GPIO_PORT187,
  826. .default_state = LEDS_GPIO_DEFSTATE_ON,
  827. },
  828. {
  829. .name = "led1",
  830. .gpio = GPIO_PORT188,
  831. .default_state = LEDS_GPIO_DEFSTATE_ON,
  832. }
  833. };
  834. static struct gpio_led_platform_data ap4evb_leds_pdata = {
  835. .num_leds = ARRAY_SIZE(ap4evb_leds),
  836. .leds = ap4evb_leds,
  837. };
  838. static struct platform_device leds_device = {
  839. .name = "leds-gpio",
  840. .id = 0,
  841. .dev = {
  842. .platform_data = &ap4evb_leds_pdata,
  843. },
  844. };
  845. static struct i2c_board_info imx074_info = {
  846. I2C_BOARD_INFO("imx074", 0x1a),
  847. };
  848. static struct soc_camera_link imx074_link = {
  849. .bus_id = 0,
  850. .board_info = &imx074_info,
  851. .i2c_adapter_id = 0,
  852. .module_name = "imx074",
  853. };
  854. static struct platform_device ap4evb_camera = {
  855. .name = "soc-camera-pdrv",
  856. .id = 0,
  857. .dev = {
  858. .platform_data = &imx074_link,
  859. },
  860. };
  861. static struct sh_csi2_client_config csi2_clients[] = {
  862. {
  863. .phy = SH_CSI2_PHY_MAIN,
  864. .lanes = 0, /* default: 2 lanes */
  865. .channel = 0,
  866. .pdev = &ap4evb_camera,
  867. },
  868. };
  869. static struct sh_csi2_pdata csi2_info = {
  870. .type = SH_CSI2C,
  871. .clients = csi2_clients,
  872. .num_clients = ARRAY_SIZE(csi2_clients),
  873. .flags = SH_CSI2_ECC | SH_CSI2_CRC,
  874. };
  875. static struct resource csi2_resources[] = {
  876. [0] = {
  877. .name = "CSI2",
  878. .start = 0xffc90000,
  879. .end = 0xffc90fff,
  880. .flags = IORESOURCE_MEM,
  881. },
  882. [1] = {
  883. .start = intcs_evt2irq(0x17a0),
  884. .flags = IORESOURCE_IRQ,
  885. },
  886. };
  887. static struct sh_mobile_ceu_companion csi2 = {
  888. .id = 0,
  889. .num_resources = ARRAY_SIZE(csi2_resources),
  890. .resource = csi2_resources,
  891. .platform_data = &csi2_info,
  892. };
  893. static struct sh_mobile_ceu_info sh_mobile_ceu_info = {
  894. .flags = SH_CEU_FLAG_USE_8BIT_BUS,
  895. .csi2 = &csi2,
  896. };
  897. static struct resource ceu_resources[] = {
  898. [0] = {
  899. .name = "CEU",
  900. .start = 0xfe910000,
  901. .end = 0xfe91009f,
  902. .flags = IORESOURCE_MEM,
  903. },
  904. [1] = {
  905. .start = intcs_evt2irq(0x880),
  906. .flags = IORESOURCE_IRQ,
  907. },
  908. [2] = {
  909. /* place holder for contiguous memory */
  910. },
  911. };
  912. static struct platform_device ceu_device = {
  913. .name = "sh_mobile_ceu",
  914. .id = 0, /* "ceu0" clock */
  915. .num_resources = ARRAY_SIZE(ceu_resources),
  916. .resource = ceu_resources,
  917. .dev = {
  918. .platform_data = &sh_mobile_ceu_info,
  919. .coherent_dma_mask = 0xffffffff,
  920. },
  921. };
  922. static struct platform_device *ap4evb_devices[] __initdata = {
  923. &leds_device,
  924. &nor_flash_device,
  925. &smc911x_device,
  926. &sdhi0_device,
  927. &sdhi1_device,
  928. &usb1_host_device,
  929. &fsi_device,
  930. &fsi_ak4643_device,
  931. &fsi_hdmi_device,
  932. &sh_mmcif_device,
  933. &lcdc1_device,
  934. &lcdc_device,
  935. &hdmi_device,
  936. &ceu_device,
  937. &ap4evb_camera,
  938. &meram_device,
  939. };
  940. static void __init hdmi_init_pm_clock(void)
  941. {
  942. struct clk *hdmi_ick = clk_get(&hdmi_device.dev, "ick");
  943. int ret;
  944. long rate;
  945. if (IS_ERR(hdmi_ick)) {
  946. ret = PTR_ERR(hdmi_ick);
  947. pr_err("Cannot get HDMI ICK: %d\n", ret);
  948. goto out;
  949. }
  950. ret = clk_set_parent(&sh7372_pllc2_clk, &sh7372_dv_clki_div2_clk);
  951. if (ret < 0) {
  952. pr_err("Cannot set PLLC2 parent: %d, %d users\n", ret, sh7372_pllc2_clk.usecount);
  953. goto out;
  954. }
  955. pr_debug("PLLC2 initial frequency %lu\n", clk_get_rate(&sh7372_pllc2_clk));
  956. rate = clk_round_rate(&sh7372_pllc2_clk, 594000000);
  957. if (rate < 0) {
  958. pr_err("Cannot get suitable rate: %ld\n", rate);
  959. ret = rate;
  960. goto out;
  961. }
  962. ret = clk_set_rate(&sh7372_pllc2_clk, rate);
  963. if (ret < 0) {
  964. pr_err("Cannot set rate %ld: %d\n", rate, ret);
  965. goto out;
  966. }
  967. pr_debug("PLLC2 set frequency %lu\n", rate);
  968. ret = clk_set_parent(hdmi_ick, &sh7372_pllc2_clk);
  969. if (ret < 0)
  970. pr_err("Cannot set HDMI parent: %d\n", ret);
  971. out:
  972. if (!IS_ERR(hdmi_ick))
  973. clk_put(hdmi_ick);
  974. }
  975. static void __init fsi_init_pm_clock(void)
  976. {
  977. struct clk *fsia_ick;
  978. int ret;
  979. fsia_ick = clk_get(&fsi_device.dev, "icka");
  980. if (IS_ERR(fsia_ick)) {
  981. ret = PTR_ERR(fsia_ick);
  982. pr_err("Cannot get FSI ICK: %d\n", ret);
  983. return;
  984. }
  985. ret = clk_set_parent(fsia_ick, &sh7372_fsiack_clk);
  986. if (ret < 0)
  987. pr_err("Cannot set FSI-A parent: %d\n", ret);
  988. clk_put(fsia_ick);
  989. }
  990. /*
  991. * FIXME !!
  992. *
  993. * gpio_no_direction
  994. * are quick_hack.
  995. *
  996. * current gpio frame work doesn't have
  997. * the method to control only pull up/down/free.
  998. * this function should be replaced by correct gpio function
  999. */
  1000. static void __init gpio_no_direction(u32 addr)
  1001. {
  1002. __raw_writeb(0x00, addr);
  1003. }
  1004. /* TouchScreen */
  1005. #ifdef CONFIG_AP4EVB_QHD
  1006. # define GPIO_TSC_IRQ GPIO_FN_IRQ28_123
  1007. # define GPIO_TSC_PORT GPIO_PORT123
  1008. #else /* WVGA */
  1009. # define GPIO_TSC_IRQ GPIO_FN_IRQ7_40
  1010. # define GPIO_TSC_PORT GPIO_PORT40
  1011. #endif
  1012. #define IRQ28 evt2irq(0x3380) /* IRQ28A */
  1013. #define IRQ7 evt2irq(0x02e0) /* IRQ7A */
  1014. static int ts_get_pendown_state(void)
  1015. {
  1016. int val;
  1017. gpio_free(GPIO_TSC_IRQ);
  1018. gpio_request(GPIO_TSC_PORT, NULL);
  1019. gpio_direction_input(GPIO_TSC_PORT);
  1020. val = gpio_get_value(GPIO_TSC_PORT);
  1021. gpio_request(GPIO_TSC_IRQ, NULL);
  1022. return !val;
  1023. }
  1024. static int ts_init(void)
  1025. {
  1026. gpio_request(GPIO_TSC_IRQ, NULL);
  1027. return 0;
  1028. }
  1029. static struct tsc2007_platform_data tsc2007_info = {
  1030. .model = 2007,
  1031. .x_plate_ohms = 180,
  1032. .get_pendown_state = ts_get_pendown_state,
  1033. .init_platform_hw = ts_init,
  1034. };
  1035. static struct i2c_board_info tsc_device = {
  1036. I2C_BOARD_INFO("tsc2007", 0x48),
  1037. .type = "tsc2007",
  1038. .platform_data = &tsc2007_info,
  1039. /*.irq is selected on ap4evb_init */
  1040. };
  1041. /* I2C */
  1042. static struct i2c_board_info i2c0_devices[] = {
  1043. {
  1044. I2C_BOARD_INFO("ak4643", 0x13),
  1045. },
  1046. };
  1047. static struct i2c_board_info i2c1_devices[] = {
  1048. {
  1049. I2C_BOARD_INFO("r2025sd", 0x32),
  1050. },
  1051. };
  1052. static struct map_desc ap4evb_io_desc[] __initdata = {
  1053. /* create a 1:1 entity map for 0xe6xxxxxx
  1054. * used by CPGA, INTC and PFC.
  1055. */
  1056. {
  1057. .virtual = 0xe6000000,
  1058. .pfn = __phys_to_pfn(0xe6000000),
  1059. .length = 256 << 20,
  1060. .type = MT_DEVICE_NONSHARED
  1061. },
  1062. };
  1063. static void __init ap4evb_map_io(void)
  1064. {
  1065. iotable_init(ap4evb_io_desc, ARRAY_SIZE(ap4evb_io_desc));
  1066. /* setup early devices and console here as well */
  1067. sh7372_add_early_devices();
  1068. shmobile_setup_console();
  1069. }
  1070. #define GPIO_PORT9CR 0xE6051009
  1071. #define GPIO_PORT10CR 0xE605100A
  1072. #define USCCR1 0xE6058144
  1073. static void __init ap4evb_init(void)
  1074. {
  1075. u32 srcr4;
  1076. struct clk *clk;
  1077. sh7372_pinmux_init();
  1078. /* enable SCIFA0 */
  1079. gpio_request(GPIO_FN_SCIFA0_TXD, NULL);
  1080. gpio_request(GPIO_FN_SCIFA0_RXD, NULL);
  1081. /* enable SMSC911X */
  1082. gpio_request(GPIO_FN_CS5A, NULL);
  1083. gpio_request(GPIO_FN_IRQ6_39, NULL);
  1084. /* enable Debug switch (S6) */
  1085. gpio_request(GPIO_PORT32, NULL);
  1086. gpio_request(GPIO_PORT33, NULL);
  1087. gpio_request(GPIO_PORT34, NULL);
  1088. gpio_request(GPIO_PORT35, NULL);
  1089. gpio_direction_input(GPIO_PORT32);
  1090. gpio_direction_input(GPIO_PORT33);
  1091. gpio_direction_input(GPIO_PORT34);
  1092. gpio_direction_input(GPIO_PORT35);
  1093. gpio_export(GPIO_PORT32, 0);
  1094. gpio_export(GPIO_PORT33, 0);
  1095. gpio_export(GPIO_PORT34, 0);
  1096. gpio_export(GPIO_PORT35, 0);
  1097. /* SDHI0 */
  1098. gpio_request(GPIO_FN_SDHICD0, NULL);
  1099. gpio_request(GPIO_FN_SDHIWP0, NULL);
  1100. gpio_request(GPIO_FN_SDHICMD0, NULL);
  1101. gpio_request(GPIO_FN_SDHICLK0, NULL);
  1102. gpio_request(GPIO_FN_SDHID0_3, NULL);
  1103. gpio_request(GPIO_FN_SDHID0_2, NULL);
  1104. gpio_request(GPIO_FN_SDHID0_1, NULL);
  1105. gpio_request(GPIO_FN_SDHID0_0, NULL);
  1106. /* SDHI1 */
  1107. gpio_request(GPIO_FN_SDHICMD1, NULL);
  1108. gpio_request(GPIO_FN_SDHICLK1, NULL);
  1109. gpio_request(GPIO_FN_SDHID1_3, NULL);
  1110. gpio_request(GPIO_FN_SDHID1_2, NULL);
  1111. gpio_request(GPIO_FN_SDHID1_1, NULL);
  1112. gpio_request(GPIO_FN_SDHID1_0, NULL);
  1113. /* MMCIF */
  1114. gpio_request(GPIO_FN_MMCD0_0, NULL);
  1115. gpio_request(GPIO_FN_MMCD0_1, NULL);
  1116. gpio_request(GPIO_FN_MMCD0_2, NULL);
  1117. gpio_request(GPIO_FN_MMCD0_3, NULL);
  1118. gpio_request(GPIO_FN_MMCD0_4, NULL);
  1119. gpio_request(GPIO_FN_MMCD0_5, NULL);
  1120. gpio_request(GPIO_FN_MMCD0_6, NULL);
  1121. gpio_request(GPIO_FN_MMCD0_7, NULL);
  1122. gpio_request(GPIO_FN_MMCCMD0, NULL);
  1123. gpio_request(GPIO_FN_MMCCLK0, NULL);
  1124. /* USB enable */
  1125. gpio_request(GPIO_FN_VBUS0_1, NULL);
  1126. gpio_request(GPIO_FN_IDIN_1_18, NULL);
  1127. gpio_request(GPIO_FN_PWEN_1_115, NULL);
  1128. gpio_request(GPIO_FN_OVCN_1_114, NULL);
  1129. gpio_request(GPIO_FN_EXTLP_1, NULL);
  1130. gpio_request(GPIO_FN_OVCN2_1, NULL);
  1131. /* setup USB phy */
  1132. __raw_writew(0x8a0a, 0xE6058130); /* USBCR4 */
  1133. /* enable FSI2 port A (ak4643) */
  1134. gpio_request(GPIO_FN_FSIAIBT, NULL);
  1135. gpio_request(GPIO_FN_FSIAILR, NULL);
  1136. gpio_request(GPIO_FN_FSIAISLD, NULL);
  1137. gpio_request(GPIO_FN_FSIAOSLD, NULL);
  1138. gpio_request(GPIO_PORT161, NULL);
  1139. gpio_direction_output(GPIO_PORT161, 0); /* slave */
  1140. gpio_request(GPIO_PORT9, NULL);
  1141. gpio_request(GPIO_PORT10, NULL);
  1142. gpio_no_direction(GPIO_PORT9CR); /* FSIAOBT needs no direction */
  1143. gpio_no_direction(GPIO_PORT10CR); /* FSIAOLR needs no direction */
  1144. /* card detect pin for MMC slot (CN7) */
  1145. gpio_request(GPIO_PORT41, NULL);
  1146. gpio_direction_input(GPIO_PORT41);
  1147. /* setup FSI2 port B (HDMI) */
  1148. gpio_request(GPIO_FN_FSIBCK, NULL);
  1149. __raw_writew(__raw_readw(USCCR1) & ~(1 << 6), USCCR1); /* use SPDIF */
  1150. /* set SPU2 clock to 119.6 MHz */
  1151. clk = clk_get(NULL, "spu_clk");
  1152. if (!IS_ERR(clk)) {
  1153. clk_set_rate(clk, clk_round_rate(clk, 119600000));
  1154. clk_put(clk);
  1155. }
  1156. /*
  1157. * set irq priority, to avoid sound chopping
  1158. * when NFS rootfs is used
  1159. * FSI(3) > SMSC911X(2)
  1160. */
  1161. intc_set_priority(IRQ_FSI, 3);
  1162. i2c_register_board_info(0, i2c0_devices,
  1163. ARRAY_SIZE(i2c0_devices));
  1164. i2c_register_board_info(1, i2c1_devices,
  1165. ARRAY_SIZE(i2c1_devices));
  1166. #ifdef CONFIG_AP4EVB_QHD
  1167. /*
  1168. * For QHD Panel (MIPI-DSI, CONFIG_AP4EVB_QHD=y) and
  1169. * IRQ28 for Touch Panel, set dip switches S3, S43 as OFF, ON.
  1170. */
  1171. /* enable KEYSC */
  1172. gpio_request(GPIO_FN_KEYOUT0, NULL);
  1173. gpio_request(GPIO_FN_KEYOUT1, NULL);
  1174. gpio_request(GPIO_FN_KEYOUT2, NULL);
  1175. gpio_request(GPIO_FN_KEYOUT3, NULL);
  1176. gpio_request(GPIO_FN_KEYOUT4, NULL);
  1177. gpio_request(GPIO_FN_KEYIN0_136, NULL);
  1178. gpio_request(GPIO_FN_KEYIN1_135, NULL);
  1179. gpio_request(GPIO_FN_KEYIN2_134, NULL);
  1180. gpio_request(GPIO_FN_KEYIN3_133, NULL);
  1181. gpio_request(GPIO_FN_KEYIN4, NULL);
  1182. /* enable TouchScreen */
  1183. irq_set_irq_type(IRQ28, IRQ_TYPE_LEVEL_LOW);
  1184. tsc_device.irq = IRQ28;
  1185. i2c_register_board_info(1, &tsc_device, 1);
  1186. /* LCDC0 */
  1187. lcdc_info.clock_source = LCDC_CLK_PERIPHERAL;
  1188. lcdc_info.ch[0].interface_type = RGB24;
  1189. lcdc_info.ch[0].clock_divider = 1;
  1190. lcdc_info.ch[0].flags = LCDC_FLAGS_DWPOL;
  1191. lcdc_info.ch[0].lcd_size_cfg.width = 44;
  1192. lcdc_info.ch[0].lcd_size_cfg.height = 79;
  1193. platform_add_devices(qhd_devices, ARRAY_SIZE(qhd_devices));
  1194. #else
  1195. /*
  1196. * For WVGA Panel (18-bit RGB, CONFIG_AP4EVB_WVGA=y) and
  1197. * IRQ7 for Touch Panel, set dip switches S3, S43 to ON, OFF.
  1198. */
  1199. gpio_request(GPIO_FN_LCDD17, NULL);
  1200. gpio_request(GPIO_FN_LCDD16, NULL);
  1201. gpio_request(GPIO_FN_LCDD15, NULL);
  1202. gpio_request(GPIO_FN_LCDD14, NULL);
  1203. gpio_request(GPIO_FN_LCDD13, NULL);
  1204. gpio_request(GPIO_FN_LCDD12, NULL);
  1205. gpio_request(GPIO_FN_LCDD11, NULL);
  1206. gpio_request(GPIO_FN_LCDD10, NULL);
  1207. gpio_request(GPIO_FN_LCDD9, NULL);
  1208. gpio_request(GPIO_FN_LCDD8, NULL);
  1209. gpio_request(GPIO_FN_LCDD7, NULL);
  1210. gpio_request(GPIO_FN_LCDD6, NULL);
  1211. gpio_request(GPIO_FN_LCDD5, NULL);
  1212. gpio_request(GPIO_FN_LCDD4, NULL);
  1213. gpio_request(GPIO_FN_LCDD3, NULL);
  1214. gpio_request(GPIO_FN_LCDD2, NULL);
  1215. gpio_request(GPIO_FN_LCDD1, NULL);
  1216. gpio_request(GPIO_FN_LCDD0, NULL);
  1217. gpio_request(GPIO_FN_LCDDISP, NULL);
  1218. gpio_request(GPIO_FN_LCDDCK, NULL);
  1219. gpio_request(GPIO_PORT189, NULL); /* backlight */
  1220. gpio_direction_output(GPIO_PORT189, 1);
  1221. gpio_request(GPIO_PORT151, NULL); /* LCDDON */
  1222. gpio_direction_output(GPIO_PORT151, 1);
  1223. lcdc_info.clock_source = LCDC_CLK_BUS;
  1224. lcdc_info.ch[0].interface_type = RGB18;
  1225. lcdc_info.ch[0].clock_divider = 3;
  1226. lcdc_info.ch[0].flags = 0;
  1227. lcdc_info.ch[0].lcd_size_cfg.width = 152;
  1228. lcdc_info.ch[0].lcd_size_cfg.height = 91;
  1229. /* enable TouchScreen */
  1230. irq_set_irq_type(IRQ7, IRQ_TYPE_LEVEL_LOW);
  1231. tsc_device.irq = IRQ7;
  1232. i2c_register_board_info(0, &tsc_device, 1);
  1233. #endif /* CONFIG_AP4EVB_QHD */
  1234. /* CEU */
  1235. /*
  1236. * TODO: reserve memory for V4L2 DMA buffers, when a suitable API
  1237. * becomes available
  1238. */
  1239. /* MIPI-CSI stuff */
  1240. gpio_request(GPIO_FN_VIO_CKO, NULL);
  1241. clk = clk_get(NULL, "vck1_clk");
  1242. if (!IS_ERR(clk)) {
  1243. clk_set_rate(clk, clk_round_rate(clk, 13000000));
  1244. clk_enable(clk);
  1245. clk_put(clk);
  1246. }
  1247. sh7372_add_standard_devices();
  1248. /* HDMI */
  1249. gpio_request(GPIO_FN_HDMI_HPD, NULL);
  1250. gpio_request(GPIO_FN_HDMI_CEC, NULL);
  1251. /* Reset HDMI, must be held at least one EXTALR (32768Hz) period */
  1252. #define SRCR4 0xe61580bc
  1253. srcr4 = __raw_readl(SRCR4);
  1254. __raw_writel(srcr4 | (1 << 13), SRCR4);
  1255. udelay(50);
  1256. __raw_writel(srcr4 & ~(1 << 13), SRCR4);
  1257. platform_add_devices(ap4evb_devices, ARRAY_SIZE(ap4evb_devices));
  1258. sh7372_add_device_to_domain(&sh7372_a4lc, &lcdc1_device);
  1259. sh7372_add_device_to_domain(&sh7372_a4lc, &lcdc_device);
  1260. sh7372_add_device_to_domain(&sh7372_a4mp, &fsi_device);
  1261. sh7372_add_device_to_domain(&sh7372_a3sp, &sh_mmcif_device);
  1262. sh7372_add_device_to_domain(&sh7372_a3sp, &sdhi0_device);
  1263. sh7372_add_device_to_domain(&sh7372_a3sp, &sdhi1_device);
  1264. sh7372_add_device_to_domain(&sh7372_a4r, &ceu_device);
  1265. hdmi_init_pm_clock();
  1266. fsi_init_pm_clock();
  1267. sh7372_pm_init();
  1268. pm_clk_add(&fsi_device.dev, "spu2");
  1269. pm_clk_add(&lcdc1_device.dev, "hdmi");
  1270. }
  1271. static void __init ap4evb_timer_init(void)
  1272. {
  1273. sh7372_clock_init();
  1274. shmobile_timer.init();
  1275. /* External clock source */
  1276. clk_set_rate(&sh7372_dv_clki_clk, 27000000);
  1277. }
  1278. static struct sys_timer ap4evb_timer = {
  1279. .init = ap4evb_timer_init,
  1280. };
  1281. MACHINE_START(AP4EVB, "ap4evb")
  1282. .map_io = ap4evb_map_io,
  1283. .init_irq = sh7372_init_irq,
  1284. .handle_irq = shmobile_handle_irq_intc,
  1285. .init_machine = ap4evb_init,
  1286. .timer = &ap4evb_timer,
  1287. MACHINE_END