bnx2x_stats.c 58 KB

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  1. /* bnx2x_stats.c: Broadcom Everest network driver.
  2. *
  3. * Copyright (c) 2007-2012 Broadcom Corporation
  4. *
  5. * This program is free software; you can redistribute it and/or modify
  6. * it under the terms of the GNU General Public License as published by
  7. * the Free Software Foundation.
  8. *
  9. * Maintained by: Eilon Greenstein <eilong@broadcom.com>
  10. * Written by: Eliezer Tamir
  11. * Based on code from Michael Chan's bnx2 driver
  12. * UDP CSUM errata workaround by Arik Gendelman
  13. * Slowpath and fastpath rework by Vladislav Zolotarov
  14. * Statistics and Link management by Yitchak Gertner
  15. *
  16. */
  17. #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  18. #include "bnx2x_stats.h"
  19. #include "bnx2x_cmn.h"
  20. /* Statistics */
  21. /*
  22. * General service functions
  23. */
  24. static inline long bnx2x_hilo(u32 *hiref)
  25. {
  26. u32 lo = *(hiref + 1);
  27. #if (BITS_PER_LONG == 64)
  28. u32 hi = *hiref;
  29. return HILO_U64(hi, lo);
  30. #else
  31. return lo;
  32. #endif
  33. }
  34. static u16 bnx2x_get_port_stats_dma_len(struct bnx2x *bp)
  35. {
  36. u16 res = sizeof(struct host_port_stats) >> 2;
  37. /* if PFC stats are not supported by the MFW, don't DMA them */
  38. if (!(bp->flags & BC_SUPPORTS_PFC_STATS))
  39. res -= (sizeof(u32)*4) >> 2;
  40. return res;
  41. }
  42. /*
  43. * Init service functions
  44. */
  45. /* Post the next statistics ramrod. Protect it with the spin in
  46. * order to ensure the strict order between statistics ramrods
  47. * (each ramrod has a sequence number passed in a
  48. * bp->fw_stats_req->hdr.drv_stats_counter and ramrods must be
  49. * sent in order).
  50. */
  51. static void bnx2x_storm_stats_post(struct bnx2x *bp)
  52. {
  53. if (!bp->stats_pending) {
  54. int rc;
  55. spin_lock_bh(&bp->stats_lock);
  56. if (bp->stats_pending) {
  57. spin_unlock_bh(&bp->stats_lock);
  58. return;
  59. }
  60. bp->fw_stats_req->hdr.drv_stats_counter =
  61. cpu_to_le16(bp->stats_counter++);
  62. DP(BNX2X_MSG_STATS, "Sending statistics ramrod %d\n",
  63. bp->fw_stats_req->hdr.drv_stats_counter);
  64. /* send FW stats ramrod */
  65. rc = bnx2x_sp_post(bp, RAMROD_CMD_ID_COMMON_STAT_QUERY, 0,
  66. U64_HI(bp->fw_stats_req_mapping),
  67. U64_LO(bp->fw_stats_req_mapping),
  68. NONE_CONNECTION_TYPE);
  69. if (rc == 0)
  70. bp->stats_pending = 1;
  71. spin_unlock_bh(&bp->stats_lock);
  72. }
  73. }
  74. static void bnx2x_hw_stats_post(struct bnx2x *bp)
  75. {
  76. struct dmae_command *dmae = &bp->stats_dmae;
  77. u32 *stats_comp = bnx2x_sp(bp, stats_comp);
  78. *stats_comp = DMAE_COMP_VAL;
  79. if (CHIP_REV_IS_SLOW(bp))
  80. return;
  81. /* Update MCP's statistics if possible */
  82. if (bp->func_stx)
  83. memcpy(bnx2x_sp(bp, func_stats), &bp->func_stats,
  84. sizeof(bp->func_stats));
  85. /* loader */
  86. if (bp->executer_idx) {
  87. int loader_idx = PMF_DMAE_C(bp);
  88. u32 opcode = bnx2x_dmae_opcode(bp, DMAE_SRC_PCI, DMAE_DST_GRC,
  89. true, DMAE_COMP_GRC);
  90. opcode = bnx2x_dmae_opcode_clr_src_reset(opcode);
  91. memset(dmae, 0, sizeof(struct dmae_command));
  92. dmae->opcode = opcode;
  93. dmae->src_addr_lo = U64_LO(bnx2x_sp_mapping(bp, dmae[0]));
  94. dmae->src_addr_hi = U64_HI(bnx2x_sp_mapping(bp, dmae[0]));
  95. dmae->dst_addr_lo = (DMAE_REG_CMD_MEM +
  96. sizeof(struct dmae_command) *
  97. (loader_idx + 1)) >> 2;
  98. dmae->dst_addr_hi = 0;
  99. dmae->len = sizeof(struct dmae_command) >> 2;
  100. if (CHIP_IS_E1(bp))
  101. dmae->len--;
  102. dmae->comp_addr_lo = dmae_reg_go_c[loader_idx + 1] >> 2;
  103. dmae->comp_addr_hi = 0;
  104. dmae->comp_val = 1;
  105. *stats_comp = 0;
  106. bnx2x_post_dmae(bp, dmae, loader_idx);
  107. } else if (bp->func_stx) {
  108. *stats_comp = 0;
  109. bnx2x_post_dmae(bp, dmae, INIT_DMAE_C(bp));
  110. }
  111. }
  112. static int bnx2x_stats_comp(struct bnx2x *bp)
  113. {
  114. u32 *stats_comp = bnx2x_sp(bp, stats_comp);
  115. int cnt = 10;
  116. might_sleep();
  117. while (*stats_comp != DMAE_COMP_VAL) {
  118. if (!cnt) {
  119. BNX2X_ERR("timeout waiting for stats finished\n");
  120. break;
  121. }
  122. cnt--;
  123. usleep_range(1000, 1000);
  124. }
  125. return 1;
  126. }
  127. /*
  128. * Statistics service functions
  129. */
  130. static void bnx2x_stats_pmf_update(struct bnx2x *bp)
  131. {
  132. struct dmae_command *dmae;
  133. u32 opcode;
  134. int loader_idx = PMF_DMAE_C(bp);
  135. u32 *stats_comp = bnx2x_sp(bp, stats_comp);
  136. /* sanity */
  137. if (!bp->port.pmf || !bp->port.port_stx) {
  138. BNX2X_ERR("BUG!\n");
  139. return;
  140. }
  141. bp->executer_idx = 0;
  142. opcode = bnx2x_dmae_opcode(bp, DMAE_SRC_GRC, DMAE_DST_PCI, false, 0);
  143. dmae = bnx2x_sp(bp, dmae[bp->executer_idx++]);
  144. dmae->opcode = bnx2x_dmae_opcode_add_comp(opcode, DMAE_COMP_GRC);
  145. dmae->src_addr_lo = bp->port.port_stx >> 2;
  146. dmae->src_addr_hi = 0;
  147. dmae->dst_addr_lo = U64_LO(bnx2x_sp_mapping(bp, port_stats));
  148. dmae->dst_addr_hi = U64_HI(bnx2x_sp_mapping(bp, port_stats));
  149. dmae->len = DMAE_LEN32_RD_MAX;
  150. dmae->comp_addr_lo = dmae_reg_go_c[loader_idx] >> 2;
  151. dmae->comp_addr_hi = 0;
  152. dmae->comp_val = 1;
  153. dmae = bnx2x_sp(bp, dmae[bp->executer_idx++]);
  154. dmae->opcode = bnx2x_dmae_opcode_add_comp(opcode, DMAE_COMP_PCI);
  155. dmae->src_addr_lo = (bp->port.port_stx >> 2) + DMAE_LEN32_RD_MAX;
  156. dmae->src_addr_hi = 0;
  157. dmae->dst_addr_lo = U64_LO(bnx2x_sp_mapping(bp, port_stats) +
  158. DMAE_LEN32_RD_MAX * 4);
  159. dmae->dst_addr_hi = U64_HI(bnx2x_sp_mapping(bp, port_stats) +
  160. DMAE_LEN32_RD_MAX * 4);
  161. dmae->len = bnx2x_get_port_stats_dma_len(bp) - DMAE_LEN32_RD_MAX;
  162. dmae->comp_addr_lo = U64_LO(bnx2x_sp_mapping(bp, stats_comp));
  163. dmae->comp_addr_hi = U64_HI(bnx2x_sp_mapping(bp, stats_comp));
  164. dmae->comp_val = DMAE_COMP_VAL;
  165. *stats_comp = 0;
  166. bnx2x_hw_stats_post(bp);
  167. bnx2x_stats_comp(bp);
  168. }
  169. static void bnx2x_port_stats_init(struct bnx2x *bp)
  170. {
  171. struct dmae_command *dmae;
  172. int port = BP_PORT(bp);
  173. u32 opcode;
  174. int loader_idx = PMF_DMAE_C(bp);
  175. u32 mac_addr;
  176. u32 *stats_comp = bnx2x_sp(bp, stats_comp);
  177. /* sanity */
  178. if (!bp->link_vars.link_up || !bp->port.pmf) {
  179. BNX2X_ERR("BUG!\n");
  180. return;
  181. }
  182. bp->executer_idx = 0;
  183. /* MCP */
  184. opcode = bnx2x_dmae_opcode(bp, DMAE_SRC_PCI, DMAE_DST_GRC,
  185. true, DMAE_COMP_GRC);
  186. if (bp->port.port_stx) {
  187. dmae = bnx2x_sp(bp, dmae[bp->executer_idx++]);
  188. dmae->opcode = opcode;
  189. dmae->src_addr_lo = U64_LO(bnx2x_sp_mapping(bp, port_stats));
  190. dmae->src_addr_hi = U64_HI(bnx2x_sp_mapping(bp, port_stats));
  191. dmae->dst_addr_lo = bp->port.port_stx >> 2;
  192. dmae->dst_addr_hi = 0;
  193. dmae->len = bnx2x_get_port_stats_dma_len(bp);
  194. dmae->comp_addr_lo = dmae_reg_go_c[loader_idx] >> 2;
  195. dmae->comp_addr_hi = 0;
  196. dmae->comp_val = 1;
  197. }
  198. if (bp->func_stx) {
  199. dmae = bnx2x_sp(bp, dmae[bp->executer_idx++]);
  200. dmae->opcode = opcode;
  201. dmae->src_addr_lo = U64_LO(bnx2x_sp_mapping(bp, func_stats));
  202. dmae->src_addr_hi = U64_HI(bnx2x_sp_mapping(bp, func_stats));
  203. dmae->dst_addr_lo = bp->func_stx >> 2;
  204. dmae->dst_addr_hi = 0;
  205. dmae->len = sizeof(struct host_func_stats) >> 2;
  206. dmae->comp_addr_lo = dmae_reg_go_c[loader_idx] >> 2;
  207. dmae->comp_addr_hi = 0;
  208. dmae->comp_val = 1;
  209. }
  210. /* MAC */
  211. opcode = bnx2x_dmae_opcode(bp, DMAE_SRC_GRC, DMAE_DST_PCI,
  212. true, DMAE_COMP_GRC);
  213. /* EMAC is special */
  214. if (bp->link_vars.mac_type == MAC_TYPE_EMAC) {
  215. mac_addr = (port ? GRCBASE_EMAC1 : GRCBASE_EMAC0);
  216. /* EMAC_REG_EMAC_RX_STAT_AC (EMAC_REG_EMAC_RX_STAT_AC_COUNT)*/
  217. dmae = bnx2x_sp(bp, dmae[bp->executer_idx++]);
  218. dmae->opcode = opcode;
  219. dmae->src_addr_lo = (mac_addr +
  220. EMAC_REG_EMAC_RX_STAT_AC) >> 2;
  221. dmae->src_addr_hi = 0;
  222. dmae->dst_addr_lo = U64_LO(bnx2x_sp_mapping(bp, mac_stats));
  223. dmae->dst_addr_hi = U64_HI(bnx2x_sp_mapping(bp, mac_stats));
  224. dmae->len = EMAC_REG_EMAC_RX_STAT_AC_COUNT;
  225. dmae->comp_addr_lo = dmae_reg_go_c[loader_idx] >> 2;
  226. dmae->comp_addr_hi = 0;
  227. dmae->comp_val = 1;
  228. /* EMAC_REG_EMAC_RX_STAT_AC_28 */
  229. dmae = bnx2x_sp(bp, dmae[bp->executer_idx++]);
  230. dmae->opcode = opcode;
  231. dmae->src_addr_lo = (mac_addr +
  232. EMAC_REG_EMAC_RX_STAT_AC_28) >> 2;
  233. dmae->src_addr_hi = 0;
  234. dmae->dst_addr_lo = U64_LO(bnx2x_sp_mapping(bp, mac_stats) +
  235. offsetof(struct emac_stats, rx_stat_falsecarriererrors));
  236. dmae->dst_addr_hi = U64_HI(bnx2x_sp_mapping(bp, mac_stats) +
  237. offsetof(struct emac_stats, rx_stat_falsecarriererrors));
  238. dmae->len = 1;
  239. dmae->comp_addr_lo = dmae_reg_go_c[loader_idx] >> 2;
  240. dmae->comp_addr_hi = 0;
  241. dmae->comp_val = 1;
  242. /* EMAC_REG_EMAC_TX_STAT_AC (EMAC_REG_EMAC_TX_STAT_AC_COUNT)*/
  243. dmae = bnx2x_sp(bp, dmae[bp->executer_idx++]);
  244. dmae->opcode = opcode;
  245. dmae->src_addr_lo = (mac_addr +
  246. EMAC_REG_EMAC_TX_STAT_AC) >> 2;
  247. dmae->src_addr_hi = 0;
  248. dmae->dst_addr_lo = U64_LO(bnx2x_sp_mapping(bp, mac_stats) +
  249. offsetof(struct emac_stats, tx_stat_ifhcoutoctets));
  250. dmae->dst_addr_hi = U64_HI(bnx2x_sp_mapping(bp, mac_stats) +
  251. offsetof(struct emac_stats, tx_stat_ifhcoutoctets));
  252. dmae->len = EMAC_REG_EMAC_TX_STAT_AC_COUNT;
  253. dmae->comp_addr_lo = dmae_reg_go_c[loader_idx] >> 2;
  254. dmae->comp_addr_hi = 0;
  255. dmae->comp_val = 1;
  256. } else {
  257. u32 tx_src_addr_lo, rx_src_addr_lo;
  258. u16 rx_len, tx_len;
  259. /* configure the params according to MAC type */
  260. switch (bp->link_vars.mac_type) {
  261. case MAC_TYPE_BMAC:
  262. mac_addr = (port ? NIG_REG_INGRESS_BMAC1_MEM :
  263. NIG_REG_INGRESS_BMAC0_MEM);
  264. /* BIGMAC_REGISTER_TX_STAT_GTPKT ..
  265. BIGMAC_REGISTER_TX_STAT_GTBYT */
  266. if (CHIP_IS_E1x(bp)) {
  267. tx_src_addr_lo = (mac_addr +
  268. BIGMAC_REGISTER_TX_STAT_GTPKT) >> 2;
  269. tx_len = (8 + BIGMAC_REGISTER_TX_STAT_GTBYT -
  270. BIGMAC_REGISTER_TX_STAT_GTPKT) >> 2;
  271. rx_src_addr_lo = (mac_addr +
  272. BIGMAC_REGISTER_RX_STAT_GR64) >> 2;
  273. rx_len = (8 + BIGMAC_REGISTER_RX_STAT_GRIPJ -
  274. BIGMAC_REGISTER_RX_STAT_GR64) >> 2;
  275. } else {
  276. tx_src_addr_lo = (mac_addr +
  277. BIGMAC2_REGISTER_TX_STAT_GTPOK) >> 2;
  278. tx_len = (8 + BIGMAC2_REGISTER_TX_STAT_GTBYT -
  279. BIGMAC2_REGISTER_TX_STAT_GTPOK) >> 2;
  280. rx_src_addr_lo = (mac_addr +
  281. BIGMAC2_REGISTER_RX_STAT_GR64) >> 2;
  282. rx_len = (8 + BIGMAC2_REGISTER_RX_STAT_GRIPJ -
  283. BIGMAC2_REGISTER_RX_STAT_GR64) >> 2;
  284. }
  285. break;
  286. case MAC_TYPE_UMAC: /* handled by MSTAT */
  287. case MAC_TYPE_XMAC: /* handled by MSTAT */
  288. default:
  289. mac_addr = port ? GRCBASE_MSTAT1 : GRCBASE_MSTAT0;
  290. tx_src_addr_lo = (mac_addr +
  291. MSTAT_REG_TX_STAT_GTXPOK_LO) >> 2;
  292. rx_src_addr_lo = (mac_addr +
  293. MSTAT_REG_RX_STAT_GR64_LO) >> 2;
  294. tx_len = sizeof(bp->slowpath->
  295. mac_stats.mstat_stats.stats_tx) >> 2;
  296. rx_len = sizeof(bp->slowpath->
  297. mac_stats.mstat_stats.stats_rx) >> 2;
  298. break;
  299. }
  300. /* TX stats */
  301. dmae = bnx2x_sp(bp, dmae[bp->executer_idx++]);
  302. dmae->opcode = opcode;
  303. dmae->src_addr_lo = tx_src_addr_lo;
  304. dmae->src_addr_hi = 0;
  305. dmae->len = tx_len;
  306. dmae->dst_addr_lo = U64_LO(bnx2x_sp_mapping(bp, mac_stats));
  307. dmae->dst_addr_hi = U64_HI(bnx2x_sp_mapping(bp, mac_stats));
  308. dmae->comp_addr_lo = dmae_reg_go_c[loader_idx] >> 2;
  309. dmae->comp_addr_hi = 0;
  310. dmae->comp_val = 1;
  311. /* RX stats */
  312. dmae = bnx2x_sp(bp, dmae[bp->executer_idx++]);
  313. dmae->opcode = opcode;
  314. dmae->src_addr_hi = 0;
  315. dmae->src_addr_lo = rx_src_addr_lo;
  316. dmae->dst_addr_lo =
  317. U64_LO(bnx2x_sp_mapping(bp, mac_stats) + (tx_len << 2));
  318. dmae->dst_addr_hi =
  319. U64_HI(bnx2x_sp_mapping(bp, mac_stats) + (tx_len << 2));
  320. dmae->len = rx_len;
  321. dmae->comp_addr_lo = dmae_reg_go_c[loader_idx] >> 2;
  322. dmae->comp_addr_hi = 0;
  323. dmae->comp_val = 1;
  324. }
  325. /* NIG */
  326. if (!CHIP_IS_E3(bp)) {
  327. dmae = bnx2x_sp(bp, dmae[bp->executer_idx++]);
  328. dmae->opcode = opcode;
  329. dmae->src_addr_lo = (port ? NIG_REG_STAT1_EGRESS_MAC_PKT0 :
  330. NIG_REG_STAT0_EGRESS_MAC_PKT0) >> 2;
  331. dmae->src_addr_hi = 0;
  332. dmae->dst_addr_lo = U64_LO(bnx2x_sp_mapping(bp, nig_stats) +
  333. offsetof(struct nig_stats, egress_mac_pkt0_lo));
  334. dmae->dst_addr_hi = U64_HI(bnx2x_sp_mapping(bp, nig_stats) +
  335. offsetof(struct nig_stats, egress_mac_pkt0_lo));
  336. dmae->len = (2*sizeof(u32)) >> 2;
  337. dmae->comp_addr_lo = dmae_reg_go_c[loader_idx] >> 2;
  338. dmae->comp_addr_hi = 0;
  339. dmae->comp_val = 1;
  340. dmae = bnx2x_sp(bp, dmae[bp->executer_idx++]);
  341. dmae->opcode = opcode;
  342. dmae->src_addr_lo = (port ? NIG_REG_STAT1_EGRESS_MAC_PKT1 :
  343. NIG_REG_STAT0_EGRESS_MAC_PKT1) >> 2;
  344. dmae->src_addr_hi = 0;
  345. dmae->dst_addr_lo = U64_LO(bnx2x_sp_mapping(bp, nig_stats) +
  346. offsetof(struct nig_stats, egress_mac_pkt1_lo));
  347. dmae->dst_addr_hi = U64_HI(bnx2x_sp_mapping(bp, nig_stats) +
  348. offsetof(struct nig_stats, egress_mac_pkt1_lo));
  349. dmae->len = (2*sizeof(u32)) >> 2;
  350. dmae->comp_addr_lo = dmae_reg_go_c[loader_idx] >> 2;
  351. dmae->comp_addr_hi = 0;
  352. dmae->comp_val = 1;
  353. }
  354. dmae = bnx2x_sp(bp, dmae[bp->executer_idx++]);
  355. dmae->opcode = bnx2x_dmae_opcode(bp, DMAE_SRC_GRC, DMAE_DST_PCI,
  356. true, DMAE_COMP_PCI);
  357. dmae->src_addr_lo = (port ? NIG_REG_STAT1_BRB_DISCARD :
  358. NIG_REG_STAT0_BRB_DISCARD) >> 2;
  359. dmae->src_addr_hi = 0;
  360. dmae->dst_addr_lo = U64_LO(bnx2x_sp_mapping(bp, nig_stats));
  361. dmae->dst_addr_hi = U64_HI(bnx2x_sp_mapping(bp, nig_stats));
  362. dmae->len = (sizeof(struct nig_stats) - 4*sizeof(u32)) >> 2;
  363. dmae->comp_addr_lo = U64_LO(bnx2x_sp_mapping(bp, stats_comp));
  364. dmae->comp_addr_hi = U64_HI(bnx2x_sp_mapping(bp, stats_comp));
  365. dmae->comp_val = DMAE_COMP_VAL;
  366. *stats_comp = 0;
  367. }
  368. static void bnx2x_func_stats_init(struct bnx2x *bp)
  369. {
  370. struct dmae_command *dmae = &bp->stats_dmae;
  371. u32 *stats_comp = bnx2x_sp(bp, stats_comp);
  372. /* sanity */
  373. if (!bp->func_stx) {
  374. BNX2X_ERR("BUG!\n");
  375. return;
  376. }
  377. bp->executer_idx = 0;
  378. memset(dmae, 0, sizeof(struct dmae_command));
  379. dmae->opcode = bnx2x_dmae_opcode(bp, DMAE_SRC_PCI, DMAE_DST_GRC,
  380. true, DMAE_COMP_PCI);
  381. dmae->src_addr_lo = U64_LO(bnx2x_sp_mapping(bp, func_stats));
  382. dmae->src_addr_hi = U64_HI(bnx2x_sp_mapping(bp, func_stats));
  383. dmae->dst_addr_lo = bp->func_stx >> 2;
  384. dmae->dst_addr_hi = 0;
  385. dmae->len = sizeof(struct host_func_stats) >> 2;
  386. dmae->comp_addr_lo = U64_LO(bnx2x_sp_mapping(bp, stats_comp));
  387. dmae->comp_addr_hi = U64_HI(bnx2x_sp_mapping(bp, stats_comp));
  388. dmae->comp_val = DMAE_COMP_VAL;
  389. *stats_comp = 0;
  390. }
  391. static void bnx2x_stats_start(struct bnx2x *bp)
  392. {
  393. if (bp->port.pmf)
  394. bnx2x_port_stats_init(bp);
  395. else if (bp->func_stx)
  396. bnx2x_func_stats_init(bp);
  397. bnx2x_hw_stats_post(bp);
  398. bnx2x_storm_stats_post(bp);
  399. }
  400. static void bnx2x_stats_pmf_start(struct bnx2x *bp)
  401. {
  402. bnx2x_stats_comp(bp);
  403. bnx2x_stats_pmf_update(bp);
  404. bnx2x_stats_start(bp);
  405. }
  406. static void bnx2x_stats_restart(struct bnx2x *bp)
  407. {
  408. bnx2x_stats_comp(bp);
  409. bnx2x_stats_start(bp);
  410. }
  411. static void bnx2x_bmac_stats_update(struct bnx2x *bp)
  412. {
  413. struct host_port_stats *pstats = bnx2x_sp(bp, port_stats);
  414. struct bnx2x_eth_stats *estats = &bp->eth_stats;
  415. struct {
  416. u32 lo;
  417. u32 hi;
  418. } diff;
  419. if (CHIP_IS_E1x(bp)) {
  420. struct bmac1_stats *new = bnx2x_sp(bp, mac_stats.bmac1_stats);
  421. /* the macros below will use "bmac1_stats" type */
  422. UPDATE_STAT64(rx_stat_grerb, rx_stat_ifhcinbadoctets);
  423. UPDATE_STAT64(rx_stat_grfcs, rx_stat_dot3statsfcserrors);
  424. UPDATE_STAT64(rx_stat_grund, rx_stat_etherstatsundersizepkts);
  425. UPDATE_STAT64(rx_stat_grovr, rx_stat_dot3statsframestoolong);
  426. UPDATE_STAT64(rx_stat_grfrg, rx_stat_etherstatsfragments);
  427. UPDATE_STAT64(rx_stat_grjbr, rx_stat_etherstatsjabbers);
  428. UPDATE_STAT64(rx_stat_grxcf, rx_stat_maccontrolframesreceived);
  429. UPDATE_STAT64(rx_stat_grxpf, rx_stat_xoffstateentered);
  430. UPDATE_STAT64(rx_stat_grxpf, rx_stat_mac_xpf);
  431. UPDATE_STAT64(tx_stat_gtxpf, tx_stat_outxoffsent);
  432. UPDATE_STAT64(tx_stat_gtxpf, tx_stat_flowcontroldone);
  433. UPDATE_STAT64(tx_stat_gt64, tx_stat_etherstatspkts64octets);
  434. UPDATE_STAT64(tx_stat_gt127,
  435. tx_stat_etherstatspkts65octetsto127octets);
  436. UPDATE_STAT64(tx_stat_gt255,
  437. tx_stat_etherstatspkts128octetsto255octets);
  438. UPDATE_STAT64(tx_stat_gt511,
  439. tx_stat_etherstatspkts256octetsto511octets);
  440. UPDATE_STAT64(tx_stat_gt1023,
  441. tx_stat_etherstatspkts512octetsto1023octets);
  442. UPDATE_STAT64(tx_stat_gt1518,
  443. tx_stat_etherstatspkts1024octetsto1522octets);
  444. UPDATE_STAT64(tx_stat_gt2047, tx_stat_mac_2047);
  445. UPDATE_STAT64(tx_stat_gt4095, tx_stat_mac_4095);
  446. UPDATE_STAT64(tx_stat_gt9216, tx_stat_mac_9216);
  447. UPDATE_STAT64(tx_stat_gt16383, tx_stat_mac_16383);
  448. UPDATE_STAT64(tx_stat_gterr,
  449. tx_stat_dot3statsinternalmactransmiterrors);
  450. UPDATE_STAT64(tx_stat_gtufl, tx_stat_mac_ufl);
  451. } else {
  452. struct bmac2_stats *new = bnx2x_sp(bp, mac_stats.bmac2_stats);
  453. /* the macros below will use "bmac2_stats" type */
  454. UPDATE_STAT64(rx_stat_grerb, rx_stat_ifhcinbadoctets);
  455. UPDATE_STAT64(rx_stat_grfcs, rx_stat_dot3statsfcserrors);
  456. UPDATE_STAT64(rx_stat_grund, rx_stat_etherstatsundersizepkts);
  457. UPDATE_STAT64(rx_stat_grovr, rx_stat_dot3statsframestoolong);
  458. UPDATE_STAT64(rx_stat_grfrg, rx_stat_etherstatsfragments);
  459. UPDATE_STAT64(rx_stat_grjbr, rx_stat_etherstatsjabbers);
  460. UPDATE_STAT64(rx_stat_grxcf, rx_stat_maccontrolframesreceived);
  461. UPDATE_STAT64(rx_stat_grxpf, rx_stat_xoffstateentered);
  462. UPDATE_STAT64(rx_stat_grxpf, rx_stat_mac_xpf);
  463. UPDATE_STAT64(tx_stat_gtxpf, tx_stat_outxoffsent);
  464. UPDATE_STAT64(tx_stat_gtxpf, tx_stat_flowcontroldone);
  465. UPDATE_STAT64(tx_stat_gt64, tx_stat_etherstatspkts64octets);
  466. UPDATE_STAT64(tx_stat_gt127,
  467. tx_stat_etherstatspkts65octetsto127octets);
  468. UPDATE_STAT64(tx_stat_gt255,
  469. tx_stat_etherstatspkts128octetsto255octets);
  470. UPDATE_STAT64(tx_stat_gt511,
  471. tx_stat_etherstatspkts256octetsto511octets);
  472. UPDATE_STAT64(tx_stat_gt1023,
  473. tx_stat_etherstatspkts512octetsto1023octets);
  474. UPDATE_STAT64(tx_stat_gt1518,
  475. tx_stat_etherstatspkts1024octetsto1522octets);
  476. UPDATE_STAT64(tx_stat_gt2047, tx_stat_mac_2047);
  477. UPDATE_STAT64(tx_stat_gt4095, tx_stat_mac_4095);
  478. UPDATE_STAT64(tx_stat_gt9216, tx_stat_mac_9216);
  479. UPDATE_STAT64(tx_stat_gt16383, tx_stat_mac_16383);
  480. UPDATE_STAT64(tx_stat_gterr,
  481. tx_stat_dot3statsinternalmactransmiterrors);
  482. UPDATE_STAT64(tx_stat_gtufl, tx_stat_mac_ufl);
  483. /* collect PFC stats */
  484. pstats->pfc_frames_tx_hi = new->tx_stat_gtpp_hi;
  485. pstats->pfc_frames_tx_lo = new->tx_stat_gtpp_lo;
  486. pstats->pfc_frames_rx_hi = new->rx_stat_grpp_hi;
  487. pstats->pfc_frames_rx_lo = new->rx_stat_grpp_lo;
  488. }
  489. estats->pause_frames_received_hi =
  490. pstats->mac_stx[1].rx_stat_mac_xpf_hi;
  491. estats->pause_frames_received_lo =
  492. pstats->mac_stx[1].rx_stat_mac_xpf_lo;
  493. estats->pause_frames_sent_hi =
  494. pstats->mac_stx[1].tx_stat_outxoffsent_hi;
  495. estats->pause_frames_sent_lo =
  496. pstats->mac_stx[1].tx_stat_outxoffsent_lo;
  497. estats->pfc_frames_received_hi =
  498. pstats->pfc_frames_rx_hi;
  499. estats->pfc_frames_received_lo =
  500. pstats->pfc_frames_rx_lo;
  501. estats->pfc_frames_sent_hi =
  502. pstats->pfc_frames_tx_hi;
  503. estats->pfc_frames_sent_lo =
  504. pstats->pfc_frames_tx_lo;
  505. }
  506. static void bnx2x_mstat_stats_update(struct bnx2x *bp)
  507. {
  508. struct host_port_stats *pstats = bnx2x_sp(bp, port_stats);
  509. struct bnx2x_eth_stats *estats = &bp->eth_stats;
  510. struct mstat_stats *new = bnx2x_sp(bp, mac_stats.mstat_stats);
  511. ADD_STAT64(stats_rx.rx_grerb, rx_stat_ifhcinbadoctets);
  512. ADD_STAT64(stats_rx.rx_grfcs, rx_stat_dot3statsfcserrors);
  513. ADD_STAT64(stats_rx.rx_grund, rx_stat_etherstatsundersizepkts);
  514. ADD_STAT64(stats_rx.rx_grovr, rx_stat_dot3statsframestoolong);
  515. ADD_STAT64(stats_rx.rx_grfrg, rx_stat_etherstatsfragments);
  516. ADD_STAT64(stats_rx.rx_grxcf, rx_stat_maccontrolframesreceived);
  517. ADD_STAT64(stats_rx.rx_grxpf, rx_stat_xoffstateentered);
  518. ADD_STAT64(stats_rx.rx_grxpf, rx_stat_mac_xpf);
  519. ADD_STAT64(stats_tx.tx_gtxpf, tx_stat_outxoffsent);
  520. ADD_STAT64(stats_tx.tx_gtxpf, tx_stat_flowcontroldone);
  521. /* collect pfc stats */
  522. ADD_64(pstats->pfc_frames_tx_hi, new->stats_tx.tx_gtxpp_hi,
  523. pstats->pfc_frames_tx_lo, new->stats_tx.tx_gtxpp_lo);
  524. ADD_64(pstats->pfc_frames_rx_hi, new->stats_rx.rx_grxpp_hi,
  525. pstats->pfc_frames_rx_lo, new->stats_rx.rx_grxpp_lo);
  526. ADD_STAT64(stats_tx.tx_gt64, tx_stat_etherstatspkts64octets);
  527. ADD_STAT64(stats_tx.tx_gt127,
  528. tx_stat_etherstatspkts65octetsto127octets);
  529. ADD_STAT64(stats_tx.tx_gt255,
  530. tx_stat_etherstatspkts128octetsto255octets);
  531. ADD_STAT64(stats_tx.tx_gt511,
  532. tx_stat_etherstatspkts256octetsto511octets);
  533. ADD_STAT64(stats_tx.tx_gt1023,
  534. tx_stat_etherstatspkts512octetsto1023octets);
  535. ADD_STAT64(stats_tx.tx_gt1518,
  536. tx_stat_etherstatspkts1024octetsto1522octets);
  537. ADD_STAT64(stats_tx.tx_gt2047, tx_stat_mac_2047);
  538. ADD_STAT64(stats_tx.tx_gt4095, tx_stat_mac_4095);
  539. ADD_STAT64(stats_tx.tx_gt9216, tx_stat_mac_9216);
  540. ADD_STAT64(stats_tx.tx_gt16383, tx_stat_mac_16383);
  541. ADD_STAT64(stats_tx.tx_gterr,
  542. tx_stat_dot3statsinternalmactransmiterrors);
  543. ADD_STAT64(stats_tx.tx_gtufl, tx_stat_mac_ufl);
  544. estats->etherstatspkts1024octetsto1522octets_hi =
  545. pstats->mac_stx[1].tx_stat_etherstatspkts1024octetsto1522octets_hi;
  546. estats->etherstatspkts1024octetsto1522octets_lo =
  547. pstats->mac_stx[1].tx_stat_etherstatspkts1024octetsto1522octets_lo;
  548. estats->etherstatspktsover1522octets_hi =
  549. pstats->mac_stx[1].tx_stat_mac_2047_hi;
  550. estats->etherstatspktsover1522octets_lo =
  551. pstats->mac_stx[1].tx_stat_mac_2047_lo;
  552. ADD_64(estats->etherstatspktsover1522octets_hi,
  553. pstats->mac_stx[1].tx_stat_mac_4095_hi,
  554. estats->etherstatspktsover1522octets_lo,
  555. pstats->mac_stx[1].tx_stat_mac_4095_lo);
  556. ADD_64(estats->etherstatspktsover1522octets_hi,
  557. pstats->mac_stx[1].tx_stat_mac_9216_hi,
  558. estats->etherstatspktsover1522octets_lo,
  559. pstats->mac_stx[1].tx_stat_mac_9216_lo);
  560. ADD_64(estats->etherstatspktsover1522octets_hi,
  561. pstats->mac_stx[1].tx_stat_mac_16383_hi,
  562. estats->etherstatspktsover1522octets_lo,
  563. pstats->mac_stx[1].tx_stat_mac_16383_lo);
  564. estats->pause_frames_received_hi =
  565. pstats->mac_stx[1].rx_stat_mac_xpf_hi;
  566. estats->pause_frames_received_lo =
  567. pstats->mac_stx[1].rx_stat_mac_xpf_lo;
  568. estats->pause_frames_sent_hi =
  569. pstats->mac_stx[1].tx_stat_outxoffsent_hi;
  570. estats->pause_frames_sent_lo =
  571. pstats->mac_stx[1].tx_stat_outxoffsent_lo;
  572. estats->pfc_frames_received_hi =
  573. pstats->pfc_frames_rx_hi;
  574. estats->pfc_frames_received_lo =
  575. pstats->pfc_frames_rx_lo;
  576. estats->pfc_frames_sent_hi =
  577. pstats->pfc_frames_tx_hi;
  578. estats->pfc_frames_sent_lo =
  579. pstats->pfc_frames_tx_lo;
  580. }
  581. static void bnx2x_emac_stats_update(struct bnx2x *bp)
  582. {
  583. struct emac_stats *new = bnx2x_sp(bp, mac_stats.emac_stats);
  584. struct host_port_stats *pstats = bnx2x_sp(bp, port_stats);
  585. struct bnx2x_eth_stats *estats = &bp->eth_stats;
  586. UPDATE_EXTEND_STAT(rx_stat_ifhcinbadoctets);
  587. UPDATE_EXTEND_STAT(tx_stat_ifhcoutbadoctets);
  588. UPDATE_EXTEND_STAT(rx_stat_dot3statsfcserrors);
  589. UPDATE_EXTEND_STAT(rx_stat_dot3statsalignmenterrors);
  590. UPDATE_EXTEND_STAT(rx_stat_dot3statscarriersenseerrors);
  591. UPDATE_EXTEND_STAT(rx_stat_falsecarriererrors);
  592. UPDATE_EXTEND_STAT(rx_stat_etherstatsundersizepkts);
  593. UPDATE_EXTEND_STAT(rx_stat_dot3statsframestoolong);
  594. UPDATE_EXTEND_STAT(rx_stat_etherstatsfragments);
  595. UPDATE_EXTEND_STAT(rx_stat_etherstatsjabbers);
  596. UPDATE_EXTEND_STAT(rx_stat_maccontrolframesreceived);
  597. UPDATE_EXTEND_STAT(rx_stat_xoffstateentered);
  598. UPDATE_EXTEND_STAT(rx_stat_xonpauseframesreceived);
  599. UPDATE_EXTEND_STAT(rx_stat_xoffpauseframesreceived);
  600. UPDATE_EXTEND_STAT(tx_stat_outxonsent);
  601. UPDATE_EXTEND_STAT(tx_stat_outxoffsent);
  602. UPDATE_EXTEND_STAT(tx_stat_flowcontroldone);
  603. UPDATE_EXTEND_STAT(tx_stat_etherstatscollisions);
  604. UPDATE_EXTEND_STAT(tx_stat_dot3statssinglecollisionframes);
  605. UPDATE_EXTEND_STAT(tx_stat_dot3statsmultiplecollisionframes);
  606. UPDATE_EXTEND_STAT(tx_stat_dot3statsdeferredtransmissions);
  607. UPDATE_EXTEND_STAT(tx_stat_dot3statsexcessivecollisions);
  608. UPDATE_EXTEND_STAT(tx_stat_dot3statslatecollisions);
  609. UPDATE_EXTEND_STAT(tx_stat_etherstatspkts64octets);
  610. UPDATE_EXTEND_STAT(tx_stat_etherstatspkts65octetsto127octets);
  611. UPDATE_EXTEND_STAT(tx_stat_etherstatspkts128octetsto255octets);
  612. UPDATE_EXTEND_STAT(tx_stat_etherstatspkts256octetsto511octets);
  613. UPDATE_EXTEND_STAT(tx_stat_etherstatspkts512octetsto1023octets);
  614. UPDATE_EXTEND_STAT(tx_stat_etherstatspkts1024octetsto1522octets);
  615. UPDATE_EXTEND_STAT(tx_stat_etherstatspktsover1522octets);
  616. UPDATE_EXTEND_STAT(tx_stat_dot3statsinternalmactransmiterrors);
  617. estats->pause_frames_received_hi =
  618. pstats->mac_stx[1].rx_stat_xonpauseframesreceived_hi;
  619. estats->pause_frames_received_lo =
  620. pstats->mac_stx[1].rx_stat_xonpauseframesreceived_lo;
  621. ADD_64(estats->pause_frames_received_hi,
  622. pstats->mac_stx[1].rx_stat_xoffpauseframesreceived_hi,
  623. estats->pause_frames_received_lo,
  624. pstats->mac_stx[1].rx_stat_xoffpauseframesreceived_lo);
  625. estats->pause_frames_sent_hi =
  626. pstats->mac_stx[1].tx_stat_outxonsent_hi;
  627. estats->pause_frames_sent_lo =
  628. pstats->mac_stx[1].tx_stat_outxonsent_lo;
  629. ADD_64(estats->pause_frames_sent_hi,
  630. pstats->mac_stx[1].tx_stat_outxoffsent_hi,
  631. estats->pause_frames_sent_lo,
  632. pstats->mac_stx[1].tx_stat_outxoffsent_lo);
  633. }
  634. static int bnx2x_hw_stats_update(struct bnx2x *bp)
  635. {
  636. struct nig_stats *new = bnx2x_sp(bp, nig_stats);
  637. struct nig_stats *old = &(bp->port.old_nig_stats);
  638. struct host_port_stats *pstats = bnx2x_sp(bp, port_stats);
  639. struct bnx2x_eth_stats *estats = &bp->eth_stats;
  640. struct {
  641. u32 lo;
  642. u32 hi;
  643. } diff;
  644. switch (bp->link_vars.mac_type) {
  645. case MAC_TYPE_BMAC:
  646. bnx2x_bmac_stats_update(bp);
  647. break;
  648. case MAC_TYPE_EMAC:
  649. bnx2x_emac_stats_update(bp);
  650. break;
  651. case MAC_TYPE_UMAC:
  652. case MAC_TYPE_XMAC:
  653. bnx2x_mstat_stats_update(bp);
  654. break;
  655. case MAC_TYPE_NONE: /* unreached */
  656. DP(BNX2X_MSG_STATS,
  657. "stats updated by DMAE but no MAC active\n");
  658. return -1;
  659. default: /* unreached */
  660. BNX2X_ERR("Unknown MAC type\n");
  661. }
  662. ADD_EXTEND_64(pstats->brb_drop_hi, pstats->brb_drop_lo,
  663. new->brb_discard - old->brb_discard);
  664. ADD_EXTEND_64(estats->brb_truncate_hi, estats->brb_truncate_lo,
  665. new->brb_truncate - old->brb_truncate);
  666. if (!CHIP_IS_E3(bp)) {
  667. UPDATE_STAT64_NIG(egress_mac_pkt0,
  668. etherstatspkts1024octetsto1522octets);
  669. UPDATE_STAT64_NIG(egress_mac_pkt1,
  670. etherstatspktsover1522octets);
  671. }
  672. memcpy(old, new, sizeof(struct nig_stats));
  673. memcpy(&(estats->rx_stat_ifhcinbadoctets_hi), &(pstats->mac_stx[1]),
  674. sizeof(struct mac_stx));
  675. estats->brb_drop_hi = pstats->brb_drop_hi;
  676. estats->brb_drop_lo = pstats->brb_drop_lo;
  677. pstats->host_port_stats_counter++;
  678. if (CHIP_IS_E3(bp)) {
  679. u32 lpi_reg = BP_PORT(bp) ? MISC_REG_CPMU_LP_SM_ENT_CNT_P1
  680. : MISC_REG_CPMU_LP_SM_ENT_CNT_P0;
  681. estats->eee_tx_lpi += REG_RD(bp, lpi_reg);
  682. }
  683. if (!BP_NOMCP(bp)) {
  684. u32 nig_timer_max =
  685. SHMEM_RD(bp, port_mb[BP_PORT(bp)].stat_nig_timer);
  686. if (nig_timer_max != estats->nig_timer_max) {
  687. estats->nig_timer_max = nig_timer_max;
  688. BNX2X_ERR("NIG timer max (%u)\n",
  689. estats->nig_timer_max);
  690. }
  691. }
  692. return 0;
  693. }
  694. static int bnx2x_storm_stats_update(struct bnx2x *bp)
  695. {
  696. struct tstorm_per_port_stats *tport =
  697. &bp->fw_stats_data->port.tstorm_port_statistics;
  698. struct tstorm_per_pf_stats *tfunc =
  699. &bp->fw_stats_data->pf.tstorm_pf_statistics;
  700. struct host_func_stats *fstats = &bp->func_stats;
  701. struct bnx2x_eth_stats *estats = &bp->eth_stats;
  702. struct bnx2x_eth_stats_old *estats_old = &bp->eth_stats_old;
  703. struct stats_counter *counters = &bp->fw_stats_data->storm_counters;
  704. int i;
  705. u16 cur_stats_counter;
  706. /* Make sure we use the value of the counter
  707. * used for sending the last stats ramrod.
  708. */
  709. spin_lock_bh(&bp->stats_lock);
  710. cur_stats_counter = bp->stats_counter - 1;
  711. spin_unlock_bh(&bp->stats_lock);
  712. /* are storm stats valid? */
  713. if (le16_to_cpu(counters->xstats_counter) != cur_stats_counter) {
  714. DP(BNX2X_MSG_STATS,
  715. "stats not updated by xstorm xstorm counter (0x%x) != stats_counter (0x%x)\n",
  716. le16_to_cpu(counters->xstats_counter), bp->stats_counter);
  717. return -EAGAIN;
  718. }
  719. if (le16_to_cpu(counters->ustats_counter) != cur_stats_counter) {
  720. DP(BNX2X_MSG_STATS,
  721. "stats not updated by ustorm ustorm counter (0x%x) != stats_counter (0x%x)\n",
  722. le16_to_cpu(counters->ustats_counter), bp->stats_counter);
  723. return -EAGAIN;
  724. }
  725. if (le16_to_cpu(counters->cstats_counter) != cur_stats_counter) {
  726. DP(BNX2X_MSG_STATS,
  727. "stats not updated by cstorm cstorm counter (0x%x) != stats_counter (0x%x)\n",
  728. le16_to_cpu(counters->cstats_counter), bp->stats_counter);
  729. return -EAGAIN;
  730. }
  731. if (le16_to_cpu(counters->tstats_counter) != cur_stats_counter) {
  732. DP(BNX2X_MSG_STATS,
  733. "stats not updated by tstorm tstorm counter (0x%x) != stats_counter (0x%x)\n",
  734. le16_to_cpu(counters->tstats_counter), bp->stats_counter);
  735. return -EAGAIN;
  736. }
  737. estats->error_bytes_received_hi = 0;
  738. estats->error_bytes_received_lo = 0;
  739. for_each_eth_queue(bp, i) {
  740. struct bnx2x_fastpath *fp = &bp->fp[i];
  741. struct tstorm_per_queue_stats *tclient =
  742. &bp->fw_stats_data->queue_stats[i].
  743. tstorm_queue_statistics;
  744. struct tstorm_per_queue_stats *old_tclient =
  745. &bnx2x_fp_stats(bp, fp)->old_tclient;
  746. struct ustorm_per_queue_stats *uclient =
  747. &bp->fw_stats_data->queue_stats[i].
  748. ustorm_queue_statistics;
  749. struct ustorm_per_queue_stats *old_uclient =
  750. &bnx2x_fp_stats(bp, fp)->old_uclient;
  751. struct xstorm_per_queue_stats *xclient =
  752. &bp->fw_stats_data->queue_stats[i].
  753. xstorm_queue_statistics;
  754. struct xstorm_per_queue_stats *old_xclient =
  755. &bnx2x_fp_stats(bp, fp)->old_xclient;
  756. struct bnx2x_eth_q_stats *qstats =
  757. &bnx2x_fp_stats(bp, fp)->eth_q_stats;
  758. struct bnx2x_eth_q_stats_old *qstats_old =
  759. &bnx2x_fp_stats(bp, fp)->eth_q_stats_old;
  760. u32 diff;
  761. DP(BNX2X_MSG_STATS, "queue[%d]: ucast_sent 0x%x, bcast_sent 0x%x mcast_sent 0x%x\n",
  762. i, xclient->ucast_pkts_sent,
  763. xclient->bcast_pkts_sent, xclient->mcast_pkts_sent);
  764. DP(BNX2X_MSG_STATS, "---------------\n");
  765. UPDATE_QSTAT(tclient->rcv_bcast_bytes,
  766. total_broadcast_bytes_received);
  767. UPDATE_QSTAT(tclient->rcv_mcast_bytes,
  768. total_multicast_bytes_received);
  769. UPDATE_QSTAT(tclient->rcv_ucast_bytes,
  770. total_unicast_bytes_received);
  771. /*
  772. * sum to total_bytes_received all
  773. * unicast/multicast/broadcast
  774. */
  775. qstats->total_bytes_received_hi =
  776. qstats->total_broadcast_bytes_received_hi;
  777. qstats->total_bytes_received_lo =
  778. qstats->total_broadcast_bytes_received_lo;
  779. ADD_64(qstats->total_bytes_received_hi,
  780. qstats->total_multicast_bytes_received_hi,
  781. qstats->total_bytes_received_lo,
  782. qstats->total_multicast_bytes_received_lo);
  783. ADD_64(qstats->total_bytes_received_hi,
  784. qstats->total_unicast_bytes_received_hi,
  785. qstats->total_bytes_received_lo,
  786. qstats->total_unicast_bytes_received_lo);
  787. qstats->valid_bytes_received_hi =
  788. qstats->total_bytes_received_hi;
  789. qstats->valid_bytes_received_lo =
  790. qstats->total_bytes_received_lo;
  791. UPDATE_EXTEND_TSTAT(rcv_ucast_pkts,
  792. total_unicast_packets_received);
  793. UPDATE_EXTEND_TSTAT(rcv_mcast_pkts,
  794. total_multicast_packets_received);
  795. UPDATE_EXTEND_TSTAT(rcv_bcast_pkts,
  796. total_broadcast_packets_received);
  797. UPDATE_EXTEND_E_TSTAT(pkts_too_big_discard,
  798. etherstatsoverrsizepkts);
  799. UPDATE_EXTEND_E_TSTAT(no_buff_discard, no_buff_discard);
  800. SUB_EXTEND_USTAT(ucast_no_buff_pkts,
  801. total_unicast_packets_received);
  802. SUB_EXTEND_USTAT(mcast_no_buff_pkts,
  803. total_multicast_packets_received);
  804. SUB_EXTEND_USTAT(bcast_no_buff_pkts,
  805. total_broadcast_packets_received);
  806. UPDATE_EXTEND_E_USTAT(ucast_no_buff_pkts, no_buff_discard);
  807. UPDATE_EXTEND_E_USTAT(mcast_no_buff_pkts, no_buff_discard);
  808. UPDATE_EXTEND_E_USTAT(bcast_no_buff_pkts, no_buff_discard);
  809. UPDATE_QSTAT(xclient->bcast_bytes_sent,
  810. total_broadcast_bytes_transmitted);
  811. UPDATE_QSTAT(xclient->mcast_bytes_sent,
  812. total_multicast_bytes_transmitted);
  813. UPDATE_QSTAT(xclient->ucast_bytes_sent,
  814. total_unicast_bytes_transmitted);
  815. /*
  816. * sum to total_bytes_transmitted all
  817. * unicast/multicast/broadcast
  818. */
  819. qstats->total_bytes_transmitted_hi =
  820. qstats->total_unicast_bytes_transmitted_hi;
  821. qstats->total_bytes_transmitted_lo =
  822. qstats->total_unicast_bytes_transmitted_lo;
  823. ADD_64(qstats->total_bytes_transmitted_hi,
  824. qstats->total_broadcast_bytes_transmitted_hi,
  825. qstats->total_bytes_transmitted_lo,
  826. qstats->total_broadcast_bytes_transmitted_lo);
  827. ADD_64(qstats->total_bytes_transmitted_hi,
  828. qstats->total_multicast_bytes_transmitted_hi,
  829. qstats->total_bytes_transmitted_lo,
  830. qstats->total_multicast_bytes_transmitted_lo);
  831. UPDATE_EXTEND_XSTAT(ucast_pkts_sent,
  832. total_unicast_packets_transmitted);
  833. UPDATE_EXTEND_XSTAT(mcast_pkts_sent,
  834. total_multicast_packets_transmitted);
  835. UPDATE_EXTEND_XSTAT(bcast_pkts_sent,
  836. total_broadcast_packets_transmitted);
  837. UPDATE_EXTEND_TSTAT(checksum_discard,
  838. total_packets_received_checksum_discarded);
  839. UPDATE_EXTEND_TSTAT(ttl0_discard,
  840. total_packets_received_ttl0_discarded);
  841. UPDATE_EXTEND_XSTAT(error_drop_pkts,
  842. total_transmitted_dropped_packets_error);
  843. /* TPA aggregations completed */
  844. UPDATE_EXTEND_E_USTAT(coalesced_events, total_tpa_aggregations);
  845. /* Number of network frames aggregated by TPA */
  846. UPDATE_EXTEND_E_USTAT(coalesced_pkts,
  847. total_tpa_aggregated_frames);
  848. /* Total number of bytes in completed TPA aggregations */
  849. UPDATE_QSTAT(uclient->coalesced_bytes, total_tpa_bytes);
  850. UPDATE_ESTAT_QSTAT_64(total_tpa_bytes);
  851. UPDATE_FSTAT_QSTAT(total_bytes_received);
  852. UPDATE_FSTAT_QSTAT(total_bytes_transmitted);
  853. UPDATE_FSTAT_QSTAT(total_unicast_packets_received);
  854. UPDATE_FSTAT_QSTAT(total_multicast_packets_received);
  855. UPDATE_FSTAT_QSTAT(total_broadcast_packets_received);
  856. UPDATE_FSTAT_QSTAT(total_unicast_packets_transmitted);
  857. UPDATE_FSTAT_QSTAT(total_multicast_packets_transmitted);
  858. UPDATE_FSTAT_QSTAT(total_broadcast_packets_transmitted);
  859. UPDATE_FSTAT_QSTAT(valid_bytes_received);
  860. }
  861. ADD_64(estats->total_bytes_received_hi,
  862. estats->rx_stat_ifhcinbadoctets_hi,
  863. estats->total_bytes_received_lo,
  864. estats->rx_stat_ifhcinbadoctets_lo);
  865. ADD_64(estats->total_bytes_received_hi,
  866. le32_to_cpu(tfunc->rcv_error_bytes.hi),
  867. estats->total_bytes_received_lo,
  868. le32_to_cpu(tfunc->rcv_error_bytes.lo));
  869. ADD_64(estats->error_bytes_received_hi,
  870. le32_to_cpu(tfunc->rcv_error_bytes.hi),
  871. estats->error_bytes_received_lo,
  872. le32_to_cpu(tfunc->rcv_error_bytes.lo));
  873. UPDATE_ESTAT(etherstatsoverrsizepkts, rx_stat_dot3statsframestoolong);
  874. ADD_64(estats->error_bytes_received_hi,
  875. estats->rx_stat_ifhcinbadoctets_hi,
  876. estats->error_bytes_received_lo,
  877. estats->rx_stat_ifhcinbadoctets_lo);
  878. if (bp->port.pmf) {
  879. struct bnx2x_fw_port_stats_old *fwstats = &bp->fw_stats_old;
  880. UPDATE_FW_STAT(mac_filter_discard);
  881. UPDATE_FW_STAT(mf_tag_discard);
  882. UPDATE_FW_STAT(brb_truncate_discard);
  883. UPDATE_FW_STAT(mac_discard);
  884. }
  885. fstats->host_func_stats_start = ++fstats->host_func_stats_end;
  886. bp->stats_pending = 0;
  887. return 0;
  888. }
  889. static void bnx2x_net_stats_update(struct bnx2x *bp)
  890. {
  891. struct bnx2x_eth_stats *estats = &bp->eth_stats;
  892. struct net_device_stats *nstats = &bp->dev->stats;
  893. unsigned long tmp;
  894. int i;
  895. nstats->rx_packets =
  896. bnx2x_hilo(&estats->total_unicast_packets_received_hi) +
  897. bnx2x_hilo(&estats->total_multicast_packets_received_hi) +
  898. bnx2x_hilo(&estats->total_broadcast_packets_received_hi);
  899. nstats->tx_packets =
  900. bnx2x_hilo(&estats->total_unicast_packets_transmitted_hi) +
  901. bnx2x_hilo(&estats->total_multicast_packets_transmitted_hi) +
  902. bnx2x_hilo(&estats->total_broadcast_packets_transmitted_hi);
  903. nstats->rx_bytes = bnx2x_hilo(&estats->total_bytes_received_hi);
  904. nstats->tx_bytes = bnx2x_hilo(&estats->total_bytes_transmitted_hi);
  905. tmp = estats->mac_discard;
  906. for_each_rx_queue(bp, i) {
  907. struct tstorm_per_queue_stats *old_tclient =
  908. &bp->fp_stats[i].old_tclient;
  909. tmp += le32_to_cpu(old_tclient->checksum_discard);
  910. }
  911. nstats->rx_dropped = tmp + bp->net_stats_old.rx_dropped;
  912. nstats->tx_dropped = 0;
  913. nstats->multicast =
  914. bnx2x_hilo(&estats->total_multicast_packets_received_hi);
  915. nstats->collisions =
  916. bnx2x_hilo(&estats->tx_stat_etherstatscollisions_hi);
  917. nstats->rx_length_errors =
  918. bnx2x_hilo(&estats->rx_stat_etherstatsundersizepkts_hi) +
  919. bnx2x_hilo(&estats->etherstatsoverrsizepkts_hi);
  920. nstats->rx_over_errors = bnx2x_hilo(&estats->brb_drop_hi) +
  921. bnx2x_hilo(&estats->brb_truncate_hi);
  922. nstats->rx_crc_errors =
  923. bnx2x_hilo(&estats->rx_stat_dot3statsfcserrors_hi);
  924. nstats->rx_frame_errors =
  925. bnx2x_hilo(&estats->rx_stat_dot3statsalignmenterrors_hi);
  926. nstats->rx_fifo_errors = bnx2x_hilo(&estats->no_buff_discard_hi);
  927. nstats->rx_missed_errors = 0;
  928. nstats->rx_errors = nstats->rx_length_errors +
  929. nstats->rx_over_errors +
  930. nstats->rx_crc_errors +
  931. nstats->rx_frame_errors +
  932. nstats->rx_fifo_errors +
  933. nstats->rx_missed_errors;
  934. nstats->tx_aborted_errors =
  935. bnx2x_hilo(&estats->tx_stat_dot3statslatecollisions_hi) +
  936. bnx2x_hilo(&estats->tx_stat_dot3statsexcessivecollisions_hi);
  937. nstats->tx_carrier_errors =
  938. bnx2x_hilo(&estats->rx_stat_dot3statscarriersenseerrors_hi);
  939. nstats->tx_fifo_errors = 0;
  940. nstats->tx_heartbeat_errors = 0;
  941. nstats->tx_window_errors = 0;
  942. nstats->tx_errors = nstats->tx_aborted_errors +
  943. nstats->tx_carrier_errors +
  944. bnx2x_hilo(&estats->tx_stat_dot3statsinternalmactransmiterrors_hi);
  945. }
  946. static void bnx2x_drv_stats_update(struct bnx2x *bp)
  947. {
  948. struct bnx2x_eth_stats *estats = &bp->eth_stats;
  949. int i;
  950. for_each_queue(bp, i) {
  951. struct bnx2x_eth_q_stats *qstats = &bp->fp_stats[i].eth_q_stats;
  952. struct bnx2x_eth_q_stats_old *qstats_old =
  953. &bp->fp_stats[i].eth_q_stats_old;
  954. UPDATE_ESTAT_QSTAT(driver_xoff);
  955. UPDATE_ESTAT_QSTAT(rx_err_discard_pkt);
  956. UPDATE_ESTAT_QSTAT(rx_skb_alloc_failed);
  957. UPDATE_ESTAT_QSTAT(hw_csum_err);
  958. }
  959. }
  960. static bool bnx2x_edebug_stats_stopped(struct bnx2x *bp)
  961. {
  962. u32 val;
  963. if (SHMEM2_HAS(bp, edebug_driver_if[1])) {
  964. val = SHMEM2_RD(bp, edebug_driver_if[1]);
  965. if (val == EDEBUG_DRIVER_IF_OP_CODE_DISABLE_STAT)
  966. return true;
  967. }
  968. return false;
  969. }
  970. static void bnx2x_stats_update(struct bnx2x *bp)
  971. {
  972. u32 *stats_comp = bnx2x_sp(bp, stats_comp);
  973. if (bnx2x_edebug_stats_stopped(bp))
  974. return;
  975. if (*stats_comp != DMAE_COMP_VAL)
  976. return;
  977. if (bp->port.pmf)
  978. bnx2x_hw_stats_update(bp);
  979. if (bnx2x_storm_stats_update(bp)) {
  980. if (bp->stats_pending++ == 3) {
  981. BNX2X_ERR("storm stats were not updated for 3 times\n");
  982. bnx2x_panic();
  983. }
  984. return;
  985. }
  986. bnx2x_net_stats_update(bp);
  987. bnx2x_drv_stats_update(bp);
  988. if (netif_msg_timer(bp)) {
  989. struct bnx2x_eth_stats *estats = &bp->eth_stats;
  990. netdev_dbg(bp->dev, "brb drops %u brb truncate %u\n",
  991. estats->brb_drop_lo, estats->brb_truncate_lo);
  992. }
  993. bnx2x_hw_stats_post(bp);
  994. bnx2x_storm_stats_post(bp);
  995. }
  996. static void bnx2x_port_stats_stop(struct bnx2x *bp)
  997. {
  998. struct dmae_command *dmae;
  999. u32 opcode;
  1000. int loader_idx = PMF_DMAE_C(bp);
  1001. u32 *stats_comp = bnx2x_sp(bp, stats_comp);
  1002. bp->executer_idx = 0;
  1003. opcode = bnx2x_dmae_opcode(bp, DMAE_SRC_PCI, DMAE_DST_GRC, false, 0);
  1004. if (bp->port.port_stx) {
  1005. dmae = bnx2x_sp(bp, dmae[bp->executer_idx++]);
  1006. if (bp->func_stx)
  1007. dmae->opcode = bnx2x_dmae_opcode_add_comp(
  1008. opcode, DMAE_COMP_GRC);
  1009. else
  1010. dmae->opcode = bnx2x_dmae_opcode_add_comp(
  1011. opcode, DMAE_COMP_PCI);
  1012. dmae->src_addr_lo = U64_LO(bnx2x_sp_mapping(bp, port_stats));
  1013. dmae->src_addr_hi = U64_HI(bnx2x_sp_mapping(bp, port_stats));
  1014. dmae->dst_addr_lo = bp->port.port_stx >> 2;
  1015. dmae->dst_addr_hi = 0;
  1016. dmae->len = bnx2x_get_port_stats_dma_len(bp);
  1017. if (bp->func_stx) {
  1018. dmae->comp_addr_lo = dmae_reg_go_c[loader_idx] >> 2;
  1019. dmae->comp_addr_hi = 0;
  1020. dmae->comp_val = 1;
  1021. } else {
  1022. dmae->comp_addr_lo =
  1023. U64_LO(bnx2x_sp_mapping(bp, stats_comp));
  1024. dmae->comp_addr_hi =
  1025. U64_HI(bnx2x_sp_mapping(bp, stats_comp));
  1026. dmae->comp_val = DMAE_COMP_VAL;
  1027. *stats_comp = 0;
  1028. }
  1029. }
  1030. if (bp->func_stx) {
  1031. dmae = bnx2x_sp(bp, dmae[bp->executer_idx++]);
  1032. dmae->opcode =
  1033. bnx2x_dmae_opcode_add_comp(opcode, DMAE_COMP_PCI);
  1034. dmae->src_addr_lo = U64_LO(bnx2x_sp_mapping(bp, func_stats));
  1035. dmae->src_addr_hi = U64_HI(bnx2x_sp_mapping(bp, func_stats));
  1036. dmae->dst_addr_lo = bp->func_stx >> 2;
  1037. dmae->dst_addr_hi = 0;
  1038. dmae->len = sizeof(struct host_func_stats) >> 2;
  1039. dmae->comp_addr_lo = U64_LO(bnx2x_sp_mapping(bp, stats_comp));
  1040. dmae->comp_addr_hi = U64_HI(bnx2x_sp_mapping(bp, stats_comp));
  1041. dmae->comp_val = DMAE_COMP_VAL;
  1042. *stats_comp = 0;
  1043. }
  1044. }
  1045. static void bnx2x_stats_stop(struct bnx2x *bp)
  1046. {
  1047. int update = 0;
  1048. bnx2x_stats_comp(bp);
  1049. if (bp->port.pmf)
  1050. update = (bnx2x_hw_stats_update(bp) == 0);
  1051. update |= (bnx2x_storm_stats_update(bp) == 0);
  1052. if (update) {
  1053. bnx2x_net_stats_update(bp);
  1054. if (bp->port.pmf)
  1055. bnx2x_port_stats_stop(bp);
  1056. bnx2x_hw_stats_post(bp);
  1057. bnx2x_stats_comp(bp);
  1058. }
  1059. }
  1060. static void bnx2x_stats_do_nothing(struct bnx2x *bp)
  1061. {
  1062. }
  1063. static const struct {
  1064. void (*action)(struct bnx2x *bp);
  1065. enum bnx2x_stats_state next_state;
  1066. } bnx2x_stats_stm[STATS_STATE_MAX][STATS_EVENT_MAX] = {
  1067. /* state event */
  1068. {
  1069. /* DISABLED PMF */ {bnx2x_stats_pmf_update, STATS_STATE_DISABLED},
  1070. /* LINK_UP */ {bnx2x_stats_start, STATS_STATE_ENABLED},
  1071. /* UPDATE */ {bnx2x_stats_do_nothing, STATS_STATE_DISABLED},
  1072. /* STOP */ {bnx2x_stats_do_nothing, STATS_STATE_DISABLED}
  1073. },
  1074. {
  1075. /* ENABLED PMF */ {bnx2x_stats_pmf_start, STATS_STATE_ENABLED},
  1076. /* LINK_UP */ {bnx2x_stats_restart, STATS_STATE_ENABLED},
  1077. /* UPDATE */ {bnx2x_stats_update, STATS_STATE_ENABLED},
  1078. /* STOP */ {bnx2x_stats_stop, STATS_STATE_DISABLED}
  1079. }
  1080. };
  1081. void bnx2x_stats_handle(struct bnx2x *bp, enum bnx2x_stats_event event)
  1082. {
  1083. enum bnx2x_stats_state state;
  1084. if (unlikely(bp->panic))
  1085. return;
  1086. spin_lock_bh(&bp->stats_lock);
  1087. state = bp->stats_state;
  1088. bp->stats_state = bnx2x_stats_stm[state][event].next_state;
  1089. spin_unlock_bh(&bp->stats_lock);
  1090. bnx2x_stats_stm[state][event].action(bp);
  1091. if ((event != STATS_EVENT_UPDATE) || netif_msg_timer(bp))
  1092. DP(BNX2X_MSG_STATS, "state %d -> event %d -> state %d\n",
  1093. state, event, bp->stats_state);
  1094. }
  1095. static void bnx2x_port_stats_base_init(struct bnx2x *bp)
  1096. {
  1097. struct dmae_command *dmae;
  1098. u32 *stats_comp = bnx2x_sp(bp, stats_comp);
  1099. /* sanity */
  1100. if (!bp->port.pmf || !bp->port.port_stx) {
  1101. BNX2X_ERR("BUG!\n");
  1102. return;
  1103. }
  1104. bp->executer_idx = 0;
  1105. dmae = bnx2x_sp(bp, dmae[bp->executer_idx++]);
  1106. dmae->opcode = bnx2x_dmae_opcode(bp, DMAE_SRC_PCI, DMAE_DST_GRC,
  1107. true, DMAE_COMP_PCI);
  1108. dmae->src_addr_lo = U64_LO(bnx2x_sp_mapping(bp, port_stats));
  1109. dmae->src_addr_hi = U64_HI(bnx2x_sp_mapping(bp, port_stats));
  1110. dmae->dst_addr_lo = bp->port.port_stx >> 2;
  1111. dmae->dst_addr_hi = 0;
  1112. dmae->len = bnx2x_get_port_stats_dma_len(bp);
  1113. dmae->comp_addr_lo = U64_LO(bnx2x_sp_mapping(bp, stats_comp));
  1114. dmae->comp_addr_hi = U64_HI(bnx2x_sp_mapping(bp, stats_comp));
  1115. dmae->comp_val = DMAE_COMP_VAL;
  1116. *stats_comp = 0;
  1117. bnx2x_hw_stats_post(bp);
  1118. bnx2x_stats_comp(bp);
  1119. }
  1120. /* This function will prepare the statistics ramrod data the way
  1121. * we will only have to increment the statistics counter and
  1122. * send the ramrod each time we have to.
  1123. */
  1124. static void bnx2x_prep_fw_stats_req(struct bnx2x *bp)
  1125. {
  1126. int i;
  1127. int first_queue_query_index;
  1128. struct stats_query_header *stats_hdr = &bp->fw_stats_req->hdr;
  1129. dma_addr_t cur_data_offset;
  1130. struct stats_query_entry *cur_query_entry;
  1131. stats_hdr->cmd_num = bp->fw_stats_num;
  1132. stats_hdr->drv_stats_counter = 0;
  1133. /* storm_counters struct contains the counters of completed
  1134. * statistics requests per storm which are incremented by FW
  1135. * each time it completes hadning a statistics ramrod. We will
  1136. * check these counters in the timer handler and discard a
  1137. * (statistics) ramrod completion.
  1138. */
  1139. cur_data_offset = bp->fw_stats_data_mapping +
  1140. offsetof(struct bnx2x_fw_stats_data, storm_counters);
  1141. stats_hdr->stats_counters_addrs.hi =
  1142. cpu_to_le32(U64_HI(cur_data_offset));
  1143. stats_hdr->stats_counters_addrs.lo =
  1144. cpu_to_le32(U64_LO(cur_data_offset));
  1145. /* prepare to the first stats ramrod (will be completed with
  1146. * the counters equal to zero) - init counters to somethig different.
  1147. */
  1148. memset(&bp->fw_stats_data->storm_counters, 0xff,
  1149. sizeof(struct stats_counter));
  1150. /**** Port FW statistics data ****/
  1151. cur_data_offset = bp->fw_stats_data_mapping +
  1152. offsetof(struct bnx2x_fw_stats_data, port);
  1153. cur_query_entry = &bp->fw_stats_req->query[BNX2X_PORT_QUERY_IDX];
  1154. cur_query_entry->kind = STATS_TYPE_PORT;
  1155. /* For port query index is a DONT CARE */
  1156. cur_query_entry->index = BP_PORT(bp);
  1157. /* For port query funcID is a DONT CARE */
  1158. cur_query_entry->funcID = cpu_to_le16(BP_FUNC(bp));
  1159. cur_query_entry->address.hi = cpu_to_le32(U64_HI(cur_data_offset));
  1160. cur_query_entry->address.lo = cpu_to_le32(U64_LO(cur_data_offset));
  1161. /**** PF FW statistics data ****/
  1162. cur_data_offset = bp->fw_stats_data_mapping +
  1163. offsetof(struct bnx2x_fw_stats_data, pf);
  1164. cur_query_entry = &bp->fw_stats_req->query[BNX2X_PF_QUERY_IDX];
  1165. cur_query_entry->kind = STATS_TYPE_PF;
  1166. /* For PF query index is a DONT CARE */
  1167. cur_query_entry->index = BP_PORT(bp);
  1168. cur_query_entry->funcID = cpu_to_le16(BP_FUNC(bp));
  1169. cur_query_entry->address.hi = cpu_to_le32(U64_HI(cur_data_offset));
  1170. cur_query_entry->address.lo = cpu_to_le32(U64_LO(cur_data_offset));
  1171. /**** FCoE FW statistics data ****/
  1172. if (!NO_FCOE(bp)) {
  1173. cur_data_offset = bp->fw_stats_data_mapping +
  1174. offsetof(struct bnx2x_fw_stats_data, fcoe);
  1175. cur_query_entry =
  1176. &bp->fw_stats_req->query[BNX2X_FCOE_QUERY_IDX];
  1177. cur_query_entry->kind = STATS_TYPE_FCOE;
  1178. /* For FCoE query index is a DONT CARE */
  1179. cur_query_entry->index = BP_PORT(bp);
  1180. cur_query_entry->funcID = cpu_to_le16(BP_FUNC(bp));
  1181. cur_query_entry->address.hi =
  1182. cpu_to_le32(U64_HI(cur_data_offset));
  1183. cur_query_entry->address.lo =
  1184. cpu_to_le32(U64_LO(cur_data_offset));
  1185. }
  1186. /**** Clients' queries ****/
  1187. cur_data_offset = bp->fw_stats_data_mapping +
  1188. offsetof(struct bnx2x_fw_stats_data, queue_stats);
  1189. /* first queue query index depends whether FCoE offloaded request will
  1190. * be included in the ramrod
  1191. */
  1192. if (!NO_FCOE(bp))
  1193. first_queue_query_index = BNX2X_FIRST_QUEUE_QUERY_IDX;
  1194. else
  1195. first_queue_query_index = BNX2X_FIRST_QUEUE_QUERY_IDX - 1;
  1196. for_each_eth_queue(bp, i) {
  1197. cur_query_entry =
  1198. &bp->fw_stats_req->
  1199. query[first_queue_query_index + i];
  1200. cur_query_entry->kind = STATS_TYPE_QUEUE;
  1201. cur_query_entry->index = bnx2x_stats_id(&bp->fp[i]);
  1202. cur_query_entry->funcID = cpu_to_le16(BP_FUNC(bp));
  1203. cur_query_entry->address.hi =
  1204. cpu_to_le32(U64_HI(cur_data_offset));
  1205. cur_query_entry->address.lo =
  1206. cpu_to_le32(U64_LO(cur_data_offset));
  1207. cur_data_offset += sizeof(struct per_queue_stats);
  1208. }
  1209. /* add FCoE queue query if needed */
  1210. if (!NO_FCOE(bp)) {
  1211. cur_query_entry =
  1212. &bp->fw_stats_req->
  1213. query[first_queue_query_index + i];
  1214. cur_query_entry->kind = STATS_TYPE_QUEUE;
  1215. cur_query_entry->index = bnx2x_stats_id(&bp->fp[FCOE_IDX(bp)]);
  1216. cur_query_entry->funcID = cpu_to_le16(BP_FUNC(bp));
  1217. cur_query_entry->address.hi =
  1218. cpu_to_le32(U64_HI(cur_data_offset));
  1219. cur_query_entry->address.lo =
  1220. cpu_to_le32(U64_LO(cur_data_offset));
  1221. }
  1222. }
  1223. void bnx2x_stats_init(struct bnx2x *bp)
  1224. {
  1225. int /*abs*/port = BP_PORT(bp);
  1226. int mb_idx = BP_FW_MB_IDX(bp);
  1227. int i;
  1228. bp->stats_pending = 0;
  1229. bp->executer_idx = 0;
  1230. bp->stats_counter = 0;
  1231. /* port and func stats for management */
  1232. if (!BP_NOMCP(bp)) {
  1233. bp->port.port_stx = SHMEM_RD(bp, port_mb[port].port_stx);
  1234. bp->func_stx = SHMEM_RD(bp, func_mb[mb_idx].fw_mb_param);
  1235. } else {
  1236. bp->port.port_stx = 0;
  1237. bp->func_stx = 0;
  1238. }
  1239. DP(BNX2X_MSG_STATS, "port_stx 0x%x func_stx 0x%x\n",
  1240. bp->port.port_stx, bp->func_stx);
  1241. /* pmf should retrieve port statistics from SP on a non-init*/
  1242. if (!bp->stats_init && bp->port.pmf && bp->port.port_stx)
  1243. bnx2x_stats_handle(bp, STATS_EVENT_PMF);
  1244. port = BP_PORT(bp);
  1245. /* port stats */
  1246. memset(&(bp->port.old_nig_stats), 0, sizeof(struct nig_stats));
  1247. bp->port.old_nig_stats.brb_discard =
  1248. REG_RD(bp, NIG_REG_STAT0_BRB_DISCARD + port*0x38);
  1249. bp->port.old_nig_stats.brb_truncate =
  1250. REG_RD(bp, NIG_REG_STAT0_BRB_TRUNCATE + port*0x38);
  1251. if (!CHIP_IS_E3(bp)) {
  1252. REG_RD_DMAE(bp, NIG_REG_STAT0_EGRESS_MAC_PKT0 + port*0x50,
  1253. &(bp->port.old_nig_stats.egress_mac_pkt0_lo), 2);
  1254. REG_RD_DMAE(bp, NIG_REG_STAT0_EGRESS_MAC_PKT1 + port*0x50,
  1255. &(bp->port.old_nig_stats.egress_mac_pkt1_lo), 2);
  1256. }
  1257. /* function stats */
  1258. for_each_queue(bp, i) {
  1259. struct bnx2x_fp_stats *fp_stats = &bp->fp_stats[i];
  1260. memset(&fp_stats->old_tclient, 0,
  1261. sizeof(fp_stats->old_tclient));
  1262. memset(&fp_stats->old_uclient, 0,
  1263. sizeof(fp_stats->old_uclient));
  1264. memset(&fp_stats->old_xclient, 0,
  1265. sizeof(fp_stats->old_xclient));
  1266. if (bp->stats_init) {
  1267. memset(&fp_stats->eth_q_stats, 0,
  1268. sizeof(fp_stats->eth_q_stats));
  1269. memset(&fp_stats->eth_q_stats_old, 0,
  1270. sizeof(fp_stats->eth_q_stats_old));
  1271. }
  1272. }
  1273. /* Prepare statistics ramrod data */
  1274. bnx2x_prep_fw_stats_req(bp);
  1275. memset(&bp->dev->stats, 0, sizeof(bp->dev->stats));
  1276. if (bp->stats_init) {
  1277. memset(&bp->net_stats_old, 0, sizeof(bp->net_stats_old));
  1278. memset(&bp->fw_stats_old, 0, sizeof(bp->fw_stats_old));
  1279. memset(&bp->eth_stats_old, 0, sizeof(bp->eth_stats_old));
  1280. memset(&bp->eth_stats, 0, sizeof(bp->eth_stats));
  1281. memset(&bp->func_stats, 0, sizeof(bp->func_stats));
  1282. /* Clean SP from previous statistics */
  1283. if (bp->func_stx) {
  1284. memset(bnx2x_sp(bp, func_stats), 0,
  1285. sizeof(struct host_func_stats));
  1286. bnx2x_func_stats_init(bp);
  1287. bnx2x_hw_stats_post(bp);
  1288. bnx2x_stats_comp(bp);
  1289. }
  1290. }
  1291. bp->stats_state = STATS_STATE_DISABLED;
  1292. if (bp->port.pmf && bp->port.port_stx)
  1293. bnx2x_port_stats_base_init(bp);
  1294. /* mark the end of statistics initializiation */
  1295. bp->stats_init = false;
  1296. }
  1297. void bnx2x_save_statistics(struct bnx2x *bp)
  1298. {
  1299. int i;
  1300. struct net_device_stats *nstats = &bp->dev->stats;
  1301. /* save queue statistics */
  1302. for_each_eth_queue(bp, i) {
  1303. struct bnx2x_fastpath *fp = &bp->fp[i];
  1304. struct bnx2x_eth_q_stats *qstats =
  1305. &bnx2x_fp_stats(bp, fp)->eth_q_stats;
  1306. struct bnx2x_eth_q_stats_old *qstats_old =
  1307. &bnx2x_fp_stats(bp, fp)->eth_q_stats_old;
  1308. UPDATE_QSTAT_OLD(total_unicast_bytes_received_hi);
  1309. UPDATE_QSTAT_OLD(total_unicast_bytes_received_lo);
  1310. UPDATE_QSTAT_OLD(total_broadcast_bytes_received_hi);
  1311. UPDATE_QSTAT_OLD(total_broadcast_bytes_received_lo);
  1312. UPDATE_QSTAT_OLD(total_multicast_bytes_received_hi);
  1313. UPDATE_QSTAT_OLD(total_multicast_bytes_received_lo);
  1314. UPDATE_QSTAT_OLD(total_unicast_bytes_transmitted_hi);
  1315. UPDATE_QSTAT_OLD(total_unicast_bytes_transmitted_lo);
  1316. UPDATE_QSTAT_OLD(total_broadcast_bytes_transmitted_hi);
  1317. UPDATE_QSTAT_OLD(total_broadcast_bytes_transmitted_lo);
  1318. UPDATE_QSTAT_OLD(total_multicast_bytes_transmitted_hi);
  1319. UPDATE_QSTAT_OLD(total_multicast_bytes_transmitted_lo);
  1320. UPDATE_QSTAT_OLD(total_tpa_bytes_hi);
  1321. UPDATE_QSTAT_OLD(total_tpa_bytes_lo);
  1322. }
  1323. /* save net_device_stats statistics */
  1324. bp->net_stats_old.rx_dropped = nstats->rx_dropped;
  1325. /* store port firmware statistics */
  1326. if (bp->port.pmf && IS_MF(bp)) {
  1327. struct bnx2x_eth_stats *estats = &bp->eth_stats;
  1328. struct bnx2x_fw_port_stats_old *fwstats = &bp->fw_stats_old;
  1329. UPDATE_FW_STAT_OLD(mac_filter_discard);
  1330. UPDATE_FW_STAT_OLD(mf_tag_discard);
  1331. UPDATE_FW_STAT_OLD(brb_truncate_discard);
  1332. UPDATE_FW_STAT_OLD(mac_discard);
  1333. }
  1334. }
  1335. void bnx2x_afex_collect_stats(struct bnx2x *bp, void *void_afex_stats,
  1336. u32 stats_type)
  1337. {
  1338. int i;
  1339. struct afex_stats *afex_stats = (struct afex_stats *)void_afex_stats;
  1340. struct bnx2x_eth_stats *estats = &bp->eth_stats;
  1341. struct per_queue_stats *fcoe_q_stats =
  1342. &bp->fw_stats_data->queue_stats[FCOE_IDX(bp)];
  1343. struct tstorm_per_queue_stats *fcoe_q_tstorm_stats =
  1344. &fcoe_q_stats->tstorm_queue_statistics;
  1345. struct ustorm_per_queue_stats *fcoe_q_ustorm_stats =
  1346. &fcoe_q_stats->ustorm_queue_statistics;
  1347. struct xstorm_per_queue_stats *fcoe_q_xstorm_stats =
  1348. &fcoe_q_stats->xstorm_queue_statistics;
  1349. struct fcoe_statistics_params *fw_fcoe_stat =
  1350. &bp->fw_stats_data->fcoe;
  1351. memset(afex_stats, 0, sizeof(struct afex_stats));
  1352. for_each_eth_queue(bp, i) {
  1353. struct bnx2x_eth_q_stats *qstats = &bp->fp_stats[i].eth_q_stats;
  1354. ADD_64(afex_stats->rx_unicast_bytes_hi,
  1355. qstats->total_unicast_bytes_received_hi,
  1356. afex_stats->rx_unicast_bytes_lo,
  1357. qstats->total_unicast_bytes_received_lo);
  1358. ADD_64(afex_stats->rx_broadcast_bytes_hi,
  1359. qstats->total_broadcast_bytes_received_hi,
  1360. afex_stats->rx_broadcast_bytes_lo,
  1361. qstats->total_broadcast_bytes_received_lo);
  1362. ADD_64(afex_stats->rx_multicast_bytes_hi,
  1363. qstats->total_multicast_bytes_received_hi,
  1364. afex_stats->rx_multicast_bytes_lo,
  1365. qstats->total_multicast_bytes_received_lo);
  1366. ADD_64(afex_stats->rx_unicast_frames_hi,
  1367. qstats->total_unicast_packets_received_hi,
  1368. afex_stats->rx_unicast_frames_lo,
  1369. qstats->total_unicast_packets_received_lo);
  1370. ADD_64(afex_stats->rx_broadcast_frames_hi,
  1371. qstats->total_broadcast_packets_received_hi,
  1372. afex_stats->rx_broadcast_frames_lo,
  1373. qstats->total_broadcast_packets_received_lo);
  1374. ADD_64(afex_stats->rx_multicast_frames_hi,
  1375. qstats->total_multicast_packets_received_hi,
  1376. afex_stats->rx_multicast_frames_lo,
  1377. qstats->total_multicast_packets_received_lo);
  1378. /* sum to rx_frames_discarded all discraded
  1379. * packets due to size, ttl0 and checksum
  1380. */
  1381. ADD_64(afex_stats->rx_frames_discarded_hi,
  1382. qstats->total_packets_received_checksum_discarded_hi,
  1383. afex_stats->rx_frames_discarded_lo,
  1384. qstats->total_packets_received_checksum_discarded_lo);
  1385. ADD_64(afex_stats->rx_frames_discarded_hi,
  1386. qstats->total_packets_received_ttl0_discarded_hi,
  1387. afex_stats->rx_frames_discarded_lo,
  1388. qstats->total_packets_received_ttl0_discarded_lo);
  1389. ADD_64(afex_stats->rx_frames_discarded_hi,
  1390. qstats->etherstatsoverrsizepkts_hi,
  1391. afex_stats->rx_frames_discarded_lo,
  1392. qstats->etherstatsoverrsizepkts_lo);
  1393. ADD_64(afex_stats->rx_frames_dropped_hi,
  1394. qstats->no_buff_discard_hi,
  1395. afex_stats->rx_frames_dropped_lo,
  1396. qstats->no_buff_discard_lo);
  1397. ADD_64(afex_stats->tx_unicast_bytes_hi,
  1398. qstats->total_unicast_bytes_transmitted_hi,
  1399. afex_stats->tx_unicast_bytes_lo,
  1400. qstats->total_unicast_bytes_transmitted_lo);
  1401. ADD_64(afex_stats->tx_broadcast_bytes_hi,
  1402. qstats->total_broadcast_bytes_transmitted_hi,
  1403. afex_stats->tx_broadcast_bytes_lo,
  1404. qstats->total_broadcast_bytes_transmitted_lo);
  1405. ADD_64(afex_stats->tx_multicast_bytes_hi,
  1406. qstats->total_multicast_bytes_transmitted_hi,
  1407. afex_stats->tx_multicast_bytes_lo,
  1408. qstats->total_multicast_bytes_transmitted_lo);
  1409. ADD_64(afex_stats->tx_unicast_frames_hi,
  1410. qstats->total_unicast_packets_transmitted_hi,
  1411. afex_stats->tx_unicast_frames_lo,
  1412. qstats->total_unicast_packets_transmitted_lo);
  1413. ADD_64(afex_stats->tx_broadcast_frames_hi,
  1414. qstats->total_broadcast_packets_transmitted_hi,
  1415. afex_stats->tx_broadcast_frames_lo,
  1416. qstats->total_broadcast_packets_transmitted_lo);
  1417. ADD_64(afex_stats->tx_multicast_frames_hi,
  1418. qstats->total_multicast_packets_transmitted_hi,
  1419. afex_stats->tx_multicast_frames_lo,
  1420. qstats->total_multicast_packets_transmitted_lo);
  1421. ADD_64(afex_stats->tx_frames_dropped_hi,
  1422. qstats->total_transmitted_dropped_packets_error_hi,
  1423. afex_stats->tx_frames_dropped_lo,
  1424. qstats->total_transmitted_dropped_packets_error_lo);
  1425. }
  1426. /* now add FCoE statistics which are collected separately
  1427. * (both offloaded and non offloaded)
  1428. */
  1429. if (!NO_FCOE(bp)) {
  1430. ADD_64_LE(afex_stats->rx_unicast_bytes_hi,
  1431. LE32_0,
  1432. afex_stats->rx_unicast_bytes_lo,
  1433. fw_fcoe_stat->rx_stat0.fcoe_rx_byte_cnt);
  1434. ADD_64_LE(afex_stats->rx_unicast_bytes_hi,
  1435. fcoe_q_tstorm_stats->rcv_ucast_bytes.hi,
  1436. afex_stats->rx_unicast_bytes_lo,
  1437. fcoe_q_tstorm_stats->rcv_ucast_bytes.lo);
  1438. ADD_64_LE(afex_stats->rx_broadcast_bytes_hi,
  1439. fcoe_q_tstorm_stats->rcv_bcast_bytes.hi,
  1440. afex_stats->rx_broadcast_bytes_lo,
  1441. fcoe_q_tstorm_stats->rcv_bcast_bytes.lo);
  1442. ADD_64_LE(afex_stats->rx_multicast_bytes_hi,
  1443. fcoe_q_tstorm_stats->rcv_mcast_bytes.hi,
  1444. afex_stats->rx_multicast_bytes_lo,
  1445. fcoe_q_tstorm_stats->rcv_mcast_bytes.lo);
  1446. ADD_64_LE(afex_stats->rx_unicast_frames_hi,
  1447. LE32_0,
  1448. afex_stats->rx_unicast_frames_lo,
  1449. fw_fcoe_stat->rx_stat0.fcoe_rx_pkt_cnt);
  1450. ADD_64_LE(afex_stats->rx_unicast_frames_hi,
  1451. LE32_0,
  1452. afex_stats->rx_unicast_frames_lo,
  1453. fcoe_q_tstorm_stats->rcv_ucast_pkts);
  1454. ADD_64_LE(afex_stats->rx_broadcast_frames_hi,
  1455. LE32_0,
  1456. afex_stats->rx_broadcast_frames_lo,
  1457. fcoe_q_tstorm_stats->rcv_bcast_pkts);
  1458. ADD_64_LE(afex_stats->rx_multicast_frames_hi,
  1459. LE32_0,
  1460. afex_stats->rx_multicast_frames_lo,
  1461. fcoe_q_tstorm_stats->rcv_ucast_pkts);
  1462. ADD_64_LE(afex_stats->rx_frames_discarded_hi,
  1463. LE32_0,
  1464. afex_stats->rx_frames_discarded_lo,
  1465. fcoe_q_tstorm_stats->checksum_discard);
  1466. ADD_64_LE(afex_stats->rx_frames_discarded_hi,
  1467. LE32_0,
  1468. afex_stats->rx_frames_discarded_lo,
  1469. fcoe_q_tstorm_stats->pkts_too_big_discard);
  1470. ADD_64_LE(afex_stats->rx_frames_discarded_hi,
  1471. LE32_0,
  1472. afex_stats->rx_frames_discarded_lo,
  1473. fcoe_q_tstorm_stats->ttl0_discard);
  1474. ADD_64_LE16(afex_stats->rx_frames_dropped_hi,
  1475. LE16_0,
  1476. afex_stats->rx_frames_dropped_lo,
  1477. fcoe_q_tstorm_stats->no_buff_discard);
  1478. ADD_64_LE(afex_stats->rx_frames_dropped_hi,
  1479. LE32_0,
  1480. afex_stats->rx_frames_dropped_lo,
  1481. fcoe_q_ustorm_stats->ucast_no_buff_pkts);
  1482. ADD_64_LE(afex_stats->rx_frames_dropped_hi,
  1483. LE32_0,
  1484. afex_stats->rx_frames_dropped_lo,
  1485. fcoe_q_ustorm_stats->mcast_no_buff_pkts);
  1486. ADD_64_LE(afex_stats->rx_frames_dropped_hi,
  1487. LE32_0,
  1488. afex_stats->rx_frames_dropped_lo,
  1489. fcoe_q_ustorm_stats->bcast_no_buff_pkts);
  1490. ADD_64_LE(afex_stats->rx_frames_dropped_hi,
  1491. LE32_0,
  1492. afex_stats->rx_frames_dropped_lo,
  1493. fw_fcoe_stat->rx_stat1.fcoe_rx_drop_pkt_cnt);
  1494. ADD_64_LE(afex_stats->rx_frames_dropped_hi,
  1495. LE32_0,
  1496. afex_stats->rx_frames_dropped_lo,
  1497. fw_fcoe_stat->rx_stat2.fcoe_rx_drop_pkt_cnt);
  1498. ADD_64_LE(afex_stats->tx_unicast_bytes_hi,
  1499. LE32_0,
  1500. afex_stats->tx_unicast_bytes_lo,
  1501. fw_fcoe_stat->tx_stat.fcoe_tx_byte_cnt);
  1502. ADD_64_LE(afex_stats->tx_unicast_bytes_hi,
  1503. fcoe_q_xstorm_stats->ucast_bytes_sent.hi,
  1504. afex_stats->tx_unicast_bytes_lo,
  1505. fcoe_q_xstorm_stats->ucast_bytes_sent.lo);
  1506. ADD_64_LE(afex_stats->tx_broadcast_bytes_hi,
  1507. fcoe_q_xstorm_stats->bcast_bytes_sent.hi,
  1508. afex_stats->tx_broadcast_bytes_lo,
  1509. fcoe_q_xstorm_stats->bcast_bytes_sent.lo);
  1510. ADD_64_LE(afex_stats->tx_multicast_bytes_hi,
  1511. fcoe_q_xstorm_stats->mcast_bytes_sent.hi,
  1512. afex_stats->tx_multicast_bytes_lo,
  1513. fcoe_q_xstorm_stats->mcast_bytes_sent.lo);
  1514. ADD_64_LE(afex_stats->tx_unicast_frames_hi,
  1515. LE32_0,
  1516. afex_stats->tx_unicast_frames_lo,
  1517. fw_fcoe_stat->tx_stat.fcoe_tx_pkt_cnt);
  1518. ADD_64_LE(afex_stats->tx_unicast_frames_hi,
  1519. LE32_0,
  1520. afex_stats->tx_unicast_frames_lo,
  1521. fcoe_q_xstorm_stats->ucast_pkts_sent);
  1522. ADD_64_LE(afex_stats->tx_broadcast_frames_hi,
  1523. LE32_0,
  1524. afex_stats->tx_broadcast_frames_lo,
  1525. fcoe_q_xstorm_stats->bcast_pkts_sent);
  1526. ADD_64_LE(afex_stats->tx_multicast_frames_hi,
  1527. LE32_0,
  1528. afex_stats->tx_multicast_frames_lo,
  1529. fcoe_q_xstorm_stats->mcast_pkts_sent);
  1530. ADD_64_LE(afex_stats->tx_frames_dropped_hi,
  1531. LE32_0,
  1532. afex_stats->tx_frames_dropped_lo,
  1533. fcoe_q_xstorm_stats->error_drop_pkts);
  1534. }
  1535. /* if port stats are requested, add them to the PMF
  1536. * stats, as anyway they will be accumulated by the
  1537. * MCP before sent to the switch
  1538. */
  1539. if ((bp->port.pmf) && (stats_type == VICSTATST_UIF_INDEX)) {
  1540. ADD_64(afex_stats->rx_frames_dropped_hi,
  1541. 0,
  1542. afex_stats->rx_frames_dropped_lo,
  1543. estats->mac_filter_discard);
  1544. ADD_64(afex_stats->rx_frames_dropped_hi,
  1545. 0,
  1546. afex_stats->rx_frames_dropped_lo,
  1547. estats->brb_truncate_discard);
  1548. ADD_64(afex_stats->rx_frames_discarded_hi,
  1549. 0,
  1550. afex_stats->rx_frames_discarded_lo,
  1551. estats->mac_discard);
  1552. }
  1553. }