pwm-samsung.c 8.0 KB

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  1. /* arch/arm/plat-s3c/pwm.c
  2. *
  3. * Copyright (c) 2007 Ben Dooks
  4. * Copyright (c) 2008 Simtec Electronics
  5. * Ben Dooks <ben@simtec.co.uk>, <ben-linux@fluff.org>
  6. *
  7. * S3C series PWM device core
  8. *
  9. * This program is free software; you can redistribute it and/or modify
  10. * it under the terms of the GNU General Public License as published by
  11. * the Free Software Foundation; either version 2 of the License.
  12. */
  13. #include <linux/export.h>
  14. #include <linux/kernel.h>
  15. #include <linux/platform_device.h>
  16. #include <linux/slab.h>
  17. #include <linux/err.h>
  18. #include <linux/clk.h>
  19. #include <linux/io.h>
  20. #include <linux/pwm.h>
  21. #include <mach/map.h>
  22. #include <plat/regs-timer.h>
  23. struct s3c_chip {
  24. struct platform_device *pdev;
  25. struct clk *clk_div;
  26. struct clk *clk;
  27. const char *label;
  28. unsigned int period_ns;
  29. unsigned int duty_ns;
  30. unsigned char tcon_base;
  31. unsigned char pwm_id;
  32. struct pwm_chip chip;
  33. };
  34. #define to_s3c_chip(chip) container_of(chip, struct s3c_chip, chip)
  35. #define pwm_dbg(_pwm, msg...) dev_dbg(&(_pwm)->pdev->dev, msg)
  36. static struct clk *clk_scaler[2];
  37. static inline int pwm_is_tdiv(struct s3c_chip *chip)
  38. {
  39. return clk_get_parent(chip->clk) == chip->clk_div;
  40. }
  41. #define pwm_tcon_start(pwm) (1 << (pwm->tcon_base + 0))
  42. #define pwm_tcon_invert(pwm) (1 << (pwm->tcon_base + 2))
  43. #define pwm_tcon_autoreload(pwm) (1 << (pwm->tcon_base + 3))
  44. #define pwm_tcon_manulupdate(pwm) (1 << (pwm->tcon_base + 1))
  45. static int s3c_pwm_enable(struct pwm_chip *chip, struct pwm_device *pwm)
  46. {
  47. struct s3c_chip *s3c = to_s3c_chip(chip);
  48. unsigned long flags;
  49. unsigned long tcon;
  50. local_irq_save(flags);
  51. tcon = __raw_readl(S3C2410_TCON);
  52. tcon |= pwm_tcon_start(s3c);
  53. __raw_writel(tcon, S3C2410_TCON);
  54. local_irq_restore(flags);
  55. return 0;
  56. }
  57. static void s3c_pwm_disable(struct pwm_chip *chip, struct pwm_device *pwm)
  58. {
  59. struct s3c_chip *s3c = to_s3c_chip(chip);
  60. unsigned long flags;
  61. unsigned long tcon;
  62. local_irq_save(flags);
  63. tcon = __raw_readl(S3C2410_TCON);
  64. tcon &= ~pwm_tcon_start(s3c);
  65. __raw_writel(tcon, S3C2410_TCON);
  66. local_irq_restore(flags);
  67. }
  68. static unsigned long pwm_calc_tin(struct s3c_chip *s3c, unsigned long freq)
  69. {
  70. unsigned long tin_parent_rate;
  71. unsigned int div;
  72. tin_parent_rate = clk_get_rate(clk_get_parent(s3c->clk_div));
  73. pwm_dbg(s3c, "tin parent at %lu\n", tin_parent_rate);
  74. for (div = 2; div <= 16; div *= 2) {
  75. if ((tin_parent_rate / (div << 16)) < freq)
  76. return tin_parent_rate / div;
  77. }
  78. return tin_parent_rate / 16;
  79. }
  80. #define NS_IN_HZ (1000000000UL)
  81. static int s3c_pwm_config(struct pwm_chip *chip, struct pwm_device *pwm,
  82. int duty_ns, int period_ns)
  83. {
  84. struct s3c_chip *s3c = to_s3c_chip(chip);
  85. unsigned long tin_rate;
  86. unsigned long tin_ns;
  87. unsigned long period;
  88. unsigned long flags;
  89. unsigned long tcon;
  90. unsigned long tcnt;
  91. long tcmp;
  92. /* We currently avoid using 64bit arithmetic by using the
  93. * fact that anything faster than 1Hz is easily representable
  94. * by 32bits. */
  95. if (period_ns > NS_IN_HZ || duty_ns > NS_IN_HZ)
  96. return -ERANGE;
  97. if (duty_ns > period_ns)
  98. return -EINVAL;
  99. if (period_ns == s3c->period_ns &&
  100. duty_ns == s3c->duty_ns)
  101. return 0;
  102. /* The TCMP and TCNT can be read without a lock, they're not
  103. * shared between the timers. */
  104. tcmp = __raw_readl(S3C2410_TCMPB(s3c->pwm_id));
  105. tcnt = __raw_readl(S3C2410_TCNTB(s3c->pwm_id));
  106. period = NS_IN_HZ / period_ns;
  107. pwm_dbg(s3c, "duty_ns=%d, period_ns=%d (%lu)\n",
  108. duty_ns, period_ns, period);
  109. /* Check to see if we are changing the clock rate of the PWM */
  110. if (s3c->period_ns != period_ns) {
  111. if (pwm_is_tdiv(s3c)) {
  112. tin_rate = pwm_calc_tin(s3c, period);
  113. clk_set_rate(s3c->clk_div, tin_rate);
  114. } else
  115. tin_rate = clk_get_rate(s3c->clk);
  116. s3c->period_ns = period_ns;
  117. pwm_dbg(s3c, "tin_rate=%lu\n", tin_rate);
  118. tin_ns = NS_IN_HZ / tin_rate;
  119. tcnt = period_ns / tin_ns;
  120. } else
  121. tin_ns = NS_IN_HZ / clk_get_rate(s3c->clk);
  122. /* Note, counters count down */
  123. tcmp = duty_ns / tin_ns;
  124. tcmp = tcnt - tcmp;
  125. /* the pwm hw only checks the compare register after a decrement,
  126. so the pin never toggles if tcmp = tcnt */
  127. if (tcmp == tcnt)
  128. tcmp--;
  129. pwm_dbg(s3c, "tin_ns=%lu, tcmp=%ld/%lu\n", tin_ns, tcmp, tcnt);
  130. if (tcmp < 0)
  131. tcmp = 0;
  132. /* Update the PWM register block. */
  133. local_irq_save(flags);
  134. __raw_writel(tcmp, S3C2410_TCMPB(s3c->pwm_id));
  135. __raw_writel(tcnt, S3C2410_TCNTB(s3c->pwm_id));
  136. tcon = __raw_readl(S3C2410_TCON);
  137. tcon |= pwm_tcon_manulupdate(s3c);
  138. tcon |= pwm_tcon_autoreload(s3c);
  139. __raw_writel(tcon, S3C2410_TCON);
  140. tcon &= ~pwm_tcon_manulupdate(s3c);
  141. __raw_writel(tcon, S3C2410_TCON);
  142. local_irq_restore(flags);
  143. return 0;
  144. }
  145. static struct pwm_ops s3c_pwm_ops = {
  146. .enable = s3c_pwm_enable,
  147. .disable = s3c_pwm_disable,
  148. .config = s3c_pwm_config,
  149. .owner = THIS_MODULE,
  150. };
  151. static int s3c_pwm_probe(struct platform_device *pdev)
  152. {
  153. struct device *dev = &pdev->dev;
  154. struct s3c_chip *s3c;
  155. unsigned long flags;
  156. unsigned long tcon;
  157. unsigned int id = pdev->id;
  158. int ret;
  159. if (id == 4) {
  160. dev_err(dev, "TIMER4 is currently not supported\n");
  161. return -ENXIO;
  162. }
  163. s3c = kzalloc(sizeof(*s3c), GFP_KERNEL);
  164. if (s3c == NULL) {
  165. dev_err(dev, "failed to allocate pwm_device\n");
  166. return -ENOMEM;
  167. }
  168. /* calculate base of control bits in TCON */
  169. s3c->tcon_base = id == 0 ? 0 : (id * 4) + 4;
  170. s3c->chip.ops = &s3c_pwm_ops;
  171. s3c->chip.base = -1;
  172. s3c->chip.npwm = 1;
  173. s3c->clk = clk_get(dev, "pwm-tin");
  174. if (IS_ERR(s3c->clk)) {
  175. dev_err(dev, "failed to get pwm tin clk\n");
  176. ret = PTR_ERR(s3c->clk);
  177. goto err_alloc;
  178. }
  179. s3c->clk_div = clk_get(dev, "pwm-tdiv");
  180. if (IS_ERR(s3c->clk_div)) {
  181. dev_err(dev, "failed to get pwm tdiv clk\n");
  182. ret = PTR_ERR(s3c->clk_div);
  183. goto err_clk_tin;
  184. }
  185. clk_enable(s3c->clk);
  186. clk_enable(s3c->clk_div);
  187. local_irq_save(flags);
  188. tcon = __raw_readl(S3C2410_TCON);
  189. tcon |= pwm_tcon_invert(s3c);
  190. __raw_writel(tcon, S3C2410_TCON);
  191. local_irq_restore(flags);
  192. ret = pwmchip_add(&s3c->chip);
  193. if (ret < 0) {
  194. dev_err(dev, "failed to register pwm\n");
  195. goto err_clk_tdiv;
  196. }
  197. pwm_dbg(s3c, "config bits %02x\n",
  198. (__raw_readl(S3C2410_TCON) >> s3c->tcon_base) & 0x0f);
  199. dev_info(dev, "tin at %lu, tdiv at %lu, tin=%sclk, base %d\n",
  200. clk_get_rate(s3c->clk),
  201. clk_get_rate(s3c->clk_div),
  202. pwm_is_tdiv(s3c) ? "div" : "ext", s3c->tcon_base);
  203. platform_set_drvdata(pdev, s3c);
  204. return 0;
  205. err_clk_tdiv:
  206. clk_disable(s3c->clk_div);
  207. clk_disable(s3c->clk);
  208. clk_put(s3c->clk_div);
  209. err_clk_tin:
  210. clk_put(s3c->clk);
  211. err_alloc:
  212. kfree(s3c);
  213. return ret;
  214. }
  215. static int __devexit s3c_pwm_remove(struct platform_device *pdev)
  216. {
  217. struct s3c_chip *s3c = platform_get_drvdata(pdev);
  218. int err;
  219. err = pwmchip_remove(&s3c->chip);
  220. if (err < 0)
  221. return err;
  222. clk_disable(s3c->clk_div);
  223. clk_disable(s3c->clk);
  224. clk_put(s3c->clk_div);
  225. clk_put(s3c->clk);
  226. kfree(s3c);
  227. return 0;
  228. }
  229. #ifdef CONFIG_PM
  230. static int s3c_pwm_suspend(struct platform_device *pdev, pm_message_t state)
  231. {
  232. struct s3c_chip *s3c = platform_get_drvdata(pdev);
  233. /* No one preserve these values during suspend so reset them
  234. * Otherwise driver leaves PWM unconfigured if same values
  235. * passed to pwm_config
  236. */
  237. s3c->period_ns = 0;
  238. s3c->duty_ns = 0;
  239. return 0;
  240. }
  241. static int s3c_pwm_resume(struct platform_device *pdev)
  242. {
  243. struct s3c_chip *s3c = platform_get_drvdata(pdev);
  244. unsigned long tcon;
  245. /* Restore invertion */
  246. tcon = __raw_readl(S3C2410_TCON);
  247. tcon |= pwm_tcon_invert(s3c);
  248. __raw_writel(tcon, S3C2410_TCON);
  249. return 0;
  250. }
  251. #else
  252. #define s3c_pwm_suspend NULL
  253. #define s3c_pwm_resume NULL
  254. #endif
  255. static struct platform_driver s3c_pwm_driver = {
  256. .driver = {
  257. .name = "s3c24xx-pwm",
  258. .owner = THIS_MODULE,
  259. },
  260. .probe = s3c_pwm_probe,
  261. .remove = __devexit_p(s3c_pwm_remove),
  262. .suspend = s3c_pwm_suspend,
  263. .resume = s3c_pwm_resume,
  264. };
  265. static int __init pwm_init(void)
  266. {
  267. int ret;
  268. clk_scaler[0] = clk_get(NULL, "pwm-scaler0");
  269. clk_scaler[1] = clk_get(NULL, "pwm-scaler1");
  270. if (IS_ERR(clk_scaler[0]) || IS_ERR(clk_scaler[1])) {
  271. printk(KERN_ERR "%s: failed to get scaler clocks\n", __func__);
  272. return -EINVAL;
  273. }
  274. ret = platform_driver_register(&s3c_pwm_driver);
  275. if (ret)
  276. printk(KERN_ERR "%s: failed to add pwm driver\n", __func__);
  277. return ret;
  278. }
  279. arch_initcall(pwm_init);