qla_init.c 96 KB

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  1. /*
  2. * QLogic Fibre Channel HBA Driver
  3. * Copyright (c) 2003-2005 QLogic Corporation
  4. *
  5. * See LICENSE.qla2xxx for copyright and licensing details.
  6. */
  7. #include "qla_def.h"
  8. #include <linux/delay.h>
  9. #include <linux/vmalloc.h>
  10. #include "qla_devtbl.h"
  11. /* XXX(hch): this is ugly, but we don't want to pull in exioctl.h */
  12. #ifndef EXT_IS_LUN_BIT_SET
  13. #define EXT_IS_LUN_BIT_SET(P,L) \
  14. (((P)->mask[L/8] & (0x80 >> (L%8)))?1:0)
  15. #define EXT_SET_LUN_BIT(P,L) \
  16. ((P)->mask[L/8] |= (0x80 >> (L%8)))
  17. #endif
  18. /*
  19. * QLogic ISP2x00 Hardware Support Function Prototypes.
  20. */
  21. static int qla2x00_isp_firmware(scsi_qla_host_t *);
  22. static void qla2x00_resize_request_q(scsi_qla_host_t *);
  23. static int qla2x00_setup_chip(scsi_qla_host_t *);
  24. static void qla2x00_init_response_q_entries(scsi_qla_host_t *);
  25. static int qla2x00_init_rings(scsi_qla_host_t *);
  26. static int qla2x00_fw_ready(scsi_qla_host_t *);
  27. static int qla2x00_configure_hba(scsi_qla_host_t *);
  28. static int qla2x00_configure_loop(scsi_qla_host_t *);
  29. static int qla2x00_configure_local_loop(scsi_qla_host_t *);
  30. static int qla2x00_configure_fabric(scsi_qla_host_t *);
  31. static int qla2x00_find_all_fabric_devs(scsi_qla_host_t *, struct list_head *);
  32. static int qla2x00_device_resync(scsi_qla_host_t *);
  33. static int qla2x00_fabric_dev_login(scsi_qla_host_t *, fc_port_t *,
  34. uint16_t *);
  35. static int qla2x00_restart_isp(scsi_qla_host_t *);
  36. /****************************************************************************/
  37. /* QLogic ISP2x00 Hardware Support Functions. */
  38. /****************************************************************************/
  39. /*
  40. * qla2x00_initialize_adapter
  41. * Initialize board.
  42. *
  43. * Input:
  44. * ha = adapter block pointer.
  45. *
  46. * Returns:
  47. * 0 = success
  48. */
  49. int
  50. qla2x00_initialize_adapter(scsi_qla_host_t *ha)
  51. {
  52. int rval;
  53. uint8_t restart_risc = 0;
  54. uint8_t retry;
  55. uint32_t wait_time;
  56. /* Clear adapter flags. */
  57. ha->flags.online = 0;
  58. ha->flags.reset_active = 0;
  59. atomic_set(&ha->loop_down_timer, LOOP_DOWN_TIME);
  60. atomic_set(&ha->loop_state, LOOP_DOWN);
  61. ha->device_flags = 0;
  62. ha->dpc_flags = 0;
  63. ha->flags.management_server_logged_in = 0;
  64. ha->marker_needed = 0;
  65. ha->mbx_flags = 0;
  66. ha->isp_abort_cnt = 0;
  67. ha->beacon_blink_led = 0;
  68. set_bit(REGISTER_FDMI_NEEDED, &ha->dpc_flags);
  69. qla_printk(KERN_INFO, ha, "Configuring PCI space...\n");
  70. rval = ha->isp_ops.pci_config(ha);
  71. if (rval) {
  72. DEBUG2(printk("scsi(%ld): Unable to configure PCI space=n",
  73. ha->host_no));
  74. return (rval);
  75. }
  76. ha->isp_ops.reset_chip(ha);
  77. qla_printk(KERN_INFO, ha, "Configure NVRAM parameters...\n");
  78. ha->isp_ops.nvram_config(ha);
  79. qla_printk(KERN_INFO, ha, "Verifying loaded RISC code...\n");
  80. retry = 10;
  81. /*
  82. * Try to configure the loop.
  83. */
  84. do {
  85. restart_risc = 0;
  86. /* If firmware needs to be loaded */
  87. if (qla2x00_isp_firmware(ha) != QLA_SUCCESS) {
  88. if ((rval = ha->isp_ops.chip_diag(ha)) == QLA_SUCCESS) {
  89. rval = qla2x00_setup_chip(ha);
  90. }
  91. }
  92. if (rval == QLA_SUCCESS &&
  93. (rval = qla2x00_init_rings(ha)) == QLA_SUCCESS) {
  94. check_fw_ready_again:
  95. /*
  96. * Wait for a successful LIP up to a maximum
  97. * of (in seconds): RISC login timeout value,
  98. * RISC retry count value, and port down retry
  99. * value OR a minimum of 4 seconds OR If no
  100. * cable, only 5 seconds.
  101. */
  102. rval = qla2x00_fw_ready(ha);
  103. if (rval == QLA_SUCCESS) {
  104. clear_bit(RESET_MARKER_NEEDED, &ha->dpc_flags);
  105. /* Issue a marker after FW becomes ready. */
  106. qla2x00_marker(ha, 0, 0, MK_SYNC_ALL);
  107. /*
  108. * Wait at most MAX_TARGET RSCNs for a stable
  109. * link.
  110. */
  111. wait_time = 256;
  112. do {
  113. clear_bit(LOOP_RESYNC_NEEDED,
  114. &ha->dpc_flags);
  115. rval = qla2x00_configure_loop(ha);
  116. if (test_and_clear_bit(ISP_ABORT_NEEDED,
  117. &ha->dpc_flags)) {
  118. restart_risc = 1;
  119. break;
  120. }
  121. /*
  122. * If loop state change while we were
  123. * discoverying devices then wait for
  124. * LIP to complete
  125. */
  126. if (atomic_read(&ha->loop_state) !=
  127. LOOP_READY && retry--) {
  128. goto check_fw_ready_again;
  129. }
  130. wait_time--;
  131. } while (!atomic_read(&ha->loop_down_timer) &&
  132. retry &&
  133. wait_time &&
  134. (test_bit(LOOP_RESYNC_NEEDED,
  135. &ha->dpc_flags)));
  136. if (wait_time == 0)
  137. rval = QLA_FUNCTION_FAILED;
  138. } else if (ha->device_flags & DFLG_NO_CABLE)
  139. /* If no cable, then all is good. */
  140. rval = QLA_SUCCESS;
  141. }
  142. } while (restart_risc && retry--);
  143. if (rval == QLA_SUCCESS) {
  144. clear_bit(RESET_MARKER_NEEDED, &ha->dpc_flags);
  145. qla2x00_marker(ha, 0, 0, MK_SYNC_ALL);
  146. ha->marker_needed = 0;
  147. ha->flags.online = 1;
  148. } else {
  149. DEBUG2_3(printk("%s(): **** FAILED ****\n", __func__));
  150. }
  151. return (rval);
  152. }
  153. /**
  154. * qla2100_pci_config() - Setup ISP21xx PCI configuration registers.
  155. * @ha: HA context
  156. *
  157. * Returns 0 on success.
  158. */
  159. int
  160. qla2100_pci_config(scsi_qla_host_t *ha)
  161. {
  162. uint16_t w, mwi;
  163. uint32_t d;
  164. unsigned long flags;
  165. struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
  166. pci_set_master(ha->pdev);
  167. mwi = 0;
  168. if (pci_set_mwi(ha->pdev))
  169. mwi = PCI_COMMAND_INVALIDATE;
  170. pci_read_config_word(ha->pdev, PCI_COMMAND, &w);
  171. w |= mwi | (PCI_COMMAND_PARITY | PCI_COMMAND_SERR);
  172. pci_write_config_word(ha->pdev, PCI_COMMAND, w);
  173. /* Reset expansion ROM address decode enable */
  174. pci_read_config_dword(ha->pdev, PCI_ROM_ADDRESS, &d);
  175. d &= ~PCI_ROM_ADDRESS_ENABLE;
  176. pci_write_config_dword(ha->pdev, PCI_ROM_ADDRESS, d);
  177. /* Get PCI bus information. */
  178. spin_lock_irqsave(&ha->hardware_lock, flags);
  179. ha->pci_attr = RD_REG_WORD(&reg->ctrl_status);
  180. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  181. return QLA_SUCCESS;
  182. }
  183. /**
  184. * qla2300_pci_config() - Setup ISP23xx PCI configuration registers.
  185. * @ha: HA context
  186. *
  187. * Returns 0 on success.
  188. */
  189. int
  190. qla2300_pci_config(scsi_qla_host_t *ha)
  191. {
  192. uint16_t w, mwi;
  193. uint32_t d;
  194. unsigned long flags = 0;
  195. uint32_t cnt;
  196. struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
  197. pci_set_master(ha->pdev);
  198. mwi = 0;
  199. if (pci_set_mwi(ha->pdev))
  200. mwi = PCI_COMMAND_INVALIDATE;
  201. pci_read_config_word(ha->pdev, PCI_COMMAND, &w);
  202. w |= mwi | (PCI_COMMAND_PARITY | PCI_COMMAND_SERR);
  203. if (IS_QLA2322(ha) || IS_QLA6322(ha))
  204. w &= ~PCI_COMMAND_INTX_DISABLE;
  205. /*
  206. * If this is a 2300 card and not 2312, reset the
  207. * COMMAND_INVALIDATE due to a bug in the 2300. Unfortunately,
  208. * the 2310 also reports itself as a 2300 so we need to get the
  209. * fb revision level -- a 6 indicates it really is a 2300 and
  210. * not a 2310.
  211. */
  212. if (IS_QLA2300(ha)) {
  213. spin_lock_irqsave(&ha->hardware_lock, flags);
  214. /* Pause RISC. */
  215. WRT_REG_WORD(&reg->hccr, HCCR_PAUSE_RISC);
  216. for (cnt = 0; cnt < 30000; cnt++) {
  217. if ((RD_REG_WORD(&reg->hccr) & HCCR_RISC_PAUSE) != 0)
  218. break;
  219. udelay(10);
  220. }
  221. /* Select FPM registers. */
  222. WRT_REG_WORD(&reg->ctrl_status, 0x20);
  223. RD_REG_WORD(&reg->ctrl_status);
  224. /* Get the fb rev level */
  225. ha->fb_rev = RD_FB_CMD_REG(ha, reg);
  226. if (ha->fb_rev == FPM_2300)
  227. w &= ~PCI_COMMAND_INVALIDATE;
  228. /* Deselect FPM registers. */
  229. WRT_REG_WORD(&reg->ctrl_status, 0x0);
  230. RD_REG_WORD(&reg->ctrl_status);
  231. /* Release RISC module. */
  232. WRT_REG_WORD(&reg->hccr, HCCR_RELEASE_RISC);
  233. for (cnt = 0; cnt < 30000; cnt++) {
  234. if ((RD_REG_WORD(&reg->hccr) & HCCR_RISC_PAUSE) == 0)
  235. break;
  236. udelay(10);
  237. }
  238. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  239. }
  240. pci_write_config_word(ha->pdev, PCI_COMMAND, w);
  241. pci_write_config_byte(ha->pdev, PCI_LATENCY_TIMER, 0x80);
  242. /* Reset expansion ROM address decode enable */
  243. pci_read_config_dword(ha->pdev, PCI_ROM_ADDRESS, &d);
  244. d &= ~PCI_ROM_ADDRESS_ENABLE;
  245. pci_write_config_dword(ha->pdev, PCI_ROM_ADDRESS, d);
  246. /* Get PCI bus information. */
  247. spin_lock_irqsave(&ha->hardware_lock, flags);
  248. ha->pci_attr = RD_REG_WORD(&reg->ctrl_status);
  249. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  250. return QLA_SUCCESS;
  251. }
  252. /**
  253. * qla24xx_pci_config() - Setup ISP24xx PCI configuration registers.
  254. * @ha: HA context
  255. *
  256. * Returns 0 on success.
  257. */
  258. int
  259. qla24xx_pci_config(scsi_qla_host_t *ha)
  260. {
  261. uint16_t w, mwi;
  262. uint32_t d;
  263. unsigned long flags = 0;
  264. struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
  265. int pcix_cmd_reg, pcie_dctl_reg;
  266. pci_set_master(ha->pdev);
  267. mwi = 0;
  268. if (pci_set_mwi(ha->pdev))
  269. mwi = PCI_COMMAND_INVALIDATE;
  270. pci_read_config_word(ha->pdev, PCI_COMMAND, &w);
  271. w |= mwi | (PCI_COMMAND_PARITY | PCI_COMMAND_SERR);
  272. w &= ~PCI_COMMAND_INTX_DISABLE;
  273. pci_write_config_word(ha->pdev, PCI_COMMAND, w);
  274. pci_write_config_byte(ha->pdev, PCI_LATENCY_TIMER, 0x80);
  275. /* PCI-X -- adjust Maximum Memory Read Byte Count (2048). */
  276. pcix_cmd_reg = pci_find_capability(ha->pdev, PCI_CAP_ID_PCIX);
  277. if (pcix_cmd_reg) {
  278. uint16_t pcix_cmd;
  279. pcix_cmd_reg += PCI_X_CMD;
  280. pci_read_config_word(ha->pdev, pcix_cmd_reg, &pcix_cmd);
  281. pcix_cmd &= ~PCI_X_CMD_MAX_READ;
  282. pcix_cmd |= 0x0008;
  283. pci_write_config_word(ha->pdev, pcix_cmd_reg, pcix_cmd);
  284. }
  285. /* PCIe -- adjust Maximum Read Request Size (2048). */
  286. pcie_dctl_reg = pci_find_capability(ha->pdev, PCI_CAP_ID_EXP);
  287. if (pcie_dctl_reg) {
  288. uint16_t pcie_dctl;
  289. pcie_dctl_reg += PCI_EXP_DEVCTL;
  290. pci_read_config_word(ha->pdev, pcie_dctl_reg, &pcie_dctl);
  291. pcie_dctl &= ~PCI_EXP_DEVCTL_READRQ;
  292. pcie_dctl |= 0x4000;
  293. pci_write_config_word(ha->pdev, pcie_dctl_reg, pcie_dctl);
  294. }
  295. /* Reset expansion ROM address decode enable */
  296. pci_read_config_dword(ha->pdev, PCI_ROM_ADDRESS, &d);
  297. d &= ~PCI_ROM_ADDRESS_ENABLE;
  298. pci_write_config_dword(ha->pdev, PCI_ROM_ADDRESS, d);
  299. /* Get PCI bus information. */
  300. spin_lock_irqsave(&ha->hardware_lock, flags);
  301. ha->pci_attr = RD_REG_DWORD(&reg->ctrl_status);
  302. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  303. return QLA_SUCCESS;
  304. }
  305. /**
  306. * qla2x00_isp_firmware() - Choose firmware image.
  307. * @ha: HA context
  308. *
  309. * Returns 0 on success.
  310. */
  311. static int
  312. qla2x00_isp_firmware(scsi_qla_host_t *ha)
  313. {
  314. int rval;
  315. /* Assume loading risc code */
  316. rval = QLA_FUNCTION_FAILED;
  317. if (ha->flags.disable_risc_code_load) {
  318. DEBUG2(printk("scsi(%ld): RISC CODE NOT loaded\n",
  319. ha->host_no));
  320. qla_printk(KERN_INFO, ha, "RISC CODE NOT loaded\n");
  321. /* Verify checksum of loaded RISC code. */
  322. rval = qla2x00_verify_checksum(ha, ha->fw_srisc_address);
  323. }
  324. if (rval) {
  325. DEBUG2_3(printk("scsi(%ld): **** Load RISC code ****\n",
  326. ha->host_no));
  327. }
  328. return (rval);
  329. }
  330. /**
  331. * qla2x00_reset_chip() - Reset ISP chip.
  332. * @ha: HA context
  333. *
  334. * Returns 0 on success.
  335. */
  336. void
  337. qla2x00_reset_chip(scsi_qla_host_t *ha)
  338. {
  339. unsigned long flags = 0;
  340. struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
  341. uint32_t cnt;
  342. uint16_t cmd;
  343. ha->isp_ops.disable_intrs(ha);
  344. spin_lock_irqsave(&ha->hardware_lock, flags);
  345. /* Turn off master enable */
  346. cmd = 0;
  347. pci_read_config_word(ha->pdev, PCI_COMMAND, &cmd);
  348. cmd &= ~PCI_COMMAND_MASTER;
  349. pci_write_config_word(ha->pdev, PCI_COMMAND, cmd);
  350. if (!IS_QLA2100(ha)) {
  351. /* Pause RISC. */
  352. WRT_REG_WORD(&reg->hccr, HCCR_PAUSE_RISC);
  353. if (IS_QLA2200(ha) || IS_QLA2300(ha)) {
  354. for (cnt = 0; cnt < 30000; cnt++) {
  355. if ((RD_REG_WORD(&reg->hccr) &
  356. HCCR_RISC_PAUSE) != 0)
  357. break;
  358. udelay(100);
  359. }
  360. } else {
  361. RD_REG_WORD(&reg->hccr); /* PCI Posting. */
  362. udelay(10);
  363. }
  364. /* Select FPM registers. */
  365. WRT_REG_WORD(&reg->ctrl_status, 0x20);
  366. RD_REG_WORD(&reg->ctrl_status); /* PCI Posting. */
  367. /* FPM Soft Reset. */
  368. WRT_REG_WORD(&reg->fpm_diag_config, 0x100);
  369. RD_REG_WORD(&reg->fpm_diag_config); /* PCI Posting. */
  370. /* Toggle Fpm Reset. */
  371. if (!IS_QLA2200(ha)) {
  372. WRT_REG_WORD(&reg->fpm_diag_config, 0x0);
  373. RD_REG_WORD(&reg->fpm_diag_config); /* PCI Posting. */
  374. }
  375. /* Select frame buffer registers. */
  376. WRT_REG_WORD(&reg->ctrl_status, 0x10);
  377. RD_REG_WORD(&reg->ctrl_status); /* PCI Posting. */
  378. /* Reset frame buffer FIFOs. */
  379. if (IS_QLA2200(ha)) {
  380. WRT_FB_CMD_REG(ha, reg, 0xa000);
  381. RD_FB_CMD_REG(ha, reg); /* PCI Posting. */
  382. } else {
  383. WRT_FB_CMD_REG(ha, reg, 0x00fc);
  384. /* Read back fb_cmd until zero or 3 seconds max */
  385. for (cnt = 0; cnt < 3000; cnt++) {
  386. if ((RD_FB_CMD_REG(ha, reg) & 0xff) == 0)
  387. break;
  388. udelay(100);
  389. }
  390. }
  391. /* Select RISC module registers. */
  392. WRT_REG_WORD(&reg->ctrl_status, 0);
  393. RD_REG_WORD(&reg->ctrl_status); /* PCI Posting. */
  394. /* Reset RISC processor. */
  395. WRT_REG_WORD(&reg->hccr, HCCR_RESET_RISC);
  396. RD_REG_WORD(&reg->hccr); /* PCI Posting. */
  397. /* Release RISC processor. */
  398. WRT_REG_WORD(&reg->hccr, HCCR_RELEASE_RISC);
  399. RD_REG_WORD(&reg->hccr); /* PCI Posting. */
  400. }
  401. WRT_REG_WORD(&reg->hccr, HCCR_CLR_RISC_INT);
  402. WRT_REG_WORD(&reg->hccr, HCCR_CLR_HOST_INT);
  403. /* Reset ISP chip. */
  404. WRT_REG_WORD(&reg->ctrl_status, CSR_ISP_SOFT_RESET);
  405. /* Wait for RISC to recover from reset. */
  406. if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) {
  407. /*
  408. * It is necessary to for a delay here since the card doesn't
  409. * respond to PCI reads during a reset. On some architectures
  410. * this will result in an MCA.
  411. */
  412. udelay(20);
  413. for (cnt = 30000; cnt; cnt--) {
  414. if ((RD_REG_WORD(&reg->ctrl_status) &
  415. CSR_ISP_SOFT_RESET) == 0)
  416. break;
  417. udelay(100);
  418. }
  419. } else
  420. udelay(10);
  421. /* Reset RISC processor. */
  422. WRT_REG_WORD(&reg->hccr, HCCR_RESET_RISC);
  423. WRT_REG_WORD(&reg->semaphore, 0);
  424. /* Release RISC processor. */
  425. WRT_REG_WORD(&reg->hccr, HCCR_RELEASE_RISC);
  426. RD_REG_WORD(&reg->hccr); /* PCI Posting. */
  427. if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) {
  428. for (cnt = 0; cnt < 30000; cnt++) {
  429. if (RD_MAILBOX_REG(ha, reg, 0) != MBS_BUSY)
  430. break;
  431. udelay(100);
  432. }
  433. } else
  434. udelay(100);
  435. /* Turn on master enable */
  436. cmd |= PCI_COMMAND_MASTER;
  437. pci_write_config_word(ha->pdev, PCI_COMMAND, cmd);
  438. /* Disable RISC pause on FPM parity error. */
  439. if (!IS_QLA2100(ha)) {
  440. WRT_REG_WORD(&reg->hccr, HCCR_DISABLE_PARITY_PAUSE);
  441. RD_REG_WORD(&reg->hccr); /* PCI Posting. */
  442. }
  443. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  444. }
  445. /**
  446. * qla24xx_reset_risc() - Perform full reset of ISP24xx RISC.
  447. * @ha: HA context
  448. *
  449. * Returns 0 on success.
  450. */
  451. static inline void
  452. qla24xx_reset_risc(scsi_qla_host_t *ha)
  453. {
  454. unsigned long flags = 0;
  455. struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
  456. uint32_t cnt, d2;
  457. uint16_t wd;
  458. spin_lock_irqsave(&ha->hardware_lock, flags);
  459. /* Reset RISC. */
  460. WRT_REG_DWORD(&reg->ctrl_status, CSRX_DMA_SHUTDOWN|MWB_4096_BYTES);
  461. for (cnt = 0; cnt < 30000; cnt++) {
  462. if ((RD_REG_DWORD(&reg->ctrl_status) & CSRX_DMA_ACTIVE) == 0)
  463. break;
  464. udelay(10);
  465. }
  466. WRT_REG_DWORD(&reg->ctrl_status,
  467. CSRX_ISP_SOFT_RESET|CSRX_DMA_SHUTDOWN|MWB_4096_BYTES);
  468. pci_read_config_word(ha->pdev, PCI_COMMAND, &wd);
  469. udelay(100);
  470. /* Wait for firmware to complete NVRAM accesses. */
  471. d2 = (uint32_t) RD_REG_WORD(&reg->mailbox0);
  472. for (cnt = 10000 ; cnt && d2; cnt--) {
  473. udelay(5);
  474. d2 = (uint32_t) RD_REG_WORD(&reg->mailbox0);
  475. barrier();
  476. }
  477. /* Wait for soft-reset to complete. */
  478. d2 = RD_REG_DWORD(&reg->ctrl_status);
  479. for (cnt = 6000000 ; cnt && (d2 & CSRX_ISP_SOFT_RESET); cnt--) {
  480. udelay(5);
  481. d2 = RD_REG_DWORD(&reg->ctrl_status);
  482. barrier();
  483. }
  484. WRT_REG_DWORD(&reg->hccr, HCCRX_SET_RISC_RESET);
  485. RD_REG_DWORD(&reg->hccr);
  486. WRT_REG_DWORD(&reg->hccr, HCCRX_REL_RISC_PAUSE);
  487. RD_REG_DWORD(&reg->hccr);
  488. WRT_REG_DWORD(&reg->hccr, HCCRX_CLR_RISC_RESET);
  489. RD_REG_DWORD(&reg->hccr);
  490. d2 = (uint32_t) RD_REG_WORD(&reg->mailbox0);
  491. for (cnt = 6000000 ; cnt && d2; cnt--) {
  492. udelay(5);
  493. d2 = (uint32_t) RD_REG_WORD(&reg->mailbox0);
  494. barrier();
  495. }
  496. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  497. }
  498. /**
  499. * qla24xx_reset_chip() - Reset ISP24xx chip.
  500. * @ha: HA context
  501. *
  502. * Returns 0 on success.
  503. */
  504. void
  505. qla24xx_reset_chip(scsi_qla_host_t *ha)
  506. {
  507. ha->isp_ops.disable_intrs(ha);
  508. /* Perform RISC reset. */
  509. qla24xx_reset_risc(ha);
  510. }
  511. /**
  512. * qla2x00_chip_diag() - Test chip for proper operation.
  513. * @ha: HA context
  514. *
  515. * Returns 0 on success.
  516. */
  517. int
  518. qla2x00_chip_diag(scsi_qla_host_t *ha)
  519. {
  520. int rval;
  521. struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
  522. unsigned long flags = 0;
  523. uint16_t data;
  524. uint32_t cnt;
  525. uint16_t mb[5];
  526. /* Assume a failed state */
  527. rval = QLA_FUNCTION_FAILED;
  528. DEBUG3(printk("scsi(%ld): Testing device at %lx.\n",
  529. ha->host_no, (u_long)&reg->flash_address));
  530. spin_lock_irqsave(&ha->hardware_lock, flags);
  531. /* Reset ISP chip. */
  532. WRT_REG_WORD(&reg->ctrl_status, CSR_ISP_SOFT_RESET);
  533. /*
  534. * We need to have a delay here since the card will not respond while
  535. * in reset causing an MCA on some architectures.
  536. */
  537. udelay(20);
  538. data = qla2x00_debounce_register(&reg->ctrl_status);
  539. for (cnt = 6000000 ; cnt && (data & CSR_ISP_SOFT_RESET); cnt--) {
  540. udelay(5);
  541. data = RD_REG_WORD(&reg->ctrl_status);
  542. barrier();
  543. }
  544. if (!cnt)
  545. goto chip_diag_failed;
  546. DEBUG3(printk("scsi(%ld): Reset register cleared by chip reset\n",
  547. ha->host_no));
  548. /* Reset RISC processor. */
  549. WRT_REG_WORD(&reg->hccr, HCCR_RESET_RISC);
  550. WRT_REG_WORD(&reg->hccr, HCCR_RELEASE_RISC);
  551. /* Workaround for QLA2312 PCI parity error */
  552. if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) {
  553. data = qla2x00_debounce_register(MAILBOX_REG(ha, reg, 0));
  554. for (cnt = 6000000; cnt && (data == MBS_BUSY); cnt--) {
  555. udelay(5);
  556. data = RD_MAILBOX_REG(ha, reg, 0);
  557. barrier();
  558. }
  559. } else
  560. udelay(10);
  561. if (!cnt)
  562. goto chip_diag_failed;
  563. /* Check product ID of chip */
  564. DEBUG3(printk("scsi(%ld): Checking product ID of chip\n", ha->host_no));
  565. mb[1] = RD_MAILBOX_REG(ha, reg, 1);
  566. mb[2] = RD_MAILBOX_REG(ha, reg, 2);
  567. mb[3] = RD_MAILBOX_REG(ha, reg, 3);
  568. mb[4] = qla2x00_debounce_register(MAILBOX_REG(ha, reg, 4));
  569. if (mb[1] != PROD_ID_1 || (mb[2] != PROD_ID_2 && mb[2] != PROD_ID_2a) ||
  570. mb[3] != PROD_ID_3) {
  571. qla_printk(KERN_WARNING, ha,
  572. "Wrong product ID = 0x%x,0x%x,0x%x\n", mb[1], mb[2], mb[3]);
  573. goto chip_diag_failed;
  574. }
  575. ha->product_id[0] = mb[1];
  576. ha->product_id[1] = mb[2];
  577. ha->product_id[2] = mb[3];
  578. ha->product_id[3] = mb[4];
  579. /* Adjust fw RISC transfer size */
  580. if (ha->request_q_length > 1024)
  581. ha->fw_transfer_size = REQUEST_ENTRY_SIZE * 1024;
  582. else
  583. ha->fw_transfer_size = REQUEST_ENTRY_SIZE *
  584. ha->request_q_length;
  585. if (IS_QLA2200(ha) &&
  586. RD_MAILBOX_REG(ha, reg, 7) == QLA2200A_RISC_ROM_VER) {
  587. /* Limit firmware transfer size with a 2200A */
  588. DEBUG3(printk("scsi(%ld): Found QLA2200A chip.\n",
  589. ha->host_no));
  590. ha->device_type |= DT_ISP2200A;
  591. ha->fw_transfer_size = 128;
  592. }
  593. /* Wrap Incoming Mailboxes Test. */
  594. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  595. DEBUG3(printk("scsi(%ld): Checking mailboxes.\n", ha->host_no));
  596. rval = qla2x00_mbx_reg_test(ha);
  597. if (rval) {
  598. DEBUG(printk("scsi(%ld): Failed mailbox send register test\n",
  599. ha->host_no));
  600. qla_printk(KERN_WARNING, ha,
  601. "Failed mailbox send register test\n");
  602. }
  603. else {
  604. /* Flag a successful rval */
  605. rval = QLA_SUCCESS;
  606. }
  607. spin_lock_irqsave(&ha->hardware_lock, flags);
  608. chip_diag_failed:
  609. if (rval)
  610. DEBUG2_3(printk("scsi(%ld): Chip diagnostics **** FAILED "
  611. "****\n", ha->host_no));
  612. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  613. return (rval);
  614. }
  615. /**
  616. * qla24xx_chip_diag() - Test ISP24xx for proper operation.
  617. * @ha: HA context
  618. *
  619. * Returns 0 on success.
  620. */
  621. int
  622. qla24xx_chip_diag(scsi_qla_host_t *ha)
  623. {
  624. int rval;
  625. /* Perform RISC reset. */
  626. qla24xx_reset_risc(ha);
  627. ha->fw_transfer_size = REQUEST_ENTRY_SIZE * 1024;
  628. rval = qla2x00_mbx_reg_test(ha);
  629. if (rval) {
  630. DEBUG(printk("scsi(%ld): Failed mailbox send register test\n",
  631. ha->host_no));
  632. qla_printk(KERN_WARNING, ha,
  633. "Failed mailbox send register test\n");
  634. } else {
  635. /* Flag a successful rval */
  636. rval = QLA_SUCCESS;
  637. }
  638. return rval;
  639. }
  640. static void
  641. qla2x00_alloc_fw_dump(scsi_qla_host_t *ha)
  642. {
  643. uint32_t dump_size = 0;
  644. ha->fw_dumped = 0;
  645. if (IS_QLA2100(ha) || IS_QLA2200(ha)) {
  646. dump_size = sizeof(struct qla2100_fw_dump);
  647. } else if (IS_QLA23XX(ha)) {
  648. dump_size = sizeof(struct qla2300_fw_dump);
  649. dump_size += (ha->fw_memory_size - 0x11000) * sizeof(uint16_t);
  650. } else if (IS_QLA24XX(ha) || IS_QLA54XX(ha)) {
  651. dump_size = sizeof(struct qla24xx_fw_dump);
  652. dump_size += (ha->fw_memory_size - 0x100000) * sizeof(uint32_t);
  653. }
  654. ha->fw_dump = vmalloc(dump_size);
  655. if (ha->fw_dump)
  656. qla_printk(KERN_INFO, ha, "Allocated (%d KB) for firmware "
  657. "dump...\n", dump_size / 1024);
  658. else
  659. qla_printk(KERN_WARNING, ha, "Unable to allocate (%d KB) for "
  660. "firmware dump!!!\n", dump_size / 1024);
  661. }
  662. /**
  663. * qla2x00_resize_request_q() - Resize request queue given available ISP memory.
  664. * @ha: HA context
  665. *
  666. * Returns 0 on success.
  667. */
  668. static void
  669. qla2x00_resize_request_q(scsi_qla_host_t *ha)
  670. {
  671. int rval;
  672. uint16_t fw_iocb_cnt = 0;
  673. uint16_t request_q_length = REQUEST_ENTRY_CNT_2XXX_EXT_MEM;
  674. dma_addr_t request_dma;
  675. request_t *request_ring;
  676. qla2x00_alloc_fw_dump(ha);
  677. /* Valid only on recent ISPs. */
  678. if (IS_QLA2100(ha) || IS_QLA2200(ha))
  679. return;
  680. /* Retrieve IOCB counts available to the firmware. */
  681. rval = qla2x00_get_resource_cnts(ha, NULL, NULL, NULL, &fw_iocb_cnt);
  682. if (rval)
  683. return;
  684. /* No point in continuing if current settings are sufficient. */
  685. if (fw_iocb_cnt < 1024)
  686. return;
  687. if (ha->request_q_length >= request_q_length)
  688. return;
  689. /* Attempt to claim larger area for request queue. */
  690. request_ring = dma_alloc_coherent(&ha->pdev->dev,
  691. (request_q_length + 1) * sizeof(request_t), &request_dma,
  692. GFP_KERNEL);
  693. if (request_ring == NULL)
  694. return;
  695. /* Resize successful, report extensions. */
  696. qla_printk(KERN_INFO, ha, "Extended memory detected (%d KB)...\n",
  697. (ha->fw_memory_size + 1) / 1024);
  698. qla_printk(KERN_INFO, ha, "Resizing request queue depth "
  699. "(%d -> %d)...\n", ha->request_q_length, request_q_length);
  700. /* Clear old allocations. */
  701. dma_free_coherent(&ha->pdev->dev,
  702. (ha->request_q_length + 1) * sizeof(request_t), ha->request_ring,
  703. ha->request_dma);
  704. /* Begin using larger queue. */
  705. ha->request_q_length = request_q_length;
  706. ha->request_ring = request_ring;
  707. ha->request_dma = request_dma;
  708. }
  709. /**
  710. * qla2x00_setup_chip() - Load and start RISC firmware.
  711. * @ha: HA context
  712. *
  713. * Returns 0 on success.
  714. */
  715. static int
  716. qla2x00_setup_chip(scsi_qla_host_t *ha)
  717. {
  718. int rval;
  719. uint32_t srisc_address = 0;
  720. /* Load firmware sequences */
  721. rval = ha->isp_ops.load_risc(ha, &srisc_address);
  722. if (rval == QLA_SUCCESS) {
  723. DEBUG(printk("scsi(%ld): Verifying Checksum of loaded RISC "
  724. "code.\n", ha->host_no));
  725. rval = qla2x00_verify_checksum(ha, srisc_address);
  726. if (rval == QLA_SUCCESS) {
  727. /* Start firmware execution. */
  728. DEBUG(printk("scsi(%ld): Checksum OK, start "
  729. "firmware.\n", ha->host_no));
  730. rval = qla2x00_execute_fw(ha, srisc_address);
  731. /* Retrieve firmware information. */
  732. if (rval == QLA_SUCCESS && ha->fw_major_version == 0) {
  733. qla2x00_get_fw_version(ha,
  734. &ha->fw_major_version,
  735. &ha->fw_minor_version,
  736. &ha->fw_subminor_version,
  737. &ha->fw_attributes, &ha->fw_memory_size);
  738. qla2x00_resize_request_q(ha);
  739. }
  740. } else {
  741. DEBUG2(printk(KERN_INFO
  742. "scsi(%ld): ISP Firmware failed checksum.\n",
  743. ha->host_no));
  744. }
  745. }
  746. if (rval) {
  747. DEBUG2_3(printk("scsi(%ld): Setup chip **** FAILED ****.\n",
  748. ha->host_no));
  749. }
  750. return (rval);
  751. }
  752. /**
  753. * qla2x00_init_response_q_entries() - Initializes response queue entries.
  754. * @ha: HA context
  755. *
  756. * Beginning of request ring has initialization control block already built
  757. * by nvram config routine.
  758. *
  759. * Returns 0 on success.
  760. */
  761. static void
  762. qla2x00_init_response_q_entries(scsi_qla_host_t *ha)
  763. {
  764. uint16_t cnt;
  765. response_t *pkt;
  766. pkt = ha->response_ring_ptr;
  767. for (cnt = 0; cnt < ha->response_q_length; cnt++) {
  768. pkt->signature = RESPONSE_PROCESSED;
  769. pkt++;
  770. }
  771. }
  772. /**
  773. * qla2x00_update_fw_options() - Read and process firmware options.
  774. * @ha: HA context
  775. *
  776. * Returns 0 on success.
  777. */
  778. void
  779. qla2x00_update_fw_options(scsi_qla_host_t *ha)
  780. {
  781. uint16_t swing, emphasis, tx_sens, rx_sens;
  782. memset(ha->fw_options, 0, sizeof(ha->fw_options));
  783. qla2x00_get_fw_options(ha, ha->fw_options);
  784. if (IS_QLA2100(ha) || IS_QLA2200(ha))
  785. return;
  786. /* Serial Link options. */
  787. DEBUG3(printk("scsi(%ld): Serial link options:\n",
  788. ha->host_no));
  789. DEBUG3(qla2x00_dump_buffer((uint8_t *)&ha->fw_seriallink_options,
  790. sizeof(ha->fw_seriallink_options)));
  791. ha->fw_options[1] &= ~FO1_SET_EMPHASIS_SWING;
  792. if (ha->fw_seriallink_options[3] & BIT_2) {
  793. ha->fw_options[1] |= FO1_SET_EMPHASIS_SWING;
  794. /* 1G settings */
  795. swing = ha->fw_seriallink_options[2] & (BIT_2 | BIT_1 | BIT_0);
  796. emphasis = (ha->fw_seriallink_options[2] &
  797. (BIT_4 | BIT_3)) >> 3;
  798. tx_sens = ha->fw_seriallink_options[0] &
  799. (BIT_3 | BIT_2 | BIT_1 | BIT_0);
  800. rx_sens = (ha->fw_seriallink_options[0] &
  801. (BIT_7 | BIT_6 | BIT_5 | BIT_4)) >> 4;
  802. ha->fw_options[10] = (emphasis << 14) | (swing << 8);
  803. if (IS_QLA2300(ha) || IS_QLA2312(ha) || IS_QLA6312(ha)) {
  804. if (rx_sens == 0x0)
  805. rx_sens = 0x3;
  806. ha->fw_options[10] |= (tx_sens << 4) | rx_sens;
  807. } else if (IS_QLA2322(ha) || IS_QLA6322(ha))
  808. ha->fw_options[10] |= BIT_5 |
  809. ((rx_sens & (BIT_1 | BIT_0)) << 2) |
  810. (tx_sens & (BIT_1 | BIT_0));
  811. /* 2G settings */
  812. swing = (ha->fw_seriallink_options[2] &
  813. (BIT_7 | BIT_6 | BIT_5)) >> 5;
  814. emphasis = ha->fw_seriallink_options[3] & (BIT_1 | BIT_0);
  815. tx_sens = ha->fw_seriallink_options[1] &
  816. (BIT_3 | BIT_2 | BIT_1 | BIT_0);
  817. rx_sens = (ha->fw_seriallink_options[1] &
  818. (BIT_7 | BIT_6 | BIT_5 | BIT_4)) >> 4;
  819. ha->fw_options[11] = (emphasis << 14) | (swing << 8);
  820. if (IS_QLA2300(ha) || IS_QLA2312(ha) || IS_QLA6312(ha)) {
  821. if (rx_sens == 0x0)
  822. rx_sens = 0x3;
  823. ha->fw_options[11] |= (tx_sens << 4) | rx_sens;
  824. } else if (IS_QLA2322(ha) || IS_QLA6322(ha))
  825. ha->fw_options[11] |= BIT_5 |
  826. ((rx_sens & (BIT_1 | BIT_0)) << 2) |
  827. (tx_sens & (BIT_1 | BIT_0));
  828. }
  829. /* FCP2 options. */
  830. /* Return command IOCBs without waiting for an ABTS to complete. */
  831. ha->fw_options[3] |= BIT_13;
  832. /* LED scheme. */
  833. if (ha->flags.enable_led_scheme)
  834. ha->fw_options[2] |= BIT_12;
  835. /* Detect ISP6312. */
  836. if (IS_QLA6312(ha))
  837. ha->fw_options[2] |= BIT_13;
  838. /* Update firmware options. */
  839. qla2x00_set_fw_options(ha, ha->fw_options);
  840. }
  841. void
  842. qla24xx_update_fw_options(scsi_qla_host_t *ha)
  843. {
  844. int rval;
  845. /* Update Serial Link options. */
  846. if ((le16_to_cpu(ha->fw_seriallink_options24[0]) & BIT_0) == 0)
  847. return;
  848. rval = qla2x00_set_serdes_params(ha,
  849. le16_to_cpu(ha->fw_seriallink_options24[1]),
  850. le16_to_cpu(ha->fw_seriallink_options24[2]),
  851. le16_to_cpu(ha->fw_seriallink_options24[3]));
  852. if (rval != QLA_SUCCESS) {
  853. qla_printk(KERN_WARNING, ha,
  854. "Unable to update Serial Link options (%x).\n", rval);
  855. }
  856. }
  857. void
  858. qla2x00_config_rings(struct scsi_qla_host *ha)
  859. {
  860. struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
  861. /* Setup ring parameters in initialization control block. */
  862. ha->init_cb->request_q_outpointer = __constant_cpu_to_le16(0);
  863. ha->init_cb->response_q_inpointer = __constant_cpu_to_le16(0);
  864. ha->init_cb->request_q_length = cpu_to_le16(ha->request_q_length);
  865. ha->init_cb->response_q_length = cpu_to_le16(ha->response_q_length);
  866. ha->init_cb->request_q_address[0] = cpu_to_le32(LSD(ha->request_dma));
  867. ha->init_cb->request_q_address[1] = cpu_to_le32(MSD(ha->request_dma));
  868. ha->init_cb->response_q_address[0] = cpu_to_le32(LSD(ha->response_dma));
  869. ha->init_cb->response_q_address[1] = cpu_to_le32(MSD(ha->response_dma));
  870. WRT_REG_WORD(ISP_REQ_Q_IN(ha, reg), 0);
  871. WRT_REG_WORD(ISP_REQ_Q_OUT(ha, reg), 0);
  872. WRT_REG_WORD(ISP_RSP_Q_IN(ha, reg), 0);
  873. WRT_REG_WORD(ISP_RSP_Q_OUT(ha, reg), 0);
  874. RD_REG_WORD(ISP_RSP_Q_OUT(ha, reg)); /* PCI Posting. */
  875. }
  876. void
  877. qla24xx_config_rings(struct scsi_qla_host *ha)
  878. {
  879. struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
  880. struct init_cb_24xx *icb;
  881. /* Setup ring parameters in initialization control block. */
  882. icb = (struct init_cb_24xx *)ha->init_cb;
  883. icb->request_q_outpointer = __constant_cpu_to_le16(0);
  884. icb->response_q_inpointer = __constant_cpu_to_le16(0);
  885. icb->request_q_length = cpu_to_le16(ha->request_q_length);
  886. icb->response_q_length = cpu_to_le16(ha->response_q_length);
  887. icb->request_q_address[0] = cpu_to_le32(LSD(ha->request_dma));
  888. icb->request_q_address[1] = cpu_to_le32(MSD(ha->request_dma));
  889. icb->response_q_address[0] = cpu_to_le32(LSD(ha->response_dma));
  890. icb->response_q_address[1] = cpu_to_le32(MSD(ha->response_dma));
  891. WRT_REG_DWORD(&reg->req_q_in, 0);
  892. WRT_REG_DWORD(&reg->req_q_out, 0);
  893. WRT_REG_DWORD(&reg->rsp_q_in, 0);
  894. WRT_REG_DWORD(&reg->rsp_q_out, 0);
  895. RD_REG_DWORD(&reg->rsp_q_out);
  896. }
  897. /**
  898. * qla2x00_init_rings() - Initializes firmware.
  899. * @ha: HA context
  900. *
  901. * Beginning of request ring has initialization control block already built
  902. * by nvram config routine.
  903. *
  904. * Returns 0 on success.
  905. */
  906. static int
  907. qla2x00_init_rings(scsi_qla_host_t *ha)
  908. {
  909. int rval;
  910. unsigned long flags = 0;
  911. int cnt;
  912. spin_lock_irqsave(&ha->hardware_lock, flags);
  913. /* Clear outstanding commands array. */
  914. for (cnt = 0; cnt < MAX_OUTSTANDING_COMMANDS; cnt++)
  915. ha->outstanding_cmds[cnt] = NULL;
  916. ha->current_outstanding_cmd = 0;
  917. /* Clear RSCN queue. */
  918. ha->rscn_in_ptr = 0;
  919. ha->rscn_out_ptr = 0;
  920. /* Initialize firmware. */
  921. ha->request_ring_ptr = ha->request_ring;
  922. ha->req_ring_index = 0;
  923. ha->req_q_cnt = ha->request_q_length;
  924. ha->response_ring_ptr = ha->response_ring;
  925. ha->rsp_ring_index = 0;
  926. /* Initialize response queue entries */
  927. qla2x00_init_response_q_entries(ha);
  928. ha->isp_ops.config_rings(ha);
  929. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  930. /* Update any ISP specific firmware options before initialization. */
  931. ha->isp_ops.update_fw_options(ha);
  932. DEBUG(printk("scsi(%ld): Issue init firmware.\n", ha->host_no));
  933. rval = qla2x00_init_firmware(ha, ha->init_cb_size);
  934. if (rval) {
  935. DEBUG2_3(printk("scsi(%ld): Init firmware **** FAILED ****.\n",
  936. ha->host_no));
  937. } else {
  938. DEBUG3(printk("scsi(%ld): Init firmware -- success.\n",
  939. ha->host_no));
  940. }
  941. return (rval);
  942. }
  943. /**
  944. * qla2x00_fw_ready() - Waits for firmware ready.
  945. * @ha: HA context
  946. *
  947. * Returns 0 on success.
  948. */
  949. static int
  950. qla2x00_fw_ready(scsi_qla_host_t *ha)
  951. {
  952. int rval;
  953. unsigned long wtime, mtime;
  954. uint16_t min_wait; /* Minimum wait time if loop is down */
  955. uint16_t wait_time; /* Wait time if loop is coming ready */
  956. uint16_t fw_state;
  957. rval = QLA_SUCCESS;
  958. /* 20 seconds for loop down. */
  959. min_wait = 20;
  960. /*
  961. * Firmware should take at most one RATOV to login, plus 5 seconds for
  962. * our own processing.
  963. */
  964. if ((wait_time = (ha->retry_count*ha->login_timeout) + 5) < min_wait) {
  965. wait_time = min_wait;
  966. }
  967. /* Min wait time if loop down */
  968. mtime = jiffies + (min_wait * HZ);
  969. /* wait time before firmware ready */
  970. wtime = jiffies + (wait_time * HZ);
  971. /* Wait for ISP to finish LIP */
  972. if (!ha->flags.init_done)
  973. qla_printk(KERN_INFO, ha, "Waiting for LIP to complete...\n");
  974. DEBUG3(printk("scsi(%ld): Waiting for LIP to complete...\n",
  975. ha->host_no));
  976. do {
  977. rval = qla2x00_get_firmware_state(ha, &fw_state);
  978. if (rval == QLA_SUCCESS) {
  979. if (fw_state < FSTATE_LOSS_OF_SYNC) {
  980. ha->device_flags &= ~DFLG_NO_CABLE;
  981. }
  982. if (fw_state == FSTATE_READY) {
  983. DEBUG(printk("scsi(%ld): F/W Ready - OK \n",
  984. ha->host_no));
  985. qla2x00_get_retry_cnt(ha, &ha->retry_count,
  986. &ha->login_timeout, &ha->r_a_tov);
  987. rval = QLA_SUCCESS;
  988. break;
  989. }
  990. rval = QLA_FUNCTION_FAILED;
  991. if (atomic_read(&ha->loop_down_timer) &&
  992. (fw_state >= FSTATE_LOSS_OF_SYNC ||
  993. fw_state == FSTATE_WAIT_AL_PA)) {
  994. /* Loop down. Timeout on min_wait for states
  995. * other than Wait for Login.
  996. */
  997. if (time_after_eq(jiffies, mtime)) {
  998. qla_printk(KERN_INFO, ha,
  999. "Cable is unplugged...\n");
  1000. ha->device_flags |= DFLG_NO_CABLE;
  1001. break;
  1002. }
  1003. }
  1004. } else {
  1005. /* Mailbox cmd failed. Timeout on min_wait. */
  1006. if (time_after_eq(jiffies, mtime))
  1007. break;
  1008. }
  1009. if (time_after_eq(jiffies, wtime))
  1010. break;
  1011. /* Delay for a while */
  1012. msleep(500);
  1013. DEBUG3(printk("scsi(%ld): fw_state=%x curr time=%lx.\n",
  1014. ha->host_no, fw_state, jiffies));
  1015. } while (1);
  1016. DEBUG(printk("scsi(%ld): fw_state=%x curr time=%lx.\n",
  1017. ha->host_no, fw_state, jiffies));
  1018. if (rval) {
  1019. DEBUG2_3(printk("scsi(%ld): Firmware ready **** FAILED ****.\n",
  1020. ha->host_no));
  1021. }
  1022. return (rval);
  1023. }
  1024. /*
  1025. * qla2x00_configure_hba
  1026. * Setup adapter context.
  1027. *
  1028. * Input:
  1029. * ha = adapter state pointer.
  1030. *
  1031. * Returns:
  1032. * 0 = success
  1033. *
  1034. * Context:
  1035. * Kernel context.
  1036. */
  1037. static int
  1038. qla2x00_configure_hba(scsi_qla_host_t *ha)
  1039. {
  1040. int rval;
  1041. uint16_t loop_id;
  1042. uint16_t topo;
  1043. uint8_t al_pa;
  1044. uint8_t area;
  1045. uint8_t domain;
  1046. char connect_type[22];
  1047. /* Get host addresses. */
  1048. rval = qla2x00_get_adapter_id(ha,
  1049. &loop_id, &al_pa, &area, &domain, &topo);
  1050. if (rval != QLA_SUCCESS) {
  1051. if (LOOP_TRANSITION(ha) || atomic_read(&ha->loop_down_timer) ||
  1052. (rval == QLA_COMMAND_ERROR && loop_id == 0x7)) {
  1053. DEBUG2(printk("%s(%ld) Loop is in a transition state\n",
  1054. __func__, ha->host_no));
  1055. } else {
  1056. qla_printk(KERN_WARNING, ha,
  1057. "ERROR -- Unable to get host loop ID.\n");
  1058. set_bit(ISP_ABORT_NEEDED, &ha->dpc_flags);
  1059. }
  1060. return (rval);
  1061. }
  1062. if (topo == 4) {
  1063. qla_printk(KERN_INFO, ha,
  1064. "Cannot get topology - retrying.\n");
  1065. return (QLA_FUNCTION_FAILED);
  1066. }
  1067. ha->loop_id = loop_id;
  1068. /* initialize */
  1069. ha->min_external_loopid = SNS_FIRST_LOOP_ID;
  1070. ha->operating_mode = LOOP;
  1071. switch (topo) {
  1072. case 0:
  1073. DEBUG3(printk("scsi(%ld): HBA in NL topology.\n",
  1074. ha->host_no));
  1075. ha->current_topology = ISP_CFG_NL;
  1076. strcpy(connect_type, "(Loop)");
  1077. break;
  1078. case 1:
  1079. DEBUG3(printk("scsi(%ld): HBA in FL topology.\n",
  1080. ha->host_no));
  1081. ha->current_topology = ISP_CFG_FL;
  1082. strcpy(connect_type, "(FL_Port)");
  1083. break;
  1084. case 2:
  1085. DEBUG3(printk("scsi(%ld): HBA in N P2P topology.\n",
  1086. ha->host_no));
  1087. ha->operating_mode = P2P;
  1088. ha->current_topology = ISP_CFG_N;
  1089. strcpy(connect_type, "(N_Port-to-N_Port)");
  1090. break;
  1091. case 3:
  1092. DEBUG3(printk("scsi(%ld): HBA in F P2P topology.\n",
  1093. ha->host_no));
  1094. ha->operating_mode = P2P;
  1095. ha->current_topology = ISP_CFG_F;
  1096. strcpy(connect_type, "(F_Port)");
  1097. break;
  1098. default:
  1099. DEBUG3(printk("scsi(%ld): HBA in unknown topology %x. "
  1100. "Using NL.\n",
  1101. ha->host_no, topo));
  1102. ha->current_topology = ISP_CFG_NL;
  1103. strcpy(connect_type, "(Loop)");
  1104. break;
  1105. }
  1106. /* Save Host port and loop ID. */
  1107. /* byte order - Big Endian */
  1108. ha->d_id.b.domain = domain;
  1109. ha->d_id.b.area = area;
  1110. ha->d_id.b.al_pa = al_pa;
  1111. if (!ha->flags.init_done)
  1112. qla_printk(KERN_INFO, ha,
  1113. "Topology - %s, Host Loop address 0x%x\n",
  1114. connect_type, ha->loop_id);
  1115. if (rval) {
  1116. DEBUG2_3(printk("scsi(%ld): FAILED.\n", ha->host_no));
  1117. } else {
  1118. DEBUG3(printk("scsi(%ld): exiting normally.\n", ha->host_no));
  1119. }
  1120. return(rval);
  1121. }
  1122. /*
  1123. * NVRAM configuration for ISP 2xxx
  1124. *
  1125. * Input:
  1126. * ha = adapter block pointer.
  1127. *
  1128. * Output:
  1129. * initialization control block in response_ring
  1130. * host adapters parameters in host adapter block
  1131. *
  1132. * Returns:
  1133. * 0 = success.
  1134. */
  1135. int
  1136. qla2x00_nvram_config(scsi_qla_host_t *ha)
  1137. {
  1138. int rval;
  1139. uint8_t chksum = 0;
  1140. uint16_t cnt;
  1141. uint8_t *dptr1, *dptr2;
  1142. init_cb_t *icb = ha->init_cb;
  1143. nvram_t *nv = (nvram_t *)ha->request_ring;
  1144. uint8_t *ptr = (uint8_t *)ha->request_ring;
  1145. struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
  1146. rval = QLA_SUCCESS;
  1147. /* Determine NVRAM starting address. */
  1148. ha->nvram_size = sizeof(nvram_t);
  1149. ha->nvram_base = 0;
  1150. if (!IS_QLA2100(ha) && !IS_QLA2200(ha) && !IS_QLA2300(ha))
  1151. if ((RD_REG_WORD(&reg->ctrl_status) >> 14) == 1)
  1152. ha->nvram_base = 0x80;
  1153. /* Get NVRAM data and calculate checksum. */
  1154. ha->isp_ops.read_nvram(ha, ptr, ha->nvram_base, ha->nvram_size);
  1155. for (cnt = 0, chksum = 0; cnt < ha->nvram_size; cnt++)
  1156. chksum += *ptr++;
  1157. DEBUG5(printk("scsi(%ld): Contents of NVRAM\n", ha->host_no));
  1158. DEBUG5(qla2x00_dump_buffer((uint8_t *)ha->request_ring,
  1159. ha->nvram_size));
  1160. /* Bad NVRAM data, set defaults parameters. */
  1161. if (chksum || nv->id[0] != 'I' || nv->id[1] != 'S' ||
  1162. nv->id[2] != 'P' || nv->id[3] != ' ' || nv->nvram_version < 1) {
  1163. /* Reset NVRAM data. */
  1164. qla_printk(KERN_WARNING, ha, "Inconsistent NVRAM detected: "
  1165. "checksum=0x%x id=%c version=0x%x.\n", chksum, nv->id[0],
  1166. nv->nvram_version);
  1167. qla_printk(KERN_WARNING, ha, "Falling back to functioning (yet "
  1168. "invalid -- WWPN) defaults.\n");
  1169. /*
  1170. * Set default initialization control block.
  1171. */
  1172. memset(nv, 0, ha->nvram_size);
  1173. nv->parameter_block_version = ICB_VERSION;
  1174. if (IS_QLA23XX(ha)) {
  1175. nv->firmware_options[0] = BIT_2 | BIT_1;
  1176. nv->firmware_options[1] = BIT_7 | BIT_5;
  1177. nv->add_firmware_options[0] = BIT_5;
  1178. nv->add_firmware_options[1] = BIT_5 | BIT_4;
  1179. nv->frame_payload_size = __constant_cpu_to_le16(2048);
  1180. nv->special_options[1] = BIT_7;
  1181. } else if (IS_QLA2200(ha)) {
  1182. nv->firmware_options[0] = BIT_2 | BIT_1;
  1183. nv->firmware_options[1] = BIT_7 | BIT_5;
  1184. nv->add_firmware_options[0] = BIT_5;
  1185. nv->add_firmware_options[1] = BIT_5 | BIT_4;
  1186. nv->frame_payload_size = __constant_cpu_to_le16(1024);
  1187. } else if (IS_QLA2100(ha)) {
  1188. nv->firmware_options[0] = BIT_3 | BIT_1;
  1189. nv->firmware_options[1] = BIT_5;
  1190. nv->frame_payload_size = __constant_cpu_to_le16(1024);
  1191. }
  1192. nv->max_iocb_allocation = __constant_cpu_to_le16(256);
  1193. nv->execution_throttle = __constant_cpu_to_le16(16);
  1194. nv->retry_count = 8;
  1195. nv->retry_delay = 1;
  1196. nv->port_name[0] = 33;
  1197. nv->port_name[3] = 224;
  1198. nv->port_name[4] = 139;
  1199. nv->login_timeout = 4;
  1200. /*
  1201. * Set default host adapter parameters
  1202. */
  1203. nv->host_p[1] = BIT_2;
  1204. nv->reset_delay = 5;
  1205. nv->port_down_retry_count = 8;
  1206. nv->max_luns_per_target = __constant_cpu_to_le16(8);
  1207. nv->link_down_timeout = 60;
  1208. rval = 1;
  1209. }
  1210. #if defined(CONFIG_IA64_GENERIC) || defined(CONFIG_IA64_SGI_SN2)
  1211. /*
  1212. * The SN2 does not provide BIOS emulation which means you can't change
  1213. * potentially bogus BIOS settings. Force the use of default settings
  1214. * for link rate and frame size. Hope that the rest of the settings
  1215. * are valid.
  1216. */
  1217. if (ia64_platform_is("sn2")) {
  1218. nv->frame_payload_size = __constant_cpu_to_le16(2048);
  1219. if (IS_QLA23XX(ha))
  1220. nv->special_options[1] = BIT_7;
  1221. }
  1222. #endif
  1223. /* Reset Initialization control block */
  1224. memset(icb, 0, ha->init_cb_size);
  1225. /*
  1226. * Setup driver NVRAM options.
  1227. */
  1228. nv->firmware_options[0] |= (BIT_6 | BIT_1);
  1229. nv->firmware_options[0] &= ~(BIT_5 | BIT_4);
  1230. nv->firmware_options[1] |= (BIT_5 | BIT_0);
  1231. nv->firmware_options[1] &= ~BIT_4;
  1232. if (IS_QLA23XX(ha)) {
  1233. nv->firmware_options[0] |= BIT_2;
  1234. nv->firmware_options[0] &= ~BIT_3;
  1235. nv->add_firmware_options[1] |= BIT_5 | BIT_4;
  1236. if (IS_QLA2300(ha)) {
  1237. if (ha->fb_rev == FPM_2310) {
  1238. strcpy(ha->model_number, "QLA2310");
  1239. } else {
  1240. strcpy(ha->model_number, "QLA2300");
  1241. }
  1242. } else {
  1243. if (rval == 0 &&
  1244. memcmp(nv->model_number, BINZERO,
  1245. sizeof(nv->model_number)) != 0) {
  1246. char *st, *en;
  1247. strncpy(ha->model_number, nv->model_number,
  1248. sizeof(nv->model_number));
  1249. st = en = ha->model_number;
  1250. en += sizeof(nv->model_number) - 1;
  1251. while (en > st) {
  1252. if (*en != 0x20 && *en != 0x00)
  1253. break;
  1254. *en-- = '\0';
  1255. }
  1256. } else {
  1257. uint16_t index;
  1258. index = (ha->pdev->subsystem_device & 0xff);
  1259. if (index < QLA_MODEL_NAMES) {
  1260. strcpy(ha->model_number,
  1261. qla2x00_model_name[index * 2]);
  1262. ha->model_desc =
  1263. qla2x00_model_name[index * 2 + 1];
  1264. } else {
  1265. strcpy(ha->model_number, "QLA23xx");
  1266. }
  1267. }
  1268. }
  1269. } else if (IS_QLA2200(ha)) {
  1270. nv->firmware_options[0] |= BIT_2;
  1271. /*
  1272. * 'Point-to-point preferred, else loop' is not a safe
  1273. * connection mode setting.
  1274. */
  1275. if ((nv->add_firmware_options[0] & (BIT_6 | BIT_5 | BIT_4)) ==
  1276. (BIT_5 | BIT_4)) {
  1277. /* Force 'loop preferred, else point-to-point'. */
  1278. nv->add_firmware_options[0] &= ~(BIT_6 | BIT_5 | BIT_4);
  1279. nv->add_firmware_options[0] |= BIT_5;
  1280. }
  1281. strcpy(ha->model_number, "QLA22xx");
  1282. } else /*if (IS_QLA2100(ha))*/ {
  1283. strcpy(ha->model_number, "QLA2100");
  1284. }
  1285. /*
  1286. * Copy over NVRAM RISC parameter block to initialization control block.
  1287. */
  1288. dptr1 = (uint8_t *)icb;
  1289. dptr2 = (uint8_t *)&nv->parameter_block_version;
  1290. cnt = (uint8_t *)&icb->request_q_outpointer - (uint8_t *)&icb->version;
  1291. while (cnt--)
  1292. *dptr1++ = *dptr2++;
  1293. /* Copy 2nd half. */
  1294. dptr1 = (uint8_t *)icb->add_firmware_options;
  1295. cnt = (uint8_t *)icb->reserved_3 - (uint8_t *)icb->add_firmware_options;
  1296. while (cnt--)
  1297. *dptr1++ = *dptr2++;
  1298. /* Use alternate WWN? */
  1299. if (nv->host_p[1] & BIT_7) {
  1300. memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE);
  1301. memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE);
  1302. }
  1303. /* Prepare nodename */
  1304. if ((icb->firmware_options[1] & BIT_6) == 0) {
  1305. /*
  1306. * Firmware will apply the following mask if the nodename was
  1307. * not provided.
  1308. */
  1309. memcpy(icb->node_name, icb->port_name, WWN_SIZE);
  1310. icb->node_name[0] &= 0xF0;
  1311. }
  1312. /*
  1313. * Set host adapter parameters.
  1314. */
  1315. ha->flags.disable_risc_code_load = ((nv->host_p[0] & BIT_4) ? 1 : 0);
  1316. /* Always load RISC code on non ISP2[12]00 chips. */
  1317. if (!IS_QLA2100(ha) && !IS_QLA2200(ha))
  1318. ha->flags.disable_risc_code_load = 0;
  1319. ha->flags.enable_lip_reset = ((nv->host_p[1] & BIT_1) ? 1 : 0);
  1320. ha->flags.enable_lip_full_login = ((nv->host_p[1] & BIT_2) ? 1 : 0);
  1321. ha->flags.enable_target_reset = ((nv->host_p[1] & BIT_3) ? 1 : 0);
  1322. ha->flags.enable_led_scheme = (nv->special_options[1] & BIT_4) ? 1 : 0;
  1323. ha->operating_mode =
  1324. (icb->add_firmware_options[0] & (BIT_6 | BIT_5 | BIT_4)) >> 4;
  1325. memcpy(ha->fw_seriallink_options, nv->seriallink_options,
  1326. sizeof(ha->fw_seriallink_options));
  1327. /* save HBA serial number */
  1328. ha->serial0 = icb->port_name[5];
  1329. ha->serial1 = icb->port_name[6];
  1330. ha->serial2 = icb->port_name[7];
  1331. ha->node_name = icb->node_name;
  1332. ha->port_name = icb->port_name;
  1333. icb->execution_throttle = __constant_cpu_to_le16(0xFFFF);
  1334. ha->retry_count = nv->retry_count;
  1335. /* Set minimum login_timeout to 4 seconds. */
  1336. if (nv->login_timeout < ql2xlogintimeout)
  1337. nv->login_timeout = ql2xlogintimeout;
  1338. if (nv->login_timeout < 4)
  1339. nv->login_timeout = 4;
  1340. ha->login_timeout = nv->login_timeout;
  1341. icb->login_timeout = nv->login_timeout;
  1342. /* Set minimum RATOV to 200 tenths of a second. */
  1343. ha->r_a_tov = 200;
  1344. ha->loop_reset_delay = nv->reset_delay;
  1345. /* Link Down Timeout = 0:
  1346. *
  1347. * When Port Down timer expires we will start returning
  1348. * I/O's to OS with "DID_NO_CONNECT".
  1349. *
  1350. * Link Down Timeout != 0:
  1351. *
  1352. * The driver waits for the link to come up after link down
  1353. * before returning I/Os to OS with "DID_NO_CONNECT".
  1354. */
  1355. if (nv->link_down_timeout == 0) {
  1356. ha->loop_down_abort_time =
  1357. (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT);
  1358. } else {
  1359. ha->link_down_timeout = nv->link_down_timeout;
  1360. ha->loop_down_abort_time =
  1361. (LOOP_DOWN_TIME - ha->link_down_timeout);
  1362. }
  1363. /*
  1364. * Need enough time to try and get the port back.
  1365. */
  1366. ha->port_down_retry_count = nv->port_down_retry_count;
  1367. if (qlport_down_retry)
  1368. ha->port_down_retry_count = qlport_down_retry;
  1369. /* Set login_retry_count */
  1370. ha->login_retry_count = nv->retry_count;
  1371. if (ha->port_down_retry_count == nv->port_down_retry_count &&
  1372. ha->port_down_retry_count > 3)
  1373. ha->login_retry_count = ha->port_down_retry_count;
  1374. else if (ha->port_down_retry_count > (int)ha->login_retry_count)
  1375. ha->login_retry_count = ha->port_down_retry_count;
  1376. if (ql2xloginretrycount)
  1377. ha->login_retry_count = ql2xloginretrycount;
  1378. icb->lun_enables = __constant_cpu_to_le16(0);
  1379. icb->command_resource_count = 0;
  1380. icb->immediate_notify_resource_count = 0;
  1381. icb->timeout = __constant_cpu_to_le16(0);
  1382. if (IS_QLA2100(ha) || IS_QLA2200(ha)) {
  1383. /* Enable RIO */
  1384. icb->firmware_options[0] &= ~BIT_3;
  1385. icb->add_firmware_options[0] &=
  1386. ~(BIT_3 | BIT_2 | BIT_1 | BIT_0);
  1387. icb->add_firmware_options[0] |= BIT_2;
  1388. icb->response_accumulation_timer = 3;
  1389. icb->interrupt_delay_timer = 5;
  1390. ha->flags.process_response_queue = 1;
  1391. } else {
  1392. /* Enable ZIO. */
  1393. if (!ha->flags.init_done) {
  1394. ha->zio_mode = icb->add_firmware_options[0] &
  1395. (BIT_3 | BIT_2 | BIT_1 | BIT_0);
  1396. ha->zio_timer = icb->interrupt_delay_timer ?
  1397. icb->interrupt_delay_timer: 2;
  1398. }
  1399. icb->add_firmware_options[0] &=
  1400. ~(BIT_3 | BIT_2 | BIT_1 | BIT_0);
  1401. ha->flags.process_response_queue = 0;
  1402. if (ha->zio_mode != QLA_ZIO_DISABLED) {
  1403. ha->zio_mode = QLA_ZIO_MODE_6;
  1404. DEBUG2(printk("scsi(%ld): ZIO mode %d enabled; timer "
  1405. "delay (%d us).\n", ha->host_no, ha->zio_mode,
  1406. ha->zio_timer * 100));
  1407. qla_printk(KERN_INFO, ha,
  1408. "ZIO mode %d enabled; timer delay (%d us).\n",
  1409. ha->zio_mode, ha->zio_timer * 100);
  1410. icb->add_firmware_options[0] |= (uint8_t)ha->zio_mode;
  1411. icb->interrupt_delay_timer = (uint8_t)ha->zio_timer;
  1412. ha->flags.process_response_queue = 1;
  1413. }
  1414. }
  1415. if (rval) {
  1416. DEBUG2_3(printk(KERN_WARNING
  1417. "scsi(%ld): NVRAM configuration failed!\n", ha->host_no));
  1418. }
  1419. return (rval);
  1420. }
  1421. static void
  1422. qla2x00_rport_del(void *data)
  1423. {
  1424. fc_port_t *fcport = data;
  1425. struct fc_rport *rport;
  1426. unsigned long flags;
  1427. spin_lock_irqsave(&fcport->rport_lock, flags);
  1428. rport = fcport->drport;
  1429. fcport->drport = NULL;
  1430. spin_unlock_irqrestore(&fcport->rport_lock, flags);
  1431. if (rport)
  1432. fc_remote_port_delete(rport);
  1433. }
  1434. /**
  1435. * qla2x00_alloc_fcport() - Allocate a generic fcport.
  1436. * @ha: HA context
  1437. * @flags: allocation flags
  1438. *
  1439. * Returns a pointer to the allocated fcport, or NULL, if none available.
  1440. */
  1441. fc_port_t *
  1442. qla2x00_alloc_fcport(scsi_qla_host_t *ha, gfp_t flags)
  1443. {
  1444. fc_port_t *fcport;
  1445. fcport = kmalloc(sizeof(fc_port_t), flags);
  1446. if (fcport == NULL)
  1447. return (fcport);
  1448. /* Setup fcport template structure. */
  1449. memset(fcport, 0, sizeof (fc_port_t));
  1450. fcport->ha = ha;
  1451. fcport->port_type = FCT_UNKNOWN;
  1452. fcport->loop_id = FC_NO_LOOP_ID;
  1453. atomic_set(&fcport->state, FCS_UNCONFIGURED);
  1454. fcport->flags = FCF_RLC_SUPPORT;
  1455. fcport->supported_classes = FC_COS_UNSPECIFIED;
  1456. spin_lock_init(&fcport->rport_lock);
  1457. return (fcport);
  1458. }
  1459. /*
  1460. * qla2x00_configure_loop
  1461. * Updates Fibre Channel Device Database with what is actually on loop.
  1462. *
  1463. * Input:
  1464. * ha = adapter block pointer.
  1465. *
  1466. * Returns:
  1467. * 0 = success.
  1468. * 1 = error.
  1469. * 2 = database was full and device was not configured.
  1470. */
  1471. static int
  1472. qla2x00_configure_loop(scsi_qla_host_t *ha)
  1473. {
  1474. int rval;
  1475. unsigned long flags, save_flags;
  1476. rval = QLA_SUCCESS;
  1477. /* Get Initiator ID */
  1478. if (test_bit(LOCAL_LOOP_UPDATE, &ha->dpc_flags)) {
  1479. rval = qla2x00_configure_hba(ha);
  1480. if (rval != QLA_SUCCESS) {
  1481. DEBUG(printk("scsi(%ld): Unable to configure HBA.\n",
  1482. ha->host_no));
  1483. return (rval);
  1484. }
  1485. }
  1486. save_flags = flags = ha->dpc_flags;
  1487. DEBUG(printk("scsi(%ld): Configure loop -- dpc flags =0x%lx\n",
  1488. ha->host_no, flags));
  1489. /*
  1490. * If we have both an RSCN and PORT UPDATE pending then handle them
  1491. * both at the same time.
  1492. */
  1493. clear_bit(LOCAL_LOOP_UPDATE, &ha->dpc_flags);
  1494. clear_bit(RSCN_UPDATE, &ha->dpc_flags);
  1495. /* Determine what we need to do */
  1496. if (ha->current_topology == ISP_CFG_FL &&
  1497. (test_bit(LOCAL_LOOP_UPDATE, &flags))) {
  1498. ha->flags.rscn_queue_overflow = 1;
  1499. set_bit(RSCN_UPDATE, &flags);
  1500. } else if (ha->current_topology == ISP_CFG_F &&
  1501. (test_bit(LOCAL_LOOP_UPDATE, &flags))) {
  1502. ha->flags.rscn_queue_overflow = 1;
  1503. set_bit(RSCN_UPDATE, &flags);
  1504. clear_bit(LOCAL_LOOP_UPDATE, &flags);
  1505. } else if (ha->current_topology == ISP_CFG_N) {
  1506. clear_bit(RSCN_UPDATE, &flags);
  1507. } else if (!ha->flags.online ||
  1508. (test_bit(ABORT_ISP_ACTIVE, &flags))) {
  1509. ha->flags.rscn_queue_overflow = 1;
  1510. set_bit(RSCN_UPDATE, &flags);
  1511. set_bit(LOCAL_LOOP_UPDATE, &flags);
  1512. }
  1513. if (test_bit(LOCAL_LOOP_UPDATE, &flags)) {
  1514. if (test_bit(LOOP_RESYNC_NEEDED, &ha->dpc_flags)) {
  1515. rval = QLA_FUNCTION_FAILED;
  1516. } else {
  1517. rval = qla2x00_configure_local_loop(ha);
  1518. }
  1519. }
  1520. if (rval == QLA_SUCCESS && test_bit(RSCN_UPDATE, &flags)) {
  1521. if (LOOP_TRANSITION(ha)) {
  1522. rval = QLA_FUNCTION_FAILED;
  1523. } else {
  1524. rval = qla2x00_configure_fabric(ha);
  1525. }
  1526. }
  1527. if (rval == QLA_SUCCESS) {
  1528. if (atomic_read(&ha->loop_down_timer) ||
  1529. test_bit(LOOP_RESYNC_NEEDED, &ha->dpc_flags)) {
  1530. rval = QLA_FUNCTION_FAILED;
  1531. } else {
  1532. atomic_set(&ha->loop_state, LOOP_READY);
  1533. DEBUG(printk("scsi(%ld): LOOP READY\n", ha->host_no));
  1534. }
  1535. }
  1536. if (rval) {
  1537. DEBUG2_3(printk("%s(%ld): *** FAILED ***\n",
  1538. __func__, ha->host_no));
  1539. } else {
  1540. DEBUG3(printk("%s: exiting normally\n", __func__));
  1541. }
  1542. /* Restore state if a resync event occured during processing */
  1543. if (test_bit(LOOP_RESYNC_NEEDED, &ha->dpc_flags)) {
  1544. if (test_bit(LOCAL_LOOP_UPDATE, &save_flags))
  1545. set_bit(LOCAL_LOOP_UPDATE, &ha->dpc_flags);
  1546. if (test_bit(RSCN_UPDATE, &save_flags))
  1547. set_bit(RSCN_UPDATE, &ha->dpc_flags);
  1548. }
  1549. return (rval);
  1550. }
  1551. /*
  1552. * qla2x00_configure_local_loop
  1553. * Updates Fibre Channel Device Database with local loop devices.
  1554. *
  1555. * Input:
  1556. * ha = adapter block pointer.
  1557. *
  1558. * Returns:
  1559. * 0 = success.
  1560. */
  1561. static int
  1562. qla2x00_configure_local_loop(scsi_qla_host_t *ha)
  1563. {
  1564. int rval, rval2;
  1565. int found_devs;
  1566. int found;
  1567. fc_port_t *fcport, *new_fcport;
  1568. uint16_t index;
  1569. uint16_t entries;
  1570. char *id_iter;
  1571. uint16_t loop_id;
  1572. uint8_t domain, area, al_pa;
  1573. found_devs = 0;
  1574. new_fcport = NULL;
  1575. entries = MAX_FIBRE_DEVICES;
  1576. DEBUG3(printk("scsi(%ld): Getting FCAL position map\n", ha->host_no));
  1577. DEBUG3(qla2x00_get_fcal_position_map(ha, NULL));
  1578. /* Get list of logged in devices. */
  1579. memset(ha->gid_list, 0, GID_LIST_SIZE);
  1580. rval = qla2x00_get_id_list(ha, ha->gid_list, ha->gid_list_dma,
  1581. &entries);
  1582. if (rval != QLA_SUCCESS)
  1583. goto cleanup_allocation;
  1584. DEBUG3(printk("scsi(%ld): Entries in ID list (%d)\n",
  1585. ha->host_no, entries));
  1586. DEBUG3(qla2x00_dump_buffer((uint8_t *)ha->gid_list,
  1587. entries * sizeof(struct gid_list_info)));
  1588. /* Allocate temporary fcport for any new fcports discovered. */
  1589. new_fcport = qla2x00_alloc_fcport(ha, GFP_KERNEL);
  1590. if (new_fcport == NULL) {
  1591. rval = QLA_MEMORY_ALLOC_FAILED;
  1592. goto cleanup_allocation;
  1593. }
  1594. new_fcport->flags &= ~FCF_FABRIC_DEVICE;
  1595. /*
  1596. * Mark local devices that were present with FCF_DEVICE_LOST for now.
  1597. */
  1598. list_for_each_entry(fcport, &ha->fcports, list) {
  1599. if (atomic_read(&fcport->state) == FCS_ONLINE &&
  1600. fcport->port_type != FCT_BROADCAST &&
  1601. (fcport->flags & FCF_FABRIC_DEVICE) == 0) {
  1602. DEBUG(printk("scsi(%ld): Marking port lost, "
  1603. "loop_id=0x%04x\n",
  1604. ha->host_no, fcport->loop_id));
  1605. atomic_set(&fcport->state, FCS_DEVICE_LOST);
  1606. fcport->flags &= ~FCF_FARP_DONE;
  1607. }
  1608. }
  1609. /* Add devices to port list. */
  1610. id_iter = (char *)ha->gid_list;
  1611. for (index = 0; index < entries; index++) {
  1612. domain = ((struct gid_list_info *)id_iter)->domain;
  1613. area = ((struct gid_list_info *)id_iter)->area;
  1614. al_pa = ((struct gid_list_info *)id_iter)->al_pa;
  1615. if (IS_QLA2100(ha) || IS_QLA2200(ha))
  1616. loop_id = (uint16_t)
  1617. ((struct gid_list_info *)id_iter)->loop_id_2100;
  1618. else
  1619. loop_id = le16_to_cpu(
  1620. ((struct gid_list_info *)id_iter)->loop_id);
  1621. id_iter += ha->gid_list_info_size;
  1622. /* Bypass reserved domain fields. */
  1623. if ((domain & 0xf0) == 0xf0)
  1624. continue;
  1625. /* Bypass if not same domain and area of adapter. */
  1626. if (area && domain &&
  1627. (area != ha->d_id.b.area || domain != ha->d_id.b.domain))
  1628. continue;
  1629. /* Bypass invalid local loop ID. */
  1630. if (loop_id > LAST_LOCAL_LOOP_ID)
  1631. continue;
  1632. /* Fill in member data. */
  1633. new_fcport->d_id.b.domain = domain;
  1634. new_fcport->d_id.b.area = area;
  1635. new_fcport->d_id.b.al_pa = al_pa;
  1636. new_fcport->loop_id = loop_id;
  1637. rval2 = qla2x00_get_port_database(ha, new_fcport, 0);
  1638. if (rval2 != QLA_SUCCESS) {
  1639. DEBUG2(printk("scsi(%ld): Failed to retrieve fcport "
  1640. "information -- get_port_database=%x, "
  1641. "loop_id=0x%04x\n",
  1642. ha->host_no, rval2, new_fcport->loop_id));
  1643. DEBUG2(printk("scsi(%ld): Scheduling resync...\n",
  1644. ha->host_no));
  1645. set_bit(LOOP_RESYNC_NEEDED, &ha->dpc_flags);
  1646. continue;
  1647. }
  1648. /* Check for matching device in port list. */
  1649. found = 0;
  1650. fcport = NULL;
  1651. list_for_each_entry(fcport, &ha->fcports, list) {
  1652. if (memcmp(new_fcport->port_name, fcport->port_name,
  1653. WWN_SIZE))
  1654. continue;
  1655. fcport->flags &= ~(FCF_FABRIC_DEVICE |
  1656. FCF_PERSISTENT_BOUND);
  1657. fcport->loop_id = new_fcport->loop_id;
  1658. fcport->port_type = new_fcport->port_type;
  1659. fcport->d_id.b24 = new_fcport->d_id.b24;
  1660. memcpy(fcport->node_name, new_fcport->node_name,
  1661. WWN_SIZE);
  1662. found++;
  1663. break;
  1664. }
  1665. if (!found) {
  1666. /* New device, add to fcports list. */
  1667. new_fcport->flags &= ~FCF_PERSISTENT_BOUND;
  1668. list_add_tail(&new_fcport->list, &ha->fcports);
  1669. /* Allocate a new replacement fcport. */
  1670. fcport = new_fcport;
  1671. new_fcport = qla2x00_alloc_fcport(ha, GFP_KERNEL);
  1672. if (new_fcport == NULL) {
  1673. rval = QLA_MEMORY_ALLOC_FAILED;
  1674. goto cleanup_allocation;
  1675. }
  1676. new_fcport->flags &= ~FCF_FABRIC_DEVICE;
  1677. }
  1678. qla2x00_update_fcport(ha, fcport);
  1679. found_devs++;
  1680. }
  1681. cleanup_allocation:
  1682. kfree(new_fcport);
  1683. if (rval != QLA_SUCCESS) {
  1684. DEBUG2(printk("scsi(%ld): Configure local loop error exit: "
  1685. "rval=%x\n", ha->host_no, rval));
  1686. }
  1687. if (found_devs) {
  1688. ha->device_flags |= DFLG_LOCAL_DEVICES;
  1689. ha->device_flags &= ~DFLG_RETRY_LOCAL_DEVICES;
  1690. }
  1691. return (rval);
  1692. }
  1693. static void
  1694. qla2x00_probe_for_all_luns(scsi_qla_host_t *ha)
  1695. {
  1696. fc_port_t *fcport;
  1697. qla2x00_mark_all_devices_lost(ha, 0);
  1698. list_for_each_entry(fcport, &ha->fcports, list) {
  1699. if (fcport->port_type != FCT_TARGET)
  1700. continue;
  1701. qla2x00_update_fcport(ha, fcport);
  1702. }
  1703. }
  1704. /*
  1705. * qla2x00_update_fcport
  1706. * Updates device on list.
  1707. *
  1708. * Input:
  1709. * ha = adapter block pointer.
  1710. * fcport = port structure pointer.
  1711. *
  1712. * Return:
  1713. * 0 - Success
  1714. * BIT_0 - error
  1715. *
  1716. * Context:
  1717. * Kernel context.
  1718. */
  1719. void
  1720. qla2x00_update_fcport(scsi_qla_host_t *ha, fc_port_t *fcport)
  1721. {
  1722. fcport->ha = ha;
  1723. fcport->login_retry = 0;
  1724. fcport->port_login_retry_count = ha->port_down_retry_count *
  1725. PORT_RETRY_TIME;
  1726. atomic_set(&fcport->port_down_timer, ha->port_down_retry_count *
  1727. PORT_RETRY_TIME);
  1728. fcport->flags &= ~FCF_LOGIN_NEEDED;
  1729. atomic_set(&fcport->state, FCS_ONLINE);
  1730. if (ha->flags.init_done)
  1731. qla2x00_reg_remote_port(ha, fcport);
  1732. }
  1733. void
  1734. qla2x00_reg_remote_port(scsi_qla_host_t *ha, fc_port_t *fcport)
  1735. {
  1736. struct fc_rport_identifiers rport_ids;
  1737. struct fc_rport *rport;
  1738. unsigned long flags;
  1739. if (fcport->drport)
  1740. qla2x00_rport_del(fcport);
  1741. if (fcport->rport)
  1742. return;
  1743. rport_ids.node_name = wwn_to_u64(fcport->node_name);
  1744. rport_ids.port_name = wwn_to_u64(fcport->port_name);
  1745. rport_ids.port_id = fcport->d_id.b.domain << 16 |
  1746. fcport->d_id.b.area << 8 | fcport->d_id.b.al_pa;
  1747. rport_ids.roles = FC_RPORT_ROLE_UNKNOWN;
  1748. rport = fc_remote_port_add(ha->host, 0, &rport_ids);
  1749. if (!rport) {
  1750. qla_printk(KERN_WARNING, ha,
  1751. "Unable to allocate fc remote port!\n");
  1752. return;
  1753. }
  1754. spin_lock_irqsave(&fcport->rport_lock, flags);
  1755. fcport->rport = rport;
  1756. *((fc_port_t **)rport->dd_data) = fcport;
  1757. spin_unlock_irqrestore(&fcport->rport_lock, flags);
  1758. rport->supported_classes = fcport->supported_classes;
  1759. rport_ids.roles = FC_RPORT_ROLE_UNKNOWN;
  1760. if (fcport->port_type == FCT_INITIATOR)
  1761. rport_ids.roles |= FC_RPORT_ROLE_FCP_INITIATOR;
  1762. if (fcport->port_type == FCT_TARGET)
  1763. rport_ids.roles |= FC_RPORT_ROLE_FCP_TARGET;
  1764. fc_remote_port_rolechg(rport, rport_ids.roles);
  1765. if (rport->scsi_target_id != -1 &&
  1766. rport->scsi_target_id < ha->host->max_id)
  1767. fcport->os_target_id = rport->scsi_target_id;
  1768. }
  1769. /*
  1770. * qla2x00_configure_fabric
  1771. * Setup SNS devices with loop ID's.
  1772. *
  1773. * Input:
  1774. * ha = adapter block pointer.
  1775. *
  1776. * Returns:
  1777. * 0 = success.
  1778. * BIT_0 = error
  1779. */
  1780. static int
  1781. qla2x00_configure_fabric(scsi_qla_host_t *ha)
  1782. {
  1783. int rval, rval2;
  1784. fc_port_t *fcport, *fcptemp;
  1785. uint16_t next_loopid;
  1786. uint16_t mb[MAILBOX_REGISTER_COUNT];
  1787. uint16_t loop_id;
  1788. LIST_HEAD(new_fcports);
  1789. /* If FL port exists, then SNS is present */
  1790. if (IS_QLA24XX(ha) || IS_QLA54XX(ha))
  1791. loop_id = NPH_F_PORT;
  1792. else
  1793. loop_id = SNS_FL_PORT;
  1794. rval = qla2x00_get_port_name(ha, loop_id, NULL, 0);
  1795. if (rval != QLA_SUCCESS) {
  1796. DEBUG2(printk("scsi(%ld): MBC_GET_PORT_NAME Failed, No FL "
  1797. "Port\n", ha->host_no));
  1798. ha->device_flags &= ~SWITCH_FOUND;
  1799. return (QLA_SUCCESS);
  1800. }
  1801. /* Mark devices that need re-synchronization. */
  1802. rval2 = qla2x00_device_resync(ha);
  1803. if (rval2 == QLA_RSCNS_HANDLED) {
  1804. /* No point doing the scan, just continue. */
  1805. return (QLA_SUCCESS);
  1806. }
  1807. do {
  1808. /* FDMI support. */
  1809. if (ql2xfdmienable &&
  1810. test_and_clear_bit(REGISTER_FDMI_NEEDED, &ha->dpc_flags))
  1811. qla2x00_fdmi_register(ha);
  1812. /* Ensure we are logged into the SNS. */
  1813. if (IS_QLA24XX(ha) || IS_QLA54XX(ha))
  1814. loop_id = NPH_SNS;
  1815. else
  1816. loop_id = SIMPLE_NAME_SERVER;
  1817. ha->isp_ops.fabric_login(ha, loop_id, 0xff, 0xff,
  1818. 0xfc, mb, BIT_1 | BIT_0);
  1819. if (mb[0] != MBS_COMMAND_COMPLETE) {
  1820. DEBUG2(qla_printk(KERN_INFO, ha,
  1821. "Failed SNS login: loop_id=%x mb[0]=%x mb[1]=%x "
  1822. "mb[2]=%x mb[6]=%x mb[7]=%x\n", loop_id,
  1823. mb[0], mb[1], mb[2], mb[6], mb[7]));
  1824. return (QLA_SUCCESS);
  1825. }
  1826. if (test_and_clear_bit(REGISTER_FC4_NEEDED, &ha->dpc_flags)) {
  1827. if (qla2x00_rft_id(ha)) {
  1828. /* EMPTY */
  1829. DEBUG2(printk("scsi(%ld): Register FC-4 "
  1830. "TYPE failed.\n", ha->host_no));
  1831. }
  1832. if (qla2x00_rff_id(ha)) {
  1833. /* EMPTY */
  1834. DEBUG2(printk("scsi(%ld): Register FC-4 "
  1835. "Features failed.\n", ha->host_no));
  1836. }
  1837. if (qla2x00_rnn_id(ha)) {
  1838. /* EMPTY */
  1839. DEBUG2(printk("scsi(%ld): Register Node Name "
  1840. "failed.\n", ha->host_no));
  1841. } else if (qla2x00_rsnn_nn(ha)) {
  1842. /* EMPTY */
  1843. DEBUG2(printk("scsi(%ld): Register Symbolic "
  1844. "Node Name failed.\n", ha->host_no));
  1845. }
  1846. }
  1847. rval = qla2x00_find_all_fabric_devs(ha, &new_fcports);
  1848. if (rval != QLA_SUCCESS)
  1849. break;
  1850. /*
  1851. * Logout all previous fabric devices marked lost, except
  1852. * tape devices.
  1853. */
  1854. list_for_each_entry(fcport, &ha->fcports, list) {
  1855. if (test_bit(LOOP_RESYNC_NEEDED, &ha->dpc_flags))
  1856. break;
  1857. if ((fcport->flags & FCF_FABRIC_DEVICE) == 0)
  1858. continue;
  1859. if (atomic_read(&fcport->state) == FCS_DEVICE_LOST) {
  1860. qla2x00_mark_device_lost(ha, fcport,
  1861. ql2xplogiabsentdevice, 0);
  1862. if (fcport->loop_id != FC_NO_LOOP_ID &&
  1863. (fcport->flags & FCF_TAPE_PRESENT) == 0 &&
  1864. fcport->port_type != FCT_INITIATOR &&
  1865. fcport->port_type != FCT_BROADCAST) {
  1866. ha->isp_ops.fabric_logout(ha,
  1867. fcport->loop_id,
  1868. fcport->d_id.b.domain,
  1869. fcport->d_id.b.area,
  1870. fcport->d_id.b.al_pa);
  1871. fcport->loop_id = FC_NO_LOOP_ID;
  1872. }
  1873. }
  1874. }
  1875. /* Starting free loop ID. */
  1876. next_loopid = ha->min_external_loopid;
  1877. /*
  1878. * Scan through our port list and login entries that need to be
  1879. * logged in.
  1880. */
  1881. list_for_each_entry(fcport, &ha->fcports, list) {
  1882. if (atomic_read(&ha->loop_down_timer) ||
  1883. test_bit(LOOP_RESYNC_NEEDED, &ha->dpc_flags))
  1884. break;
  1885. if ((fcport->flags & FCF_FABRIC_DEVICE) == 0 ||
  1886. (fcport->flags & FCF_LOGIN_NEEDED) == 0)
  1887. continue;
  1888. if (fcport->loop_id == FC_NO_LOOP_ID) {
  1889. fcport->loop_id = next_loopid;
  1890. rval = qla2x00_find_new_loop_id(ha, fcport);
  1891. if (rval != QLA_SUCCESS) {
  1892. /* Ran out of IDs to use */
  1893. break;
  1894. }
  1895. }
  1896. /* Login and update database */
  1897. qla2x00_fabric_dev_login(ha, fcport, &next_loopid);
  1898. }
  1899. /* Exit if out of loop IDs. */
  1900. if (rval != QLA_SUCCESS) {
  1901. break;
  1902. }
  1903. /*
  1904. * Login and add the new devices to our port list.
  1905. */
  1906. list_for_each_entry_safe(fcport, fcptemp, &new_fcports, list) {
  1907. if (atomic_read(&ha->loop_down_timer) ||
  1908. test_bit(LOOP_RESYNC_NEEDED, &ha->dpc_flags))
  1909. break;
  1910. /* Find a new loop ID to use. */
  1911. fcport->loop_id = next_loopid;
  1912. rval = qla2x00_find_new_loop_id(ha, fcport);
  1913. if (rval != QLA_SUCCESS) {
  1914. /* Ran out of IDs to use */
  1915. break;
  1916. }
  1917. /* Remove device from the new list and add it to DB */
  1918. list_del(&fcport->list);
  1919. list_add_tail(&fcport->list, &ha->fcports);
  1920. /* Login and update database */
  1921. qla2x00_fabric_dev_login(ha, fcport, &next_loopid);
  1922. }
  1923. } while (0);
  1924. /* Free all new device structures not processed. */
  1925. list_for_each_entry_safe(fcport, fcptemp, &new_fcports, list) {
  1926. list_del(&fcport->list);
  1927. kfree(fcport);
  1928. }
  1929. if (rval) {
  1930. DEBUG2(printk("scsi(%ld): Configure fabric error exit: "
  1931. "rval=%d\n", ha->host_no, rval));
  1932. }
  1933. return (rval);
  1934. }
  1935. /*
  1936. * qla2x00_find_all_fabric_devs
  1937. *
  1938. * Input:
  1939. * ha = adapter block pointer.
  1940. * dev = database device entry pointer.
  1941. *
  1942. * Returns:
  1943. * 0 = success.
  1944. *
  1945. * Context:
  1946. * Kernel context.
  1947. */
  1948. static int
  1949. qla2x00_find_all_fabric_devs(scsi_qla_host_t *ha, struct list_head *new_fcports)
  1950. {
  1951. int rval;
  1952. uint16_t loop_id;
  1953. fc_port_t *fcport, *new_fcport, *fcptemp;
  1954. int found;
  1955. sw_info_t *swl;
  1956. int swl_idx;
  1957. int first_dev, last_dev;
  1958. port_id_t wrap, nxt_d_id;
  1959. rval = QLA_SUCCESS;
  1960. /* Try GID_PT to get device list, else GAN. */
  1961. swl = kmalloc(sizeof(sw_info_t) * MAX_FIBRE_DEVICES, GFP_ATOMIC);
  1962. if (swl == NULL) {
  1963. /*EMPTY*/
  1964. DEBUG2(printk("scsi(%ld): GID_PT allocations failed, fallback "
  1965. "on GA_NXT\n", ha->host_no));
  1966. } else {
  1967. memset(swl, 0, sizeof(sw_info_t) * MAX_FIBRE_DEVICES);
  1968. if (qla2x00_gid_pt(ha, swl) != QLA_SUCCESS) {
  1969. kfree(swl);
  1970. swl = NULL;
  1971. } else if (qla2x00_gpn_id(ha, swl) != QLA_SUCCESS) {
  1972. kfree(swl);
  1973. swl = NULL;
  1974. } else if (qla2x00_gnn_id(ha, swl) != QLA_SUCCESS) {
  1975. kfree(swl);
  1976. swl = NULL;
  1977. }
  1978. }
  1979. swl_idx = 0;
  1980. /* Allocate temporary fcport for any new fcports discovered. */
  1981. new_fcport = qla2x00_alloc_fcport(ha, GFP_KERNEL);
  1982. if (new_fcport == NULL) {
  1983. kfree(swl);
  1984. return (QLA_MEMORY_ALLOC_FAILED);
  1985. }
  1986. new_fcport->flags |= (FCF_FABRIC_DEVICE | FCF_LOGIN_NEEDED);
  1987. /* Set start port ID scan at adapter ID. */
  1988. first_dev = 1;
  1989. last_dev = 0;
  1990. /* Starting free loop ID. */
  1991. loop_id = ha->min_external_loopid;
  1992. for (; loop_id <= ha->last_loop_id; loop_id++) {
  1993. if (qla2x00_is_reserved_id(ha, loop_id))
  1994. continue;
  1995. if (atomic_read(&ha->loop_down_timer) || LOOP_TRANSITION(ha))
  1996. break;
  1997. if (swl != NULL) {
  1998. if (last_dev) {
  1999. wrap.b24 = new_fcport->d_id.b24;
  2000. } else {
  2001. new_fcport->d_id.b24 = swl[swl_idx].d_id.b24;
  2002. memcpy(new_fcport->node_name,
  2003. swl[swl_idx].node_name, WWN_SIZE);
  2004. memcpy(new_fcport->port_name,
  2005. swl[swl_idx].port_name, WWN_SIZE);
  2006. if (swl[swl_idx].d_id.b.rsvd_1 != 0) {
  2007. last_dev = 1;
  2008. }
  2009. swl_idx++;
  2010. }
  2011. } else {
  2012. /* Send GA_NXT to the switch */
  2013. rval = qla2x00_ga_nxt(ha, new_fcport);
  2014. if (rval != QLA_SUCCESS) {
  2015. qla_printk(KERN_WARNING, ha,
  2016. "SNS scan failed -- assuming zero-entry "
  2017. "result...\n");
  2018. list_for_each_entry_safe(fcport, fcptemp,
  2019. new_fcports, list) {
  2020. list_del(&fcport->list);
  2021. kfree(fcport);
  2022. }
  2023. rval = QLA_SUCCESS;
  2024. break;
  2025. }
  2026. }
  2027. /* If wrap on switch device list, exit. */
  2028. if (first_dev) {
  2029. wrap.b24 = new_fcport->d_id.b24;
  2030. first_dev = 0;
  2031. } else if (new_fcport->d_id.b24 == wrap.b24) {
  2032. DEBUG2(printk("scsi(%ld): device wrap (%02x%02x%02x)\n",
  2033. ha->host_no, new_fcport->d_id.b.domain,
  2034. new_fcport->d_id.b.area, new_fcport->d_id.b.al_pa));
  2035. break;
  2036. }
  2037. /* Bypass if host adapter. */
  2038. if (new_fcport->d_id.b24 == ha->d_id.b24)
  2039. continue;
  2040. /* Bypass if same domain and area of adapter. */
  2041. if (((new_fcport->d_id.b24 & 0xffff00) ==
  2042. (ha->d_id.b24 & 0xffff00)) && ha->current_topology ==
  2043. ISP_CFG_FL)
  2044. continue;
  2045. /* Bypass reserved domain fields. */
  2046. if ((new_fcport->d_id.b.domain & 0xf0) == 0xf0)
  2047. continue;
  2048. /* Locate matching device in database. */
  2049. found = 0;
  2050. list_for_each_entry(fcport, &ha->fcports, list) {
  2051. if (memcmp(new_fcport->port_name, fcport->port_name,
  2052. WWN_SIZE))
  2053. continue;
  2054. found++;
  2055. /*
  2056. * If address the same and state FCS_ONLINE, nothing
  2057. * changed.
  2058. */
  2059. if (fcport->d_id.b24 == new_fcport->d_id.b24 &&
  2060. atomic_read(&fcport->state) == FCS_ONLINE) {
  2061. break;
  2062. }
  2063. /*
  2064. * If device was not a fabric device before.
  2065. */
  2066. if ((fcport->flags & FCF_FABRIC_DEVICE) == 0) {
  2067. fcport->d_id.b24 = new_fcport->d_id.b24;
  2068. fcport->loop_id = FC_NO_LOOP_ID;
  2069. fcport->flags |= (FCF_FABRIC_DEVICE |
  2070. FCF_LOGIN_NEEDED);
  2071. fcport->flags &= ~FCF_PERSISTENT_BOUND;
  2072. break;
  2073. }
  2074. /*
  2075. * Port ID changed or device was marked to be updated;
  2076. * Log it out if still logged in and mark it for
  2077. * relogin later.
  2078. */
  2079. fcport->d_id.b24 = new_fcport->d_id.b24;
  2080. fcport->flags |= FCF_LOGIN_NEEDED;
  2081. if (fcport->loop_id != FC_NO_LOOP_ID &&
  2082. (fcport->flags & FCF_TAPE_PRESENT) == 0 &&
  2083. fcport->port_type != FCT_INITIATOR &&
  2084. fcport->port_type != FCT_BROADCAST) {
  2085. ha->isp_ops.fabric_logout(ha, fcport->loop_id,
  2086. fcport->d_id.b.domain, fcport->d_id.b.area,
  2087. fcport->d_id.b.al_pa);
  2088. fcport->loop_id = FC_NO_LOOP_ID;
  2089. }
  2090. break;
  2091. }
  2092. if (found)
  2093. continue;
  2094. /* If device was not in our fcports list, then add it. */
  2095. list_add_tail(&new_fcport->list, new_fcports);
  2096. /* Allocate a new replacement fcport. */
  2097. nxt_d_id.b24 = new_fcport->d_id.b24;
  2098. new_fcport = qla2x00_alloc_fcport(ha, GFP_KERNEL);
  2099. if (new_fcport == NULL) {
  2100. kfree(swl);
  2101. return (QLA_MEMORY_ALLOC_FAILED);
  2102. }
  2103. new_fcport->flags |= (FCF_FABRIC_DEVICE | FCF_LOGIN_NEEDED);
  2104. new_fcport->d_id.b24 = nxt_d_id.b24;
  2105. }
  2106. kfree(swl);
  2107. kfree(new_fcport);
  2108. if (!list_empty(new_fcports))
  2109. ha->device_flags |= DFLG_FABRIC_DEVICES;
  2110. return (rval);
  2111. }
  2112. /*
  2113. * qla2x00_find_new_loop_id
  2114. * Scan through our port list and find a new usable loop ID.
  2115. *
  2116. * Input:
  2117. * ha: adapter state pointer.
  2118. * dev: port structure pointer.
  2119. *
  2120. * Returns:
  2121. * qla2x00 local function return status code.
  2122. *
  2123. * Context:
  2124. * Kernel context.
  2125. */
  2126. int
  2127. qla2x00_find_new_loop_id(scsi_qla_host_t *ha, fc_port_t *dev)
  2128. {
  2129. int rval;
  2130. int found;
  2131. fc_port_t *fcport;
  2132. uint16_t first_loop_id;
  2133. rval = QLA_SUCCESS;
  2134. /* Save starting loop ID. */
  2135. first_loop_id = dev->loop_id;
  2136. for (;;) {
  2137. /* Skip loop ID if already used by adapter. */
  2138. if (dev->loop_id == ha->loop_id) {
  2139. dev->loop_id++;
  2140. }
  2141. /* Skip reserved loop IDs. */
  2142. while (qla2x00_is_reserved_id(ha, dev->loop_id)) {
  2143. dev->loop_id++;
  2144. }
  2145. /* Reset loop ID if passed the end. */
  2146. if (dev->loop_id > ha->last_loop_id) {
  2147. /* first loop ID. */
  2148. dev->loop_id = ha->min_external_loopid;
  2149. }
  2150. /* Check for loop ID being already in use. */
  2151. found = 0;
  2152. fcport = NULL;
  2153. list_for_each_entry(fcport, &ha->fcports, list) {
  2154. if (fcport->loop_id == dev->loop_id && fcport != dev) {
  2155. /* ID possibly in use */
  2156. found++;
  2157. break;
  2158. }
  2159. }
  2160. /* If not in use then it is free to use. */
  2161. if (!found) {
  2162. break;
  2163. }
  2164. /* ID in use. Try next value. */
  2165. dev->loop_id++;
  2166. /* If wrap around. No free ID to use. */
  2167. if (dev->loop_id == first_loop_id) {
  2168. dev->loop_id = FC_NO_LOOP_ID;
  2169. rval = QLA_FUNCTION_FAILED;
  2170. break;
  2171. }
  2172. }
  2173. return (rval);
  2174. }
  2175. /*
  2176. * qla2x00_device_resync
  2177. * Marks devices in the database that needs resynchronization.
  2178. *
  2179. * Input:
  2180. * ha = adapter block pointer.
  2181. *
  2182. * Context:
  2183. * Kernel context.
  2184. */
  2185. static int
  2186. qla2x00_device_resync(scsi_qla_host_t *ha)
  2187. {
  2188. int rval;
  2189. uint32_t mask;
  2190. fc_port_t *fcport;
  2191. uint32_t rscn_entry;
  2192. uint8_t rscn_out_iter;
  2193. uint8_t format;
  2194. port_id_t d_id;
  2195. rval = QLA_RSCNS_HANDLED;
  2196. while (ha->rscn_out_ptr != ha->rscn_in_ptr ||
  2197. ha->flags.rscn_queue_overflow) {
  2198. rscn_entry = ha->rscn_queue[ha->rscn_out_ptr];
  2199. format = MSB(MSW(rscn_entry));
  2200. d_id.b.domain = LSB(MSW(rscn_entry));
  2201. d_id.b.area = MSB(LSW(rscn_entry));
  2202. d_id.b.al_pa = LSB(LSW(rscn_entry));
  2203. DEBUG(printk("scsi(%ld): RSCN queue entry[%d] = "
  2204. "[%02x/%02x%02x%02x].\n",
  2205. ha->host_no, ha->rscn_out_ptr, format, d_id.b.domain,
  2206. d_id.b.area, d_id.b.al_pa));
  2207. ha->rscn_out_ptr++;
  2208. if (ha->rscn_out_ptr == MAX_RSCN_COUNT)
  2209. ha->rscn_out_ptr = 0;
  2210. /* Skip duplicate entries. */
  2211. for (rscn_out_iter = ha->rscn_out_ptr;
  2212. !ha->flags.rscn_queue_overflow &&
  2213. rscn_out_iter != ha->rscn_in_ptr;
  2214. rscn_out_iter = (rscn_out_iter ==
  2215. (MAX_RSCN_COUNT - 1)) ? 0: rscn_out_iter + 1) {
  2216. if (rscn_entry != ha->rscn_queue[rscn_out_iter])
  2217. break;
  2218. DEBUG(printk("scsi(%ld): Skipping duplicate RSCN queue "
  2219. "entry found at [%d].\n", ha->host_no,
  2220. rscn_out_iter));
  2221. ha->rscn_out_ptr = rscn_out_iter;
  2222. }
  2223. /* Queue overflow, set switch default case. */
  2224. if (ha->flags.rscn_queue_overflow) {
  2225. DEBUG(printk("scsi(%ld): device_resync: rscn "
  2226. "overflow.\n", ha->host_no));
  2227. format = 3;
  2228. ha->flags.rscn_queue_overflow = 0;
  2229. }
  2230. switch (format) {
  2231. case 0:
  2232. mask = 0xffffff;
  2233. break;
  2234. case 1:
  2235. mask = 0xffff00;
  2236. break;
  2237. case 2:
  2238. mask = 0xff0000;
  2239. break;
  2240. default:
  2241. mask = 0x0;
  2242. d_id.b24 = 0;
  2243. ha->rscn_out_ptr = ha->rscn_in_ptr;
  2244. break;
  2245. }
  2246. rval = QLA_SUCCESS;
  2247. list_for_each_entry(fcport, &ha->fcports, list) {
  2248. if ((fcport->flags & FCF_FABRIC_DEVICE) == 0 ||
  2249. (fcport->d_id.b24 & mask) != d_id.b24 ||
  2250. fcport->port_type == FCT_BROADCAST)
  2251. continue;
  2252. if (atomic_read(&fcport->state) == FCS_ONLINE) {
  2253. if (format != 3 ||
  2254. fcport->port_type != FCT_INITIATOR) {
  2255. qla2x00_mark_device_lost(ha, fcport,
  2256. 0, 0);
  2257. }
  2258. }
  2259. fcport->flags &= ~FCF_FARP_DONE;
  2260. }
  2261. }
  2262. return (rval);
  2263. }
  2264. /*
  2265. * qla2x00_fabric_dev_login
  2266. * Login fabric target device and update FC port database.
  2267. *
  2268. * Input:
  2269. * ha: adapter state pointer.
  2270. * fcport: port structure list pointer.
  2271. * next_loopid: contains value of a new loop ID that can be used
  2272. * by the next login attempt.
  2273. *
  2274. * Returns:
  2275. * qla2x00 local function return status code.
  2276. *
  2277. * Context:
  2278. * Kernel context.
  2279. */
  2280. static int
  2281. qla2x00_fabric_dev_login(scsi_qla_host_t *ha, fc_port_t *fcport,
  2282. uint16_t *next_loopid)
  2283. {
  2284. int rval;
  2285. int retry;
  2286. uint8_t opts;
  2287. rval = QLA_SUCCESS;
  2288. retry = 0;
  2289. rval = qla2x00_fabric_login(ha, fcport, next_loopid);
  2290. if (rval == QLA_SUCCESS) {
  2291. /* Send an ADISC to tape devices.*/
  2292. opts = 0;
  2293. if (fcport->flags & FCF_TAPE_PRESENT)
  2294. opts |= BIT_1;
  2295. rval = qla2x00_get_port_database(ha, fcport, opts);
  2296. if (rval != QLA_SUCCESS) {
  2297. ha->isp_ops.fabric_logout(ha, fcport->loop_id,
  2298. fcport->d_id.b.domain, fcport->d_id.b.area,
  2299. fcport->d_id.b.al_pa);
  2300. qla2x00_mark_device_lost(ha, fcport, 1, 0);
  2301. } else {
  2302. qla2x00_update_fcport(ha, fcport);
  2303. }
  2304. }
  2305. return (rval);
  2306. }
  2307. /*
  2308. * qla2x00_fabric_login
  2309. * Issue fabric login command.
  2310. *
  2311. * Input:
  2312. * ha = adapter block pointer.
  2313. * device = pointer to FC device type structure.
  2314. *
  2315. * Returns:
  2316. * 0 - Login successfully
  2317. * 1 - Login failed
  2318. * 2 - Initiator device
  2319. * 3 - Fatal error
  2320. */
  2321. int
  2322. qla2x00_fabric_login(scsi_qla_host_t *ha, fc_port_t *fcport,
  2323. uint16_t *next_loopid)
  2324. {
  2325. int rval;
  2326. int retry;
  2327. uint16_t tmp_loopid;
  2328. uint16_t mb[MAILBOX_REGISTER_COUNT];
  2329. retry = 0;
  2330. tmp_loopid = 0;
  2331. for (;;) {
  2332. DEBUG(printk("scsi(%ld): Trying Fabric Login w/loop id 0x%04x "
  2333. "for port %02x%02x%02x.\n",
  2334. ha->host_no, fcport->loop_id, fcport->d_id.b.domain,
  2335. fcport->d_id.b.area, fcport->d_id.b.al_pa));
  2336. /* Login fcport on switch. */
  2337. ha->isp_ops.fabric_login(ha, fcport->loop_id,
  2338. fcport->d_id.b.domain, fcport->d_id.b.area,
  2339. fcport->d_id.b.al_pa, mb, BIT_0);
  2340. if (mb[0] == MBS_PORT_ID_USED) {
  2341. /*
  2342. * Device has another loop ID. The firmware team
  2343. * recommends the driver perform an implicit login with
  2344. * the specified ID again. The ID we just used is save
  2345. * here so we return with an ID that can be tried by
  2346. * the next login.
  2347. */
  2348. retry++;
  2349. tmp_loopid = fcport->loop_id;
  2350. fcport->loop_id = mb[1];
  2351. DEBUG(printk("Fabric Login: port in use - next "
  2352. "loop id=0x%04x, port Id=%02x%02x%02x.\n",
  2353. fcport->loop_id, fcport->d_id.b.domain,
  2354. fcport->d_id.b.area, fcport->d_id.b.al_pa));
  2355. } else if (mb[0] == MBS_COMMAND_COMPLETE) {
  2356. /*
  2357. * Login succeeded.
  2358. */
  2359. if (retry) {
  2360. /* A retry occurred before. */
  2361. *next_loopid = tmp_loopid;
  2362. } else {
  2363. /*
  2364. * No retry occurred before. Just increment the
  2365. * ID value for next login.
  2366. */
  2367. *next_loopid = (fcport->loop_id + 1);
  2368. }
  2369. if (mb[1] & BIT_0) {
  2370. fcport->port_type = FCT_INITIATOR;
  2371. } else {
  2372. fcport->port_type = FCT_TARGET;
  2373. if (mb[1] & BIT_1) {
  2374. fcport->flags |= FCF_TAPE_PRESENT;
  2375. }
  2376. }
  2377. if (mb[10] & BIT_0)
  2378. fcport->supported_classes |= FC_COS_CLASS2;
  2379. if (mb[10] & BIT_1)
  2380. fcport->supported_classes |= FC_COS_CLASS3;
  2381. rval = QLA_SUCCESS;
  2382. break;
  2383. } else if (mb[0] == MBS_LOOP_ID_USED) {
  2384. /*
  2385. * Loop ID already used, try next loop ID.
  2386. */
  2387. fcport->loop_id++;
  2388. rval = qla2x00_find_new_loop_id(ha, fcport);
  2389. if (rval != QLA_SUCCESS) {
  2390. /* Ran out of loop IDs to use */
  2391. break;
  2392. }
  2393. } else if (mb[0] == MBS_COMMAND_ERROR) {
  2394. /*
  2395. * Firmware possibly timed out during login. If NO
  2396. * retries are left to do then the device is declared
  2397. * dead.
  2398. */
  2399. *next_loopid = fcport->loop_id;
  2400. ha->isp_ops.fabric_logout(ha, fcport->loop_id,
  2401. fcport->d_id.b.domain, fcport->d_id.b.area,
  2402. fcport->d_id.b.al_pa);
  2403. qla2x00_mark_device_lost(ha, fcport, 1, 0);
  2404. rval = 1;
  2405. break;
  2406. } else {
  2407. /*
  2408. * unrecoverable / not handled error
  2409. */
  2410. DEBUG2(printk("%s(%ld): failed=%x port_id=%02x%02x%02x "
  2411. "loop_id=%x jiffies=%lx.\n",
  2412. __func__, ha->host_no, mb[0],
  2413. fcport->d_id.b.domain, fcport->d_id.b.area,
  2414. fcport->d_id.b.al_pa, fcport->loop_id, jiffies));
  2415. *next_loopid = fcport->loop_id;
  2416. ha->isp_ops.fabric_logout(ha, fcport->loop_id,
  2417. fcport->d_id.b.domain, fcport->d_id.b.area,
  2418. fcport->d_id.b.al_pa);
  2419. fcport->loop_id = FC_NO_LOOP_ID;
  2420. fcport->login_retry = 0;
  2421. rval = 3;
  2422. break;
  2423. }
  2424. }
  2425. return (rval);
  2426. }
  2427. /*
  2428. * qla2x00_local_device_login
  2429. * Issue local device login command.
  2430. *
  2431. * Input:
  2432. * ha = adapter block pointer.
  2433. * loop_id = loop id of device to login to.
  2434. *
  2435. * Returns (Where's the #define!!!!):
  2436. * 0 - Login successfully
  2437. * 1 - Login failed
  2438. * 3 - Fatal error
  2439. */
  2440. int
  2441. qla2x00_local_device_login(scsi_qla_host_t *ha, fc_port_t *fcport)
  2442. {
  2443. int rval;
  2444. uint16_t mb[MAILBOX_REGISTER_COUNT];
  2445. memset(mb, 0, sizeof(mb));
  2446. rval = qla2x00_login_local_device(ha, fcport, mb, BIT_0);
  2447. if (rval == QLA_SUCCESS) {
  2448. /* Interrogate mailbox registers for any errors */
  2449. if (mb[0] == MBS_COMMAND_ERROR)
  2450. rval = 1;
  2451. else if (mb[0] == MBS_COMMAND_PARAMETER_ERROR)
  2452. /* device not in PCB table */
  2453. rval = 3;
  2454. }
  2455. return (rval);
  2456. }
  2457. /*
  2458. * qla2x00_loop_resync
  2459. * Resync with fibre channel devices.
  2460. *
  2461. * Input:
  2462. * ha = adapter block pointer.
  2463. *
  2464. * Returns:
  2465. * 0 = success
  2466. */
  2467. int
  2468. qla2x00_loop_resync(scsi_qla_host_t *ha)
  2469. {
  2470. int rval;
  2471. uint32_t wait_time;
  2472. rval = QLA_SUCCESS;
  2473. atomic_set(&ha->loop_state, LOOP_UPDATE);
  2474. clear_bit(ISP_ABORT_RETRY, &ha->dpc_flags);
  2475. if (ha->flags.online) {
  2476. if (!(rval = qla2x00_fw_ready(ha))) {
  2477. /* Wait at most MAX_TARGET RSCNs for a stable link. */
  2478. wait_time = 256;
  2479. do {
  2480. atomic_set(&ha->loop_state, LOOP_UPDATE);
  2481. /* Issue a marker after FW becomes ready. */
  2482. qla2x00_marker(ha, 0, 0, MK_SYNC_ALL);
  2483. ha->marker_needed = 0;
  2484. /* Remap devices on Loop. */
  2485. clear_bit(LOOP_RESYNC_NEEDED, &ha->dpc_flags);
  2486. qla2x00_configure_loop(ha);
  2487. wait_time--;
  2488. } while (!atomic_read(&ha->loop_down_timer) &&
  2489. !(test_bit(ISP_ABORT_NEEDED, &ha->dpc_flags)) &&
  2490. wait_time &&
  2491. (test_bit(LOOP_RESYNC_NEEDED, &ha->dpc_flags)));
  2492. }
  2493. }
  2494. if (test_bit(ISP_ABORT_NEEDED, &ha->dpc_flags)) {
  2495. return (QLA_FUNCTION_FAILED);
  2496. }
  2497. if (rval) {
  2498. DEBUG2_3(printk("%s(): **** FAILED ****\n", __func__));
  2499. }
  2500. return (rval);
  2501. }
  2502. void
  2503. qla2x00_rescan_fcports(scsi_qla_host_t *ha)
  2504. {
  2505. int rescan_done;
  2506. fc_port_t *fcport;
  2507. rescan_done = 0;
  2508. list_for_each_entry(fcport, &ha->fcports, list) {
  2509. if ((fcport->flags & FCF_RESCAN_NEEDED) == 0)
  2510. continue;
  2511. qla2x00_update_fcport(ha, fcport);
  2512. fcport->flags &= ~FCF_RESCAN_NEEDED;
  2513. rescan_done = 1;
  2514. }
  2515. qla2x00_probe_for_all_luns(ha);
  2516. }
  2517. void
  2518. qla2x00_update_fcports(scsi_qla_host_t *ha)
  2519. {
  2520. fc_port_t *fcport;
  2521. /* Go with deferred removal of rport references. */
  2522. list_for_each_entry(fcport, &ha->fcports, list)
  2523. if (fcport->drport)
  2524. qla2x00_rport_del(fcport);
  2525. }
  2526. /*
  2527. * qla2x00_abort_isp
  2528. * Resets ISP and aborts all outstanding commands.
  2529. *
  2530. * Input:
  2531. * ha = adapter block pointer.
  2532. *
  2533. * Returns:
  2534. * 0 = success
  2535. */
  2536. int
  2537. qla2x00_abort_isp(scsi_qla_host_t *ha)
  2538. {
  2539. unsigned long flags = 0;
  2540. uint16_t cnt;
  2541. srb_t *sp;
  2542. uint8_t status = 0;
  2543. if (ha->flags.online) {
  2544. ha->flags.online = 0;
  2545. clear_bit(ISP_ABORT_NEEDED, &ha->dpc_flags);
  2546. qla_printk(KERN_INFO, ha,
  2547. "Performing ISP error recovery - ha= %p.\n", ha);
  2548. ha->isp_ops.reset_chip(ha);
  2549. atomic_set(&ha->loop_down_timer, LOOP_DOWN_TIME);
  2550. if (atomic_read(&ha->loop_state) != LOOP_DOWN) {
  2551. atomic_set(&ha->loop_state, LOOP_DOWN);
  2552. qla2x00_mark_all_devices_lost(ha, 0);
  2553. } else {
  2554. if (!atomic_read(&ha->loop_down_timer))
  2555. atomic_set(&ha->loop_down_timer,
  2556. LOOP_DOWN_TIME);
  2557. }
  2558. spin_lock_irqsave(&ha->hardware_lock, flags);
  2559. /* Requeue all commands in outstanding command list. */
  2560. for (cnt = 1; cnt < MAX_OUTSTANDING_COMMANDS; cnt++) {
  2561. sp = ha->outstanding_cmds[cnt];
  2562. if (sp) {
  2563. ha->outstanding_cmds[cnt] = NULL;
  2564. sp->flags = 0;
  2565. sp->cmd->result = DID_RESET << 16;
  2566. sp->cmd->host_scribble = (unsigned char *)NULL;
  2567. qla2x00_sp_compl(ha, sp);
  2568. }
  2569. }
  2570. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  2571. ha->isp_ops.nvram_config(ha);
  2572. if (!qla2x00_restart_isp(ha)) {
  2573. clear_bit(RESET_MARKER_NEEDED, &ha->dpc_flags);
  2574. if (!atomic_read(&ha->loop_down_timer)) {
  2575. /*
  2576. * Issue marker command only when we are going
  2577. * to start the I/O .
  2578. */
  2579. ha->marker_needed = 1;
  2580. }
  2581. ha->flags.online = 1;
  2582. ha->isp_ops.enable_intrs(ha);
  2583. ha->isp_abort_cnt = 0;
  2584. clear_bit(ISP_ABORT_RETRY, &ha->dpc_flags);
  2585. } else { /* failed the ISP abort */
  2586. ha->flags.online = 1;
  2587. if (test_bit(ISP_ABORT_RETRY, &ha->dpc_flags)) {
  2588. if (ha->isp_abort_cnt == 0) {
  2589. qla_printk(KERN_WARNING, ha,
  2590. "ISP error recovery failed - "
  2591. "board disabled\n");
  2592. /*
  2593. * The next call disables the board
  2594. * completely.
  2595. */
  2596. ha->isp_ops.reset_adapter(ha);
  2597. ha->flags.online = 0;
  2598. clear_bit(ISP_ABORT_RETRY,
  2599. &ha->dpc_flags);
  2600. status = 0;
  2601. } else { /* schedule another ISP abort */
  2602. ha->isp_abort_cnt--;
  2603. DEBUG(printk("qla%ld: ISP abort - "
  2604. "retry remaining %d\n",
  2605. ha->host_no, ha->isp_abort_cnt);)
  2606. status = 1;
  2607. }
  2608. } else {
  2609. ha->isp_abort_cnt = MAX_RETRIES_OF_ISP_ABORT;
  2610. DEBUG(printk("qla2x00(%ld): ISP error recovery "
  2611. "- retrying (%d) more times\n",
  2612. ha->host_no, ha->isp_abort_cnt);)
  2613. set_bit(ISP_ABORT_RETRY, &ha->dpc_flags);
  2614. status = 1;
  2615. }
  2616. }
  2617. }
  2618. if (status) {
  2619. qla_printk(KERN_INFO, ha,
  2620. "qla2x00_abort_isp: **** FAILED ****\n");
  2621. } else {
  2622. DEBUG(printk(KERN_INFO
  2623. "qla2x00_abort_isp(%ld): exiting.\n",
  2624. ha->host_no);)
  2625. }
  2626. return(status);
  2627. }
  2628. /*
  2629. * qla2x00_restart_isp
  2630. * restarts the ISP after a reset
  2631. *
  2632. * Input:
  2633. * ha = adapter block pointer.
  2634. *
  2635. * Returns:
  2636. * 0 = success
  2637. */
  2638. static int
  2639. qla2x00_restart_isp(scsi_qla_host_t *ha)
  2640. {
  2641. uint8_t status = 0;
  2642. struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
  2643. unsigned long flags = 0;
  2644. uint32_t wait_time;
  2645. /* If firmware needs to be loaded */
  2646. if (qla2x00_isp_firmware(ha)) {
  2647. ha->flags.online = 0;
  2648. if (!(status = ha->isp_ops.chip_diag(ha))) {
  2649. if (IS_QLA2100(ha) || IS_QLA2200(ha)) {
  2650. status = qla2x00_setup_chip(ha);
  2651. goto done;
  2652. }
  2653. spin_lock_irqsave(&ha->hardware_lock, flags);
  2654. if (!IS_QLA24XX(ha) && !IS_QLA54XX(ha)) {
  2655. /*
  2656. * Disable SRAM, Instruction RAM and GP RAM
  2657. * parity.
  2658. */
  2659. WRT_REG_WORD(&reg->hccr,
  2660. (HCCR_ENABLE_PARITY + 0x0));
  2661. RD_REG_WORD(&reg->hccr);
  2662. }
  2663. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  2664. status = qla2x00_setup_chip(ha);
  2665. spin_lock_irqsave(&ha->hardware_lock, flags);
  2666. if (!IS_QLA24XX(ha) && !IS_QLA54XX(ha)) {
  2667. /* Enable proper parity */
  2668. if (IS_QLA2300(ha))
  2669. /* SRAM parity */
  2670. WRT_REG_WORD(&reg->hccr,
  2671. (HCCR_ENABLE_PARITY + 0x1));
  2672. else
  2673. /*
  2674. * SRAM, Instruction RAM and GP RAM
  2675. * parity.
  2676. */
  2677. WRT_REG_WORD(&reg->hccr,
  2678. (HCCR_ENABLE_PARITY + 0x7));
  2679. RD_REG_WORD(&reg->hccr);
  2680. }
  2681. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  2682. }
  2683. }
  2684. done:
  2685. if (!status && !(status = qla2x00_init_rings(ha))) {
  2686. clear_bit(RESET_MARKER_NEEDED, &ha->dpc_flags);
  2687. if (!(status = qla2x00_fw_ready(ha))) {
  2688. DEBUG(printk("%s(): Start configure loop, "
  2689. "status = %d\n", __func__, status);)
  2690. /* Issue a marker after FW becomes ready. */
  2691. qla2x00_marker(ha, 0, 0, MK_SYNC_ALL);
  2692. ha->flags.online = 1;
  2693. /* Wait at most MAX_TARGET RSCNs for a stable link. */
  2694. wait_time = 256;
  2695. do {
  2696. clear_bit(LOOP_RESYNC_NEEDED, &ha->dpc_flags);
  2697. qla2x00_configure_loop(ha);
  2698. wait_time--;
  2699. } while (!atomic_read(&ha->loop_down_timer) &&
  2700. !(test_bit(ISP_ABORT_NEEDED, &ha->dpc_flags)) &&
  2701. wait_time &&
  2702. (test_bit(LOOP_RESYNC_NEEDED, &ha->dpc_flags)));
  2703. }
  2704. /* if no cable then assume it's good */
  2705. if ((ha->device_flags & DFLG_NO_CABLE))
  2706. status = 0;
  2707. DEBUG(printk("%s(): Configure loop done, status = 0x%x\n",
  2708. __func__,
  2709. status);)
  2710. }
  2711. return (status);
  2712. }
  2713. /*
  2714. * qla2x00_reset_adapter
  2715. * Reset adapter.
  2716. *
  2717. * Input:
  2718. * ha = adapter block pointer.
  2719. */
  2720. void
  2721. qla2x00_reset_adapter(scsi_qla_host_t *ha)
  2722. {
  2723. unsigned long flags = 0;
  2724. struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
  2725. ha->flags.online = 0;
  2726. ha->isp_ops.disable_intrs(ha);
  2727. spin_lock_irqsave(&ha->hardware_lock, flags);
  2728. WRT_REG_WORD(&reg->hccr, HCCR_RESET_RISC);
  2729. RD_REG_WORD(&reg->hccr); /* PCI Posting. */
  2730. WRT_REG_WORD(&reg->hccr, HCCR_RELEASE_RISC);
  2731. RD_REG_WORD(&reg->hccr); /* PCI Posting. */
  2732. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  2733. }
  2734. void
  2735. qla24xx_reset_adapter(scsi_qla_host_t *ha)
  2736. {
  2737. unsigned long flags = 0;
  2738. struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
  2739. ha->flags.online = 0;
  2740. ha->isp_ops.disable_intrs(ha);
  2741. spin_lock_irqsave(&ha->hardware_lock, flags);
  2742. WRT_REG_DWORD(&reg->hccr, HCCRX_SET_RISC_RESET);
  2743. RD_REG_DWORD(&reg->hccr);
  2744. WRT_REG_DWORD(&reg->hccr, HCCRX_REL_RISC_PAUSE);
  2745. RD_REG_DWORD(&reg->hccr);
  2746. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  2747. }
  2748. int
  2749. qla24xx_nvram_config(scsi_qla_host_t *ha)
  2750. {
  2751. int rval;
  2752. struct init_cb_24xx *icb;
  2753. struct nvram_24xx *nv;
  2754. uint32_t *dptr;
  2755. uint8_t *dptr1, *dptr2;
  2756. uint32_t chksum;
  2757. uint16_t cnt;
  2758. rval = QLA_SUCCESS;
  2759. icb = (struct init_cb_24xx *)ha->init_cb;
  2760. nv = (struct nvram_24xx *)ha->request_ring;
  2761. /* Determine NVRAM starting address. */
  2762. ha->nvram_size = sizeof(struct nvram_24xx);
  2763. ha->nvram_base = FA_NVRAM_FUNC0_ADDR;
  2764. ha->vpd_size = FA_NVRAM_VPD_SIZE;
  2765. ha->vpd_base = FA_NVRAM_VPD0_ADDR;
  2766. if (PCI_FUNC(ha->pdev->devfn)) {
  2767. ha->nvram_base = FA_NVRAM_FUNC1_ADDR;
  2768. ha->vpd_base = FA_NVRAM_VPD1_ADDR;
  2769. }
  2770. /* Get NVRAM data and calculate checksum. */
  2771. dptr = (uint32_t *)nv;
  2772. ha->isp_ops.read_nvram(ha, (uint8_t *)dptr, ha->nvram_base,
  2773. ha->nvram_size);
  2774. for (cnt = 0, chksum = 0; cnt < ha->nvram_size >> 2; cnt++)
  2775. chksum += le32_to_cpu(*dptr++);
  2776. DEBUG5(printk("scsi(%ld): Contents of NVRAM\n", ha->host_no));
  2777. DEBUG5(qla2x00_dump_buffer((uint8_t *)ha->request_ring,
  2778. ha->nvram_size));
  2779. /* Bad NVRAM data, set defaults parameters. */
  2780. if (chksum || nv->id[0] != 'I' || nv->id[1] != 'S' || nv->id[2] != 'P'
  2781. || nv->id[3] != ' ' ||
  2782. nv->nvram_version < __constant_cpu_to_le16(ICB_VERSION)) {
  2783. /* Reset NVRAM data. */
  2784. qla_printk(KERN_WARNING, ha, "Inconsistent NVRAM detected: "
  2785. "checksum=0x%x id=%c version=0x%x.\n", chksum, nv->id[0],
  2786. le16_to_cpu(nv->nvram_version));
  2787. qla_printk(KERN_WARNING, ha, "Falling back to functioning (yet "
  2788. "invalid -- WWPN) defaults.\n");
  2789. /*
  2790. * Set default initialization control block.
  2791. */
  2792. memset(nv, 0, ha->nvram_size);
  2793. nv->nvram_version = __constant_cpu_to_le16(ICB_VERSION);
  2794. nv->version = __constant_cpu_to_le16(ICB_VERSION);
  2795. nv->frame_payload_size = __constant_cpu_to_le16(2048);
  2796. nv->execution_throttle = __constant_cpu_to_le16(0xFFFF);
  2797. nv->exchange_count = __constant_cpu_to_le16(0);
  2798. nv->hard_address = __constant_cpu_to_le16(124);
  2799. nv->port_name[0] = 0x21;
  2800. nv->port_name[1] = 0x00 + PCI_FUNC(ha->pdev->devfn);
  2801. nv->port_name[2] = 0x00;
  2802. nv->port_name[3] = 0xe0;
  2803. nv->port_name[4] = 0x8b;
  2804. nv->port_name[5] = 0x1c;
  2805. nv->port_name[6] = 0x55;
  2806. nv->port_name[7] = 0x86;
  2807. nv->node_name[0] = 0x20;
  2808. nv->node_name[1] = 0x00;
  2809. nv->node_name[2] = 0x00;
  2810. nv->node_name[3] = 0xe0;
  2811. nv->node_name[4] = 0x8b;
  2812. nv->node_name[5] = 0x1c;
  2813. nv->node_name[6] = 0x55;
  2814. nv->node_name[7] = 0x86;
  2815. nv->login_retry_count = __constant_cpu_to_le16(8);
  2816. nv->link_down_timeout = __constant_cpu_to_le16(200);
  2817. nv->interrupt_delay_timer = __constant_cpu_to_le16(0);
  2818. nv->login_timeout = __constant_cpu_to_le16(0);
  2819. nv->firmware_options_1 =
  2820. __constant_cpu_to_le32(BIT_14|BIT_13|BIT_2|BIT_1);
  2821. nv->firmware_options_2 = __constant_cpu_to_le32(2 << 4);
  2822. nv->firmware_options_2 |= __constant_cpu_to_le32(BIT_12);
  2823. nv->firmware_options_3 = __constant_cpu_to_le32(2 << 13);
  2824. nv->host_p = __constant_cpu_to_le32(BIT_11|BIT_10);
  2825. nv->efi_parameters = __constant_cpu_to_le32(0);
  2826. nv->reset_delay = 5;
  2827. nv->max_luns_per_target = __constant_cpu_to_le16(128);
  2828. nv->port_down_retry_count = __constant_cpu_to_le16(30);
  2829. nv->link_down_timeout = __constant_cpu_to_le16(30);
  2830. rval = 1;
  2831. }
  2832. /* Reset Initialization control block */
  2833. memset(icb, 0, sizeof(struct init_cb_24xx));
  2834. /* Copy 1st segment. */
  2835. dptr1 = (uint8_t *)icb;
  2836. dptr2 = (uint8_t *)&nv->version;
  2837. cnt = (uint8_t *)&icb->response_q_inpointer - (uint8_t *)&icb->version;
  2838. while (cnt--)
  2839. *dptr1++ = *dptr2++;
  2840. icb->login_retry_count = nv->login_retry_count;
  2841. icb->link_down_timeout = nv->link_down_timeout;
  2842. /* Copy 2nd segment. */
  2843. dptr1 = (uint8_t *)&icb->interrupt_delay_timer;
  2844. dptr2 = (uint8_t *)&nv->interrupt_delay_timer;
  2845. cnt = (uint8_t *)&icb->reserved_3 -
  2846. (uint8_t *)&icb->interrupt_delay_timer;
  2847. while (cnt--)
  2848. *dptr1++ = *dptr2++;
  2849. /*
  2850. * Setup driver NVRAM options.
  2851. */
  2852. if (memcmp(nv->model_name, BINZERO, sizeof(nv->model_name)) != 0) {
  2853. char *st, *en;
  2854. uint16_t index;
  2855. strncpy(ha->model_number, nv->model_name,
  2856. sizeof(nv->model_name));
  2857. st = en = ha->model_number;
  2858. en += sizeof(nv->model_name) - 1;
  2859. while (en > st) {
  2860. if (*en != 0x20 && *en != 0x00)
  2861. break;
  2862. *en-- = '\0';
  2863. }
  2864. index = (ha->pdev->subsystem_device & 0xff);
  2865. if (index < QLA_MODEL_NAMES)
  2866. ha->model_desc = qla2x00_model_name[index * 2 + 1];
  2867. } else
  2868. strcpy(ha->model_number, "QLA2462");
  2869. /* Use alternate WWN? */
  2870. if (nv->host_p & __constant_cpu_to_le32(BIT_15)) {
  2871. memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE);
  2872. memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE);
  2873. }
  2874. /* Prepare nodename */
  2875. if ((icb->firmware_options_1 & __constant_cpu_to_le32(BIT_14)) == 0) {
  2876. /*
  2877. * Firmware will apply the following mask if the nodename was
  2878. * not provided.
  2879. */
  2880. memcpy(icb->node_name, icb->port_name, WWN_SIZE);
  2881. icb->node_name[0] &= 0xF0;
  2882. }
  2883. /* Set host adapter parameters. */
  2884. ha->flags.disable_risc_code_load = 0;
  2885. ha->flags.enable_lip_reset = 1;
  2886. ha->flags.enable_lip_full_login = 1;
  2887. ha->flags.enable_target_reset = 1;
  2888. ha->flags.enable_led_scheme = 0;
  2889. ha->operating_mode = (le32_to_cpu(icb->firmware_options_2) &
  2890. (BIT_6 | BIT_5 | BIT_4)) >> 4;
  2891. memcpy(ha->fw_seriallink_options24, nv->seriallink_options,
  2892. sizeof(ha->fw_seriallink_options24));
  2893. /* save HBA serial number */
  2894. ha->serial0 = icb->port_name[5];
  2895. ha->serial1 = icb->port_name[6];
  2896. ha->serial2 = icb->port_name[7];
  2897. ha->node_name = icb->node_name;
  2898. ha->port_name = icb->port_name;
  2899. icb->execution_throttle = __constant_cpu_to_le16(0xFFFF);
  2900. ha->retry_count = le16_to_cpu(nv->login_retry_count);
  2901. /* Set minimum login_timeout to 4 seconds. */
  2902. if (le16_to_cpu(nv->login_timeout) < ql2xlogintimeout)
  2903. nv->login_timeout = cpu_to_le16(ql2xlogintimeout);
  2904. if (le16_to_cpu(nv->login_timeout) < 4)
  2905. nv->login_timeout = __constant_cpu_to_le16(4);
  2906. ha->login_timeout = le16_to_cpu(nv->login_timeout);
  2907. icb->login_timeout = cpu_to_le16(nv->login_timeout);
  2908. /* Set minimum RATOV to 200 tenths of a second. */
  2909. ha->r_a_tov = 200;
  2910. ha->loop_reset_delay = nv->reset_delay;
  2911. /* Link Down Timeout = 0:
  2912. *
  2913. * When Port Down timer expires we will start returning
  2914. * I/O's to OS with "DID_NO_CONNECT".
  2915. *
  2916. * Link Down Timeout != 0:
  2917. *
  2918. * The driver waits for the link to come up after link down
  2919. * before returning I/Os to OS with "DID_NO_CONNECT".
  2920. */
  2921. if (le16_to_cpu(nv->link_down_timeout) == 0) {
  2922. ha->loop_down_abort_time =
  2923. (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT);
  2924. } else {
  2925. ha->link_down_timeout = le16_to_cpu(nv->link_down_timeout);
  2926. ha->loop_down_abort_time =
  2927. (LOOP_DOWN_TIME - ha->link_down_timeout);
  2928. }
  2929. /* Need enough time to try and get the port back. */
  2930. ha->port_down_retry_count = le16_to_cpu(nv->port_down_retry_count);
  2931. if (qlport_down_retry)
  2932. ha->port_down_retry_count = qlport_down_retry;
  2933. /* Set login_retry_count */
  2934. ha->login_retry_count = le16_to_cpu(nv->login_retry_count);
  2935. if (ha->port_down_retry_count ==
  2936. le16_to_cpu(nv->port_down_retry_count) &&
  2937. ha->port_down_retry_count > 3)
  2938. ha->login_retry_count = ha->port_down_retry_count;
  2939. else if (ha->port_down_retry_count > (int)ha->login_retry_count)
  2940. ha->login_retry_count = ha->port_down_retry_count;
  2941. if (ql2xloginretrycount)
  2942. ha->login_retry_count = ql2xloginretrycount;
  2943. /* Enable ZIO. */
  2944. if (!ha->flags.init_done) {
  2945. ha->zio_mode = le32_to_cpu(icb->firmware_options_2) &
  2946. (BIT_3 | BIT_2 | BIT_1 | BIT_0);
  2947. ha->zio_timer = le16_to_cpu(icb->interrupt_delay_timer) ?
  2948. le16_to_cpu(icb->interrupt_delay_timer): 2;
  2949. }
  2950. icb->firmware_options_2 &= __constant_cpu_to_le32(
  2951. ~(BIT_3 | BIT_2 | BIT_1 | BIT_0));
  2952. ha->flags.process_response_queue = 0;
  2953. if (ha->zio_mode != QLA_ZIO_DISABLED) {
  2954. ha->zio_mode = QLA_ZIO_MODE_6;
  2955. DEBUG2(printk("scsi(%ld): ZIO mode %d enabled; timer delay "
  2956. "(%d us).\n", ha->host_no, ha->zio_mode,
  2957. ha->zio_timer * 100));
  2958. qla_printk(KERN_INFO, ha,
  2959. "ZIO mode %d enabled; timer delay (%d us).\n",
  2960. ha->zio_mode, ha->zio_timer * 100);
  2961. icb->firmware_options_2 |= cpu_to_le32(
  2962. (uint32_t)ha->zio_mode);
  2963. icb->interrupt_delay_timer = cpu_to_le16(ha->zio_timer);
  2964. ha->flags.process_response_queue = 1;
  2965. }
  2966. if (rval) {
  2967. DEBUG2_3(printk(KERN_WARNING
  2968. "scsi(%ld): NVRAM configuration failed!\n", ha->host_no));
  2969. }
  2970. return (rval);
  2971. }
  2972. int
  2973. qla24xx_load_risc_flash(scsi_qla_host_t *ha, uint32_t *srisc_addr)
  2974. {
  2975. int rval;
  2976. int segments, fragment;
  2977. uint32_t faddr;
  2978. uint32_t *dcode, dlen;
  2979. uint32_t risc_addr;
  2980. uint32_t risc_size;
  2981. uint32_t i;
  2982. rval = QLA_SUCCESS;
  2983. segments = FA_RISC_CODE_SEGMENTS;
  2984. faddr = FA_RISC_CODE_ADDR;
  2985. dcode = (uint32_t *)ha->request_ring;
  2986. *srisc_addr = 0;
  2987. /* Validate firmware image by checking version. */
  2988. qla24xx_read_flash_data(ha, dcode, faddr + 4, 4);
  2989. for (i = 0; i < 4; i++)
  2990. dcode[i] = be32_to_cpu(dcode[i]);
  2991. if ((dcode[0] == 0xffffffff && dcode[1] == 0xffffffff &&
  2992. dcode[2] == 0xffffffff && dcode[3] == 0xffffffff) ||
  2993. (dcode[0] == 0 && dcode[1] == 0 && dcode[2] == 0 &&
  2994. dcode[3] == 0)) {
  2995. qla_printk(KERN_WARNING, ha,
  2996. "Unable to verify integrity of flash firmware image!\n");
  2997. qla_printk(KERN_WARNING, ha,
  2998. "Firmware data: %08x %08x %08x %08x!\n", dcode[0],
  2999. dcode[1], dcode[2], dcode[3]);
  3000. return QLA_FUNCTION_FAILED;
  3001. }
  3002. while (segments && rval == QLA_SUCCESS) {
  3003. /* Read segment's load information. */
  3004. qla24xx_read_flash_data(ha, dcode, faddr, 4);
  3005. risc_addr = be32_to_cpu(dcode[2]);
  3006. *srisc_addr = *srisc_addr == 0 ? risc_addr : *srisc_addr;
  3007. risc_size = be32_to_cpu(dcode[3]);
  3008. fragment = 0;
  3009. while (risc_size > 0 && rval == QLA_SUCCESS) {
  3010. dlen = (uint32_t)(ha->fw_transfer_size >> 2);
  3011. if (dlen > risc_size)
  3012. dlen = risc_size;
  3013. DEBUG7(printk("scsi(%ld): Loading risc segment@ risc "
  3014. "addr %x, number of dwords 0x%x, offset 0x%x.\n",
  3015. ha->host_no, risc_addr, dlen, faddr));
  3016. qla24xx_read_flash_data(ha, dcode, faddr, dlen);
  3017. for (i = 0; i < dlen; i++)
  3018. dcode[i] = swab32(dcode[i]);
  3019. rval = qla2x00_load_ram(ha, ha->request_dma, risc_addr,
  3020. dlen);
  3021. if (rval) {
  3022. DEBUG(printk("scsi(%ld):[ERROR] Failed to load "
  3023. "segment %d of firmware\n", ha->host_no,
  3024. fragment));
  3025. qla_printk(KERN_WARNING, ha,
  3026. "[ERROR] Failed to load segment %d of "
  3027. "firmware\n", fragment);
  3028. break;
  3029. }
  3030. faddr += dlen;
  3031. risc_addr += dlen;
  3032. risc_size -= dlen;
  3033. fragment++;
  3034. }
  3035. /* Next segment. */
  3036. segments--;
  3037. }
  3038. return rval;
  3039. }
  3040. #define QLA_FW_URL "ftp://ftp.qlogic.com/outgoing/linux/firmware/"
  3041. int
  3042. qla2x00_load_risc(scsi_qla_host_t *ha, uint32_t *srisc_addr)
  3043. {
  3044. int rval;
  3045. int i, fragment;
  3046. uint16_t *wcode, *fwcode;
  3047. uint32_t risc_addr, risc_size, fwclen, wlen, *seg;
  3048. struct fw_blob *blob;
  3049. /* Load firmware blob. */
  3050. blob = qla2x00_request_firmware(ha);
  3051. if (!blob) {
  3052. qla_printk(KERN_ERR, ha, "Firmware image unavailable.\n");
  3053. qla_printk(KERN_ERR, ha, "Firmware images can be retrieved "
  3054. "from: " QLA_FW_URL ".\n");
  3055. return QLA_FUNCTION_FAILED;
  3056. }
  3057. rval = QLA_SUCCESS;
  3058. wcode = (uint16_t *)ha->request_ring;
  3059. *srisc_addr = 0;
  3060. fwcode = (uint16_t *)blob->fw->data;
  3061. fwclen = 0;
  3062. /* Validate firmware image by checking version. */
  3063. if (blob->fw->size < 8 * sizeof(uint16_t)) {
  3064. qla_printk(KERN_WARNING, ha,
  3065. "Unable to verify integrity of firmware image (%Zd)!\n",
  3066. blob->fw->size);
  3067. goto fail_fw_integrity;
  3068. }
  3069. for (i = 0; i < 4; i++)
  3070. wcode[i] = be16_to_cpu(fwcode[i + 4]);
  3071. if ((wcode[0] == 0xffff && wcode[1] == 0xffff && wcode[2] == 0xffff &&
  3072. wcode[3] == 0xffff) || (wcode[0] == 0 && wcode[1] == 0 &&
  3073. wcode[2] == 0 && wcode[3] == 0)) {
  3074. qla_printk(KERN_WARNING, ha,
  3075. "Unable to verify integrity of firmware image!\n");
  3076. qla_printk(KERN_WARNING, ha,
  3077. "Firmware data: %04x %04x %04x %04x!\n", wcode[0],
  3078. wcode[1], wcode[2], wcode[3]);
  3079. goto fail_fw_integrity;
  3080. }
  3081. seg = blob->segs;
  3082. while (*seg && rval == QLA_SUCCESS) {
  3083. risc_addr = *seg;
  3084. *srisc_addr = *srisc_addr == 0 ? *seg : *srisc_addr;
  3085. risc_size = be16_to_cpu(fwcode[3]);
  3086. /* Validate firmware image size. */
  3087. fwclen += risc_size * sizeof(uint16_t);
  3088. if (blob->fw->size < fwclen) {
  3089. qla_printk(KERN_WARNING, ha,
  3090. "Unable to verify integrity of firmware image "
  3091. "(%Zd)!\n", blob->fw->size);
  3092. goto fail_fw_integrity;
  3093. }
  3094. fragment = 0;
  3095. while (risc_size > 0 && rval == QLA_SUCCESS) {
  3096. wlen = (uint16_t)(ha->fw_transfer_size >> 1);
  3097. if (wlen > risc_size)
  3098. wlen = risc_size;
  3099. DEBUG7(printk("scsi(%ld): Loading risc segment@ risc "
  3100. "addr %x, number of words 0x%x.\n", ha->host_no,
  3101. risc_addr, wlen));
  3102. for (i = 0; i < wlen; i++)
  3103. wcode[i] = swab16(fwcode[i]);
  3104. rval = qla2x00_load_ram(ha, ha->request_dma, risc_addr,
  3105. wlen);
  3106. if (rval) {
  3107. DEBUG(printk("scsi(%ld):[ERROR] Failed to load "
  3108. "segment %d of firmware\n", ha->host_no,
  3109. fragment));
  3110. qla_printk(KERN_WARNING, ha,
  3111. "[ERROR] Failed to load segment %d of "
  3112. "firmware\n", fragment);
  3113. break;
  3114. }
  3115. fwcode += wlen;
  3116. risc_addr += wlen;
  3117. risc_size -= wlen;
  3118. fragment++;
  3119. }
  3120. /* Next segment. */
  3121. seg++;
  3122. }
  3123. return rval;
  3124. fail_fw_integrity:
  3125. return QLA_FUNCTION_FAILED;
  3126. }
  3127. int
  3128. qla24xx_load_risc(scsi_qla_host_t *ha, uint32_t *srisc_addr)
  3129. {
  3130. int rval;
  3131. int segments, fragment;
  3132. uint32_t *dcode, dlen;
  3133. uint32_t risc_addr;
  3134. uint32_t risc_size;
  3135. uint32_t i;
  3136. struct fw_blob *blob;
  3137. uint32_t *fwcode, fwclen;
  3138. /* Load firmware blob. */
  3139. blob = qla2x00_request_firmware(ha);
  3140. if (!blob) {
  3141. qla_printk(KERN_ERR, ha, "Firmware image unavailable.\n");
  3142. qla_printk(KERN_ERR, ha, "Firmware images can be retrieved "
  3143. "from: " QLA_FW_URL ".\n");
  3144. /* Try to load RISC code from flash. */
  3145. qla_printk(KERN_ERR, ha, "Attempting to load (potentially "
  3146. "outdated) firmware from flash.\n");
  3147. return qla24xx_load_risc_flash(ha, srisc_addr);
  3148. }
  3149. rval = QLA_SUCCESS;
  3150. segments = FA_RISC_CODE_SEGMENTS;
  3151. dcode = (uint32_t *)ha->request_ring;
  3152. *srisc_addr = 0;
  3153. fwcode = (uint32_t *)blob->fw->data;
  3154. fwclen = 0;
  3155. /* Validate firmware image by checking version. */
  3156. if (blob->fw->size < 8 * sizeof(uint32_t)) {
  3157. qla_printk(KERN_WARNING, ha,
  3158. "Unable to verify integrity of firmware image (%Zd)!\n",
  3159. blob->fw->size);
  3160. goto fail_fw_integrity;
  3161. }
  3162. for (i = 0; i < 4; i++)
  3163. dcode[i] = be32_to_cpu(fwcode[i + 4]);
  3164. if ((dcode[0] == 0xffffffff && dcode[1] == 0xffffffff &&
  3165. dcode[2] == 0xffffffff && dcode[3] == 0xffffffff) ||
  3166. (dcode[0] == 0 && dcode[1] == 0 && dcode[2] == 0 &&
  3167. dcode[3] == 0)) {
  3168. qla_printk(KERN_WARNING, ha,
  3169. "Unable to verify integrity of firmware image!\n");
  3170. qla_printk(KERN_WARNING, ha,
  3171. "Firmware data: %08x %08x %08x %08x!\n", dcode[0],
  3172. dcode[1], dcode[2], dcode[3]);
  3173. goto fail_fw_integrity;
  3174. }
  3175. while (segments && rval == QLA_SUCCESS) {
  3176. risc_addr = be32_to_cpu(fwcode[2]);
  3177. *srisc_addr = *srisc_addr == 0 ? risc_addr : *srisc_addr;
  3178. risc_size = be32_to_cpu(fwcode[3]);
  3179. /* Validate firmware image size. */
  3180. fwclen += risc_size * sizeof(uint32_t);
  3181. if (blob->fw->size < fwclen) {
  3182. qla_printk(KERN_WARNING, ha,
  3183. "Unable to verify integrity of firmware image "
  3184. "(%Zd)!\n", blob->fw->size);
  3185. goto fail_fw_integrity;
  3186. }
  3187. fragment = 0;
  3188. while (risc_size > 0 && rval == QLA_SUCCESS) {
  3189. dlen = (uint32_t)(ha->fw_transfer_size >> 2);
  3190. if (dlen > risc_size)
  3191. dlen = risc_size;
  3192. DEBUG7(printk("scsi(%ld): Loading risc segment@ risc "
  3193. "addr %x, number of dwords 0x%x.\n", ha->host_no,
  3194. risc_addr, dlen));
  3195. for (i = 0; i < dlen; i++)
  3196. dcode[i] = swab32(fwcode[i]);
  3197. rval = qla2x00_load_ram(ha, ha->request_dma, risc_addr,
  3198. dlen);
  3199. if (rval) {
  3200. DEBUG(printk("scsi(%ld):[ERROR] Failed to load "
  3201. "segment %d of firmware\n", ha->host_no,
  3202. fragment));
  3203. qla_printk(KERN_WARNING, ha,
  3204. "[ERROR] Failed to load segment %d of "
  3205. "firmware\n", fragment);
  3206. break;
  3207. }
  3208. fwcode += dlen;
  3209. risc_addr += dlen;
  3210. risc_size -= dlen;
  3211. fragment++;
  3212. }
  3213. /* Next segment. */
  3214. segments--;
  3215. }
  3216. return rval;
  3217. fail_fw_integrity:
  3218. return QLA_FUNCTION_FAILED;
  3219. }