omap_hwmod.c 65 KB

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  1. /*
  2. * omap_hwmod implementation for OMAP2/3/4
  3. *
  4. * Copyright (C) 2009-2011 Nokia Corporation
  5. * Copyright (C) 2011 Texas Instruments, Inc.
  6. *
  7. * Paul Walmsley, Benoît Cousson, Kevin Hilman
  8. *
  9. * Created in collaboration with (alphabetical order): Thara Gopinath,
  10. * Tony Lindgren, Rajendra Nayak, Vikram Pandita, Sakari Poussa, Anand
  11. * Sawant, Santosh Shilimkar, Richard Woodruff
  12. *
  13. * This program is free software; you can redistribute it and/or modify
  14. * it under the terms of the GNU General Public License version 2 as
  15. * published by the Free Software Foundation.
  16. *
  17. * Introduction
  18. * ------------
  19. * One way to view an OMAP SoC is as a collection of largely unrelated
  20. * IP blocks connected by interconnects. The IP blocks include
  21. * devices such as ARM processors, audio serial interfaces, UARTs,
  22. * etc. Some of these devices, like the DSP, are created by TI;
  23. * others, like the SGX, largely originate from external vendors. In
  24. * TI's documentation, on-chip devices are referred to as "OMAP
  25. * modules." Some of these IP blocks are identical across several
  26. * OMAP versions. Others are revised frequently.
  27. *
  28. * These OMAP modules are tied together by various interconnects.
  29. * Most of the address and data flow between modules is via OCP-based
  30. * interconnects such as the L3 and L4 buses; but there are other
  31. * interconnects that distribute the hardware clock tree, handle idle
  32. * and reset signaling, supply power, and connect the modules to
  33. * various pads or balls on the OMAP package.
  34. *
  35. * OMAP hwmod provides a consistent way to describe the on-chip
  36. * hardware blocks and their integration into the rest of the chip.
  37. * This description can be automatically generated from the TI
  38. * hardware database. OMAP hwmod provides a standard, consistent API
  39. * to reset, enable, idle, and disable these hardware blocks. And
  40. * hwmod provides a way for other core code, such as the Linux device
  41. * code or the OMAP power management and address space mapping code,
  42. * to query the hardware database.
  43. *
  44. * Using hwmod
  45. * -----------
  46. * Drivers won't call hwmod functions directly. That is done by the
  47. * omap_device code, and in rare occasions, by custom integration code
  48. * in arch/arm/ *omap*. The omap_device code includes functions to
  49. * build a struct platform_device using omap_hwmod data, and that is
  50. * currently how hwmod data is communicated to drivers and to the
  51. * Linux driver model. Most drivers will call omap_hwmod functions only
  52. * indirectly, via pm_runtime*() functions.
  53. *
  54. * From a layering perspective, here is where the OMAP hwmod code
  55. * fits into the kernel software stack:
  56. *
  57. * +-------------------------------+
  58. * | Device driver code |
  59. * | (e.g., drivers/) |
  60. * +-------------------------------+
  61. * | Linux driver model |
  62. * | (platform_device / |
  63. * | platform_driver data/code) |
  64. * +-------------------------------+
  65. * | OMAP core-driver integration |
  66. * |(arch/arm/mach-omap2/devices.c)|
  67. * +-------------------------------+
  68. * | omap_device code |
  69. * | (../plat-omap/omap_device.c) |
  70. * +-------------------------------+
  71. * ----> | omap_hwmod code/data | <-----
  72. * | (../mach-omap2/omap_hwmod*) |
  73. * +-------------------------------+
  74. * | OMAP clock/PRCM/register fns |
  75. * | (__raw_{read,write}l, clk*) |
  76. * +-------------------------------+
  77. *
  78. * Device drivers should not contain any OMAP-specific code or data in
  79. * them. They should only contain code to operate the IP block that
  80. * the driver is responsible for. This is because these IP blocks can
  81. * also appear in other SoCs, either from TI (such as DaVinci) or from
  82. * other manufacturers; and drivers should be reusable across other
  83. * platforms.
  84. *
  85. * The OMAP hwmod code also will attempt to reset and idle all on-chip
  86. * devices upon boot. The goal here is for the kernel to be
  87. * completely self-reliant and independent from bootloaders. This is
  88. * to ensure a repeatable configuration, both to ensure consistent
  89. * runtime behavior, and to make it easier for others to reproduce
  90. * bugs.
  91. *
  92. * OMAP module activity states
  93. * ---------------------------
  94. * The hwmod code considers modules to be in one of several activity
  95. * states. IP blocks start out in an UNKNOWN state, then once they
  96. * are registered via the hwmod code, proceed to the REGISTERED state.
  97. * Once their clock names are resolved to clock pointers, the module
  98. * enters the CLKS_INITED state; and finally, once the module has been
  99. * reset and the integration registers programmed, the INITIALIZED state
  100. * is entered. The hwmod code will then place the module into either
  101. * the IDLE state to save power, or in the case of a critical system
  102. * module, the ENABLED state.
  103. *
  104. * OMAP core integration code can then call omap_hwmod*() functions
  105. * directly to move the module between the IDLE, ENABLED, and DISABLED
  106. * states, as needed. This is done during both the PM idle loop, and
  107. * in the OMAP core integration code's implementation of the PM runtime
  108. * functions.
  109. *
  110. * References
  111. * ----------
  112. * This is a partial list.
  113. * - OMAP2420 Multimedia Processor Silicon Revision 2.1.1, 2.2 (SWPU064)
  114. * - OMAP2430 Multimedia Device POP Silicon Revision 2.1 (SWPU090)
  115. * - OMAP34xx Multimedia Device Silicon Revision 3.1 (SWPU108)
  116. * - OMAP4430 Multimedia Device Silicon Revision 1.0 (SWPU140)
  117. * - Open Core Protocol Specification 2.2
  118. *
  119. * To do:
  120. * - handle IO mapping
  121. * - bus throughput & module latency measurement code
  122. *
  123. * XXX add tests at the beginning of each function to ensure the hwmod is
  124. * in the appropriate state
  125. * XXX error return values should be checked to ensure that they are
  126. * appropriate
  127. */
  128. #undef DEBUG
  129. #include <linux/kernel.h>
  130. #include <linux/errno.h>
  131. #include <linux/io.h>
  132. #include <linux/clk.h>
  133. #include <linux/delay.h>
  134. #include <linux/err.h>
  135. #include <linux/list.h>
  136. #include <linux/mutex.h>
  137. #include <linux/spinlock.h>
  138. #include <plat/common.h>
  139. #include <plat/cpu.h>
  140. #include "clockdomain.h"
  141. #include "powerdomain.h"
  142. #include <plat/clock.h>
  143. #include <plat/omap_hwmod.h>
  144. #include <plat/prcm.h>
  145. #include "cm2xxx_3xxx.h"
  146. #include "cm44xx.h"
  147. #include "prm2xxx_3xxx.h"
  148. #include "prm44xx.h"
  149. #include "mux.h"
  150. /* Maximum microseconds to wait for OMAP module to softreset */
  151. #define MAX_MODULE_SOFTRESET_WAIT 10000
  152. /* Name of the OMAP hwmod for the MPU */
  153. #define MPU_INITIATOR_NAME "mpu"
  154. /* omap_hwmod_list contains all registered struct omap_hwmods */
  155. static LIST_HEAD(omap_hwmod_list);
  156. /* mpu_oh: used to add/remove MPU initiator from sleepdep list */
  157. static struct omap_hwmod *mpu_oh;
  158. /* Private functions */
  159. /**
  160. * _update_sysc_cache - return the module OCP_SYSCONFIG register, keep copy
  161. * @oh: struct omap_hwmod *
  162. *
  163. * Load the current value of the hwmod OCP_SYSCONFIG register into the
  164. * struct omap_hwmod for later use. Returns -EINVAL if the hwmod has no
  165. * OCP_SYSCONFIG register or 0 upon success.
  166. */
  167. static int _update_sysc_cache(struct omap_hwmod *oh)
  168. {
  169. if (!oh->class->sysc) {
  170. WARN(1, "omap_hwmod: %s: cannot read OCP_SYSCONFIG: not defined on hwmod's class\n", oh->name);
  171. return -EINVAL;
  172. }
  173. /* XXX ensure module interface clock is up */
  174. oh->_sysc_cache = omap_hwmod_read(oh, oh->class->sysc->sysc_offs);
  175. if (!(oh->class->sysc->sysc_flags & SYSC_NO_CACHE))
  176. oh->_int_flags |= _HWMOD_SYSCONFIG_LOADED;
  177. return 0;
  178. }
  179. /**
  180. * _write_sysconfig - write a value to the module's OCP_SYSCONFIG register
  181. * @v: OCP_SYSCONFIG value to write
  182. * @oh: struct omap_hwmod *
  183. *
  184. * Write @v into the module class' OCP_SYSCONFIG register, if it has
  185. * one. No return value.
  186. */
  187. static void _write_sysconfig(u32 v, struct omap_hwmod *oh)
  188. {
  189. if (!oh->class->sysc) {
  190. WARN(1, "omap_hwmod: %s: cannot write OCP_SYSCONFIG: not defined on hwmod's class\n", oh->name);
  191. return;
  192. }
  193. /* XXX ensure module interface clock is up */
  194. /* Module might have lost context, always update cache and register */
  195. oh->_sysc_cache = v;
  196. omap_hwmod_write(v, oh, oh->class->sysc->sysc_offs);
  197. }
  198. /**
  199. * _set_master_standbymode: set the OCP_SYSCONFIG MIDLEMODE field in @v
  200. * @oh: struct omap_hwmod *
  201. * @standbymode: MIDLEMODE field bits
  202. * @v: pointer to register contents to modify
  203. *
  204. * Update the master standby mode bits in @v to be @standbymode for
  205. * the @oh hwmod. Does not write to the hardware. Returns -EINVAL
  206. * upon error or 0 upon success.
  207. */
  208. static int _set_master_standbymode(struct omap_hwmod *oh, u8 standbymode,
  209. u32 *v)
  210. {
  211. u32 mstandby_mask;
  212. u8 mstandby_shift;
  213. if (!oh->class->sysc ||
  214. !(oh->class->sysc->sysc_flags & SYSC_HAS_MIDLEMODE))
  215. return -EINVAL;
  216. if (!oh->class->sysc->sysc_fields) {
  217. WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
  218. return -EINVAL;
  219. }
  220. mstandby_shift = oh->class->sysc->sysc_fields->midle_shift;
  221. mstandby_mask = (0x3 << mstandby_shift);
  222. *v &= ~mstandby_mask;
  223. *v |= __ffs(standbymode) << mstandby_shift;
  224. return 0;
  225. }
  226. /**
  227. * _set_slave_idlemode: set the OCP_SYSCONFIG SIDLEMODE field in @v
  228. * @oh: struct omap_hwmod *
  229. * @idlemode: SIDLEMODE field bits
  230. * @v: pointer to register contents to modify
  231. *
  232. * Update the slave idle mode bits in @v to be @idlemode for the @oh
  233. * hwmod. Does not write to the hardware. Returns -EINVAL upon error
  234. * or 0 upon success.
  235. */
  236. static int _set_slave_idlemode(struct omap_hwmod *oh, u8 idlemode, u32 *v)
  237. {
  238. u32 sidle_mask;
  239. u8 sidle_shift;
  240. if (!oh->class->sysc ||
  241. !(oh->class->sysc->sysc_flags & SYSC_HAS_SIDLEMODE))
  242. return -EINVAL;
  243. if (!oh->class->sysc->sysc_fields) {
  244. WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
  245. return -EINVAL;
  246. }
  247. sidle_shift = oh->class->sysc->sysc_fields->sidle_shift;
  248. sidle_mask = (0x3 << sidle_shift);
  249. *v &= ~sidle_mask;
  250. *v |= __ffs(idlemode) << sidle_shift;
  251. return 0;
  252. }
  253. /**
  254. * _set_clockactivity: set OCP_SYSCONFIG.CLOCKACTIVITY bits in @v
  255. * @oh: struct omap_hwmod *
  256. * @clockact: CLOCKACTIVITY field bits
  257. * @v: pointer to register contents to modify
  258. *
  259. * Update the clockactivity mode bits in @v to be @clockact for the
  260. * @oh hwmod. Used for additional powersaving on some modules. Does
  261. * not write to the hardware. Returns -EINVAL upon error or 0 upon
  262. * success.
  263. */
  264. static int _set_clockactivity(struct omap_hwmod *oh, u8 clockact, u32 *v)
  265. {
  266. u32 clkact_mask;
  267. u8 clkact_shift;
  268. if (!oh->class->sysc ||
  269. !(oh->class->sysc->sysc_flags & SYSC_HAS_CLOCKACTIVITY))
  270. return -EINVAL;
  271. if (!oh->class->sysc->sysc_fields) {
  272. WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
  273. return -EINVAL;
  274. }
  275. clkact_shift = oh->class->sysc->sysc_fields->clkact_shift;
  276. clkact_mask = (0x3 << clkact_shift);
  277. *v &= ~clkact_mask;
  278. *v |= clockact << clkact_shift;
  279. return 0;
  280. }
  281. /**
  282. * _set_softreset: set OCP_SYSCONFIG.CLOCKACTIVITY bits in @v
  283. * @oh: struct omap_hwmod *
  284. * @v: pointer to register contents to modify
  285. *
  286. * Set the SOFTRESET bit in @v for hwmod @oh. Returns -EINVAL upon
  287. * error or 0 upon success.
  288. */
  289. static int _set_softreset(struct omap_hwmod *oh, u32 *v)
  290. {
  291. u32 softrst_mask;
  292. if (!oh->class->sysc ||
  293. !(oh->class->sysc->sysc_flags & SYSC_HAS_SOFTRESET))
  294. return -EINVAL;
  295. if (!oh->class->sysc->sysc_fields) {
  296. WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
  297. return -EINVAL;
  298. }
  299. softrst_mask = (0x1 << oh->class->sysc->sysc_fields->srst_shift);
  300. *v |= softrst_mask;
  301. return 0;
  302. }
  303. /**
  304. * _set_module_autoidle: set the OCP_SYSCONFIG AUTOIDLE field in @v
  305. * @oh: struct omap_hwmod *
  306. * @autoidle: desired AUTOIDLE bitfield value (0 or 1)
  307. * @v: pointer to register contents to modify
  308. *
  309. * Update the module autoidle bit in @v to be @autoidle for the @oh
  310. * hwmod. The autoidle bit controls whether the module can gate
  311. * internal clocks automatically when it isn't doing anything; the
  312. * exact function of this bit varies on a per-module basis. This
  313. * function does not write to the hardware. Returns -EINVAL upon
  314. * error or 0 upon success.
  315. */
  316. static int _set_module_autoidle(struct omap_hwmod *oh, u8 autoidle,
  317. u32 *v)
  318. {
  319. u32 autoidle_mask;
  320. u8 autoidle_shift;
  321. if (!oh->class->sysc ||
  322. !(oh->class->sysc->sysc_flags & SYSC_HAS_AUTOIDLE))
  323. return -EINVAL;
  324. if (!oh->class->sysc->sysc_fields) {
  325. WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
  326. return -EINVAL;
  327. }
  328. autoidle_shift = oh->class->sysc->sysc_fields->autoidle_shift;
  329. autoidle_mask = (0x1 << autoidle_shift);
  330. *v &= ~autoidle_mask;
  331. *v |= autoidle << autoidle_shift;
  332. return 0;
  333. }
  334. /**
  335. * _enable_wakeup: set OCP_SYSCONFIG.ENAWAKEUP bit in the hardware
  336. * @oh: struct omap_hwmod *
  337. *
  338. * Allow the hardware module @oh to send wakeups. Returns -EINVAL
  339. * upon error or 0 upon success.
  340. */
  341. static int _enable_wakeup(struct omap_hwmod *oh, u32 *v)
  342. {
  343. u32 wakeup_mask;
  344. if (!oh->class->sysc ||
  345. !((oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP) ||
  346. (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP)))
  347. return -EINVAL;
  348. if (!oh->class->sysc->sysc_fields) {
  349. WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
  350. return -EINVAL;
  351. }
  352. wakeup_mask = (0x1 << oh->class->sysc->sysc_fields->enwkup_shift);
  353. *v |= wakeup_mask;
  354. if (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP)
  355. _set_slave_idlemode(oh, HWMOD_IDLEMODE_SMART_WKUP, v);
  356. /* XXX test pwrdm_get_wken for this hwmod's subsystem */
  357. oh->_int_flags |= _HWMOD_WAKEUP_ENABLED;
  358. return 0;
  359. }
  360. /**
  361. * _disable_wakeup: clear OCP_SYSCONFIG.ENAWAKEUP bit in the hardware
  362. * @oh: struct omap_hwmod *
  363. *
  364. * Prevent the hardware module @oh to send wakeups. Returns -EINVAL
  365. * upon error or 0 upon success.
  366. */
  367. static int _disable_wakeup(struct omap_hwmod *oh, u32 *v)
  368. {
  369. u32 wakeup_mask;
  370. if (!oh->class->sysc ||
  371. !((oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP) ||
  372. (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP)))
  373. return -EINVAL;
  374. if (!oh->class->sysc->sysc_fields) {
  375. WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
  376. return -EINVAL;
  377. }
  378. wakeup_mask = (0x1 << oh->class->sysc->sysc_fields->enwkup_shift);
  379. *v &= ~wakeup_mask;
  380. if (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP)
  381. _set_slave_idlemode(oh, HWMOD_IDLEMODE_SMART, v);
  382. /* XXX test pwrdm_get_wken for this hwmod's subsystem */
  383. oh->_int_flags &= ~_HWMOD_WAKEUP_ENABLED;
  384. return 0;
  385. }
  386. /**
  387. * _add_initiator_dep: prevent @oh from smart-idling while @init_oh is active
  388. * @oh: struct omap_hwmod *
  389. *
  390. * Prevent the hardware module @oh from entering idle while the
  391. * hardare module initiator @init_oh is active. Useful when a module
  392. * will be accessed by a particular initiator (e.g., if a module will
  393. * be accessed by the IVA, there should be a sleepdep between the IVA
  394. * initiator and the module). Only applies to modules in smart-idle
  395. * mode. If the clockdomain is marked as not needing autodeps, return
  396. * 0 without doing anything. Otherwise, returns -EINVAL upon error or
  397. * passes along clkdm_add_sleepdep() value upon success.
  398. */
  399. static int _add_initiator_dep(struct omap_hwmod *oh, struct omap_hwmod *init_oh)
  400. {
  401. if (!oh->_clk)
  402. return -EINVAL;
  403. if (oh->_clk->clkdm && oh->_clk->clkdm->flags & CLKDM_NO_AUTODEPS)
  404. return 0;
  405. return clkdm_add_sleepdep(oh->_clk->clkdm, init_oh->_clk->clkdm);
  406. }
  407. /**
  408. * _del_initiator_dep: allow @oh to smart-idle even if @init_oh is active
  409. * @oh: struct omap_hwmod *
  410. *
  411. * Allow the hardware module @oh to enter idle while the hardare
  412. * module initiator @init_oh is active. Useful when a module will not
  413. * be accessed by a particular initiator (e.g., if a module will not
  414. * be accessed by the IVA, there should be no sleepdep between the IVA
  415. * initiator and the module). Only applies to modules in smart-idle
  416. * mode. If the clockdomain is marked as not needing autodeps, return
  417. * 0 without doing anything. Returns -EINVAL upon error or passes
  418. * along clkdm_del_sleepdep() value upon success.
  419. */
  420. static int _del_initiator_dep(struct omap_hwmod *oh, struct omap_hwmod *init_oh)
  421. {
  422. if (!oh->_clk)
  423. return -EINVAL;
  424. if (oh->_clk->clkdm && oh->_clk->clkdm->flags & CLKDM_NO_AUTODEPS)
  425. return 0;
  426. return clkdm_del_sleepdep(oh->_clk->clkdm, init_oh->_clk->clkdm);
  427. }
  428. /**
  429. * _init_main_clk - get a struct clk * for the the hwmod's main functional clk
  430. * @oh: struct omap_hwmod *
  431. *
  432. * Called from _init_clocks(). Populates the @oh _clk (main
  433. * functional clock pointer) if a main_clk is present. Returns 0 on
  434. * success or -EINVAL on error.
  435. */
  436. static int _init_main_clk(struct omap_hwmod *oh)
  437. {
  438. int ret = 0;
  439. if (!oh->main_clk)
  440. return 0;
  441. oh->_clk = omap_clk_get_by_name(oh->main_clk);
  442. if (!oh->_clk) {
  443. pr_warning("omap_hwmod: %s: cannot clk_get main_clk %s\n",
  444. oh->name, oh->main_clk);
  445. return -EINVAL;
  446. }
  447. if (!oh->_clk->clkdm)
  448. pr_warning("omap_hwmod: %s: missing clockdomain for %s.\n",
  449. oh->main_clk, oh->_clk->name);
  450. return ret;
  451. }
  452. /**
  453. * _init_interface_clks - get a struct clk * for the the hwmod's interface clks
  454. * @oh: struct omap_hwmod *
  455. *
  456. * Called from _init_clocks(). Populates the @oh OCP slave interface
  457. * clock pointers. Returns 0 on success or -EINVAL on error.
  458. */
  459. static int _init_interface_clks(struct omap_hwmod *oh)
  460. {
  461. struct clk *c;
  462. int i;
  463. int ret = 0;
  464. if (oh->slaves_cnt == 0)
  465. return 0;
  466. for (i = 0; i < oh->slaves_cnt; i++) {
  467. struct omap_hwmod_ocp_if *os = oh->slaves[i];
  468. if (!os->clk)
  469. continue;
  470. c = omap_clk_get_by_name(os->clk);
  471. if (!c) {
  472. pr_warning("omap_hwmod: %s: cannot clk_get interface_clk %s\n",
  473. oh->name, os->clk);
  474. ret = -EINVAL;
  475. }
  476. os->_clk = c;
  477. }
  478. return ret;
  479. }
  480. /**
  481. * _init_opt_clk - get a struct clk * for the the hwmod's optional clocks
  482. * @oh: struct omap_hwmod *
  483. *
  484. * Called from _init_clocks(). Populates the @oh omap_hwmod_opt_clk
  485. * clock pointers. Returns 0 on success or -EINVAL on error.
  486. */
  487. static int _init_opt_clks(struct omap_hwmod *oh)
  488. {
  489. struct omap_hwmod_opt_clk *oc;
  490. struct clk *c;
  491. int i;
  492. int ret = 0;
  493. for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++) {
  494. c = omap_clk_get_by_name(oc->clk);
  495. if (!c) {
  496. pr_warning("omap_hwmod: %s: cannot clk_get opt_clk %s\n",
  497. oh->name, oc->clk);
  498. ret = -EINVAL;
  499. }
  500. oc->_clk = c;
  501. }
  502. return ret;
  503. }
  504. /**
  505. * _enable_clocks - enable hwmod main clock and interface clocks
  506. * @oh: struct omap_hwmod *
  507. *
  508. * Enables all clocks necessary for register reads and writes to succeed
  509. * on the hwmod @oh. Returns 0.
  510. */
  511. static int _enable_clocks(struct omap_hwmod *oh)
  512. {
  513. int i;
  514. pr_debug("omap_hwmod: %s: enabling clocks\n", oh->name);
  515. if (oh->_clk)
  516. clk_enable(oh->_clk);
  517. if (oh->slaves_cnt > 0) {
  518. for (i = 0; i < oh->slaves_cnt; i++) {
  519. struct omap_hwmod_ocp_if *os = oh->slaves[i];
  520. struct clk *c = os->_clk;
  521. if (c && (os->flags & OCPIF_SWSUP_IDLE))
  522. clk_enable(c);
  523. }
  524. }
  525. /* The opt clocks are controlled by the device driver. */
  526. return 0;
  527. }
  528. /**
  529. * _disable_clocks - disable hwmod main clock and interface clocks
  530. * @oh: struct omap_hwmod *
  531. *
  532. * Disables the hwmod @oh main functional and interface clocks. Returns 0.
  533. */
  534. static int _disable_clocks(struct omap_hwmod *oh)
  535. {
  536. int i;
  537. pr_debug("omap_hwmod: %s: disabling clocks\n", oh->name);
  538. if (oh->_clk)
  539. clk_disable(oh->_clk);
  540. if (oh->slaves_cnt > 0) {
  541. for (i = 0; i < oh->slaves_cnt; i++) {
  542. struct omap_hwmod_ocp_if *os = oh->slaves[i];
  543. struct clk *c = os->_clk;
  544. if (c && (os->flags & OCPIF_SWSUP_IDLE))
  545. clk_disable(c);
  546. }
  547. }
  548. /* The opt clocks are controlled by the device driver. */
  549. return 0;
  550. }
  551. static void _enable_optional_clocks(struct omap_hwmod *oh)
  552. {
  553. struct omap_hwmod_opt_clk *oc;
  554. int i;
  555. pr_debug("omap_hwmod: %s: enabling optional clocks\n", oh->name);
  556. for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++)
  557. if (oc->_clk) {
  558. pr_debug("omap_hwmod: enable %s:%s\n", oc->role,
  559. oc->_clk->name);
  560. clk_enable(oc->_clk);
  561. }
  562. }
  563. static void _disable_optional_clocks(struct omap_hwmod *oh)
  564. {
  565. struct omap_hwmod_opt_clk *oc;
  566. int i;
  567. pr_debug("omap_hwmod: %s: disabling optional clocks\n", oh->name);
  568. for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++)
  569. if (oc->_clk) {
  570. pr_debug("omap_hwmod: disable %s:%s\n", oc->role,
  571. oc->_clk->name);
  572. clk_disable(oc->_clk);
  573. }
  574. }
  575. /**
  576. * _count_mpu_irqs - count the number of MPU IRQ lines associated with @oh
  577. * @oh: struct omap_hwmod *oh
  578. *
  579. * Count and return the number of MPU IRQs associated with the hwmod
  580. * @oh. Used to allocate struct resource data. Returns 0 if @oh is
  581. * NULL.
  582. */
  583. static int _count_mpu_irqs(struct omap_hwmod *oh)
  584. {
  585. struct omap_hwmod_irq_info *ohii;
  586. int i = 0;
  587. if (!oh || !oh->mpu_irqs)
  588. return 0;
  589. do {
  590. ohii = &oh->mpu_irqs[i++];
  591. } while (ohii->irq != -1);
  592. return i;
  593. }
  594. /**
  595. * _count_ocp_if_addr_spaces - count the number of address space entries for @oh
  596. * @oh: struct omap_hwmod *oh
  597. *
  598. * Count and return the number of address space ranges associated with
  599. * the hwmod @oh. Used to allocate struct resource data. Returns 0
  600. * if @oh is NULL.
  601. */
  602. static int _count_ocp_if_addr_spaces(struct omap_hwmod_ocp_if *os)
  603. {
  604. struct omap_hwmod_addr_space *mem;
  605. int i = 0;
  606. if (!os || !os->addr)
  607. return 0;
  608. do {
  609. mem = &os->addr[i++];
  610. } while (mem->pa_start != mem->pa_end);
  611. return i;
  612. }
  613. /**
  614. * _find_mpu_port_index - find hwmod OCP slave port ID intended for MPU use
  615. * @oh: struct omap_hwmod *
  616. *
  617. * Returns the array index of the OCP slave port that the MPU
  618. * addresses the device on, or -EINVAL upon error or not found.
  619. */
  620. static int __init _find_mpu_port_index(struct omap_hwmod *oh)
  621. {
  622. int i;
  623. int found = 0;
  624. if (!oh || oh->slaves_cnt == 0)
  625. return -EINVAL;
  626. for (i = 0; i < oh->slaves_cnt; i++) {
  627. struct omap_hwmod_ocp_if *os = oh->slaves[i];
  628. if (os->user & OCP_USER_MPU) {
  629. found = 1;
  630. break;
  631. }
  632. }
  633. if (found)
  634. pr_debug("omap_hwmod: %s: MPU OCP slave port ID %d\n",
  635. oh->name, i);
  636. else
  637. pr_debug("omap_hwmod: %s: no MPU OCP slave port found\n",
  638. oh->name);
  639. return (found) ? i : -EINVAL;
  640. }
  641. /**
  642. * _find_mpu_rt_base - find hwmod register target base addr accessible by MPU
  643. * @oh: struct omap_hwmod *
  644. *
  645. * Return the virtual address of the base of the register target of
  646. * device @oh, or NULL on error.
  647. */
  648. static void __iomem * __init _find_mpu_rt_base(struct omap_hwmod *oh, u8 index)
  649. {
  650. struct omap_hwmod_ocp_if *os;
  651. struct omap_hwmod_addr_space *mem;
  652. int i = 0, found = 0;
  653. void __iomem *va_start;
  654. if (!oh || oh->slaves_cnt == 0)
  655. return NULL;
  656. os = oh->slaves[index];
  657. if (!os->addr)
  658. return NULL;
  659. do {
  660. mem = &os->addr[i++];
  661. if (mem->flags & ADDR_TYPE_RT)
  662. found = 1;
  663. } while (!found && mem->pa_start != mem->pa_end);
  664. if (found) {
  665. va_start = ioremap(mem->pa_start, mem->pa_end - mem->pa_start);
  666. if (!va_start) {
  667. pr_err("omap_hwmod: %s: Could not ioremap\n", oh->name);
  668. return NULL;
  669. }
  670. pr_debug("omap_hwmod: %s: MPU register target at va %p\n",
  671. oh->name, va_start);
  672. } else {
  673. pr_debug("omap_hwmod: %s: no MPU register target found\n",
  674. oh->name);
  675. }
  676. return (found) ? va_start : NULL;
  677. }
  678. /**
  679. * _enable_sysc - try to bring a module out of idle via OCP_SYSCONFIG
  680. * @oh: struct omap_hwmod *
  681. *
  682. * If module is marked as SWSUP_SIDLE, force the module out of slave
  683. * idle; otherwise, configure it for smart-idle. If module is marked
  684. * as SWSUP_MSUSPEND, force the module out of master standby;
  685. * otherwise, configure it for smart-standby. No return value.
  686. */
  687. static void _enable_sysc(struct omap_hwmod *oh)
  688. {
  689. u8 idlemode, sf;
  690. u32 v;
  691. if (!oh->class->sysc)
  692. return;
  693. v = oh->_sysc_cache;
  694. sf = oh->class->sysc->sysc_flags;
  695. if (sf & SYSC_HAS_SIDLEMODE) {
  696. idlemode = (oh->flags & HWMOD_SWSUP_SIDLE) ?
  697. HWMOD_IDLEMODE_NO : HWMOD_IDLEMODE_SMART;
  698. _set_slave_idlemode(oh, idlemode, &v);
  699. }
  700. if (sf & SYSC_HAS_MIDLEMODE) {
  701. idlemode = (oh->flags & HWMOD_SWSUP_MSTANDBY) ?
  702. HWMOD_IDLEMODE_NO : HWMOD_IDLEMODE_SMART;
  703. _set_master_standbymode(oh, idlemode, &v);
  704. }
  705. /*
  706. * XXX The clock framework should handle this, by
  707. * calling into this code. But this must wait until the
  708. * clock structures are tagged with omap_hwmod entries
  709. */
  710. if ((oh->flags & HWMOD_SET_DEFAULT_CLOCKACT) &&
  711. (sf & SYSC_HAS_CLOCKACTIVITY))
  712. _set_clockactivity(oh, oh->class->sysc->clockact, &v);
  713. /* If slave is in SMARTIDLE, also enable wakeup */
  714. if ((sf & SYSC_HAS_SIDLEMODE) && !(oh->flags & HWMOD_SWSUP_SIDLE))
  715. _enable_wakeup(oh, &v);
  716. _write_sysconfig(v, oh);
  717. /*
  718. * Set the autoidle bit only after setting the smartidle bit
  719. * Setting this will not have any impact on the other modules.
  720. */
  721. if (sf & SYSC_HAS_AUTOIDLE) {
  722. idlemode = (oh->flags & HWMOD_NO_OCP_AUTOIDLE) ?
  723. 0 : 1;
  724. _set_module_autoidle(oh, idlemode, &v);
  725. _write_sysconfig(v, oh);
  726. }
  727. }
  728. /**
  729. * _idle_sysc - try to put a module into idle via OCP_SYSCONFIG
  730. * @oh: struct omap_hwmod *
  731. *
  732. * If module is marked as SWSUP_SIDLE, force the module into slave
  733. * idle; otherwise, configure it for smart-idle. If module is marked
  734. * as SWSUP_MSUSPEND, force the module into master standby; otherwise,
  735. * configure it for smart-standby. No return value.
  736. */
  737. static void _idle_sysc(struct omap_hwmod *oh)
  738. {
  739. u8 idlemode, sf;
  740. u32 v;
  741. if (!oh->class->sysc)
  742. return;
  743. v = oh->_sysc_cache;
  744. sf = oh->class->sysc->sysc_flags;
  745. if (sf & SYSC_HAS_SIDLEMODE) {
  746. idlemode = (oh->flags & HWMOD_SWSUP_SIDLE) ?
  747. HWMOD_IDLEMODE_FORCE : HWMOD_IDLEMODE_SMART;
  748. _set_slave_idlemode(oh, idlemode, &v);
  749. }
  750. if (sf & SYSC_HAS_MIDLEMODE) {
  751. idlemode = (oh->flags & HWMOD_SWSUP_MSTANDBY) ?
  752. HWMOD_IDLEMODE_FORCE : HWMOD_IDLEMODE_SMART;
  753. _set_master_standbymode(oh, idlemode, &v);
  754. }
  755. /* If slave is in SMARTIDLE, also enable wakeup */
  756. if ((sf & SYSC_HAS_SIDLEMODE) && !(oh->flags & HWMOD_SWSUP_SIDLE))
  757. _enable_wakeup(oh, &v);
  758. _write_sysconfig(v, oh);
  759. }
  760. /**
  761. * _shutdown_sysc - force a module into idle via OCP_SYSCONFIG
  762. * @oh: struct omap_hwmod *
  763. *
  764. * Force the module into slave idle and master suspend. No return
  765. * value.
  766. */
  767. static void _shutdown_sysc(struct omap_hwmod *oh)
  768. {
  769. u32 v;
  770. u8 sf;
  771. if (!oh->class->sysc)
  772. return;
  773. v = oh->_sysc_cache;
  774. sf = oh->class->sysc->sysc_flags;
  775. if (sf & SYSC_HAS_SIDLEMODE)
  776. _set_slave_idlemode(oh, HWMOD_IDLEMODE_FORCE, &v);
  777. if (sf & SYSC_HAS_MIDLEMODE)
  778. _set_master_standbymode(oh, HWMOD_IDLEMODE_FORCE, &v);
  779. if (sf & SYSC_HAS_AUTOIDLE)
  780. _set_module_autoidle(oh, 1, &v);
  781. _write_sysconfig(v, oh);
  782. }
  783. /**
  784. * _lookup - find an omap_hwmod by name
  785. * @name: find an omap_hwmod by name
  786. *
  787. * Return a pointer to an omap_hwmod by name, or NULL if not found.
  788. */
  789. static struct omap_hwmod *_lookup(const char *name)
  790. {
  791. struct omap_hwmod *oh, *temp_oh;
  792. oh = NULL;
  793. list_for_each_entry(temp_oh, &omap_hwmod_list, node) {
  794. if (!strcmp(name, temp_oh->name)) {
  795. oh = temp_oh;
  796. break;
  797. }
  798. }
  799. return oh;
  800. }
  801. /**
  802. * _init_clocks - clk_get() all clocks associated with this hwmod
  803. * @oh: struct omap_hwmod *
  804. * @data: not used; pass NULL
  805. *
  806. * Called by omap_hwmod_setup_*() (after omap2_clk_init()).
  807. * Resolves all clock names embedded in the hwmod. Returns 0 on
  808. * success, or a negative error code on failure.
  809. */
  810. static int _init_clocks(struct omap_hwmod *oh, void *data)
  811. {
  812. int ret = 0;
  813. if (oh->_state != _HWMOD_STATE_REGISTERED)
  814. return 0;
  815. pr_debug("omap_hwmod: %s: looking up clocks\n", oh->name);
  816. ret |= _init_main_clk(oh);
  817. ret |= _init_interface_clks(oh);
  818. ret |= _init_opt_clks(oh);
  819. if (!ret)
  820. oh->_state = _HWMOD_STATE_CLKS_INITED;
  821. return ret;
  822. }
  823. /**
  824. * _wait_target_ready - wait for a module to leave slave idle
  825. * @oh: struct omap_hwmod *
  826. *
  827. * Wait for a module @oh to leave slave idle. Returns 0 if the module
  828. * does not have an IDLEST bit or if the module successfully leaves
  829. * slave idle; otherwise, pass along the return value of the
  830. * appropriate *_cm_wait_module_ready() function.
  831. */
  832. static int _wait_target_ready(struct omap_hwmod *oh)
  833. {
  834. struct omap_hwmod_ocp_if *os;
  835. int ret;
  836. if (!oh)
  837. return -EINVAL;
  838. if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
  839. return 0;
  840. os = oh->slaves[oh->_mpu_port_index];
  841. if (oh->flags & HWMOD_NO_IDLEST)
  842. return 0;
  843. /* XXX check module SIDLEMODE */
  844. /* XXX check clock enable states */
  845. if (cpu_is_omap24xx() || cpu_is_omap34xx()) {
  846. ret = omap2_cm_wait_module_ready(oh->prcm.omap2.module_offs,
  847. oh->prcm.omap2.idlest_reg_id,
  848. oh->prcm.omap2.idlest_idle_bit);
  849. } else if (cpu_is_omap44xx()) {
  850. ret = omap4_cm_wait_module_ready(oh->prcm.omap4.clkctrl_reg);
  851. } else {
  852. BUG();
  853. };
  854. return ret;
  855. }
  856. /**
  857. * _lookup_hardreset - fill register bit info for this hwmod/reset line
  858. * @oh: struct omap_hwmod *
  859. * @name: name of the reset line in the context of this hwmod
  860. * @ohri: struct omap_hwmod_rst_info * that this function will fill in
  861. *
  862. * Return the bit position of the reset line that match the
  863. * input name. Return -ENOENT if not found.
  864. */
  865. static u8 _lookup_hardreset(struct omap_hwmod *oh, const char *name,
  866. struct omap_hwmod_rst_info *ohri)
  867. {
  868. int i;
  869. for (i = 0; i < oh->rst_lines_cnt; i++) {
  870. const char *rst_line = oh->rst_lines[i].name;
  871. if (!strcmp(rst_line, name)) {
  872. ohri->rst_shift = oh->rst_lines[i].rst_shift;
  873. ohri->st_shift = oh->rst_lines[i].st_shift;
  874. pr_debug("omap_hwmod: %s: %s: %s: rst %d st %d\n",
  875. oh->name, __func__, rst_line, ohri->rst_shift,
  876. ohri->st_shift);
  877. return 0;
  878. }
  879. }
  880. return -ENOENT;
  881. }
  882. /**
  883. * _assert_hardreset - assert the HW reset line of submodules
  884. * contained in the hwmod module.
  885. * @oh: struct omap_hwmod *
  886. * @name: name of the reset line to lookup and assert
  887. *
  888. * Some IP like dsp, ipu or iva contain processor that require
  889. * an HW reset line to be assert / deassert in order to enable fully
  890. * the IP.
  891. */
  892. static int _assert_hardreset(struct omap_hwmod *oh, const char *name)
  893. {
  894. struct omap_hwmod_rst_info ohri;
  895. u8 ret;
  896. if (!oh)
  897. return -EINVAL;
  898. ret = _lookup_hardreset(oh, name, &ohri);
  899. if (IS_ERR_VALUE(ret))
  900. return ret;
  901. if (cpu_is_omap24xx() || cpu_is_omap34xx())
  902. return omap2_prm_assert_hardreset(oh->prcm.omap2.module_offs,
  903. ohri.rst_shift);
  904. else if (cpu_is_omap44xx())
  905. return omap4_prm_assert_hardreset(oh->prcm.omap4.rstctrl_reg,
  906. ohri.rst_shift);
  907. else
  908. return -EINVAL;
  909. }
  910. /**
  911. * _deassert_hardreset - deassert the HW reset line of submodules contained
  912. * in the hwmod module.
  913. * @oh: struct omap_hwmod *
  914. * @name: name of the reset line to look up and deassert
  915. *
  916. * Some IP like dsp, ipu or iva contain processor that require
  917. * an HW reset line to be assert / deassert in order to enable fully
  918. * the IP.
  919. */
  920. static int _deassert_hardreset(struct omap_hwmod *oh, const char *name)
  921. {
  922. struct omap_hwmod_rst_info ohri;
  923. int ret;
  924. if (!oh)
  925. return -EINVAL;
  926. ret = _lookup_hardreset(oh, name, &ohri);
  927. if (IS_ERR_VALUE(ret))
  928. return ret;
  929. if (cpu_is_omap24xx() || cpu_is_omap34xx()) {
  930. ret = omap2_prm_deassert_hardreset(oh->prcm.omap2.module_offs,
  931. ohri.rst_shift,
  932. ohri.st_shift);
  933. } else if (cpu_is_omap44xx()) {
  934. if (ohri.st_shift)
  935. pr_err("omap_hwmod: %s: %s: hwmod data error: OMAP4 does not support st_shift\n",
  936. oh->name, name);
  937. ret = omap4_prm_deassert_hardreset(oh->prcm.omap4.rstctrl_reg,
  938. ohri.rst_shift);
  939. } else {
  940. return -EINVAL;
  941. }
  942. if (ret == -EBUSY)
  943. pr_warning("omap_hwmod: %s: failed to hardreset\n", oh->name);
  944. return ret;
  945. }
  946. /**
  947. * _read_hardreset - read the HW reset line state of submodules
  948. * contained in the hwmod module
  949. * @oh: struct omap_hwmod *
  950. * @name: name of the reset line to look up and read
  951. *
  952. * Return the state of the reset line.
  953. */
  954. static int _read_hardreset(struct omap_hwmod *oh, const char *name)
  955. {
  956. struct omap_hwmod_rst_info ohri;
  957. u8 ret;
  958. if (!oh)
  959. return -EINVAL;
  960. ret = _lookup_hardreset(oh, name, &ohri);
  961. if (IS_ERR_VALUE(ret))
  962. return ret;
  963. if (cpu_is_omap24xx() || cpu_is_omap34xx()) {
  964. return omap2_prm_is_hardreset_asserted(oh->prcm.omap2.module_offs,
  965. ohri.st_shift);
  966. } else if (cpu_is_omap44xx()) {
  967. return omap4_prm_is_hardreset_asserted(oh->prcm.omap4.rstctrl_reg,
  968. ohri.rst_shift);
  969. } else {
  970. return -EINVAL;
  971. }
  972. }
  973. /**
  974. * _ocp_softreset - reset an omap_hwmod via the OCP_SYSCONFIG bit
  975. * @oh: struct omap_hwmod *
  976. *
  977. * Resets an omap_hwmod @oh via the OCP_SYSCONFIG bit. hwmod must be
  978. * enabled for this to work. Returns -EINVAL if the hwmod cannot be
  979. * reset this way or if the hwmod is in the wrong state, -ETIMEDOUT if
  980. * the module did not reset in time, or 0 upon success.
  981. *
  982. * In OMAP3 a specific SYSSTATUS register is used to get the reset status.
  983. * Starting in OMAP4, some IPs do not have SYSSTATUS registers and instead
  984. * use the SYSCONFIG softreset bit to provide the status.
  985. *
  986. * Note that some IP like McBSP do have reset control but don't have
  987. * reset status.
  988. */
  989. static int _ocp_softreset(struct omap_hwmod *oh)
  990. {
  991. u32 v;
  992. int c = 0;
  993. int ret = 0;
  994. if (!oh->class->sysc ||
  995. !(oh->class->sysc->sysc_flags & SYSC_HAS_SOFTRESET))
  996. return -EINVAL;
  997. /* clocks must be on for this operation */
  998. if (oh->_state != _HWMOD_STATE_ENABLED) {
  999. pr_warning("omap_hwmod: %s: reset can only be entered from "
  1000. "enabled state\n", oh->name);
  1001. return -EINVAL;
  1002. }
  1003. /* For some modules, all optionnal clocks need to be enabled as well */
  1004. if (oh->flags & HWMOD_CONTROL_OPT_CLKS_IN_RESET)
  1005. _enable_optional_clocks(oh);
  1006. pr_debug("omap_hwmod: %s: resetting via OCP SOFTRESET\n", oh->name);
  1007. v = oh->_sysc_cache;
  1008. ret = _set_softreset(oh, &v);
  1009. if (ret)
  1010. goto dis_opt_clks;
  1011. _write_sysconfig(v, oh);
  1012. if (oh->class->sysc->sysc_flags & SYSS_HAS_RESET_STATUS)
  1013. omap_test_timeout((omap_hwmod_read(oh,
  1014. oh->class->sysc->syss_offs)
  1015. & SYSS_RESETDONE_MASK),
  1016. MAX_MODULE_SOFTRESET_WAIT, c);
  1017. else if (oh->class->sysc->sysc_flags & SYSC_HAS_RESET_STATUS)
  1018. omap_test_timeout(!(omap_hwmod_read(oh,
  1019. oh->class->sysc->sysc_offs)
  1020. & SYSC_TYPE2_SOFTRESET_MASK),
  1021. MAX_MODULE_SOFTRESET_WAIT, c);
  1022. if (c == MAX_MODULE_SOFTRESET_WAIT)
  1023. pr_warning("omap_hwmod: %s: softreset failed (waited %d usec)\n",
  1024. oh->name, MAX_MODULE_SOFTRESET_WAIT);
  1025. else
  1026. pr_debug("omap_hwmod: %s: softreset in %d usec\n", oh->name, c);
  1027. /*
  1028. * XXX add _HWMOD_STATE_WEDGED for modules that don't come back from
  1029. * _wait_target_ready() or _reset()
  1030. */
  1031. ret = (c == MAX_MODULE_SOFTRESET_WAIT) ? -ETIMEDOUT : 0;
  1032. dis_opt_clks:
  1033. if (oh->flags & HWMOD_CONTROL_OPT_CLKS_IN_RESET)
  1034. _disable_optional_clocks(oh);
  1035. return ret;
  1036. }
  1037. /**
  1038. * _reset - reset an omap_hwmod
  1039. * @oh: struct omap_hwmod *
  1040. *
  1041. * Resets an omap_hwmod @oh. The default software reset mechanism for
  1042. * most OMAP IP blocks is triggered via the OCP_SYSCONFIG.SOFTRESET
  1043. * bit. However, some hwmods cannot be reset via this method: some
  1044. * are not targets and therefore have no OCP header registers to
  1045. * access; others (like the IVA) have idiosyncratic reset sequences.
  1046. * So for these relatively rare cases, custom reset code can be
  1047. * supplied in the struct omap_hwmod_class .reset function pointer.
  1048. * Passes along the return value from either _reset() or the custom
  1049. * reset function - these must return -EINVAL if the hwmod cannot be
  1050. * reset this way or if the hwmod is in the wrong state, -ETIMEDOUT if
  1051. * the module did not reset in time, or 0 upon success.
  1052. */
  1053. static int _reset(struct omap_hwmod *oh)
  1054. {
  1055. int ret;
  1056. pr_debug("omap_hwmod: %s: resetting\n", oh->name);
  1057. ret = (oh->class->reset) ? oh->class->reset(oh) : _ocp_softreset(oh);
  1058. return ret;
  1059. }
  1060. /**
  1061. * _enable - enable an omap_hwmod
  1062. * @oh: struct omap_hwmod *
  1063. *
  1064. * Enables an omap_hwmod @oh such that the MPU can access the hwmod's
  1065. * register target. Returns -EINVAL if the hwmod is in the wrong
  1066. * state or passes along the return value of _wait_target_ready().
  1067. */
  1068. static int _enable(struct omap_hwmod *oh)
  1069. {
  1070. int r;
  1071. if (oh->_state != _HWMOD_STATE_INITIALIZED &&
  1072. oh->_state != _HWMOD_STATE_IDLE &&
  1073. oh->_state != _HWMOD_STATE_DISABLED) {
  1074. WARN(1, "omap_hwmod: %s: enabled state can only be entered "
  1075. "from initialized, idle, or disabled state\n", oh->name);
  1076. return -EINVAL;
  1077. }
  1078. pr_debug("omap_hwmod: %s: enabling\n", oh->name);
  1079. /*
  1080. * If an IP contains only one HW reset line, then de-assert it in order
  1081. * to allow to enable the clocks. Otherwise the PRCM will return
  1082. * Intransition status, and the init will failed.
  1083. */
  1084. if ((oh->_state == _HWMOD_STATE_INITIALIZED ||
  1085. oh->_state == _HWMOD_STATE_DISABLED) && oh->rst_lines_cnt == 1)
  1086. _deassert_hardreset(oh, oh->rst_lines[0].name);
  1087. /* Mux pins for device runtime if populated */
  1088. if (oh->mux && (!oh->mux->enabled ||
  1089. ((oh->_state == _HWMOD_STATE_IDLE) &&
  1090. oh->mux->pads_dynamic)))
  1091. omap_hwmod_mux(oh->mux, _HWMOD_STATE_ENABLED);
  1092. _add_initiator_dep(oh, mpu_oh);
  1093. _enable_clocks(oh);
  1094. r = _wait_target_ready(oh);
  1095. if (!r) {
  1096. oh->_state = _HWMOD_STATE_ENABLED;
  1097. /* Access the sysconfig only if the target is ready */
  1098. if (oh->class->sysc) {
  1099. if (!(oh->_int_flags & _HWMOD_SYSCONFIG_LOADED))
  1100. _update_sysc_cache(oh);
  1101. _enable_sysc(oh);
  1102. }
  1103. } else {
  1104. _disable_clocks(oh);
  1105. pr_debug("omap_hwmod: %s: _wait_target_ready: %d\n",
  1106. oh->name, r);
  1107. }
  1108. return r;
  1109. }
  1110. /**
  1111. * _idle - idle an omap_hwmod
  1112. * @oh: struct omap_hwmod *
  1113. *
  1114. * Idles an omap_hwmod @oh. This should be called once the hwmod has
  1115. * no further work. Returns -EINVAL if the hwmod is in the wrong
  1116. * state or returns 0.
  1117. */
  1118. static int _idle(struct omap_hwmod *oh)
  1119. {
  1120. if (oh->_state != _HWMOD_STATE_ENABLED) {
  1121. WARN(1, "omap_hwmod: %s: idle state can only be entered from "
  1122. "enabled state\n", oh->name);
  1123. return -EINVAL;
  1124. }
  1125. pr_debug("omap_hwmod: %s: idling\n", oh->name);
  1126. if (oh->class->sysc)
  1127. _idle_sysc(oh);
  1128. _del_initiator_dep(oh, mpu_oh);
  1129. _disable_clocks(oh);
  1130. /* Mux pins for device idle if populated */
  1131. if (oh->mux && oh->mux->pads_dynamic)
  1132. omap_hwmod_mux(oh->mux, _HWMOD_STATE_IDLE);
  1133. oh->_state = _HWMOD_STATE_IDLE;
  1134. return 0;
  1135. }
  1136. /**
  1137. * omap_hwmod_set_ocp_autoidle - set the hwmod's OCP autoidle bit
  1138. * @oh: struct omap_hwmod *
  1139. * @autoidle: desired AUTOIDLE bitfield value (0 or 1)
  1140. *
  1141. * Sets the IP block's OCP autoidle bit in hardware, and updates our
  1142. * local copy. Intended to be used by drivers that require
  1143. * direct manipulation of the AUTOIDLE bits.
  1144. * Returns -EINVAL if @oh is null or is not in the ENABLED state, or passes
  1145. * along the return value from _set_module_autoidle().
  1146. *
  1147. * Any users of this function should be scrutinized carefully.
  1148. */
  1149. int omap_hwmod_set_ocp_autoidle(struct omap_hwmod *oh, u8 autoidle)
  1150. {
  1151. u32 v;
  1152. int retval = 0;
  1153. unsigned long flags;
  1154. if (!oh || oh->_state != _HWMOD_STATE_ENABLED)
  1155. return -EINVAL;
  1156. spin_lock_irqsave(&oh->_lock, flags);
  1157. v = oh->_sysc_cache;
  1158. retval = _set_module_autoidle(oh, autoidle, &v);
  1159. if (!retval)
  1160. _write_sysconfig(v, oh);
  1161. spin_unlock_irqrestore(&oh->_lock, flags);
  1162. return retval;
  1163. }
  1164. /**
  1165. * _shutdown - shutdown an omap_hwmod
  1166. * @oh: struct omap_hwmod *
  1167. *
  1168. * Shut down an omap_hwmod @oh. This should be called when the driver
  1169. * used for the hwmod is removed or unloaded or if the driver is not
  1170. * used by the system. Returns -EINVAL if the hwmod is in the wrong
  1171. * state or returns 0.
  1172. */
  1173. static int _shutdown(struct omap_hwmod *oh)
  1174. {
  1175. int ret;
  1176. u8 prev_state;
  1177. if (oh->_state != _HWMOD_STATE_IDLE &&
  1178. oh->_state != _HWMOD_STATE_ENABLED) {
  1179. WARN(1, "omap_hwmod: %s: disabled state can only be entered "
  1180. "from idle, or enabled state\n", oh->name);
  1181. return -EINVAL;
  1182. }
  1183. pr_debug("omap_hwmod: %s: disabling\n", oh->name);
  1184. if (oh->class->pre_shutdown) {
  1185. prev_state = oh->_state;
  1186. if (oh->_state == _HWMOD_STATE_IDLE)
  1187. _enable(oh);
  1188. ret = oh->class->pre_shutdown(oh);
  1189. if (ret) {
  1190. if (prev_state == _HWMOD_STATE_IDLE)
  1191. _idle(oh);
  1192. return ret;
  1193. }
  1194. }
  1195. if (oh->class->sysc)
  1196. _shutdown_sysc(oh);
  1197. /*
  1198. * If an IP contains only one HW reset line, then assert it
  1199. * before disabling the clocks and shutting down the IP.
  1200. */
  1201. if (oh->rst_lines_cnt == 1)
  1202. _assert_hardreset(oh, oh->rst_lines[0].name);
  1203. /* clocks and deps are already disabled in idle */
  1204. if (oh->_state == _HWMOD_STATE_ENABLED) {
  1205. _del_initiator_dep(oh, mpu_oh);
  1206. /* XXX what about the other system initiators here? dma, dsp */
  1207. _disable_clocks(oh);
  1208. }
  1209. /* XXX Should this code also force-disable the optional clocks? */
  1210. /* Mux pins to safe mode or use populated off mode values */
  1211. if (oh->mux)
  1212. omap_hwmod_mux(oh->mux, _HWMOD_STATE_DISABLED);
  1213. oh->_state = _HWMOD_STATE_DISABLED;
  1214. return 0;
  1215. }
  1216. /**
  1217. * _setup - do initial configuration of omap_hwmod
  1218. * @oh: struct omap_hwmod *
  1219. *
  1220. * Writes the CLOCKACTIVITY bits @clockact to the hwmod @oh
  1221. * OCP_SYSCONFIG register. Returns 0.
  1222. */
  1223. static int _setup(struct omap_hwmod *oh, void *data)
  1224. {
  1225. int i, r;
  1226. u8 postsetup_state;
  1227. if (oh->_state != _HWMOD_STATE_CLKS_INITED)
  1228. return 0;
  1229. /* Set iclk autoidle mode */
  1230. if (oh->slaves_cnt > 0) {
  1231. for (i = 0; i < oh->slaves_cnt; i++) {
  1232. struct omap_hwmod_ocp_if *os = oh->slaves[i];
  1233. struct clk *c = os->_clk;
  1234. if (!c)
  1235. continue;
  1236. if (os->flags & OCPIF_SWSUP_IDLE) {
  1237. /* XXX omap_iclk_deny_idle(c); */
  1238. } else {
  1239. /* XXX omap_iclk_allow_idle(c); */
  1240. clk_enable(c);
  1241. }
  1242. }
  1243. }
  1244. oh->_state = _HWMOD_STATE_INITIALIZED;
  1245. /*
  1246. * In the case of hwmod with hardreset that should not be
  1247. * de-assert at boot time, we have to keep the module
  1248. * initialized, because we cannot enable it properly with the
  1249. * reset asserted. Exit without warning because that behavior is
  1250. * expected.
  1251. */
  1252. if ((oh->flags & HWMOD_INIT_NO_RESET) && oh->rst_lines_cnt == 1)
  1253. return 0;
  1254. r = _enable(oh);
  1255. if (r) {
  1256. pr_warning("omap_hwmod: %s: cannot be enabled (%d)\n",
  1257. oh->name, oh->_state);
  1258. return 0;
  1259. }
  1260. if (!(oh->flags & HWMOD_INIT_NO_RESET)) {
  1261. _reset(oh);
  1262. /*
  1263. * OCP_SYSCONFIG bits need to be reprogrammed after a softreset.
  1264. * The _enable() function should be split to
  1265. * avoid the rewrite of the OCP_SYSCONFIG register.
  1266. */
  1267. if (oh->class->sysc) {
  1268. _update_sysc_cache(oh);
  1269. _enable_sysc(oh);
  1270. }
  1271. }
  1272. postsetup_state = oh->_postsetup_state;
  1273. if (postsetup_state == _HWMOD_STATE_UNKNOWN)
  1274. postsetup_state = _HWMOD_STATE_ENABLED;
  1275. /*
  1276. * XXX HWMOD_INIT_NO_IDLE does not belong in hwmod data -
  1277. * it should be set by the core code as a runtime flag during startup
  1278. */
  1279. if ((oh->flags & HWMOD_INIT_NO_IDLE) &&
  1280. (postsetup_state == _HWMOD_STATE_IDLE))
  1281. postsetup_state = _HWMOD_STATE_ENABLED;
  1282. if (postsetup_state == _HWMOD_STATE_IDLE)
  1283. _idle(oh);
  1284. else if (postsetup_state == _HWMOD_STATE_DISABLED)
  1285. _shutdown(oh);
  1286. else if (postsetup_state != _HWMOD_STATE_ENABLED)
  1287. WARN(1, "hwmod: %s: unknown postsetup state %d! defaulting to enabled\n",
  1288. oh->name, postsetup_state);
  1289. return 0;
  1290. }
  1291. /**
  1292. * _register - register a struct omap_hwmod
  1293. * @oh: struct omap_hwmod *
  1294. *
  1295. * Registers the omap_hwmod @oh. Returns -EEXIST if an omap_hwmod
  1296. * already has been registered by the same name; -EINVAL if the
  1297. * omap_hwmod is in the wrong state, if @oh is NULL, if the
  1298. * omap_hwmod's class field is NULL; if the omap_hwmod is missing a
  1299. * name, or if the omap_hwmod's class is missing a name; or 0 upon
  1300. * success.
  1301. *
  1302. * XXX The data should be copied into bootmem, so the original data
  1303. * should be marked __initdata and freed after init. This would allow
  1304. * unneeded omap_hwmods to be freed on multi-OMAP configurations. Note
  1305. * that the copy process would be relatively complex due to the large number
  1306. * of substructures.
  1307. */
  1308. static int __init _register(struct omap_hwmod *oh)
  1309. {
  1310. int ms_id;
  1311. if (!oh || !oh->name || !oh->class || !oh->class->name ||
  1312. (oh->_state != _HWMOD_STATE_UNKNOWN))
  1313. return -EINVAL;
  1314. pr_debug("omap_hwmod: %s: registering\n", oh->name);
  1315. if (_lookup(oh->name))
  1316. return -EEXIST;
  1317. ms_id = _find_mpu_port_index(oh);
  1318. if (!IS_ERR_VALUE(ms_id))
  1319. oh->_mpu_port_index = ms_id;
  1320. else
  1321. oh->_int_flags |= _HWMOD_NO_MPU_PORT;
  1322. list_add_tail(&oh->node, &omap_hwmod_list);
  1323. spin_lock_init(&oh->_lock);
  1324. oh->_state = _HWMOD_STATE_REGISTERED;
  1325. /*
  1326. * XXX Rather than doing a strcmp(), this should test a flag
  1327. * set in the hwmod data, inserted by the autogenerator code.
  1328. */
  1329. if (!strcmp(oh->name, MPU_INITIATOR_NAME))
  1330. mpu_oh = oh;
  1331. return 0;
  1332. }
  1333. /* Public functions */
  1334. u32 omap_hwmod_read(struct omap_hwmod *oh, u16 reg_offs)
  1335. {
  1336. if (oh->flags & HWMOD_16BIT_REG)
  1337. return __raw_readw(oh->_mpu_rt_va + reg_offs);
  1338. else
  1339. return __raw_readl(oh->_mpu_rt_va + reg_offs);
  1340. }
  1341. void omap_hwmod_write(u32 v, struct omap_hwmod *oh, u16 reg_offs)
  1342. {
  1343. if (oh->flags & HWMOD_16BIT_REG)
  1344. __raw_writew(v, oh->_mpu_rt_va + reg_offs);
  1345. else
  1346. __raw_writel(v, oh->_mpu_rt_va + reg_offs);
  1347. }
  1348. /**
  1349. * omap_hwmod_set_slave_idlemode - set the hwmod's OCP slave idlemode
  1350. * @oh: struct omap_hwmod *
  1351. * @idlemode: SIDLEMODE field bits (shifted to bit 0)
  1352. *
  1353. * Sets the IP block's OCP slave idlemode in hardware, and updates our
  1354. * local copy. Intended to be used by drivers that have some erratum
  1355. * that requires direct manipulation of the SIDLEMODE bits. Returns
  1356. * -EINVAL if @oh is null, or passes along the return value from
  1357. * _set_slave_idlemode().
  1358. *
  1359. * XXX Does this function have any current users? If not, we should
  1360. * remove it; it is better to let the rest of the hwmod code handle this.
  1361. * Any users of this function should be scrutinized carefully.
  1362. */
  1363. int omap_hwmod_set_slave_idlemode(struct omap_hwmod *oh, u8 idlemode)
  1364. {
  1365. u32 v;
  1366. int retval = 0;
  1367. if (!oh)
  1368. return -EINVAL;
  1369. v = oh->_sysc_cache;
  1370. retval = _set_slave_idlemode(oh, idlemode, &v);
  1371. if (!retval)
  1372. _write_sysconfig(v, oh);
  1373. return retval;
  1374. }
  1375. /**
  1376. * omap_hwmod_lookup - look up a registered omap_hwmod by name
  1377. * @name: name of the omap_hwmod to look up
  1378. *
  1379. * Given a @name of an omap_hwmod, return a pointer to the registered
  1380. * struct omap_hwmod *, or NULL upon error.
  1381. */
  1382. struct omap_hwmod *omap_hwmod_lookup(const char *name)
  1383. {
  1384. struct omap_hwmod *oh;
  1385. if (!name)
  1386. return NULL;
  1387. oh = _lookup(name);
  1388. return oh;
  1389. }
  1390. /**
  1391. * omap_hwmod_for_each - call function for each registered omap_hwmod
  1392. * @fn: pointer to a callback function
  1393. * @data: void * data to pass to callback function
  1394. *
  1395. * Call @fn for each registered omap_hwmod, passing @data to each
  1396. * function. @fn must return 0 for success or any other value for
  1397. * failure. If @fn returns non-zero, the iteration across omap_hwmods
  1398. * will stop and the non-zero return value will be passed to the
  1399. * caller of omap_hwmod_for_each(). @fn is called with
  1400. * omap_hwmod_for_each() held.
  1401. */
  1402. int omap_hwmod_for_each(int (*fn)(struct omap_hwmod *oh, void *data),
  1403. void *data)
  1404. {
  1405. struct omap_hwmod *temp_oh;
  1406. int ret = 0;
  1407. if (!fn)
  1408. return -EINVAL;
  1409. list_for_each_entry(temp_oh, &omap_hwmod_list, node) {
  1410. ret = (*fn)(temp_oh, data);
  1411. if (ret)
  1412. break;
  1413. }
  1414. return ret;
  1415. }
  1416. /**
  1417. * omap_hwmod_register - register an array of hwmods
  1418. * @ohs: pointer to an array of omap_hwmods to register
  1419. *
  1420. * Intended to be called early in boot before the clock framework is
  1421. * initialized. If @ohs is not null, will register all omap_hwmods
  1422. * listed in @ohs that are valid for this chip. Returns 0.
  1423. */
  1424. int __init omap_hwmod_register(struct omap_hwmod **ohs)
  1425. {
  1426. int r, i;
  1427. if (!ohs)
  1428. return 0;
  1429. i = 0;
  1430. do {
  1431. if (!omap_chip_is(ohs[i]->omap_chip))
  1432. continue;
  1433. r = _register(ohs[i]);
  1434. WARN(r, "omap_hwmod: %s: _register returned %d\n", ohs[i]->name,
  1435. r);
  1436. } while (ohs[++i]);
  1437. return 0;
  1438. }
  1439. /*
  1440. * _populate_mpu_rt_base - populate the virtual address for a hwmod
  1441. *
  1442. * Must be called only from omap_hwmod_setup_*() so ioremap works properly.
  1443. * Assumes the caller takes care of locking if needed.
  1444. */
  1445. static int __init _populate_mpu_rt_base(struct omap_hwmod *oh, void *data)
  1446. {
  1447. if (oh->_state != _HWMOD_STATE_REGISTERED)
  1448. return 0;
  1449. if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
  1450. return 0;
  1451. oh->_mpu_rt_va = _find_mpu_rt_base(oh, oh->_mpu_port_index);
  1452. if (!oh->_mpu_rt_va)
  1453. pr_warning("omap_hwmod: %s found no _mpu_rt_va for %s\n",
  1454. __func__, oh->name);
  1455. return 0;
  1456. }
  1457. /**
  1458. * omap_hwmod_setup_one - set up a single hwmod
  1459. * @oh_name: const char * name of the already-registered hwmod to set up
  1460. *
  1461. * Must be called after omap2_clk_init(). Resolves the struct clk
  1462. * names to struct clk pointers for each registered omap_hwmod. Also
  1463. * calls _setup() on each hwmod. Returns -EINVAL upon error or 0 upon
  1464. * success.
  1465. */
  1466. int __init omap_hwmod_setup_one(const char *oh_name)
  1467. {
  1468. struct omap_hwmod *oh;
  1469. int r;
  1470. pr_debug("omap_hwmod: %s: %s\n", oh_name, __func__);
  1471. if (!mpu_oh) {
  1472. pr_err("omap_hwmod: %s: cannot setup_one: MPU initiator hwmod %s not yet registered\n",
  1473. oh_name, MPU_INITIATOR_NAME);
  1474. return -EINVAL;
  1475. }
  1476. oh = _lookup(oh_name);
  1477. if (!oh) {
  1478. WARN(1, "omap_hwmod: %s: hwmod not yet registered\n", oh_name);
  1479. return -EINVAL;
  1480. }
  1481. if (mpu_oh->_state == _HWMOD_STATE_REGISTERED && oh != mpu_oh)
  1482. omap_hwmod_setup_one(MPU_INITIATOR_NAME);
  1483. r = _populate_mpu_rt_base(oh, NULL);
  1484. if (IS_ERR_VALUE(r)) {
  1485. WARN(1, "omap_hwmod: %s: couldn't set mpu_rt_base\n", oh_name);
  1486. return -EINVAL;
  1487. }
  1488. r = _init_clocks(oh, NULL);
  1489. if (IS_ERR_VALUE(r)) {
  1490. WARN(1, "omap_hwmod: %s: couldn't init clocks\n", oh_name);
  1491. return -EINVAL;
  1492. }
  1493. _setup(oh, NULL);
  1494. return 0;
  1495. }
  1496. /**
  1497. * omap_hwmod_setup - do some post-clock framework initialization
  1498. *
  1499. * Must be called after omap2_clk_init(). Resolves the struct clk names
  1500. * to struct clk pointers for each registered omap_hwmod. Also calls
  1501. * _setup() on each hwmod. Returns 0 upon success.
  1502. */
  1503. static int __init omap_hwmod_setup_all(void)
  1504. {
  1505. int r;
  1506. if (!mpu_oh) {
  1507. pr_err("omap_hwmod: %s: MPU initiator hwmod %s not yet registered\n",
  1508. __func__, MPU_INITIATOR_NAME);
  1509. return -EINVAL;
  1510. }
  1511. r = omap_hwmod_for_each(_populate_mpu_rt_base, NULL);
  1512. r = omap_hwmod_for_each(_init_clocks, NULL);
  1513. WARN(IS_ERR_VALUE(r),
  1514. "omap_hwmod: %s: _init_clocks failed\n", __func__);
  1515. omap_hwmod_for_each(_setup, NULL);
  1516. return 0;
  1517. }
  1518. core_initcall(omap_hwmod_setup_all);
  1519. /**
  1520. * omap_hwmod_enable - enable an omap_hwmod
  1521. * @oh: struct omap_hwmod *
  1522. *
  1523. * Enable an omap_hwmod @oh. Intended to be called by omap_device_enable().
  1524. * Returns -EINVAL on error or passes along the return value from _enable().
  1525. */
  1526. int omap_hwmod_enable(struct omap_hwmod *oh)
  1527. {
  1528. int r;
  1529. unsigned long flags;
  1530. if (!oh)
  1531. return -EINVAL;
  1532. spin_lock_irqsave(&oh->_lock, flags);
  1533. r = _enable(oh);
  1534. spin_unlock_irqrestore(&oh->_lock, flags);
  1535. return r;
  1536. }
  1537. /**
  1538. * omap_hwmod_idle - idle an omap_hwmod
  1539. * @oh: struct omap_hwmod *
  1540. *
  1541. * Idle an omap_hwmod @oh. Intended to be called by omap_device_idle().
  1542. * Returns -EINVAL on error or passes along the return value from _idle().
  1543. */
  1544. int omap_hwmod_idle(struct omap_hwmod *oh)
  1545. {
  1546. unsigned long flags;
  1547. if (!oh)
  1548. return -EINVAL;
  1549. spin_lock_irqsave(&oh->_lock, flags);
  1550. _idle(oh);
  1551. spin_unlock_irqrestore(&oh->_lock, flags);
  1552. return 0;
  1553. }
  1554. /**
  1555. * omap_hwmod_shutdown - shutdown an omap_hwmod
  1556. * @oh: struct omap_hwmod *
  1557. *
  1558. * Shutdown an omap_hwmod @oh. Intended to be called by
  1559. * omap_device_shutdown(). Returns -EINVAL on error or passes along
  1560. * the return value from _shutdown().
  1561. */
  1562. int omap_hwmod_shutdown(struct omap_hwmod *oh)
  1563. {
  1564. unsigned long flags;
  1565. if (!oh)
  1566. return -EINVAL;
  1567. spin_lock_irqsave(&oh->_lock, flags);
  1568. _shutdown(oh);
  1569. spin_unlock_irqrestore(&oh->_lock, flags);
  1570. return 0;
  1571. }
  1572. /**
  1573. * omap_hwmod_enable_clocks - enable main_clk, all interface clocks
  1574. * @oh: struct omap_hwmod *oh
  1575. *
  1576. * Intended to be called by the omap_device code.
  1577. */
  1578. int omap_hwmod_enable_clocks(struct omap_hwmod *oh)
  1579. {
  1580. unsigned long flags;
  1581. spin_lock_irqsave(&oh->_lock, flags);
  1582. _enable_clocks(oh);
  1583. spin_unlock_irqrestore(&oh->_lock, flags);
  1584. return 0;
  1585. }
  1586. /**
  1587. * omap_hwmod_disable_clocks - disable main_clk, all interface clocks
  1588. * @oh: struct omap_hwmod *oh
  1589. *
  1590. * Intended to be called by the omap_device code.
  1591. */
  1592. int omap_hwmod_disable_clocks(struct omap_hwmod *oh)
  1593. {
  1594. unsigned long flags;
  1595. spin_lock_irqsave(&oh->_lock, flags);
  1596. _disable_clocks(oh);
  1597. spin_unlock_irqrestore(&oh->_lock, flags);
  1598. return 0;
  1599. }
  1600. /**
  1601. * omap_hwmod_ocp_barrier - wait for posted writes against the hwmod to complete
  1602. * @oh: struct omap_hwmod *oh
  1603. *
  1604. * Intended to be called by drivers and core code when all posted
  1605. * writes to a device must complete before continuing further
  1606. * execution (for example, after clearing some device IRQSTATUS
  1607. * register bits)
  1608. *
  1609. * XXX what about targets with multiple OCP threads?
  1610. */
  1611. void omap_hwmod_ocp_barrier(struct omap_hwmod *oh)
  1612. {
  1613. BUG_ON(!oh);
  1614. if (!oh->class->sysc || !oh->class->sysc->sysc_flags) {
  1615. WARN(1, "omap_device: %s: OCP barrier impossible due to "
  1616. "device configuration\n", oh->name);
  1617. return;
  1618. }
  1619. /*
  1620. * Forces posted writes to complete on the OCP thread handling
  1621. * register writes
  1622. */
  1623. omap_hwmod_read(oh, oh->class->sysc->sysc_offs);
  1624. }
  1625. /**
  1626. * omap_hwmod_reset - reset the hwmod
  1627. * @oh: struct omap_hwmod *
  1628. *
  1629. * Under some conditions, a driver may wish to reset the entire device.
  1630. * Called from omap_device code. Returns -EINVAL on error or passes along
  1631. * the return value from _reset().
  1632. */
  1633. int omap_hwmod_reset(struct omap_hwmod *oh)
  1634. {
  1635. int r;
  1636. unsigned long flags;
  1637. if (!oh)
  1638. return -EINVAL;
  1639. spin_lock_irqsave(&oh->_lock, flags);
  1640. r = _reset(oh);
  1641. spin_unlock_irqrestore(&oh->_lock, flags);
  1642. return r;
  1643. }
  1644. /**
  1645. * omap_hwmod_count_resources - count number of struct resources needed by hwmod
  1646. * @oh: struct omap_hwmod *
  1647. * @res: pointer to the first element of an array of struct resource to fill
  1648. *
  1649. * Count the number of struct resource array elements necessary to
  1650. * contain omap_hwmod @oh resources. Intended to be called by code
  1651. * that registers omap_devices. Intended to be used to determine the
  1652. * size of a dynamically-allocated struct resource array, before
  1653. * calling omap_hwmod_fill_resources(). Returns the number of struct
  1654. * resource array elements needed.
  1655. *
  1656. * XXX This code is not optimized. It could attempt to merge adjacent
  1657. * resource IDs.
  1658. *
  1659. */
  1660. int omap_hwmod_count_resources(struct omap_hwmod *oh)
  1661. {
  1662. int ret, i;
  1663. ret = _count_mpu_irqs(oh) + oh->sdma_reqs_cnt;
  1664. for (i = 0; i < oh->slaves_cnt; i++)
  1665. ret += _count_ocp_if_addr_spaces(oh->slaves[i]);
  1666. return ret;
  1667. }
  1668. /**
  1669. * omap_hwmod_fill_resources - fill struct resource array with hwmod data
  1670. * @oh: struct omap_hwmod *
  1671. * @res: pointer to the first element of an array of struct resource to fill
  1672. *
  1673. * Fill the struct resource array @res with resource data from the
  1674. * omap_hwmod @oh. Intended to be called by code that registers
  1675. * omap_devices. See also omap_hwmod_count_resources(). Returns the
  1676. * number of array elements filled.
  1677. */
  1678. int omap_hwmod_fill_resources(struct omap_hwmod *oh, struct resource *res)
  1679. {
  1680. int i, j, mpu_irqs_cnt;
  1681. int r = 0;
  1682. /* For each IRQ, DMA, memory area, fill in array.*/
  1683. mpu_irqs_cnt = _count_mpu_irqs(oh);
  1684. for (i = 0; i < mpu_irqs_cnt; i++) {
  1685. (res + r)->name = (oh->mpu_irqs + i)->name;
  1686. (res + r)->start = (oh->mpu_irqs + i)->irq;
  1687. (res + r)->end = (oh->mpu_irqs + i)->irq;
  1688. (res + r)->flags = IORESOURCE_IRQ;
  1689. r++;
  1690. }
  1691. for (i = 0; i < oh->sdma_reqs_cnt; i++) {
  1692. (res + r)->name = (oh->sdma_reqs + i)->name;
  1693. (res + r)->start = (oh->sdma_reqs + i)->dma_req;
  1694. (res + r)->end = (oh->sdma_reqs + i)->dma_req;
  1695. (res + r)->flags = IORESOURCE_DMA;
  1696. r++;
  1697. }
  1698. for (i = 0; i < oh->slaves_cnt; i++) {
  1699. struct omap_hwmod_ocp_if *os;
  1700. int addr_cnt;
  1701. os = oh->slaves[i];
  1702. addr_cnt = _count_ocp_if_addr_spaces(os);
  1703. for (j = 0; j < addr_cnt; j++) {
  1704. (res + r)->name = (os->addr + j)->name;
  1705. (res + r)->start = (os->addr + j)->pa_start;
  1706. (res + r)->end = (os->addr + j)->pa_end;
  1707. (res + r)->flags = IORESOURCE_MEM;
  1708. r++;
  1709. }
  1710. }
  1711. return r;
  1712. }
  1713. /**
  1714. * omap_hwmod_get_pwrdm - return pointer to this module's main powerdomain
  1715. * @oh: struct omap_hwmod *
  1716. *
  1717. * Return the powerdomain pointer associated with the OMAP module
  1718. * @oh's main clock. If @oh does not have a main clk, return the
  1719. * powerdomain associated with the interface clock associated with the
  1720. * module's MPU port. (XXX Perhaps this should use the SDMA port
  1721. * instead?) Returns NULL on error, or a struct powerdomain * on
  1722. * success.
  1723. */
  1724. struct powerdomain *omap_hwmod_get_pwrdm(struct omap_hwmod *oh)
  1725. {
  1726. struct clk *c;
  1727. if (!oh)
  1728. return NULL;
  1729. if (oh->_clk) {
  1730. c = oh->_clk;
  1731. } else {
  1732. if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
  1733. return NULL;
  1734. c = oh->slaves[oh->_mpu_port_index]->_clk;
  1735. }
  1736. if (!c->clkdm)
  1737. return NULL;
  1738. return c->clkdm->pwrdm.ptr;
  1739. }
  1740. /**
  1741. * omap_hwmod_get_mpu_rt_va - return the module's base address (for the MPU)
  1742. * @oh: struct omap_hwmod *
  1743. *
  1744. * Returns the virtual address corresponding to the beginning of the
  1745. * module's register target, in the address range that is intended to
  1746. * be used by the MPU. Returns the virtual address upon success or NULL
  1747. * upon error.
  1748. */
  1749. void __iomem *omap_hwmod_get_mpu_rt_va(struct omap_hwmod *oh)
  1750. {
  1751. if (!oh)
  1752. return NULL;
  1753. if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
  1754. return NULL;
  1755. if (oh->_state == _HWMOD_STATE_UNKNOWN)
  1756. return NULL;
  1757. return oh->_mpu_rt_va;
  1758. }
  1759. /**
  1760. * omap_hwmod_add_initiator_dep - add sleepdep from @init_oh to @oh
  1761. * @oh: struct omap_hwmod *
  1762. * @init_oh: struct omap_hwmod * (initiator)
  1763. *
  1764. * Add a sleep dependency between the initiator @init_oh and @oh.
  1765. * Intended to be called by DSP/Bridge code via platform_data for the
  1766. * DSP case; and by the DMA code in the sDMA case. DMA code, *Bridge
  1767. * code needs to add/del initiator dependencies dynamically
  1768. * before/after accessing a device. Returns the return value from
  1769. * _add_initiator_dep().
  1770. *
  1771. * XXX Keep a usecount in the clockdomain code
  1772. */
  1773. int omap_hwmod_add_initiator_dep(struct omap_hwmod *oh,
  1774. struct omap_hwmod *init_oh)
  1775. {
  1776. return _add_initiator_dep(oh, init_oh);
  1777. }
  1778. /*
  1779. * XXX what about functions for drivers to save/restore ocp_sysconfig
  1780. * for context save/restore operations?
  1781. */
  1782. /**
  1783. * omap_hwmod_del_initiator_dep - remove sleepdep from @init_oh to @oh
  1784. * @oh: struct omap_hwmod *
  1785. * @init_oh: struct omap_hwmod * (initiator)
  1786. *
  1787. * Remove a sleep dependency between the initiator @init_oh and @oh.
  1788. * Intended to be called by DSP/Bridge code via platform_data for the
  1789. * DSP case; and by the DMA code in the sDMA case. DMA code, *Bridge
  1790. * code needs to add/del initiator dependencies dynamically
  1791. * before/after accessing a device. Returns the return value from
  1792. * _del_initiator_dep().
  1793. *
  1794. * XXX Keep a usecount in the clockdomain code
  1795. */
  1796. int omap_hwmod_del_initiator_dep(struct omap_hwmod *oh,
  1797. struct omap_hwmod *init_oh)
  1798. {
  1799. return _del_initiator_dep(oh, init_oh);
  1800. }
  1801. /**
  1802. * omap_hwmod_enable_wakeup - allow device to wake up the system
  1803. * @oh: struct omap_hwmod *
  1804. *
  1805. * Sets the module OCP socket ENAWAKEUP bit to allow the module to
  1806. * send wakeups to the PRCM. Eventually this should sets PRCM wakeup
  1807. * registers to cause the PRCM to receive wakeup events from the
  1808. * module. Does not set any wakeup routing registers beyond this
  1809. * point - if the module is to wake up any other module or subsystem,
  1810. * that must be set separately. Called by omap_device code. Returns
  1811. * -EINVAL on error or 0 upon success.
  1812. */
  1813. int omap_hwmod_enable_wakeup(struct omap_hwmod *oh)
  1814. {
  1815. unsigned long flags;
  1816. u32 v;
  1817. if (!oh->class->sysc ||
  1818. !(oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP))
  1819. return -EINVAL;
  1820. spin_lock_irqsave(&oh->_lock, flags);
  1821. v = oh->_sysc_cache;
  1822. _enable_wakeup(oh, &v);
  1823. _write_sysconfig(v, oh);
  1824. spin_unlock_irqrestore(&oh->_lock, flags);
  1825. return 0;
  1826. }
  1827. /**
  1828. * omap_hwmod_disable_wakeup - prevent device from waking the system
  1829. * @oh: struct omap_hwmod *
  1830. *
  1831. * Clears the module OCP socket ENAWAKEUP bit to prevent the module
  1832. * from sending wakeups to the PRCM. Eventually this should clear
  1833. * PRCM wakeup registers to cause the PRCM to ignore wakeup events
  1834. * from the module. Does not set any wakeup routing registers beyond
  1835. * this point - if the module is to wake up any other module or
  1836. * subsystem, that must be set separately. Called by omap_device
  1837. * code. Returns -EINVAL on error or 0 upon success.
  1838. */
  1839. int omap_hwmod_disable_wakeup(struct omap_hwmod *oh)
  1840. {
  1841. unsigned long flags;
  1842. u32 v;
  1843. if (!oh->class->sysc ||
  1844. !(oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP))
  1845. return -EINVAL;
  1846. spin_lock_irqsave(&oh->_lock, flags);
  1847. v = oh->_sysc_cache;
  1848. _disable_wakeup(oh, &v);
  1849. _write_sysconfig(v, oh);
  1850. spin_unlock_irqrestore(&oh->_lock, flags);
  1851. return 0;
  1852. }
  1853. /**
  1854. * omap_hwmod_assert_hardreset - assert the HW reset line of submodules
  1855. * contained in the hwmod module.
  1856. * @oh: struct omap_hwmod *
  1857. * @name: name of the reset line to lookup and assert
  1858. *
  1859. * Some IP like dsp, ipu or iva contain processor that require
  1860. * an HW reset line to be assert / deassert in order to enable fully
  1861. * the IP. Returns -EINVAL if @oh is null or if the operation is not
  1862. * yet supported on this OMAP; otherwise, passes along the return value
  1863. * from _assert_hardreset().
  1864. */
  1865. int omap_hwmod_assert_hardreset(struct omap_hwmod *oh, const char *name)
  1866. {
  1867. int ret;
  1868. unsigned long flags;
  1869. if (!oh)
  1870. return -EINVAL;
  1871. spin_lock_irqsave(&oh->_lock, flags);
  1872. ret = _assert_hardreset(oh, name);
  1873. spin_unlock_irqrestore(&oh->_lock, flags);
  1874. return ret;
  1875. }
  1876. /**
  1877. * omap_hwmod_deassert_hardreset - deassert the HW reset line of submodules
  1878. * contained in the hwmod module.
  1879. * @oh: struct omap_hwmod *
  1880. * @name: name of the reset line to look up and deassert
  1881. *
  1882. * Some IP like dsp, ipu or iva contain processor that require
  1883. * an HW reset line to be assert / deassert in order to enable fully
  1884. * the IP. Returns -EINVAL if @oh is null or if the operation is not
  1885. * yet supported on this OMAP; otherwise, passes along the return value
  1886. * from _deassert_hardreset().
  1887. */
  1888. int omap_hwmod_deassert_hardreset(struct omap_hwmod *oh, const char *name)
  1889. {
  1890. int ret;
  1891. unsigned long flags;
  1892. if (!oh)
  1893. return -EINVAL;
  1894. spin_lock_irqsave(&oh->_lock, flags);
  1895. ret = _deassert_hardreset(oh, name);
  1896. spin_unlock_irqrestore(&oh->_lock, flags);
  1897. return ret;
  1898. }
  1899. /**
  1900. * omap_hwmod_read_hardreset - read the HW reset line state of submodules
  1901. * contained in the hwmod module
  1902. * @oh: struct omap_hwmod *
  1903. * @name: name of the reset line to look up and read
  1904. *
  1905. * Return the current state of the hwmod @oh's reset line named @name:
  1906. * returns -EINVAL upon parameter error or if this operation
  1907. * is unsupported on the current OMAP; otherwise, passes along the return
  1908. * value from _read_hardreset().
  1909. */
  1910. int omap_hwmod_read_hardreset(struct omap_hwmod *oh, const char *name)
  1911. {
  1912. int ret;
  1913. unsigned long flags;
  1914. if (!oh)
  1915. return -EINVAL;
  1916. spin_lock_irqsave(&oh->_lock, flags);
  1917. ret = _read_hardreset(oh, name);
  1918. spin_unlock_irqrestore(&oh->_lock, flags);
  1919. return ret;
  1920. }
  1921. /**
  1922. * omap_hwmod_for_each_by_class - call @fn for each hwmod of class @classname
  1923. * @classname: struct omap_hwmod_class name to search for
  1924. * @fn: callback function pointer to call for each hwmod in class @classname
  1925. * @user: arbitrary context data to pass to the callback function
  1926. *
  1927. * For each omap_hwmod of class @classname, call @fn.
  1928. * If the callback function returns something other than
  1929. * zero, the iterator is terminated, and the callback function's return
  1930. * value is passed back to the caller. Returns 0 upon success, -EINVAL
  1931. * if @classname or @fn are NULL, or passes back the error code from @fn.
  1932. */
  1933. int omap_hwmod_for_each_by_class(const char *classname,
  1934. int (*fn)(struct omap_hwmod *oh,
  1935. void *user),
  1936. void *user)
  1937. {
  1938. struct omap_hwmod *temp_oh;
  1939. int ret = 0;
  1940. if (!classname || !fn)
  1941. return -EINVAL;
  1942. pr_debug("omap_hwmod: %s: looking for modules of class %s\n",
  1943. __func__, classname);
  1944. list_for_each_entry(temp_oh, &omap_hwmod_list, node) {
  1945. if (!strcmp(temp_oh->class->name, classname)) {
  1946. pr_debug("omap_hwmod: %s: %s: calling callback fn\n",
  1947. __func__, temp_oh->name);
  1948. ret = (*fn)(temp_oh, user);
  1949. if (ret)
  1950. break;
  1951. }
  1952. }
  1953. if (ret)
  1954. pr_debug("omap_hwmod: %s: iterator terminated early: %d\n",
  1955. __func__, ret);
  1956. return ret;
  1957. }
  1958. /**
  1959. * omap_hwmod_set_postsetup_state - set the post-_setup() state for this hwmod
  1960. * @oh: struct omap_hwmod *
  1961. * @state: state that _setup() should leave the hwmod in
  1962. *
  1963. * Sets the hwmod state that @oh will enter at the end of _setup()
  1964. * (called by omap_hwmod_setup_*()). Only valid to call between
  1965. * calling omap_hwmod_register() and omap_hwmod_setup_*(). Returns
  1966. * 0 upon success or -EINVAL if there is a problem with the arguments
  1967. * or if the hwmod is in the wrong state.
  1968. */
  1969. int omap_hwmod_set_postsetup_state(struct omap_hwmod *oh, u8 state)
  1970. {
  1971. int ret;
  1972. unsigned long flags;
  1973. if (!oh)
  1974. return -EINVAL;
  1975. if (state != _HWMOD_STATE_DISABLED &&
  1976. state != _HWMOD_STATE_ENABLED &&
  1977. state != _HWMOD_STATE_IDLE)
  1978. return -EINVAL;
  1979. spin_lock_irqsave(&oh->_lock, flags);
  1980. if (oh->_state != _HWMOD_STATE_REGISTERED) {
  1981. ret = -EINVAL;
  1982. goto ohsps_unlock;
  1983. }
  1984. oh->_postsetup_state = state;
  1985. ret = 0;
  1986. ohsps_unlock:
  1987. spin_unlock_irqrestore(&oh->_lock, flags);
  1988. return ret;
  1989. }
  1990. /**
  1991. * omap_hwmod_get_context_loss_count - get lost context count
  1992. * @oh: struct omap_hwmod *
  1993. *
  1994. * Query the powerdomain of of @oh to get the context loss
  1995. * count for this device.
  1996. *
  1997. * Returns the context loss count of the powerdomain assocated with @oh
  1998. * upon success, or zero if no powerdomain exists for @oh.
  1999. */
  2000. u32 omap_hwmod_get_context_loss_count(struct omap_hwmod *oh)
  2001. {
  2002. struct powerdomain *pwrdm;
  2003. int ret = 0;
  2004. pwrdm = omap_hwmod_get_pwrdm(oh);
  2005. if (pwrdm)
  2006. ret = pwrdm_get_context_loss_count(pwrdm);
  2007. return ret;
  2008. }
  2009. /**
  2010. * omap_hwmod_no_setup_reset - prevent a hwmod from being reset upon setup
  2011. * @oh: struct omap_hwmod *
  2012. *
  2013. * Prevent the hwmod @oh from being reset during the setup process.
  2014. * Intended for use by board-*.c files on boards with devices that
  2015. * cannot tolerate being reset. Must be called before the hwmod has
  2016. * been set up. Returns 0 upon success or negative error code upon
  2017. * failure.
  2018. */
  2019. int omap_hwmod_no_setup_reset(struct omap_hwmod *oh)
  2020. {
  2021. if (!oh)
  2022. return -EINVAL;
  2023. if (oh->_state != _HWMOD_STATE_REGISTERED) {
  2024. pr_err("omap_hwmod: %s: cannot prevent setup reset; in wrong state\n",
  2025. oh->name);
  2026. return -EINVAL;
  2027. }
  2028. oh->flags |= HWMOD_INIT_NO_RESET;
  2029. return 0;
  2030. }