time.c 16 KB

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  1. /* $Id: time.c,v 1.60 2002/01/23 14:33:55 davem Exp $
  2. * linux/arch/sparc/kernel/time.c
  3. *
  4. * Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu)
  5. * Copyright (C) 1996 Thomas K. Dyas (tdyas@eden.rutgers.edu)
  6. *
  7. * Chris Davis (cdavis@cois.on.ca) 03/27/1998
  8. * Added support for the intersil on the sun4/4200
  9. *
  10. * Gleb Raiko (rajko@mech.math.msu.su) 08/18/1998
  11. * Support for MicroSPARC-IIep, PCI CPU.
  12. *
  13. * This file handles the Sparc specific time handling details.
  14. *
  15. * 1997-09-10 Updated NTP code according to technical memorandum Jan '96
  16. * "A Kernel Model for Precision Timekeeping" by Dave Mills
  17. */
  18. #include <linux/errno.h>
  19. #include <linux/module.h>
  20. #include <linux/sched.h>
  21. #include <linux/kernel.h>
  22. #include <linux/param.h>
  23. #include <linux/string.h>
  24. #include <linux/mm.h>
  25. #include <linux/interrupt.h>
  26. #include <linux/time.h>
  27. #include <linux/timex.h>
  28. #include <linux/init.h>
  29. #include <linux/pci.h>
  30. #include <linux/ioport.h>
  31. #include <linux/profile.h>
  32. #include <asm/oplib.h>
  33. #include <asm/timer.h>
  34. #include <asm/mostek.h>
  35. #include <asm/system.h>
  36. #include <asm/irq.h>
  37. #include <asm/io.h>
  38. #include <asm/idprom.h>
  39. #include <asm/machines.h>
  40. #include <asm/sun4paddr.h>
  41. #include <asm/page.h>
  42. #include <asm/pcic.h>
  43. #include <asm/of_device.h>
  44. extern unsigned long wall_jiffies;
  45. DEFINE_SPINLOCK(rtc_lock);
  46. enum sparc_clock_type sp_clock_typ;
  47. DEFINE_SPINLOCK(mostek_lock);
  48. void __iomem *mstk48t02_regs = NULL;
  49. static struct mostek48t08 __iomem *mstk48t08_regs = NULL;
  50. static int set_rtc_mmss(unsigned long);
  51. static int sbus_do_settimeofday(struct timespec *tv);
  52. #ifdef CONFIG_SUN4
  53. struct intersil *intersil_clock;
  54. #define intersil_cmd(intersil_reg, intsil_cmd) intersil_reg->int_cmd_reg = \
  55. (intsil_cmd)
  56. #define intersil_intr(intersil_reg, intsil_cmd) intersil_reg->int_intr_reg = \
  57. (intsil_cmd)
  58. #define intersil_start(intersil_reg) intersil_cmd(intersil_reg, \
  59. ( INTERSIL_START | INTERSIL_32K | INTERSIL_NORMAL | INTERSIL_24H |\
  60. INTERSIL_INTR_ENABLE))
  61. #define intersil_stop(intersil_reg) intersil_cmd(intersil_reg, \
  62. ( INTERSIL_STOP | INTERSIL_32K | INTERSIL_NORMAL | INTERSIL_24H |\
  63. INTERSIL_INTR_ENABLE))
  64. #define intersil_read_intr(intersil_reg, towhere) towhere = \
  65. intersil_reg->int_intr_reg
  66. #endif
  67. unsigned long profile_pc(struct pt_regs *regs)
  68. {
  69. extern char __copy_user_begin[], __copy_user_end[];
  70. extern char __atomic_begin[], __atomic_end[];
  71. extern char __bzero_begin[], __bzero_end[];
  72. extern char __bitops_begin[], __bitops_end[];
  73. unsigned long pc = regs->pc;
  74. if (in_lock_functions(pc) ||
  75. (pc >= (unsigned long) __copy_user_begin &&
  76. pc < (unsigned long) __copy_user_end) ||
  77. (pc >= (unsigned long) __atomic_begin &&
  78. pc < (unsigned long) __atomic_end) ||
  79. (pc >= (unsigned long) __bzero_begin &&
  80. pc < (unsigned long) __bzero_end) ||
  81. (pc >= (unsigned long) __bitops_begin &&
  82. pc < (unsigned long) __bitops_end))
  83. pc = regs->u_regs[UREG_RETPC];
  84. return pc;
  85. }
  86. __volatile__ unsigned int *master_l10_counter;
  87. __volatile__ unsigned int *master_l10_limit;
  88. /*
  89. * timer_interrupt() needs to keep up the real-time clock,
  90. * as well as call the "do_timer()" routine every clocktick
  91. */
  92. #define TICK_SIZE (tick_nsec / 1000)
  93. irqreturn_t timer_interrupt(int irq, void *dev_id, struct pt_regs * regs)
  94. {
  95. /* last time the cmos clock got updated */
  96. static long last_rtc_update;
  97. #ifndef CONFIG_SMP
  98. profile_tick(CPU_PROFILING, regs);
  99. #endif
  100. /* Protect counter clear so that do_gettimeoffset works */
  101. write_seqlock(&xtime_lock);
  102. #ifdef CONFIG_SUN4
  103. if((idprom->id_machtype == (SM_SUN4 | SM_4_260)) ||
  104. (idprom->id_machtype == (SM_SUN4 | SM_4_110))) {
  105. int temp;
  106. intersil_read_intr(intersil_clock, temp);
  107. /* re-enable the irq */
  108. enable_pil_irq(10);
  109. }
  110. #endif
  111. clear_clock_irq();
  112. do_timer(regs);
  113. #ifndef CONFIG_SMP
  114. update_process_times(user_mode(regs));
  115. #endif
  116. /* Determine when to update the Mostek clock. */
  117. if (ntp_synced() &&
  118. xtime.tv_sec > last_rtc_update + 660 &&
  119. (xtime.tv_nsec / 1000) >= 500000 - ((unsigned) TICK_SIZE) / 2 &&
  120. (xtime.tv_nsec / 1000) <= 500000 + ((unsigned) TICK_SIZE) / 2) {
  121. if (set_rtc_mmss(xtime.tv_sec) == 0)
  122. last_rtc_update = xtime.tv_sec;
  123. else
  124. last_rtc_update = xtime.tv_sec - 600; /* do it again in 60 s */
  125. }
  126. write_sequnlock(&xtime_lock);
  127. return IRQ_HANDLED;
  128. }
  129. /* Kick start a stopped clock (procedure from the Sun NVRAM/hostid FAQ). */
  130. static void __init kick_start_clock(void)
  131. {
  132. struct mostek48t02 *regs = (struct mostek48t02 *)mstk48t02_regs;
  133. unsigned char sec;
  134. int i, count;
  135. prom_printf("CLOCK: Clock was stopped. Kick start ");
  136. spin_lock_irq(&mostek_lock);
  137. /* Turn on the kick start bit to start the oscillator. */
  138. regs->creg |= MSTK_CREG_WRITE;
  139. regs->sec &= ~MSTK_STOP;
  140. regs->hour |= MSTK_KICK_START;
  141. regs->creg &= ~MSTK_CREG_WRITE;
  142. spin_unlock_irq(&mostek_lock);
  143. /* Delay to allow the clock oscillator to start. */
  144. sec = MSTK_REG_SEC(regs);
  145. for (i = 0; i < 3; i++) {
  146. while (sec == MSTK_REG_SEC(regs))
  147. for (count = 0; count < 100000; count++)
  148. /* nothing */ ;
  149. prom_printf(".");
  150. sec = regs->sec;
  151. }
  152. prom_printf("\n");
  153. spin_lock_irq(&mostek_lock);
  154. /* Turn off kick start and set a "valid" time and date. */
  155. regs->creg |= MSTK_CREG_WRITE;
  156. regs->hour &= ~MSTK_KICK_START;
  157. MSTK_SET_REG_SEC(regs,0);
  158. MSTK_SET_REG_MIN(regs,0);
  159. MSTK_SET_REG_HOUR(regs,0);
  160. MSTK_SET_REG_DOW(regs,5);
  161. MSTK_SET_REG_DOM(regs,1);
  162. MSTK_SET_REG_MONTH(regs,8);
  163. MSTK_SET_REG_YEAR(regs,1996 - MSTK_YEAR_ZERO);
  164. regs->creg &= ~MSTK_CREG_WRITE;
  165. spin_unlock_irq(&mostek_lock);
  166. /* Ensure the kick start bit is off. If it isn't, turn it off. */
  167. while (regs->hour & MSTK_KICK_START) {
  168. prom_printf("CLOCK: Kick start still on!\n");
  169. spin_lock_irq(&mostek_lock);
  170. regs->creg |= MSTK_CREG_WRITE;
  171. regs->hour &= ~MSTK_KICK_START;
  172. regs->creg &= ~MSTK_CREG_WRITE;
  173. spin_unlock_irq(&mostek_lock);
  174. }
  175. prom_printf("CLOCK: Kick start procedure successful.\n");
  176. }
  177. /* Return nonzero if the clock chip battery is low. */
  178. static __inline__ int has_low_battery(void)
  179. {
  180. struct mostek48t02 *regs = (struct mostek48t02 *)mstk48t02_regs;
  181. unsigned char data1, data2;
  182. spin_lock_irq(&mostek_lock);
  183. data1 = regs->eeprom[0]; /* Read some data. */
  184. regs->eeprom[0] = ~data1; /* Write back the complement. */
  185. data2 = regs->eeprom[0]; /* Read back the complement. */
  186. regs->eeprom[0] = data1; /* Restore the original value. */
  187. spin_unlock_irq(&mostek_lock);
  188. return (data1 == data2); /* Was the write blocked? */
  189. }
  190. static void __init mostek_set_system_time(void)
  191. {
  192. unsigned int year, mon, day, hour, min, sec;
  193. struct mostek48t02 *mregs;
  194. mregs = (struct mostek48t02 *)mstk48t02_regs;
  195. if(!mregs) {
  196. prom_printf("Something wrong, clock regs not mapped yet.\n");
  197. prom_halt();
  198. }
  199. spin_lock_irq(&mostek_lock);
  200. mregs->creg |= MSTK_CREG_READ;
  201. sec = MSTK_REG_SEC(mregs);
  202. min = MSTK_REG_MIN(mregs);
  203. hour = MSTK_REG_HOUR(mregs);
  204. day = MSTK_REG_DOM(mregs);
  205. mon = MSTK_REG_MONTH(mregs);
  206. year = MSTK_CVT_YEAR( MSTK_REG_YEAR(mregs) );
  207. xtime.tv_sec = mktime(year, mon, day, hour, min, sec);
  208. xtime.tv_nsec = (INITIAL_JIFFIES % HZ) * (NSEC_PER_SEC / HZ);
  209. set_normalized_timespec(&wall_to_monotonic,
  210. -xtime.tv_sec, -xtime.tv_nsec);
  211. mregs->creg &= ~MSTK_CREG_READ;
  212. spin_unlock_irq(&mostek_lock);
  213. }
  214. /* Probe for the real time clock chip on Sun4 */
  215. static __inline__ void sun4_clock_probe(void)
  216. {
  217. #ifdef CONFIG_SUN4
  218. int temp;
  219. struct resource r;
  220. memset(&r, 0, sizeof(r));
  221. if( idprom->id_machtype == (SM_SUN4 | SM_4_330) ) {
  222. sp_clock_typ = MSTK48T02;
  223. r.start = sun4_clock_physaddr;
  224. mstk48t02_regs = sbus_ioremap(&r, 0,
  225. sizeof(struct mostek48t02), NULL);
  226. mstk48t08_regs = NULL; /* To catch weirdness */
  227. intersil_clock = NULL; /* just in case */
  228. /* Kick start the clock if it is completely stopped. */
  229. if (mostek_read(mstk48t02_regs + MOSTEK_SEC) & MSTK_STOP)
  230. kick_start_clock();
  231. } else if( idprom->id_machtype == (SM_SUN4 | SM_4_260)) {
  232. /* intersil setup code */
  233. printk("Clock: INTERSIL at %8x ",sun4_clock_physaddr);
  234. sp_clock_typ = INTERSIL;
  235. r.start = sun4_clock_physaddr;
  236. intersil_clock = (struct intersil *)
  237. sbus_ioremap(&r, 0, sizeof(*intersil_clock), "intersil");
  238. mstk48t02_regs = 0; /* just be sure */
  239. mstk48t08_regs = NULL; /* ditto */
  240. /* initialise the clock */
  241. intersil_intr(intersil_clock,INTERSIL_INT_100HZ);
  242. intersil_start(intersil_clock);
  243. intersil_read_intr(intersil_clock, temp);
  244. while (!(temp & 0x80))
  245. intersil_read_intr(intersil_clock, temp);
  246. intersil_read_intr(intersil_clock, temp);
  247. while (!(temp & 0x80))
  248. intersil_read_intr(intersil_clock, temp);
  249. intersil_stop(intersil_clock);
  250. }
  251. #endif
  252. }
  253. #ifndef CONFIG_SUN4
  254. static int __devinit clock_probe(struct of_device *op, const struct of_device_id *match)
  255. {
  256. struct device_node *dp = op->node;
  257. char *model = of_get_property(dp, "model", NULL);
  258. if (!model)
  259. return -ENODEV;
  260. if (!strcmp(model, "mk48t02")) {
  261. sp_clock_typ = MSTK48T02;
  262. /* Map the clock register io area read-only */
  263. mstk48t02_regs = of_ioremap(&op->resource[0], 0,
  264. sizeof(struct mostek48t02),
  265. "mk48t02");
  266. mstk48t08_regs = NULL; /* To catch weirdness */
  267. } else if (!strcmp(model, "mk48t08")) {
  268. sp_clock_typ = MSTK48T08;
  269. mstk48t08_regs = of_ioremap(&op->resource[0], 0,
  270. sizeof(struct mostek48t08),
  271. "mk48t08");
  272. mstk48t02_regs = &mstk48t08_regs->regs;
  273. } else
  274. return -ENODEV;
  275. /* Report a low battery voltage condition. */
  276. if (has_low_battery())
  277. printk(KERN_CRIT "NVRAM: Low battery voltage!\n");
  278. /* Kick start the clock if it is completely stopped. */
  279. if (mostek_read(mstk48t02_regs + MOSTEK_SEC) & MSTK_STOP)
  280. kick_start_clock();
  281. mostek_set_system_time();
  282. return 0;
  283. }
  284. static struct of_device_id clock_match[] = {
  285. {
  286. .name = "eeprom",
  287. },
  288. {},
  289. };
  290. static struct of_platform_driver clock_driver = {
  291. .name = "clock",
  292. .match_table = clock_match,
  293. .probe = clock_probe,
  294. };
  295. /* Probe for the mostek real time clock chip. */
  296. static int __init clock_init(void)
  297. {
  298. return of_register_driver(&clock_driver, &of_bus_type);
  299. }
  300. /* Must be after subsys_initcall() so that busses are probed. Must
  301. * be before device_initcall() because things like the RTC driver
  302. * need to see the clock registers.
  303. */
  304. fs_initcall(clock_init);
  305. #endif /* !CONFIG_SUN4 */
  306. void __init sbus_time_init(void)
  307. {
  308. BTFIXUPSET_CALL(bus_do_settimeofday, sbus_do_settimeofday, BTFIXUPCALL_NORM);
  309. btfixup();
  310. if (ARCH_SUN4)
  311. sun4_clock_probe();
  312. sparc_init_timers(timer_interrupt);
  313. #ifdef CONFIG_SUN4
  314. if(idprom->id_machtype == (SM_SUN4 | SM_4_330)) {
  315. mostek_set_system_time();
  316. } else if(idprom->id_machtype == (SM_SUN4 | SM_4_260) ) {
  317. /* initialise the intersil on sun4 */
  318. unsigned int year, mon, day, hour, min, sec;
  319. int temp;
  320. struct intersil *iregs;
  321. iregs=intersil_clock;
  322. if(!iregs) {
  323. prom_printf("Something wrong, clock regs not mapped yet.\n");
  324. prom_halt();
  325. }
  326. intersil_intr(intersil_clock,INTERSIL_INT_100HZ);
  327. disable_pil_irq(10);
  328. intersil_stop(iregs);
  329. intersil_read_intr(intersil_clock, temp);
  330. temp = iregs->clk.int_csec;
  331. sec = iregs->clk.int_sec;
  332. min = iregs->clk.int_min;
  333. hour = iregs->clk.int_hour;
  334. day = iregs->clk.int_day;
  335. mon = iregs->clk.int_month;
  336. year = MSTK_CVT_YEAR(iregs->clk.int_year);
  337. enable_pil_irq(10);
  338. intersil_start(iregs);
  339. xtime.tv_sec = mktime(year, mon, day, hour, min, sec);
  340. xtime.tv_nsec = (INITIAL_JIFFIES % HZ) * (NSEC_PER_SEC / HZ);
  341. set_normalized_timespec(&wall_to_monotonic,
  342. -xtime.tv_sec, -xtime.tv_nsec);
  343. printk("%u/%u/%u %u:%u:%u\n",day,mon,year,hour,min,sec);
  344. }
  345. #endif
  346. /* Now that OBP ticker has been silenced, it is safe to enable IRQ. */
  347. local_irq_enable();
  348. }
  349. void __init time_init(void)
  350. {
  351. #ifdef CONFIG_PCI
  352. extern void pci_time_init(void);
  353. if (pcic_present()) {
  354. pci_time_init();
  355. return;
  356. }
  357. #endif
  358. sbus_time_init();
  359. }
  360. static inline unsigned long do_gettimeoffset(void)
  361. {
  362. return (*master_l10_counter >> 10) & 0x1fffff;
  363. }
  364. /*
  365. * Returns nanoseconds
  366. * XXX This is a suboptimal implementation.
  367. */
  368. unsigned long long sched_clock(void)
  369. {
  370. return (unsigned long long)jiffies * (1000000000 / HZ);
  371. }
  372. /* Ok, my cute asm atomicity trick doesn't work anymore.
  373. * There are just too many variables that need to be protected
  374. * now (both members of xtime, wall_jiffies, et al.)
  375. */
  376. void do_gettimeofday(struct timeval *tv)
  377. {
  378. unsigned long flags;
  379. unsigned long seq;
  380. unsigned long usec, sec;
  381. unsigned long max_ntp_tick = tick_usec - tickadj;
  382. do {
  383. unsigned long lost;
  384. seq = read_seqbegin_irqsave(&xtime_lock, flags);
  385. usec = do_gettimeoffset();
  386. lost = jiffies - wall_jiffies;
  387. /*
  388. * If time_adjust is negative then NTP is slowing the clock
  389. * so make sure not to go into next possible interval.
  390. * Better to lose some accuracy than have time go backwards..
  391. */
  392. if (unlikely(time_adjust < 0)) {
  393. usec = min(usec, max_ntp_tick);
  394. if (lost)
  395. usec += lost * max_ntp_tick;
  396. }
  397. else if (unlikely(lost))
  398. usec += lost * tick_usec;
  399. sec = xtime.tv_sec;
  400. usec += (xtime.tv_nsec / 1000);
  401. } while (read_seqretry_irqrestore(&xtime_lock, seq, flags));
  402. while (usec >= 1000000) {
  403. usec -= 1000000;
  404. sec++;
  405. }
  406. tv->tv_sec = sec;
  407. tv->tv_usec = usec;
  408. }
  409. EXPORT_SYMBOL(do_gettimeofday);
  410. int do_settimeofday(struct timespec *tv)
  411. {
  412. int ret;
  413. write_seqlock_irq(&xtime_lock);
  414. ret = bus_do_settimeofday(tv);
  415. write_sequnlock_irq(&xtime_lock);
  416. clock_was_set();
  417. return ret;
  418. }
  419. EXPORT_SYMBOL(do_settimeofday);
  420. static int sbus_do_settimeofday(struct timespec *tv)
  421. {
  422. time_t wtm_sec, sec = tv->tv_sec;
  423. long wtm_nsec, nsec = tv->tv_nsec;
  424. if ((unsigned long)tv->tv_nsec >= NSEC_PER_SEC)
  425. return -EINVAL;
  426. /*
  427. * This is revolting. We need to set "xtime" correctly. However, the
  428. * value in this location is the value at the most recent update of
  429. * wall time. Discover what correction gettimeofday() would have
  430. * made, and then undo it!
  431. */
  432. nsec -= 1000 * (do_gettimeoffset() +
  433. (jiffies - wall_jiffies) * (USEC_PER_SEC / HZ));
  434. wtm_sec = wall_to_monotonic.tv_sec + (xtime.tv_sec - sec);
  435. wtm_nsec = wall_to_monotonic.tv_nsec + (xtime.tv_nsec - nsec);
  436. set_normalized_timespec(&xtime, sec, nsec);
  437. set_normalized_timespec(&wall_to_monotonic, wtm_sec, wtm_nsec);
  438. ntp_clear();
  439. return 0;
  440. }
  441. /*
  442. * BUG: This routine does not handle hour overflow properly; it just
  443. * sets the minutes. Usually you won't notice until after reboot!
  444. */
  445. static int set_rtc_mmss(unsigned long nowtime)
  446. {
  447. int real_seconds, real_minutes, mostek_minutes;
  448. struct mostek48t02 *regs = (struct mostek48t02 *)mstk48t02_regs;
  449. unsigned long flags;
  450. #ifdef CONFIG_SUN4
  451. struct intersil *iregs = intersil_clock;
  452. int temp;
  453. #endif
  454. /* Not having a register set can lead to trouble. */
  455. if (!regs) {
  456. #ifdef CONFIG_SUN4
  457. if(!iregs)
  458. return -1;
  459. else {
  460. temp = iregs->clk.int_csec;
  461. mostek_minutes = iregs->clk.int_min;
  462. real_seconds = nowtime % 60;
  463. real_minutes = nowtime / 60;
  464. if (((abs(real_minutes - mostek_minutes) + 15)/30) & 1)
  465. real_minutes += 30; /* correct for half hour time zone */
  466. real_minutes %= 60;
  467. if (abs(real_minutes - mostek_minutes) < 30) {
  468. intersil_stop(iregs);
  469. iregs->clk.int_sec=real_seconds;
  470. iregs->clk.int_min=real_minutes;
  471. intersil_start(iregs);
  472. } else {
  473. printk(KERN_WARNING
  474. "set_rtc_mmss: can't update from %d to %d\n",
  475. mostek_minutes, real_minutes);
  476. return -1;
  477. }
  478. return 0;
  479. }
  480. #endif
  481. }
  482. spin_lock_irqsave(&mostek_lock, flags);
  483. /* Read the current RTC minutes. */
  484. regs->creg |= MSTK_CREG_READ;
  485. mostek_minutes = MSTK_REG_MIN(regs);
  486. regs->creg &= ~MSTK_CREG_READ;
  487. /*
  488. * since we're only adjusting minutes and seconds,
  489. * don't interfere with hour overflow. This avoids
  490. * messing with unknown time zones but requires your
  491. * RTC not to be off by more than 15 minutes
  492. */
  493. real_seconds = nowtime % 60;
  494. real_minutes = nowtime / 60;
  495. if (((abs(real_minutes - mostek_minutes) + 15)/30) & 1)
  496. real_minutes += 30; /* correct for half hour time zone */
  497. real_minutes %= 60;
  498. if (abs(real_minutes - mostek_minutes) < 30) {
  499. regs->creg |= MSTK_CREG_WRITE;
  500. MSTK_SET_REG_SEC(regs,real_seconds);
  501. MSTK_SET_REG_MIN(regs,real_minutes);
  502. regs->creg &= ~MSTK_CREG_WRITE;
  503. spin_unlock_irqrestore(&mostek_lock, flags);
  504. return 0;
  505. } else {
  506. spin_unlock_irqrestore(&mostek_lock, flags);
  507. return -1;
  508. }
  509. }