sun4d_irq.c 14 KB

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  1. /* $Id: sun4d_irq.c,v 1.29 2001/12/11 04:55:51 davem Exp $
  2. * arch/sparc/kernel/sun4d_irq.c:
  3. * SS1000/SC2000 interrupt handling.
  4. *
  5. * Copyright (C) 1997,1998 Jakub Jelinek (jj@sunsite.mff.cuni.cz)
  6. * Heavily based on arch/sparc/kernel/irq.c.
  7. */
  8. #include <linux/errno.h>
  9. #include <linux/linkage.h>
  10. #include <linux/kernel_stat.h>
  11. #include <linux/signal.h>
  12. #include <linux/sched.h>
  13. #include <linux/ptrace.h>
  14. #include <linux/interrupt.h>
  15. #include <linux/slab.h>
  16. #include <linux/random.h>
  17. #include <linux/init.h>
  18. #include <linux/smp.h>
  19. #include <linux/smp_lock.h>
  20. #include <linux/spinlock.h>
  21. #include <linux/seq_file.h>
  22. #include <asm/ptrace.h>
  23. #include <asm/processor.h>
  24. #include <asm/system.h>
  25. #include <asm/psr.h>
  26. #include <asm/smp.h>
  27. #include <asm/vaddrs.h>
  28. #include <asm/timer.h>
  29. #include <asm/openprom.h>
  30. #include <asm/oplib.h>
  31. #include <asm/traps.h>
  32. #include <asm/irq.h>
  33. #include <asm/io.h>
  34. #include <asm/pgalloc.h>
  35. #include <asm/pgtable.h>
  36. #include <asm/sbus.h>
  37. #include <asm/sbi.h>
  38. #include <asm/cacheflush.h>
  39. /* If you trust current SCSI layer to handle different SCSI IRQs, enable this. I don't trust it... -jj */
  40. /* #define DISTRIBUTE_IRQS */
  41. struct sun4d_timer_regs *sun4d_timers;
  42. #define TIMER_IRQ 10
  43. #define MAX_STATIC_ALLOC 4
  44. extern struct irqaction static_irqaction[MAX_STATIC_ALLOC];
  45. extern int static_irq_count;
  46. unsigned char cpu_leds[32];
  47. #ifdef CONFIG_SMP
  48. unsigned char sbus_tid[32];
  49. #endif
  50. static struct irqaction *irq_action[NR_IRQS];
  51. extern spinlock_t irq_action_lock;
  52. struct sbus_action {
  53. struct irqaction *action;
  54. /* For SMP this needs to be extended */
  55. } *sbus_actions;
  56. static int pil_to_sbus[] = {
  57. 0, 0, 1, 2, 0, 3, 0, 4, 0, 5, 0, 6, 0, 7, 0, 0,
  58. };
  59. static int sbus_to_pil[] = {
  60. 0, 2, 3, 5, 7, 9, 11, 13,
  61. };
  62. static int nsbi;
  63. #ifdef CONFIG_SMP
  64. DEFINE_SPINLOCK(sun4d_imsk_lock);
  65. #endif
  66. int show_sun4d_interrupts(struct seq_file *p, void *v)
  67. {
  68. int i = *(loff_t *) v, j = 0, k = 0, sbusl;
  69. struct irqaction * action;
  70. unsigned long flags;
  71. #ifdef CONFIG_SMP
  72. int x;
  73. #endif
  74. spin_lock_irqsave(&irq_action_lock, flags);
  75. if (i < NR_IRQS) {
  76. sbusl = pil_to_sbus[i];
  77. if (!sbusl) {
  78. action = *(i + irq_action);
  79. if (!action)
  80. goto out_unlock;
  81. } else {
  82. for (j = 0; j < nsbi; j++) {
  83. for (k = 0; k < 4; k++)
  84. if ((action = sbus_actions [(j << 5) + (sbusl << 2) + k].action))
  85. goto found_it;
  86. }
  87. goto out_unlock;
  88. }
  89. found_it: seq_printf(p, "%3d: ", i);
  90. #ifndef CONFIG_SMP
  91. seq_printf(p, "%10u ", kstat_irqs(i));
  92. #else
  93. for_each_online_cpu(x)
  94. seq_printf(p, "%10u ",
  95. kstat_cpu(cpu_logical_map(x)).irqs[i]);
  96. #endif
  97. seq_printf(p, "%c %s",
  98. (action->flags & IRQF_DISABLED) ? '+' : ' ',
  99. action->name);
  100. action = action->next;
  101. for (;;) {
  102. for (; action; action = action->next) {
  103. seq_printf(p, ",%s %s",
  104. (action->flags & IRQF_DISABLED) ? " +" : "",
  105. action->name);
  106. }
  107. if (!sbusl) break;
  108. k++;
  109. if (k < 4)
  110. action = sbus_actions [(j << 5) + (sbusl << 2) + k].action;
  111. else {
  112. j++;
  113. if (j == nsbi) break;
  114. k = 0;
  115. action = sbus_actions [(j << 5) + (sbusl << 2)].action;
  116. }
  117. }
  118. seq_putc(p, '\n');
  119. }
  120. out_unlock:
  121. spin_unlock_irqrestore(&irq_action_lock, flags);
  122. return 0;
  123. }
  124. void sun4d_free_irq(unsigned int irq, void *dev_id)
  125. {
  126. struct irqaction *action, **actionp;
  127. struct irqaction *tmp = NULL;
  128. unsigned long flags;
  129. spin_lock_irqsave(&irq_action_lock, flags);
  130. if (irq < 15)
  131. actionp = irq + irq_action;
  132. else
  133. actionp = &(sbus_actions[irq - (1 << 5)].action);
  134. action = *actionp;
  135. if (!action) {
  136. printk("Trying to free free IRQ%d\n",irq);
  137. goto out_unlock;
  138. }
  139. if (dev_id) {
  140. for (; action; action = action->next) {
  141. if (action->dev_id == dev_id)
  142. break;
  143. tmp = action;
  144. }
  145. if (!action) {
  146. printk("Trying to free free shared IRQ%d\n",irq);
  147. goto out_unlock;
  148. }
  149. } else if (action->flags & IRQF_SHARED) {
  150. printk("Trying to free shared IRQ%d with NULL device ID\n", irq);
  151. goto out_unlock;
  152. }
  153. if (action->flags & SA_STATIC_ALLOC)
  154. {
  155. /* This interrupt is marked as specially allocated
  156. * so it is a bad idea to free it.
  157. */
  158. printk("Attempt to free statically allocated IRQ%d (%s)\n",
  159. irq, action->name);
  160. goto out_unlock;
  161. }
  162. if (action && tmp)
  163. tmp->next = action->next;
  164. else
  165. *actionp = action->next;
  166. spin_unlock_irqrestore(&irq_action_lock, flags);
  167. synchronize_irq(irq);
  168. spin_lock_irqsave(&irq_action_lock, flags);
  169. kfree(action);
  170. if (!(*actionp))
  171. disable_irq(irq);
  172. out_unlock:
  173. spin_unlock_irqrestore(&irq_action_lock, flags);
  174. }
  175. extern void unexpected_irq(int, void *, struct pt_regs *);
  176. void sun4d_handler_irq(int irq, struct pt_regs * regs)
  177. {
  178. struct irqaction * action;
  179. int cpu = smp_processor_id();
  180. /* SBUS IRQ level (1 - 7) */
  181. int sbusl = pil_to_sbus[irq];
  182. /* FIXME: Is this necessary?? */
  183. cc_get_ipen();
  184. cc_set_iclr(1 << irq);
  185. irq_enter();
  186. kstat_cpu(cpu).irqs[irq]++;
  187. if (!sbusl) {
  188. action = *(irq + irq_action);
  189. if (!action)
  190. unexpected_irq(irq, NULL, regs);
  191. do {
  192. action->handler(irq, action->dev_id, regs);
  193. action = action->next;
  194. } while (action);
  195. } else {
  196. int bus_mask = bw_get_intr_mask(sbusl) & 0x3ffff;
  197. int sbino;
  198. struct sbus_action *actionp;
  199. unsigned mask, slot;
  200. int sbil = (sbusl << 2);
  201. bw_clear_intr_mask(sbusl, bus_mask);
  202. /* Loop for each pending SBI */
  203. for (sbino = 0; bus_mask; sbino++, bus_mask >>= 1)
  204. if (bus_mask & 1) {
  205. mask = acquire_sbi(SBI2DEVID(sbino), 0xf << sbil);
  206. mask &= (0xf << sbil);
  207. actionp = sbus_actions + (sbino << 5) + (sbil);
  208. /* Loop for each pending SBI slot */
  209. for (slot = (1 << sbil); mask; slot <<= 1, actionp++)
  210. if (mask & slot) {
  211. mask &= ~slot;
  212. action = actionp->action;
  213. if (!action)
  214. unexpected_irq(irq, NULL, regs);
  215. do {
  216. action->handler(irq, action->dev_id, regs);
  217. action = action->next;
  218. } while (action);
  219. release_sbi(SBI2DEVID(sbino), slot);
  220. }
  221. }
  222. }
  223. irq_exit();
  224. }
  225. unsigned int sun4d_build_irq(struct sbus_dev *sdev, int irq)
  226. {
  227. int sbusl = pil_to_sbus[irq];
  228. if (sbusl)
  229. return ((sdev->bus->board + 1) << 5) + (sbusl << 2) + sdev->slot;
  230. else
  231. return irq;
  232. }
  233. unsigned int sun4d_sbint_to_irq(struct sbus_dev *sdev, unsigned int sbint)
  234. {
  235. if (sbint >= sizeof(sbus_to_pil)) {
  236. printk(KERN_ERR "%s: bogus SBINT %d\n", sdev->prom_name, sbint);
  237. BUG();
  238. }
  239. return sun4d_build_irq(sdev, sbus_to_pil[sbint]);
  240. }
  241. int sun4d_request_irq(unsigned int irq,
  242. irqreturn_t (*handler)(int, void *, struct pt_regs *),
  243. unsigned long irqflags, const char * devname, void *dev_id)
  244. {
  245. struct irqaction *action, *tmp = NULL, **actionp;
  246. unsigned long flags;
  247. int ret;
  248. if(irq > 14 && irq < (1 << 5)) {
  249. ret = -EINVAL;
  250. goto out;
  251. }
  252. if (!handler) {
  253. ret = -EINVAL;
  254. goto out;
  255. }
  256. spin_lock_irqsave(&irq_action_lock, flags);
  257. if (irq >= (1 << 5))
  258. actionp = &(sbus_actions[irq - (1 << 5)].action);
  259. else
  260. actionp = irq + irq_action;
  261. action = *actionp;
  262. if (action) {
  263. if ((action->flags & IRQF_SHARED) && (irqflags & IRQF_SHARED)) {
  264. for (tmp = action; tmp->next; tmp = tmp->next);
  265. } else {
  266. ret = -EBUSY;
  267. goto out_unlock;
  268. }
  269. if ((action->flags & IRQF_DISABLED) ^ (irqflags & IRQF_DISABLED)) {
  270. printk("Attempt to mix fast and slow interrupts on IRQ%d denied\n", irq);
  271. ret = -EBUSY;
  272. goto out_unlock;
  273. }
  274. action = NULL; /* Or else! */
  275. }
  276. /* If this is flagged as statically allocated then we use our
  277. * private struct which is never freed.
  278. */
  279. if (irqflags & SA_STATIC_ALLOC) {
  280. if (static_irq_count < MAX_STATIC_ALLOC)
  281. action = &static_irqaction[static_irq_count++];
  282. else
  283. printk("Request for IRQ%d (%s) SA_STATIC_ALLOC failed using kmalloc\n", irq, devname);
  284. }
  285. if (action == NULL)
  286. action = (struct irqaction *)kmalloc(sizeof(struct irqaction),
  287. GFP_ATOMIC);
  288. if (!action) {
  289. ret = -ENOMEM;
  290. goto out_unlock;
  291. }
  292. action->handler = handler;
  293. action->flags = irqflags;
  294. cpus_clear(action->mask);
  295. action->name = devname;
  296. action->next = NULL;
  297. action->dev_id = dev_id;
  298. if (tmp)
  299. tmp->next = action;
  300. else
  301. *actionp = action;
  302. enable_irq(irq);
  303. ret = 0;
  304. out_unlock:
  305. spin_unlock_irqrestore(&irq_action_lock, flags);
  306. out:
  307. return ret;
  308. }
  309. static void sun4d_disable_irq(unsigned int irq)
  310. {
  311. #ifdef CONFIG_SMP
  312. int tid = sbus_tid[(irq >> 5) - 1];
  313. unsigned long flags;
  314. #endif
  315. if (irq < NR_IRQS) return;
  316. #ifdef CONFIG_SMP
  317. spin_lock_irqsave(&sun4d_imsk_lock, flags);
  318. cc_set_imsk_other(tid, cc_get_imsk_other(tid) | (1 << sbus_to_pil[(irq >> 2) & 7]));
  319. spin_unlock_irqrestore(&sun4d_imsk_lock, flags);
  320. #else
  321. cc_set_imsk(cc_get_imsk() | (1 << sbus_to_pil[(irq >> 2) & 7]));
  322. #endif
  323. }
  324. static void sun4d_enable_irq(unsigned int irq)
  325. {
  326. #ifdef CONFIG_SMP
  327. int tid = sbus_tid[(irq >> 5) - 1];
  328. unsigned long flags;
  329. #endif
  330. if (irq < NR_IRQS) return;
  331. #ifdef CONFIG_SMP
  332. spin_lock_irqsave(&sun4d_imsk_lock, flags);
  333. cc_set_imsk_other(tid, cc_get_imsk_other(tid) & ~(1 << sbus_to_pil[(irq >> 2) & 7]));
  334. spin_unlock_irqrestore(&sun4d_imsk_lock, flags);
  335. #else
  336. cc_set_imsk(cc_get_imsk() & ~(1 << sbus_to_pil[(irq >> 2) & 7]));
  337. #endif
  338. }
  339. #ifdef CONFIG_SMP
  340. static void sun4d_set_cpu_int(int cpu, int level)
  341. {
  342. sun4d_send_ipi(cpu, level);
  343. }
  344. static void sun4d_clear_ipi(int cpu, int level)
  345. {
  346. }
  347. static void sun4d_set_udt(int cpu)
  348. {
  349. }
  350. /* Setup IRQ distribution scheme. */
  351. void __init sun4d_distribute_irqs(void)
  352. {
  353. #ifdef DISTRIBUTE_IRQS
  354. struct sbus_bus *sbus;
  355. unsigned long sbus_serving_map;
  356. sbus_serving_map = cpu_present_map;
  357. for_each_sbus(sbus) {
  358. if ((sbus->board * 2) == boot_cpu_id && (cpu_present_map & (1 << (sbus->board * 2 + 1))))
  359. sbus_tid[sbus->board] = (sbus->board * 2 + 1);
  360. else if (cpu_present_map & (1 << (sbus->board * 2)))
  361. sbus_tid[sbus->board] = (sbus->board * 2);
  362. else if (cpu_present_map & (1 << (sbus->board * 2 + 1)))
  363. sbus_tid[sbus->board] = (sbus->board * 2 + 1);
  364. else
  365. sbus_tid[sbus->board] = 0xff;
  366. if (sbus_tid[sbus->board] != 0xff)
  367. sbus_serving_map &= ~(1 << sbus_tid[sbus->board]);
  368. }
  369. for_each_sbus(sbus)
  370. if (sbus_tid[sbus->board] == 0xff) {
  371. int i = 31;
  372. if (!sbus_serving_map)
  373. sbus_serving_map = cpu_present_map;
  374. while (!(sbus_serving_map & (1 << i)))
  375. i--;
  376. sbus_tid[sbus->board] = i;
  377. sbus_serving_map &= ~(1 << i);
  378. }
  379. for_each_sbus(sbus) {
  380. printk("sbus%d IRQs directed to CPU%d\n", sbus->board, sbus_tid[sbus->board]);
  381. set_sbi_tid(sbus->devid, sbus_tid[sbus->board] << 3);
  382. }
  383. #else
  384. struct sbus_bus *sbus;
  385. int cpuid = cpu_logical_map(1);
  386. if (cpuid == -1)
  387. cpuid = cpu_logical_map(0);
  388. for_each_sbus(sbus) {
  389. sbus_tid[sbus->board] = cpuid;
  390. set_sbi_tid(sbus->devid, cpuid << 3);
  391. }
  392. printk("All sbus IRQs directed to CPU%d\n", cpuid);
  393. #endif
  394. }
  395. #endif
  396. static void sun4d_clear_clock_irq(void)
  397. {
  398. volatile unsigned int clear_intr;
  399. clear_intr = sun4d_timers->l10_timer_limit;
  400. }
  401. static void sun4d_clear_profile_irq(int cpu)
  402. {
  403. bw_get_prof_limit(cpu);
  404. }
  405. static void sun4d_load_profile_irq(int cpu, unsigned int limit)
  406. {
  407. bw_set_prof_limit(cpu, limit);
  408. }
  409. static void __init sun4d_init_timers(irqreturn_t (*counter_fn)(int, void *, struct pt_regs *))
  410. {
  411. int irq;
  412. int cpu;
  413. struct resource r;
  414. int mid;
  415. /* Map the User Timer registers. */
  416. memset(&r, 0, sizeof(r));
  417. #ifdef CONFIG_SMP
  418. r.start = CSR_BASE(boot_cpu_id)+BW_TIMER_LIMIT;
  419. #else
  420. r.start = CSR_BASE(0)+BW_TIMER_LIMIT;
  421. #endif
  422. r.flags = 0xf;
  423. sun4d_timers = (struct sun4d_timer_regs *) sbus_ioremap(&r, 0,
  424. PAGE_SIZE, "user timer");
  425. sun4d_timers->l10_timer_limit = (((1000000/HZ) + 1) << 10);
  426. master_l10_counter = &sun4d_timers->l10_cur_count;
  427. master_l10_limit = &sun4d_timers->l10_timer_limit;
  428. irq = request_irq(TIMER_IRQ,
  429. counter_fn,
  430. (IRQF_DISABLED | SA_STATIC_ALLOC),
  431. "timer", NULL);
  432. if (irq) {
  433. prom_printf("time_init: unable to attach IRQ%d\n",TIMER_IRQ);
  434. prom_halt();
  435. }
  436. /* Enable user timer free run for CPU 0 in BW */
  437. /* bw_set_ctrl(0, bw_get_ctrl(0) | BW_CTRL_USER_TIMER); */
  438. cpu = 0;
  439. while (!cpu_find_by_instance(cpu, NULL, &mid)) {
  440. sun4d_load_profile_irq(mid >> 3, 0);
  441. cpu++;
  442. }
  443. #ifdef CONFIG_SMP
  444. {
  445. unsigned long flags;
  446. extern unsigned long lvl14_save[4];
  447. struct tt_entry *trap_table = &sparc_ttable[SP_TRAP_IRQ1 + (14 - 1)];
  448. extern unsigned int real_irq_entry[], smp4d_ticker[];
  449. extern unsigned int patchme_maybe_smp_msg[];
  450. /* Adjust so that we jump directly to smp4d_ticker */
  451. lvl14_save[2] += smp4d_ticker - real_irq_entry;
  452. /* For SMP we use the level 14 ticker, however the bootup code
  453. * has copied the firmwares level 14 vector into boot cpu's
  454. * trap table, we must fix this now or we get squashed.
  455. */
  456. local_irq_save(flags);
  457. patchme_maybe_smp_msg[0] = 0x01000000; /* NOP out the branch */
  458. trap_table->inst_one = lvl14_save[0];
  459. trap_table->inst_two = lvl14_save[1];
  460. trap_table->inst_three = lvl14_save[2];
  461. trap_table->inst_four = lvl14_save[3];
  462. local_flush_cache_all();
  463. local_irq_restore(flags);
  464. }
  465. #endif
  466. }
  467. void __init sun4d_init_sbi_irq(void)
  468. {
  469. struct sbus_bus *sbus;
  470. unsigned mask;
  471. nsbi = 0;
  472. for_each_sbus(sbus)
  473. nsbi++;
  474. sbus_actions = (struct sbus_action *)kmalloc (nsbi * 8 * 4 * sizeof(struct sbus_action), GFP_ATOMIC);
  475. memset (sbus_actions, 0, (nsbi * 8 * 4 * sizeof(struct sbus_action)));
  476. for_each_sbus(sbus) {
  477. #ifdef CONFIG_SMP
  478. extern unsigned char boot_cpu_id;
  479. set_sbi_tid(sbus->devid, boot_cpu_id << 3);
  480. sbus_tid[sbus->board] = boot_cpu_id;
  481. #endif
  482. /* Get rid of pending irqs from PROM */
  483. mask = acquire_sbi(sbus->devid, 0xffffffff);
  484. if (mask) {
  485. printk ("Clearing pending IRQs %08x on SBI %d\n", mask, sbus->board);
  486. release_sbi(sbus->devid, mask);
  487. }
  488. }
  489. }
  490. void __init sun4d_init_IRQ(void)
  491. {
  492. local_irq_disable();
  493. BTFIXUPSET_CALL(sbint_to_irq, sun4d_sbint_to_irq, BTFIXUPCALL_NORM);
  494. BTFIXUPSET_CALL(enable_irq, sun4d_enable_irq, BTFIXUPCALL_NORM);
  495. BTFIXUPSET_CALL(disable_irq, sun4d_disable_irq, BTFIXUPCALL_NORM);
  496. BTFIXUPSET_CALL(clear_clock_irq, sun4d_clear_clock_irq, BTFIXUPCALL_NORM);
  497. BTFIXUPSET_CALL(clear_profile_irq, sun4d_clear_profile_irq, BTFIXUPCALL_NORM);
  498. BTFIXUPSET_CALL(load_profile_irq, sun4d_load_profile_irq, BTFIXUPCALL_NORM);
  499. sparc_init_timers = sun4d_init_timers;
  500. #ifdef CONFIG_SMP
  501. BTFIXUPSET_CALL(set_cpu_int, sun4d_set_cpu_int, BTFIXUPCALL_NORM);
  502. BTFIXUPSET_CALL(clear_cpu_int, sun4d_clear_ipi, BTFIXUPCALL_NOP);
  503. BTFIXUPSET_CALL(set_irq_udt, sun4d_set_udt, BTFIXUPCALL_NOP);
  504. #endif
  505. /* Cannot enable interrupts until OBP ticker is disabled. */
  506. }