smp.c 9.9 KB

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  1. /* smp.c: Sparc SMP support.
  2. *
  3. * Copyright (C) 1996 David S. Miller (davem@caip.rutgers.edu)
  4. * Copyright (C) 1998 Jakub Jelinek (jj@sunsite.mff.cuni.cz)
  5. * Copyright (C) 2004 Keith M Wesolowski (wesolows@foobazco.org)
  6. */
  7. #include <asm/head.h>
  8. #include <linux/kernel.h>
  9. #include <linux/sched.h>
  10. #include <linux/threads.h>
  11. #include <linux/smp.h>
  12. #include <linux/smp_lock.h>
  13. #include <linux/interrupt.h>
  14. #include <linux/kernel_stat.h>
  15. #include <linux/init.h>
  16. #include <linux/spinlock.h>
  17. #include <linux/mm.h>
  18. #include <linux/fs.h>
  19. #include <linux/seq_file.h>
  20. #include <linux/cache.h>
  21. #include <linux/delay.h>
  22. #include <asm/ptrace.h>
  23. #include <asm/atomic.h>
  24. #include <asm/irq.h>
  25. #include <asm/page.h>
  26. #include <asm/pgalloc.h>
  27. #include <asm/pgtable.h>
  28. #include <asm/oplib.h>
  29. #include <asm/cacheflush.h>
  30. #include <asm/tlbflush.h>
  31. #include <asm/cpudata.h>
  32. int smp_num_cpus = 1;
  33. volatile unsigned long cpu_callin_map[NR_CPUS] __initdata = {0,};
  34. unsigned char boot_cpu_id = 0;
  35. unsigned char boot_cpu_id4 = 0; /* boot_cpu_id << 2 */
  36. int smp_activated = 0;
  37. volatile int __cpu_number_map[NR_CPUS];
  38. volatile int __cpu_logical_map[NR_CPUS];
  39. cpumask_t cpu_online_map = CPU_MASK_NONE;
  40. cpumask_t phys_cpu_present_map = CPU_MASK_NONE;
  41. cpumask_t smp_commenced_mask = CPU_MASK_NONE;
  42. /* The only guaranteed locking primitive available on all Sparc
  43. * processors is 'ldstub [%reg + immediate], %dest_reg' which atomically
  44. * places the current byte at the effective address into dest_reg and
  45. * places 0xff there afterwards. Pretty lame locking primitive
  46. * compared to the Alpha and the Intel no? Most Sparcs have 'swap'
  47. * instruction which is much better...
  48. */
  49. /* Used to make bitops atomic */
  50. unsigned char bitops_spinlock = 0;
  51. void __cpuinit smp_store_cpu_info(int id)
  52. {
  53. int cpu_node;
  54. cpu_data(id).udelay_val = loops_per_jiffy;
  55. cpu_find_by_mid(id, &cpu_node);
  56. cpu_data(id).clock_tick = prom_getintdefault(cpu_node,
  57. "clock-frequency", 0);
  58. cpu_data(id).prom_node = cpu_node;
  59. cpu_data(id).mid = cpu_get_hwmid(cpu_node);
  60. /* this is required to tune the scheduler correctly */
  61. /* is it possible to have CPUs with different cache sizes? */
  62. if (id == boot_cpu_id) {
  63. int cache_line,cache_nlines;
  64. cache_line = 0x20;
  65. cache_line = prom_getintdefault(cpu_node, "ecache-line-size", cache_line);
  66. cache_nlines = 0x8000;
  67. cache_nlines = prom_getintdefault(cpu_node, "ecache-nlines", cache_nlines);
  68. max_cache_size = cache_line * cache_nlines;
  69. }
  70. if (cpu_data(id).mid < 0)
  71. panic("No MID found for CPU%d at node 0x%08d", id, cpu_node);
  72. }
  73. void __init smp_cpus_done(unsigned int max_cpus)
  74. {
  75. extern void smp4m_smp_done(void);
  76. extern void smp4d_smp_done(void);
  77. unsigned long bogosum = 0;
  78. int cpu, num;
  79. for (cpu = 0, num = 0; cpu < NR_CPUS; cpu++)
  80. if (cpu_online(cpu)) {
  81. num++;
  82. bogosum += cpu_data(cpu).udelay_val;
  83. }
  84. printk("Total of %d processors activated (%lu.%02lu BogoMIPS).\n",
  85. num, bogosum/(500000/HZ),
  86. (bogosum/(5000/HZ))%100);
  87. switch(sparc_cpu_model) {
  88. case sun4:
  89. printk("SUN4\n");
  90. BUG();
  91. break;
  92. case sun4c:
  93. printk("SUN4C\n");
  94. BUG();
  95. break;
  96. case sun4m:
  97. smp4m_smp_done();
  98. break;
  99. case sun4d:
  100. smp4d_smp_done();
  101. break;
  102. case sun4e:
  103. printk("SUN4E\n");
  104. BUG();
  105. break;
  106. case sun4u:
  107. printk("SUN4U\n");
  108. BUG();
  109. break;
  110. default:
  111. printk("UNKNOWN!\n");
  112. BUG();
  113. break;
  114. };
  115. }
  116. void cpu_panic(void)
  117. {
  118. printk("CPU[%d]: Returns from cpu_idle!\n", smp_processor_id());
  119. panic("SMP bolixed\n");
  120. }
  121. struct linux_prom_registers smp_penguin_ctable __initdata = { 0 };
  122. void smp_send_reschedule(int cpu)
  123. {
  124. /* See sparc64 */
  125. }
  126. void smp_send_stop(void)
  127. {
  128. }
  129. void smp_flush_cache_all(void)
  130. {
  131. xc0((smpfunc_t) BTFIXUP_CALL(local_flush_cache_all));
  132. local_flush_cache_all();
  133. }
  134. void smp_flush_tlb_all(void)
  135. {
  136. xc0((smpfunc_t) BTFIXUP_CALL(local_flush_tlb_all));
  137. local_flush_tlb_all();
  138. }
  139. void smp_flush_cache_mm(struct mm_struct *mm)
  140. {
  141. if(mm->context != NO_CONTEXT) {
  142. cpumask_t cpu_mask = mm->cpu_vm_mask;
  143. cpu_clear(smp_processor_id(), cpu_mask);
  144. if (!cpus_empty(cpu_mask))
  145. xc1((smpfunc_t) BTFIXUP_CALL(local_flush_cache_mm), (unsigned long) mm);
  146. local_flush_cache_mm(mm);
  147. }
  148. }
  149. void smp_flush_tlb_mm(struct mm_struct *mm)
  150. {
  151. if(mm->context != NO_CONTEXT) {
  152. cpumask_t cpu_mask = mm->cpu_vm_mask;
  153. cpu_clear(smp_processor_id(), cpu_mask);
  154. if (!cpus_empty(cpu_mask)) {
  155. xc1((smpfunc_t) BTFIXUP_CALL(local_flush_tlb_mm), (unsigned long) mm);
  156. if(atomic_read(&mm->mm_users) == 1 && current->active_mm == mm)
  157. mm->cpu_vm_mask = cpumask_of_cpu(smp_processor_id());
  158. }
  159. local_flush_tlb_mm(mm);
  160. }
  161. }
  162. void smp_flush_cache_range(struct vm_area_struct *vma, unsigned long start,
  163. unsigned long end)
  164. {
  165. struct mm_struct *mm = vma->vm_mm;
  166. if (mm->context != NO_CONTEXT) {
  167. cpumask_t cpu_mask = mm->cpu_vm_mask;
  168. cpu_clear(smp_processor_id(), cpu_mask);
  169. if (!cpus_empty(cpu_mask))
  170. xc3((smpfunc_t) BTFIXUP_CALL(local_flush_cache_range), (unsigned long) vma, start, end);
  171. local_flush_cache_range(vma, start, end);
  172. }
  173. }
  174. void smp_flush_tlb_range(struct vm_area_struct *vma, unsigned long start,
  175. unsigned long end)
  176. {
  177. struct mm_struct *mm = vma->vm_mm;
  178. if (mm->context != NO_CONTEXT) {
  179. cpumask_t cpu_mask = mm->cpu_vm_mask;
  180. cpu_clear(smp_processor_id(), cpu_mask);
  181. if (!cpus_empty(cpu_mask))
  182. xc3((smpfunc_t) BTFIXUP_CALL(local_flush_tlb_range), (unsigned long) vma, start, end);
  183. local_flush_tlb_range(vma, start, end);
  184. }
  185. }
  186. void smp_flush_cache_page(struct vm_area_struct *vma, unsigned long page)
  187. {
  188. struct mm_struct *mm = vma->vm_mm;
  189. if(mm->context != NO_CONTEXT) {
  190. cpumask_t cpu_mask = mm->cpu_vm_mask;
  191. cpu_clear(smp_processor_id(), cpu_mask);
  192. if (!cpus_empty(cpu_mask))
  193. xc2((smpfunc_t) BTFIXUP_CALL(local_flush_cache_page), (unsigned long) vma, page);
  194. local_flush_cache_page(vma, page);
  195. }
  196. }
  197. void smp_flush_tlb_page(struct vm_area_struct *vma, unsigned long page)
  198. {
  199. struct mm_struct *mm = vma->vm_mm;
  200. if(mm->context != NO_CONTEXT) {
  201. cpumask_t cpu_mask = mm->cpu_vm_mask;
  202. cpu_clear(smp_processor_id(), cpu_mask);
  203. if (!cpus_empty(cpu_mask))
  204. xc2((smpfunc_t) BTFIXUP_CALL(local_flush_tlb_page), (unsigned long) vma, page);
  205. local_flush_tlb_page(vma, page);
  206. }
  207. }
  208. void smp_reschedule_irq(void)
  209. {
  210. set_need_resched();
  211. }
  212. void smp_flush_page_to_ram(unsigned long page)
  213. {
  214. /* Current theory is that those who call this are the one's
  215. * who have just dirtied their cache with the pages contents
  216. * in kernel space, therefore we only run this on local cpu.
  217. *
  218. * XXX This experiment failed, research further... -DaveM
  219. */
  220. #if 1
  221. xc1((smpfunc_t) BTFIXUP_CALL(local_flush_page_to_ram), page);
  222. #endif
  223. local_flush_page_to_ram(page);
  224. }
  225. void smp_flush_sig_insns(struct mm_struct *mm, unsigned long insn_addr)
  226. {
  227. cpumask_t cpu_mask = mm->cpu_vm_mask;
  228. cpu_clear(smp_processor_id(), cpu_mask);
  229. if (!cpus_empty(cpu_mask))
  230. xc2((smpfunc_t) BTFIXUP_CALL(local_flush_sig_insns), (unsigned long) mm, insn_addr);
  231. local_flush_sig_insns(mm, insn_addr);
  232. }
  233. extern unsigned int lvl14_resolution;
  234. /* /proc/profile writes can call this, don't __init it please. */
  235. static DEFINE_SPINLOCK(prof_setup_lock);
  236. int setup_profiling_timer(unsigned int multiplier)
  237. {
  238. int i;
  239. unsigned long flags;
  240. /* Prevent level14 ticker IRQ flooding. */
  241. if((!multiplier) || (lvl14_resolution / multiplier) < 500)
  242. return -EINVAL;
  243. spin_lock_irqsave(&prof_setup_lock, flags);
  244. for_each_possible_cpu(i) {
  245. load_profile_irq(i, lvl14_resolution / multiplier);
  246. prof_multiplier(i) = multiplier;
  247. }
  248. spin_unlock_irqrestore(&prof_setup_lock, flags);
  249. return 0;
  250. }
  251. void __init smp_prepare_cpus(unsigned int max_cpus)
  252. {
  253. extern void smp4m_boot_cpus(void);
  254. extern void smp4d_boot_cpus(void);
  255. int i, cpuid, extra;
  256. printk("Entering SMP Mode...\n");
  257. extra = 0;
  258. for (i = 0; !cpu_find_by_instance(i, NULL, &cpuid); i++) {
  259. if (cpuid >= NR_CPUS)
  260. extra++;
  261. }
  262. /* i = number of cpus */
  263. if (extra && max_cpus > i - extra)
  264. printk("Warning: NR_CPUS is too low to start all cpus\n");
  265. smp_store_cpu_info(boot_cpu_id);
  266. switch(sparc_cpu_model) {
  267. case sun4:
  268. printk("SUN4\n");
  269. BUG();
  270. break;
  271. case sun4c:
  272. printk("SUN4C\n");
  273. BUG();
  274. break;
  275. case sun4m:
  276. smp4m_boot_cpus();
  277. break;
  278. case sun4d:
  279. smp4d_boot_cpus();
  280. break;
  281. case sun4e:
  282. printk("SUN4E\n");
  283. BUG();
  284. break;
  285. case sun4u:
  286. printk("SUN4U\n");
  287. BUG();
  288. break;
  289. default:
  290. printk("UNKNOWN!\n");
  291. BUG();
  292. break;
  293. };
  294. }
  295. /* Set this up early so that things like the scheduler can init
  296. * properly. We use the same cpu mask for both the present and
  297. * possible cpu map.
  298. */
  299. void __init smp_setup_cpu_possible_map(void)
  300. {
  301. int instance, mid;
  302. instance = 0;
  303. while (!cpu_find_by_instance(instance, NULL, &mid)) {
  304. if (mid < NR_CPUS) {
  305. cpu_set(mid, phys_cpu_present_map);
  306. cpu_set(mid, cpu_present_map);
  307. }
  308. instance++;
  309. }
  310. }
  311. void __init smp_prepare_boot_cpu(void)
  312. {
  313. int cpuid = hard_smp_processor_id();
  314. if (cpuid >= NR_CPUS) {
  315. prom_printf("Serious problem, boot cpu id >= NR_CPUS\n");
  316. prom_halt();
  317. }
  318. if (cpuid != 0)
  319. printk("boot cpu id != 0, this could work but is untested\n");
  320. current_thread_info()->cpu = cpuid;
  321. cpu_set(cpuid, cpu_online_map);
  322. cpu_set(cpuid, phys_cpu_present_map);
  323. }
  324. int __cpuinit __cpu_up(unsigned int cpu)
  325. {
  326. extern int smp4m_boot_one_cpu(int);
  327. extern int smp4d_boot_one_cpu(int);
  328. int ret=0;
  329. switch(sparc_cpu_model) {
  330. case sun4:
  331. printk("SUN4\n");
  332. BUG();
  333. break;
  334. case sun4c:
  335. printk("SUN4C\n");
  336. BUG();
  337. break;
  338. case sun4m:
  339. ret = smp4m_boot_one_cpu(cpu);
  340. break;
  341. case sun4d:
  342. ret = smp4d_boot_one_cpu(cpu);
  343. break;
  344. case sun4e:
  345. printk("SUN4E\n");
  346. BUG();
  347. break;
  348. case sun4u:
  349. printk("SUN4U\n");
  350. BUG();
  351. break;
  352. default:
  353. printk("UNKNOWN!\n");
  354. BUG();
  355. break;
  356. };
  357. if (!ret) {
  358. cpu_set(cpu, smp_commenced_mask);
  359. while (!cpu_online(cpu))
  360. mb();
  361. }
  362. return ret;
  363. }
  364. void smp_bogo(struct seq_file *m)
  365. {
  366. int i;
  367. for_each_online_cpu(i) {
  368. seq_printf(m,
  369. "Cpu%dBogo\t: %lu.%02lu\n",
  370. i,
  371. cpu_data(i).udelay_val/(500000/HZ),
  372. (cpu_data(i).udelay_val/(5000/HZ))%100);
  373. }
  374. }
  375. void smp_info(struct seq_file *m)
  376. {
  377. int i;
  378. seq_printf(m, "State:\n");
  379. for_each_online_cpu(i)
  380. seq_printf(m, "CPU%d\t\t: online\n", i);
  381. }