cputable.c 31 KB

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  1. /*
  2. * Copyright (C) 2001 Ben. Herrenschmidt (benh@kernel.crashing.org)
  3. *
  4. * Modifications for ppc64:
  5. * Copyright (C) 2003 Dave Engebretsen <engebret@us.ibm.com>
  6. *
  7. * This program is free software; you can redistribute it and/or
  8. * modify it under the terms of the GNU General Public License
  9. * as published by the Free Software Foundation; either version
  10. * 2 of the License, or (at your option) any later version.
  11. */
  12. #include <linux/string.h>
  13. #include <linux/sched.h>
  14. #include <linux/threads.h>
  15. #include <linux/init.h>
  16. #include <linux/module.h>
  17. #include <asm/oprofile_impl.h>
  18. #include <asm/cputable.h>
  19. struct cpu_spec* cur_cpu_spec = NULL;
  20. EXPORT_SYMBOL(cur_cpu_spec);
  21. /* NOTE:
  22. * Unlike ppc32, ppc64 will only call this once for the boot CPU, it's
  23. * the responsibility of the appropriate CPU save/restore functions to
  24. * eventually copy these settings over. Those save/restore aren't yet
  25. * part of the cputable though. That has to be fixed for both ppc32
  26. * and ppc64
  27. */
  28. #ifdef CONFIG_PPC32
  29. extern void __setup_cpu_603(unsigned long offset, struct cpu_spec* spec);
  30. extern void __setup_cpu_604(unsigned long offset, struct cpu_spec* spec);
  31. extern void __setup_cpu_750(unsigned long offset, struct cpu_spec* spec);
  32. extern void __setup_cpu_750cx(unsigned long offset, struct cpu_spec* spec);
  33. extern void __setup_cpu_750fx(unsigned long offset, struct cpu_spec* spec);
  34. extern void __setup_cpu_7400(unsigned long offset, struct cpu_spec* spec);
  35. extern void __setup_cpu_7410(unsigned long offset, struct cpu_spec* spec);
  36. extern void __setup_cpu_745x(unsigned long offset, struct cpu_spec* spec);
  37. #endif /* CONFIG_PPC32 */
  38. extern void __setup_cpu_ppc970(unsigned long offset, struct cpu_spec* spec);
  39. /* This table only contains "desktop" CPUs, it need to be filled with embedded
  40. * ones as well...
  41. */
  42. #define COMMON_USER (PPC_FEATURE_32 | PPC_FEATURE_HAS_FPU | \
  43. PPC_FEATURE_HAS_MMU)
  44. #define COMMON_USER_PPC64 (COMMON_USER | PPC_FEATURE_64)
  45. #define COMMON_USER_POWER4 (COMMON_USER_PPC64 | PPC_FEATURE_POWER4)
  46. #define COMMON_USER_POWER5 (COMMON_USER_PPC64 | PPC_FEATURE_POWER5 |\
  47. PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP)
  48. #define COMMON_USER_POWER5_PLUS (COMMON_USER_PPC64 | PPC_FEATURE_POWER5_PLUS|\
  49. PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP)
  50. #define COMMON_USER_POWER6 (COMMON_USER_PPC64 | PPC_FEATURE_ARCH_2_05 |\
  51. PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP | \
  52. PPC_FEATURE_TRUE_LE)
  53. #define COMMON_USER_BOOKE (PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU | \
  54. PPC_FEATURE_BOOKE)
  55. /* We only set the spe features if the kernel was compiled with
  56. * spe support
  57. */
  58. #ifdef CONFIG_SPE
  59. #define PPC_FEATURE_SPE_COMP PPC_FEATURE_HAS_SPE
  60. #else
  61. #define PPC_FEATURE_SPE_COMP 0
  62. #endif
  63. struct cpu_spec cpu_specs[] = {
  64. #ifdef CONFIG_PPC64
  65. { /* Power3 */
  66. .pvr_mask = 0xffff0000,
  67. .pvr_value = 0x00400000,
  68. .cpu_name = "POWER3 (630)",
  69. .cpu_features = CPU_FTRS_POWER3,
  70. .cpu_user_features = COMMON_USER_PPC64|PPC_FEATURE_PPC_LE,
  71. .icache_bsize = 128,
  72. .dcache_bsize = 128,
  73. .num_pmcs = 8,
  74. .oprofile_cpu_type = "ppc64/power3",
  75. .oprofile_type = PPC_OPROFILE_RS64,
  76. .platform = "power3",
  77. },
  78. { /* Power3+ */
  79. .pvr_mask = 0xffff0000,
  80. .pvr_value = 0x00410000,
  81. .cpu_name = "POWER3 (630+)",
  82. .cpu_features = CPU_FTRS_POWER3,
  83. .cpu_user_features = COMMON_USER_PPC64|PPC_FEATURE_PPC_LE,
  84. .icache_bsize = 128,
  85. .dcache_bsize = 128,
  86. .num_pmcs = 8,
  87. .oprofile_cpu_type = "ppc64/power3",
  88. .oprofile_type = PPC_OPROFILE_RS64,
  89. .platform = "power3",
  90. },
  91. { /* Northstar */
  92. .pvr_mask = 0xffff0000,
  93. .pvr_value = 0x00330000,
  94. .cpu_name = "RS64-II (northstar)",
  95. .cpu_features = CPU_FTRS_RS64,
  96. .cpu_user_features = COMMON_USER_PPC64,
  97. .icache_bsize = 128,
  98. .dcache_bsize = 128,
  99. .num_pmcs = 8,
  100. .oprofile_cpu_type = "ppc64/rs64",
  101. .oprofile_type = PPC_OPROFILE_RS64,
  102. .platform = "rs64",
  103. },
  104. { /* Pulsar */
  105. .pvr_mask = 0xffff0000,
  106. .pvr_value = 0x00340000,
  107. .cpu_name = "RS64-III (pulsar)",
  108. .cpu_features = CPU_FTRS_RS64,
  109. .cpu_user_features = COMMON_USER_PPC64,
  110. .icache_bsize = 128,
  111. .dcache_bsize = 128,
  112. .num_pmcs = 8,
  113. .oprofile_cpu_type = "ppc64/rs64",
  114. .oprofile_type = PPC_OPROFILE_RS64,
  115. .platform = "rs64",
  116. },
  117. { /* I-star */
  118. .pvr_mask = 0xffff0000,
  119. .pvr_value = 0x00360000,
  120. .cpu_name = "RS64-III (icestar)",
  121. .cpu_features = CPU_FTRS_RS64,
  122. .cpu_user_features = COMMON_USER_PPC64,
  123. .icache_bsize = 128,
  124. .dcache_bsize = 128,
  125. .num_pmcs = 8,
  126. .oprofile_cpu_type = "ppc64/rs64",
  127. .oprofile_type = PPC_OPROFILE_RS64,
  128. .platform = "rs64",
  129. },
  130. { /* S-star */
  131. .pvr_mask = 0xffff0000,
  132. .pvr_value = 0x00370000,
  133. .cpu_name = "RS64-IV (sstar)",
  134. .cpu_features = CPU_FTRS_RS64,
  135. .cpu_user_features = COMMON_USER_PPC64,
  136. .icache_bsize = 128,
  137. .dcache_bsize = 128,
  138. .num_pmcs = 8,
  139. .oprofile_cpu_type = "ppc64/rs64",
  140. .oprofile_type = PPC_OPROFILE_RS64,
  141. .platform = "rs64",
  142. },
  143. { /* Power4 */
  144. .pvr_mask = 0xffff0000,
  145. .pvr_value = 0x00350000,
  146. .cpu_name = "POWER4 (gp)",
  147. .cpu_features = CPU_FTRS_POWER4,
  148. .cpu_user_features = COMMON_USER_POWER4,
  149. .icache_bsize = 128,
  150. .dcache_bsize = 128,
  151. .num_pmcs = 8,
  152. .oprofile_cpu_type = "ppc64/power4",
  153. .oprofile_type = PPC_OPROFILE_POWER4,
  154. .platform = "power4",
  155. },
  156. { /* Power4+ */
  157. .pvr_mask = 0xffff0000,
  158. .pvr_value = 0x00380000,
  159. .cpu_name = "POWER4+ (gq)",
  160. .cpu_features = CPU_FTRS_POWER4,
  161. .cpu_user_features = COMMON_USER_POWER4,
  162. .icache_bsize = 128,
  163. .dcache_bsize = 128,
  164. .num_pmcs = 8,
  165. .oprofile_cpu_type = "ppc64/power4",
  166. .oprofile_type = PPC_OPROFILE_POWER4,
  167. .platform = "power4",
  168. },
  169. { /* PPC970 */
  170. .pvr_mask = 0xffff0000,
  171. .pvr_value = 0x00390000,
  172. .cpu_name = "PPC970",
  173. .cpu_features = CPU_FTRS_PPC970,
  174. .cpu_user_features = COMMON_USER_POWER4 |
  175. PPC_FEATURE_HAS_ALTIVEC_COMP,
  176. .icache_bsize = 128,
  177. .dcache_bsize = 128,
  178. .num_pmcs = 8,
  179. .cpu_setup = __setup_cpu_ppc970,
  180. .oprofile_cpu_type = "ppc64/970",
  181. .oprofile_type = PPC_OPROFILE_POWER4,
  182. .platform = "ppc970",
  183. },
  184. { /* PPC970FX */
  185. .pvr_mask = 0xffff0000,
  186. .pvr_value = 0x003c0000,
  187. .cpu_name = "PPC970FX",
  188. .cpu_features = CPU_FTRS_PPC970,
  189. .cpu_user_features = COMMON_USER_POWER4 |
  190. PPC_FEATURE_HAS_ALTIVEC_COMP,
  191. .icache_bsize = 128,
  192. .dcache_bsize = 128,
  193. .num_pmcs = 8,
  194. .cpu_setup = __setup_cpu_ppc970,
  195. .oprofile_cpu_type = "ppc64/970",
  196. .oprofile_type = PPC_OPROFILE_POWER4,
  197. .platform = "ppc970",
  198. },
  199. { /* PPC970MP */
  200. .pvr_mask = 0xffff0000,
  201. .pvr_value = 0x00440000,
  202. .cpu_name = "PPC970MP",
  203. .cpu_features = CPU_FTRS_PPC970,
  204. .cpu_user_features = COMMON_USER_POWER4 |
  205. PPC_FEATURE_HAS_ALTIVEC_COMP,
  206. .icache_bsize = 128,
  207. .dcache_bsize = 128,
  208. .num_pmcs = 8,
  209. .cpu_setup = __setup_cpu_ppc970,
  210. .oprofile_cpu_type = "ppc64/970",
  211. .oprofile_type = PPC_OPROFILE_POWER4,
  212. .platform = "ppc970",
  213. },
  214. { /* Power5 GR */
  215. .pvr_mask = 0xffff0000,
  216. .pvr_value = 0x003a0000,
  217. .cpu_name = "POWER5 (gr)",
  218. .cpu_features = CPU_FTRS_POWER5,
  219. .cpu_user_features = COMMON_USER_POWER5,
  220. .icache_bsize = 128,
  221. .dcache_bsize = 128,
  222. .num_pmcs = 6,
  223. .oprofile_cpu_type = "ppc64/power5",
  224. .oprofile_type = PPC_OPROFILE_POWER4,
  225. /* SIHV / SIPR bits are implemented on POWER4+ (GQ)
  226. * and above but only works on POWER5 and above
  227. */
  228. .oprofile_mmcra_sihv = MMCRA_SIHV,
  229. .oprofile_mmcra_sipr = MMCRA_SIPR,
  230. .platform = "power5",
  231. },
  232. { /* Power5 GS */
  233. .pvr_mask = 0xffff0000,
  234. .pvr_value = 0x003b0000,
  235. .cpu_name = "POWER5+ (gs)",
  236. .cpu_features = CPU_FTRS_POWER5,
  237. .cpu_user_features = COMMON_USER_POWER5_PLUS,
  238. .icache_bsize = 128,
  239. .dcache_bsize = 128,
  240. .num_pmcs = 6,
  241. .oprofile_cpu_type = "ppc64/power5+",
  242. .oprofile_type = PPC_OPROFILE_POWER4,
  243. .oprofile_mmcra_sihv = MMCRA_SIHV,
  244. .oprofile_mmcra_sipr = MMCRA_SIPR,
  245. .platform = "power5+",
  246. },
  247. { /* Power6 */
  248. .pvr_mask = 0xffff0000,
  249. .pvr_value = 0x003e0000,
  250. .cpu_name = "POWER6",
  251. .cpu_features = CPU_FTRS_POWER6,
  252. .cpu_user_features = COMMON_USER_POWER6,
  253. .icache_bsize = 128,
  254. .dcache_bsize = 128,
  255. .num_pmcs = 8,
  256. .oprofile_cpu_type = "ppc64/power6",
  257. .oprofile_type = PPC_OPROFILE_POWER4,
  258. .oprofile_mmcra_sihv = POWER6_MMCRA_SIHV,
  259. .oprofile_mmcra_sipr = POWER6_MMCRA_SIPR,
  260. .oprofile_mmcra_clear = POWER6_MMCRA_THRM |
  261. POWER6_MMCRA_OTHER,
  262. .platform = "power6",
  263. },
  264. { /* Cell Broadband Engine */
  265. .pvr_mask = 0xffff0000,
  266. .pvr_value = 0x00700000,
  267. .cpu_name = "Cell Broadband Engine",
  268. .cpu_features = CPU_FTRS_CELL,
  269. .cpu_user_features = COMMON_USER_PPC64 |
  270. PPC_FEATURE_CELL | PPC_FEATURE_HAS_ALTIVEC_COMP |
  271. PPC_FEATURE_SMT,
  272. .icache_bsize = 128,
  273. .dcache_bsize = 128,
  274. .platform = "ppc-cell-be",
  275. },
  276. { /* default match */
  277. .pvr_mask = 0x00000000,
  278. .pvr_value = 0x00000000,
  279. .cpu_name = "POWER4 (compatible)",
  280. .cpu_features = CPU_FTRS_COMPATIBLE,
  281. .cpu_user_features = COMMON_USER_PPC64,
  282. .icache_bsize = 128,
  283. .dcache_bsize = 128,
  284. .num_pmcs = 6,
  285. .platform = "power4",
  286. }
  287. #endif /* CONFIG_PPC64 */
  288. #ifdef CONFIG_PPC32
  289. #if CLASSIC_PPC
  290. { /* 601 */
  291. .pvr_mask = 0xffff0000,
  292. .pvr_value = 0x00010000,
  293. .cpu_name = "601",
  294. .cpu_features = CPU_FTRS_PPC601,
  295. .cpu_user_features = COMMON_USER | PPC_FEATURE_601_INSTR |
  296. PPC_FEATURE_UNIFIED_CACHE | PPC_FEATURE_NO_TB,
  297. .icache_bsize = 32,
  298. .dcache_bsize = 32,
  299. .platform = "ppc601",
  300. },
  301. { /* 603 */
  302. .pvr_mask = 0xffff0000,
  303. .pvr_value = 0x00030000,
  304. .cpu_name = "603",
  305. .cpu_features = CPU_FTRS_603,
  306. .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
  307. .icache_bsize = 32,
  308. .dcache_bsize = 32,
  309. .cpu_setup = __setup_cpu_603,
  310. .platform = "ppc603",
  311. },
  312. { /* 603e */
  313. .pvr_mask = 0xffff0000,
  314. .pvr_value = 0x00060000,
  315. .cpu_name = "603e",
  316. .cpu_features = CPU_FTRS_603,
  317. .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
  318. .icache_bsize = 32,
  319. .dcache_bsize = 32,
  320. .cpu_setup = __setup_cpu_603,
  321. .platform = "ppc603",
  322. },
  323. { /* 603ev */
  324. .pvr_mask = 0xffff0000,
  325. .pvr_value = 0x00070000,
  326. .cpu_name = "603ev",
  327. .cpu_features = CPU_FTRS_603,
  328. .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
  329. .icache_bsize = 32,
  330. .dcache_bsize = 32,
  331. .cpu_setup = __setup_cpu_603,
  332. .platform = "ppc603",
  333. },
  334. { /* 604 */
  335. .pvr_mask = 0xffff0000,
  336. .pvr_value = 0x00040000,
  337. .cpu_name = "604",
  338. .cpu_features = CPU_FTRS_604,
  339. .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
  340. .icache_bsize = 32,
  341. .dcache_bsize = 32,
  342. .num_pmcs = 2,
  343. .cpu_setup = __setup_cpu_604,
  344. .platform = "ppc604",
  345. },
  346. { /* 604e */
  347. .pvr_mask = 0xfffff000,
  348. .pvr_value = 0x00090000,
  349. .cpu_name = "604e",
  350. .cpu_features = CPU_FTRS_604,
  351. .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
  352. .icache_bsize = 32,
  353. .dcache_bsize = 32,
  354. .num_pmcs = 4,
  355. .cpu_setup = __setup_cpu_604,
  356. .platform = "ppc604",
  357. },
  358. { /* 604r */
  359. .pvr_mask = 0xffff0000,
  360. .pvr_value = 0x00090000,
  361. .cpu_name = "604r",
  362. .cpu_features = CPU_FTRS_604,
  363. .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
  364. .icache_bsize = 32,
  365. .dcache_bsize = 32,
  366. .num_pmcs = 4,
  367. .cpu_setup = __setup_cpu_604,
  368. .platform = "ppc604",
  369. },
  370. { /* 604ev */
  371. .pvr_mask = 0xffff0000,
  372. .pvr_value = 0x000a0000,
  373. .cpu_name = "604ev",
  374. .cpu_features = CPU_FTRS_604,
  375. .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
  376. .icache_bsize = 32,
  377. .dcache_bsize = 32,
  378. .num_pmcs = 4,
  379. .cpu_setup = __setup_cpu_604,
  380. .platform = "ppc604",
  381. },
  382. { /* 740/750 (0x4202, don't support TAU ?) */
  383. .pvr_mask = 0xffffffff,
  384. .pvr_value = 0x00084202,
  385. .cpu_name = "740/750",
  386. .cpu_features = CPU_FTRS_740_NOTAU,
  387. .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
  388. .icache_bsize = 32,
  389. .dcache_bsize = 32,
  390. .num_pmcs = 4,
  391. .cpu_setup = __setup_cpu_750,
  392. .platform = "ppc750",
  393. },
  394. { /* 750CX (80100 and 8010x?) */
  395. .pvr_mask = 0xfffffff0,
  396. .pvr_value = 0x00080100,
  397. .cpu_name = "750CX",
  398. .cpu_features = CPU_FTRS_750,
  399. .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
  400. .icache_bsize = 32,
  401. .dcache_bsize = 32,
  402. .num_pmcs = 4,
  403. .cpu_setup = __setup_cpu_750cx,
  404. .platform = "ppc750",
  405. },
  406. { /* 750CX (82201 and 82202) */
  407. .pvr_mask = 0xfffffff0,
  408. .pvr_value = 0x00082200,
  409. .cpu_name = "750CX",
  410. .cpu_features = CPU_FTRS_750,
  411. .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
  412. .icache_bsize = 32,
  413. .dcache_bsize = 32,
  414. .num_pmcs = 4,
  415. .cpu_setup = __setup_cpu_750cx,
  416. .platform = "ppc750",
  417. },
  418. { /* 750CXe (82214) */
  419. .pvr_mask = 0xfffffff0,
  420. .pvr_value = 0x00082210,
  421. .cpu_name = "750CXe",
  422. .cpu_features = CPU_FTRS_750,
  423. .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
  424. .icache_bsize = 32,
  425. .dcache_bsize = 32,
  426. .num_pmcs = 4,
  427. .cpu_setup = __setup_cpu_750cx,
  428. .platform = "ppc750",
  429. },
  430. { /* 750CXe "Gekko" (83214) */
  431. .pvr_mask = 0xffffffff,
  432. .pvr_value = 0x00083214,
  433. .cpu_name = "750CXe",
  434. .cpu_features = CPU_FTRS_750,
  435. .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
  436. .icache_bsize = 32,
  437. .dcache_bsize = 32,
  438. .num_pmcs = 4,
  439. .cpu_setup = __setup_cpu_750cx,
  440. .platform = "ppc750",
  441. },
  442. { /* 745/755 */
  443. .pvr_mask = 0xfffff000,
  444. .pvr_value = 0x00083000,
  445. .cpu_name = "745/755",
  446. .cpu_features = CPU_FTRS_750,
  447. .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
  448. .icache_bsize = 32,
  449. .dcache_bsize = 32,
  450. .num_pmcs = 4,
  451. .cpu_setup = __setup_cpu_750,
  452. .platform = "ppc750",
  453. },
  454. { /* 750FX rev 1.x */
  455. .pvr_mask = 0xffffff00,
  456. .pvr_value = 0x70000100,
  457. .cpu_name = "750FX",
  458. .cpu_features = CPU_FTRS_750FX1,
  459. .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
  460. .icache_bsize = 32,
  461. .dcache_bsize = 32,
  462. .num_pmcs = 4,
  463. .cpu_setup = __setup_cpu_750,
  464. .platform = "ppc750",
  465. },
  466. { /* 750FX rev 2.0 must disable HID0[DPM] */
  467. .pvr_mask = 0xffffffff,
  468. .pvr_value = 0x70000200,
  469. .cpu_name = "750FX",
  470. .cpu_features = CPU_FTRS_750FX2,
  471. .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
  472. .icache_bsize = 32,
  473. .dcache_bsize = 32,
  474. .num_pmcs = 4,
  475. .cpu_setup = __setup_cpu_750,
  476. .platform = "ppc750",
  477. },
  478. { /* 750FX (All revs except 2.0) */
  479. .pvr_mask = 0xffff0000,
  480. .pvr_value = 0x70000000,
  481. .cpu_name = "750FX",
  482. .cpu_features = CPU_FTRS_750FX,
  483. .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
  484. .icache_bsize = 32,
  485. .dcache_bsize = 32,
  486. .num_pmcs = 4,
  487. .cpu_setup = __setup_cpu_750fx,
  488. .platform = "ppc750",
  489. },
  490. { /* 750GX */
  491. .pvr_mask = 0xffff0000,
  492. .pvr_value = 0x70020000,
  493. .cpu_name = "750GX",
  494. .cpu_features = CPU_FTRS_750GX,
  495. .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
  496. .icache_bsize = 32,
  497. .dcache_bsize = 32,
  498. .num_pmcs = 4,
  499. .cpu_setup = __setup_cpu_750fx,
  500. .platform = "ppc750",
  501. },
  502. { /* 740/750 (L2CR bit need fixup for 740) */
  503. .pvr_mask = 0xffff0000,
  504. .pvr_value = 0x00080000,
  505. .cpu_name = "740/750",
  506. .cpu_features = CPU_FTRS_740,
  507. .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
  508. .icache_bsize = 32,
  509. .dcache_bsize = 32,
  510. .num_pmcs = 4,
  511. .cpu_setup = __setup_cpu_750,
  512. .platform = "ppc750",
  513. },
  514. { /* 7400 rev 1.1 ? (no TAU) */
  515. .pvr_mask = 0xffffffff,
  516. .pvr_value = 0x000c1101,
  517. .cpu_name = "7400 (1.1)",
  518. .cpu_features = CPU_FTRS_7400_NOTAU,
  519. .cpu_user_features = COMMON_USER |
  520. PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
  521. .icache_bsize = 32,
  522. .dcache_bsize = 32,
  523. .num_pmcs = 4,
  524. .cpu_setup = __setup_cpu_7400,
  525. .platform = "ppc7400",
  526. },
  527. { /* 7400 */
  528. .pvr_mask = 0xffff0000,
  529. .pvr_value = 0x000c0000,
  530. .cpu_name = "7400",
  531. .cpu_features = CPU_FTRS_7400,
  532. .cpu_user_features = COMMON_USER |
  533. PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
  534. .icache_bsize = 32,
  535. .dcache_bsize = 32,
  536. .num_pmcs = 4,
  537. .cpu_setup = __setup_cpu_7400,
  538. .platform = "ppc7400",
  539. },
  540. { /* 7410 */
  541. .pvr_mask = 0xffff0000,
  542. .pvr_value = 0x800c0000,
  543. .cpu_name = "7410",
  544. .cpu_features = CPU_FTRS_7400,
  545. .cpu_user_features = COMMON_USER |
  546. PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
  547. .icache_bsize = 32,
  548. .dcache_bsize = 32,
  549. .num_pmcs = 4,
  550. .cpu_setup = __setup_cpu_7410,
  551. .platform = "ppc7400",
  552. },
  553. { /* 7450 2.0 - no doze/nap */
  554. .pvr_mask = 0xffffffff,
  555. .pvr_value = 0x80000200,
  556. .cpu_name = "7450",
  557. .cpu_features = CPU_FTRS_7450_20,
  558. .cpu_user_features = COMMON_USER |
  559. PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
  560. .icache_bsize = 32,
  561. .dcache_bsize = 32,
  562. .num_pmcs = 6,
  563. .cpu_setup = __setup_cpu_745x,
  564. .oprofile_cpu_type = "ppc/7450",
  565. .oprofile_type = PPC_OPROFILE_G4,
  566. .platform = "ppc7450",
  567. },
  568. { /* 7450 2.1 */
  569. .pvr_mask = 0xffffffff,
  570. .pvr_value = 0x80000201,
  571. .cpu_name = "7450",
  572. .cpu_features = CPU_FTRS_7450_21,
  573. .cpu_user_features = COMMON_USER |
  574. PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
  575. .icache_bsize = 32,
  576. .dcache_bsize = 32,
  577. .num_pmcs = 6,
  578. .cpu_setup = __setup_cpu_745x,
  579. .oprofile_cpu_type = "ppc/7450",
  580. .oprofile_type = PPC_OPROFILE_G4,
  581. .platform = "ppc7450",
  582. },
  583. { /* 7450 2.3 and newer */
  584. .pvr_mask = 0xffff0000,
  585. .pvr_value = 0x80000000,
  586. .cpu_name = "7450",
  587. .cpu_features = CPU_FTRS_7450_23,
  588. .cpu_user_features = COMMON_USER |
  589. PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
  590. .icache_bsize = 32,
  591. .dcache_bsize = 32,
  592. .num_pmcs = 6,
  593. .cpu_setup = __setup_cpu_745x,
  594. .oprofile_cpu_type = "ppc/7450",
  595. .oprofile_type = PPC_OPROFILE_G4,
  596. .platform = "ppc7450",
  597. },
  598. { /* 7455 rev 1.x */
  599. .pvr_mask = 0xffffff00,
  600. .pvr_value = 0x80010100,
  601. .cpu_name = "7455",
  602. .cpu_features = CPU_FTRS_7455_1,
  603. .cpu_user_features = COMMON_USER |
  604. PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
  605. .icache_bsize = 32,
  606. .dcache_bsize = 32,
  607. .num_pmcs = 6,
  608. .cpu_setup = __setup_cpu_745x,
  609. .oprofile_cpu_type = "ppc/7450",
  610. .oprofile_type = PPC_OPROFILE_G4,
  611. .platform = "ppc7450",
  612. },
  613. { /* 7455 rev 2.0 */
  614. .pvr_mask = 0xffffffff,
  615. .pvr_value = 0x80010200,
  616. .cpu_name = "7455",
  617. .cpu_features = CPU_FTRS_7455_20,
  618. .cpu_user_features = COMMON_USER |
  619. PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
  620. .icache_bsize = 32,
  621. .dcache_bsize = 32,
  622. .num_pmcs = 6,
  623. .cpu_setup = __setup_cpu_745x,
  624. .oprofile_cpu_type = "ppc/7450",
  625. .oprofile_type = PPC_OPROFILE_G4,
  626. .platform = "ppc7450",
  627. },
  628. { /* 7455 others */
  629. .pvr_mask = 0xffff0000,
  630. .pvr_value = 0x80010000,
  631. .cpu_name = "7455",
  632. .cpu_features = CPU_FTRS_7455,
  633. .cpu_user_features = COMMON_USER |
  634. PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
  635. .icache_bsize = 32,
  636. .dcache_bsize = 32,
  637. .num_pmcs = 6,
  638. .cpu_setup = __setup_cpu_745x,
  639. .oprofile_cpu_type = "ppc/7450",
  640. .oprofile_type = PPC_OPROFILE_G4,
  641. .platform = "ppc7450",
  642. },
  643. { /* 7447/7457 Rev 1.0 */
  644. .pvr_mask = 0xffffffff,
  645. .pvr_value = 0x80020100,
  646. .cpu_name = "7447/7457",
  647. .cpu_features = CPU_FTRS_7447_10,
  648. .cpu_user_features = COMMON_USER |
  649. PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
  650. .icache_bsize = 32,
  651. .dcache_bsize = 32,
  652. .num_pmcs = 6,
  653. .cpu_setup = __setup_cpu_745x,
  654. .oprofile_cpu_type = "ppc/7450",
  655. .oprofile_type = PPC_OPROFILE_G4,
  656. .platform = "ppc7450",
  657. },
  658. { /* 7447/7457 Rev 1.1 */
  659. .pvr_mask = 0xffffffff,
  660. .pvr_value = 0x80020101,
  661. .cpu_name = "7447/7457",
  662. .cpu_features = CPU_FTRS_7447_10,
  663. .cpu_user_features = COMMON_USER |
  664. PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
  665. .icache_bsize = 32,
  666. .dcache_bsize = 32,
  667. .num_pmcs = 6,
  668. .cpu_setup = __setup_cpu_745x,
  669. .oprofile_cpu_type = "ppc/7450",
  670. .oprofile_type = PPC_OPROFILE_G4,
  671. .platform = "ppc7450",
  672. },
  673. { /* 7447/7457 Rev 1.2 and later */
  674. .pvr_mask = 0xffff0000,
  675. .pvr_value = 0x80020000,
  676. .cpu_name = "7447/7457",
  677. .cpu_features = CPU_FTRS_7447,
  678. .cpu_user_features = COMMON_USER | PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
  679. .icache_bsize = 32,
  680. .dcache_bsize = 32,
  681. .num_pmcs = 6,
  682. .cpu_setup = __setup_cpu_745x,
  683. .oprofile_cpu_type = "ppc/7450",
  684. .oprofile_type = PPC_OPROFILE_G4,
  685. .platform = "ppc7450",
  686. },
  687. { /* 7447A */
  688. .pvr_mask = 0xffff0000,
  689. .pvr_value = 0x80030000,
  690. .cpu_name = "7447A",
  691. .cpu_features = CPU_FTRS_7447A,
  692. .cpu_user_features = COMMON_USER |
  693. PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
  694. .icache_bsize = 32,
  695. .dcache_bsize = 32,
  696. .num_pmcs = 6,
  697. .cpu_setup = __setup_cpu_745x,
  698. .oprofile_cpu_type = "ppc/7450",
  699. .oprofile_type = PPC_OPROFILE_G4,
  700. .platform = "ppc7450",
  701. },
  702. { /* 7448 */
  703. .pvr_mask = 0xffff0000,
  704. .pvr_value = 0x80040000,
  705. .cpu_name = "7448",
  706. .cpu_features = CPU_FTRS_7447A,
  707. .cpu_user_features = COMMON_USER |
  708. PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
  709. .icache_bsize = 32,
  710. .dcache_bsize = 32,
  711. .num_pmcs = 6,
  712. .cpu_setup = __setup_cpu_745x,
  713. .oprofile_cpu_type = "ppc/7450",
  714. .oprofile_type = PPC_OPROFILE_G4,
  715. .platform = "ppc7450",
  716. },
  717. { /* 82xx (8240, 8245, 8260 are all 603e cores) */
  718. .pvr_mask = 0x7fff0000,
  719. .pvr_value = 0x00810000,
  720. .cpu_name = "82xx",
  721. .cpu_features = CPU_FTRS_82XX,
  722. .cpu_user_features = COMMON_USER,
  723. .icache_bsize = 32,
  724. .dcache_bsize = 32,
  725. .cpu_setup = __setup_cpu_603,
  726. .platform = "ppc603",
  727. },
  728. { /* All G2_LE (603e core, plus some) have the same pvr */
  729. .pvr_mask = 0x7fff0000,
  730. .pvr_value = 0x00820000,
  731. .cpu_name = "G2_LE",
  732. .cpu_features = CPU_FTRS_G2_LE,
  733. .cpu_user_features = COMMON_USER,
  734. .icache_bsize = 32,
  735. .dcache_bsize = 32,
  736. .cpu_setup = __setup_cpu_603,
  737. .platform = "ppc603",
  738. },
  739. { /* e300 (a 603e core, plus some) on 83xx */
  740. .pvr_mask = 0x7fff0000,
  741. .pvr_value = 0x00830000,
  742. .cpu_name = "e300",
  743. .cpu_features = CPU_FTRS_E300,
  744. .cpu_user_features = COMMON_USER,
  745. .icache_bsize = 32,
  746. .dcache_bsize = 32,
  747. .cpu_setup = __setup_cpu_603,
  748. .platform = "ppc603",
  749. },
  750. { /* default match, we assume split I/D cache & TB (non-601)... */
  751. .pvr_mask = 0x00000000,
  752. .pvr_value = 0x00000000,
  753. .cpu_name = "(generic PPC)",
  754. .cpu_features = CPU_FTRS_CLASSIC32,
  755. .cpu_user_features = COMMON_USER,
  756. .icache_bsize = 32,
  757. .dcache_bsize = 32,
  758. .platform = "ppc603",
  759. },
  760. #endif /* CLASSIC_PPC */
  761. #ifdef CONFIG_8xx
  762. { /* 8xx */
  763. .pvr_mask = 0xffff0000,
  764. .pvr_value = 0x00500000,
  765. .cpu_name = "8xx",
  766. /* CPU_FTR_MAYBE_CAN_DOZE is possible,
  767. * if the 8xx code is there.... */
  768. .cpu_features = CPU_FTRS_8XX,
  769. .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
  770. .icache_bsize = 16,
  771. .dcache_bsize = 16,
  772. .platform = "ppc823",
  773. },
  774. #endif /* CONFIG_8xx */
  775. #ifdef CONFIG_40x
  776. { /* 403GC */
  777. .pvr_mask = 0xffffff00,
  778. .pvr_value = 0x00200200,
  779. .cpu_name = "403GC",
  780. .cpu_features = CPU_FTRS_40X,
  781. .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
  782. .icache_bsize = 16,
  783. .dcache_bsize = 16,
  784. .platform = "ppc403",
  785. },
  786. { /* 403GCX */
  787. .pvr_mask = 0xffffff00,
  788. .pvr_value = 0x00201400,
  789. .cpu_name = "403GCX",
  790. .cpu_features = CPU_FTRS_40X,
  791. .cpu_user_features = PPC_FEATURE_32 |
  792. PPC_FEATURE_HAS_MMU | PPC_FEATURE_NO_TB,
  793. .icache_bsize = 16,
  794. .dcache_bsize = 16,
  795. .platform = "ppc403",
  796. },
  797. { /* 403G ?? */
  798. .pvr_mask = 0xffff0000,
  799. .pvr_value = 0x00200000,
  800. .cpu_name = "403G ??",
  801. .cpu_features = CPU_FTRS_40X,
  802. .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
  803. .icache_bsize = 16,
  804. .dcache_bsize = 16,
  805. .platform = "ppc403",
  806. },
  807. { /* 405GP */
  808. .pvr_mask = 0xffff0000,
  809. .pvr_value = 0x40110000,
  810. .cpu_name = "405GP",
  811. .cpu_features = CPU_FTRS_40X,
  812. .cpu_user_features = PPC_FEATURE_32 |
  813. PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
  814. .icache_bsize = 32,
  815. .dcache_bsize = 32,
  816. .platform = "ppc405",
  817. },
  818. { /* STB 03xxx */
  819. .pvr_mask = 0xffff0000,
  820. .pvr_value = 0x40130000,
  821. .cpu_name = "STB03xxx",
  822. .cpu_features = CPU_FTRS_40X,
  823. .cpu_user_features = PPC_FEATURE_32 |
  824. PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
  825. .icache_bsize = 32,
  826. .dcache_bsize = 32,
  827. .platform = "ppc405",
  828. },
  829. { /* STB 04xxx */
  830. .pvr_mask = 0xffff0000,
  831. .pvr_value = 0x41810000,
  832. .cpu_name = "STB04xxx",
  833. .cpu_features = CPU_FTRS_40X,
  834. .cpu_user_features = PPC_FEATURE_32 |
  835. PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
  836. .icache_bsize = 32,
  837. .dcache_bsize = 32,
  838. .platform = "ppc405",
  839. },
  840. { /* NP405L */
  841. .pvr_mask = 0xffff0000,
  842. .pvr_value = 0x41610000,
  843. .cpu_name = "NP405L",
  844. .cpu_features = CPU_FTRS_40X,
  845. .cpu_user_features = PPC_FEATURE_32 |
  846. PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
  847. .icache_bsize = 32,
  848. .dcache_bsize = 32,
  849. .platform = "ppc405",
  850. },
  851. { /* NP4GS3 */
  852. .pvr_mask = 0xffff0000,
  853. .pvr_value = 0x40B10000,
  854. .cpu_name = "NP4GS3",
  855. .cpu_features = CPU_FTRS_40X,
  856. .cpu_user_features = PPC_FEATURE_32 |
  857. PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
  858. .icache_bsize = 32,
  859. .dcache_bsize = 32,
  860. .platform = "ppc405",
  861. },
  862. { /* NP405H */
  863. .pvr_mask = 0xffff0000,
  864. .pvr_value = 0x41410000,
  865. .cpu_name = "NP405H",
  866. .cpu_features = CPU_FTRS_40X,
  867. .cpu_user_features = PPC_FEATURE_32 |
  868. PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
  869. .icache_bsize = 32,
  870. .dcache_bsize = 32,
  871. .platform = "ppc405",
  872. },
  873. { /* 405GPr */
  874. .pvr_mask = 0xffff0000,
  875. .pvr_value = 0x50910000,
  876. .cpu_name = "405GPr",
  877. .cpu_features = CPU_FTRS_40X,
  878. .cpu_user_features = PPC_FEATURE_32 |
  879. PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
  880. .icache_bsize = 32,
  881. .dcache_bsize = 32,
  882. .platform = "ppc405",
  883. },
  884. { /* STBx25xx */
  885. .pvr_mask = 0xffff0000,
  886. .pvr_value = 0x51510000,
  887. .cpu_name = "STBx25xx",
  888. .cpu_features = CPU_FTRS_40X,
  889. .cpu_user_features = PPC_FEATURE_32 |
  890. PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
  891. .icache_bsize = 32,
  892. .dcache_bsize = 32,
  893. .platform = "ppc405",
  894. },
  895. { /* 405LP */
  896. .pvr_mask = 0xffff0000,
  897. .pvr_value = 0x41F10000,
  898. .cpu_name = "405LP",
  899. .cpu_features = CPU_FTRS_40X,
  900. .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
  901. .icache_bsize = 32,
  902. .dcache_bsize = 32,
  903. .platform = "ppc405",
  904. },
  905. { /* Xilinx Virtex-II Pro */
  906. .pvr_mask = 0xfffff000,
  907. .pvr_value = 0x20010000,
  908. .cpu_name = "Virtex-II Pro",
  909. .cpu_features = CPU_FTRS_40X,
  910. .cpu_user_features = PPC_FEATURE_32 |
  911. PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
  912. .icache_bsize = 32,
  913. .dcache_bsize = 32,
  914. .platform = "ppc405",
  915. },
  916. { /* Xilinx Virtex-4 FX */
  917. .pvr_mask = 0xfffff000,
  918. .pvr_value = 0x20011000,
  919. .cpu_name = "Virtex-4 FX",
  920. .cpu_features = CPU_FTRS_40X,
  921. .cpu_user_features = PPC_FEATURE_32 |
  922. PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
  923. .icache_bsize = 32,
  924. .dcache_bsize = 32,
  925. },
  926. { /* 405EP */
  927. .pvr_mask = 0xffff0000,
  928. .pvr_value = 0x51210000,
  929. .cpu_name = "405EP",
  930. .cpu_features = CPU_FTRS_40X,
  931. .cpu_user_features = PPC_FEATURE_32 |
  932. PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
  933. .icache_bsize = 32,
  934. .dcache_bsize = 32,
  935. .platform = "ppc405",
  936. },
  937. #endif /* CONFIG_40x */
  938. #ifdef CONFIG_44x
  939. {
  940. .pvr_mask = 0xf0000fff,
  941. .pvr_value = 0x40000850,
  942. .cpu_name = "440EP Rev. A",
  943. .cpu_features = CPU_FTRS_44X,
  944. .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
  945. .icache_bsize = 32,
  946. .dcache_bsize = 32,
  947. .platform = "ppc440",
  948. },
  949. {
  950. .pvr_mask = 0xf0000fff,
  951. .pvr_value = 0x400008d3,
  952. .cpu_name = "440EP Rev. B",
  953. .cpu_features = CPU_FTRS_44X,
  954. .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
  955. .icache_bsize = 32,
  956. .dcache_bsize = 32,
  957. .platform = "ppc440",
  958. },
  959. { /* 440GP Rev. B */
  960. .pvr_mask = 0xf0000fff,
  961. .pvr_value = 0x40000440,
  962. .cpu_name = "440GP Rev. B",
  963. .cpu_features = CPU_FTRS_44X,
  964. .cpu_user_features = COMMON_USER_BOOKE,
  965. .icache_bsize = 32,
  966. .dcache_bsize = 32,
  967. .platform = "ppc440gp",
  968. },
  969. { /* 440GP Rev. C */
  970. .pvr_mask = 0xf0000fff,
  971. .pvr_value = 0x40000481,
  972. .cpu_name = "440GP Rev. C",
  973. .cpu_features = CPU_FTRS_44X,
  974. .cpu_user_features = COMMON_USER_BOOKE,
  975. .icache_bsize = 32,
  976. .dcache_bsize = 32,
  977. .platform = "ppc440gp",
  978. },
  979. { /* 440GX Rev. A */
  980. .pvr_mask = 0xf0000fff,
  981. .pvr_value = 0x50000850,
  982. .cpu_name = "440GX Rev. A",
  983. .cpu_features = CPU_FTRS_44X,
  984. .cpu_user_features = COMMON_USER_BOOKE,
  985. .icache_bsize = 32,
  986. .dcache_bsize = 32,
  987. .platform = "ppc440",
  988. },
  989. { /* 440GX Rev. B */
  990. .pvr_mask = 0xf0000fff,
  991. .pvr_value = 0x50000851,
  992. .cpu_name = "440GX Rev. B",
  993. .cpu_features = CPU_FTRS_44X,
  994. .cpu_user_features = COMMON_USER_BOOKE,
  995. .icache_bsize = 32,
  996. .dcache_bsize = 32,
  997. .platform = "ppc440",
  998. },
  999. { /* 440GX Rev. C */
  1000. .pvr_mask = 0xf0000fff,
  1001. .pvr_value = 0x50000892,
  1002. .cpu_name = "440GX Rev. C",
  1003. .cpu_features = CPU_FTRS_44X,
  1004. .cpu_user_features = COMMON_USER_BOOKE,
  1005. .icache_bsize = 32,
  1006. .dcache_bsize = 32,
  1007. .platform = "ppc440",
  1008. },
  1009. { /* 440GX Rev. F */
  1010. .pvr_mask = 0xf0000fff,
  1011. .pvr_value = 0x50000894,
  1012. .cpu_name = "440GX Rev. F",
  1013. .cpu_features = CPU_FTRS_44X,
  1014. .cpu_user_features = COMMON_USER_BOOKE,
  1015. .icache_bsize = 32,
  1016. .dcache_bsize = 32,
  1017. .platform = "ppc440",
  1018. },
  1019. { /* 440SP Rev. A */
  1020. .pvr_mask = 0xff000fff,
  1021. .pvr_value = 0x53000891,
  1022. .cpu_name = "440SP Rev. A",
  1023. .cpu_features = CPU_FTRS_44X,
  1024. .cpu_user_features = COMMON_USER_BOOKE,
  1025. .icache_bsize = 32,
  1026. .dcache_bsize = 32,
  1027. .platform = "ppc440",
  1028. },
  1029. { /* 440SPe Rev. A */
  1030. .pvr_mask = 0xff000fff,
  1031. .pvr_value = 0x53000890,
  1032. .cpu_name = "440SPe Rev. A",
  1033. .cpu_features = CPU_FTR_SPLIT_ID_CACHE |
  1034. CPU_FTR_USE_TB,
  1035. .cpu_user_features = COMMON_USER_BOOKE,
  1036. .icache_bsize = 32,
  1037. .dcache_bsize = 32,
  1038. .platform = "ppc440",
  1039. },
  1040. #endif /* CONFIG_44x */
  1041. #ifdef CONFIG_FSL_BOOKE
  1042. { /* e200z5 */
  1043. .pvr_mask = 0xfff00000,
  1044. .pvr_value = 0x81000000,
  1045. .cpu_name = "e200z5",
  1046. /* xxx - galak: add CPU_FTR_MAYBE_CAN_DOZE */
  1047. .cpu_features = CPU_FTRS_E200,
  1048. .cpu_user_features = COMMON_USER_BOOKE |
  1049. PPC_FEATURE_HAS_EFP_SINGLE |
  1050. PPC_FEATURE_UNIFIED_CACHE,
  1051. .dcache_bsize = 32,
  1052. .platform = "ppc5554",
  1053. },
  1054. { /* e200z6 */
  1055. .pvr_mask = 0xfff00000,
  1056. .pvr_value = 0x81100000,
  1057. .cpu_name = "e200z6",
  1058. /* xxx - galak: add CPU_FTR_MAYBE_CAN_DOZE */
  1059. .cpu_features = CPU_FTRS_E200,
  1060. .cpu_user_features = COMMON_USER_BOOKE |
  1061. PPC_FEATURE_SPE_COMP |
  1062. PPC_FEATURE_HAS_EFP_SINGLE |
  1063. PPC_FEATURE_UNIFIED_CACHE,
  1064. .dcache_bsize = 32,
  1065. .platform = "ppc5554",
  1066. },
  1067. { /* e500 */
  1068. .pvr_mask = 0xffff0000,
  1069. .pvr_value = 0x80200000,
  1070. .cpu_name = "e500",
  1071. /* xxx - galak: add CPU_FTR_MAYBE_CAN_DOZE */
  1072. .cpu_features = CPU_FTRS_E500,
  1073. .cpu_user_features = COMMON_USER_BOOKE |
  1074. PPC_FEATURE_SPE_COMP |
  1075. PPC_FEATURE_HAS_EFP_SINGLE,
  1076. .icache_bsize = 32,
  1077. .dcache_bsize = 32,
  1078. .num_pmcs = 4,
  1079. .oprofile_cpu_type = "ppc/e500",
  1080. .oprofile_type = PPC_OPROFILE_BOOKE,
  1081. .platform = "ppc8540",
  1082. },
  1083. { /* e500v2 */
  1084. .pvr_mask = 0xffff0000,
  1085. .pvr_value = 0x80210000,
  1086. .cpu_name = "e500v2",
  1087. /* xxx - galak: add CPU_FTR_MAYBE_CAN_DOZE */
  1088. .cpu_features = CPU_FTRS_E500_2,
  1089. .cpu_user_features = COMMON_USER_BOOKE |
  1090. PPC_FEATURE_SPE_COMP |
  1091. PPC_FEATURE_HAS_EFP_SINGLE |
  1092. PPC_FEATURE_HAS_EFP_DOUBLE,
  1093. .icache_bsize = 32,
  1094. .dcache_bsize = 32,
  1095. .num_pmcs = 4,
  1096. .oprofile_cpu_type = "ppc/e500",
  1097. .oprofile_type = PPC_OPROFILE_BOOKE,
  1098. .platform = "ppc8548",
  1099. },
  1100. #endif
  1101. #if !CLASSIC_PPC
  1102. { /* default match */
  1103. .pvr_mask = 0x00000000,
  1104. .pvr_value = 0x00000000,
  1105. .cpu_name = "(generic PPC)",
  1106. .cpu_features = CPU_FTRS_GENERIC_32,
  1107. .cpu_user_features = PPC_FEATURE_32,
  1108. .icache_bsize = 32,
  1109. .dcache_bsize = 32,
  1110. .platform = "powerpc",
  1111. }
  1112. #endif /* !CLASSIC_PPC */
  1113. #endif /* CONFIG_PPC32 */
  1114. };