nv50_software.c 4.9 KB

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  1. /*
  2. * Copyright 2012 Red Hat Inc.
  3. *
  4. * Permission is hereby granted, free of charge, to any person obtaining a
  5. * copy of this software and associated documentation files (the "Software"),
  6. * to deal in the Software without restriction, including without limitation
  7. * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  8. * and/or sell copies of the Software, and to permit persons to whom the
  9. * Software is furnished to do so, subject to the following conditions:
  10. *
  11. * The above copyright notice and this permission notice shall be included in
  12. * all copies or substantial portions of the Software.
  13. *
  14. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  15. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  16. * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  17. * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  18. * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  19. * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  20. * OTHER DEALINGS IN THE SOFTWARE.
  21. *
  22. * Authors: Ben Skeggs
  23. */
  24. #include "drmP.h"
  25. #include "nouveau_drv.h"
  26. #include "nouveau_ramht.h"
  27. #include "nouveau_software.h"
  28. struct nv50_software_priv {
  29. struct nouveau_software_priv base;
  30. };
  31. struct nv50_software_chan {
  32. struct nouveau_software_chan base;
  33. struct {
  34. struct nouveau_gpuobj *object;
  35. } vblank;
  36. };
  37. static int
  38. mthd_dma_vblsem(struct nouveau_channel *chan, u32 class, u32 mthd, u32 data)
  39. {
  40. struct nv50_software_chan *pch = chan->engctx[NVOBJ_ENGINE_SW];
  41. struct nouveau_gpuobj *gpuobj;
  42. gpuobj = nouveau_ramht_find(chan, data);
  43. if (!gpuobj)
  44. return -ENOENT;
  45. if (nouveau_notifier_offset(gpuobj, NULL))
  46. return -EINVAL;
  47. pch->vblank.object = gpuobj;
  48. pch->base.vblank.offset = ~0;
  49. return 0;
  50. }
  51. static int
  52. mthd_vblsem_offset(struct nouveau_channel *chan, u32 class, u32 mthd, u32 data)
  53. {
  54. struct nv50_software_chan *pch = chan->engctx[NVOBJ_ENGINE_SW];
  55. if (nouveau_notifier_offset(pch->vblank.object, &data))
  56. return -ERANGE;
  57. pch->base.vblank.offset = data >> 2;
  58. return 0;
  59. }
  60. static int
  61. mthd_vblsem_value(struct nouveau_channel *chan, u32 class, u32 mthd, u32 data)
  62. {
  63. struct nv50_software_chan *pch = chan->engctx[NVOBJ_ENGINE_SW];
  64. pch->base.vblank.value = data;
  65. return 0;
  66. }
  67. static int
  68. mthd_vblsem_release(struct nouveau_channel *chan, u32 class, u32 mthd, u32 data)
  69. {
  70. struct nv50_software_priv *psw = nv_engine(chan->dev, NVOBJ_ENGINE_SW);
  71. struct nv50_software_chan *pch = chan->engctx[NVOBJ_ENGINE_SW];
  72. struct drm_device *dev = chan->dev;
  73. if (!pch->vblank.object || pch->base.vblank.offset == ~0 || data > 1)
  74. return -EINVAL;
  75. drm_vblank_get(dev, data);
  76. pch->base.vblank.head = data;
  77. list_add(&pch->base.vblank.list, &psw->base.vblank);
  78. return 0;
  79. }
  80. static int
  81. mthd_flip(struct nouveau_channel *chan, u32 class, u32 mthd, u32 data)
  82. {
  83. nouveau_finish_page_flip(chan, NULL);
  84. return 0;
  85. }
  86. static int
  87. nv50_software_context_new(struct nouveau_channel *chan, int engine)
  88. {
  89. struct nv50_software_chan *pch;
  90. pch = kzalloc(sizeof(*pch), GFP_KERNEL);
  91. if (!pch)
  92. return -ENOMEM;
  93. nouveau_software_context_new(&pch->base);
  94. pch->base.vblank.bo = chan->notifier_bo;
  95. chan->engctx[engine] = pch;
  96. return 0;
  97. }
  98. static void
  99. nv50_software_context_del(struct nouveau_channel *chan, int engine)
  100. {
  101. struct nv50_software_chan *pch = chan->engctx[engine];
  102. chan->engctx[engine] = NULL;
  103. kfree(pch);
  104. }
  105. static int
  106. nv50_software_object_new(struct nouveau_channel *chan, int engine,
  107. u32 handle, u16 class)
  108. {
  109. struct drm_device *dev = chan->dev;
  110. struct nouveau_gpuobj *obj = NULL;
  111. int ret;
  112. ret = nouveau_gpuobj_new(dev, chan, 16, 16, 0, &obj);
  113. if (ret)
  114. return ret;
  115. obj->engine = 0;
  116. obj->class = class;
  117. ret = nouveau_ramht_insert(chan, handle, obj);
  118. nouveau_gpuobj_ref(NULL, &obj);
  119. return ret;
  120. }
  121. static int
  122. nv50_software_init(struct drm_device *dev, int engine)
  123. {
  124. return 0;
  125. }
  126. static int
  127. nv50_software_fini(struct drm_device *dev, int engine, bool suspend)
  128. {
  129. return 0;
  130. }
  131. static void
  132. nv50_software_destroy(struct drm_device *dev, int engine)
  133. {
  134. struct nv50_software_priv *psw = nv_engine(dev, engine);
  135. NVOBJ_ENGINE_DEL(dev, SW);
  136. kfree(psw);
  137. }
  138. int
  139. nv50_software_create(struct drm_device *dev)
  140. {
  141. struct nv50_software_priv *psw = kzalloc(sizeof(*psw), GFP_KERNEL);
  142. if (!psw)
  143. return -ENOMEM;
  144. psw->base.base.destroy = nv50_software_destroy;
  145. psw->base.base.init = nv50_software_init;
  146. psw->base.base.fini = nv50_software_fini;
  147. psw->base.base.context_new = nv50_software_context_new;
  148. psw->base.base.context_del = nv50_software_context_del;
  149. psw->base.base.object_new = nv50_software_object_new;
  150. nouveau_software_create(&psw->base);
  151. NVOBJ_ENGINE_ADD(dev, SW, &psw->base.base);
  152. NVOBJ_CLASS(dev, 0x506e, SW);
  153. NVOBJ_MTHD (dev, 0x506e, 0x018c, mthd_dma_vblsem);
  154. NVOBJ_MTHD (dev, 0x506e, 0x0400, mthd_vblsem_offset);
  155. NVOBJ_MTHD (dev, 0x506e, 0x0404, mthd_vblsem_value);
  156. NVOBJ_MTHD (dev, 0x506e, 0x0408, mthd_vblsem_release);
  157. NVOBJ_MTHD (dev, 0x506e, 0x0500, mthd_flip);
  158. return 0;
  159. }