nouveau_fence.c 14 KB

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  1. /*
  2. * Copyright (C) 2007 Ben Skeggs.
  3. * All Rights Reserved.
  4. *
  5. * Permission is hereby granted, free of charge, to any person obtaining
  6. * a copy of this software and associated documentation files (the
  7. * "Software"), to deal in the Software without restriction, including
  8. * without limitation the rights to use, copy, modify, merge, publish,
  9. * distribute, sublicense, and/or sell copies of the Software, and to
  10. * permit persons to whom the Software is furnished to do so, subject to
  11. * the following conditions:
  12. *
  13. * The above copyright notice and this permission notice (including the
  14. * next paragraph) shall be included in all copies or substantial
  15. * portions of the Software.
  16. *
  17. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  18. * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  19. * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
  20. * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
  21. * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
  22. * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
  23. * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  24. *
  25. */
  26. #include "drmP.h"
  27. #include "drm.h"
  28. #include <linux/ktime.h>
  29. #include <linux/hrtimer.h>
  30. #include "nouveau_drv.h"
  31. #include "nouveau_ramht.h"
  32. #include "nouveau_software.h"
  33. #include "nouveau_dma.h"
  34. #define USE_REFCNT(dev) (nouveau_private(dev)->chipset >= 0x10)
  35. #define USE_SEMA(dev) (nouveau_private(dev)->chipset >= 0x17)
  36. struct nouveau_fence {
  37. struct nouveau_channel *channel;
  38. struct kref refcount;
  39. struct list_head entry;
  40. uint32_t sequence;
  41. bool signalled;
  42. unsigned long timeout;
  43. void (*work)(void *priv, bool signalled);
  44. void *priv;
  45. };
  46. struct nouveau_semaphore {
  47. struct kref ref;
  48. struct drm_device *dev;
  49. struct drm_mm_node *mem;
  50. };
  51. static inline struct nouveau_fence *
  52. nouveau_fence(void *sync_obj)
  53. {
  54. return (struct nouveau_fence *)sync_obj;
  55. }
  56. static void
  57. nouveau_fence_del(struct kref *ref)
  58. {
  59. struct nouveau_fence *fence =
  60. container_of(ref, struct nouveau_fence, refcount);
  61. nouveau_channel_ref(NULL, &fence->channel);
  62. kfree(fence);
  63. }
  64. void
  65. nouveau_fence_update(struct nouveau_channel *chan)
  66. {
  67. struct drm_device *dev = chan->dev;
  68. struct nouveau_fence *tmp, *fence;
  69. uint32_t sequence;
  70. spin_lock(&chan->fence.lock);
  71. /* Fetch the last sequence if the channel is still up and running */
  72. if (likely(!list_empty(&chan->fence.pending))) {
  73. if (USE_REFCNT(dev))
  74. sequence = nvchan_rd32(chan, 0x48);
  75. else
  76. sequence = atomic_read(&chan->fence.last_sequence_irq);
  77. if (chan->fence.sequence_ack == sequence)
  78. goto out;
  79. chan->fence.sequence_ack = sequence;
  80. }
  81. list_for_each_entry_safe(fence, tmp, &chan->fence.pending, entry) {
  82. if (fence->sequence > chan->fence.sequence_ack)
  83. break;
  84. fence->signalled = true;
  85. list_del(&fence->entry);
  86. if (fence->work)
  87. fence->work(fence->priv, true);
  88. kref_put(&fence->refcount, nouveau_fence_del);
  89. }
  90. out:
  91. spin_unlock(&chan->fence.lock);
  92. }
  93. int
  94. nouveau_fence_new(struct nouveau_channel *chan, struct nouveau_fence **pfence,
  95. bool emit)
  96. {
  97. struct nouveau_fence *fence;
  98. int ret = 0;
  99. fence = kzalloc(sizeof(*fence), GFP_KERNEL);
  100. if (!fence)
  101. return -ENOMEM;
  102. kref_init(&fence->refcount);
  103. nouveau_channel_ref(chan, &fence->channel);
  104. if (emit)
  105. ret = nouveau_fence_emit(fence);
  106. if (ret)
  107. nouveau_fence_unref(&fence);
  108. *pfence = fence;
  109. return ret;
  110. }
  111. struct nouveau_channel *
  112. nouveau_fence_channel(struct nouveau_fence *fence)
  113. {
  114. return fence ? nouveau_channel_get_unlocked(fence->channel) : NULL;
  115. }
  116. int
  117. nouveau_fence_emit(struct nouveau_fence *fence)
  118. {
  119. struct nouveau_channel *chan = fence->channel;
  120. struct drm_device *dev = chan->dev;
  121. struct drm_nouveau_private *dev_priv = dev->dev_private;
  122. int ret;
  123. ret = RING_SPACE(chan, 2);
  124. if (ret)
  125. return ret;
  126. if (unlikely(chan->fence.sequence == chan->fence.sequence_ack - 1)) {
  127. nouveau_fence_update(chan);
  128. BUG_ON(chan->fence.sequence ==
  129. chan->fence.sequence_ack - 1);
  130. }
  131. fence->sequence = ++chan->fence.sequence;
  132. kref_get(&fence->refcount);
  133. spin_lock(&chan->fence.lock);
  134. list_add_tail(&fence->entry, &chan->fence.pending);
  135. spin_unlock(&chan->fence.lock);
  136. if (USE_REFCNT(dev)) {
  137. if (dev_priv->card_type < NV_C0)
  138. BEGIN_NV04(chan, 0, NV10_SUBCHAN_REF_CNT, 1);
  139. else
  140. BEGIN_NVC0(chan, 0, NV10_SUBCHAN_REF_CNT, 1);
  141. } else {
  142. BEGIN_NV04(chan, NvSubSw, 0x0150, 1);
  143. }
  144. OUT_RING (chan, fence->sequence);
  145. FIRE_RING(chan);
  146. fence->timeout = jiffies + 3 * DRM_HZ;
  147. return 0;
  148. }
  149. void
  150. nouveau_fence_work(struct nouveau_fence *fence,
  151. void (*work)(void *priv, bool signalled),
  152. void *priv)
  153. {
  154. BUG_ON(fence->work);
  155. spin_lock(&fence->channel->fence.lock);
  156. if (fence->signalled) {
  157. work(priv, true);
  158. } else {
  159. fence->work = work;
  160. fence->priv = priv;
  161. }
  162. spin_unlock(&fence->channel->fence.lock);
  163. }
  164. void
  165. __nouveau_fence_unref(void **sync_obj)
  166. {
  167. struct nouveau_fence *fence = nouveau_fence(*sync_obj);
  168. if (fence)
  169. kref_put(&fence->refcount, nouveau_fence_del);
  170. *sync_obj = NULL;
  171. }
  172. void *
  173. __nouveau_fence_ref(void *sync_obj)
  174. {
  175. struct nouveau_fence *fence = nouveau_fence(sync_obj);
  176. kref_get(&fence->refcount);
  177. return sync_obj;
  178. }
  179. bool
  180. __nouveau_fence_signalled(void *sync_obj, void *sync_arg)
  181. {
  182. struct nouveau_fence *fence = nouveau_fence(sync_obj);
  183. struct nouveau_channel *chan = fence->channel;
  184. if (fence->signalled)
  185. return true;
  186. nouveau_fence_update(chan);
  187. return fence->signalled;
  188. }
  189. int
  190. __nouveau_fence_wait(void *sync_obj, void *sync_arg, bool lazy, bool intr)
  191. {
  192. struct nouveau_fence *fence = nouveau_fence(sync_obj);
  193. unsigned long timeout = fence->timeout;
  194. unsigned long sleep_time = NSEC_PER_MSEC / 1000;
  195. ktime_t t;
  196. int ret = 0;
  197. while (1) {
  198. if (__nouveau_fence_signalled(sync_obj, sync_arg))
  199. break;
  200. if (time_after_eq(jiffies, timeout)) {
  201. ret = -EBUSY;
  202. break;
  203. }
  204. __set_current_state(intr ? TASK_INTERRUPTIBLE
  205. : TASK_UNINTERRUPTIBLE);
  206. if (lazy) {
  207. t = ktime_set(0, sleep_time);
  208. schedule_hrtimeout(&t, HRTIMER_MODE_REL);
  209. sleep_time *= 2;
  210. if (sleep_time > NSEC_PER_MSEC)
  211. sleep_time = NSEC_PER_MSEC;
  212. }
  213. if (intr && signal_pending(current)) {
  214. ret = -ERESTARTSYS;
  215. break;
  216. }
  217. }
  218. __set_current_state(TASK_RUNNING);
  219. return ret;
  220. }
  221. static struct nouveau_semaphore *
  222. semaphore_alloc(struct drm_device *dev)
  223. {
  224. struct drm_nouveau_private *dev_priv = dev->dev_private;
  225. struct nouveau_semaphore *sema;
  226. int size = (dev_priv->chipset < 0x84) ? 4 : 16;
  227. int ret, i;
  228. if (!USE_SEMA(dev))
  229. return NULL;
  230. sema = kmalloc(sizeof(*sema), GFP_KERNEL);
  231. if (!sema)
  232. goto fail;
  233. ret = drm_mm_pre_get(&dev_priv->fence.heap);
  234. if (ret)
  235. goto fail;
  236. spin_lock(&dev_priv->fence.lock);
  237. sema->mem = drm_mm_search_free(&dev_priv->fence.heap, size, 0, 0);
  238. if (sema->mem)
  239. sema->mem = drm_mm_get_block_atomic(sema->mem, size, 0);
  240. spin_unlock(&dev_priv->fence.lock);
  241. if (!sema->mem)
  242. goto fail;
  243. kref_init(&sema->ref);
  244. sema->dev = dev;
  245. for (i = sema->mem->start; i < sema->mem->start + size; i += 4)
  246. nouveau_bo_wr32(dev_priv->fence.bo, i / 4, 0);
  247. return sema;
  248. fail:
  249. kfree(sema);
  250. return NULL;
  251. }
  252. static void
  253. semaphore_free(struct kref *ref)
  254. {
  255. struct nouveau_semaphore *sema =
  256. container_of(ref, struct nouveau_semaphore, ref);
  257. struct drm_nouveau_private *dev_priv = sema->dev->dev_private;
  258. spin_lock(&dev_priv->fence.lock);
  259. drm_mm_put_block(sema->mem);
  260. spin_unlock(&dev_priv->fence.lock);
  261. kfree(sema);
  262. }
  263. static void
  264. semaphore_work(void *priv, bool signalled)
  265. {
  266. struct nouveau_semaphore *sema = priv;
  267. struct drm_nouveau_private *dev_priv = sema->dev->dev_private;
  268. if (unlikely(!signalled))
  269. nouveau_bo_wr32(dev_priv->fence.bo, sema->mem->start / 4, 1);
  270. kref_put(&sema->ref, semaphore_free);
  271. }
  272. static int
  273. semaphore_acquire(struct nouveau_channel *chan, struct nouveau_semaphore *sema)
  274. {
  275. struct drm_nouveau_private *dev_priv = chan->dev->dev_private;
  276. struct nouveau_fence *fence = NULL;
  277. u64 offset = chan->fence.vma.offset + sema->mem->start;
  278. int ret;
  279. if (dev_priv->chipset < 0x84) {
  280. ret = RING_SPACE(chan, 4);
  281. if (ret)
  282. return ret;
  283. BEGIN_NV04(chan, 0, NV11_SUBCHAN_DMA_SEMAPHORE, 3);
  284. OUT_RING (chan, NvSema);
  285. OUT_RING (chan, offset);
  286. OUT_RING (chan, 1);
  287. } else
  288. if (dev_priv->chipset < 0xc0) {
  289. ret = RING_SPACE(chan, 7);
  290. if (ret)
  291. return ret;
  292. BEGIN_NV04(chan, 0, NV11_SUBCHAN_DMA_SEMAPHORE, 1);
  293. OUT_RING (chan, chan->vram_handle);
  294. BEGIN_NV04(chan, 0, NV84_SUBCHAN_SEMAPHORE_ADDRESS_HIGH, 4);
  295. OUT_RING (chan, upper_32_bits(offset));
  296. OUT_RING (chan, lower_32_bits(offset));
  297. OUT_RING (chan, 1);
  298. OUT_RING (chan, 1); /* ACQUIRE_EQ */
  299. } else {
  300. ret = RING_SPACE(chan, 5);
  301. if (ret)
  302. return ret;
  303. BEGIN_NVC0(chan, 0, NV84_SUBCHAN_SEMAPHORE_ADDRESS_HIGH, 4);
  304. OUT_RING (chan, upper_32_bits(offset));
  305. OUT_RING (chan, lower_32_bits(offset));
  306. OUT_RING (chan, 1);
  307. OUT_RING (chan, 0x1001); /* ACQUIRE_EQ */
  308. }
  309. /* Delay semaphore destruction until its work is done */
  310. ret = nouveau_fence_new(chan, &fence, true);
  311. if (ret)
  312. return ret;
  313. kref_get(&sema->ref);
  314. nouveau_fence_work(fence, semaphore_work, sema);
  315. nouveau_fence_unref(&fence);
  316. return 0;
  317. }
  318. static int
  319. semaphore_release(struct nouveau_channel *chan, struct nouveau_semaphore *sema)
  320. {
  321. struct drm_nouveau_private *dev_priv = chan->dev->dev_private;
  322. struct nouveau_fence *fence = NULL;
  323. u64 offset = chan->fence.vma.offset + sema->mem->start;
  324. int ret;
  325. if (dev_priv->chipset < 0x84) {
  326. ret = RING_SPACE(chan, 5);
  327. if (ret)
  328. return ret;
  329. BEGIN_NV04(chan, 0, NV11_SUBCHAN_DMA_SEMAPHORE, 2);
  330. OUT_RING (chan, NvSema);
  331. OUT_RING (chan, offset);
  332. BEGIN_NV04(chan, 0, NV11_SUBCHAN_SEMAPHORE_RELEASE, 1);
  333. OUT_RING (chan, 1);
  334. } else
  335. if (dev_priv->chipset < 0xc0) {
  336. ret = RING_SPACE(chan, 7);
  337. if (ret)
  338. return ret;
  339. BEGIN_NV04(chan, 0, NV11_SUBCHAN_DMA_SEMAPHORE, 1);
  340. OUT_RING (chan, chan->vram_handle);
  341. BEGIN_NV04(chan, 0, NV84_SUBCHAN_SEMAPHORE_ADDRESS_HIGH, 4);
  342. OUT_RING (chan, upper_32_bits(offset));
  343. OUT_RING (chan, lower_32_bits(offset));
  344. OUT_RING (chan, 1);
  345. OUT_RING (chan, 2); /* RELEASE */
  346. } else {
  347. ret = RING_SPACE(chan, 5);
  348. if (ret)
  349. return ret;
  350. BEGIN_NVC0(chan, 0, NV84_SUBCHAN_SEMAPHORE_ADDRESS_HIGH, 4);
  351. OUT_RING (chan, upper_32_bits(offset));
  352. OUT_RING (chan, lower_32_bits(offset));
  353. OUT_RING (chan, 1);
  354. OUT_RING (chan, 0x1002); /* RELEASE */
  355. }
  356. /* Delay semaphore destruction until its work is done */
  357. ret = nouveau_fence_new(chan, &fence, true);
  358. if (ret)
  359. return ret;
  360. kref_get(&sema->ref);
  361. nouveau_fence_work(fence, semaphore_work, sema);
  362. nouveau_fence_unref(&fence);
  363. return 0;
  364. }
  365. int
  366. nouveau_fence_sync(struct nouveau_fence *fence,
  367. struct nouveau_channel *wchan)
  368. {
  369. struct nouveau_channel *chan = nouveau_fence_channel(fence);
  370. struct drm_device *dev = wchan->dev;
  371. struct nouveau_semaphore *sema;
  372. int ret = 0;
  373. if (likely(!chan || chan == wchan ||
  374. nouveau_fence_signalled(fence)))
  375. goto out;
  376. sema = semaphore_alloc(dev);
  377. if (!sema) {
  378. /* Early card or broken userspace, fall back to
  379. * software sync. */
  380. ret = nouveau_fence_wait(fence, true, false);
  381. goto out;
  382. }
  383. /* try to take chan's mutex, if we can't take it right away
  384. * we have to fallback to software sync to prevent locking
  385. * order issues
  386. */
  387. if (!mutex_trylock(&chan->mutex)) {
  388. ret = nouveau_fence_wait(fence, true, false);
  389. goto out_unref;
  390. }
  391. /* Make wchan wait until it gets signalled */
  392. ret = semaphore_acquire(wchan, sema);
  393. if (ret)
  394. goto out_unlock;
  395. /* Signal the semaphore from chan */
  396. ret = semaphore_release(chan, sema);
  397. out_unlock:
  398. mutex_unlock(&chan->mutex);
  399. out_unref:
  400. kref_put(&sema->ref, semaphore_free);
  401. out:
  402. if (chan)
  403. nouveau_channel_put_unlocked(&chan);
  404. return ret;
  405. }
  406. int
  407. __nouveau_fence_flush(void *sync_obj, void *sync_arg)
  408. {
  409. return 0;
  410. }
  411. int
  412. nouveau_fence_channel_init(struct nouveau_channel *chan)
  413. {
  414. struct drm_device *dev = chan->dev;
  415. struct drm_nouveau_private *dev_priv = dev->dev_private;
  416. struct nouveau_gpuobj *obj = NULL;
  417. int ret;
  418. if (dev_priv->card_type < NV_C0) {
  419. ret = RING_SPACE(chan, 2);
  420. if (ret)
  421. return ret;
  422. BEGIN_NV04(chan, NvSubSw, NV01_SUBCHAN_OBJECT, 1);
  423. OUT_RING (chan, NvSw);
  424. FIRE_RING (chan);
  425. }
  426. /* Setup area of memory shared between all channels for x-chan sync */
  427. if (USE_SEMA(dev) && dev_priv->chipset < 0x84) {
  428. struct ttm_mem_reg *mem = &dev_priv->fence.bo->bo.mem;
  429. ret = nouveau_gpuobj_dma_new(chan, NV_CLASS_DMA_FROM_MEMORY,
  430. mem->start << PAGE_SHIFT,
  431. mem->size, NV_MEM_ACCESS_RW,
  432. NV_MEM_TARGET_VRAM, &obj);
  433. if (ret)
  434. return ret;
  435. ret = nouveau_ramht_insert(chan, NvSema, obj);
  436. nouveau_gpuobj_ref(NULL, &obj);
  437. if (ret)
  438. return ret;
  439. } else
  440. if (USE_SEMA(dev)) {
  441. /* map fence bo into channel's vm */
  442. ret = nouveau_bo_vma_add(dev_priv->fence.bo, chan->vm,
  443. &chan->fence.vma);
  444. if (ret)
  445. return ret;
  446. }
  447. atomic_set(&chan->fence.last_sequence_irq, 0);
  448. return 0;
  449. }
  450. void
  451. nouveau_fence_channel_fini(struct nouveau_channel *chan)
  452. {
  453. struct drm_nouveau_private *dev_priv = chan->dev->dev_private;
  454. struct nouveau_fence *tmp, *fence;
  455. spin_lock(&chan->fence.lock);
  456. list_for_each_entry_safe(fence, tmp, &chan->fence.pending, entry) {
  457. fence->signalled = true;
  458. list_del(&fence->entry);
  459. if (unlikely(fence->work))
  460. fence->work(fence->priv, false);
  461. kref_put(&fence->refcount, nouveau_fence_del);
  462. }
  463. spin_unlock(&chan->fence.lock);
  464. nouveau_bo_vma_del(dev_priv->fence.bo, &chan->fence.vma);
  465. }
  466. int
  467. nouveau_fence_init(struct drm_device *dev)
  468. {
  469. struct drm_nouveau_private *dev_priv = dev->dev_private;
  470. int size = (dev_priv->chipset < 0x84) ? 4096 : 16384;
  471. int ret;
  472. /* Create a shared VRAM heap for cross-channel sync. */
  473. if (USE_SEMA(dev)) {
  474. ret = nouveau_bo_new(dev, size, 0, TTM_PL_FLAG_VRAM,
  475. 0, 0, NULL, &dev_priv->fence.bo);
  476. if (ret)
  477. return ret;
  478. ret = nouveau_bo_pin(dev_priv->fence.bo, TTM_PL_FLAG_VRAM);
  479. if (ret)
  480. goto fail;
  481. ret = nouveau_bo_map(dev_priv->fence.bo);
  482. if (ret)
  483. goto fail;
  484. ret = drm_mm_init(&dev_priv->fence.heap, 0,
  485. dev_priv->fence.bo->bo.mem.size);
  486. if (ret)
  487. goto fail;
  488. spin_lock_init(&dev_priv->fence.lock);
  489. }
  490. return 0;
  491. fail:
  492. nouveau_bo_unmap(dev_priv->fence.bo);
  493. nouveau_bo_ref(NULL, &dev_priv->fence.bo);
  494. return ret;
  495. }
  496. void
  497. nouveau_fence_fini(struct drm_device *dev)
  498. {
  499. struct drm_nouveau_private *dev_priv = dev->dev_private;
  500. if (USE_SEMA(dev)) {
  501. drm_mm_takedown(&dev_priv->fence.heap);
  502. nouveau_bo_unmap(dev_priv->fence.bo);
  503. nouveau_bo_unpin(dev_priv->fence.bo);
  504. nouveau_bo_ref(NULL, &dev_priv->fence.bo);
  505. }
  506. }