e1000_main.c 127 KB

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  1. /*******************************************************************************
  2. Copyright(c) 1999 - 2005 Intel Corporation. All rights reserved.
  3. This program is free software; you can redistribute it and/or modify it
  4. under the terms of the GNU General Public License as published by the Free
  5. Software Foundation; either version 2 of the License, or (at your option)
  6. any later version.
  7. This program is distributed in the hope that it will be useful, but WITHOUT
  8. ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  9. FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  10. more details.
  11. You should have received a copy of the GNU General Public License along with
  12. this program; if not, write to the Free Software Foundation, Inc., 59
  13. Temple Place - Suite 330, Boston, MA 02111-1307, USA.
  14. The full GNU General Public License is included in this distribution in the
  15. file called LICENSE.
  16. Contact Information:
  17. Linux NICS <linux.nics@intel.com>
  18. Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  19. *******************************************************************************/
  20. #include "e1000.h"
  21. /* Change Log
  22. * 6.3.9 12/16/2005
  23. * o incorporate fix for recycled skbs from IBM LTC
  24. * 6.3.7 11/18/2005
  25. * o Honor eeprom setting for enabling/disabling Wake On Lan
  26. * 6.3.5 11/17/2005
  27. * o Fix memory leak in rx ring handling for PCI Express adapters
  28. * 6.3.4 11/8/05
  29. * o Patch from Jesper Juhl to remove redundant NULL checks for kfree
  30. * 6.3.2 9/20/05
  31. * o Render logic that sets/resets DRV_LOAD as inline functions to
  32. * avoid code replication. If f/w is AMT then set DRV_LOAD only when
  33. * network interface is open.
  34. * o Handle DRV_LOAD set/reset in cases where AMT uses VLANs.
  35. * o Adjust PBA partioning for Jumbo frames using MTU size and not
  36. * rx_buffer_len
  37. * 6.3.1 9/19/05
  38. * o Use adapter->tx_timeout_factor in Tx Hung Detect logic
  39. (e1000_clean_tx_irq)
  40. * o Support for 8086:10B5 device (Quad Port)
  41. * 6.2.14 9/15/05
  42. * o In AMT enabled configurations, set/reset DRV_LOAD bit on interface
  43. * open/close
  44. * 6.2.13 9/14/05
  45. * o Invoke e1000_check_mng_mode only for 8257x controllers since it
  46. * accesses the FWSM that is not supported in other controllers
  47. * 6.2.12 9/9/05
  48. * o Add support for device id E1000_DEV_ID_82546GB_QUAD_COPPER
  49. * o set RCTL:SECRC only for controllers newer than 82543.
  50. * o When the n/w interface comes down reset DRV_LOAD bit to notify f/w.
  51. * This code was moved from e1000_remove to e1000_close
  52. * 6.2.10 9/6/05
  53. * o Fix error in updating RDT in el1000_alloc_rx_buffers[_ps] -- one off.
  54. * o Enable fc by default on 82573 controllers (do not read eeprom)
  55. * o Fix rx_errors statistic not to include missed_packet_count
  56. * o Fix rx_dropped statistic not to include missed_packet_count
  57. (Padraig Brady)
  58. * 6.2.9 8/30/05
  59. * o Remove call to update statistics from the controller ib e1000_get_stats
  60. * 6.2.8 8/30/05
  61. * o Improved algorithm for rx buffer allocation/rdt update
  62. * o Flow control watermarks relative to rx PBA size
  63. * o Simplified 'Tx Hung' detect logic
  64. * 6.2.7 8/17/05
  65. * o Report rx buffer allocation failures and tx timeout counts in stats
  66. * 6.2.6 8/16/05
  67. * o Implement workaround for controller erratum -- linear non-tso packet
  68. * following a TSO gets written back prematurely
  69. * 6.2.5 8/15/05
  70. * o Set netdev->tx_queue_len based on link speed/duplex settings.
  71. * o Fix net_stats.rx_fifo_errors <p@draigBrady.com>
  72. * o Do not power off PHY if SoL/IDER session is active
  73. * 6.2.4 8/10/05
  74. * o Fix loopback test setup/cleanup for 82571/3 controllers
  75. * o Fix parsing of outgoing packets (e1000_transfer_dhcp_info) to treat
  76. * all packets as raw
  77. * o Prevent operations that will cause the PHY to be reset if SoL/IDER
  78. * sessions are active and log a message
  79. * 6.2.2 7/21/05
  80. * o used fixed size descriptors for all MTU sizes, reduces memory load
  81. * 6.1.2 4/13/05
  82. * o Fixed ethtool diagnostics
  83. * o Enabled flow control to take default eeprom settings
  84. * o Added stats_lock around e1000_read_phy_reg commands to avoid concurrent
  85. * calls, one from mii_ioctl and other from within update_stats while
  86. * processing MIIREG ioctl.
  87. */
  88. char e1000_driver_name[] = "e1000";
  89. static char e1000_driver_string[] = "Intel(R) PRO/1000 Network Driver";
  90. #ifndef CONFIG_E1000_NAPI
  91. #define DRIVERNAPI
  92. #else
  93. #define DRIVERNAPI "-NAPI"
  94. #endif
  95. #define DRV_VERSION "7.0.33-k2"DRIVERNAPI
  96. char e1000_driver_version[] = DRV_VERSION;
  97. static char e1000_copyright[] = "Copyright (c) 1999-2005 Intel Corporation.";
  98. /* e1000_pci_tbl - PCI Device ID Table
  99. *
  100. * Last entry must be all 0s
  101. *
  102. * Macro expands to...
  103. * {PCI_DEVICE(PCI_VENDOR_ID_INTEL, device_id)}
  104. */
  105. static struct pci_device_id e1000_pci_tbl[] = {
  106. INTEL_E1000_ETHERNET_DEVICE(0x1000),
  107. INTEL_E1000_ETHERNET_DEVICE(0x1001),
  108. INTEL_E1000_ETHERNET_DEVICE(0x1004),
  109. INTEL_E1000_ETHERNET_DEVICE(0x1008),
  110. INTEL_E1000_ETHERNET_DEVICE(0x1009),
  111. INTEL_E1000_ETHERNET_DEVICE(0x100C),
  112. INTEL_E1000_ETHERNET_DEVICE(0x100D),
  113. INTEL_E1000_ETHERNET_DEVICE(0x100E),
  114. INTEL_E1000_ETHERNET_DEVICE(0x100F),
  115. INTEL_E1000_ETHERNET_DEVICE(0x1010),
  116. INTEL_E1000_ETHERNET_DEVICE(0x1011),
  117. INTEL_E1000_ETHERNET_DEVICE(0x1012),
  118. INTEL_E1000_ETHERNET_DEVICE(0x1013),
  119. INTEL_E1000_ETHERNET_DEVICE(0x1014),
  120. INTEL_E1000_ETHERNET_DEVICE(0x1015),
  121. INTEL_E1000_ETHERNET_DEVICE(0x1016),
  122. INTEL_E1000_ETHERNET_DEVICE(0x1017),
  123. INTEL_E1000_ETHERNET_DEVICE(0x1018),
  124. INTEL_E1000_ETHERNET_DEVICE(0x1019),
  125. INTEL_E1000_ETHERNET_DEVICE(0x101A),
  126. INTEL_E1000_ETHERNET_DEVICE(0x101D),
  127. INTEL_E1000_ETHERNET_DEVICE(0x101E),
  128. INTEL_E1000_ETHERNET_DEVICE(0x1026),
  129. INTEL_E1000_ETHERNET_DEVICE(0x1027),
  130. INTEL_E1000_ETHERNET_DEVICE(0x1028),
  131. INTEL_E1000_ETHERNET_DEVICE(0x105E),
  132. INTEL_E1000_ETHERNET_DEVICE(0x105F),
  133. INTEL_E1000_ETHERNET_DEVICE(0x1060),
  134. INTEL_E1000_ETHERNET_DEVICE(0x1075),
  135. INTEL_E1000_ETHERNET_DEVICE(0x1076),
  136. INTEL_E1000_ETHERNET_DEVICE(0x1077),
  137. INTEL_E1000_ETHERNET_DEVICE(0x1078),
  138. INTEL_E1000_ETHERNET_DEVICE(0x1079),
  139. INTEL_E1000_ETHERNET_DEVICE(0x107A),
  140. INTEL_E1000_ETHERNET_DEVICE(0x107B),
  141. INTEL_E1000_ETHERNET_DEVICE(0x107C),
  142. INTEL_E1000_ETHERNET_DEVICE(0x107D),
  143. INTEL_E1000_ETHERNET_DEVICE(0x107E),
  144. INTEL_E1000_ETHERNET_DEVICE(0x107F),
  145. INTEL_E1000_ETHERNET_DEVICE(0x108A),
  146. INTEL_E1000_ETHERNET_DEVICE(0x108B),
  147. INTEL_E1000_ETHERNET_DEVICE(0x108C),
  148. INTEL_E1000_ETHERNET_DEVICE(0x1099),
  149. INTEL_E1000_ETHERNET_DEVICE(0x109A),
  150. INTEL_E1000_ETHERNET_DEVICE(0x10B5),
  151. /* required last entry */
  152. {0,}
  153. };
  154. MODULE_DEVICE_TABLE(pci, e1000_pci_tbl);
  155. int e1000_up(struct e1000_adapter *adapter);
  156. void e1000_down(struct e1000_adapter *adapter);
  157. void e1000_reset(struct e1000_adapter *adapter);
  158. int e1000_set_spd_dplx(struct e1000_adapter *adapter, uint16_t spddplx);
  159. int e1000_setup_all_tx_resources(struct e1000_adapter *adapter);
  160. int e1000_setup_all_rx_resources(struct e1000_adapter *adapter);
  161. void e1000_free_all_tx_resources(struct e1000_adapter *adapter);
  162. void e1000_free_all_rx_resources(struct e1000_adapter *adapter);
  163. static int e1000_setup_tx_resources(struct e1000_adapter *adapter,
  164. struct e1000_tx_ring *txdr);
  165. static int e1000_setup_rx_resources(struct e1000_adapter *adapter,
  166. struct e1000_rx_ring *rxdr);
  167. static void e1000_free_tx_resources(struct e1000_adapter *adapter,
  168. struct e1000_tx_ring *tx_ring);
  169. static void e1000_free_rx_resources(struct e1000_adapter *adapter,
  170. struct e1000_rx_ring *rx_ring);
  171. void e1000_update_stats(struct e1000_adapter *adapter);
  172. /* Local Function Prototypes */
  173. static int e1000_init_module(void);
  174. static void e1000_exit_module(void);
  175. static int e1000_probe(struct pci_dev *pdev, const struct pci_device_id *ent);
  176. static void __devexit e1000_remove(struct pci_dev *pdev);
  177. static int e1000_alloc_queues(struct e1000_adapter *adapter);
  178. static int e1000_sw_init(struct e1000_adapter *adapter);
  179. static int e1000_open(struct net_device *netdev);
  180. static int e1000_close(struct net_device *netdev);
  181. static void e1000_configure_tx(struct e1000_adapter *adapter);
  182. static void e1000_configure_rx(struct e1000_adapter *adapter);
  183. static void e1000_setup_rctl(struct e1000_adapter *adapter);
  184. static void e1000_clean_all_tx_rings(struct e1000_adapter *adapter);
  185. static void e1000_clean_all_rx_rings(struct e1000_adapter *adapter);
  186. static void e1000_clean_tx_ring(struct e1000_adapter *adapter,
  187. struct e1000_tx_ring *tx_ring);
  188. static void e1000_clean_rx_ring(struct e1000_adapter *adapter,
  189. struct e1000_rx_ring *rx_ring);
  190. static void e1000_set_multi(struct net_device *netdev);
  191. static void e1000_update_phy_info(unsigned long data);
  192. static void e1000_watchdog(unsigned long data);
  193. static void e1000_watchdog_task(struct e1000_adapter *adapter);
  194. static void e1000_82547_tx_fifo_stall(unsigned long data);
  195. static int e1000_xmit_frame(struct sk_buff *skb, struct net_device *netdev);
  196. static struct net_device_stats * e1000_get_stats(struct net_device *netdev);
  197. static int e1000_change_mtu(struct net_device *netdev, int new_mtu);
  198. static int e1000_set_mac(struct net_device *netdev, void *p);
  199. static irqreturn_t e1000_intr(int irq, void *data, struct pt_regs *regs);
  200. static boolean_t e1000_clean_tx_irq(struct e1000_adapter *adapter,
  201. struct e1000_tx_ring *tx_ring);
  202. #ifdef CONFIG_E1000_NAPI
  203. static int e1000_clean(struct net_device *poll_dev, int *budget);
  204. static boolean_t e1000_clean_rx_irq(struct e1000_adapter *adapter,
  205. struct e1000_rx_ring *rx_ring,
  206. int *work_done, int work_to_do);
  207. static boolean_t e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
  208. struct e1000_rx_ring *rx_ring,
  209. int *work_done, int work_to_do);
  210. #else
  211. static boolean_t e1000_clean_rx_irq(struct e1000_adapter *adapter,
  212. struct e1000_rx_ring *rx_ring);
  213. static boolean_t e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
  214. struct e1000_rx_ring *rx_ring);
  215. #endif
  216. static void e1000_alloc_rx_buffers(struct e1000_adapter *adapter,
  217. struct e1000_rx_ring *rx_ring,
  218. int cleaned_count);
  219. static void e1000_alloc_rx_buffers_ps(struct e1000_adapter *adapter,
  220. struct e1000_rx_ring *rx_ring,
  221. int cleaned_count);
  222. static int e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd);
  223. static int e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr,
  224. int cmd);
  225. void e1000_set_ethtool_ops(struct net_device *netdev);
  226. static void e1000_enter_82542_rst(struct e1000_adapter *adapter);
  227. static void e1000_leave_82542_rst(struct e1000_adapter *adapter);
  228. static void e1000_tx_timeout(struct net_device *dev);
  229. static void e1000_tx_timeout_task(struct net_device *dev);
  230. static void e1000_smartspeed(struct e1000_adapter *adapter);
  231. static inline int e1000_82547_fifo_workaround(struct e1000_adapter *adapter,
  232. struct sk_buff *skb);
  233. static void e1000_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp);
  234. static void e1000_vlan_rx_add_vid(struct net_device *netdev, uint16_t vid);
  235. static void e1000_vlan_rx_kill_vid(struct net_device *netdev, uint16_t vid);
  236. static void e1000_restore_vlan(struct e1000_adapter *adapter);
  237. #ifdef CONFIG_PM
  238. static int e1000_suspend(struct pci_dev *pdev, pm_message_t state);
  239. static int e1000_resume(struct pci_dev *pdev);
  240. #endif
  241. #ifdef CONFIG_NET_POLL_CONTROLLER
  242. /* for netdump / net console */
  243. static void e1000_netpoll (struct net_device *netdev);
  244. #endif
  245. /* Exported from other modules */
  246. extern void e1000_check_options(struct e1000_adapter *adapter);
  247. static struct pci_driver e1000_driver = {
  248. .name = e1000_driver_name,
  249. .id_table = e1000_pci_tbl,
  250. .probe = e1000_probe,
  251. .remove = __devexit_p(e1000_remove),
  252. /* Power Managment Hooks */
  253. #ifdef CONFIG_PM
  254. .suspend = e1000_suspend,
  255. .resume = e1000_resume
  256. #endif
  257. };
  258. MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
  259. MODULE_DESCRIPTION("Intel(R) PRO/1000 Network Driver");
  260. MODULE_LICENSE("GPL");
  261. MODULE_VERSION(DRV_VERSION);
  262. static int debug = NETIF_MSG_DRV | NETIF_MSG_PROBE;
  263. module_param(debug, int, 0);
  264. MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
  265. /**
  266. * e1000_init_module - Driver Registration Routine
  267. *
  268. * e1000_init_module is the first routine called when the driver is
  269. * loaded. All it does is register with the PCI subsystem.
  270. **/
  271. static int __init
  272. e1000_init_module(void)
  273. {
  274. int ret;
  275. printk(KERN_INFO "%s - version %s\n",
  276. e1000_driver_string, e1000_driver_version);
  277. printk(KERN_INFO "%s\n", e1000_copyright);
  278. ret = pci_module_init(&e1000_driver);
  279. return ret;
  280. }
  281. module_init(e1000_init_module);
  282. /**
  283. * e1000_exit_module - Driver Exit Cleanup Routine
  284. *
  285. * e1000_exit_module is called just before the driver is removed
  286. * from memory.
  287. **/
  288. static void __exit
  289. e1000_exit_module(void)
  290. {
  291. pci_unregister_driver(&e1000_driver);
  292. }
  293. module_exit(e1000_exit_module);
  294. /**
  295. * e1000_irq_disable - Mask off interrupt generation on the NIC
  296. * @adapter: board private structure
  297. **/
  298. static inline void
  299. e1000_irq_disable(struct e1000_adapter *adapter)
  300. {
  301. atomic_inc(&adapter->irq_sem);
  302. E1000_WRITE_REG(&adapter->hw, IMC, ~0);
  303. E1000_WRITE_FLUSH(&adapter->hw);
  304. synchronize_irq(adapter->pdev->irq);
  305. }
  306. /**
  307. * e1000_irq_enable - Enable default interrupt generation settings
  308. * @adapter: board private structure
  309. **/
  310. static inline void
  311. e1000_irq_enable(struct e1000_adapter *adapter)
  312. {
  313. if (likely(atomic_dec_and_test(&adapter->irq_sem))) {
  314. E1000_WRITE_REG(&adapter->hw, IMS, IMS_ENABLE_MASK);
  315. E1000_WRITE_FLUSH(&adapter->hw);
  316. }
  317. }
  318. static void
  319. e1000_update_mng_vlan(struct e1000_adapter *adapter)
  320. {
  321. struct net_device *netdev = adapter->netdev;
  322. uint16_t vid = adapter->hw.mng_cookie.vlan_id;
  323. uint16_t old_vid = adapter->mng_vlan_id;
  324. if (adapter->vlgrp) {
  325. if (!adapter->vlgrp->vlan_devices[vid]) {
  326. if (adapter->hw.mng_cookie.status &
  327. E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) {
  328. e1000_vlan_rx_add_vid(netdev, vid);
  329. adapter->mng_vlan_id = vid;
  330. } else
  331. adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
  332. if ((old_vid != (uint16_t)E1000_MNG_VLAN_NONE) &&
  333. (vid != old_vid) &&
  334. !adapter->vlgrp->vlan_devices[old_vid])
  335. e1000_vlan_rx_kill_vid(netdev, old_vid);
  336. } else
  337. adapter->mng_vlan_id = vid;
  338. }
  339. }
  340. /**
  341. * e1000_release_hw_control - release control of the h/w to f/w
  342. * @adapter: address of board private structure
  343. *
  344. * e1000_release_hw_control resets {CTRL_EXT|FWSM}:DRV_LOAD bit.
  345. * For ASF and Pass Through versions of f/w this means that the
  346. * driver is no longer loaded. For AMT version (only with 82573) i
  347. * of the f/w this means that the netowrk i/f is closed.
  348. *
  349. **/
  350. static inline void
  351. e1000_release_hw_control(struct e1000_adapter *adapter)
  352. {
  353. uint32_t ctrl_ext;
  354. uint32_t swsm;
  355. /* Let firmware taken over control of h/w */
  356. switch (adapter->hw.mac_type) {
  357. case e1000_82571:
  358. case e1000_82572:
  359. ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT);
  360. E1000_WRITE_REG(&adapter->hw, CTRL_EXT,
  361. ctrl_ext & ~E1000_CTRL_EXT_DRV_LOAD);
  362. break;
  363. case e1000_82573:
  364. swsm = E1000_READ_REG(&adapter->hw, SWSM);
  365. E1000_WRITE_REG(&adapter->hw, SWSM,
  366. swsm & ~E1000_SWSM_DRV_LOAD);
  367. default:
  368. break;
  369. }
  370. }
  371. /**
  372. * e1000_get_hw_control - get control of the h/w from f/w
  373. * @adapter: address of board private structure
  374. *
  375. * e1000_get_hw_control sets {CTRL_EXT|FWSM}:DRV_LOAD bit.
  376. * For ASF and Pass Through versions of f/w this means that
  377. * the driver is loaded. For AMT version (only with 82573)
  378. * of the f/w this means that the netowrk i/f is open.
  379. *
  380. **/
  381. static inline void
  382. e1000_get_hw_control(struct e1000_adapter *adapter)
  383. {
  384. uint32_t ctrl_ext;
  385. uint32_t swsm;
  386. /* Let firmware know the driver has taken over */
  387. switch (adapter->hw.mac_type) {
  388. case e1000_82571:
  389. case e1000_82572:
  390. ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT);
  391. E1000_WRITE_REG(&adapter->hw, CTRL_EXT,
  392. ctrl_ext | E1000_CTRL_EXT_DRV_LOAD);
  393. break;
  394. case e1000_82573:
  395. swsm = E1000_READ_REG(&adapter->hw, SWSM);
  396. E1000_WRITE_REG(&adapter->hw, SWSM,
  397. swsm | E1000_SWSM_DRV_LOAD);
  398. break;
  399. default:
  400. break;
  401. }
  402. }
  403. int
  404. e1000_up(struct e1000_adapter *adapter)
  405. {
  406. struct net_device *netdev = adapter->netdev;
  407. int i, err;
  408. /* hardware has been reset, we need to reload some things */
  409. /* Reset the PHY if it was previously powered down */
  410. if (adapter->hw.media_type == e1000_media_type_copper) {
  411. uint16_t mii_reg;
  412. e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &mii_reg);
  413. if (mii_reg & MII_CR_POWER_DOWN)
  414. e1000_phy_reset(&adapter->hw);
  415. }
  416. e1000_set_multi(netdev);
  417. e1000_restore_vlan(adapter);
  418. e1000_configure_tx(adapter);
  419. e1000_setup_rctl(adapter);
  420. e1000_configure_rx(adapter);
  421. /* call E1000_DESC_UNUSED which always leaves
  422. * at least 1 descriptor unused to make sure
  423. * next_to_use != next_to_clean */
  424. for (i = 0; i < adapter->num_rx_queues; i++) {
  425. struct e1000_rx_ring *ring = &adapter->rx_ring[i];
  426. adapter->alloc_rx_buf(adapter, ring,
  427. E1000_DESC_UNUSED(ring));
  428. }
  429. #ifdef CONFIG_PCI_MSI
  430. if (adapter->hw.mac_type > e1000_82547_rev_2) {
  431. adapter->have_msi = TRUE;
  432. if ((err = pci_enable_msi(adapter->pdev))) {
  433. DPRINTK(PROBE, ERR,
  434. "Unable to allocate MSI interrupt Error: %d\n", err);
  435. adapter->have_msi = FALSE;
  436. }
  437. }
  438. #endif
  439. if ((err = request_irq(adapter->pdev->irq, &e1000_intr,
  440. SA_SHIRQ | SA_SAMPLE_RANDOM,
  441. netdev->name, netdev))) {
  442. DPRINTK(PROBE, ERR,
  443. "Unable to allocate interrupt Error: %d\n", err);
  444. return err;
  445. }
  446. adapter->tx_queue_len = netdev->tx_queue_len;
  447. mod_timer(&adapter->watchdog_timer, jiffies);
  448. #ifdef CONFIG_E1000_NAPI
  449. netif_poll_enable(netdev);
  450. #endif
  451. e1000_irq_enable(adapter);
  452. return 0;
  453. }
  454. void
  455. e1000_down(struct e1000_adapter *adapter)
  456. {
  457. struct net_device *netdev = adapter->netdev;
  458. boolean_t mng_mode_enabled = (adapter->hw.mac_type >= e1000_82571) &&
  459. e1000_check_mng_mode(&adapter->hw);
  460. e1000_irq_disable(adapter);
  461. free_irq(adapter->pdev->irq, netdev);
  462. #ifdef CONFIG_PCI_MSI
  463. if (adapter->hw.mac_type > e1000_82547_rev_2 &&
  464. adapter->have_msi == TRUE)
  465. pci_disable_msi(adapter->pdev);
  466. #endif
  467. del_timer_sync(&adapter->tx_fifo_stall_timer);
  468. del_timer_sync(&adapter->watchdog_timer);
  469. del_timer_sync(&adapter->phy_info_timer);
  470. #ifdef CONFIG_E1000_NAPI
  471. netif_poll_disable(netdev);
  472. #endif
  473. netdev->tx_queue_len = adapter->tx_queue_len;
  474. adapter->link_speed = 0;
  475. adapter->link_duplex = 0;
  476. netif_carrier_off(netdev);
  477. netif_stop_queue(netdev);
  478. e1000_reset(adapter);
  479. e1000_clean_all_tx_rings(adapter);
  480. e1000_clean_all_rx_rings(adapter);
  481. /* Power down the PHY so no link is implied when interface is down *
  482. * The PHY cannot be powered down if any of the following is TRUE *
  483. * (a) WoL is enabled
  484. * (b) AMT is active
  485. * (c) SoL/IDER session is active */
  486. if (!adapter->wol && adapter->hw.mac_type >= e1000_82540 &&
  487. adapter->hw.media_type == e1000_media_type_copper &&
  488. !(E1000_READ_REG(&adapter->hw, MANC) & E1000_MANC_SMBUS_EN) &&
  489. !mng_mode_enabled &&
  490. !e1000_check_phy_reset_block(&adapter->hw)) {
  491. uint16_t mii_reg;
  492. e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &mii_reg);
  493. mii_reg |= MII_CR_POWER_DOWN;
  494. e1000_write_phy_reg(&adapter->hw, PHY_CTRL, mii_reg);
  495. mdelay(1);
  496. }
  497. }
  498. void
  499. e1000_reset(struct e1000_adapter *adapter)
  500. {
  501. uint32_t pba, manc;
  502. uint16_t fc_high_water_mark = E1000_FC_HIGH_DIFF;
  503. /* Repartition Pba for greater than 9k mtu
  504. * To take effect CTRL.RST is required.
  505. */
  506. switch (adapter->hw.mac_type) {
  507. case e1000_82547:
  508. case e1000_82547_rev_2:
  509. pba = E1000_PBA_30K;
  510. break;
  511. case e1000_82571:
  512. case e1000_82572:
  513. pba = E1000_PBA_38K;
  514. break;
  515. case e1000_82573:
  516. pba = E1000_PBA_12K;
  517. break;
  518. default:
  519. pba = E1000_PBA_48K;
  520. break;
  521. }
  522. if ((adapter->hw.mac_type != e1000_82573) &&
  523. (adapter->netdev->mtu > E1000_RXBUFFER_8192))
  524. pba -= 8; /* allocate more FIFO for Tx */
  525. if (adapter->hw.mac_type == e1000_82547) {
  526. adapter->tx_fifo_head = 0;
  527. adapter->tx_head_addr = pba << E1000_TX_HEAD_ADDR_SHIFT;
  528. adapter->tx_fifo_size =
  529. (E1000_PBA_40K - pba) << E1000_PBA_BYTES_SHIFT;
  530. atomic_set(&adapter->tx_fifo_stall, 0);
  531. }
  532. E1000_WRITE_REG(&adapter->hw, PBA, pba);
  533. /* flow control settings */
  534. /* Set the FC high water mark to 90% of the FIFO size.
  535. * Required to clear last 3 LSB */
  536. fc_high_water_mark = ((pba * 9216)/10) & 0xFFF8;
  537. adapter->hw.fc_high_water = fc_high_water_mark;
  538. adapter->hw.fc_low_water = fc_high_water_mark - 8;
  539. adapter->hw.fc_pause_time = E1000_FC_PAUSE_TIME;
  540. adapter->hw.fc_send_xon = 1;
  541. adapter->hw.fc = adapter->hw.original_fc;
  542. /* Allow time for pending master requests to run */
  543. e1000_reset_hw(&adapter->hw);
  544. if (adapter->hw.mac_type >= e1000_82544)
  545. E1000_WRITE_REG(&adapter->hw, WUC, 0);
  546. if (e1000_init_hw(&adapter->hw))
  547. DPRINTK(PROBE, ERR, "Hardware Error\n");
  548. e1000_update_mng_vlan(adapter);
  549. /* Enable h/w to recognize an 802.1Q VLAN Ethernet packet */
  550. E1000_WRITE_REG(&adapter->hw, VET, ETHERNET_IEEE_VLAN_TYPE);
  551. e1000_reset_adaptive(&adapter->hw);
  552. e1000_phy_get_info(&adapter->hw, &adapter->phy_info);
  553. if (adapter->en_mng_pt) {
  554. manc = E1000_READ_REG(&adapter->hw, MANC);
  555. manc |= (E1000_MANC_ARP_EN | E1000_MANC_EN_MNG2HOST);
  556. E1000_WRITE_REG(&adapter->hw, MANC, manc);
  557. }
  558. }
  559. /**
  560. * e1000_probe - Device Initialization Routine
  561. * @pdev: PCI device information struct
  562. * @ent: entry in e1000_pci_tbl
  563. *
  564. * Returns 0 on success, negative on failure
  565. *
  566. * e1000_probe initializes an adapter identified by a pci_dev structure.
  567. * The OS initialization, configuring of the adapter private structure,
  568. * and a hardware reset occur.
  569. **/
  570. static int __devinit
  571. e1000_probe(struct pci_dev *pdev,
  572. const struct pci_device_id *ent)
  573. {
  574. struct net_device *netdev;
  575. struct e1000_adapter *adapter;
  576. unsigned long mmio_start, mmio_len;
  577. static int cards_found = 0;
  578. int i, err, pci_using_dac;
  579. uint16_t eeprom_data;
  580. uint16_t eeprom_apme_mask = E1000_EEPROM_APME;
  581. if ((err = pci_enable_device(pdev)))
  582. return err;
  583. if (!(err = pci_set_dma_mask(pdev, DMA_64BIT_MASK))) {
  584. pci_using_dac = 1;
  585. } else {
  586. if ((err = pci_set_dma_mask(pdev, DMA_32BIT_MASK))) {
  587. E1000_ERR("No usable DMA configuration, aborting\n");
  588. return err;
  589. }
  590. pci_using_dac = 0;
  591. }
  592. if ((err = pci_request_regions(pdev, e1000_driver_name)))
  593. return err;
  594. pci_set_master(pdev);
  595. netdev = alloc_etherdev(sizeof(struct e1000_adapter));
  596. if (!netdev) {
  597. err = -ENOMEM;
  598. goto err_alloc_etherdev;
  599. }
  600. SET_MODULE_OWNER(netdev);
  601. SET_NETDEV_DEV(netdev, &pdev->dev);
  602. pci_set_drvdata(pdev, netdev);
  603. adapter = netdev_priv(netdev);
  604. adapter->netdev = netdev;
  605. adapter->pdev = pdev;
  606. adapter->hw.back = adapter;
  607. adapter->msg_enable = (1 << debug) - 1;
  608. mmio_start = pci_resource_start(pdev, BAR_0);
  609. mmio_len = pci_resource_len(pdev, BAR_0);
  610. adapter->hw.hw_addr = ioremap(mmio_start, mmio_len);
  611. if (!adapter->hw.hw_addr) {
  612. err = -EIO;
  613. goto err_ioremap;
  614. }
  615. for (i = BAR_1; i <= BAR_5; i++) {
  616. if (pci_resource_len(pdev, i) == 0)
  617. continue;
  618. if (pci_resource_flags(pdev, i) & IORESOURCE_IO) {
  619. adapter->hw.io_base = pci_resource_start(pdev, i);
  620. break;
  621. }
  622. }
  623. netdev->open = &e1000_open;
  624. netdev->stop = &e1000_close;
  625. netdev->hard_start_xmit = &e1000_xmit_frame;
  626. netdev->get_stats = &e1000_get_stats;
  627. netdev->set_multicast_list = &e1000_set_multi;
  628. netdev->set_mac_address = &e1000_set_mac;
  629. netdev->change_mtu = &e1000_change_mtu;
  630. netdev->do_ioctl = &e1000_ioctl;
  631. e1000_set_ethtool_ops(netdev);
  632. netdev->tx_timeout = &e1000_tx_timeout;
  633. netdev->watchdog_timeo = 5 * HZ;
  634. #ifdef CONFIG_E1000_NAPI
  635. netdev->poll = &e1000_clean;
  636. netdev->weight = 64;
  637. #endif
  638. netdev->vlan_rx_register = e1000_vlan_rx_register;
  639. netdev->vlan_rx_add_vid = e1000_vlan_rx_add_vid;
  640. netdev->vlan_rx_kill_vid = e1000_vlan_rx_kill_vid;
  641. #ifdef CONFIG_NET_POLL_CONTROLLER
  642. netdev->poll_controller = e1000_netpoll;
  643. #endif
  644. strcpy(netdev->name, pci_name(pdev));
  645. netdev->mem_start = mmio_start;
  646. netdev->mem_end = mmio_start + mmio_len;
  647. netdev->base_addr = adapter->hw.io_base;
  648. adapter->bd_number = cards_found;
  649. /* setup the private structure */
  650. if ((err = e1000_sw_init(adapter)))
  651. goto err_sw_init;
  652. if ((err = e1000_check_phy_reset_block(&adapter->hw)))
  653. DPRINTK(PROBE, INFO, "PHY reset is blocked due to SOL/IDER session.\n");
  654. if (adapter->hw.mac_type >= e1000_82543) {
  655. netdev->features = NETIF_F_SG |
  656. NETIF_F_HW_CSUM |
  657. NETIF_F_HW_VLAN_TX |
  658. NETIF_F_HW_VLAN_RX |
  659. NETIF_F_HW_VLAN_FILTER;
  660. }
  661. #ifdef NETIF_F_TSO
  662. if ((adapter->hw.mac_type >= e1000_82544) &&
  663. (adapter->hw.mac_type != e1000_82547))
  664. netdev->features |= NETIF_F_TSO;
  665. #ifdef NETIF_F_TSO_IPV6
  666. if (adapter->hw.mac_type > e1000_82547_rev_2)
  667. netdev->features |= NETIF_F_TSO_IPV6;
  668. #endif
  669. #endif
  670. if (pci_using_dac)
  671. netdev->features |= NETIF_F_HIGHDMA;
  672. /* hard_start_xmit is safe against parallel locking */
  673. netdev->features |= NETIF_F_LLTX;
  674. adapter->en_mng_pt = e1000_enable_mng_pass_thru(&adapter->hw);
  675. /* before reading the EEPROM, reset the controller to
  676. * put the device in a known good starting state */
  677. e1000_reset_hw(&adapter->hw);
  678. /* make sure the EEPROM is good */
  679. if (e1000_validate_eeprom_checksum(&adapter->hw) < 0) {
  680. DPRINTK(PROBE, ERR, "The EEPROM Checksum Is Not Valid\n");
  681. err = -EIO;
  682. goto err_eeprom;
  683. }
  684. /* copy the MAC address out of the EEPROM */
  685. if (e1000_read_mac_addr(&adapter->hw))
  686. DPRINTK(PROBE, ERR, "EEPROM Read Error\n");
  687. memcpy(netdev->dev_addr, adapter->hw.mac_addr, netdev->addr_len);
  688. memcpy(netdev->perm_addr, adapter->hw.mac_addr, netdev->addr_len);
  689. if (!is_valid_ether_addr(netdev->perm_addr)) {
  690. DPRINTK(PROBE, ERR, "Invalid MAC Address\n");
  691. err = -EIO;
  692. goto err_eeprom;
  693. }
  694. e1000_read_part_num(&adapter->hw, &(adapter->part_num));
  695. e1000_get_bus_info(&adapter->hw);
  696. init_timer(&adapter->tx_fifo_stall_timer);
  697. adapter->tx_fifo_stall_timer.function = &e1000_82547_tx_fifo_stall;
  698. adapter->tx_fifo_stall_timer.data = (unsigned long) adapter;
  699. init_timer(&adapter->watchdog_timer);
  700. adapter->watchdog_timer.function = &e1000_watchdog;
  701. adapter->watchdog_timer.data = (unsigned long) adapter;
  702. INIT_WORK(&adapter->watchdog_task,
  703. (void (*)(void *))e1000_watchdog_task, adapter);
  704. init_timer(&adapter->phy_info_timer);
  705. adapter->phy_info_timer.function = &e1000_update_phy_info;
  706. adapter->phy_info_timer.data = (unsigned long) adapter;
  707. INIT_WORK(&adapter->tx_timeout_task,
  708. (void (*)(void *))e1000_tx_timeout_task, netdev);
  709. /* we're going to reset, so assume we have no link for now */
  710. netif_carrier_off(netdev);
  711. netif_stop_queue(netdev);
  712. e1000_check_options(adapter);
  713. /* Initial Wake on LAN setting
  714. * If APM wake is enabled in the EEPROM,
  715. * enable the ACPI Magic Packet filter
  716. */
  717. switch (adapter->hw.mac_type) {
  718. case e1000_82542_rev2_0:
  719. case e1000_82542_rev2_1:
  720. case e1000_82543:
  721. break;
  722. case e1000_82544:
  723. e1000_read_eeprom(&adapter->hw,
  724. EEPROM_INIT_CONTROL2_REG, 1, &eeprom_data);
  725. eeprom_apme_mask = E1000_EEPROM_82544_APM;
  726. break;
  727. case e1000_82546:
  728. case e1000_82546_rev_3:
  729. case e1000_82571:
  730. if (E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_FUNC_1){
  731. e1000_read_eeprom(&adapter->hw,
  732. EEPROM_INIT_CONTROL3_PORT_B, 1, &eeprom_data);
  733. break;
  734. }
  735. /* Fall Through */
  736. default:
  737. e1000_read_eeprom(&adapter->hw,
  738. EEPROM_INIT_CONTROL3_PORT_A, 1, &eeprom_data);
  739. break;
  740. }
  741. if (eeprom_data & eeprom_apme_mask)
  742. adapter->wol |= E1000_WUFC_MAG;
  743. /* print bus type/speed/width info */
  744. {
  745. struct e1000_hw *hw = &adapter->hw;
  746. DPRINTK(PROBE, INFO, "(PCI%s:%s:%s) ",
  747. ((hw->bus_type == e1000_bus_type_pcix) ? "-X" :
  748. (hw->bus_type == e1000_bus_type_pci_express ? " Express":"")),
  749. ((hw->bus_speed == e1000_bus_speed_2500) ? "2.5Gb/s" :
  750. (hw->bus_speed == e1000_bus_speed_133) ? "133MHz" :
  751. (hw->bus_speed == e1000_bus_speed_120) ? "120MHz" :
  752. (hw->bus_speed == e1000_bus_speed_100) ? "100MHz" :
  753. (hw->bus_speed == e1000_bus_speed_66) ? "66MHz" : "33MHz"),
  754. ((hw->bus_width == e1000_bus_width_64) ? "64-bit" :
  755. (hw->bus_width == e1000_bus_width_pciex_4) ? "Width x4" :
  756. (hw->bus_width == e1000_bus_width_pciex_1) ? "Width x1" :
  757. "32-bit"));
  758. }
  759. for (i = 0; i < 6; i++)
  760. printk("%2.2x%c", netdev->dev_addr[i], i == 5 ? '\n' : ':');
  761. /* reset the hardware with the new settings */
  762. e1000_reset(adapter);
  763. /* If the controller is 82573 and f/w is AMT, do not set
  764. * DRV_LOAD until the interface is up. For all other cases,
  765. * let the f/w know that the h/w is now under the control
  766. * of the driver. */
  767. if (adapter->hw.mac_type != e1000_82573 ||
  768. !e1000_check_mng_mode(&adapter->hw))
  769. e1000_get_hw_control(adapter);
  770. strcpy(netdev->name, "eth%d");
  771. if ((err = register_netdev(netdev)))
  772. goto err_register;
  773. DPRINTK(PROBE, INFO, "Intel(R) PRO/1000 Network Connection\n");
  774. cards_found++;
  775. return 0;
  776. err_register:
  777. err_sw_init:
  778. err_eeprom:
  779. iounmap(adapter->hw.hw_addr);
  780. err_ioremap:
  781. free_netdev(netdev);
  782. err_alloc_etherdev:
  783. pci_release_regions(pdev);
  784. return err;
  785. }
  786. /**
  787. * e1000_remove - Device Removal Routine
  788. * @pdev: PCI device information struct
  789. *
  790. * e1000_remove is called by the PCI subsystem to alert the driver
  791. * that it should release a PCI device. The could be caused by a
  792. * Hot-Plug event, or because the driver is going to be removed from
  793. * memory.
  794. **/
  795. static void __devexit
  796. e1000_remove(struct pci_dev *pdev)
  797. {
  798. struct net_device *netdev = pci_get_drvdata(pdev);
  799. struct e1000_adapter *adapter = netdev_priv(netdev);
  800. uint32_t manc;
  801. #ifdef CONFIG_E1000_NAPI
  802. int i;
  803. #endif
  804. flush_scheduled_work();
  805. if (adapter->hw.mac_type >= e1000_82540 &&
  806. adapter->hw.media_type == e1000_media_type_copper) {
  807. manc = E1000_READ_REG(&adapter->hw, MANC);
  808. if (manc & E1000_MANC_SMBUS_EN) {
  809. manc |= E1000_MANC_ARP_EN;
  810. E1000_WRITE_REG(&adapter->hw, MANC, manc);
  811. }
  812. }
  813. /* Release control of h/w to f/w. If f/w is AMT enabled, this
  814. * would have already happened in close and is redundant. */
  815. e1000_release_hw_control(adapter);
  816. unregister_netdev(netdev);
  817. #ifdef CONFIG_E1000_NAPI
  818. for (i = 0; i < adapter->num_rx_queues; i++)
  819. __dev_put(&adapter->polling_netdev[i]);
  820. #endif
  821. if (!e1000_check_phy_reset_block(&adapter->hw))
  822. e1000_phy_hw_reset(&adapter->hw);
  823. kfree(adapter->tx_ring);
  824. kfree(adapter->rx_ring);
  825. #ifdef CONFIG_E1000_NAPI
  826. kfree(adapter->polling_netdev);
  827. #endif
  828. iounmap(adapter->hw.hw_addr);
  829. pci_release_regions(pdev);
  830. free_netdev(netdev);
  831. pci_disable_device(pdev);
  832. }
  833. /**
  834. * e1000_sw_init - Initialize general software structures (struct e1000_adapter)
  835. * @adapter: board private structure to initialize
  836. *
  837. * e1000_sw_init initializes the Adapter private data structure.
  838. * Fields are initialized based on PCI device information and
  839. * OS network device settings (MTU size).
  840. **/
  841. static int __devinit
  842. e1000_sw_init(struct e1000_adapter *adapter)
  843. {
  844. struct e1000_hw *hw = &adapter->hw;
  845. struct net_device *netdev = adapter->netdev;
  846. struct pci_dev *pdev = adapter->pdev;
  847. #ifdef CONFIG_E1000_NAPI
  848. int i;
  849. #endif
  850. /* PCI config space info */
  851. hw->vendor_id = pdev->vendor;
  852. hw->device_id = pdev->device;
  853. hw->subsystem_vendor_id = pdev->subsystem_vendor;
  854. hw->subsystem_id = pdev->subsystem_device;
  855. pci_read_config_byte(pdev, PCI_REVISION_ID, &hw->revision_id);
  856. pci_read_config_word(pdev, PCI_COMMAND, &hw->pci_cmd_word);
  857. adapter->rx_buffer_len = E1000_RXBUFFER_2048;
  858. adapter->rx_ps_bsize0 = E1000_RXBUFFER_256;
  859. hw->max_frame_size = netdev->mtu +
  860. ENET_HEADER_SIZE + ETHERNET_FCS_SIZE;
  861. hw->min_frame_size = MINIMUM_ETHERNET_FRAME_SIZE;
  862. /* identify the MAC */
  863. if (e1000_set_mac_type(hw)) {
  864. DPRINTK(PROBE, ERR, "Unknown MAC Type\n");
  865. return -EIO;
  866. }
  867. /* initialize eeprom parameters */
  868. if (e1000_init_eeprom_params(hw)) {
  869. E1000_ERR("EEPROM initialization failed\n");
  870. return -EIO;
  871. }
  872. switch (hw->mac_type) {
  873. default:
  874. break;
  875. case e1000_82541:
  876. case e1000_82547:
  877. case e1000_82541_rev_2:
  878. case e1000_82547_rev_2:
  879. hw->phy_init_script = 1;
  880. break;
  881. }
  882. e1000_set_media_type(hw);
  883. hw->wait_autoneg_complete = FALSE;
  884. hw->tbi_compatibility_en = TRUE;
  885. hw->adaptive_ifs = TRUE;
  886. /* Copper options */
  887. if (hw->media_type == e1000_media_type_copper) {
  888. hw->mdix = AUTO_ALL_MODES;
  889. hw->disable_polarity_correction = FALSE;
  890. hw->master_slave = E1000_MASTER_SLAVE;
  891. }
  892. adapter->num_tx_queues = 1;
  893. adapter->num_rx_queues = 1;
  894. if (e1000_alloc_queues(adapter)) {
  895. DPRINTK(PROBE, ERR, "Unable to allocate memory for queues\n");
  896. return -ENOMEM;
  897. }
  898. #ifdef CONFIG_E1000_NAPI
  899. for (i = 0; i < adapter->num_rx_queues; i++) {
  900. adapter->polling_netdev[i].priv = adapter;
  901. adapter->polling_netdev[i].poll = &e1000_clean;
  902. adapter->polling_netdev[i].weight = 64;
  903. dev_hold(&adapter->polling_netdev[i]);
  904. set_bit(__LINK_STATE_START, &adapter->polling_netdev[i].state);
  905. }
  906. spin_lock_init(&adapter->tx_queue_lock);
  907. #endif
  908. atomic_set(&adapter->irq_sem, 1);
  909. spin_lock_init(&adapter->stats_lock);
  910. return 0;
  911. }
  912. /**
  913. * e1000_alloc_queues - Allocate memory for all rings
  914. * @adapter: board private structure to initialize
  915. *
  916. * We allocate one ring per queue at run-time since we don't know the
  917. * number of queues at compile-time. The polling_netdev array is
  918. * intended for Multiqueue, but should work fine with a single queue.
  919. **/
  920. static int __devinit
  921. e1000_alloc_queues(struct e1000_adapter *adapter)
  922. {
  923. int size;
  924. size = sizeof(struct e1000_tx_ring) * adapter->num_tx_queues;
  925. adapter->tx_ring = kmalloc(size, GFP_KERNEL);
  926. if (!adapter->tx_ring)
  927. return -ENOMEM;
  928. memset(adapter->tx_ring, 0, size);
  929. size = sizeof(struct e1000_rx_ring) * adapter->num_rx_queues;
  930. adapter->rx_ring = kmalloc(size, GFP_KERNEL);
  931. if (!adapter->rx_ring) {
  932. kfree(adapter->tx_ring);
  933. return -ENOMEM;
  934. }
  935. memset(adapter->rx_ring, 0, size);
  936. #ifdef CONFIG_E1000_NAPI
  937. size = sizeof(struct net_device) * adapter->num_rx_queues;
  938. adapter->polling_netdev = kmalloc(size, GFP_KERNEL);
  939. if (!adapter->polling_netdev) {
  940. kfree(adapter->tx_ring);
  941. kfree(adapter->rx_ring);
  942. return -ENOMEM;
  943. }
  944. memset(adapter->polling_netdev, 0, size);
  945. #endif
  946. return E1000_SUCCESS;
  947. }
  948. /**
  949. * e1000_open - Called when a network interface is made active
  950. * @netdev: network interface device structure
  951. *
  952. * Returns 0 on success, negative value on failure
  953. *
  954. * The open entry point is called when a network interface is made
  955. * active by the system (IFF_UP). At this point all resources needed
  956. * for transmit and receive operations are allocated, the interrupt
  957. * handler is registered with the OS, the watchdog timer is started,
  958. * and the stack is notified that the interface is ready.
  959. **/
  960. static int
  961. e1000_open(struct net_device *netdev)
  962. {
  963. struct e1000_adapter *adapter = netdev_priv(netdev);
  964. int err;
  965. /* allocate transmit descriptors */
  966. if ((err = e1000_setup_all_tx_resources(adapter)))
  967. goto err_setup_tx;
  968. /* allocate receive descriptors */
  969. if ((err = e1000_setup_all_rx_resources(adapter)))
  970. goto err_setup_rx;
  971. if ((err = e1000_up(adapter)))
  972. goto err_up;
  973. adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
  974. if ((adapter->hw.mng_cookie.status &
  975. E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) {
  976. e1000_update_mng_vlan(adapter);
  977. }
  978. /* If AMT is enabled, let the firmware know that the network
  979. * interface is now open */
  980. if (adapter->hw.mac_type == e1000_82573 &&
  981. e1000_check_mng_mode(&adapter->hw))
  982. e1000_get_hw_control(adapter);
  983. return E1000_SUCCESS;
  984. err_up:
  985. e1000_free_all_rx_resources(adapter);
  986. err_setup_rx:
  987. e1000_free_all_tx_resources(adapter);
  988. err_setup_tx:
  989. e1000_reset(adapter);
  990. return err;
  991. }
  992. /**
  993. * e1000_close - Disables a network interface
  994. * @netdev: network interface device structure
  995. *
  996. * Returns 0, this is not allowed to fail
  997. *
  998. * The close entry point is called when an interface is de-activated
  999. * by the OS. The hardware is still under the drivers control, but
  1000. * needs to be disabled. A global MAC reset is issued to stop the
  1001. * hardware, and all transmit and receive resources are freed.
  1002. **/
  1003. static int
  1004. e1000_close(struct net_device *netdev)
  1005. {
  1006. struct e1000_adapter *adapter = netdev_priv(netdev);
  1007. e1000_down(adapter);
  1008. e1000_free_all_tx_resources(adapter);
  1009. e1000_free_all_rx_resources(adapter);
  1010. if ((adapter->hw.mng_cookie.status &
  1011. E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) {
  1012. e1000_vlan_rx_kill_vid(netdev, adapter->mng_vlan_id);
  1013. }
  1014. /* If AMT is enabled, let the firmware know that the network
  1015. * interface is now closed */
  1016. if (adapter->hw.mac_type == e1000_82573 &&
  1017. e1000_check_mng_mode(&adapter->hw))
  1018. e1000_release_hw_control(adapter);
  1019. return 0;
  1020. }
  1021. /**
  1022. * e1000_check_64k_bound - check that memory doesn't cross 64kB boundary
  1023. * @adapter: address of board private structure
  1024. * @start: address of beginning of memory
  1025. * @len: length of memory
  1026. **/
  1027. static inline boolean_t
  1028. e1000_check_64k_bound(struct e1000_adapter *adapter,
  1029. void *start, unsigned long len)
  1030. {
  1031. unsigned long begin = (unsigned long) start;
  1032. unsigned long end = begin + len;
  1033. /* First rev 82545 and 82546 need to not allow any memory
  1034. * write location to cross 64k boundary due to errata 23 */
  1035. if (adapter->hw.mac_type == e1000_82545 ||
  1036. adapter->hw.mac_type == e1000_82546) {
  1037. return ((begin ^ (end - 1)) >> 16) != 0 ? FALSE : TRUE;
  1038. }
  1039. return TRUE;
  1040. }
  1041. /**
  1042. * e1000_setup_tx_resources - allocate Tx resources (Descriptors)
  1043. * @adapter: board private structure
  1044. * @txdr: tx descriptor ring (for a specific queue) to setup
  1045. *
  1046. * Return 0 on success, negative on failure
  1047. **/
  1048. static int
  1049. e1000_setup_tx_resources(struct e1000_adapter *adapter,
  1050. struct e1000_tx_ring *txdr)
  1051. {
  1052. struct pci_dev *pdev = adapter->pdev;
  1053. int size;
  1054. size = sizeof(struct e1000_buffer) * txdr->count;
  1055. txdr->buffer_info = vmalloc_node(size, pcibus_to_node(pdev->bus));
  1056. if (!txdr->buffer_info) {
  1057. DPRINTK(PROBE, ERR,
  1058. "Unable to allocate memory for the transmit descriptor ring\n");
  1059. return -ENOMEM;
  1060. }
  1061. memset(txdr->buffer_info, 0, size);
  1062. /* round up to nearest 4K */
  1063. txdr->size = txdr->count * sizeof(struct e1000_tx_desc);
  1064. E1000_ROUNDUP(txdr->size, 4096);
  1065. txdr->desc = pci_alloc_consistent(pdev, txdr->size, &txdr->dma);
  1066. if (!txdr->desc) {
  1067. setup_tx_desc_die:
  1068. vfree(txdr->buffer_info);
  1069. DPRINTK(PROBE, ERR,
  1070. "Unable to allocate memory for the transmit descriptor ring\n");
  1071. return -ENOMEM;
  1072. }
  1073. /* Fix for errata 23, can't cross 64kB boundary */
  1074. if (!e1000_check_64k_bound(adapter, txdr->desc, txdr->size)) {
  1075. void *olddesc = txdr->desc;
  1076. dma_addr_t olddma = txdr->dma;
  1077. DPRINTK(TX_ERR, ERR, "txdr align check failed: %u bytes "
  1078. "at %p\n", txdr->size, txdr->desc);
  1079. /* Try again, without freeing the previous */
  1080. txdr->desc = pci_alloc_consistent(pdev, txdr->size, &txdr->dma);
  1081. /* Failed allocation, critical failure */
  1082. if (!txdr->desc) {
  1083. pci_free_consistent(pdev, txdr->size, olddesc, olddma);
  1084. goto setup_tx_desc_die;
  1085. }
  1086. if (!e1000_check_64k_bound(adapter, txdr->desc, txdr->size)) {
  1087. /* give up */
  1088. pci_free_consistent(pdev, txdr->size, txdr->desc,
  1089. txdr->dma);
  1090. pci_free_consistent(pdev, txdr->size, olddesc, olddma);
  1091. DPRINTK(PROBE, ERR,
  1092. "Unable to allocate aligned memory "
  1093. "for the transmit descriptor ring\n");
  1094. vfree(txdr->buffer_info);
  1095. return -ENOMEM;
  1096. } else {
  1097. /* Free old allocation, new allocation was successful */
  1098. pci_free_consistent(pdev, txdr->size, olddesc, olddma);
  1099. }
  1100. }
  1101. memset(txdr->desc, 0, txdr->size);
  1102. txdr->next_to_use = 0;
  1103. txdr->next_to_clean = 0;
  1104. spin_lock_init(&txdr->tx_lock);
  1105. return 0;
  1106. }
  1107. /**
  1108. * e1000_setup_all_tx_resources - wrapper to allocate Tx resources
  1109. * (Descriptors) for all queues
  1110. * @adapter: board private structure
  1111. *
  1112. * If this function returns with an error, then it's possible one or
  1113. * more of the rings is populated (while the rest are not). It is the
  1114. * callers duty to clean those orphaned rings.
  1115. *
  1116. * Return 0 on success, negative on failure
  1117. **/
  1118. int
  1119. e1000_setup_all_tx_resources(struct e1000_adapter *adapter)
  1120. {
  1121. int i, err = 0;
  1122. for (i = 0; i < adapter->num_tx_queues; i++) {
  1123. err = e1000_setup_tx_resources(adapter, &adapter->tx_ring[i]);
  1124. if (err) {
  1125. DPRINTK(PROBE, ERR,
  1126. "Allocation for Tx Queue %u failed\n", i);
  1127. break;
  1128. }
  1129. }
  1130. return err;
  1131. }
  1132. /**
  1133. * e1000_configure_tx - Configure 8254x Transmit Unit after Reset
  1134. * @adapter: board private structure
  1135. *
  1136. * Configure the Tx unit of the MAC after a reset.
  1137. **/
  1138. static void
  1139. e1000_configure_tx(struct e1000_adapter *adapter)
  1140. {
  1141. uint64_t tdba;
  1142. struct e1000_hw *hw = &adapter->hw;
  1143. uint32_t tdlen, tctl, tipg, tarc;
  1144. uint32_t ipgr1, ipgr2;
  1145. /* Setup the HW Tx Head and Tail descriptor pointers */
  1146. switch (adapter->num_tx_queues) {
  1147. case 1:
  1148. default:
  1149. tdba = adapter->tx_ring[0].dma;
  1150. tdlen = adapter->tx_ring[0].count *
  1151. sizeof(struct e1000_tx_desc);
  1152. E1000_WRITE_REG(hw, TDBAL, (tdba & 0x00000000ffffffffULL));
  1153. E1000_WRITE_REG(hw, TDBAH, (tdba >> 32));
  1154. E1000_WRITE_REG(hw, TDLEN, tdlen);
  1155. E1000_WRITE_REG(hw, TDH, 0);
  1156. E1000_WRITE_REG(hw, TDT, 0);
  1157. adapter->tx_ring[0].tdh = E1000_TDH;
  1158. adapter->tx_ring[0].tdt = E1000_TDT;
  1159. break;
  1160. }
  1161. /* Set the default values for the Tx Inter Packet Gap timer */
  1162. if (hw->media_type == e1000_media_type_fiber ||
  1163. hw->media_type == e1000_media_type_internal_serdes)
  1164. tipg = DEFAULT_82543_TIPG_IPGT_FIBER;
  1165. else
  1166. tipg = DEFAULT_82543_TIPG_IPGT_COPPER;
  1167. switch (hw->mac_type) {
  1168. case e1000_82542_rev2_0:
  1169. case e1000_82542_rev2_1:
  1170. tipg = DEFAULT_82542_TIPG_IPGT;
  1171. ipgr1 = DEFAULT_82542_TIPG_IPGR1;
  1172. ipgr2 = DEFAULT_82542_TIPG_IPGR2;
  1173. break;
  1174. default:
  1175. ipgr1 = DEFAULT_82543_TIPG_IPGR1;
  1176. ipgr2 = DEFAULT_82543_TIPG_IPGR2;
  1177. break;
  1178. }
  1179. tipg |= ipgr1 << E1000_TIPG_IPGR1_SHIFT;
  1180. tipg |= ipgr2 << E1000_TIPG_IPGR2_SHIFT;
  1181. E1000_WRITE_REG(hw, TIPG, tipg);
  1182. /* Set the Tx Interrupt Delay register */
  1183. E1000_WRITE_REG(hw, TIDV, adapter->tx_int_delay);
  1184. if (hw->mac_type >= e1000_82540)
  1185. E1000_WRITE_REG(hw, TADV, adapter->tx_abs_int_delay);
  1186. /* Program the Transmit Control Register */
  1187. tctl = E1000_READ_REG(hw, TCTL);
  1188. tctl &= ~E1000_TCTL_CT;
  1189. tctl |= E1000_TCTL_EN | E1000_TCTL_PSP | E1000_TCTL_RTLC |
  1190. (E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT);
  1191. E1000_WRITE_REG(hw, TCTL, tctl);
  1192. if (hw->mac_type == e1000_82571 || hw->mac_type == e1000_82572) {
  1193. tarc = E1000_READ_REG(hw, TARC0);
  1194. tarc |= ((1 << 25) | (1 << 21));
  1195. E1000_WRITE_REG(hw, TARC0, tarc);
  1196. tarc = E1000_READ_REG(hw, TARC1);
  1197. tarc |= (1 << 25);
  1198. if (tctl & E1000_TCTL_MULR)
  1199. tarc &= ~(1 << 28);
  1200. else
  1201. tarc |= (1 << 28);
  1202. E1000_WRITE_REG(hw, TARC1, tarc);
  1203. }
  1204. e1000_config_collision_dist(hw);
  1205. /* Setup Transmit Descriptor Settings for eop descriptor */
  1206. adapter->txd_cmd = E1000_TXD_CMD_IDE | E1000_TXD_CMD_EOP |
  1207. E1000_TXD_CMD_IFCS;
  1208. if (hw->mac_type < e1000_82543)
  1209. adapter->txd_cmd |= E1000_TXD_CMD_RPS;
  1210. else
  1211. adapter->txd_cmd |= E1000_TXD_CMD_RS;
  1212. /* Cache if we're 82544 running in PCI-X because we'll
  1213. * need this to apply a workaround later in the send path. */
  1214. if (hw->mac_type == e1000_82544 &&
  1215. hw->bus_type == e1000_bus_type_pcix)
  1216. adapter->pcix_82544 = 1;
  1217. }
  1218. /**
  1219. * e1000_setup_rx_resources - allocate Rx resources (Descriptors)
  1220. * @adapter: board private structure
  1221. * @rxdr: rx descriptor ring (for a specific queue) to setup
  1222. *
  1223. * Returns 0 on success, negative on failure
  1224. **/
  1225. static int
  1226. e1000_setup_rx_resources(struct e1000_adapter *adapter,
  1227. struct e1000_rx_ring *rxdr)
  1228. {
  1229. struct pci_dev *pdev = adapter->pdev;
  1230. int size, desc_len;
  1231. size = sizeof(struct e1000_buffer) * rxdr->count;
  1232. rxdr->buffer_info = vmalloc_node(size, pcibus_to_node(pdev->bus));
  1233. if (!rxdr->buffer_info) {
  1234. DPRINTK(PROBE, ERR,
  1235. "Unable to allocate memory for the receive descriptor ring\n");
  1236. return -ENOMEM;
  1237. }
  1238. memset(rxdr->buffer_info, 0, size);
  1239. size = sizeof(struct e1000_ps_page) * rxdr->count;
  1240. rxdr->ps_page = kmalloc(size, GFP_KERNEL);
  1241. if (!rxdr->ps_page) {
  1242. vfree(rxdr->buffer_info);
  1243. DPRINTK(PROBE, ERR,
  1244. "Unable to allocate memory for the receive descriptor ring\n");
  1245. return -ENOMEM;
  1246. }
  1247. memset(rxdr->ps_page, 0, size);
  1248. size = sizeof(struct e1000_ps_page_dma) * rxdr->count;
  1249. rxdr->ps_page_dma = kmalloc(size, GFP_KERNEL);
  1250. if (!rxdr->ps_page_dma) {
  1251. vfree(rxdr->buffer_info);
  1252. kfree(rxdr->ps_page);
  1253. DPRINTK(PROBE, ERR,
  1254. "Unable to allocate memory for the receive descriptor ring\n");
  1255. return -ENOMEM;
  1256. }
  1257. memset(rxdr->ps_page_dma, 0, size);
  1258. if (adapter->hw.mac_type <= e1000_82547_rev_2)
  1259. desc_len = sizeof(struct e1000_rx_desc);
  1260. else
  1261. desc_len = sizeof(union e1000_rx_desc_packet_split);
  1262. /* Round up to nearest 4K */
  1263. rxdr->size = rxdr->count * desc_len;
  1264. E1000_ROUNDUP(rxdr->size, 4096);
  1265. rxdr->desc = pci_alloc_consistent(pdev, rxdr->size, &rxdr->dma);
  1266. if (!rxdr->desc) {
  1267. DPRINTK(PROBE, ERR,
  1268. "Unable to allocate memory for the receive descriptor ring\n");
  1269. setup_rx_desc_die:
  1270. vfree(rxdr->buffer_info);
  1271. kfree(rxdr->ps_page);
  1272. kfree(rxdr->ps_page_dma);
  1273. return -ENOMEM;
  1274. }
  1275. /* Fix for errata 23, can't cross 64kB boundary */
  1276. if (!e1000_check_64k_bound(adapter, rxdr->desc, rxdr->size)) {
  1277. void *olddesc = rxdr->desc;
  1278. dma_addr_t olddma = rxdr->dma;
  1279. DPRINTK(RX_ERR, ERR, "rxdr align check failed: %u bytes "
  1280. "at %p\n", rxdr->size, rxdr->desc);
  1281. /* Try again, without freeing the previous */
  1282. rxdr->desc = pci_alloc_consistent(pdev, rxdr->size, &rxdr->dma);
  1283. /* Failed allocation, critical failure */
  1284. if (!rxdr->desc) {
  1285. pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
  1286. DPRINTK(PROBE, ERR,
  1287. "Unable to allocate memory "
  1288. "for the receive descriptor ring\n");
  1289. goto setup_rx_desc_die;
  1290. }
  1291. if (!e1000_check_64k_bound(adapter, rxdr->desc, rxdr->size)) {
  1292. /* give up */
  1293. pci_free_consistent(pdev, rxdr->size, rxdr->desc,
  1294. rxdr->dma);
  1295. pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
  1296. DPRINTK(PROBE, ERR,
  1297. "Unable to allocate aligned memory "
  1298. "for the receive descriptor ring\n");
  1299. goto setup_rx_desc_die;
  1300. } else {
  1301. /* Free old allocation, new allocation was successful */
  1302. pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
  1303. }
  1304. }
  1305. memset(rxdr->desc, 0, rxdr->size);
  1306. rxdr->next_to_clean = 0;
  1307. rxdr->next_to_use = 0;
  1308. return 0;
  1309. }
  1310. /**
  1311. * e1000_setup_all_rx_resources - wrapper to allocate Rx resources
  1312. * (Descriptors) for all queues
  1313. * @adapter: board private structure
  1314. *
  1315. * If this function returns with an error, then it's possible one or
  1316. * more of the rings is populated (while the rest are not). It is the
  1317. * callers duty to clean those orphaned rings.
  1318. *
  1319. * Return 0 on success, negative on failure
  1320. **/
  1321. int
  1322. e1000_setup_all_rx_resources(struct e1000_adapter *adapter)
  1323. {
  1324. int i, err = 0;
  1325. for (i = 0; i < adapter->num_rx_queues; i++) {
  1326. err = e1000_setup_rx_resources(adapter, &adapter->rx_ring[i]);
  1327. if (err) {
  1328. DPRINTK(PROBE, ERR,
  1329. "Allocation for Rx Queue %u failed\n", i);
  1330. break;
  1331. }
  1332. }
  1333. return err;
  1334. }
  1335. /**
  1336. * e1000_setup_rctl - configure the receive control registers
  1337. * @adapter: Board private structure
  1338. **/
  1339. #define PAGE_USE_COUNT(S) (((S) >> PAGE_SHIFT) + \
  1340. (((S) & (PAGE_SIZE - 1)) ? 1 : 0))
  1341. static void
  1342. e1000_setup_rctl(struct e1000_adapter *adapter)
  1343. {
  1344. uint32_t rctl, rfctl;
  1345. uint32_t psrctl = 0;
  1346. #ifndef CONFIG_E1000_DISABLE_PACKET_SPLIT
  1347. uint32_t pages = 0;
  1348. #endif
  1349. rctl = E1000_READ_REG(&adapter->hw, RCTL);
  1350. rctl &= ~(3 << E1000_RCTL_MO_SHIFT);
  1351. rctl |= E1000_RCTL_EN | E1000_RCTL_BAM |
  1352. E1000_RCTL_LBM_NO | E1000_RCTL_RDMTS_HALF |
  1353. (adapter->hw.mc_filter_type << E1000_RCTL_MO_SHIFT);
  1354. if (adapter->hw.mac_type > e1000_82543)
  1355. rctl |= E1000_RCTL_SECRC;
  1356. if (adapter->hw.tbi_compatibility_on == 1)
  1357. rctl |= E1000_RCTL_SBP;
  1358. else
  1359. rctl &= ~E1000_RCTL_SBP;
  1360. if (adapter->netdev->mtu <= ETH_DATA_LEN)
  1361. rctl &= ~E1000_RCTL_LPE;
  1362. else
  1363. rctl |= E1000_RCTL_LPE;
  1364. /* Setup buffer sizes */
  1365. if (adapter->hw.mac_type >= e1000_82571) {
  1366. /* We can now specify buffers in 1K increments.
  1367. * BSIZE and BSEX are ignored in this case. */
  1368. rctl |= adapter->rx_buffer_len << 0x11;
  1369. } else {
  1370. rctl &= ~E1000_RCTL_SZ_4096;
  1371. rctl |= E1000_RCTL_BSEX;
  1372. switch (adapter->rx_buffer_len) {
  1373. case E1000_RXBUFFER_2048:
  1374. default:
  1375. rctl |= E1000_RCTL_SZ_2048;
  1376. rctl &= ~E1000_RCTL_BSEX;
  1377. break;
  1378. case E1000_RXBUFFER_4096:
  1379. rctl |= E1000_RCTL_SZ_4096;
  1380. break;
  1381. case E1000_RXBUFFER_8192:
  1382. rctl |= E1000_RCTL_SZ_8192;
  1383. break;
  1384. case E1000_RXBUFFER_16384:
  1385. rctl |= E1000_RCTL_SZ_16384;
  1386. break;
  1387. }
  1388. }
  1389. #ifndef CONFIG_E1000_DISABLE_PACKET_SPLIT
  1390. /* 82571 and greater support packet-split where the protocol
  1391. * header is placed in skb->data and the packet data is
  1392. * placed in pages hanging off of skb_shinfo(skb)->nr_frags.
  1393. * In the case of a non-split, skb->data is linearly filled,
  1394. * followed by the page buffers. Therefore, skb->data is
  1395. * sized to hold the largest protocol header.
  1396. */
  1397. pages = PAGE_USE_COUNT(adapter->netdev->mtu);
  1398. if ((adapter->hw.mac_type > e1000_82547_rev_2) && (pages <= 3) &&
  1399. PAGE_SIZE <= 16384)
  1400. adapter->rx_ps_pages = pages;
  1401. else
  1402. adapter->rx_ps_pages = 0;
  1403. #endif
  1404. if (adapter->rx_ps_pages) {
  1405. /* Configure extra packet-split registers */
  1406. rfctl = E1000_READ_REG(&adapter->hw, RFCTL);
  1407. rfctl |= E1000_RFCTL_EXTEN;
  1408. /* disable IPv6 packet split support */
  1409. rfctl |= E1000_RFCTL_IPV6_DIS;
  1410. E1000_WRITE_REG(&adapter->hw, RFCTL, rfctl);
  1411. rctl |= E1000_RCTL_DTYP_PS | E1000_RCTL_SECRC;
  1412. psrctl |= adapter->rx_ps_bsize0 >>
  1413. E1000_PSRCTL_BSIZE0_SHIFT;
  1414. switch (adapter->rx_ps_pages) {
  1415. case 3:
  1416. psrctl |= PAGE_SIZE <<
  1417. E1000_PSRCTL_BSIZE3_SHIFT;
  1418. case 2:
  1419. psrctl |= PAGE_SIZE <<
  1420. E1000_PSRCTL_BSIZE2_SHIFT;
  1421. case 1:
  1422. psrctl |= PAGE_SIZE >>
  1423. E1000_PSRCTL_BSIZE1_SHIFT;
  1424. break;
  1425. }
  1426. E1000_WRITE_REG(&adapter->hw, PSRCTL, psrctl);
  1427. }
  1428. E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
  1429. }
  1430. /**
  1431. * e1000_configure_rx - Configure 8254x Receive Unit after Reset
  1432. * @adapter: board private structure
  1433. *
  1434. * Configure the Rx unit of the MAC after a reset.
  1435. **/
  1436. static void
  1437. e1000_configure_rx(struct e1000_adapter *adapter)
  1438. {
  1439. uint64_t rdba;
  1440. struct e1000_hw *hw = &adapter->hw;
  1441. uint32_t rdlen, rctl, rxcsum, ctrl_ext;
  1442. if (adapter->rx_ps_pages) {
  1443. rdlen = adapter->rx_ring[0].count *
  1444. sizeof(union e1000_rx_desc_packet_split);
  1445. adapter->clean_rx = e1000_clean_rx_irq_ps;
  1446. adapter->alloc_rx_buf = e1000_alloc_rx_buffers_ps;
  1447. } else {
  1448. rdlen = adapter->rx_ring[0].count *
  1449. sizeof(struct e1000_rx_desc);
  1450. adapter->clean_rx = e1000_clean_rx_irq;
  1451. adapter->alloc_rx_buf = e1000_alloc_rx_buffers;
  1452. }
  1453. /* disable receives while setting up the descriptors */
  1454. rctl = E1000_READ_REG(hw, RCTL);
  1455. E1000_WRITE_REG(hw, RCTL, rctl & ~E1000_RCTL_EN);
  1456. /* set the Receive Delay Timer Register */
  1457. E1000_WRITE_REG(hw, RDTR, adapter->rx_int_delay);
  1458. if (hw->mac_type >= e1000_82540) {
  1459. E1000_WRITE_REG(hw, RADV, adapter->rx_abs_int_delay);
  1460. if (adapter->itr > 1)
  1461. E1000_WRITE_REG(hw, ITR,
  1462. 1000000000 / (adapter->itr * 256));
  1463. }
  1464. if (hw->mac_type >= e1000_82571) {
  1465. ctrl_ext = E1000_READ_REG(hw, CTRL_EXT);
  1466. /* Reset delay timers after every interrupt */
  1467. ctrl_ext |= E1000_CTRL_EXT_CANC;
  1468. #ifdef CONFIG_E1000_NAPI
  1469. /* Auto-Mask interrupts upon ICR read. */
  1470. ctrl_ext |= E1000_CTRL_EXT_IAME;
  1471. #endif
  1472. E1000_WRITE_REG(hw, CTRL_EXT, ctrl_ext);
  1473. E1000_WRITE_REG(hw, IAM, ~0);
  1474. E1000_WRITE_FLUSH(hw);
  1475. }
  1476. /* Setup the HW Rx Head and Tail Descriptor Pointers and
  1477. * the Base and Length of the Rx Descriptor Ring */
  1478. switch (adapter->num_rx_queues) {
  1479. case 1:
  1480. default:
  1481. rdba = adapter->rx_ring[0].dma;
  1482. E1000_WRITE_REG(hw, RDBAL, (rdba & 0x00000000ffffffffULL));
  1483. E1000_WRITE_REG(hw, RDBAH, (rdba >> 32));
  1484. E1000_WRITE_REG(hw, RDLEN, rdlen);
  1485. E1000_WRITE_REG(hw, RDH, 0);
  1486. E1000_WRITE_REG(hw, RDT, 0);
  1487. adapter->rx_ring[0].rdh = E1000_RDH;
  1488. adapter->rx_ring[0].rdt = E1000_RDT;
  1489. break;
  1490. }
  1491. /* Enable 82543 Receive Checksum Offload for TCP and UDP */
  1492. if (hw->mac_type >= e1000_82543) {
  1493. rxcsum = E1000_READ_REG(hw, RXCSUM);
  1494. if (adapter->rx_csum == TRUE) {
  1495. rxcsum |= E1000_RXCSUM_TUOFL;
  1496. /* Enable 82571 IPv4 payload checksum for UDP fragments
  1497. * Must be used in conjunction with packet-split. */
  1498. if ((hw->mac_type >= e1000_82571) &&
  1499. (adapter->rx_ps_pages)) {
  1500. rxcsum |= E1000_RXCSUM_IPPCSE;
  1501. }
  1502. } else {
  1503. rxcsum &= ~E1000_RXCSUM_TUOFL;
  1504. /* don't need to clear IPPCSE as it defaults to 0 */
  1505. }
  1506. E1000_WRITE_REG(hw, RXCSUM, rxcsum);
  1507. }
  1508. if (hw->mac_type == e1000_82573)
  1509. E1000_WRITE_REG(hw, ERT, 0x0100);
  1510. /* Enable Receives */
  1511. E1000_WRITE_REG(hw, RCTL, rctl);
  1512. }
  1513. /**
  1514. * e1000_free_tx_resources - Free Tx Resources per Queue
  1515. * @adapter: board private structure
  1516. * @tx_ring: Tx descriptor ring for a specific queue
  1517. *
  1518. * Free all transmit software resources
  1519. **/
  1520. static void
  1521. e1000_free_tx_resources(struct e1000_adapter *adapter,
  1522. struct e1000_tx_ring *tx_ring)
  1523. {
  1524. struct pci_dev *pdev = adapter->pdev;
  1525. e1000_clean_tx_ring(adapter, tx_ring);
  1526. vfree(tx_ring->buffer_info);
  1527. tx_ring->buffer_info = NULL;
  1528. pci_free_consistent(pdev, tx_ring->size, tx_ring->desc, tx_ring->dma);
  1529. tx_ring->desc = NULL;
  1530. }
  1531. /**
  1532. * e1000_free_all_tx_resources - Free Tx Resources for All Queues
  1533. * @adapter: board private structure
  1534. *
  1535. * Free all transmit software resources
  1536. **/
  1537. void
  1538. e1000_free_all_tx_resources(struct e1000_adapter *adapter)
  1539. {
  1540. int i;
  1541. for (i = 0; i < adapter->num_tx_queues; i++)
  1542. e1000_free_tx_resources(adapter, &adapter->tx_ring[i]);
  1543. }
  1544. static inline void
  1545. e1000_unmap_and_free_tx_resource(struct e1000_adapter *adapter,
  1546. struct e1000_buffer *buffer_info)
  1547. {
  1548. if (buffer_info->dma) {
  1549. pci_unmap_page(adapter->pdev,
  1550. buffer_info->dma,
  1551. buffer_info->length,
  1552. PCI_DMA_TODEVICE);
  1553. }
  1554. if (buffer_info->skb)
  1555. dev_kfree_skb_any(buffer_info->skb);
  1556. memset(buffer_info, 0, sizeof(struct e1000_buffer));
  1557. }
  1558. /**
  1559. * e1000_clean_tx_ring - Free Tx Buffers
  1560. * @adapter: board private structure
  1561. * @tx_ring: ring to be cleaned
  1562. **/
  1563. static void
  1564. e1000_clean_tx_ring(struct e1000_adapter *adapter,
  1565. struct e1000_tx_ring *tx_ring)
  1566. {
  1567. struct e1000_buffer *buffer_info;
  1568. unsigned long size;
  1569. unsigned int i;
  1570. /* Free all the Tx ring sk_buffs */
  1571. for (i = 0; i < tx_ring->count; i++) {
  1572. buffer_info = &tx_ring->buffer_info[i];
  1573. e1000_unmap_and_free_tx_resource(adapter, buffer_info);
  1574. }
  1575. size = sizeof(struct e1000_buffer) * tx_ring->count;
  1576. memset(tx_ring->buffer_info, 0, size);
  1577. /* Zero out the descriptor ring */
  1578. memset(tx_ring->desc, 0, tx_ring->size);
  1579. tx_ring->next_to_use = 0;
  1580. tx_ring->next_to_clean = 0;
  1581. tx_ring->last_tx_tso = 0;
  1582. writel(0, adapter->hw.hw_addr + tx_ring->tdh);
  1583. writel(0, adapter->hw.hw_addr + tx_ring->tdt);
  1584. }
  1585. /**
  1586. * e1000_clean_all_tx_rings - Free Tx Buffers for all queues
  1587. * @adapter: board private structure
  1588. **/
  1589. static void
  1590. e1000_clean_all_tx_rings(struct e1000_adapter *adapter)
  1591. {
  1592. int i;
  1593. for (i = 0; i < adapter->num_tx_queues; i++)
  1594. e1000_clean_tx_ring(adapter, &adapter->tx_ring[i]);
  1595. }
  1596. /**
  1597. * e1000_free_rx_resources - Free Rx Resources
  1598. * @adapter: board private structure
  1599. * @rx_ring: ring to clean the resources from
  1600. *
  1601. * Free all receive software resources
  1602. **/
  1603. static void
  1604. e1000_free_rx_resources(struct e1000_adapter *adapter,
  1605. struct e1000_rx_ring *rx_ring)
  1606. {
  1607. struct pci_dev *pdev = adapter->pdev;
  1608. e1000_clean_rx_ring(adapter, rx_ring);
  1609. vfree(rx_ring->buffer_info);
  1610. rx_ring->buffer_info = NULL;
  1611. kfree(rx_ring->ps_page);
  1612. rx_ring->ps_page = NULL;
  1613. kfree(rx_ring->ps_page_dma);
  1614. rx_ring->ps_page_dma = NULL;
  1615. pci_free_consistent(pdev, rx_ring->size, rx_ring->desc, rx_ring->dma);
  1616. rx_ring->desc = NULL;
  1617. }
  1618. /**
  1619. * e1000_free_all_rx_resources - Free Rx Resources for All Queues
  1620. * @adapter: board private structure
  1621. *
  1622. * Free all receive software resources
  1623. **/
  1624. void
  1625. e1000_free_all_rx_resources(struct e1000_adapter *adapter)
  1626. {
  1627. int i;
  1628. for (i = 0; i < adapter->num_rx_queues; i++)
  1629. e1000_free_rx_resources(adapter, &adapter->rx_ring[i]);
  1630. }
  1631. /**
  1632. * e1000_clean_rx_ring - Free Rx Buffers per Queue
  1633. * @adapter: board private structure
  1634. * @rx_ring: ring to free buffers from
  1635. **/
  1636. static void
  1637. e1000_clean_rx_ring(struct e1000_adapter *adapter,
  1638. struct e1000_rx_ring *rx_ring)
  1639. {
  1640. struct e1000_buffer *buffer_info;
  1641. struct e1000_ps_page *ps_page;
  1642. struct e1000_ps_page_dma *ps_page_dma;
  1643. struct pci_dev *pdev = adapter->pdev;
  1644. unsigned long size;
  1645. unsigned int i, j;
  1646. /* Free all the Rx ring sk_buffs */
  1647. for (i = 0; i < rx_ring->count; i++) {
  1648. buffer_info = &rx_ring->buffer_info[i];
  1649. if (buffer_info->skb) {
  1650. pci_unmap_single(pdev,
  1651. buffer_info->dma,
  1652. buffer_info->length,
  1653. PCI_DMA_FROMDEVICE);
  1654. dev_kfree_skb(buffer_info->skb);
  1655. buffer_info->skb = NULL;
  1656. }
  1657. ps_page = &rx_ring->ps_page[i];
  1658. ps_page_dma = &rx_ring->ps_page_dma[i];
  1659. for (j = 0; j < adapter->rx_ps_pages; j++) {
  1660. if (!ps_page->ps_page[j]) break;
  1661. pci_unmap_page(pdev,
  1662. ps_page_dma->ps_page_dma[j],
  1663. PAGE_SIZE, PCI_DMA_FROMDEVICE);
  1664. ps_page_dma->ps_page_dma[j] = 0;
  1665. put_page(ps_page->ps_page[j]);
  1666. ps_page->ps_page[j] = NULL;
  1667. }
  1668. }
  1669. size = sizeof(struct e1000_buffer) * rx_ring->count;
  1670. memset(rx_ring->buffer_info, 0, size);
  1671. size = sizeof(struct e1000_ps_page) * rx_ring->count;
  1672. memset(rx_ring->ps_page, 0, size);
  1673. size = sizeof(struct e1000_ps_page_dma) * rx_ring->count;
  1674. memset(rx_ring->ps_page_dma, 0, size);
  1675. /* Zero out the descriptor ring */
  1676. memset(rx_ring->desc, 0, rx_ring->size);
  1677. rx_ring->next_to_clean = 0;
  1678. rx_ring->next_to_use = 0;
  1679. writel(0, adapter->hw.hw_addr + rx_ring->rdh);
  1680. writel(0, adapter->hw.hw_addr + rx_ring->rdt);
  1681. }
  1682. /**
  1683. * e1000_clean_all_rx_rings - Free Rx Buffers for all queues
  1684. * @adapter: board private structure
  1685. **/
  1686. static void
  1687. e1000_clean_all_rx_rings(struct e1000_adapter *adapter)
  1688. {
  1689. int i;
  1690. for (i = 0; i < adapter->num_rx_queues; i++)
  1691. e1000_clean_rx_ring(adapter, &adapter->rx_ring[i]);
  1692. }
  1693. /* The 82542 2.0 (revision 2) needs to have the receive unit in reset
  1694. * and memory write and invalidate disabled for certain operations
  1695. */
  1696. static void
  1697. e1000_enter_82542_rst(struct e1000_adapter *adapter)
  1698. {
  1699. struct net_device *netdev = adapter->netdev;
  1700. uint32_t rctl;
  1701. e1000_pci_clear_mwi(&adapter->hw);
  1702. rctl = E1000_READ_REG(&adapter->hw, RCTL);
  1703. rctl |= E1000_RCTL_RST;
  1704. E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
  1705. E1000_WRITE_FLUSH(&adapter->hw);
  1706. mdelay(5);
  1707. if (netif_running(netdev))
  1708. e1000_clean_all_rx_rings(adapter);
  1709. }
  1710. static void
  1711. e1000_leave_82542_rst(struct e1000_adapter *adapter)
  1712. {
  1713. struct net_device *netdev = adapter->netdev;
  1714. uint32_t rctl;
  1715. rctl = E1000_READ_REG(&adapter->hw, RCTL);
  1716. rctl &= ~E1000_RCTL_RST;
  1717. E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
  1718. E1000_WRITE_FLUSH(&adapter->hw);
  1719. mdelay(5);
  1720. if (adapter->hw.pci_cmd_word & PCI_COMMAND_INVALIDATE)
  1721. e1000_pci_set_mwi(&adapter->hw);
  1722. if (netif_running(netdev)) {
  1723. /* No need to loop, because 82542 supports only 1 queue */
  1724. struct e1000_rx_ring *ring = &adapter->rx_ring[0];
  1725. e1000_configure_rx(adapter);
  1726. adapter->alloc_rx_buf(adapter, ring, E1000_DESC_UNUSED(ring));
  1727. }
  1728. }
  1729. /**
  1730. * e1000_set_mac - Change the Ethernet Address of the NIC
  1731. * @netdev: network interface device structure
  1732. * @p: pointer to an address structure
  1733. *
  1734. * Returns 0 on success, negative on failure
  1735. **/
  1736. static int
  1737. e1000_set_mac(struct net_device *netdev, void *p)
  1738. {
  1739. struct e1000_adapter *adapter = netdev_priv(netdev);
  1740. struct sockaddr *addr = p;
  1741. if (!is_valid_ether_addr(addr->sa_data))
  1742. return -EADDRNOTAVAIL;
  1743. /* 82542 2.0 needs to be in reset to write receive address registers */
  1744. if (adapter->hw.mac_type == e1000_82542_rev2_0)
  1745. e1000_enter_82542_rst(adapter);
  1746. memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
  1747. memcpy(adapter->hw.mac_addr, addr->sa_data, netdev->addr_len);
  1748. e1000_rar_set(&adapter->hw, adapter->hw.mac_addr, 0);
  1749. /* With 82571 controllers, LAA may be overwritten (with the default)
  1750. * due to controller reset from the other port. */
  1751. if (adapter->hw.mac_type == e1000_82571) {
  1752. /* activate the work around */
  1753. adapter->hw.laa_is_present = 1;
  1754. /* Hold a copy of the LAA in RAR[14] This is done so that
  1755. * between the time RAR[0] gets clobbered and the time it
  1756. * gets fixed (in e1000_watchdog), the actual LAA is in one
  1757. * of the RARs and no incoming packets directed to this port
  1758. * are dropped. Eventaully the LAA will be in RAR[0] and
  1759. * RAR[14] */
  1760. e1000_rar_set(&adapter->hw, adapter->hw.mac_addr,
  1761. E1000_RAR_ENTRIES - 1);
  1762. }
  1763. if (adapter->hw.mac_type == e1000_82542_rev2_0)
  1764. e1000_leave_82542_rst(adapter);
  1765. return 0;
  1766. }
  1767. /**
  1768. * e1000_set_multi - Multicast and Promiscuous mode set
  1769. * @netdev: network interface device structure
  1770. *
  1771. * The set_multi entry point is called whenever the multicast address
  1772. * list or the network interface flags are updated. This routine is
  1773. * responsible for configuring the hardware for proper multicast,
  1774. * promiscuous mode, and all-multi behavior.
  1775. **/
  1776. static void
  1777. e1000_set_multi(struct net_device *netdev)
  1778. {
  1779. struct e1000_adapter *adapter = netdev_priv(netdev);
  1780. struct e1000_hw *hw = &adapter->hw;
  1781. struct dev_mc_list *mc_ptr;
  1782. uint32_t rctl;
  1783. uint32_t hash_value;
  1784. int i, rar_entries = E1000_RAR_ENTRIES;
  1785. /* reserve RAR[14] for LAA over-write work-around */
  1786. if (adapter->hw.mac_type == e1000_82571)
  1787. rar_entries--;
  1788. /* Check for Promiscuous and All Multicast modes */
  1789. rctl = E1000_READ_REG(hw, RCTL);
  1790. if (netdev->flags & IFF_PROMISC) {
  1791. rctl |= (E1000_RCTL_UPE | E1000_RCTL_MPE);
  1792. } else if (netdev->flags & IFF_ALLMULTI) {
  1793. rctl |= E1000_RCTL_MPE;
  1794. rctl &= ~E1000_RCTL_UPE;
  1795. } else {
  1796. rctl &= ~(E1000_RCTL_UPE | E1000_RCTL_MPE);
  1797. }
  1798. E1000_WRITE_REG(hw, RCTL, rctl);
  1799. /* 82542 2.0 needs to be in reset to write receive address registers */
  1800. if (hw->mac_type == e1000_82542_rev2_0)
  1801. e1000_enter_82542_rst(adapter);
  1802. /* load the first 14 multicast address into the exact filters 1-14
  1803. * RAR 0 is used for the station MAC adddress
  1804. * if there are not 14 addresses, go ahead and clear the filters
  1805. * -- with 82571 controllers only 0-13 entries are filled here
  1806. */
  1807. mc_ptr = netdev->mc_list;
  1808. for (i = 1; i < rar_entries; i++) {
  1809. if (mc_ptr) {
  1810. e1000_rar_set(hw, mc_ptr->dmi_addr, i);
  1811. mc_ptr = mc_ptr->next;
  1812. } else {
  1813. E1000_WRITE_REG_ARRAY(hw, RA, i << 1, 0);
  1814. E1000_WRITE_REG_ARRAY(hw, RA, (i << 1) + 1, 0);
  1815. }
  1816. }
  1817. /* clear the old settings from the multicast hash table */
  1818. for (i = 0; i < E1000_NUM_MTA_REGISTERS; i++)
  1819. E1000_WRITE_REG_ARRAY(hw, MTA, i, 0);
  1820. /* load any remaining addresses into the hash table */
  1821. for (; mc_ptr; mc_ptr = mc_ptr->next) {
  1822. hash_value = e1000_hash_mc_addr(hw, mc_ptr->dmi_addr);
  1823. e1000_mta_set(hw, hash_value);
  1824. }
  1825. if (hw->mac_type == e1000_82542_rev2_0)
  1826. e1000_leave_82542_rst(adapter);
  1827. }
  1828. /* Need to wait a few seconds after link up to get diagnostic information from
  1829. * the phy */
  1830. static void
  1831. e1000_update_phy_info(unsigned long data)
  1832. {
  1833. struct e1000_adapter *adapter = (struct e1000_adapter *) data;
  1834. e1000_phy_get_info(&adapter->hw, &adapter->phy_info);
  1835. }
  1836. /**
  1837. * e1000_82547_tx_fifo_stall - Timer Call-back
  1838. * @data: pointer to adapter cast into an unsigned long
  1839. **/
  1840. static void
  1841. e1000_82547_tx_fifo_stall(unsigned long data)
  1842. {
  1843. struct e1000_adapter *adapter = (struct e1000_adapter *) data;
  1844. struct net_device *netdev = adapter->netdev;
  1845. uint32_t tctl;
  1846. if (atomic_read(&adapter->tx_fifo_stall)) {
  1847. if ((E1000_READ_REG(&adapter->hw, TDT) ==
  1848. E1000_READ_REG(&adapter->hw, TDH)) &&
  1849. (E1000_READ_REG(&adapter->hw, TDFT) ==
  1850. E1000_READ_REG(&adapter->hw, TDFH)) &&
  1851. (E1000_READ_REG(&adapter->hw, TDFTS) ==
  1852. E1000_READ_REG(&adapter->hw, TDFHS))) {
  1853. tctl = E1000_READ_REG(&adapter->hw, TCTL);
  1854. E1000_WRITE_REG(&adapter->hw, TCTL,
  1855. tctl & ~E1000_TCTL_EN);
  1856. E1000_WRITE_REG(&adapter->hw, TDFT,
  1857. adapter->tx_head_addr);
  1858. E1000_WRITE_REG(&adapter->hw, TDFH,
  1859. adapter->tx_head_addr);
  1860. E1000_WRITE_REG(&adapter->hw, TDFTS,
  1861. adapter->tx_head_addr);
  1862. E1000_WRITE_REG(&adapter->hw, TDFHS,
  1863. adapter->tx_head_addr);
  1864. E1000_WRITE_REG(&adapter->hw, TCTL, tctl);
  1865. E1000_WRITE_FLUSH(&adapter->hw);
  1866. adapter->tx_fifo_head = 0;
  1867. atomic_set(&adapter->tx_fifo_stall, 0);
  1868. netif_wake_queue(netdev);
  1869. } else {
  1870. mod_timer(&adapter->tx_fifo_stall_timer, jiffies + 1);
  1871. }
  1872. }
  1873. }
  1874. /**
  1875. * e1000_watchdog - Timer Call-back
  1876. * @data: pointer to adapter cast into an unsigned long
  1877. **/
  1878. static void
  1879. e1000_watchdog(unsigned long data)
  1880. {
  1881. struct e1000_adapter *adapter = (struct e1000_adapter *) data;
  1882. /* Do the rest outside of interrupt context */
  1883. schedule_work(&adapter->watchdog_task);
  1884. }
  1885. static void
  1886. e1000_watchdog_task(struct e1000_adapter *adapter)
  1887. {
  1888. struct net_device *netdev = adapter->netdev;
  1889. struct e1000_tx_ring *txdr = adapter->tx_ring;
  1890. uint32_t link;
  1891. e1000_check_for_link(&adapter->hw);
  1892. if (adapter->hw.mac_type == e1000_82573) {
  1893. e1000_enable_tx_pkt_filtering(&adapter->hw);
  1894. if (adapter->mng_vlan_id != adapter->hw.mng_cookie.vlan_id)
  1895. e1000_update_mng_vlan(adapter);
  1896. }
  1897. if ((adapter->hw.media_type == e1000_media_type_internal_serdes) &&
  1898. !(E1000_READ_REG(&adapter->hw, TXCW) & E1000_TXCW_ANE))
  1899. link = !adapter->hw.serdes_link_down;
  1900. else
  1901. link = E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_LU;
  1902. if (link) {
  1903. if (!netif_carrier_ok(netdev)) {
  1904. e1000_get_speed_and_duplex(&adapter->hw,
  1905. &adapter->link_speed,
  1906. &adapter->link_duplex);
  1907. DPRINTK(LINK, INFO, "NIC Link is Up %d Mbps %s\n",
  1908. adapter->link_speed,
  1909. adapter->link_duplex == FULL_DUPLEX ?
  1910. "Full Duplex" : "Half Duplex");
  1911. /* tweak tx_queue_len according to speed/duplex */
  1912. netdev->tx_queue_len = adapter->tx_queue_len;
  1913. adapter->tx_timeout_factor = 1;
  1914. if (adapter->link_duplex == HALF_DUPLEX) {
  1915. switch (adapter->link_speed) {
  1916. case SPEED_10:
  1917. netdev->tx_queue_len = 10;
  1918. adapter->tx_timeout_factor = 8;
  1919. break;
  1920. case SPEED_100:
  1921. netdev->tx_queue_len = 100;
  1922. break;
  1923. }
  1924. }
  1925. netif_carrier_on(netdev);
  1926. netif_wake_queue(netdev);
  1927. mod_timer(&adapter->phy_info_timer, jiffies + 2 * HZ);
  1928. adapter->smartspeed = 0;
  1929. }
  1930. } else {
  1931. if (netif_carrier_ok(netdev)) {
  1932. adapter->link_speed = 0;
  1933. adapter->link_duplex = 0;
  1934. DPRINTK(LINK, INFO, "NIC Link is Down\n");
  1935. netif_carrier_off(netdev);
  1936. netif_stop_queue(netdev);
  1937. mod_timer(&adapter->phy_info_timer, jiffies + 2 * HZ);
  1938. }
  1939. e1000_smartspeed(adapter);
  1940. }
  1941. e1000_update_stats(adapter);
  1942. adapter->hw.tx_packet_delta = adapter->stats.tpt - adapter->tpt_old;
  1943. adapter->tpt_old = adapter->stats.tpt;
  1944. adapter->hw.collision_delta = adapter->stats.colc - adapter->colc_old;
  1945. adapter->colc_old = adapter->stats.colc;
  1946. adapter->gorcl = adapter->stats.gorcl - adapter->gorcl_old;
  1947. adapter->gorcl_old = adapter->stats.gorcl;
  1948. adapter->gotcl = adapter->stats.gotcl - adapter->gotcl_old;
  1949. adapter->gotcl_old = adapter->stats.gotcl;
  1950. e1000_update_adaptive(&adapter->hw);
  1951. if (!netif_carrier_ok(netdev)) {
  1952. if (E1000_DESC_UNUSED(txdr) + 1 < txdr->count) {
  1953. /* We've lost link, so the controller stops DMA,
  1954. * but we've got queued Tx work that's never going
  1955. * to get done, so reset controller to flush Tx.
  1956. * (Do the reset outside of interrupt context). */
  1957. schedule_work(&adapter->tx_timeout_task);
  1958. }
  1959. }
  1960. /* Dynamic mode for Interrupt Throttle Rate (ITR) */
  1961. if (adapter->hw.mac_type >= e1000_82540 && adapter->itr == 1) {
  1962. /* Symmetric Tx/Rx gets a reduced ITR=2000; Total
  1963. * asymmetrical Tx or Rx gets ITR=8000; everyone
  1964. * else is between 2000-8000. */
  1965. uint32_t goc = (adapter->gotcl + adapter->gorcl) / 10000;
  1966. uint32_t dif = (adapter->gotcl > adapter->gorcl ?
  1967. adapter->gotcl - adapter->gorcl :
  1968. adapter->gorcl - adapter->gotcl) / 10000;
  1969. uint32_t itr = goc > 0 ? (dif * 6000 / goc + 2000) : 8000;
  1970. E1000_WRITE_REG(&adapter->hw, ITR, 1000000000 / (itr * 256));
  1971. }
  1972. /* Cause software interrupt to ensure rx ring is cleaned */
  1973. E1000_WRITE_REG(&adapter->hw, ICS, E1000_ICS_RXDMT0);
  1974. /* Force detection of hung controller every watchdog period */
  1975. adapter->detect_tx_hung = TRUE;
  1976. /* With 82571 controllers, LAA may be overwritten due to controller
  1977. * reset from the other port. Set the appropriate LAA in RAR[0] */
  1978. if (adapter->hw.mac_type == e1000_82571 && adapter->hw.laa_is_present)
  1979. e1000_rar_set(&adapter->hw, adapter->hw.mac_addr, 0);
  1980. /* Reset the timer */
  1981. mod_timer(&adapter->watchdog_timer, jiffies + 2 * HZ);
  1982. }
  1983. #define E1000_TX_FLAGS_CSUM 0x00000001
  1984. #define E1000_TX_FLAGS_VLAN 0x00000002
  1985. #define E1000_TX_FLAGS_TSO 0x00000004
  1986. #define E1000_TX_FLAGS_IPV4 0x00000008
  1987. #define E1000_TX_FLAGS_VLAN_MASK 0xffff0000
  1988. #define E1000_TX_FLAGS_VLAN_SHIFT 16
  1989. static inline int
  1990. e1000_tso(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
  1991. struct sk_buff *skb)
  1992. {
  1993. #ifdef NETIF_F_TSO
  1994. struct e1000_context_desc *context_desc;
  1995. struct e1000_buffer *buffer_info;
  1996. unsigned int i;
  1997. uint32_t cmd_length = 0;
  1998. uint16_t ipcse = 0, tucse, mss;
  1999. uint8_t ipcss, ipcso, tucss, tucso, hdr_len;
  2000. int err;
  2001. if (skb_shinfo(skb)->tso_size) {
  2002. if (skb_header_cloned(skb)) {
  2003. err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
  2004. if (err)
  2005. return err;
  2006. }
  2007. hdr_len = ((skb->h.raw - skb->data) + (skb->h.th->doff << 2));
  2008. mss = skb_shinfo(skb)->tso_size;
  2009. if (skb->protocol == ntohs(ETH_P_IP)) {
  2010. skb->nh.iph->tot_len = 0;
  2011. skb->nh.iph->check = 0;
  2012. skb->h.th->check =
  2013. ~csum_tcpudp_magic(skb->nh.iph->saddr,
  2014. skb->nh.iph->daddr,
  2015. 0,
  2016. IPPROTO_TCP,
  2017. 0);
  2018. cmd_length = E1000_TXD_CMD_IP;
  2019. ipcse = skb->h.raw - skb->data - 1;
  2020. #ifdef NETIF_F_TSO_IPV6
  2021. } else if (skb->protocol == ntohs(ETH_P_IPV6)) {
  2022. skb->nh.ipv6h->payload_len = 0;
  2023. skb->h.th->check =
  2024. ~csum_ipv6_magic(&skb->nh.ipv6h->saddr,
  2025. &skb->nh.ipv6h->daddr,
  2026. 0,
  2027. IPPROTO_TCP,
  2028. 0);
  2029. ipcse = 0;
  2030. #endif
  2031. }
  2032. ipcss = skb->nh.raw - skb->data;
  2033. ipcso = (void *)&(skb->nh.iph->check) - (void *)skb->data;
  2034. tucss = skb->h.raw - skb->data;
  2035. tucso = (void *)&(skb->h.th->check) - (void *)skb->data;
  2036. tucse = 0;
  2037. cmd_length |= (E1000_TXD_CMD_DEXT | E1000_TXD_CMD_TSE |
  2038. E1000_TXD_CMD_TCP | (skb->len - (hdr_len)));
  2039. i = tx_ring->next_to_use;
  2040. context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
  2041. buffer_info = &tx_ring->buffer_info[i];
  2042. context_desc->lower_setup.ip_fields.ipcss = ipcss;
  2043. context_desc->lower_setup.ip_fields.ipcso = ipcso;
  2044. context_desc->lower_setup.ip_fields.ipcse = cpu_to_le16(ipcse);
  2045. context_desc->upper_setup.tcp_fields.tucss = tucss;
  2046. context_desc->upper_setup.tcp_fields.tucso = tucso;
  2047. context_desc->upper_setup.tcp_fields.tucse = cpu_to_le16(tucse);
  2048. context_desc->tcp_seg_setup.fields.mss = cpu_to_le16(mss);
  2049. context_desc->tcp_seg_setup.fields.hdr_len = hdr_len;
  2050. context_desc->cmd_and_length = cpu_to_le32(cmd_length);
  2051. buffer_info->time_stamp = jiffies;
  2052. if (++i == tx_ring->count) i = 0;
  2053. tx_ring->next_to_use = i;
  2054. return TRUE;
  2055. }
  2056. #endif
  2057. return FALSE;
  2058. }
  2059. static inline boolean_t
  2060. e1000_tx_csum(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
  2061. struct sk_buff *skb)
  2062. {
  2063. struct e1000_context_desc *context_desc;
  2064. struct e1000_buffer *buffer_info;
  2065. unsigned int i;
  2066. uint8_t css;
  2067. if (likely(skb->ip_summed == CHECKSUM_HW)) {
  2068. css = skb->h.raw - skb->data;
  2069. i = tx_ring->next_to_use;
  2070. buffer_info = &tx_ring->buffer_info[i];
  2071. context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
  2072. context_desc->upper_setup.tcp_fields.tucss = css;
  2073. context_desc->upper_setup.tcp_fields.tucso = css + skb->csum;
  2074. context_desc->upper_setup.tcp_fields.tucse = 0;
  2075. context_desc->tcp_seg_setup.data = 0;
  2076. context_desc->cmd_and_length = cpu_to_le32(E1000_TXD_CMD_DEXT);
  2077. buffer_info->time_stamp = jiffies;
  2078. if (unlikely(++i == tx_ring->count)) i = 0;
  2079. tx_ring->next_to_use = i;
  2080. return TRUE;
  2081. }
  2082. return FALSE;
  2083. }
  2084. #define E1000_MAX_TXD_PWR 12
  2085. #define E1000_MAX_DATA_PER_TXD (1<<E1000_MAX_TXD_PWR)
  2086. static inline int
  2087. e1000_tx_map(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
  2088. struct sk_buff *skb, unsigned int first, unsigned int max_per_txd,
  2089. unsigned int nr_frags, unsigned int mss)
  2090. {
  2091. struct e1000_buffer *buffer_info;
  2092. unsigned int len = skb->len;
  2093. unsigned int offset = 0, size, count = 0, i;
  2094. unsigned int f;
  2095. len -= skb->data_len;
  2096. i = tx_ring->next_to_use;
  2097. while (len) {
  2098. buffer_info = &tx_ring->buffer_info[i];
  2099. size = min(len, max_per_txd);
  2100. #ifdef NETIF_F_TSO
  2101. /* Workaround for Controller erratum --
  2102. * descriptor for non-tso packet in a linear SKB that follows a
  2103. * tso gets written back prematurely before the data is fully
  2104. * DMAd to the controller */
  2105. if (!skb->data_len && tx_ring->last_tx_tso &&
  2106. !skb_shinfo(skb)->tso_size) {
  2107. tx_ring->last_tx_tso = 0;
  2108. size -= 4;
  2109. }
  2110. /* Workaround for premature desc write-backs
  2111. * in TSO mode. Append 4-byte sentinel desc */
  2112. if (unlikely(mss && !nr_frags && size == len && size > 8))
  2113. size -= 4;
  2114. #endif
  2115. /* work-around for errata 10 and it applies
  2116. * to all controllers in PCI-X mode
  2117. * The fix is to make sure that the first descriptor of a
  2118. * packet is smaller than 2048 - 16 - 16 (or 2016) bytes
  2119. */
  2120. if (unlikely((adapter->hw.bus_type == e1000_bus_type_pcix) &&
  2121. (size > 2015) && count == 0))
  2122. size = 2015;
  2123. /* Workaround for potential 82544 hang in PCI-X. Avoid
  2124. * terminating buffers within evenly-aligned dwords. */
  2125. if (unlikely(adapter->pcix_82544 &&
  2126. !((unsigned long)(skb->data + offset + size - 1) & 4) &&
  2127. size > 4))
  2128. size -= 4;
  2129. buffer_info->length = size;
  2130. buffer_info->dma =
  2131. pci_map_single(adapter->pdev,
  2132. skb->data + offset,
  2133. size,
  2134. PCI_DMA_TODEVICE);
  2135. buffer_info->time_stamp = jiffies;
  2136. len -= size;
  2137. offset += size;
  2138. count++;
  2139. if (unlikely(++i == tx_ring->count)) i = 0;
  2140. }
  2141. for (f = 0; f < nr_frags; f++) {
  2142. struct skb_frag_struct *frag;
  2143. frag = &skb_shinfo(skb)->frags[f];
  2144. len = frag->size;
  2145. offset = frag->page_offset;
  2146. while (len) {
  2147. buffer_info = &tx_ring->buffer_info[i];
  2148. size = min(len, max_per_txd);
  2149. #ifdef NETIF_F_TSO
  2150. /* Workaround for premature desc write-backs
  2151. * in TSO mode. Append 4-byte sentinel desc */
  2152. if (unlikely(mss && f == (nr_frags-1) && size == len && size > 8))
  2153. size -= 4;
  2154. #endif
  2155. /* Workaround for potential 82544 hang in PCI-X.
  2156. * Avoid terminating buffers within evenly-aligned
  2157. * dwords. */
  2158. if (unlikely(adapter->pcix_82544 &&
  2159. !((unsigned long)(frag->page+offset+size-1) & 4) &&
  2160. size > 4))
  2161. size -= 4;
  2162. buffer_info->length = size;
  2163. buffer_info->dma =
  2164. pci_map_page(adapter->pdev,
  2165. frag->page,
  2166. offset,
  2167. size,
  2168. PCI_DMA_TODEVICE);
  2169. buffer_info->time_stamp = jiffies;
  2170. len -= size;
  2171. offset += size;
  2172. count++;
  2173. if (unlikely(++i == tx_ring->count)) i = 0;
  2174. }
  2175. }
  2176. i = (i == 0) ? tx_ring->count - 1 : i - 1;
  2177. tx_ring->buffer_info[i].skb = skb;
  2178. tx_ring->buffer_info[first].next_to_watch = i;
  2179. return count;
  2180. }
  2181. static inline void
  2182. e1000_tx_queue(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
  2183. int tx_flags, int count)
  2184. {
  2185. struct e1000_tx_desc *tx_desc = NULL;
  2186. struct e1000_buffer *buffer_info;
  2187. uint32_t txd_upper = 0, txd_lower = E1000_TXD_CMD_IFCS;
  2188. unsigned int i;
  2189. if (likely(tx_flags & E1000_TX_FLAGS_TSO)) {
  2190. txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D |
  2191. E1000_TXD_CMD_TSE;
  2192. txd_upper |= E1000_TXD_POPTS_TXSM << 8;
  2193. if (likely(tx_flags & E1000_TX_FLAGS_IPV4))
  2194. txd_upper |= E1000_TXD_POPTS_IXSM << 8;
  2195. }
  2196. if (likely(tx_flags & E1000_TX_FLAGS_CSUM)) {
  2197. txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D;
  2198. txd_upper |= E1000_TXD_POPTS_TXSM << 8;
  2199. }
  2200. if (unlikely(tx_flags & E1000_TX_FLAGS_VLAN)) {
  2201. txd_lower |= E1000_TXD_CMD_VLE;
  2202. txd_upper |= (tx_flags & E1000_TX_FLAGS_VLAN_MASK);
  2203. }
  2204. i = tx_ring->next_to_use;
  2205. while (count--) {
  2206. buffer_info = &tx_ring->buffer_info[i];
  2207. tx_desc = E1000_TX_DESC(*tx_ring, i);
  2208. tx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
  2209. tx_desc->lower.data =
  2210. cpu_to_le32(txd_lower | buffer_info->length);
  2211. tx_desc->upper.data = cpu_to_le32(txd_upper);
  2212. if (unlikely(++i == tx_ring->count)) i = 0;
  2213. }
  2214. tx_desc->lower.data |= cpu_to_le32(adapter->txd_cmd);
  2215. /* Force memory writes to complete before letting h/w
  2216. * know there are new descriptors to fetch. (Only
  2217. * applicable for weak-ordered memory model archs,
  2218. * such as IA-64). */
  2219. wmb();
  2220. tx_ring->next_to_use = i;
  2221. writel(i, adapter->hw.hw_addr + tx_ring->tdt);
  2222. }
  2223. /**
  2224. * 82547 workaround to avoid controller hang in half-duplex environment.
  2225. * The workaround is to avoid queuing a large packet that would span
  2226. * the internal Tx FIFO ring boundary by notifying the stack to resend
  2227. * the packet at a later time. This gives the Tx FIFO an opportunity to
  2228. * flush all packets. When that occurs, we reset the Tx FIFO pointers
  2229. * to the beginning of the Tx FIFO.
  2230. **/
  2231. #define E1000_FIFO_HDR 0x10
  2232. #define E1000_82547_PAD_LEN 0x3E0
  2233. static inline int
  2234. e1000_82547_fifo_workaround(struct e1000_adapter *adapter, struct sk_buff *skb)
  2235. {
  2236. uint32_t fifo_space = adapter->tx_fifo_size - adapter->tx_fifo_head;
  2237. uint32_t skb_fifo_len = skb->len + E1000_FIFO_HDR;
  2238. E1000_ROUNDUP(skb_fifo_len, E1000_FIFO_HDR);
  2239. if (adapter->link_duplex != HALF_DUPLEX)
  2240. goto no_fifo_stall_required;
  2241. if (atomic_read(&adapter->tx_fifo_stall))
  2242. return 1;
  2243. if (skb_fifo_len >= (E1000_82547_PAD_LEN + fifo_space)) {
  2244. atomic_set(&adapter->tx_fifo_stall, 1);
  2245. return 1;
  2246. }
  2247. no_fifo_stall_required:
  2248. adapter->tx_fifo_head += skb_fifo_len;
  2249. if (adapter->tx_fifo_head >= adapter->tx_fifo_size)
  2250. adapter->tx_fifo_head -= adapter->tx_fifo_size;
  2251. return 0;
  2252. }
  2253. #define MINIMUM_DHCP_PACKET_SIZE 282
  2254. static inline int
  2255. e1000_transfer_dhcp_info(struct e1000_adapter *adapter, struct sk_buff *skb)
  2256. {
  2257. struct e1000_hw *hw = &adapter->hw;
  2258. uint16_t length, offset;
  2259. if (vlan_tx_tag_present(skb)) {
  2260. if (!((vlan_tx_tag_get(skb) == adapter->hw.mng_cookie.vlan_id) &&
  2261. ( adapter->hw.mng_cookie.status &
  2262. E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) )
  2263. return 0;
  2264. }
  2265. if (skb->len > MINIMUM_DHCP_PACKET_SIZE) {
  2266. struct ethhdr *eth = (struct ethhdr *) skb->data;
  2267. if ((htons(ETH_P_IP) == eth->h_proto)) {
  2268. const struct iphdr *ip =
  2269. (struct iphdr *)((uint8_t *)skb->data+14);
  2270. if (IPPROTO_UDP == ip->protocol) {
  2271. struct udphdr *udp =
  2272. (struct udphdr *)((uint8_t *)ip +
  2273. (ip->ihl << 2));
  2274. if (ntohs(udp->dest) == 67) {
  2275. offset = (uint8_t *)udp + 8 - skb->data;
  2276. length = skb->len - offset;
  2277. return e1000_mng_write_dhcp_info(hw,
  2278. (uint8_t *)udp + 8,
  2279. length);
  2280. }
  2281. }
  2282. }
  2283. }
  2284. return 0;
  2285. }
  2286. #define TXD_USE_COUNT(S, X) (((S) >> (X)) + 1 )
  2287. static int
  2288. e1000_xmit_frame(struct sk_buff *skb, struct net_device *netdev)
  2289. {
  2290. struct e1000_adapter *adapter = netdev_priv(netdev);
  2291. struct e1000_tx_ring *tx_ring;
  2292. unsigned int first, max_per_txd = E1000_MAX_DATA_PER_TXD;
  2293. unsigned int max_txd_pwr = E1000_MAX_TXD_PWR;
  2294. unsigned int tx_flags = 0;
  2295. unsigned int len = skb->len;
  2296. unsigned long flags;
  2297. unsigned int nr_frags = 0;
  2298. unsigned int mss = 0;
  2299. int count = 0;
  2300. int tso;
  2301. unsigned int f;
  2302. len -= skb->data_len;
  2303. tx_ring = adapter->tx_ring;
  2304. if (unlikely(skb->len <= 0)) {
  2305. dev_kfree_skb_any(skb);
  2306. return NETDEV_TX_OK;
  2307. }
  2308. #ifdef NETIF_F_TSO
  2309. mss = skb_shinfo(skb)->tso_size;
  2310. /* The controller does a simple calculation to
  2311. * make sure there is enough room in the FIFO before
  2312. * initiating the DMA for each buffer. The calc is:
  2313. * 4 = ceil(buffer len/mss). To make sure we don't
  2314. * overrun the FIFO, adjust the max buffer len if mss
  2315. * drops. */
  2316. if (mss) {
  2317. uint8_t hdr_len;
  2318. max_per_txd = min(mss << 2, max_per_txd);
  2319. max_txd_pwr = fls(max_per_txd) - 1;
  2320. /* TSO Workaround for 82571/2 Controllers -- if skb->data
  2321. * points to just header, pull a few bytes of payload from
  2322. * frags into skb->data */
  2323. hdr_len = ((skb->h.raw - skb->data) + (skb->h.th->doff << 2));
  2324. if (skb->data_len && (hdr_len == (skb->len - skb->data_len)) &&
  2325. (adapter->hw.mac_type == e1000_82571 ||
  2326. adapter->hw.mac_type == e1000_82572)) {
  2327. unsigned int pull_size;
  2328. pull_size = min((unsigned int)4, skb->data_len);
  2329. if (!__pskb_pull_tail(skb, pull_size)) {
  2330. printk(KERN_ERR "__pskb_pull_tail failed.\n");
  2331. dev_kfree_skb_any(skb);
  2332. return -EFAULT;
  2333. }
  2334. len = skb->len - skb->data_len;
  2335. }
  2336. }
  2337. /* reserve a descriptor for the offload context */
  2338. if ((mss) || (skb->ip_summed == CHECKSUM_HW))
  2339. count++;
  2340. count++;
  2341. #else
  2342. if (skb->ip_summed == CHECKSUM_HW)
  2343. count++;
  2344. #endif
  2345. #ifdef NETIF_F_TSO
  2346. /* Controller Erratum workaround */
  2347. if (!skb->data_len && tx_ring->last_tx_tso &&
  2348. !skb_shinfo(skb)->tso_size)
  2349. count++;
  2350. #endif
  2351. count += TXD_USE_COUNT(len, max_txd_pwr);
  2352. if (adapter->pcix_82544)
  2353. count++;
  2354. /* work-around for errata 10 and it applies to all controllers
  2355. * in PCI-X mode, so add one more descriptor to the count
  2356. */
  2357. if (unlikely((adapter->hw.bus_type == e1000_bus_type_pcix) &&
  2358. (len > 2015)))
  2359. count++;
  2360. nr_frags = skb_shinfo(skb)->nr_frags;
  2361. for (f = 0; f < nr_frags; f++)
  2362. count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size,
  2363. max_txd_pwr);
  2364. if (adapter->pcix_82544)
  2365. count += nr_frags;
  2366. if (adapter->hw.tx_pkt_filtering && (adapter->hw.mac_type == e1000_82573) )
  2367. e1000_transfer_dhcp_info(adapter, skb);
  2368. local_irq_save(flags);
  2369. if (!spin_trylock(&tx_ring->tx_lock)) {
  2370. /* Collision - tell upper layer to requeue */
  2371. local_irq_restore(flags);
  2372. return NETDEV_TX_LOCKED;
  2373. }
  2374. /* need: count + 2 desc gap to keep tail from touching
  2375. * head, otherwise try next time */
  2376. if (unlikely(E1000_DESC_UNUSED(tx_ring) < count + 2)) {
  2377. netif_stop_queue(netdev);
  2378. spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
  2379. return NETDEV_TX_BUSY;
  2380. }
  2381. if (unlikely(adapter->hw.mac_type == e1000_82547)) {
  2382. if (unlikely(e1000_82547_fifo_workaround(adapter, skb))) {
  2383. netif_stop_queue(netdev);
  2384. mod_timer(&adapter->tx_fifo_stall_timer, jiffies);
  2385. spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
  2386. return NETDEV_TX_BUSY;
  2387. }
  2388. }
  2389. if (unlikely(adapter->vlgrp && vlan_tx_tag_present(skb))) {
  2390. tx_flags |= E1000_TX_FLAGS_VLAN;
  2391. tx_flags |= (vlan_tx_tag_get(skb) << E1000_TX_FLAGS_VLAN_SHIFT);
  2392. }
  2393. first = tx_ring->next_to_use;
  2394. tso = e1000_tso(adapter, tx_ring, skb);
  2395. if (tso < 0) {
  2396. dev_kfree_skb_any(skb);
  2397. spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
  2398. return NETDEV_TX_OK;
  2399. }
  2400. if (likely(tso)) {
  2401. tx_ring->last_tx_tso = 1;
  2402. tx_flags |= E1000_TX_FLAGS_TSO;
  2403. } else if (likely(e1000_tx_csum(adapter, tx_ring, skb)))
  2404. tx_flags |= E1000_TX_FLAGS_CSUM;
  2405. /* Old method was to assume IPv4 packet by default if TSO was enabled.
  2406. * 82571 hardware supports TSO capabilities for IPv6 as well...
  2407. * no longer assume, we must. */
  2408. if (likely(skb->protocol == ntohs(ETH_P_IP)))
  2409. tx_flags |= E1000_TX_FLAGS_IPV4;
  2410. e1000_tx_queue(adapter, tx_ring, tx_flags,
  2411. e1000_tx_map(adapter, tx_ring, skb, first,
  2412. max_per_txd, nr_frags, mss));
  2413. netdev->trans_start = jiffies;
  2414. /* Make sure there is space in the ring for the next send. */
  2415. if (unlikely(E1000_DESC_UNUSED(tx_ring) < MAX_SKB_FRAGS + 2))
  2416. netif_stop_queue(netdev);
  2417. spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
  2418. return NETDEV_TX_OK;
  2419. }
  2420. /**
  2421. * e1000_tx_timeout - Respond to a Tx Hang
  2422. * @netdev: network interface device structure
  2423. **/
  2424. static void
  2425. e1000_tx_timeout(struct net_device *netdev)
  2426. {
  2427. struct e1000_adapter *adapter = netdev_priv(netdev);
  2428. /* Do the reset outside of interrupt context */
  2429. schedule_work(&adapter->tx_timeout_task);
  2430. }
  2431. static void
  2432. e1000_tx_timeout_task(struct net_device *netdev)
  2433. {
  2434. struct e1000_adapter *adapter = netdev_priv(netdev);
  2435. adapter->tx_timeout_count++;
  2436. e1000_down(adapter);
  2437. e1000_up(adapter);
  2438. }
  2439. /**
  2440. * e1000_get_stats - Get System Network Statistics
  2441. * @netdev: network interface device structure
  2442. *
  2443. * Returns the address of the device statistics structure.
  2444. * The statistics are actually updated from the timer callback.
  2445. **/
  2446. static struct net_device_stats *
  2447. e1000_get_stats(struct net_device *netdev)
  2448. {
  2449. struct e1000_adapter *adapter = netdev_priv(netdev);
  2450. /* only return the current stats */
  2451. return &adapter->net_stats;
  2452. }
  2453. /**
  2454. * e1000_change_mtu - Change the Maximum Transfer Unit
  2455. * @netdev: network interface device structure
  2456. * @new_mtu: new value for maximum frame size
  2457. *
  2458. * Returns 0 on success, negative on failure
  2459. **/
  2460. static int
  2461. e1000_change_mtu(struct net_device *netdev, int new_mtu)
  2462. {
  2463. struct e1000_adapter *adapter = netdev_priv(netdev);
  2464. int max_frame = new_mtu + ENET_HEADER_SIZE + ETHERNET_FCS_SIZE;
  2465. if ((max_frame < MINIMUM_ETHERNET_FRAME_SIZE) ||
  2466. (max_frame > MAX_JUMBO_FRAME_SIZE)) {
  2467. DPRINTK(PROBE, ERR, "Invalid MTU setting\n");
  2468. return -EINVAL;
  2469. }
  2470. /* Adapter-specific max frame size limits. */
  2471. switch (adapter->hw.mac_type) {
  2472. case e1000_82542_rev2_0:
  2473. case e1000_82542_rev2_1:
  2474. case e1000_82573:
  2475. if (max_frame > MAXIMUM_ETHERNET_FRAME_SIZE) {
  2476. DPRINTK(PROBE, ERR, "Jumbo Frames not supported.\n");
  2477. return -EINVAL;
  2478. }
  2479. break;
  2480. case e1000_82571:
  2481. case e1000_82572:
  2482. #define MAX_STD_JUMBO_FRAME_SIZE 9234
  2483. if (max_frame > MAX_STD_JUMBO_FRAME_SIZE) {
  2484. DPRINTK(PROBE, ERR, "MTU > 9216 not supported.\n");
  2485. return -EINVAL;
  2486. }
  2487. break;
  2488. default:
  2489. /* Capable of supporting up to MAX_JUMBO_FRAME_SIZE limit. */
  2490. break;
  2491. }
  2492. if (adapter->hw.mac_type > e1000_82547_rev_2) {
  2493. adapter->rx_buffer_len = max_frame;
  2494. E1000_ROUNDUP(adapter->rx_buffer_len, 1024);
  2495. } else {
  2496. if(unlikely((adapter->hw.mac_type < e1000_82543) &&
  2497. (max_frame > MAXIMUM_ETHERNET_FRAME_SIZE))) {
  2498. DPRINTK(PROBE, ERR, "Jumbo Frames not supported "
  2499. "on 82542\n");
  2500. return -EINVAL;
  2501. } else {
  2502. if(max_frame <= E1000_RXBUFFER_2048)
  2503. adapter->rx_buffer_len = E1000_RXBUFFER_2048;
  2504. else if(max_frame <= E1000_RXBUFFER_4096)
  2505. adapter->rx_buffer_len = E1000_RXBUFFER_4096;
  2506. else if(max_frame <= E1000_RXBUFFER_8192)
  2507. adapter->rx_buffer_len = E1000_RXBUFFER_8192;
  2508. else if(max_frame <= E1000_RXBUFFER_16384)
  2509. adapter->rx_buffer_len = E1000_RXBUFFER_16384;
  2510. }
  2511. }
  2512. netdev->mtu = new_mtu;
  2513. if (netif_running(netdev)) {
  2514. e1000_down(adapter);
  2515. e1000_up(adapter);
  2516. }
  2517. adapter->hw.max_frame_size = max_frame;
  2518. return 0;
  2519. }
  2520. /**
  2521. * e1000_update_stats - Update the board statistics counters
  2522. * @adapter: board private structure
  2523. **/
  2524. void
  2525. e1000_update_stats(struct e1000_adapter *adapter)
  2526. {
  2527. struct e1000_hw *hw = &adapter->hw;
  2528. unsigned long flags;
  2529. uint16_t phy_tmp;
  2530. #define PHY_IDLE_ERROR_COUNT_MASK 0x00FF
  2531. spin_lock_irqsave(&adapter->stats_lock, flags);
  2532. /* these counters are modified from e1000_adjust_tbi_stats,
  2533. * called from the interrupt context, so they must only
  2534. * be written while holding adapter->stats_lock
  2535. */
  2536. adapter->stats.crcerrs += E1000_READ_REG(hw, CRCERRS);
  2537. adapter->stats.gprc += E1000_READ_REG(hw, GPRC);
  2538. adapter->stats.gorcl += E1000_READ_REG(hw, GORCL);
  2539. adapter->stats.gorch += E1000_READ_REG(hw, GORCH);
  2540. adapter->stats.bprc += E1000_READ_REG(hw, BPRC);
  2541. adapter->stats.mprc += E1000_READ_REG(hw, MPRC);
  2542. adapter->stats.roc += E1000_READ_REG(hw, ROC);
  2543. adapter->stats.prc64 += E1000_READ_REG(hw, PRC64);
  2544. adapter->stats.prc127 += E1000_READ_REG(hw, PRC127);
  2545. adapter->stats.prc255 += E1000_READ_REG(hw, PRC255);
  2546. adapter->stats.prc511 += E1000_READ_REG(hw, PRC511);
  2547. adapter->stats.prc1023 += E1000_READ_REG(hw, PRC1023);
  2548. adapter->stats.prc1522 += E1000_READ_REG(hw, PRC1522);
  2549. adapter->stats.symerrs += E1000_READ_REG(hw, SYMERRS);
  2550. adapter->stats.mpc += E1000_READ_REG(hw, MPC);
  2551. adapter->stats.scc += E1000_READ_REG(hw, SCC);
  2552. adapter->stats.ecol += E1000_READ_REG(hw, ECOL);
  2553. adapter->stats.mcc += E1000_READ_REG(hw, MCC);
  2554. adapter->stats.latecol += E1000_READ_REG(hw, LATECOL);
  2555. adapter->stats.dc += E1000_READ_REG(hw, DC);
  2556. adapter->stats.sec += E1000_READ_REG(hw, SEC);
  2557. adapter->stats.rlec += E1000_READ_REG(hw, RLEC);
  2558. adapter->stats.xonrxc += E1000_READ_REG(hw, XONRXC);
  2559. adapter->stats.xontxc += E1000_READ_REG(hw, XONTXC);
  2560. adapter->stats.xoffrxc += E1000_READ_REG(hw, XOFFRXC);
  2561. adapter->stats.xofftxc += E1000_READ_REG(hw, XOFFTXC);
  2562. adapter->stats.fcruc += E1000_READ_REG(hw, FCRUC);
  2563. adapter->stats.gptc += E1000_READ_REG(hw, GPTC);
  2564. adapter->stats.gotcl += E1000_READ_REG(hw, GOTCL);
  2565. adapter->stats.gotch += E1000_READ_REG(hw, GOTCH);
  2566. adapter->stats.rnbc += E1000_READ_REG(hw, RNBC);
  2567. adapter->stats.ruc += E1000_READ_REG(hw, RUC);
  2568. adapter->stats.rfc += E1000_READ_REG(hw, RFC);
  2569. adapter->stats.rjc += E1000_READ_REG(hw, RJC);
  2570. adapter->stats.torl += E1000_READ_REG(hw, TORL);
  2571. adapter->stats.torh += E1000_READ_REG(hw, TORH);
  2572. adapter->stats.totl += E1000_READ_REG(hw, TOTL);
  2573. adapter->stats.toth += E1000_READ_REG(hw, TOTH);
  2574. adapter->stats.tpr += E1000_READ_REG(hw, TPR);
  2575. adapter->stats.ptc64 += E1000_READ_REG(hw, PTC64);
  2576. adapter->stats.ptc127 += E1000_READ_REG(hw, PTC127);
  2577. adapter->stats.ptc255 += E1000_READ_REG(hw, PTC255);
  2578. adapter->stats.ptc511 += E1000_READ_REG(hw, PTC511);
  2579. adapter->stats.ptc1023 += E1000_READ_REG(hw, PTC1023);
  2580. adapter->stats.ptc1522 += E1000_READ_REG(hw, PTC1522);
  2581. adapter->stats.mptc += E1000_READ_REG(hw, MPTC);
  2582. adapter->stats.bptc += E1000_READ_REG(hw, BPTC);
  2583. /* used for adaptive IFS */
  2584. hw->tx_packet_delta = E1000_READ_REG(hw, TPT);
  2585. adapter->stats.tpt += hw->tx_packet_delta;
  2586. hw->collision_delta = E1000_READ_REG(hw, COLC);
  2587. adapter->stats.colc += hw->collision_delta;
  2588. if (hw->mac_type >= e1000_82543) {
  2589. adapter->stats.algnerrc += E1000_READ_REG(hw, ALGNERRC);
  2590. adapter->stats.rxerrc += E1000_READ_REG(hw, RXERRC);
  2591. adapter->stats.tncrs += E1000_READ_REG(hw, TNCRS);
  2592. adapter->stats.cexterr += E1000_READ_REG(hw, CEXTERR);
  2593. adapter->stats.tsctc += E1000_READ_REG(hw, TSCTC);
  2594. adapter->stats.tsctfc += E1000_READ_REG(hw, TSCTFC);
  2595. }
  2596. if (hw->mac_type > e1000_82547_rev_2) {
  2597. adapter->stats.iac += E1000_READ_REG(hw, IAC);
  2598. adapter->stats.icrxoc += E1000_READ_REG(hw, ICRXOC);
  2599. adapter->stats.icrxptc += E1000_READ_REG(hw, ICRXPTC);
  2600. adapter->stats.icrxatc += E1000_READ_REG(hw, ICRXATC);
  2601. adapter->stats.ictxptc += E1000_READ_REG(hw, ICTXPTC);
  2602. adapter->stats.ictxatc += E1000_READ_REG(hw, ICTXATC);
  2603. adapter->stats.ictxqec += E1000_READ_REG(hw, ICTXQEC);
  2604. adapter->stats.ictxqmtc += E1000_READ_REG(hw, ICTXQMTC);
  2605. adapter->stats.icrxdmtc += E1000_READ_REG(hw, ICRXDMTC);
  2606. }
  2607. /* Fill out the OS statistics structure */
  2608. adapter->net_stats.rx_packets = adapter->stats.gprc;
  2609. adapter->net_stats.tx_packets = adapter->stats.gptc;
  2610. adapter->net_stats.rx_bytes = adapter->stats.gorcl;
  2611. adapter->net_stats.tx_bytes = adapter->stats.gotcl;
  2612. adapter->net_stats.multicast = adapter->stats.mprc;
  2613. adapter->net_stats.collisions = adapter->stats.colc;
  2614. /* Rx Errors */
  2615. adapter->net_stats.rx_errors = adapter->stats.rxerrc +
  2616. adapter->stats.crcerrs + adapter->stats.algnerrc +
  2617. adapter->stats.rlec + adapter->stats.cexterr;
  2618. adapter->net_stats.rx_dropped = 0;
  2619. adapter->net_stats.rx_length_errors = adapter->stats.rlec;
  2620. adapter->net_stats.rx_crc_errors = adapter->stats.crcerrs;
  2621. adapter->net_stats.rx_frame_errors = adapter->stats.algnerrc;
  2622. adapter->net_stats.rx_missed_errors = adapter->stats.mpc;
  2623. /* Tx Errors */
  2624. adapter->net_stats.tx_errors = adapter->stats.ecol +
  2625. adapter->stats.latecol;
  2626. adapter->net_stats.tx_aborted_errors = adapter->stats.ecol;
  2627. adapter->net_stats.tx_window_errors = adapter->stats.latecol;
  2628. adapter->net_stats.tx_carrier_errors = adapter->stats.tncrs;
  2629. /* Tx Dropped needs to be maintained elsewhere */
  2630. /* Phy Stats */
  2631. if (hw->media_type == e1000_media_type_copper) {
  2632. if ((adapter->link_speed == SPEED_1000) &&
  2633. (!e1000_read_phy_reg(hw, PHY_1000T_STATUS, &phy_tmp))) {
  2634. phy_tmp &= PHY_IDLE_ERROR_COUNT_MASK;
  2635. adapter->phy_stats.idle_errors += phy_tmp;
  2636. }
  2637. if ((hw->mac_type <= e1000_82546) &&
  2638. (hw->phy_type == e1000_phy_m88) &&
  2639. !e1000_read_phy_reg(hw, M88E1000_RX_ERR_CNTR, &phy_tmp))
  2640. adapter->phy_stats.receive_errors += phy_tmp;
  2641. }
  2642. spin_unlock_irqrestore(&adapter->stats_lock, flags);
  2643. }
  2644. /**
  2645. * e1000_intr - Interrupt Handler
  2646. * @irq: interrupt number
  2647. * @data: pointer to a network interface device structure
  2648. * @pt_regs: CPU registers structure
  2649. **/
  2650. static irqreturn_t
  2651. e1000_intr(int irq, void *data, struct pt_regs *regs)
  2652. {
  2653. struct net_device *netdev = data;
  2654. struct e1000_adapter *adapter = netdev_priv(netdev);
  2655. struct e1000_hw *hw = &adapter->hw;
  2656. uint32_t icr = E1000_READ_REG(hw, ICR);
  2657. #ifndef CONFIG_E1000_NAPI
  2658. int i;
  2659. #else
  2660. /* Interrupt Auto-Mask...upon reading ICR,
  2661. * interrupts are masked. No need for the
  2662. * IMC write, but it does mean we should
  2663. * account for it ASAP. */
  2664. if (likely(hw->mac_type >= e1000_82571))
  2665. atomic_inc(&adapter->irq_sem);
  2666. #endif
  2667. if (unlikely(!icr)) {
  2668. #ifdef CONFIG_E1000_NAPI
  2669. if (hw->mac_type >= e1000_82571)
  2670. e1000_irq_enable(adapter);
  2671. #endif
  2672. return IRQ_NONE; /* Not our interrupt */
  2673. }
  2674. if (unlikely(icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC))) {
  2675. hw->get_link_status = 1;
  2676. mod_timer(&adapter->watchdog_timer, jiffies);
  2677. }
  2678. #ifdef CONFIG_E1000_NAPI
  2679. if (unlikely(hw->mac_type < e1000_82571)) {
  2680. atomic_inc(&adapter->irq_sem);
  2681. E1000_WRITE_REG(hw, IMC, ~0);
  2682. E1000_WRITE_FLUSH(hw);
  2683. }
  2684. if (likely(netif_rx_schedule_prep(&adapter->polling_netdev[0])))
  2685. __netif_rx_schedule(&adapter->polling_netdev[0]);
  2686. else
  2687. e1000_irq_enable(adapter);
  2688. #else
  2689. /* Writing IMC and IMS is needed for 82547.
  2690. * Due to Hub Link bus being occupied, an interrupt
  2691. * de-assertion message is not able to be sent.
  2692. * When an interrupt assertion message is generated later,
  2693. * two messages are re-ordered and sent out.
  2694. * That causes APIC to think 82547 is in de-assertion
  2695. * state, while 82547 is in assertion state, resulting
  2696. * in dead lock. Writing IMC forces 82547 into
  2697. * de-assertion state.
  2698. */
  2699. if (hw->mac_type == e1000_82547 || hw->mac_type == e1000_82547_rev_2) {
  2700. atomic_inc(&adapter->irq_sem);
  2701. E1000_WRITE_REG(hw, IMC, ~0);
  2702. }
  2703. for (i = 0; i < E1000_MAX_INTR; i++)
  2704. if (unlikely(!adapter->clean_rx(adapter, adapter->rx_ring) &
  2705. !e1000_clean_tx_irq(adapter, adapter->tx_ring)))
  2706. break;
  2707. if (hw->mac_type == e1000_82547 || hw->mac_type == e1000_82547_rev_2)
  2708. e1000_irq_enable(adapter);
  2709. #endif
  2710. return IRQ_HANDLED;
  2711. }
  2712. #ifdef CONFIG_E1000_NAPI
  2713. /**
  2714. * e1000_clean - NAPI Rx polling callback
  2715. * @adapter: board private structure
  2716. **/
  2717. static int
  2718. e1000_clean(struct net_device *poll_dev, int *budget)
  2719. {
  2720. struct e1000_adapter *adapter;
  2721. int work_to_do = min(*budget, poll_dev->quota);
  2722. int tx_cleaned = 0, i = 0, work_done = 0;
  2723. /* Must NOT use netdev_priv macro here. */
  2724. adapter = poll_dev->priv;
  2725. /* Keep link state information with original netdev */
  2726. if (!netif_carrier_ok(adapter->netdev))
  2727. goto quit_polling;
  2728. while (poll_dev != &adapter->polling_netdev[i]) {
  2729. i++;
  2730. if (unlikely(i == adapter->num_rx_queues))
  2731. BUG();
  2732. }
  2733. if (likely(adapter->num_tx_queues == 1)) {
  2734. /* e1000_clean is called per-cpu. This lock protects
  2735. * tx_ring[0] from being cleaned by multiple cpus
  2736. * simultaneously. A failure obtaining the lock means
  2737. * tx_ring[0] is currently being cleaned anyway. */
  2738. if (spin_trylock(&adapter->tx_queue_lock)) {
  2739. tx_cleaned = e1000_clean_tx_irq(adapter,
  2740. &adapter->tx_ring[0]);
  2741. spin_unlock(&adapter->tx_queue_lock);
  2742. }
  2743. } else
  2744. tx_cleaned = e1000_clean_tx_irq(adapter, &adapter->tx_ring[i]);
  2745. adapter->clean_rx(adapter, &adapter->rx_ring[i],
  2746. &work_done, work_to_do);
  2747. *budget -= work_done;
  2748. poll_dev->quota -= work_done;
  2749. /* If no Tx and not enough Rx work done, exit the polling mode */
  2750. if ((!tx_cleaned && (work_done == 0)) ||
  2751. !netif_running(adapter->netdev)) {
  2752. quit_polling:
  2753. netif_rx_complete(poll_dev);
  2754. e1000_irq_enable(adapter);
  2755. return 0;
  2756. }
  2757. return 1;
  2758. }
  2759. #endif
  2760. /**
  2761. * e1000_clean_tx_irq - Reclaim resources after transmit completes
  2762. * @adapter: board private structure
  2763. **/
  2764. static boolean_t
  2765. e1000_clean_tx_irq(struct e1000_adapter *adapter,
  2766. struct e1000_tx_ring *tx_ring)
  2767. {
  2768. struct net_device *netdev = adapter->netdev;
  2769. struct e1000_tx_desc *tx_desc, *eop_desc;
  2770. struct e1000_buffer *buffer_info;
  2771. unsigned int i, eop;
  2772. boolean_t cleaned = FALSE;
  2773. i = tx_ring->next_to_clean;
  2774. eop = tx_ring->buffer_info[i].next_to_watch;
  2775. eop_desc = E1000_TX_DESC(*tx_ring, eop);
  2776. while (eop_desc->upper.data & cpu_to_le32(E1000_TXD_STAT_DD)) {
  2777. for (cleaned = FALSE; !cleaned; ) {
  2778. tx_desc = E1000_TX_DESC(*tx_ring, i);
  2779. buffer_info = &tx_ring->buffer_info[i];
  2780. cleaned = (i == eop);
  2781. e1000_unmap_and_free_tx_resource(adapter, buffer_info);
  2782. memset(tx_desc, 0, sizeof(struct e1000_tx_desc));
  2783. if (unlikely(++i == tx_ring->count)) i = 0;
  2784. }
  2785. eop = tx_ring->buffer_info[i].next_to_watch;
  2786. eop_desc = E1000_TX_DESC(*tx_ring, eop);
  2787. }
  2788. tx_ring->next_to_clean = i;
  2789. spin_lock(&tx_ring->tx_lock);
  2790. if (unlikely(cleaned && netif_queue_stopped(netdev) &&
  2791. netif_carrier_ok(netdev)))
  2792. netif_wake_queue(netdev);
  2793. spin_unlock(&tx_ring->tx_lock);
  2794. if (adapter->detect_tx_hung) {
  2795. /* Detect a transmit hang in hardware, this serializes the
  2796. * check with the clearing of time_stamp and movement of i */
  2797. adapter->detect_tx_hung = FALSE;
  2798. if (tx_ring->buffer_info[eop].dma &&
  2799. time_after(jiffies, tx_ring->buffer_info[eop].time_stamp +
  2800. adapter->tx_timeout_factor * HZ)
  2801. && !(E1000_READ_REG(&adapter->hw, STATUS) &
  2802. E1000_STATUS_TXOFF)) {
  2803. /* detected Tx unit hang */
  2804. DPRINTK(DRV, ERR, "Detected Tx Unit Hang\n"
  2805. " Tx Queue <%lu>\n"
  2806. " TDH <%x>\n"
  2807. " TDT <%x>\n"
  2808. " next_to_use <%x>\n"
  2809. " next_to_clean <%x>\n"
  2810. "buffer_info[next_to_clean]\n"
  2811. " time_stamp <%lx>\n"
  2812. " next_to_watch <%x>\n"
  2813. " jiffies <%lx>\n"
  2814. " next_to_watch.status <%x>\n",
  2815. (unsigned long)((tx_ring - adapter->tx_ring) /
  2816. sizeof(struct e1000_tx_ring)),
  2817. readl(adapter->hw.hw_addr + tx_ring->tdh),
  2818. readl(adapter->hw.hw_addr + tx_ring->tdt),
  2819. tx_ring->next_to_use,
  2820. tx_ring->next_to_clean,
  2821. tx_ring->buffer_info[eop].time_stamp,
  2822. eop,
  2823. jiffies,
  2824. eop_desc->upper.fields.status);
  2825. netif_stop_queue(netdev);
  2826. }
  2827. }
  2828. return cleaned;
  2829. }
  2830. /**
  2831. * e1000_rx_checksum - Receive Checksum Offload for 82543
  2832. * @adapter: board private structure
  2833. * @status_err: receive descriptor status and error fields
  2834. * @csum: receive descriptor csum field
  2835. * @sk_buff: socket buffer with received data
  2836. **/
  2837. static inline void
  2838. e1000_rx_checksum(struct e1000_adapter *adapter,
  2839. uint32_t status_err, uint32_t csum,
  2840. struct sk_buff *skb)
  2841. {
  2842. uint16_t status = (uint16_t)status_err;
  2843. uint8_t errors = (uint8_t)(status_err >> 24);
  2844. skb->ip_summed = CHECKSUM_NONE;
  2845. /* 82543 or newer only */
  2846. if (unlikely(adapter->hw.mac_type < e1000_82543)) return;
  2847. /* Ignore Checksum bit is set */
  2848. if (unlikely(status & E1000_RXD_STAT_IXSM)) return;
  2849. /* TCP/UDP checksum error bit is set */
  2850. if (unlikely(errors & E1000_RXD_ERR_TCPE)) {
  2851. /* let the stack verify checksum errors */
  2852. adapter->hw_csum_err++;
  2853. return;
  2854. }
  2855. /* TCP/UDP Checksum has not been calculated */
  2856. if (adapter->hw.mac_type <= e1000_82547_rev_2) {
  2857. if (!(status & E1000_RXD_STAT_TCPCS))
  2858. return;
  2859. } else {
  2860. if (!(status & (E1000_RXD_STAT_TCPCS | E1000_RXD_STAT_UDPCS)))
  2861. return;
  2862. }
  2863. /* It must be a TCP or UDP packet with a valid checksum */
  2864. if (likely(status & E1000_RXD_STAT_TCPCS)) {
  2865. /* TCP checksum is good */
  2866. skb->ip_summed = CHECKSUM_UNNECESSARY;
  2867. } else if (adapter->hw.mac_type > e1000_82547_rev_2) {
  2868. /* IP fragment with UDP payload */
  2869. /* Hardware complements the payload checksum, so we undo it
  2870. * and then put the value in host order for further stack use.
  2871. */
  2872. csum = ntohl(csum ^ 0xFFFF);
  2873. skb->csum = csum;
  2874. skb->ip_summed = CHECKSUM_HW;
  2875. }
  2876. adapter->hw_csum_good++;
  2877. }
  2878. /**
  2879. * e1000_clean_rx_irq - Send received data up the network stack; legacy
  2880. * @adapter: board private structure
  2881. **/
  2882. static boolean_t
  2883. #ifdef CONFIG_E1000_NAPI
  2884. e1000_clean_rx_irq(struct e1000_adapter *adapter,
  2885. struct e1000_rx_ring *rx_ring,
  2886. int *work_done, int work_to_do)
  2887. #else
  2888. e1000_clean_rx_irq(struct e1000_adapter *adapter,
  2889. struct e1000_rx_ring *rx_ring)
  2890. #endif
  2891. {
  2892. struct net_device *netdev = adapter->netdev;
  2893. struct pci_dev *pdev = adapter->pdev;
  2894. struct e1000_rx_desc *rx_desc, *next_rxd;
  2895. struct e1000_buffer *buffer_info, *next_buffer;
  2896. unsigned long flags;
  2897. uint32_t length;
  2898. uint8_t last_byte;
  2899. unsigned int i;
  2900. int cleaned_count = 0;
  2901. boolean_t cleaned = FALSE;
  2902. i = rx_ring->next_to_clean;
  2903. rx_desc = E1000_RX_DESC(*rx_ring, i);
  2904. buffer_info = &rx_ring->buffer_info[i];
  2905. while (rx_desc->status & E1000_RXD_STAT_DD) {
  2906. struct sk_buff *skb, *next_skb;
  2907. u8 status;
  2908. #ifdef CONFIG_E1000_NAPI
  2909. if (*work_done >= work_to_do)
  2910. break;
  2911. (*work_done)++;
  2912. #endif
  2913. status = rx_desc->status;
  2914. skb = buffer_info->skb;
  2915. buffer_info->skb = NULL;
  2916. if (++i == rx_ring->count) i = 0;
  2917. next_rxd = E1000_RX_DESC(*rx_ring, i);
  2918. next_buffer = &rx_ring->buffer_info[i];
  2919. next_skb = next_buffer->skb;
  2920. cleaned = TRUE;
  2921. cleaned_count++;
  2922. pci_unmap_single(pdev,
  2923. buffer_info->dma,
  2924. buffer_info->length,
  2925. PCI_DMA_FROMDEVICE);
  2926. length = le16_to_cpu(rx_desc->length);
  2927. if (unlikely(!(status & E1000_RXD_STAT_EOP))) {
  2928. /* All receives must fit into a single buffer */
  2929. E1000_DBG("%s: Receive packet consumed multiple"
  2930. " buffers\n", netdev->name);
  2931. dev_kfree_skb_irq(skb);
  2932. goto next_desc;
  2933. }
  2934. if (unlikely(rx_desc->errors & E1000_RXD_ERR_FRAME_ERR_MASK)) {
  2935. last_byte = *(skb->data + length - 1);
  2936. if (TBI_ACCEPT(&adapter->hw, status,
  2937. rx_desc->errors, length, last_byte)) {
  2938. spin_lock_irqsave(&adapter->stats_lock, flags);
  2939. e1000_tbi_adjust_stats(&adapter->hw,
  2940. &adapter->stats,
  2941. length, skb->data);
  2942. spin_unlock_irqrestore(&adapter->stats_lock,
  2943. flags);
  2944. length--;
  2945. } else {
  2946. dev_kfree_skb_irq(skb);
  2947. goto next_desc;
  2948. }
  2949. }
  2950. /* code added for copybreak, this should improve
  2951. * performance for small packets with large amounts
  2952. * of reassembly being done in the stack */
  2953. #define E1000_CB_LENGTH 256
  2954. if (length < E1000_CB_LENGTH) {
  2955. struct sk_buff *new_skb =
  2956. dev_alloc_skb(length + NET_IP_ALIGN);
  2957. if (new_skb) {
  2958. skb_reserve(new_skb, NET_IP_ALIGN);
  2959. new_skb->dev = netdev;
  2960. memcpy(new_skb->data - NET_IP_ALIGN,
  2961. skb->data - NET_IP_ALIGN,
  2962. length + NET_IP_ALIGN);
  2963. /* save the skb in buffer_info as good */
  2964. buffer_info->skb = skb;
  2965. skb = new_skb;
  2966. skb_put(skb, length);
  2967. }
  2968. } else
  2969. skb_put(skb, length);
  2970. /* end copybreak code */
  2971. /* Receive Checksum Offload */
  2972. e1000_rx_checksum(adapter,
  2973. (uint32_t)(status) |
  2974. ((uint32_t)(rx_desc->errors) << 24),
  2975. rx_desc->csum, skb);
  2976. skb->protocol = eth_type_trans(skb, netdev);
  2977. #ifdef CONFIG_E1000_NAPI
  2978. if (unlikely(adapter->vlgrp &&
  2979. (status & E1000_RXD_STAT_VP))) {
  2980. vlan_hwaccel_receive_skb(skb, adapter->vlgrp,
  2981. le16_to_cpu(rx_desc->special) &
  2982. E1000_RXD_SPC_VLAN_MASK);
  2983. } else {
  2984. netif_receive_skb(skb);
  2985. }
  2986. #else /* CONFIG_E1000_NAPI */
  2987. if (unlikely(adapter->vlgrp &&
  2988. (status & E1000_RXD_STAT_VP))) {
  2989. vlan_hwaccel_rx(skb, adapter->vlgrp,
  2990. le16_to_cpu(rx_desc->special) &
  2991. E1000_RXD_SPC_VLAN_MASK);
  2992. } else {
  2993. netif_rx(skb);
  2994. }
  2995. #endif /* CONFIG_E1000_NAPI */
  2996. netdev->last_rx = jiffies;
  2997. next_desc:
  2998. rx_desc->status = 0;
  2999. /* return some buffers to hardware, one at a time is too slow */
  3000. if (unlikely(cleaned_count >= E1000_RX_BUFFER_WRITE)) {
  3001. adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
  3002. cleaned_count = 0;
  3003. }
  3004. rx_desc = next_rxd;
  3005. buffer_info = next_buffer;
  3006. }
  3007. rx_ring->next_to_clean = i;
  3008. cleaned_count = E1000_DESC_UNUSED(rx_ring);
  3009. if (cleaned_count)
  3010. adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
  3011. return cleaned;
  3012. }
  3013. /**
  3014. * e1000_clean_rx_irq_ps - Send received data up the network stack; packet split
  3015. * @adapter: board private structure
  3016. **/
  3017. static boolean_t
  3018. #ifdef CONFIG_E1000_NAPI
  3019. e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
  3020. struct e1000_rx_ring *rx_ring,
  3021. int *work_done, int work_to_do)
  3022. #else
  3023. e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
  3024. struct e1000_rx_ring *rx_ring)
  3025. #endif
  3026. {
  3027. union e1000_rx_desc_packet_split *rx_desc, *next_rxd;
  3028. struct net_device *netdev = adapter->netdev;
  3029. struct pci_dev *pdev = adapter->pdev;
  3030. struct e1000_buffer *buffer_info, *next_buffer;
  3031. struct e1000_ps_page *ps_page;
  3032. struct e1000_ps_page_dma *ps_page_dma;
  3033. struct sk_buff *skb, *next_skb;
  3034. unsigned int i, j;
  3035. uint32_t length, staterr;
  3036. int cleaned_count = 0;
  3037. boolean_t cleaned = FALSE;
  3038. i = rx_ring->next_to_clean;
  3039. rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
  3040. staterr = le32_to_cpu(rx_desc->wb.middle.status_error);
  3041. buffer_info = &rx_ring->buffer_info[i];
  3042. while (staterr & E1000_RXD_STAT_DD) {
  3043. ps_page = &rx_ring->ps_page[i];
  3044. ps_page_dma = &rx_ring->ps_page_dma[i];
  3045. #ifdef CONFIG_E1000_NAPI
  3046. if (unlikely(*work_done >= work_to_do))
  3047. break;
  3048. (*work_done)++;
  3049. #endif
  3050. skb = buffer_info->skb;
  3051. if (++i == rx_ring->count) i = 0;
  3052. next_rxd = E1000_RX_DESC_PS(*rx_ring, i);
  3053. next_buffer = &rx_ring->buffer_info[i];
  3054. next_skb = next_buffer->skb;
  3055. cleaned = TRUE;
  3056. cleaned_count++;
  3057. pci_unmap_single(pdev, buffer_info->dma,
  3058. buffer_info->length,
  3059. PCI_DMA_FROMDEVICE);
  3060. if (unlikely(!(staterr & E1000_RXD_STAT_EOP))) {
  3061. E1000_DBG("%s: Packet Split buffers didn't pick up"
  3062. " the full packet\n", netdev->name);
  3063. dev_kfree_skb_irq(skb);
  3064. goto next_desc;
  3065. }
  3066. if (unlikely(staterr & E1000_RXDEXT_ERR_FRAME_ERR_MASK)) {
  3067. dev_kfree_skb_irq(skb);
  3068. goto next_desc;
  3069. }
  3070. length = le16_to_cpu(rx_desc->wb.middle.length0);
  3071. if (unlikely(!length)) {
  3072. E1000_DBG("%s: Last part of the packet spanning"
  3073. " multiple descriptors\n", netdev->name);
  3074. dev_kfree_skb_irq(skb);
  3075. goto next_desc;
  3076. }
  3077. /* Good Receive */
  3078. skb_put(skb, length);
  3079. for (j = 0; j < adapter->rx_ps_pages; j++) {
  3080. if (!(length = le16_to_cpu(rx_desc->wb.upper.length[j])))
  3081. break;
  3082. pci_unmap_page(pdev, ps_page_dma->ps_page_dma[j],
  3083. PAGE_SIZE, PCI_DMA_FROMDEVICE);
  3084. ps_page_dma->ps_page_dma[j] = 0;
  3085. skb_shinfo(skb)->frags[j].page =
  3086. ps_page->ps_page[j];
  3087. ps_page->ps_page[j] = NULL;
  3088. skb_shinfo(skb)->frags[j].page_offset = 0;
  3089. skb_shinfo(skb)->frags[j].size = length;
  3090. skb_shinfo(skb)->nr_frags++;
  3091. skb->len += length;
  3092. skb->data_len += length;
  3093. }
  3094. e1000_rx_checksum(adapter, staterr,
  3095. rx_desc->wb.lower.hi_dword.csum_ip.csum, skb);
  3096. skb->protocol = eth_type_trans(skb, netdev);
  3097. if (likely(rx_desc->wb.upper.header_status &
  3098. E1000_RXDPS_HDRSTAT_HDRSP))
  3099. adapter->rx_hdr_split++;
  3100. #ifdef CONFIG_E1000_NAPI
  3101. if (unlikely(adapter->vlgrp && (staterr & E1000_RXD_STAT_VP))) {
  3102. vlan_hwaccel_receive_skb(skb, adapter->vlgrp,
  3103. le16_to_cpu(rx_desc->wb.middle.vlan) &
  3104. E1000_RXD_SPC_VLAN_MASK);
  3105. } else {
  3106. netif_receive_skb(skb);
  3107. }
  3108. #else /* CONFIG_E1000_NAPI */
  3109. if (unlikely(adapter->vlgrp && (staterr & E1000_RXD_STAT_VP))) {
  3110. vlan_hwaccel_rx(skb, adapter->vlgrp,
  3111. le16_to_cpu(rx_desc->wb.middle.vlan) &
  3112. E1000_RXD_SPC_VLAN_MASK);
  3113. } else {
  3114. netif_rx(skb);
  3115. }
  3116. #endif /* CONFIG_E1000_NAPI */
  3117. netdev->last_rx = jiffies;
  3118. next_desc:
  3119. rx_desc->wb.middle.status_error &= ~0xFF;
  3120. buffer_info->skb = NULL;
  3121. /* return some buffers to hardware, one at a time is too slow */
  3122. if (unlikely(cleaned_count >= E1000_RX_BUFFER_WRITE)) {
  3123. adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
  3124. cleaned_count = 0;
  3125. }
  3126. rx_desc = next_rxd;
  3127. buffer_info = next_buffer;
  3128. staterr = le32_to_cpu(rx_desc->wb.middle.status_error);
  3129. }
  3130. rx_ring->next_to_clean = i;
  3131. cleaned_count = E1000_DESC_UNUSED(rx_ring);
  3132. if (cleaned_count)
  3133. adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
  3134. return cleaned;
  3135. }
  3136. /**
  3137. * e1000_alloc_rx_buffers - Replace used receive buffers; legacy & extended
  3138. * @adapter: address of board private structure
  3139. **/
  3140. static void
  3141. e1000_alloc_rx_buffers(struct e1000_adapter *adapter,
  3142. struct e1000_rx_ring *rx_ring,
  3143. int cleaned_count)
  3144. {
  3145. struct net_device *netdev = adapter->netdev;
  3146. struct pci_dev *pdev = adapter->pdev;
  3147. struct e1000_rx_desc *rx_desc;
  3148. struct e1000_buffer *buffer_info;
  3149. struct sk_buff *skb;
  3150. unsigned int i;
  3151. unsigned int bufsz = adapter->rx_buffer_len + NET_IP_ALIGN;
  3152. i = rx_ring->next_to_use;
  3153. buffer_info = &rx_ring->buffer_info[i];
  3154. while (cleaned_count--) {
  3155. if (!(skb = buffer_info->skb))
  3156. skb = dev_alloc_skb(bufsz);
  3157. else {
  3158. skb_trim(skb, 0);
  3159. goto map_skb;
  3160. }
  3161. if (unlikely(!skb)) {
  3162. /* Better luck next round */
  3163. adapter->alloc_rx_buff_failed++;
  3164. break;
  3165. }
  3166. /* Fix for errata 23, can't cross 64kB boundary */
  3167. if (!e1000_check_64k_bound(adapter, skb->data, bufsz)) {
  3168. struct sk_buff *oldskb = skb;
  3169. DPRINTK(RX_ERR, ERR, "skb align check failed: %u bytes "
  3170. "at %p\n", bufsz, skb->data);
  3171. /* Try again, without freeing the previous */
  3172. skb = dev_alloc_skb(bufsz);
  3173. /* Failed allocation, critical failure */
  3174. if (!skb) {
  3175. dev_kfree_skb(oldskb);
  3176. break;
  3177. }
  3178. if (!e1000_check_64k_bound(adapter, skb->data, bufsz)) {
  3179. /* give up */
  3180. dev_kfree_skb(skb);
  3181. dev_kfree_skb(oldskb);
  3182. break; /* while !buffer_info->skb */
  3183. } else {
  3184. /* Use new allocation */
  3185. dev_kfree_skb(oldskb);
  3186. }
  3187. }
  3188. /* Make buffer alignment 2 beyond a 16 byte boundary
  3189. * this will result in a 16 byte aligned IP header after
  3190. * the 14 byte MAC header is removed
  3191. */
  3192. skb_reserve(skb, NET_IP_ALIGN);
  3193. skb->dev = netdev;
  3194. buffer_info->skb = skb;
  3195. buffer_info->length = adapter->rx_buffer_len;
  3196. map_skb:
  3197. buffer_info->dma = pci_map_single(pdev,
  3198. skb->data,
  3199. adapter->rx_buffer_len,
  3200. PCI_DMA_FROMDEVICE);
  3201. /* Fix for errata 23, can't cross 64kB boundary */
  3202. if (!e1000_check_64k_bound(adapter,
  3203. (void *)(unsigned long)buffer_info->dma,
  3204. adapter->rx_buffer_len)) {
  3205. DPRINTK(RX_ERR, ERR,
  3206. "dma align check failed: %u bytes at %p\n",
  3207. adapter->rx_buffer_len,
  3208. (void *)(unsigned long)buffer_info->dma);
  3209. dev_kfree_skb(skb);
  3210. buffer_info->skb = NULL;
  3211. pci_unmap_single(pdev, buffer_info->dma,
  3212. adapter->rx_buffer_len,
  3213. PCI_DMA_FROMDEVICE);
  3214. break; /* while !buffer_info->skb */
  3215. }
  3216. rx_desc = E1000_RX_DESC(*rx_ring, i);
  3217. rx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
  3218. if (unlikely(++i == rx_ring->count))
  3219. i = 0;
  3220. buffer_info = &rx_ring->buffer_info[i];
  3221. }
  3222. if (likely(rx_ring->next_to_use != i)) {
  3223. rx_ring->next_to_use = i;
  3224. if (unlikely(i-- == 0))
  3225. i = (rx_ring->count - 1);
  3226. /* Force memory writes to complete before letting h/w
  3227. * know there are new descriptors to fetch. (Only
  3228. * applicable for weak-ordered memory model archs,
  3229. * such as IA-64). */
  3230. wmb();
  3231. writel(i, adapter->hw.hw_addr + rx_ring->rdt);
  3232. }
  3233. }
  3234. /**
  3235. * e1000_alloc_rx_buffers_ps - Replace used receive buffers; packet split
  3236. * @adapter: address of board private structure
  3237. **/
  3238. static void
  3239. e1000_alloc_rx_buffers_ps(struct e1000_adapter *adapter,
  3240. struct e1000_rx_ring *rx_ring,
  3241. int cleaned_count)
  3242. {
  3243. struct net_device *netdev = adapter->netdev;
  3244. struct pci_dev *pdev = adapter->pdev;
  3245. union e1000_rx_desc_packet_split *rx_desc;
  3246. struct e1000_buffer *buffer_info;
  3247. struct e1000_ps_page *ps_page;
  3248. struct e1000_ps_page_dma *ps_page_dma;
  3249. struct sk_buff *skb;
  3250. unsigned int i, j;
  3251. i = rx_ring->next_to_use;
  3252. buffer_info = &rx_ring->buffer_info[i];
  3253. ps_page = &rx_ring->ps_page[i];
  3254. ps_page_dma = &rx_ring->ps_page_dma[i];
  3255. while (cleaned_count--) {
  3256. rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
  3257. for (j = 0; j < PS_PAGE_BUFFERS; j++) {
  3258. if (j < adapter->rx_ps_pages) {
  3259. if (likely(!ps_page->ps_page[j])) {
  3260. ps_page->ps_page[j] =
  3261. alloc_page(GFP_ATOMIC);
  3262. if (unlikely(!ps_page->ps_page[j])) {
  3263. adapter->alloc_rx_buff_failed++;
  3264. goto no_buffers;
  3265. }
  3266. ps_page_dma->ps_page_dma[j] =
  3267. pci_map_page(pdev,
  3268. ps_page->ps_page[j],
  3269. 0, PAGE_SIZE,
  3270. PCI_DMA_FROMDEVICE);
  3271. }
  3272. /* Refresh the desc even if buffer_addrs didn't
  3273. * change because each write-back erases
  3274. * this info.
  3275. */
  3276. rx_desc->read.buffer_addr[j+1] =
  3277. cpu_to_le64(ps_page_dma->ps_page_dma[j]);
  3278. } else
  3279. rx_desc->read.buffer_addr[j+1] = ~0;
  3280. }
  3281. skb = dev_alloc_skb(adapter->rx_ps_bsize0 + NET_IP_ALIGN);
  3282. if (unlikely(!skb)) {
  3283. adapter->alloc_rx_buff_failed++;
  3284. break;
  3285. }
  3286. /* Make buffer alignment 2 beyond a 16 byte boundary
  3287. * this will result in a 16 byte aligned IP header after
  3288. * the 14 byte MAC header is removed
  3289. */
  3290. skb_reserve(skb, NET_IP_ALIGN);
  3291. skb->dev = netdev;
  3292. buffer_info->skb = skb;
  3293. buffer_info->length = adapter->rx_ps_bsize0;
  3294. buffer_info->dma = pci_map_single(pdev, skb->data,
  3295. adapter->rx_ps_bsize0,
  3296. PCI_DMA_FROMDEVICE);
  3297. rx_desc->read.buffer_addr[0] = cpu_to_le64(buffer_info->dma);
  3298. if (unlikely(++i == rx_ring->count)) i = 0;
  3299. buffer_info = &rx_ring->buffer_info[i];
  3300. ps_page = &rx_ring->ps_page[i];
  3301. ps_page_dma = &rx_ring->ps_page_dma[i];
  3302. }
  3303. no_buffers:
  3304. if (likely(rx_ring->next_to_use != i)) {
  3305. rx_ring->next_to_use = i;
  3306. if (unlikely(i-- == 0)) i = (rx_ring->count - 1);
  3307. /* Force memory writes to complete before letting h/w
  3308. * know there are new descriptors to fetch. (Only
  3309. * applicable for weak-ordered memory model archs,
  3310. * such as IA-64). */
  3311. wmb();
  3312. /* Hardware increments by 16 bytes, but packet split
  3313. * descriptors are 32 bytes...so we increment tail
  3314. * twice as much.
  3315. */
  3316. writel(i<<1, adapter->hw.hw_addr + rx_ring->rdt);
  3317. }
  3318. }
  3319. /**
  3320. * e1000_smartspeed - Workaround for SmartSpeed on 82541 and 82547 controllers.
  3321. * @adapter:
  3322. **/
  3323. static void
  3324. e1000_smartspeed(struct e1000_adapter *adapter)
  3325. {
  3326. uint16_t phy_status;
  3327. uint16_t phy_ctrl;
  3328. if ((adapter->hw.phy_type != e1000_phy_igp) || !adapter->hw.autoneg ||
  3329. !(adapter->hw.autoneg_advertised & ADVERTISE_1000_FULL))
  3330. return;
  3331. if (adapter->smartspeed == 0) {
  3332. /* If Master/Slave config fault is asserted twice,
  3333. * we assume back-to-back */
  3334. e1000_read_phy_reg(&adapter->hw, PHY_1000T_STATUS, &phy_status);
  3335. if (!(phy_status & SR_1000T_MS_CONFIG_FAULT)) return;
  3336. e1000_read_phy_reg(&adapter->hw, PHY_1000T_STATUS, &phy_status);
  3337. if (!(phy_status & SR_1000T_MS_CONFIG_FAULT)) return;
  3338. e1000_read_phy_reg(&adapter->hw, PHY_1000T_CTRL, &phy_ctrl);
  3339. if (phy_ctrl & CR_1000T_MS_ENABLE) {
  3340. phy_ctrl &= ~CR_1000T_MS_ENABLE;
  3341. e1000_write_phy_reg(&adapter->hw, PHY_1000T_CTRL,
  3342. phy_ctrl);
  3343. adapter->smartspeed++;
  3344. if (!e1000_phy_setup_autoneg(&adapter->hw) &&
  3345. !e1000_read_phy_reg(&adapter->hw, PHY_CTRL,
  3346. &phy_ctrl)) {
  3347. phy_ctrl |= (MII_CR_AUTO_NEG_EN |
  3348. MII_CR_RESTART_AUTO_NEG);
  3349. e1000_write_phy_reg(&adapter->hw, PHY_CTRL,
  3350. phy_ctrl);
  3351. }
  3352. }
  3353. return;
  3354. } else if (adapter->smartspeed == E1000_SMARTSPEED_DOWNSHIFT) {
  3355. /* If still no link, perhaps using 2/3 pair cable */
  3356. e1000_read_phy_reg(&adapter->hw, PHY_1000T_CTRL, &phy_ctrl);
  3357. phy_ctrl |= CR_1000T_MS_ENABLE;
  3358. e1000_write_phy_reg(&adapter->hw, PHY_1000T_CTRL, phy_ctrl);
  3359. if (!e1000_phy_setup_autoneg(&adapter->hw) &&
  3360. !e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &phy_ctrl)) {
  3361. phy_ctrl |= (MII_CR_AUTO_NEG_EN |
  3362. MII_CR_RESTART_AUTO_NEG);
  3363. e1000_write_phy_reg(&adapter->hw, PHY_CTRL, phy_ctrl);
  3364. }
  3365. }
  3366. /* Restart process after E1000_SMARTSPEED_MAX iterations */
  3367. if (adapter->smartspeed++ == E1000_SMARTSPEED_MAX)
  3368. adapter->smartspeed = 0;
  3369. }
  3370. /**
  3371. * e1000_ioctl -
  3372. * @netdev:
  3373. * @ifreq:
  3374. * @cmd:
  3375. **/
  3376. static int
  3377. e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
  3378. {
  3379. switch (cmd) {
  3380. case SIOCGMIIPHY:
  3381. case SIOCGMIIREG:
  3382. case SIOCSMIIREG:
  3383. return e1000_mii_ioctl(netdev, ifr, cmd);
  3384. default:
  3385. return -EOPNOTSUPP;
  3386. }
  3387. }
  3388. /**
  3389. * e1000_mii_ioctl -
  3390. * @netdev:
  3391. * @ifreq:
  3392. * @cmd:
  3393. **/
  3394. static int
  3395. e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
  3396. {
  3397. struct e1000_adapter *adapter = netdev_priv(netdev);
  3398. struct mii_ioctl_data *data = if_mii(ifr);
  3399. int retval;
  3400. uint16_t mii_reg;
  3401. uint16_t spddplx;
  3402. unsigned long flags;
  3403. if (adapter->hw.media_type != e1000_media_type_copper)
  3404. return -EOPNOTSUPP;
  3405. switch (cmd) {
  3406. case SIOCGMIIPHY:
  3407. data->phy_id = adapter->hw.phy_addr;
  3408. break;
  3409. case SIOCGMIIREG:
  3410. if (!capable(CAP_NET_ADMIN))
  3411. return -EPERM;
  3412. spin_lock_irqsave(&adapter->stats_lock, flags);
  3413. if (e1000_read_phy_reg(&adapter->hw, data->reg_num & 0x1F,
  3414. &data->val_out)) {
  3415. spin_unlock_irqrestore(&adapter->stats_lock, flags);
  3416. return -EIO;
  3417. }
  3418. spin_unlock_irqrestore(&adapter->stats_lock, flags);
  3419. break;
  3420. case SIOCSMIIREG:
  3421. if (!capable(CAP_NET_ADMIN))
  3422. return -EPERM;
  3423. if (data->reg_num & ~(0x1F))
  3424. return -EFAULT;
  3425. mii_reg = data->val_in;
  3426. spin_lock_irqsave(&adapter->stats_lock, flags);
  3427. if (e1000_write_phy_reg(&adapter->hw, data->reg_num,
  3428. mii_reg)) {
  3429. spin_unlock_irqrestore(&adapter->stats_lock, flags);
  3430. return -EIO;
  3431. }
  3432. if (adapter->hw.phy_type == e1000_phy_m88) {
  3433. switch (data->reg_num) {
  3434. case PHY_CTRL:
  3435. if (mii_reg & MII_CR_POWER_DOWN)
  3436. break;
  3437. if (mii_reg & MII_CR_AUTO_NEG_EN) {
  3438. adapter->hw.autoneg = 1;
  3439. adapter->hw.autoneg_advertised = 0x2F;
  3440. } else {
  3441. if (mii_reg & 0x40)
  3442. spddplx = SPEED_1000;
  3443. else if (mii_reg & 0x2000)
  3444. spddplx = SPEED_100;
  3445. else
  3446. spddplx = SPEED_10;
  3447. spddplx += (mii_reg & 0x100)
  3448. ? FULL_DUPLEX :
  3449. HALF_DUPLEX;
  3450. retval = e1000_set_spd_dplx(adapter,
  3451. spddplx);
  3452. if (retval) {
  3453. spin_unlock_irqrestore(
  3454. &adapter->stats_lock,
  3455. flags);
  3456. return retval;
  3457. }
  3458. }
  3459. if (netif_running(adapter->netdev)) {
  3460. e1000_down(adapter);
  3461. e1000_up(adapter);
  3462. } else
  3463. e1000_reset(adapter);
  3464. break;
  3465. case M88E1000_PHY_SPEC_CTRL:
  3466. case M88E1000_EXT_PHY_SPEC_CTRL:
  3467. if (e1000_phy_reset(&adapter->hw)) {
  3468. spin_unlock_irqrestore(
  3469. &adapter->stats_lock, flags);
  3470. return -EIO;
  3471. }
  3472. break;
  3473. }
  3474. } else {
  3475. switch (data->reg_num) {
  3476. case PHY_CTRL:
  3477. if (mii_reg & MII_CR_POWER_DOWN)
  3478. break;
  3479. if (netif_running(adapter->netdev)) {
  3480. e1000_down(adapter);
  3481. e1000_up(adapter);
  3482. } else
  3483. e1000_reset(adapter);
  3484. break;
  3485. }
  3486. }
  3487. spin_unlock_irqrestore(&adapter->stats_lock, flags);
  3488. break;
  3489. default:
  3490. return -EOPNOTSUPP;
  3491. }
  3492. return E1000_SUCCESS;
  3493. }
  3494. void
  3495. e1000_pci_set_mwi(struct e1000_hw *hw)
  3496. {
  3497. struct e1000_adapter *adapter = hw->back;
  3498. int ret_val = pci_set_mwi(adapter->pdev);
  3499. if (ret_val)
  3500. DPRINTK(PROBE, ERR, "Error in setting MWI\n");
  3501. }
  3502. void
  3503. e1000_pci_clear_mwi(struct e1000_hw *hw)
  3504. {
  3505. struct e1000_adapter *adapter = hw->back;
  3506. pci_clear_mwi(adapter->pdev);
  3507. }
  3508. void
  3509. e1000_read_pci_cfg(struct e1000_hw *hw, uint32_t reg, uint16_t *value)
  3510. {
  3511. struct e1000_adapter *adapter = hw->back;
  3512. pci_read_config_word(adapter->pdev, reg, value);
  3513. }
  3514. void
  3515. e1000_write_pci_cfg(struct e1000_hw *hw, uint32_t reg, uint16_t *value)
  3516. {
  3517. struct e1000_adapter *adapter = hw->back;
  3518. pci_write_config_word(adapter->pdev, reg, *value);
  3519. }
  3520. uint32_t
  3521. e1000_io_read(struct e1000_hw *hw, unsigned long port)
  3522. {
  3523. return inl(port);
  3524. }
  3525. void
  3526. e1000_io_write(struct e1000_hw *hw, unsigned long port, uint32_t value)
  3527. {
  3528. outl(value, port);
  3529. }
  3530. static void
  3531. e1000_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp)
  3532. {
  3533. struct e1000_adapter *adapter = netdev_priv(netdev);
  3534. uint32_t ctrl, rctl;
  3535. e1000_irq_disable(adapter);
  3536. adapter->vlgrp = grp;
  3537. if (grp) {
  3538. /* enable VLAN tag insert/strip */
  3539. ctrl = E1000_READ_REG(&adapter->hw, CTRL);
  3540. ctrl |= E1000_CTRL_VME;
  3541. E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
  3542. /* enable VLAN receive filtering */
  3543. rctl = E1000_READ_REG(&adapter->hw, RCTL);
  3544. rctl |= E1000_RCTL_VFE;
  3545. rctl &= ~E1000_RCTL_CFIEN;
  3546. E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
  3547. e1000_update_mng_vlan(adapter);
  3548. } else {
  3549. /* disable VLAN tag insert/strip */
  3550. ctrl = E1000_READ_REG(&adapter->hw, CTRL);
  3551. ctrl &= ~E1000_CTRL_VME;
  3552. E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
  3553. /* disable VLAN filtering */
  3554. rctl = E1000_READ_REG(&adapter->hw, RCTL);
  3555. rctl &= ~E1000_RCTL_VFE;
  3556. E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
  3557. if (adapter->mng_vlan_id != (uint16_t)E1000_MNG_VLAN_NONE) {
  3558. e1000_vlan_rx_kill_vid(netdev, adapter->mng_vlan_id);
  3559. adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
  3560. }
  3561. }
  3562. e1000_irq_enable(adapter);
  3563. }
  3564. static void
  3565. e1000_vlan_rx_add_vid(struct net_device *netdev, uint16_t vid)
  3566. {
  3567. struct e1000_adapter *adapter = netdev_priv(netdev);
  3568. uint32_t vfta, index;
  3569. if ((adapter->hw.mng_cookie.status &
  3570. E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) &&
  3571. (vid == adapter->mng_vlan_id))
  3572. return;
  3573. /* add VID to filter table */
  3574. index = (vid >> 5) & 0x7F;
  3575. vfta = E1000_READ_REG_ARRAY(&adapter->hw, VFTA, index);
  3576. vfta |= (1 << (vid & 0x1F));
  3577. e1000_write_vfta(&adapter->hw, index, vfta);
  3578. }
  3579. static void
  3580. e1000_vlan_rx_kill_vid(struct net_device *netdev, uint16_t vid)
  3581. {
  3582. struct e1000_adapter *adapter = netdev_priv(netdev);
  3583. uint32_t vfta, index;
  3584. e1000_irq_disable(adapter);
  3585. if (adapter->vlgrp)
  3586. adapter->vlgrp->vlan_devices[vid] = NULL;
  3587. e1000_irq_enable(adapter);
  3588. if ((adapter->hw.mng_cookie.status &
  3589. E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) &&
  3590. (vid == adapter->mng_vlan_id)) {
  3591. /* release control to f/w */
  3592. e1000_release_hw_control(adapter);
  3593. return;
  3594. }
  3595. /* remove VID from filter table */
  3596. index = (vid >> 5) & 0x7F;
  3597. vfta = E1000_READ_REG_ARRAY(&adapter->hw, VFTA, index);
  3598. vfta &= ~(1 << (vid & 0x1F));
  3599. e1000_write_vfta(&adapter->hw, index, vfta);
  3600. }
  3601. static void
  3602. e1000_restore_vlan(struct e1000_adapter *adapter)
  3603. {
  3604. e1000_vlan_rx_register(adapter->netdev, adapter->vlgrp);
  3605. if (adapter->vlgrp) {
  3606. uint16_t vid;
  3607. for (vid = 0; vid < VLAN_GROUP_ARRAY_LEN; vid++) {
  3608. if (!adapter->vlgrp->vlan_devices[vid])
  3609. continue;
  3610. e1000_vlan_rx_add_vid(adapter->netdev, vid);
  3611. }
  3612. }
  3613. }
  3614. int
  3615. e1000_set_spd_dplx(struct e1000_adapter *adapter, uint16_t spddplx)
  3616. {
  3617. adapter->hw.autoneg = 0;
  3618. /* Fiber NICs only allow 1000 gbps Full duplex */
  3619. if ((adapter->hw.media_type == e1000_media_type_fiber) &&
  3620. spddplx != (SPEED_1000 + DUPLEX_FULL)) {
  3621. DPRINTK(PROBE, ERR, "Unsupported Speed/Duplex configuration\n");
  3622. return -EINVAL;
  3623. }
  3624. switch (spddplx) {
  3625. case SPEED_10 + DUPLEX_HALF:
  3626. adapter->hw.forced_speed_duplex = e1000_10_half;
  3627. break;
  3628. case SPEED_10 + DUPLEX_FULL:
  3629. adapter->hw.forced_speed_duplex = e1000_10_full;
  3630. break;
  3631. case SPEED_100 + DUPLEX_HALF:
  3632. adapter->hw.forced_speed_duplex = e1000_100_half;
  3633. break;
  3634. case SPEED_100 + DUPLEX_FULL:
  3635. adapter->hw.forced_speed_duplex = e1000_100_full;
  3636. break;
  3637. case SPEED_1000 + DUPLEX_FULL:
  3638. adapter->hw.autoneg = 1;
  3639. adapter->hw.autoneg_advertised = ADVERTISE_1000_FULL;
  3640. break;
  3641. case SPEED_1000 + DUPLEX_HALF: /* not supported */
  3642. default:
  3643. DPRINTK(PROBE, ERR, "Unsupported Speed/Duplex configuration\n");
  3644. return -EINVAL;
  3645. }
  3646. return 0;
  3647. }
  3648. #ifdef CONFIG_PM
  3649. /* these functions save and restore 16 or 64 dwords (64-256 bytes) of config
  3650. * space versus the 64 bytes that pci_[save|restore]_state handle
  3651. */
  3652. #define PCIE_CONFIG_SPACE_LEN 256
  3653. #define PCI_CONFIG_SPACE_LEN 64
  3654. static int
  3655. e1000_pci_save_state(struct e1000_adapter *adapter)
  3656. {
  3657. struct pci_dev *dev = adapter->pdev;
  3658. int size;
  3659. int i;
  3660. if (adapter->hw.mac_type >= e1000_82571)
  3661. size = PCIE_CONFIG_SPACE_LEN;
  3662. else
  3663. size = PCI_CONFIG_SPACE_LEN;
  3664. WARN_ON(adapter->config_space != NULL);
  3665. adapter->config_space = kmalloc(size, GFP_KERNEL);
  3666. if (!adapter->config_space) {
  3667. DPRINTK(PROBE, ERR, "unable to allocate %d bytes\n", size);
  3668. return -ENOMEM;
  3669. }
  3670. for (i = 0; i < (size / 4); i++)
  3671. pci_read_config_dword(dev, i * 4, &adapter->config_space[i]);
  3672. return 0;
  3673. }
  3674. static void
  3675. e1000_pci_restore_state(struct e1000_adapter *adapter)
  3676. {
  3677. struct pci_dev *dev = adapter->pdev;
  3678. int size;
  3679. int i;
  3680. if (adapter->config_space == NULL)
  3681. return;
  3682. if (adapter->hw.mac_type >= e1000_82571)
  3683. size = PCIE_CONFIG_SPACE_LEN;
  3684. else
  3685. size = PCI_CONFIG_SPACE_LEN;
  3686. for (i = 0; i < (size / 4); i++)
  3687. pci_write_config_dword(dev, i * 4, adapter->config_space[i]);
  3688. kfree(adapter->config_space);
  3689. adapter->config_space = NULL;
  3690. return;
  3691. }
  3692. #endif /* CONFIG_PM */
  3693. static int
  3694. e1000_suspend(struct pci_dev *pdev, pm_message_t state)
  3695. {
  3696. struct net_device *netdev = pci_get_drvdata(pdev);
  3697. struct e1000_adapter *adapter = netdev_priv(netdev);
  3698. uint32_t ctrl, ctrl_ext, rctl, manc, status;
  3699. uint32_t wufc = adapter->wol;
  3700. int retval = 0;
  3701. netif_device_detach(netdev);
  3702. if (netif_running(netdev))
  3703. e1000_down(adapter);
  3704. #ifdef CONFIG_PM
  3705. /* implement our own version of pci_save_state(pdev) because pci
  3706. * express adapters have larger 256 byte config spaces */
  3707. retval = e1000_pci_save_state(adapter);
  3708. if (retval)
  3709. return retval;
  3710. #endif
  3711. status = E1000_READ_REG(&adapter->hw, STATUS);
  3712. if (status & E1000_STATUS_LU)
  3713. wufc &= ~E1000_WUFC_LNKC;
  3714. if (wufc) {
  3715. e1000_setup_rctl(adapter);
  3716. e1000_set_multi(netdev);
  3717. /* turn on all-multi mode if wake on multicast is enabled */
  3718. if (adapter->wol & E1000_WUFC_MC) {
  3719. rctl = E1000_READ_REG(&adapter->hw, RCTL);
  3720. rctl |= E1000_RCTL_MPE;
  3721. E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
  3722. }
  3723. if (adapter->hw.mac_type >= e1000_82540) {
  3724. ctrl = E1000_READ_REG(&adapter->hw, CTRL);
  3725. /* advertise wake from D3Cold */
  3726. #define E1000_CTRL_ADVD3WUC 0x00100000
  3727. /* phy power management enable */
  3728. #define E1000_CTRL_EN_PHY_PWR_MGMT 0x00200000
  3729. ctrl |= E1000_CTRL_ADVD3WUC |
  3730. E1000_CTRL_EN_PHY_PWR_MGMT;
  3731. E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
  3732. }
  3733. if (adapter->hw.media_type == e1000_media_type_fiber ||
  3734. adapter->hw.media_type == e1000_media_type_internal_serdes) {
  3735. /* keep the laser running in D3 */
  3736. ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT);
  3737. ctrl_ext |= E1000_CTRL_EXT_SDP7_DATA;
  3738. E1000_WRITE_REG(&adapter->hw, CTRL_EXT, ctrl_ext);
  3739. }
  3740. /* Allow time for pending master requests to run */
  3741. e1000_disable_pciex_master(&adapter->hw);
  3742. E1000_WRITE_REG(&adapter->hw, WUC, E1000_WUC_PME_EN);
  3743. E1000_WRITE_REG(&adapter->hw, WUFC, wufc);
  3744. retval = pci_enable_wake(pdev, PCI_D3hot, 1);
  3745. if (retval)
  3746. DPRINTK(PROBE, ERR, "Error enabling D3 wake\n");
  3747. retval = pci_enable_wake(pdev, PCI_D3cold, 1);
  3748. if (retval)
  3749. DPRINTK(PROBE, ERR, "Error enabling D3 cold wake\n");
  3750. } else {
  3751. E1000_WRITE_REG(&adapter->hw, WUC, 0);
  3752. E1000_WRITE_REG(&adapter->hw, WUFC, 0);
  3753. retval = pci_enable_wake(pdev, PCI_D3hot, 0);
  3754. if (retval)
  3755. DPRINTK(PROBE, ERR, "Error enabling D3 wake\n");
  3756. retval = pci_enable_wake(pdev, PCI_D3cold, 0); /* 4 == D3 cold */
  3757. if (retval)
  3758. DPRINTK(PROBE, ERR, "Error enabling D3 cold wake\n");
  3759. }
  3760. if (adapter->hw.mac_type >= e1000_82540 &&
  3761. adapter->hw.media_type == e1000_media_type_copper) {
  3762. manc = E1000_READ_REG(&adapter->hw, MANC);
  3763. if (manc & E1000_MANC_SMBUS_EN) {
  3764. manc |= E1000_MANC_ARP_EN;
  3765. E1000_WRITE_REG(&adapter->hw, MANC, manc);
  3766. retval = pci_enable_wake(pdev, PCI_D3hot, 1);
  3767. if (retval)
  3768. DPRINTK(PROBE, ERR, "Error enabling D3 wake\n");
  3769. retval = pci_enable_wake(pdev, PCI_D3cold, 1);
  3770. if (retval)
  3771. DPRINTK(PROBE, ERR, "Error enabling D3 cold wake\n");
  3772. }
  3773. }
  3774. /* Release control of h/w to f/w. If f/w is AMT enabled, this
  3775. * would have already happened in close and is redundant. */
  3776. e1000_release_hw_control(adapter);
  3777. pci_disable_device(pdev);
  3778. retval = pci_set_power_state(pdev, pci_choose_state(pdev, state));
  3779. if (retval)
  3780. DPRINTK(PROBE, ERR, "Error in setting power state\n");
  3781. return 0;
  3782. }
  3783. #ifdef CONFIG_PM
  3784. static int
  3785. e1000_resume(struct pci_dev *pdev)
  3786. {
  3787. struct net_device *netdev = pci_get_drvdata(pdev);
  3788. struct e1000_adapter *adapter = netdev_priv(netdev);
  3789. int retval;
  3790. uint32_t manc, ret_val;
  3791. retval = pci_set_power_state(pdev, PCI_D0);
  3792. if (retval)
  3793. DPRINTK(PROBE, ERR, "Error in setting power state\n");
  3794. e1000_pci_restore_state(adapter);
  3795. ret_val = pci_enable_device(pdev);
  3796. pci_set_master(pdev);
  3797. retval = pci_enable_wake(pdev, PCI_D3hot, 0);
  3798. if (retval)
  3799. DPRINTK(PROBE, ERR, "Error enabling D3 wake\n");
  3800. retval = pci_enable_wake(pdev, PCI_D3cold, 0);
  3801. if (retval)
  3802. DPRINTK(PROBE, ERR, "Error enabling D3 cold wake\n");
  3803. e1000_reset(adapter);
  3804. E1000_WRITE_REG(&adapter->hw, WUS, ~0);
  3805. if (netif_running(netdev))
  3806. e1000_up(adapter);
  3807. netif_device_attach(netdev);
  3808. if (adapter->hw.mac_type >= e1000_82540 &&
  3809. adapter->hw.media_type == e1000_media_type_copper) {
  3810. manc = E1000_READ_REG(&adapter->hw, MANC);
  3811. manc &= ~(E1000_MANC_ARP_EN);
  3812. E1000_WRITE_REG(&adapter->hw, MANC, manc);
  3813. }
  3814. /* If the controller is 82573 and f/w is AMT, do not set
  3815. * DRV_LOAD until the interface is up. For all other cases,
  3816. * let the f/w know that the h/w is now under the control
  3817. * of the driver. */
  3818. if (adapter->hw.mac_type != e1000_82573 ||
  3819. !e1000_check_mng_mode(&adapter->hw))
  3820. e1000_get_hw_control(adapter);
  3821. return 0;
  3822. }
  3823. #endif
  3824. #ifdef CONFIG_NET_POLL_CONTROLLER
  3825. /*
  3826. * Polling 'interrupt' - used by things like netconsole to send skbs
  3827. * without having to re-enable interrupts. It's not called while
  3828. * the interrupt routine is executing.
  3829. */
  3830. static void
  3831. e1000_netpoll(struct net_device *netdev)
  3832. {
  3833. struct e1000_adapter *adapter = netdev_priv(netdev);
  3834. disable_irq(adapter->pdev->irq);
  3835. e1000_intr(adapter->pdev->irq, netdev, NULL);
  3836. e1000_clean_tx_irq(adapter, adapter->tx_ring);
  3837. #ifndef CONFIG_E1000_NAPI
  3838. adapter->clean_rx(adapter, adapter->rx_ring);
  3839. #endif
  3840. enable_irq(adapter->pdev->irq);
  3841. }
  3842. #endif
  3843. /* e1000_main.c */