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mach-s5p6440
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mach
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map.h

map.h 2.5 KB
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  1. /* linux/arch/arm/mach-s5p6440/include/mach/map.h
    2. 

  2.  *
    3. 

  3.  * Copyright (c) 2009 Samsung Electronics Co., Ltd.
    4. 

  4.  *		http://www.samsung.com/
    5. 

  5.  *
    6. 

  6.  * S5P6440 - Memory map definitions
    7. 

  7.  *
    8. 

  8.  * This program is free software; you can redistribute it and/or modify
    9. 

  9.  * it under the terms of the GNU General Public License version 2 as
    10. 

  10.  * published by the Free Software Foundation.
    11. 

  11. */
    12. 

  12. 

  13. #ifndef __ASM_ARCH_MAP_H
    14. 

  14. #define __ASM_ARCH_MAP_H __FILE__
    15. 

  15. 

  16. #include <plat/map-base.h>
    17. 

  17. 

  18. /* SYSCON */
    19. 

  19. #define S5P6440_PA_SYSCON	(0xE0100000)
    20. 

  20. #define S5P_PA_SYSCON		S5P6440_PA_SYSCON
    21. 

  21. #define S5P_VA_SYSCON		S3C_VA_SYS
    22. 

  22. 

  23. #define S5P6440_PA_CLK		(S5P6440_PA_SYSCON + 0x0)
    24. 

  24. #define S5P_PA_CLK		S5P6440_PA_CLK
    25. 

  25. #define S5P_VA_CLK		(S5P_VA_SYSCON + 0x0)
    26. 

  26. 

  27. /* GPIO */
    28. 

  28. #define S5P6440_PA_GPIO		(0xE0308000)
    29. 

  29. #define S5P_PA_GPIO		S5P6440_PA_GPIO
    30. 

  30. #define S5P_VA_GPIO		S3C_ADDR(0x00500000)
    31. 

  31. 

  32. /* VIC0 */
    33. 

  33. #define S5P6440_PA_VIC0		(0xE4000000)
    34. 

  34. #define S5P_PA_VIC0		S5P6440_PA_VIC0
    35. 

  35. #define S5P_VA_VIC0		(S3C_VA_IRQ + 0x0)
    36. 

  36. #define VA_VIC0			S5P_VA_VIC0
    37. 

  37. 

  38. /* VIC1 */
    39. 

  39. #define S5P6440_PA_VIC1		(0xE4100000)
    40. 

  40. #define S5P_PA_VIC1		S5P6440_PA_VIC1
    41. 

  41. #define S5P_VA_VIC1		(S3C_VA_IRQ + 0x10000)
    42. 

  42. #define VA_VIC1			S5P_VA_VIC1
    43. 

  43. 

  44. /* Timer */
    45. 

  45. #define S5P6440_PA_TIMER	(0xEA000000)
    46. 

  46. #define S5P_PA_TIMER		S5P6440_PA_TIMER
    47. 

  47. #define S5P_VA_TIMER		S3C_VA_TIMER
    48. 

  48. 

  49. /* RTC */
    50. 

  50. #define S5P6440_PA_RTC		(0xEA100000)
    51. 

  51. #define S5P_PA_RTC		S5P6440_PA_RTC
    52. 

  52. #define S5P_VA_RTC		S3C_ADDR(0x00600000)
    53. 

  53. 

  54. /* WDT */
    55. 

  55. #define S5P6440_PA_WDT		(0xEA200000)
    56. 

  56. #define S5P_PA_WDT		S5P6440_PA_WDT
    57. 

  57. #define S5p_VA_WDT		S3C_VA_WATCHDOG
    58. 

  58. 

  59. /* UART */
    60. 

  60. #define S5P6440_PA_UART		(0xEC000000)
    61. 

  61. #define S5P_PA_UART		S5P6440_PA_UART
    62. 

  62. #define S5P_VA_UART		S3C_VA_UART
    63. 

  63. 

  64. #define S5P_PA_UART0		(S5P_PA_UART + 0x0)
    65. 

  65. #define S5P_PA_UART1		(S5P_PA_UART + 0x400)
    66. 

  66. #define S5P_PA_UART2		(S5P_PA_UART + 0x800)
    67. 

  67. #define S5P_PA_UART3		(S5P_PA_UART + 0xC00)
    68. 

  68. #define S5P_UART_OFFSET		(0x400)
    69. 

  69. 

  70. #define S5P_VA_UARTx(x)		(S5P_VA_UART + (S5P_PA_UART & 0xfffff) \
    71. 

  71. 				+ ((x) * S5P_UART_OFFSET))
    72. 

  72. 

  73. #define S5P_VA_UART0		S5P_VA_UARTx(0)
    74. 

  74. #define S5P_VA_UART1		S5P_VA_UARTx(1)
    75. 

  75. #define S5P_VA_UART2		S5P_VA_UARTx(2)
    76. 

  76. #define S5P_VA_UART3		S5P_VA_UARTx(3)
    77. 

  77. #define S5P_SZ_UART		SZ_256
    78. 

  78. 

  79. /* I2C */
    80. 

  80. #define S5P6440_PA_IIC0		(0xEC104000)
    81. 

  81. #define S5P_PA_IIC0		S5P6440_PA_IIC0
    82. 

  82. #define S5p_VA_IIC0		S3C_ADDR(0x00700000)
    83. 

  83. 

  84. /* SDRAM */
    85. 

  85. #define S5P6440_PA_SDRAM	(0x20000000)
    86. 

  86. #define S5P_PA_SDRAM		S5P6440_PA_SDRAM
    87. 

  87. 

  88. /* compatibiltiy defines. */
    89. 

  89. #define S3C_PA_UART		S5P_PA_UART
    90. 

  90. #define S3C_UART_OFFSET		S5P_UART_OFFSET
    91. 

  91. #define S3C_PA_TIMER		S5P_PA_TIMER
    92. 

  92. #define S3C_PA_IIC		S5P_PA_IIC0
    93. 

  93. 

  94. #endif /* __ASM_ARCH_MAP_H */
    95.