mpi_ioc.h 54 KB

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  1. /*
  2. * Copyright (c) 2000-2005 LSI Logic Corporation.
  3. *
  4. *
  5. * Name: mpi_ioc.h
  6. * Title: MPI IOC, Port, Event, FW Download, and FW Upload messages
  7. * Creation Date: August 11, 2000
  8. *
  9. * mpi_ioc.h Version: 01.05.11
  10. *
  11. * Version History
  12. * ---------------
  13. *
  14. * Date Version Description
  15. * -------- -------- ------------------------------------------------------
  16. * 05-08-00 00.10.01 Original release for 0.10 spec dated 4/26/2000.
  17. * 05-24-00 00.10.02 Added _MSG_IOC_INIT_REPLY structure.
  18. * 06-06-00 01.00.01 Added CurReplyFrameSize field to _MSG_IOC_FACTS_REPLY.
  19. * 06-12-00 01.00.02 Added _MSG_PORT_ENABLE_REPLY structure.
  20. * Added _MSG_EVENT_ACK_REPLY structure.
  21. * Added _MSG_FW_DOWNLOAD_REPLY structure.
  22. * Added _MSG_TOOLBOX_REPLY structure.
  23. * 06-30-00 01.00.03 Added MaxLanBuckets to _PORT_FACT_REPLY structure.
  24. * 07-27-00 01.00.04 Added _EVENT_DATA structure definitions for _SCSI,
  25. * _LINK_STATUS, _LOOP_STATE and _LOGOUT.
  26. * 08-11-00 01.00.05 Switched positions of MsgLength and Function fields in
  27. * _MSG_EVENT_ACK_REPLY structure to match specification.
  28. * 11-02-00 01.01.01 Original release for post 1.0 work.
  29. * Added a value for Manufacturer to WhoInit.
  30. * 12-04-00 01.01.02 Modified IOCFacts reply, added FWUpload messages, and
  31. * removed toolbox message.
  32. * 01-09-01 01.01.03 Added event enabled and disabled defines.
  33. * Added structures for FwHeader and DataHeader.
  34. * Added ImageType to FwUpload reply.
  35. * 02-20-01 01.01.04 Started using MPI_POINTER.
  36. * 02-27-01 01.01.05 Added event for RAID status change and its event data.
  37. * Added IocNumber field to MSG_IOC_FACTS_REPLY.
  38. * 03-27-01 01.01.06 Added defines for ProductId field of MPI_FW_HEADER.
  39. * Added structure offset comments.
  40. * 04-09-01 01.01.07 Added structure EVENT_DATA_EVENT_CHANGE.
  41. * 08-08-01 01.02.01 Original release for v1.2 work.
  42. * New format for FWVersion and ProductId in
  43. * MSG_IOC_FACTS_REPLY and MPI_FW_HEADER.
  44. * 08-31-01 01.02.02 Addded event MPI_EVENT_SCSI_DEVICE_STATUS_CHANGE and
  45. * related structure and defines.
  46. * Added event MPI_EVENT_ON_BUS_TIMER_EXPIRED.
  47. * Added MPI_IOCINIT_FLAGS_DISCARD_FW_IMAGE.
  48. * Replaced a reserved field in MSG_IOC_FACTS_REPLY with
  49. * IOCExceptions and changed DataImageSize to reserved.
  50. * Added MPI_FW_DOWNLOAD_ITYPE_NVSTORE_DATA and
  51. * MPI_FW_UPLOAD_ITYPE_NVDATA.
  52. * 09-28-01 01.02.03 Modified Event Data for Integrated RAID.
  53. * 11-01-01 01.02.04 Added defines for MPI_EXT_IMAGE_HEADER ImageType field.
  54. * 03-14-02 01.02.05 Added HeaderVersion field to MSG_IOC_FACTS_REPLY.
  55. * 05-31-02 01.02.06 Added define for
  56. * MPI_IOCFACTS_EXCEPT_RAID_CONFIG_INVALID.
  57. * Added AliasIndex to EVENT_DATA_LOGOUT structure.
  58. * 04-01-03 01.02.07 Added defines for MPI_FW_HEADER_SIGNATURE_.
  59. * 06-26-03 01.02.08 Added new values to the product family defines.
  60. * 04-29-04 01.02.09 Added IOCCapabilities field to MSG_IOC_FACTS_REPLY and
  61. * added related defines.
  62. * 05-11-04 01.03.01 Original release for MPI v1.3.
  63. * 08-19-04 01.05.01 Added four new fields to MSG_IOC_INIT.
  64. * Added three new fields to MSG_IOC_FACTS_REPLY.
  65. * Defined four new bits for the IOCCapabilities field of
  66. * the IOCFacts reply.
  67. * Added two new PortTypes for the PortFacts reply.
  68. * Added six new events along with their EventData
  69. * structures.
  70. * Added a new MsgFlag to the FwDownload request to
  71. * indicate last segment.
  72. * Defined a new image type of boot loader.
  73. * Added FW family codes for SAS product families.
  74. * 10-05-04 01.05.02 Added ReplyFifoHostSignalingAddr field to
  75. * MSG_IOC_FACTS_REPLY.
  76. * 12-07-04 01.05.03 Added more defines for SAS Discovery Error event.
  77. * 12-09-04 01.05.04 Added Unsupported device to SAS Device event.
  78. * 01-15-05 01.05.05 Added event data for SAS SES Event.
  79. * 02-09-05 01.05.06 Added MPI_FW_UPLOAD_ITYPE_FW_BACKUP define.
  80. * 02-22-05 01.05.07 Added Host Page Buffer Persistent flag to IOC Facts
  81. * Reply and IOC Init Request.
  82. * 03-11-05 01.05.08 Added family code for 1068E family.
  83. * Removed IOCFacts Reply EEDP Capability bit.
  84. * 06-24-05 01.05.09 Added 5 new IOCFacts Reply IOCCapabilities bits.
  85. * Added Max SATA Targets to SAS Discovery Error event.
  86. * 08-30-05 01.05.10 Added 4 new events and their event data structures.
  87. * Added new ReasonCode value for SAS Device Status Change
  88. * event.
  89. * Added new family code for FC949E.
  90. * 03-27-06 01.05.11 Added MPI_IOCFACTS_CAPABILITY_TLR.
  91. * Added additional Reason Codes and more event data fields
  92. * to EVENT_DATA_SAS_DEVICE_STATUS_CHANGE.
  93. * Added EVENT_DATA_SAS_BROADCAST_PRIMITIVE structure and
  94. * new event.
  95. * Added MPI_EVENT_SAS_SMP_ERROR and event data structure.
  96. * Added MPI_EVENT_SAS_INIT_DEVICE_STATUS_CHANGE and event
  97. * data structure.
  98. * Added MPI_EVENT_SAS_INIT_TABLE_OVERFLOW and event
  99. * data structure.
  100. * Added MPI_EXT_IMAGE_TYPE_INITIALIZATION.
  101. * --------------------------------------------------------------------------
  102. */
  103. #ifndef MPI_IOC_H
  104. #define MPI_IOC_H
  105. /*****************************************************************************
  106. *
  107. * I O C M e s s a g e s
  108. *
  109. *****************************************************************************/
  110. /****************************************************************************/
  111. /* IOCInit message */
  112. /****************************************************************************/
  113. typedef struct _MSG_IOC_INIT
  114. {
  115. U8 WhoInit; /* 00h */
  116. U8 Reserved; /* 01h */
  117. U8 ChainOffset; /* 02h */
  118. U8 Function; /* 03h */
  119. U8 Flags; /* 04h */
  120. U8 MaxDevices; /* 05h */
  121. U8 MaxBuses; /* 06h */
  122. U8 MsgFlags; /* 07h */
  123. U32 MsgContext; /* 08h */
  124. U16 ReplyFrameSize; /* 0Ch */
  125. U8 Reserved1[2]; /* 0Eh */
  126. U32 HostMfaHighAddr; /* 10h */
  127. U32 SenseBufferHighAddr; /* 14h */
  128. U32 ReplyFifoHostSignalingAddr; /* 18h */
  129. SGE_SIMPLE_UNION HostPageBufferSGE; /* 1Ch */
  130. U16 MsgVersion; /* 28h */
  131. U16 HeaderVersion; /* 2Ah */
  132. } MSG_IOC_INIT, MPI_POINTER PTR_MSG_IOC_INIT,
  133. IOCInit_t, MPI_POINTER pIOCInit_t;
  134. /* WhoInit values */
  135. #define MPI_WHOINIT_NO_ONE (0x00)
  136. #define MPI_WHOINIT_SYSTEM_BIOS (0x01)
  137. #define MPI_WHOINIT_ROM_BIOS (0x02)
  138. #define MPI_WHOINIT_PCI_PEER (0x03)
  139. #define MPI_WHOINIT_HOST_DRIVER (0x04)
  140. #define MPI_WHOINIT_MANUFACTURER (0x05)
  141. /* Flags values */
  142. #define MPI_IOCINIT_FLAGS_HOST_PAGE_BUFFER_PERSISTENT (0x04)
  143. #define MPI_IOCINIT_FLAGS_REPLY_FIFO_HOST_SIGNAL (0x02)
  144. #define MPI_IOCINIT_FLAGS_DISCARD_FW_IMAGE (0x01)
  145. /* MsgVersion */
  146. #define MPI_IOCINIT_MSGVERSION_MAJOR_MASK (0xFF00)
  147. #define MPI_IOCINIT_MSGVERSION_MAJOR_SHIFT (8)
  148. #define MPI_IOCINIT_MSGVERSION_MINOR_MASK (0x00FF)
  149. #define MPI_IOCINIT_MSGVERSION_MINOR_SHIFT (0)
  150. /* HeaderVersion */
  151. #define MPI_IOCINIT_HEADERVERSION_UNIT_MASK (0xFF00)
  152. #define MPI_IOCINIT_HEADERVERSION_UNIT_SHIFT (8)
  153. #define MPI_IOCINIT_HEADERVERSION_DEV_MASK (0x00FF)
  154. #define MPI_IOCINIT_HEADERVERSION_DEV_SHIFT (0)
  155. typedef struct _MSG_IOC_INIT_REPLY
  156. {
  157. U8 WhoInit; /* 00h */
  158. U8 Reserved; /* 01h */
  159. U8 MsgLength; /* 02h */
  160. U8 Function; /* 03h */
  161. U8 Flags; /* 04h */
  162. U8 MaxDevices; /* 05h */
  163. U8 MaxBuses; /* 06h */
  164. U8 MsgFlags; /* 07h */
  165. U32 MsgContext; /* 08h */
  166. U16 Reserved2; /* 0Ch */
  167. U16 IOCStatus; /* 0Eh */
  168. U32 IOCLogInfo; /* 10h */
  169. } MSG_IOC_INIT_REPLY, MPI_POINTER PTR_MSG_IOC_INIT_REPLY,
  170. IOCInitReply_t, MPI_POINTER pIOCInitReply_t;
  171. /****************************************************************************/
  172. /* IOC Facts message */
  173. /****************************************************************************/
  174. typedef struct _MSG_IOC_FACTS
  175. {
  176. U8 Reserved[2]; /* 00h */
  177. U8 ChainOffset; /* 01h */
  178. U8 Function; /* 02h */
  179. U8 Reserved1[3]; /* 03h */
  180. U8 MsgFlags; /* 04h */
  181. U32 MsgContext; /* 08h */
  182. } MSG_IOC_FACTS, MPI_POINTER PTR_IOC_FACTS,
  183. IOCFacts_t, MPI_POINTER pIOCFacts_t;
  184. typedef struct _MPI_FW_VERSION_STRUCT
  185. {
  186. U8 Dev; /* 00h */
  187. U8 Unit; /* 01h */
  188. U8 Minor; /* 02h */
  189. U8 Major; /* 03h */
  190. } MPI_FW_VERSION_STRUCT;
  191. typedef union _MPI_FW_VERSION
  192. {
  193. MPI_FW_VERSION_STRUCT Struct;
  194. U32 Word;
  195. } MPI_FW_VERSION;
  196. /* IOC Facts Reply */
  197. typedef struct _MSG_IOC_FACTS_REPLY
  198. {
  199. U16 MsgVersion; /* 00h */
  200. U8 MsgLength; /* 02h */
  201. U8 Function; /* 03h */
  202. U16 HeaderVersion; /* 04h */
  203. U8 IOCNumber; /* 06h */
  204. U8 MsgFlags; /* 07h */
  205. U32 MsgContext; /* 08h */
  206. U16 IOCExceptions; /* 0Ch */
  207. U16 IOCStatus; /* 0Eh */
  208. U32 IOCLogInfo; /* 10h */
  209. U8 MaxChainDepth; /* 14h */
  210. U8 WhoInit; /* 15h */
  211. U8 BlockSize; /* 16h */
  212. U8 Flags; /* 17h */
  213. U16 ReplyQueueDepth; /* 18h */
  214. U16 RequestFrameSize; /* 1Ah */
  215. U16 Reserved_0101_FWVersion; /* 1Ch */ /* obsolete 16-bit FWVersion */
  216. U16 ProductID; /* 1Eh */
  217. U32 CurrentHostMfaHighAddr; /* 20h */
  218. U16 GlobalCredits; /* 24h */
  219. U8 NumberOfPorts; /* 26h */
  220. U8 EventState; /* 27h */
  221. U32 CurrentSenseBufferHighAddr; /* 28h */
  222. U16 CurReplyFrameSize; /* 2Ch */
  223. U8 MaxDevices; /* 2Eh */
  224. U8 MaxBuses; /* 2Fh */
  225. U32 FWImageSize; /* 30h */
  226. U32 IOCCapabilities; /* 34h */
  227. MPI_FW_VERSION FWVersion; /* 38h */
  228. U16 HighPriorityQueueDepth; /* 3Ch */
  229. U16 Reserved2; /* 3Eh */
  230. SGE_SIMPLE_UNION HostPageBufferSGE; /* 40h */
  231. U32 ReplyFifoHostSignalingAddr; /* 4Ch */
  232. } MSG_IOC_FACTS_REPLY, MPI_POINTER PTR_MSG_IOC_FACTS_REPLY,
  233. IOCFactsReply_t, MPI_POINTER pIOCFactsReply_t;
  234. #define MPI_IOCFACTS_MSGVERSION_MAJOR_MASK (0xFF00)
  235. #define MPI_IOCFACTS_MSGVERSION_MAJOR_SHIFT (8)
  236. #define MPI_IOCFACTS_MSGVERSION_MINOR_MASK (0x00FF)
  237. #define MPI_IOCFACTS_MSGVERSION_MINOR_SHIFT (0)
  238. #define MPI_IOCFACTS_HDRVERSION_UNIT_MASK (0xFF00)
  239. #define MPI_IOCFACTS_HDRVERSION_UNIT_SHIFT (8)
  240. #define MPI_IOCFACTS_HDRVERSION_DEV_MASK (0x00FF)
  241. #define MPI_IOCFACTS_HDRVERSION_DEV_SHIFT (0)
  242. #define MPI_IOCFACTS_EXCEPT_CONFIG_CHECKSUM_FAIL (0x0001)
  243. #define MPI_IOCFACTS_EXCEPT_RAID_CONFIG_INVALID (0x0002)
  244. #define MPI_IOCFACTS_EXCEPT_FW_CHECKSUM_FAIL (0x0004)
  245. #define MPI_IOCFACTS_EXCEPT_PERSISTENT_TABLE_FULL (0x0008)
  246. #define MPI_IOCFACTS_FLAGS_FW_DOWNLOAD_BOOT (0x01)
  247. #define MPI_IOCFACTS_FLAGS_REPLY_FIFO_HOST_SIGNAL (0x02)
  248. #define MPI_IOCFACTS_FLAGS_HOST_PAGE_BUFFER_PERSISTENT (0x04)
  249. #define MPI_IOCFACTS_EVENTSTATE_DISABLED (0x00)
  250. #define MPI_IOCFACTS_EVENTSTATE_ENABLED (0x01)
  251. #define MPI_IOCFACTS_CAPABILITY_HIGH_PRI_Q (0x00000001)
  252. #define MPI_IOCFACTS_CAPABILITY_REPLY_HOST_SIGNAL (0x00000002)
  253. #define MPI_IOCFACTS_CAPABILITY_QUEUE_FULL_HANDLING (0x00000004)
  254. #define MPI_IOCFACTS_CAPABILITY_DIAG_TRACE_BUFFER (0x00000008)
  255. #define MPI_IOCFACTS_CAPABILITY_SNAPSHOT_BUFFER (0x00000010)
  256. #define MPI_IOCFACTS_CAPABILITY_EXTENDED_BUFFER (0x00000020)
  257. #define MPI_IOCFACTS_CAPABILITY_EEDP (0x00000040)
  258. #define MPI_IOCFACTS_CAPABILITY_BIDIRECTIONAL (0x00000080)
  259. #define MPI_IOCFACTS_CAPABILITY_MULTICAST (0x00000100)
  260. #define MPI_IOCFACTS_CAPABILITY_SCSIIO32 (0x00000200)
  261. #define MPI_IOCFACTS_CAPABILITY_NO_SCSIIO16 (0x00000400)
  262. #define MPI_IOCFACTS_CAPABILITY_TLR (0x00000800)
  263. /*****************************************************************************
  264. *
  265. * P o r t M e s s a g e s
  266. *
  267. *****************************************************************************/
  268. /****************************************************************************/
  269. /* Port Facts message and Reply */
  270. /****************************************************************************/
  271. typedef struct _MSG_PORT_FACTS
  272. {
  273. U8 Reserved[2]; /* 00h */
  274. U8 ChainOffset; /* 02h */
  275. U8 Function; /* 03h */
  276. U8 Reserved1[2]; /* 04h */
  277. U8 PortNumber; /* 06h */
  278. U8 MsgFlags; /* 07h */
  279. U32 MsgContext; /* 08h */
  280. } MSG_PORT_FACTS, MPI_POINTER PTR_MSG_PORT_FACTS,
  281. PortFacts_t, MPI_POINTER pPortFacts_t;
  282. typedef struct _MSG_PORT_FACTS_REPLY
  283. {
  284. U16 Reserved; /* 00h */
  285. U8 MsgLength; /* 02h */
  286. U8 Function; /* 03h */
  287. U16 Reserved1; /* 04h */
  288. U8 PortNumber; /* 06h */
  289. U8 MsgFlags; /* 07h */
  290. U32 MsgContext; /* 08h */
  291. U16 Reserved2; /* 0Ch */
  292. U16 IOCStatus; /* 0Eh */
  293. U32 IOCLogInfo; /* 10h */
  294. U8 Reserved3; /* 14h */
  295. U8 PortType; /* 15h */
  296. U16 MaxDevices; /* 16h */
  297. U16 PortSCSIID; /* 18h */
  298. U16 ProtocolFlags; /* 1Ah */
  299. U16 MaxPostedCmdBuffers; /* 1Ch */
  300. U16 MaxPersistentIDs; /* 1Eh */
  301. U16 MaxLanBuckets; /* 20h */
  302. U16 Reserved4; /* 22h */
  303. U32 Reserved5; /* 24h */
  304. } MSG_PORT_FACTS_REPLY, MPI_POINTER PTR_MSG_PORT_FACTS_REPLY,
  305. PortFactsReply_t, MPI_POINTER pPortFactsReply_t;
  306. /* PortTypes values */
  307. #define MPI_PORTFACTS_PORTTYPE_INACTIVE (0x00)
  308. #define MPI_PORTFACTS_PORTTYPE_SCSI (0x01)
  309. #define MPI_PORTFACTS_PORTTYPE_FC (0x10)
  310. #define MPI_PORTFACTS_PORTTYPE_ISCSI (0x20)
  311. #define MPI_PORTFACTS_PORTTYPE_SAS (0x30)
  312. /* ProtocolFlags values */
  313. #define MPI_PORTFACTS_PROTOCOL_LOGBUSADDR (0x01)
  314. #define MPI_PORTFACTS_PROTOCOL_LAN (0x02)
  315. #define MPI_PORTFACTS_PROTOCOL_TARGET (0x04)
  316. #define MPI_PORTFACTS_PROTOCOL_INITIATOR (0x08)
  317. /****************************************************************************/
  318. /* Port Enable Message */
  319. /****************************************************************************/
  320. typedef struct _MSG_PORT_ENABLE
  321. {
  322. U8 Reserved[2]; /* 00h */
  323. U8 ChainOffset; /* 02h */
  324. U8 Function; /* 03h */
  325. U8 Reserved1[2]; /* 04h */
  326. U8 PortNumber; /* 06h */
  327. U8 MsgFlags; /* 07h */
  328. U32 MsgContext; /* 08h */
  329. } MSG_PORT_ENABLE, MPI_POINTER PTR_MSG_PORT_ENABLE,
  330. PortEnable_t, MPI_POINTER pPortEnable_t;
  331. typedef struct _MSG_PORT_ENABLE_REPLY
  332. {
  333. U8 Reserved[2]; /* 00h */
  334. U8 MsgLength; /* 02h */
  335. U8 Function; /* 03h */
  336. U8 Reserved1[2]; /* 04h */
  337. U8 PortNumber; /* 05h */
  338. U8 MsgFlags; /* 07h */
  339. U32 MsgContext; /* 08h */
  340. U16 Reserved2; /* 0Ch */
  341. U16 IOCStatus; /* 0Eh */
  342. U32 IOCLogInfo; /* 10h */
  343. } MSG_PORT_ENABLE_REPLY, MPI_POINTER PTR_MSG_PORT_ENABLE_REPLY,
  344. PortEnableReply_t, MPI_POINTER pPortEnableReply_t;
  345. /*****************************************************************************
  346. *
  347. * E v e n t M e s s a g e s
  348. *
  349. *****************************************************************************/
  350. /****************************************************************************/
  351. /* Event Notification messages */
  352. /****************************************************************************/
  353. typedef struct _MSG_EVENT_NOTIFY
  354. {
  355. U8 Switch; /* 00h */
  356. U8 Reserved; /* 01h */
  357. U8 ChainOffset; /* 02h */
  358. U8 Function; /* 03h */
  359. U8 Reserved1[3]; /* 04h */
  360. U8 MsgFlags; /* 07h */
  361. U32 MsgContext; /* 08h */
  362. } MSG_EVENT_NOTIFY, MPI_POINTER PTR_MSG_EVENT_NOTIFY,
  363. EventNotification_t, MPI_POINTER pEventNotification_t;
  364. /* Event Notification Reply */
  365. typedef struct _MSG_EVENT_NOTIFY_REPLY
  366. {
  367. U16 EventDataLength; /* 00h */
  368. U8 MsgLength; /* 02h */
  369. U8 Function; /* 03h */
  370. U8 Reserved1[2]; /* 04h */
  371. U8 AckRequired; /* 06h */
  372. U8 MsgFlags; /* 07h */
  373. U32 MsgContext; /* 08h */
  374. U8 Reserved2[2]; /* 0Ch */
  375. U16 IOCStatus; /* 0Eh */
  376. U32 IOCLogInfo; /* 10h */
  377. U32 Event; /* 14h */
  378. U32 EventContext; /* 18h */
  379. U32 Data[1]; /* 1Ch */
  380. } MSG_EVENT_NOTIFY_REPLY, MPI_POINTER PTR_MSG_EVENT_NOTIFY_REPLY,
  381. EventNotificationReply_t, MPI_POINTER pEventNotificationReply_t;
  382. /* Event Acknowledge */
  383. typedef struct _MSG_EVENT_ACK
  384. {
  385. U8 Reserved[2]; /* 00h */
  386. U8 ChainOffset; /* 02h */
  387. U8 Function; /* 03h */
  388. U8 Reserved1[3]; /* 04h */
  389. U8 MsgFlags; /* 07h */
  390. U32 MsgContext; /* 08h */
  391. U32 Event; /* 0Ch */
  392. U32 EventContext; /* 10h */
  393. } MSG_EVENT_ACK, MPI_POINTER PTR_MSG_EVENT_ACK,
  394. EventAck_t, MPI_POINTER pEventAck_t;
  395. typedef struct _MSG_EVENT_ACK_REPLY
  396. {
  397. U8 Reserved[2]; /* 00h */
  398. U8 MsgLength; /* 02h */
  399. U8 Function; /* 03h */
  400. U8 Reserved1[3]; /* 04h */
  401. U8 MsgFlags; /* 07h */
  402. U32 MsgContext; /* 08h */
  403. U16 Reserved2; /* 0Ch */
  404. U16 IOCStatus; /* 0Eh */
  405. U32 IOCLogInfo; /* 10h */
  406. } MSG_EVENT_ACK_REPLY, MPI_POINTER PTR_MSG_EVENT_ACK_REPLY,
  407. EventAckReply_t, MPI_POINTER pEventAckReply_t;
  408. /* Switch */
  409. #define MPI_EVENT_NOTIFICATION_SWITCH_OFF (0x00)
  410. #define MPI_EVENT_NOTIFICATION_SWITCH_ON (0x01)
  411. /* Event */
  412. #define MPI_EVENT_NONE (0x00000000)
  413. #define MPI_EVENT_LOG_DATA (0x00000001)
  414. #define MPI_EVENT_STATE_CHANGE (0x00000002)
  415. #define MPI_EVENT_UNIT_ATTENTION (0x00000003)
  416. #define MPI_EVENT_IOC_BUS_RESET (0x00000004)
  417. #define MPI_EVENT_EXT_BUS_RESET (0x00000005)
  418. #define MPI_EVENT_RESCAN (0x00000006)
  419. #define MPI_EVENT_LINK_STATUS_CHANGE (0x00000007)
  420. #define MPI_EVENT_LOOP_STATE_CHANGE (0x00000008)
  421. #define MPI_EVENT_LOGOUT (0x00000009)
  422. #define MPI_EVENT_EVENT_CHANGE (0x0000000A)
  423. #define MPI_EVENT_INTEGRATED_RAID (0x0000000B)
  424. #define MPI_EVENT_SCSI_DEVICE_STATUS_CHANGE (0x0000000C)
  425. #define MPI_EVENT_ON_BUS_TIMER_EXPIRED (0x0000000D)
  426. #define MPI_EVENT_QUEUE_FULL (0x0000000E)
  427. #define MPI_EVENT_SAS_DEVICE_STATUS_CHANGE (0x0000000F)
  428. #define MPI_EVENT_SAS_SES (0x00000010)
  429. #define MPI_EVENT_PERSISTENT_TABLE_FULL (0x00000011)
  430. #define MPI_EVENT_SAS_PHY_LINK_STATUS (0x00000012)
  431. #define MPI_EVENT_SAS_DISCOVERY_ERROR (0x00000013)
  432. #define MPI_EVENT_IR_RESYNC_UPDATE (0x00000014)
  433. #define MPI_EVENT_IR2 (0x00000015)
  434. #define MPI_EVENT_SAS_DISCOVERY (0x00000016)
  435. #define MPI_EVENT_SAS_BROADCAST_PRIMITIVE (0x00000017)
  436. #define MPI_EVENT_SAS_INIT_DEVICE_STATUS_CHANGE (0x00000018)
  437. #define MPI_EVENT_SAS_INIT_TABLE_OVERFLOW (0x00000019)
  438. #define MPI_EVENT_SAS_SMP_ERROR (0x0000001A)
  439. #define MPI_EVENT_LOG_ENTRY_ADDED (0x00000021)
  440. /* AckRequired field values */
  441. #define MPI_EVENT_NOTIFICATION_ACK_NOT_REQUIRED (0x00)
  442. #define MPI_EVENT_NOTIFICATION_ACK_REQUIRED (0x01)
  443. /* EventChange Event data */
  444. typedef struct _EVENT_DATA_EVENT_CHANGE
  445. {
  446. U8 EventState; /* 00h */
  447. U8 Reserved; /* 01h */
  448. U16 Reserved1; /* 02h */
  449. } EVENT_DATA_EVENT_CHANGE, MPI_POINTER PTR_EVENT_DATA_EVENT_CHANGE,
  450. EventDataEventChange_t, MPI_POINTER pEventDataEventChange_t;
  451. /* LogEntryAdded Event data */
  452. /* this structure matches MPI_LOG_0_ENTRY in mpi_cnfg.h */
  453. #define MPI_EVENT_DATA_LOG_ENTRY_DATA_LENGTH (0x1C)
  454. typedef struct _EVENT_DATA_LOG_ENTRY
  455. {
  456. U32 TimeStamp; /* 00h */
  457. U32 Reserved1; /* 04h */
  458. U16 LogSequence; /* 08h */
  459. U16 LogEntryQualifier; /* 0Ah */
  460. U8 LogData[MPI_EVENT_DATA_LOG_ENTRY_DATA_LENGTH]; /* 0Ch */
  461. } EVENT_DATA_LOG_ENTRY, MPI_POINTER PTR_EVENT_DATA_LOG_ENTRY,
  462. MpiEventDataLogEntry_t, MPI_POINTER pMpiEventDataLogEntry_t;
  463. typedef struct _EVENT_DATA_LOG_ENTRY_ADDED
  464. {
  465. U16 LogSequence; /* 00h */
  466. U16 Reserved1; /* 02h */
  467. U32 Reserved2; /* 04h */
  468. EVENT_DATA_LOG_ENTRY LogEntry; /* 08h */
  469. } EVENT_DATA_LOG_ENTRY_ADDED, MPI_POINTER PTR_EVENT_DATA_LOG_ENTRY_ADDED,
  470. MpiEventDataLogEntryAdded_t, MPI_POINTER pMpiEventDataLogEntryAdded_t;
  471. /* SCSI Event data for Port, Bus and Device forms */
  472. typedef struct _EVENT_DATA_SCSI
  473. {
  474. U8 TargetID; /* 00h */
  475. U8 BusPort; /* 01h */
  476. U16 Reserved; /* 02h */
  477. } EVENT_DATA_SCSI, MPI_POINTER PTR_EVENT_DATA_SCSI,
  478. EventDataScsi_t, MPI_POINTER pEventDataScsi_t;
  479. /* SCSI Device Status Change Event data */
  480. typedef struct _EVENT_DATA_SCSI_DEVICE_STATUS_CHANGE
  481. {
  482. U8 TargetID; /* 00h */
  483. U8 Bus; /* 01h */
  484. U8 ReasonCode; /* 02h */
  485. U8 LUN; /* 03h */
  486. U8 ASC; /* 04h */
  487. U8 ASCQ; /* 05h */
  488. U16 Reserved; /* 06h */
  489. } EVENT_DATA_SCSI_DEVICE_STATUS_CHANGE,
  490. MPI_POINTER PTR_EVENT_DATA_SCSI_DEVICE_STATUS_CHANGE,
  491. MpiEventDataScsiDeviceStatusChange_t,
  492. MPI_POINTER pMpiEventDataScsiDeviceStatusChange_t;
  493. /* MPI SCSI Device Status Change Event data ReasonCode values */
  494. #define MPI_EVENT_SCSI_DEV_STAT_RC_ADDED (0x03)
  495. #define MPI_EVENT_SCSI_DEV_STAT_RC_NOT_RESPONDING (0x04)
  496. #define MPI_EVENT_SCSI_DEV_STAT_RC_SMART_DATA (0x05)
  497. /* SAS Device Status Change Event data */
  498. typedef struct _EVENT_DATA_SAS_DEVICE_STATUS_CHANGE
  499. {
  500. U8 TargetID; /* 00h */
  501. U8 Bus; /* 01h */
  502. U8 ReasonCode; /* 02h */
  503. U8 Reserved; /* 03h */
  504. U8 ASC; /* 04h */
  505. U8 ASCQ; /* 05h */
  506. U16 DevHandle; /* 06h */
  507. U32 DeviceInfo; /* 08h */
  508. U16 ParentDevHandle; /* 0Ch */
  509. U8 PhyNum; /* 0Eh */
  510. U8 Reserved1; /* 0Fh */
  511. U64 SASAddress; /* 10h */
  512. U8 LUN[8]; /* 18h */
  513. U16 TaskTag; /* 20h */
  514. U16 Reserved2; /* 22h */
  515. } EVENT_DATA_SAS_DEVICE_STATUS_CHANGE,
  516. MPI_POINTER PTR_EVENT_DATA_SAS_DEVICE_STATUS_CHANGE,
  517. MpiEventDataSasDeviceStatusChange_t,
  518. MPI_POINTER pMpiEventDataSasDeviceStatusChange_t;
  519. /* MPI SAS Device Status Change Event data ReasonCode values */
  520. #define MPI_EVENT_SAS_DEV_STAT_RC_ADDED (0x03)
  521. #define MPI_EVENT_SAS_DEV_STAT_RC_NOT_RESPONDING (0x04)
  522. #define MPI_EVENT_SAS_DEV_STAT_RC_SMART_DATA (0x05)
  523. #define MPI_EVENT_SAS_DEV_STAT_RC_NO_PERSIST_ADDED (0x06)
  524. #define MPI_EVENT_SAS_DEV_STAT_RC_UNSUPPORTED (0x07)
  525. #define MPI_EVENT_SAS_DEV_STAT_RC_INTERNAL_DEVICE_RESET (0x08)
  526. #define MPI_EVENT_SAS_DEV_STAT_RC_TASK_ABORT_INTERNAL (0x09)
  527. #define MPI_EVENT_SAS_DEV_STAT_RC_ABORT_TASK_SET_INTERNAL (0x0A)
  528. #define MPI_EVENT_SAS_DEV_STAT_RC_CLEAR_TASK_SET_INTERNAL (0x0B)
  529. #define MPI_EVENT_SAS_DEV_STAT_RC_QUERY_TASK_INTERNAL (0x0C)
  530. /* SCSI Event data for Queue Full event */
  531. typedef struct _EVENT_DATA_QUEUE_FULL
  532. {
  533. U8 TargetID; /* 00h */
  534. U8 Bus; /* 01h */
  535. U16 CurrentDepth; /* 02h */
  536. } EVENT_DATA_QUEUE_FULL, MPI_POINTER PTR_EVENT_DATA_QUEUE_FULL,
  537. EventDataQueueFull_t, MPI_POINTER pEventDataQueueFull_t;
  538. /* MPI Integrated RAID Event data */
  539. typedef struct _EVENT_DATA_RAID
  540. {
  541. U8 VolumeID; /* 00h */
  542. U8 VolumeBus; /* 01h */
  543. U8 ReasonCode; /* 02h */
  544. U8 PhysDiskNum; /* 03h */
  545. U8 ASC; /* 04h */
  546. U8 ASCQ; /* 05h */
  547. U16 Reserved; /* 06h */
  548. U32 SettingsStatus; /* 08h */
  549. } EVENT_DATA_RAID, MPI_POINTER PTR_EVENT_DATA_RAID,
  550. MpiEventDataRaid_t, MPI_POINTER pMpiEventDataRaid_t;
  551. /* MPI Integrated RAID Event data ReasonCode values */
  552. #define MPI_EVENT_RAID_RC_VOLUME_CREATED (0x00)
  553. #define MPI_EVENT_RAID_RC_VOLUME_DELETED (0x01)
  554. #define MPI_EVENT_RAID_RC_VOLUME_SETTINGS_CHANGED (0x02)
  555. #define MPI_EVENT_RAID_RC_VOLUME_STATUS_CHANGED (0x03)
  556. #define MPI_EVENT_RAID_RC_VOLUME_PHYSDISK_CHANGED (0x04)
  557. #define MPI_EVENT_RAID_RC_PHYSDISK_CREATED (0x05)
  558. #define MPI_EVENT_RAID_RC_PHYSDISK_DELETED (0x06)
  559. #define MPI_EVENT_RAID_RC_PHYSDISK_SETTINGS_CHANGED (0x07)
  560. #define MPI_EVENT_RAID_RC_PHYSDISK_STATUS_CHANGED (0x08)
  561. #define MPI_EVENT_RAID_RC_DOMAIN_VAL_NEEDED (0x09)
  562. #define MPI_EVENT_RAID_RC_SMART_DATA (0x0A)
  563. #define MPI_EVENT_RAID_RC_REPLACE_ACTION_STARTED (0x0B)
  564. /* MPI Integrated RAID Resync Update Event data */
  565. typedef struct _MPI_EVENT_DATA_IR_RESYNC_UPDATE
  566. {
  567. U8 VolumeID; /* 00h */
  568. U8 VolumeBus; /* 01h */
  569. U8 ResyncComplete; /* 02h */
  570. U8 Reserved1; /* 03h */
  571. U32 Reserved2; /* 04h */
  572. } MPI_EVENT_DATA_IR_RESYNC_UPDATE,
  573. MPI_POINTER PTR_MPI_EVENT_DATA_IR_RESYNC_UPDATE,
  574. MpiEventDataIrResyncUpdate_t, MPI_POINTER pMpiEventDataIrResyncUpdate_t;
  575. /* MPI IR2 Event data */
  576. /* MPI_LD_STATE or MPI_PD_STATE */
  577. typedef struct _IR2_STATE_CHANGED
  578. {
  579. U16 PreviousState; /* 00h */
  580. U16 NewState; /* 02h */
  581. } IR2_STATE_CHANGED, MPI_POINTER PTR_IR2_STATE_CHANGED;
  582. typedef struct _IR2_PD_INFO
  583. {
  584. U16 DeviceHandle; /* 00h */
  585. U8 TruncEnclosureHandle; /* 02h */
  586. U8 TruncatedSlot; /* 03h */
  587. } IR2_PD_INFO, MPI_POINTER PTR_IR2_PD_INFO;
  588. typedef union _MPI_IR2_RC_EVENT_DATA
  589. {
  590. IR2_STATE_CHANGED StateChanged;
  591. U32 Lba;
  592. IR2_PD_INFO PdInfo;
  593. } MPI_IR2_RC_EVENT_DATA, MPI_POINTER PTR_MPI_IR2_RC_EVENT_DATA;
  594. typedef struct _MPI_EVENT_DATA_IR2
  595. {
  596. U8 TargetID; /* 00h */
  597. U8 Bus; /* 01h */
  598. U8 ReasonCode; /* 02h */
  599. U8 PhysDiskNum; /* 03h */
  600. MPI_IR2_RC_EVENT_DATA IR2EventData; /* 04h */
  601. } MPI_EVENT_DATA_IR2, MPI_POINTER PTR_MPI_EVENT_DATA_IR2,
  602. MpiEventDataIR2_t, MPI_POINTER pMpiEventDataIR2_t;
  603. /* MPI IR2 Event data ReasonCode values */
  604. #define MPI_EVENT_IR2_RC_LD_STATE_CHANGED (0x01)
  605. #define MPI_EVENT_IR2_RC_PD_STATE_CHANGED (0x02)
  606. #define MPI_EVENT_IR2_RC_BAD_BLOCK_TABLE_FULL (0x03)
  607. #define MPI_EVENT_IR2_RC_PD_INSERTED (0x04)
  608. #define MPI_EVENT_IR2_RC_PD_REMOVED (0x05)
  609. #define MPI_EVENT_IR2_RC_FOREIGN_CFG_DETECTED (0x06)
  610. #define MPI_EVENT_IR2_RC_REBUILD_MEDIUM_ERROR (0x07)
  611. /* defines for logical disk states */
  612. #define MPI_LD_STATE_OPTIMAL (0x00)
  613. #define MPI_LD_STATE_DEGRADED (0x01)
  614. #define MPI_LD_STATE_FAILED (0x02)
  615. #define MPI_LD_STATE_MISSING (0x03)
  616. #define MPI_LD_STATE_OFFLINE (0x04)
  617. /* defines for physical disk states */
  618. #define MPI_PD_STATE_ONLINE (0x00)
  619. #define MPI_PD_STATE_MISSING (0x01)
  620. #define MPI_PD_STATE_NOT_COMPATIBLE (0x02)
  621. #define MPI_PD_STATE_FAILED (0x03)
  622. #define MPI_PD_STATE_INITIALIZING (0x04)
  623. #define MPI_PD_STATE_OFFLINE_AT_HOST_REQUEST (0x05)
  624. #define MPI_PD_STATE_FAILED_AT_HOST_REQUEST (0x06)
  625. #define MPI_PD_STATE_OFFLINE_FOR_ANOTHER_REASON (0xFF)
  626. /* MPI Link Status Change Event data */
  627. typedef struct _EVENT_DATA_LINK_STATUS
  628. {
  629. U8 State; /* 00h */
  630. U8 Reserved; /* 01h */
  631. U16 Reserved1; /* 02h */
  632. U8 Reserved2; /* 04h */
  633. U8 Port; /* 05h */
  634. U16 Reserved3; /* 06h */
  635. } EVENT_DATA_LINK_STATUS, MPI_POINTER PTR_EVENT_DATA_LINK_STATUS,
  636. EventDataLinkStatus_t, MPI_POINTER pEventDataLinkStatus_t;
  637. #define MPI_EVENT_LINK_STATUS_FAILURE (0x00000000)
  638. #define MPI_EVENT_LINK_STATUS_ACTIVE (0x00000001)
  639. /* MPI Loop State Change Event data */
  640. typedef struct _EVENT_DATA_LOOP_STATE
  641. {
  642. U8 Character4; /* 00h */
  643. U8 Character3; /* 01h */
  644. U8 Type; /* 02h */
  645. U8 Reserved; /* 03h */
  646. U8 Reserved1; /* 04h */
  647. U8 Port; /* 05h */
  648. U16 Reserved2; /* 06h */
  649. } EVENT_DATA_LOOP_STATE, MPI_POINTER PTR_EVENT_DATA_LOOP_STATE,
  650. EventDataLoopState_t, MPI_POINTER pEventDataLoopState_t;
  651. #define MPI_EVENT_LOOP_STATE_CHANGE_LIP (0x0001)
  652. #define MPI_EVENT_LOOP_STATE_CHANGE_LPE (0x0002)
  653. #define MPI_EVENT_LOOP_STATE_CHANGE_LPB (0x0003)
  654. /* MPI LOGOUT Event data */
  655. typedef struct _EVENT_DATA_LOGOUT
  656. {
  657. U32 NPortID; /* 00h */
  658. U8 AliasIndex; /* 04h */
  659. U8 Port; /* 05h */
  660. U16 Reserved1; /* 06h */
  661. } EVENT_DATA_LOGOUT, MPI_POINTER PTR_EVENT_DATA_LOGOUT,
  662. EventDataLogout_t, MPI_POINTER pEventDataLogout_t;
  663. #define MPI_EVENT_LOGOUT_ALL_ALIASES (0xFF)
  664. /* SAS SES Event data */
  665. typedef struct _EVENT_DATA_SAS_SES
  666. {
  667. U8 PhyNum; /* 00h */
  668. U8 Port; /* 01h */
  669. U8 PortWidth; /* 02h */
  670. U8 Reserved1; /* 04h */
  671. } EVENT_DATA_SAS_SES, MPI_POINTER PTR_EVENT_DATA_SAS_SES,
  672. MpiEventDataSasSes_t, MPI_POINTER pMpiEventDataSasSes_t;
  673. /* SAS Broadcast Primitive Event data */
  674. typedef struct _EVENT_DATA_SAS_BROADCAST_PRIMITIVE
  675. {
  676. U8 PhyNum; /* 00h */
  677. U8 Port; /* 01h */
  678. U8 PortWidth; /* 02h */
  679. U8 Primitive; /* 04h */
  680. } EVENT_DATA_SAS_BROADCAST_PRIMITIVE,
  681. MPI_POINTER PTR_EVENT_DATA_SAS_BROADCAST_PRIMITIVE,
  682. MpiEventDataSasBroadcastPrimitive_t,
  683. MPI_POINTER pMpiEventDataSasBroadcastPrimitive_t;
  684. #define MPI_EVENT_PRIMITIVE_CHANGE (0x01)
  685. #define MPI_EVENT_PRIMITIVE_EXPANDER (0x03)
  686. #define MPI_EVENT_PRIMITIVE_RESERVED2 (0x04)
  687. #define MPI_EVENT_PRIMITIVE_RESERVED3 (0x05)
  688. #define MPI_EVENT_PRIMITIVE_RESERVED4 (0x06)
  689. #define MPI_EVENT_PRIMITIVE_CHANGE0_RESERVED (0x07)
  690. #define MPI_EVENT_PRIMITIVE_CHANGE1_RESERVED (0x08)
  691. /* SAS Phy Link Status Event data */
  692. typedef struct _EVENT_DATA_SAS_PHY_LINK_STATUS
  693. {
  694. U8 PhyNum; /* 00h */
  695. U8 LinkRates; /* 01h */
  696. U16 DevHandle; /* 02h */
  697. U64 SASAddress; /* 04h */
  698. } EVENT_DATA_SAS_PHY_LINK_STATUS, MPI_POINTER PTR_EVENT_DATA_SAS_PHY_LINK_STATUS,
  699. MpiEventDataSasPhyLinkStatus_t, MPI_POINTER pMpiEventDataSasPhyLinkStatus_t;
  700. /* defines for the LinkRates field of the SAS PHY Link Status event */
  701. #define MPI_EVENT_SAS_PLS_LR_CURRENT_MASK (0xF0)
  702. #define MPI_EVENT_SAS_PLS_LR_CURRENT_SHIFT (4)
  703. #define MPI_EVENT_SAS_PLS_LR_PREVIOUS_MASK (0x0F)
  704. #define MPI_EVENT_SAS_PLS_LR_PREVIOUS_SHIFT (0)
  705. #define MPI_EVENT_SAS_PLS_LR_RATE_UNKNOWN (0x00)
  706. #define MPI_EVENT_SAS_PLS_LR_RATE_PHY_DISABLED (0x01)
  707. #define MPI_EVENT_SAS_PLS_LR_RATE_FAILED_SPEED_NEGOTIATION (0x02)
  708. #define MPI_EVENT_SAS_PLS_LR_RATE_SATA_OOB_COMPLETE (0x03)
  709. #define MPI_EVENT_SAS_PLS_LR_RATE_1_5 (0x08)
  710. #define MPI_EVENT_SAS_PLS_LR_RATE_3_0 (0x09)
  711. /* SAS Discovery Event data */
  712. typedef struct _EVENT_DATA_SAS_DISCOVERY
  713. {
  714. U32 DiscoveryStatus; /* 00h */
  715. U32 Reserved1; /* 04h */
  716. } EVENT_DATA_SAS_DISCOVERY, MPI_POINTER PTR_EVENT_DATA_SAS_DISCOVERY,
  717. EventDataSasDiscovery_t, MPI_POINTER pEventDataSasDiscovery_t;
  718. #define MPI_EVENT_SAS_DSCVRY_COMPLETE (0x00000000)
  719. #define MPI_EVENT_SAS_DSCVRY_IN_PROGRESS (0x00000001)
  720. #define MPI_EVENT_SAS_DSCVRY_PHY_BITS_MASK (0xFFFF0000)
  721. #define MPI_EVENT_SAS_DSCVRY_PHY_BITS_SHIFT (16)
  722. /* SAS Discovery Errror Event data */
  723. typedef struct _EVENT_DATA_DISCOVERY_ERROR
  724. {
  725. U32 DiscoveryStatus; /* 00h */
  726. U8 Port; /* 04h */
  727. U8 Reserved1; /* 05h */
  728. U16 Reserved2; /* 06h */
  729. } EVENT_DATA_DISCOVERY_ERROR, MPI_POINTER PTR_EVENT_DATA_DISCOVERY_ERROR,
  730. EventDataDiscoveryError_t, MPI_POINTER pEventDataDiscoveryError_t;
  731. #define MPI_EVENT_DSCVRY_ERR_DS_LOOP_DETECTED (0x00000001)
  732. #define MPI_EVENT_DSCVRY_ERR_DS_UNADDRESSABLE_DEVICE (0x00000002)
  733. #define MPI_EVENT_DSCVRY_ERR_DS_MULTIPLE_PORTS (0x00000004)
  734. #define MPI_EVENT_DSCVRY_ERR_DS_EXPANDER_ERR (0x00000008)
  735. #define MPI_EVENT_DSCVRY_ERR_DS_SMP_TIMEOUT (0x00000010)
  736. #define MPI_EVENT_DSCVRY_ERR_DS_OUT_ROUTE_ENTRIES (0x00000020)
  737. #define MPI_EVENT_DSCVRY_ERR_DS_INDEX_NOT_EXIST (0x00000040)
  738. #define MPI_EVENT_DSCVRY_ERR_DS_SMP_FUNCTION_FAILED (0x00000080)
  739. #define MPI_EVENT_DSCVRY_ERR_DS_SMP_CRC_ERROR (0x00000100)
  740. #define MPI_EVENT_DSCVRY_ERR_DS_MULTPL_SUBTRACTIVE (0x00000200)
  741. #define MPI_EVENT_DSCVRY_ERR_DS_TABLE_TO_TABLE (0x00000400)
  742. #define MPI_EVENT_DSCVRY_ERR_DS_MULTPL_PATHS (0x00000800)
  743. #define MPI_EVENT_DSCVRY_ERR_DS_MAX_SATA_TARGETS (0x00001000)
  744. /* SAS SMP Error Event data */
  745. typedef struct _EVENT_DATA_SAS_SMP_ERROR
  746. {
  747. U8 Status; /* 00h */
  748. U8 Port; /* 01h */
  749. U8 SMPFunctionResult; /* 02h */
  750. U8 Reserved1; /* 03h */
  751. U64 SASAddress; /* 04h */
  752. } EVENT_DATA_SAS_SMP_ERROR, MPI_POINTER PTR_EVENT_DATA_SAS_SMP_ERROR,
  753. MpiEventDataSasSmpError_t, MPI_POINTER pMpiEventDataSasSmpError_t;
  754. /* defines for the Status field of the SAS SMP Error event */
  755. #define MPI_EVENT_SAS_SMP_FUNCTION_RESULT_VALID (0x00)
  756. #define MPI_EVENT_SAS_SMP_CRC_ERROR (0x01)
  757. #define MPI_EVENT_SAS_SMP_TIMEOUT (0x02)
  758. #define MPI_EVENT_SAS_SMP_NO_DESTINATION (0x03)
  759. #define MPI_EVENT_SAS_SMP_BAD_DESTINATION (0x04)
  760. /* SAS Initiator Device Status Change Event data */
  761. typedef struct _EVENT_DATA_SAS_INIT_DEV_STATUS_CHANGE
  762. {
  763. U8 ReasonCode; /* 00h */
  764. U8 Port; /* 01h */
  765. U16 DevHandle; /* 02h */
  766. U64 SASAddress; /* 04h */
  767. } EVENT_DATA_SAS_INIT_DEV_STATUS_CHANGE,
  768. MPI_POINTER PTR_EVENT_DATA_SAS_INIT_DEV_STATUS_CHANGE,
  769. MpiEventDataSasInitDevStatusChange_t,
  770. MPI_POINTER pMpiEventDataSasInitDevStatusChange_t;
  771. /* defines for the ReasonCode field of the SAS Initiator Device Status Change event */
  772. #define MPI_EVENT_SAS_INIT_RC_ADDED (0x01)
  773. /* SAS Initiator Device Table Overflow Event data */
  774. typedef struct _EVENT_DATA_SAS_INIT_TABLE_OVERFLOW
  775. {
  776. U8 MaxInit; /* 00h */
  777. U8 CurrentInit; /* 01h */
  778. U16 Reserved1; /* 02h */
  779. } EVENT_DATA_SAS_INIT_TABLE_OVERFLOW,
  780. MPI_POINTER PTR_EVENT_DATA_SAS_INIT_TABLE_OVERFLOW,
  781. MpiEventDataSasInitTableOverflow_t,
  782. MPI_POINTER pMpiEventDataSasInitTableOverflow_t;
  783. /*****************************************************************************
  784. *
  785. * F i r m w a r e L o a d M e s s a g e s
  786. *
  787. *****************************************************************************/
  788. /****************************************************************************/
  789. /* Firmware Download message and associated structures */
  790. /****************************************************************************/
  791. typedef struct _MSG_FW_DOWNLOAD
  792. {
  793. U8 ImageType; /* 00h */
  794. U8 Reserved; /* 01h */
  795. U8 ChainOffset; /* 02h */
  796. U8 Function; /* 03h */
  797. U8 Reserved1[3]; /* 04h */
  798. U8 MsgFlags; /* 07h */
  799. U32 MsgContext; /* 08h */
  800. SGE_MPI_UNION SGL; /* 0Ch */
  801. } MSG_FW_DOWNLOAD, MPI_POINTER PTR_MSG_FW_DOWNLOAD,
  802. FWDownload_t, MPI_POINTER pFWDownload_t;
  803. #define MPI_FW_DOWNLOAD_MSGFLGS_LAST_SEGMENT (0x01)
  804. #define MPI_FW_DOWNLOAD_ITYPE_RESERVED (0x00)
  805. #define MPI_FW_DOWNLOAD_ITYPE_FW (0x01)
  806. #define MPI_FW_DOWNLOAD_ITYPE_BIOS (0x02)
  807. #define MPI_FW_DOWNLOAD_ITYPE_NVDATA (0x03)
  808. #define MPI_FW_DOWNLOAD_ITYPE_BOOTLOADER (0x04)
  809. typedef struct _FWDownloadTCSGE
  810. {
  811. U8 Reserved; /* 00h */
  812. U8 ContextSize; /* 01h */
  813. U8 DetailsLength; /* 02h */
  814. U8 Flags; /* 03h */
  815. U32 Reserved_0100_Checksum; /* 04h */ /* obsolete Checksum */
  816. U32 ImageOffset; /* 08h */
  817. U32 ImageSize; /* 0Ch */
  818. } FW_DOWNLOAD_TCSGE, MPI_POINTER PTR_FW_DOWNLOAD_TCSGE,
  819. FWDownloadTCSGE_t, MPI_POINTER pFWDownloadTCSGE_t;
  820. /* Firmware Download reply */
  821. typedef struct _MSG_FW_DOWNLOAD_REPLY
  822. {
  823. U8 ImageType; /* 00h */
  824. U8 Reserved; /* 01h */
  825. U8 MsgLength; /* 02h */
  826. U8 Function; /* 03h */
  827. U8 Reserved1[3]; /* 04h */
  828. U8 MsgFlags; /* 07h */
  829. U32 MsgContext; /* 08h */
  830. U16 Reserved2; /* 0Ch */
  831. U16 IOCStatus; /* 0Eh */
  832. U32 IOCLogInfo; /* 10h */
  833. } MSG_FW_DOWNLOAD_REPLY, MPI_POINTER PTR_MSG_FW_DOWNLOAD_REPLY,
  834. FWDownloadReply_t, MPI_POINTER pFWDownloadReply_t;
  835. /****************************************************************************/
  836. /* Firmware Upload message and associated structures */
  837. /****************************************************************************/
  838. typedef struct _MSG_FW_UPLOAD
  839. {
  840. U8 ImageType; /* 00h */
  841. U8 Reserved; /* 01h */
  842. U8 ChainOffset; /* 02h */
  843. U8 Function; /* 03h */
  844. U8 Reserved1[3]; /* 04h */
  845. U8 MsgFlags; /* 07h */
  846. U32 MsgContext; /* 08h */
  847. SGE_MPI_UNION SGL; /* 0Ch */
  848. } MSG_FW_UPLOAD, MPI_POINTER PTR_MSG_FW_UPLOAD,
  849. FWUpload_t, MPI_POINTER pFWUpload_t;
  850. #define MPI_FW_UPLOAD_ITYPE_FW_IOC_MEM (0x00)
  851. #define MPI_FW_UPLOAD_ITYPE_FW_FLASH (0x01)
  852. #define MPI_FW_UPLOAD_ITYPE_BIOS_FLASH (0x02)
  853. #define MPI_FW_UPLOAD_ITYPE_NVDATA (0x03)
  854. #define MPI_FW_UPLOAD_ITYPE_BOOTLOADER (0x04)
  855. #define MPI_FW_UPLOAD_ITYPE_FW_BACKUP (0x05)
  856. typedef struct _FWUploadTCSGE
  857. {
  858. U8 Reserved; /* 00h */
  859. U8 ContextSize; /* 01h */
  860. U8 DetailsLength; /* 02h */
  861. U8 Flags; /* 03h */
  862. U32 Reserved1; /* 04h */
  863. U32 ImageOffset; /* 08h */
  864. U32 ImageSize; /* 0Ch */
  865. } FW_UPLOAD_TCSGE, MPI_POINTER PTR_FW_UPLOAD_TCSGE,
  866. FWUploadTCSGE_t, MPI_POINTER pFWUploadTCSGE_t;
  867. /* Firmware Upload reply */
  868. typedef struct _MSG_FW_UPLOAD_REPLY
  869. {
  870. U8 ImageType; /* 00h */
  871. U8 Reserved; /* 01h */
  872. U8 MsgLength; /* 02h */
  873. U8 Function; /* 03h */
  874. U8 Reserved1[3]; /* 04h */
  875. U8 MsgFlags; /* 07h */
  876. U32 MsgContext; /* 08h */
  877. U16 Reserved2; /* 0Ch */
  878. U16 IOCStatus; /* 0Eh */
  879. U32 IOCLogInfo; /* 10h */
  880. U32 ActualImageSize; /* 14h */
  881. } MSG_FW_UPLOAD_REPLY, MPI_POINTER PTR_MSG_FW_UPLOAD_REPLY,
  882. FWUploadReply_t, MPI_POINTER pFWUploadReply_t;
  883. typedef struct _MPI_FW_HEADER
  884. {
  885. U32 ArmBranchInstruction0; /* 00h */
  886. U32 Signature0; /* 04h */
  887. U32 Signature1; /* 08h */
  888. U32 Signature2; /* 0Ch */
  889. U32 ArmBranchInstruction1; /* 10h */
  890. U32 ArmBranchInstruction2; /* 14h */
  891. U32 Reserved; /* 18h */
  892. U32 Checksum; /* 1Ch */
  893. U16 VendorId; /* 20h */
  894. U16 ProductId; /* 22h */
  895. MPI_FW_VERSION FWVersion; /* 24h */
  896. U32 SeqCodeVersion; /* 28h */
  897. U32 ImageSize; /* 2Ch */
  898. U32 NextImageHeaderOffset; /* 30h */
  899. U32 LoadStartAddress; /* 34h */
  900. U32 IopResetVectorValue; /* 38h */
  901. U32 IopResetRegAddr; /* 3Ch */
  902. U32 VersionNameWhat; /* 40h */
  903. U8 VersionName[32]; /* 44h */
  904. U32 VendorNameWhat; /* 64h */
  905. U8 VendorName[32]; /* 68h */
  906. } MPI_FW_HEADER, MPI_POINTER PTR_MPI_FW_HEADER,
  907. MpiFwHeader_t, MPI_POINTER pMpiFwHeader_t;
  908. #define MPI_FW_HEADER_WHAT_SIGNATURE (0x29232840)
  909. /* defines for using the ProductId field */
  910. #define MPI_FW_HEADER_PID_TYPE_MASK (0xF000)
  911. #define MPI_FW_HEADER_PID_TYPE_SCSI (0x0000)
  912. #define MPI_FW_HEADER_PID_TYPE_FC (0x1000)
  913. #define MPI_FW_HEADER_PID_TYPE_SAS (0x2000)
  914. #define MPI_FW_HEADER_SIGNATURE_0 (0x5AEAA55A)
  915. #define MPI_FW_HEADER_SIGNATURE_1 (0xA55AEAA5)
  916. #define MPI_FW_HEADER_SIGNATURE_2 (0x5AA55AEA)
  917. #define MPI_FW_HEADER_PID_PROD_MASK (0x0F00)
  918. #define MPI_FW_HEADER_PID_PROD_INITIATOR_SCSI (0x0100)
  919. #define MPI_FW_HEADER_PID_PROD_TARGET_INITIATOR_SCSI (0x0200)
  920. #define MPI_FW_HEADER_PID_PROD_TARGET_SCSI (0x0300)
  921. #define MPI_FW_HEADER_PID_PROD_IM_SCSI (0x0400)
  922. #define MPI_FW_HEADER_PID_PROD_IS_SCSI (0x0500)
  923. #define MPI_FW_HEADER_PID_PROD_CTX_SCSI (0x0600)
  924. #define MPI_FW_HEADER_PID_PROD_IR_SCSI (0x0700)
  925. #define MPI_FW_HEADER_PID_FAMILY_MASK (0x00FF)
  926. /* SCSI */
  927. #define MPI_FW_HEADER_PID_FAMILY_1030A0_SCSI (0x0001)
  928. #define MPI_FW_HEADER_PID_FAMILY_1030B0_SCSI (0x0002)
  929. #define MPI_FW_HEADER_PID_FAMILY_1030B1_SCSI (0x0003)
  930. #define MPI_FW_HEADER_PID_FAMILY_1030C0_SCSI (0x0004)
  931. #define MPI_FW_HEADER_PID_FAMILY_1020A0_SCSI (0x0005)
  932. #define MPI_FW_HEADER_PID_FAMILY_1020B0_SCSI (0x0006)
  933. #define MPI_FW_HEADER_PID_FAMILY_1020B1_SCSI (0x0007)
  934. #define MPI_FW_HEADER_PID_FAMILY_1020C0_SCSI (0x0008)
  935. #define MPI_FW_HEADER_PID_FAMILY_1035A0_SCSI (0x0009)
  936. #define MPI_FW_HEADER_PID_FAMILY_1035B0_SCSI (0x000A)
  937. #define MPI_FW_HEADER_PID_FAMILY_1030TA0_SCSI (0x000B)
  938. #define MPI_FW_HEADER_PID_FAMILY_1020TA0_SCSI (0x000C)
  939. /* Fibre Channel */
  940. #define MPI_FW_HEADER_PID_FAMILY_909_FC (0x0000)
  941. #define MPI_FW_HEADER_PID_FAMILY_919_FC (0x0001) /* 919 and 929 */
  942. #define MPI_FW_HEADER_PID_FAMILY_919X_FC (0x0002) /* 919X and 929X */
  943. #define MPI_FW_HEADER_PID_FAMILY_919XL_FC (0x0003) /* 919XL and 929XL */
  944. #define MPI_FW_HEADER_PID_FAMILY_939X_FC (0x0004) /* 939X and 949X */
  945. #define MPI_FW_HEADER_PID_FAMILY_959_FC (0x0005)
  946. #define MPI_FW_HEADER_PID_FAMILY_949E_FC (0x0006)
  947. /* SAS */
  948. #define MPI_FW_HEADER_PID_FAMILY_1064_SAS (0x0001)
  949. #define MPI_FW_HEADER_PID_FAMILY_1068_SAS (0x0002)
  950. #define MPI_FW_HEADER_PID_FAMILY_1078_SAS (0x0003)
  951. #define MPI_FW_HEADER_PID_FAMILY_106xE_SAS (0x0004) /* 1068E, 1066E, and 1064E */
  952. typedef struct _MPI_EXT_IMAGE_HEADER
  953. {
  954. U8 ImageType; /* 00h */
  955. U8 Reserved; /* 01h */
  956. U16 Reserved1; /* 02h */
  957. U32 Checksum; /* 04h */
  958. U32 ImageSize; /* 08h */
  959. U32 NextImageHeaderOffset; /* 0Ch */
  960. U32 LoadStartAddress; /* 10h */
  961. U32 Reserved2; /* 14h */
  962. } MPI_EXT_IMAGE_HEADER, MPI_POINTER PTR_MPI_EXT_IMAGE_HEADER,
  963. MpiExtImageHeader_t, MPI_POINTER pMpiExtImageHeader_t;
  964. /* defines for the ImageType field */
  965. #define MPI_EXT_IMAGE_TYPE_UNSPECIFIED (0x00)
  966. #define MPI_EXT_IMAGE_TYPE_FW (0x01)
  967. #define MPI_EXT_IMAGE_TYPE_NVDATA (0x03)
  968. #define MPI_EXT_IMAGE_TYPE_BOOTLOADER (0x04)
  969. #define MPI_EXT_IMAGE_TYPE_INITIALIZATION (0x05)
  970. #endif