cx23885.h 16 KB

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  1. /*
  2. * Driver for the Conexant CX23885 PCIe bridge
  3. *
  4. * Copyright (c) 2006 Steven Toth <stoth@linuxtv.org>
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License as published by
  8. * the Free Software Foundation; either version 2 of the License, or
  9. * (at your option) any later version.
  10. *
  11. * This program is distributed in the hope that it will be useful,
  12. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  14. *
  15. * GNU General Public License for more details.
  16. *
  17. * You should have received a copy of the GNU General Public License
  18. * along with this program; if not, write to the Free Software
  19. * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  20. */
  21. #include <linux/pci.h>
  22. #include <linux/i2c.h>
  23. #include <linux/i2c-algo-bit.h>
  24. #include <linux/kdev_t.h>
  25. #include <media/v4l2-device.h>
  26. #include <media/tuner.h>
  27. #include <media/tveeprom.h>
  28. #include <media/videobuf-dma-sg.h>
  29. #include <media/videobuf-dvb.h>
  30. #include "btcx-risc.h"
  31. #include "cx23885-reg.h"
  32. #include "media/cx2341x.h"
  33. #include <linux/version.h>
  34. #include <linux/mutex.h>
  35. #define CX23885_VERSION_CODE KERNEL_VERSION(0, 0, 2)
  36. #define UNSET (-1U)
  37. #define CX23885_MAXBOARDS 8
  38. /* Max number of inputs by card */
  39. #define MAX_CX23885_INPUT 8
  40. #define INPUT(nr) (&cx23885_boards[dev->board].input[nr])
  41. #define RESOURCE_OVERLAY 1
  42. #define RESOURCE_VIDEO 2
  43. #define RESOURCE_VBI 4
  44. #define BUFFER_TIMEOUT (HZ) /* 0.5 seconds */
  45. #define CX23885_BOARD_NOAUTO UNSET
  46. #define CX23885_BOARD_UNKNOWN 0
  47. #define CX23885_BOARD_HAUPPAUGE_HVR1800lp 1
  48. #define CX23885_BOARD_HAUPPAUGE_HVR1800 2
  49. #define CX23885_BOARD_HAUPPAUGE_HVR1250 3
  50. #define CX23885_BOARD_DVICO_FUSIONHDTV_5_EXP 4
  51. #define CX23885_BOARD_HAUPPAUGE_HVR1500Q 5
  52. #define CX23885_BOARD_HAUPPAUGE_HVR1500 6
  53. #define CX23885_BOARD_HAUPPAUGE_HVR1200 7
  54. #define CX23885_BOARD_HAUPPAUGE_HVR1700 8
  55. #define CX23885_BOARD_HAUPPAUGE_HVR1400 9
  56. #define CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP 10
  57. #define CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP 11
  58. #define CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H 12
  59. #define CX23885_BOARD_COMPRO_VIDEOMATE_E650F 13
  60. #define CX23885_BOARD_TBS_6920 14
  61. #define CX23885_BOARD_TEVII_S470 15
  62. #define CX23885_BOARD_DVBWORLD_2005 16
  63. #define CX23885_BOARD_NETUP_DUAL_DVBS2_CI 17
  64. #define CX23885_BOARD_HAUPPAUGE_HVR1270 18
  65. #define GPIO_0 0x00000001
  66. #define GPIO_1 0x00000002
  67. #define GPIO_2 0x00000004
  68. #define GPIO_3 0x00000008
  69. #define GPIO_4 0x00000010
  70. #define GPIO_5 0x00000020
  71. #define GPIO_6 0x00000040
  72. #define GPIO_7 0x00000080
  73. #define GPIO_8 0x00000100
  74. #define GPIO_9 0x00000200
  75. /* Currently unsupported by the driver: PAL/H, NTSC/Kr, SECAM B/G/H/LC */
  76. #define CX23885_NORMS (\
  77. V4L2_STD_NTSC_M | V4L2_STD_NTSC_M_JP | V4L2_STD_NTSC_443 | \
  78. V4L2_STD_PAL_BG | V4L2_STD_PAL_DK | V4L2_STD_PAL_I | \
  79. V4L2_STD_PAL_M | V4L2_STD_PAL_N | V4L2_STD_PAL_Nc | \
  80. V4L2_STD_PAL_60 | V4L2_STD_SECAM_L | V4L2_STD_SECAM_DK)
  81. struct cx23885_fmt {
  82. char *name;
  83. u32 fourcc; /* v4l2 format id */
  84. int depth;
  85. int flags;
  86. u32 cxformat;
  87. };
  88. struct cx23885_ctrl {
  89. struct v4l2_queryctrl v;
  90. u32 off;
  91. u32 reg;
  92. u32 mask;
  93. u32 shift;
  94. };
  95. struct cx23885_tvnorm {
  96. char *name;
  97. v4l2_std_id id;
  98. u32 cxiformat;
  99. u32 cxoformat;
  100. };
  101. struct cx23885_fh {
  102. struct cx23885_dev *dev;
  103. enum v4l2_buf_type type;
  104. int radio;
  105. u32 resources;
  106. /* video overlay */
  107. struct v4l2_window win;
  108. struct v4l2_clip *clips;
  109. unsigned int nclips;
  110. /* video capture */
  111. struct cx23885_fmt *fmt;
  112. unsigned int width, height;
  113. /* vbi capture */
  114. struct videobuf_queue vidq;
  115. struct videobuf_queue vbiq;
  116. /* MPEG Encoder specifics ONLY */
  117. struct videobuf_queue mpegq;
  118. atomic_t v4l_reading;
  119. };
  120. enum cx23885_itype {
  121. CX23885_VMUX_COMPOSITE1 = 1,
  122. CX23885_VMUX_COMPOSITE2,
  123. CX23885_VMUX_COMPOSITE3,
  124. CX23885_VMUX_COMPOSITE4,
  125. CX23885_VMUX_SVIDEO,
  126. CX23885_VMUX_TELEVISION,
  127. CX23885_VMUX_CABLE,
  128. CX23885_VMUX_DVB,
  129. CX23885_VMUX_DEBUG,
  130. CX23885_RADIO,
  131. };
  132. enum cx23885_src_sel_type {
  133. CX23885_SRC_SEL_EXT_656_VIDEO = 0,
  134. CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO
  135. };
  136. /* buffer for one video frame */
  137. struct cx23885_buffer {
  138. /* common v4l buffer stuff -- must be first */
  139. struct videobuf_buffer vb;
  140. /* cx23885 specific */
  141. unsigned int bpl;
  142. struct btcx_riscmem risc;
  143. struct cx23885_fmt *fmt;
  144. u32 count;
  145. };
  146. struct cx23885_input {
  147. enum cx23885_itype type;
  148. unsigned int vmux;
  149. u32 gpio0, gpio1, gpio2, gpio3;
  150. };
  151. typedef enum {
  152. CX23885_MPEG_UNDEFINED = 0,
  153. CX23885_MPEG_DVB,
  154. CX23885_ANALOG_VIDEO,
  155. CX23885_MPEG_ENCODER,
  156. } port_t;
  157. struct cx23885_board {
  158. char *name;
  159. port_t porta, portb, portc;
  160. unsigned int tuner_type;
  161. unsigned int radio_type;
  162. unsigned char tuner_addr;
  163. unsigned char radio_addr;
  164. /* Vendors can and do run the PCIe bridge at different
  165. * clock rates, driven physically by crystals on the PCBs.
  166. * The core has to accomodate this. This allows the user
  167. * to add new boards with new frequencys. The value is
  168. * expressed in Hz.
  169. *
  170. * The core framework will default this value based on
  171. * current designs, but it can vary.
  172. */
  173. u32 clk_freq;
  174. struct cx23885_input input[MAX_CX23885_INPUT];
  175. int cimax; /* for NetUP */
  176. };
  177. struct cx23885_subid {
  178. u16 subvendor;
  179. u16 subdevice;
  180. u32 card;
  181. };
  182. struct cx23885_i2c {
  183. struct cx23885_dev *dev;
  184. int nr;
  185. /* i2c i/o */
  186. struct i2c_adapter i2c_adap;
  187. struct i2c_algo_bit_data i2c_algo;
  188. struct i2c_client i2c_client;
  189. u32 i2c_rc;
  190. /* 885 registers used for raw addess */
  191. u32 i2c_period;
  192. u32 reg_ctrl;
  193. u32 reg_stat;
  194. u32 reg_addr;
  195. u32 reg_rdata;
  196. u32 reg_wdata;
  197. };
  198. struct cx23885_dmaqueue {
  199. struct list_head active;
  200. struct list_head queued;
  201. struct timer_list timeout;
  202. struct btcx_riscmem stopper;
  203. u32 count;
  204. };
  205. struct cx23885_tsport {
  206. struct cx23885_dev *dev;
  207. int nr;
  208. int sram_chno;
  209. struct videobuf_dvb_frontends frontends;
  210. /* dma queues */
  211. struct cx23885_dmaqueue mpegq;
  212. u32 ts_packet_size;
  213. u32 ts_packet_count;
  214. int width;
  215. int height;
  216. spinlock_t slock;
  217. /* registers */
  218. u32 reg_gpcnt;
  219. u32 reg_gpcnt_ctl;
  220. u32 reg_dma_ctl;
  221. u32 reg_lngth;
  222. u32 reg_hw_sop_ctrl;
  223. u32 reg_gen_ctrl;
  224. u32 reg_bd_pkt_status;
  225. u32 reg_sop_status;
  226. u32 reg_fifo_ovfl_stat;
  227. u32 reg_vld_misc;
  228. u32 reg_ts_clk_en;
  229. u32 reg_ts_int_msk;
  230. u32 reg_ts_int_stat;
  231. u32 reg_src_sel;
  232. /* Default register vals */
  233. int pci_irqmask;
  234. u32 dma_ctl_val;
  235. u32 ts_int_msk_val;
  236. u32 gen_ctrl_val;
  237. u32 ts_clk_en_val;
  238. u32 src_sel_val;
  239. u32 vld_misc_val;
  240. u32 hw_sop_ctrl_val;
  241. /* Allow a single tsport to have multiple frontends */
  242. u32 num_frontends;
  243. void *port_priv;
  244. };
  245. struct cx23885_dev {
  246. struct list_head devlist;
  247. atomic_t refcount;
  248. struct v4l2_device v4l2_dev;
  249. /* pci stuff */
  250. struct pci_dev *pci;
  251. unsigned char pci_rev, pci_lat;
  252. int pci_bus, pci_slot;
  253. u32 __iomem *lmmio;
  254. u8 __iomem *bmmio;
  255. int pci_irqmask;
  256. int hwrevision;
  257. /* This valud is board specific and is used to configure the
  258. * AV core so we see nice clean and stable video and audio. */
  259. u32 clk_freq;
  260. /* I2C adapters: Master 1 & 2 (External) & Master 3 (Internal only) */
  261. struct cx23885_i2c i2c_bus[3];
  262. int nr;
  263. struct mutex lock;
  264. /* board details */
  265. unsigned int board;
  266. char name[32];
  267. struct cx23885_tsport ts1, ts2;
  268. /* sram configuration */
  269. struct sram_channel *sram_channels;
  270. enum {
  271. CX23885_BRIDGE_UNDEFINED = 0,
  272. CX23885_BRIDGE_885 = 885,
  273. CX23885_BRIDGE_887 = 887,
  274. } bridge;
  275. /* Analog video */
  276. u32 resources;
  277. unsigned int input;
  278. u32 tvaudio;
  279. v4l2_std_id tvnorm;
  280. unsigned int tuner_type;
  281. unsigned char tuner_addr;
  282. unsigned int radio_type;
  283. unsigned char radio_addr;
  284. unsigned int has_radio;
  285. struct v4l2_subdev *sd_cx25840;
  286. /* V4l */
  287. u32 freq;
  288. struct video_device *video_dev;
  289. struct video_device *vbi_dev;
  290. struct video_device *radio_dev;
  291. struct cx23885_dmaqueue vidq;
  292. struct cx23885_dmaqueue vbiq;
  293. spinlock_t slock;
  294. /* MPEG Encoder ONLY settings */
  295. u32 cx23417_mailbox;
  296. struct cx2341x_mpeg_params mpeg_params;
  297. struct video_device *v4l_device;
  298. atomic_t v4l_reader_count;
  299. struct cx23885_tvnorm encodernorm;
  300. };
  301. static inline struct cx23885_dev *to_cx23885(struct v4l2_device *v4l2_dev)
  302. {
  303. return container_of(v4l2_dev, struct cx23885_dev, v4l2_dev);
  304. }
  305. #define call_all(dev, o, f, args...) \
  306. v4l2_device_call_all(&dev->v4l2_dev, 0, o, f, ##args)
  307. extern struct list_head cx23885_devlist;
  308. #define SRAM_CH01 0 /* Video A */
  309. #define SRAM_CH02 1 /* VBI A */
  310. #define SRAM_CH03 2 /* Video B */
  311. #define SRAM_CH04 3 /* Transport via B */
  312. #define SRAM_CH05 4 /* VBI B */
  313. #define SRAM_CH06 5 /* Video C */
  314. #define SRAM_CH07 6 /* Transport via C */
  315. #define SRAM_CH08 7 /* Audio Internal A */
  316. #define SRAM_CH09 8 /* Audio Internal B */
  317. #define SRAM_CH10 9 /* Audio External */
  318. #define SRAM_CH11 10 /* COMB_3D_N */
  319. #define SRAM_CH12 11 /* Comb 3D N1 */
  320. #define SRAM_CH13 12 /* Comb 3D N2 */
  321. #define SRAM_CH14 13 /* MOE Vid */
  322. #define SRAM_CH15 14 /* MOE RSLT */
  323. struct sram_channel {
  324. char *name;
  325. u32 cmds_start;
  326. u32 ctrl_start;
  327. u32 cdt;
  328. u32 fifo_start;;
  329. u32 fifo_size;
  330. u32 ptr1_reg;
  331. u32 ptr2_reg;
  332. u32 cnt1_reg;
  333. u32 cnt2_reg;
  334. u32 jumponly;
  335. };
  336. /* ----------------------------------------------------------- */
  337. #define cx_read(reg) readl(dev->lmmio + ((reg)>>2))
  338. #define cx_write(reg, value) writel((value), dev->lmmio + ((reg)>>2))
  339. #define cx_andor(reg, mask, value) \
  340. writel((readl(dev->lmmio+((reg)>>2)) & ~(mask)) |\
  341. ((value) & (mask)), dev->lmmio+((reg)>>2))
  342. #define cx_set(reg, bit) cx_andor((reg), (bit), (bit))
  343. #define cx_clear(reg, bit) cx_andor((reg), (bit), 0)
  344. /* ----------------------------------------------------------- */
  345. /* cx23885-core.c */
  346. extern int cx23885_sram_channel_setup(struct cx23885_dev *dev,
  347. struct sram_channel *ch,
  348. unsigned int bpl, u32 risc);
  349. extern void cx23885_sram_channel_dump(struct cx23885_dev *dev,
  350. struct sram_channel *ch);
  351. extern int cx23885_risc_stopper(struct pci_dev *pci, struct btcx_riscmem *risc,
  352. u32 reg, u32 mask, u32 value);
  353. extern int cx23885_risc_buffer(struct pci_dev *pci, struct btcx_riscmem *risc,
  354. struct scatterlist *sglist,
  355. unsigned int top_offset, unsigned int bottom_offset,
  356. unsigned int bpl, unsigned int padding, unsigned int lines);
  357. void cx23885_cancel_buffers(struct cx23885_tsport *port);
  358. extern int cx23885_restart_queue(struct cx23885_tsport *port,
  359. struct cx23885_dmaqueue *q);
  360. extern void cx23885_wakeup(struct cx23885_tsport *port,
  361. struct cx23885_dmaqueue *q, u32 count);
  362. extern void cx23885_gpio_set(struct cx23885_dev *dev, u32 mask);
  363. extern void cx23885_gpio_clear(struct cx23885_dev *dev, u32 mask);
  364. extern void cx23885_gpio_enable(struct cx23885_dev *dev, u32 mask,
  365. int asoutput);
  366. /* ----------------------------------------------------------- */
  367. /* cx23885-cards.c */
  368. extern struct cx23885_board cx23885_boards[];
  369. extern const unsigned int cx23885_bcount;
  370. extern struct cx23885_subid cx23885_subids[];
  371. extern const unsigned int cx23885_idcount;
  372. extern int cx23885_tuner_callback(void *priv, int component,
  373. int command, int arg);
  374. extern void cx23885_card_list(struct cx23885_dev *dev);
  375. extern int cx23885_ir_init(struct cx23885_dev *dev);
  376. extern void cx23885_gpio_setup(struct cx23885_dev *dev);
  377. extern void cx23885_card_setup(struct cx23885_dev *dev);
  378. extern void cx23885_card_setup_pre_i2c(struct cx23885_dev *dev);
  379. extern int cx23885_dvb_register(struct cx23885_tsport *port);
  380. extern int cx23885_dvb_unregister(struct cx23885_tsport *port);
  381. extern int cx23885_buf_prepare(struct videobuf_queue *q,
  382. struct cx23885_tsport *port,
  383. struct cx23885_buffer *buf,
  384. enum v4l2_field field);
  385. extern void cx23885_buf_queue(struct cx23885_tsport *port,
  386. struct cx23885_buffer *buf);
  387. extern void cx23885_free_buffer(struct videobuf_queue *q,
  388. struct cx23885_buffer *buf);
  389. /* ----------------------------------------------------------- */
  390. /* cx23885-video.c */
  391. /* Video */
  392. extern int cx23885_video_register(struct cx23885_dev *dev);
  393. extern void cx23885_video_unregister(struct cx23885_dev *dev);
  394. extern int cx23885_video_irq(struct cx23885_dev *dev, u32 status);
  395. /* ----------------------------------------------------------- */
  396. /* cx23885-vbi.c */
  397. extern int cx23885_vbi_fmt(struct file *file, void *priv,
  398. struct v4l2_format *f);
  399. extern void cx23885_vbi_timeout(unsigned long data);
  400. extern struct videobuf_queue_ops cx23885_vbi_qops;
  401. /* cx23885-i2c.c */
  402. extern int cx23885_i2c_register(struct cx23885_i2c *bus);
  403. extern int cx23885_i2c_unregister(struct cx23885_i2c *bus);
  404. extern void cx23885_av_clk(struct cx23885_dev *dev, int enable);
  405. /* ----------------------------------------------------------- */
  406. /* cx23885-417.c */
  407. extern int cx23885_417_register(struct cx23885_dev *dev);
  408. extern void cx23885_417_unregister(struct cx23885_dev *dev);
  409. extern int cx23885_irq_417(struct cx23885_dev *dev, u32 status);
  410. extern void cx23885_417_check_encoder(struct cx23885_dev *dev);
  411. extern void cx23885_mc417_init(struct cx23885_dev *dev);
  412. extern int mc417_memory_read(struct cx23885_dev *dev, u32 address, u32 *value);
  413. extern int mc417_memory_write(struct cx23885_dev *dev, u32 address, u32 value);
  414. /* ----------------------------------------------------------- */
  415. /* tv norms */
  416. static inline unsigned int norm_maxw(v4l2_std_id norm)
  417. {
  418. return (norm & (V4L2_STD_MN & ~V4L2_STD_PAL_Nc)) ? 720 : 768;
  419. }
  420. static inline unsigned int norm_maxh(v4l2_std_id norm)
  421. {
  422. return (norm & V4L2_STD_625_50) ? 576 : 480;
  423. }
  424. static inline unsigned int norm_swidth(v4l2_std_id norm)
  425. {
  426. return (norm & (V4L2_STD_MN & ~V4L2_STD_PAL_Nc)) ? 754 : 922;
  427. }