stamp.c 40 KB

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  1. /*
  2. * File: arch/blackfin/mach-bf537/boards/stamp.c
  3. * Based on: arch/blackfin/mach-bf533/boards/ezkit.c
  4. * Author: Aidan Williams <aidan@nicta.com.au>
  5. *
  6. * Created:
  7. * Description:
  8. *
  9. * Modified:
  10. * Copyright 2005 National ICT Australia (NICTA)
  11. * Copyright 2004-2006 Analog Devices Inc.
  12. *
  13. * Bugs: Enter bugs at http://blackfin.uclinux.org/
  14. *
  15. * This program is free software; you can redistribute it and/or modify
  16. * it under the terms of the GNU General Public License as published by
  17. * the Free Software Foundation; either version 2 of the License, or
  18. * (at your option) any later version.
  19. *
  20. * This program is distributed in the hope that it will be useful,
  21. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  22. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  23. * GNU General Public License for more details.
  24. *
  25. * You should have received a copy of the GNU General Public License
  26. * along with this program; if not, see the file COPYING, or write
  27. * to the Free Software Foundation, Inc.,
  28. * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
  29. */
  30. #include <linux/device.h>
  31. #include <linux/kernel.h>
  32. #include <linux/platform_device.h>
  33. #include <linux/mtd/mtd.h>
  34. #include <linux/mtd/nand.h>
  35. #include <linux/mtd/partitions.h>
  36. #include <linux/mtd/plat-ram.h>
  37. #include <linux/mtd/physmap.h>
  38. #include <linux/spi/spi.h>
  39. #include <linux/spi/flash.h>
  40. #if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
  41. #include <linux/usb/isp1362.h>
  42. #endif
  43. #include <linux/ata_platform.h>
  44. #include <linux/irq.h>
  45. #include <linux/interrupt.h>
  46. #include <linux/i2c.h>
  47. #include <linux/usb/sl811.h>
  48. #include <linux/spi/mmc_spi.h>
  49. #include <asm/dma.h>
  50. #include <asm/bfin5xx_spi.h>
  51. #include <asm/reboot.h>
  52. #include <asm/portmux.h>
  53. #include <asm/dpmc.h>
  54. /*
  55. * Name the Board for the /proc/cpuinfo
  56. */
  57. const char bfin_board_name[] = "ADI BF537-STAMP";
  58. /*
  59. * Driver needs to know address, irq and flag pin.
  60. */
  61. #if defined(CONFIG_USB_ISP1760_HCD) || defined(CONFIG_USB_ISP1760_HCD_MODULE)
  62. #include <linux/usb/isp1760.h>
  63. static struct resource bfin_isp1760_resources[] = {
  64. [0] = {
  65. .start = 0x203C0000,
  66. .end = 0x203C0000 + 0x000fffff,
  67. .flags = IORESOURCE_MEM,
  68. },
  69. [1] = {
  70. .start = IRQ_PF7,
  71. .end = IRQ_PF7,
  72. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL,
  73. },
  74. };
  75. static struct isp1760_platform_data isp1760_priv = {
  76. .is_isp1761 = 0,
  77. .bus_width_16 = 1,
  78. .port1_otg = 0,
  79. .analog_oc = 0,
  80. .dack_polarity_high = 0,
  81. .dreq_polarity_high = 0,
  82. };
  83. static struct platform_device bfin_isp1760_device = {
  84. .name = "isp1760-hcd",
  85. .id = 0,
  86. .dev = {
  87. .platform_data = &isp1760_priv,
  88. },
  89. .num_resources = ARRAY_SIZE(bfin_isp1760_resources),
  90. .resource = bfin_isp1760_resources,
  91. };
  92. #endif
  93. #if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
  94. #include <linux/input.h>
  95. #include <linux/gpio_keys.h>
  96. static struct gpio_keys_button bfin_gpio_keys_table[] = {
  97. {BTN_0, GPIO_PF2, 1, "gpio-keys: BTN0"},
  98. {BTN_1, GPIO_PF3, 1, "gpio-keys: BTN1"},
  99. {BTN_2, GPIO_PF4, 1, "gpio-keys: BTN2"},
  100. {BTN_3, GPIO_PF5, 1, "gpio-keys: BTN3"},
  101. };
  102. static struct gpio_keys_platform_data bfin_gpio_keys_data = {
  103. .buttons = bfin_gpio_keys_table,
  104. .nbuttons = ARRAY_SIZE(bfin_gpio_keys_table),
  105. };
  106. static struct platform_device bfin_device_gpiokeys = {
  107. .name = "gpio-keys",
  108. .dev = {
  109. .platform_data = &bfin_gpio_keys_data,
  110. },
  111. };
  112. #endif
  113. static struct resource bfin_gpios_resources = {
  114. .start = 0,
  115. .end = MAX_BLACKFIN_GPIOS - 1,
  116. .flags = IORESOURCE_IRQ,
  117. };
  118. static struct platform_device bfin_gpios_device = {
  119. .name = "simple-gpio",
  120. .id = -1,
  121. .num_resources = 1,
  122. .resource = &bfin_gpios_resources,
  123. };
  124. #if defined(CONFIG_BFIN_CFPCMCIA) || defined(CONFIG_BFIN_CFPCMCIA_MODULE)
  125. static struct resource bfin_pcmcia_cf_resources[] = {
  126. {
  127. .start = 0x20310000, /* IO PORT */
  128. .end = 0x20312000,
  129. .flags = IORESOURCE_MEM,
  130. }, {
  131. .start = 0x20311000, /* Attribute Memory */
  132. .end = 0x20311FFF,
  133. .flags = IORESOURCE_MEM,
  134. }, {
  135. .start = IRQ_PF4,
  136. .end = IRQ_PF4,
  137. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL,
  138. }, {
  139. .start = 6, /* Card Detect PF6 */
  140. .end = 6,
  141. .flags = IORESOURCE_IRQ,
  142. },
  143. };
  144. static struct platform_device bfin_pcmcia_cf_device = {
  145. .name = "bfin_cf_pcmcia",
  146. .id = -1,
  147. .num_resources = ARRAY_SIZE(bfin_pcmcia_cf_resources),
  148. .resource = bfin_pcmcia_cf_resources,
  149. };
  150. #endif
  151. #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
  152. static struct platform_device rtc_device = {
  153. .name = "rtc-bfin",
  154. .id = -1,
  155. };
  156. #endif
  157. #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
  158. static struct resource smc91x_resources[] = {
  159. {
  160. .name = "smc91x-regs",
  161. .start = 0x20300300,
  162. .end = 0x20300300 + 16,
  163. .flags = IORESOURCE_MEM,
  164. }, {
  165. .start = IRQ_PF7,
  166. .end = IRQ_PF7,
  167. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  168. },
  169. };
  170. static struct platform_device smc91x_device = {
  171. .name = "smc91x",
  172. .id = 0,
  173. .num_resources = ARRAY_SIZE(smc91x_resources),
  174. .resource = smc91x_resources,
  175. };
  176. #endif
  177. #if defined(CONFIG_DM9000) || defined(CONFIG_DM9000_MODULE)
  178. static struct resource dm9000_resources[] = {
  179. [0] = {
  180. .start = 0x203FB800,
  181. .end = 0x203FB800 + 8,
  182. .flags = IORESOURCE_MEM,
  183. },
  184. [1] = {
  185. .start = IRQ_PF9,
  186. .end = IRQ_PF9,
  187. .flags = (IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE),
  188. },
  189. };
  190. static struct platform_device dm9000_device = {
  191. .name = "dm9000",
  192. .id = -1,
  193. .num_resources = ARRAY_SIZE(dm9000_resources),
  194. .resource = dm9000_resources,
  195. };
  196. #endif
  197. #if defined(CONFIG_AX88180) || defined(CONFIG_AX88180_MODULE)
  198. static struct resource ax88180_resources[] = {
  199. [0] = {
  200. .start = 0x20300000,
  201. .end = 0x20300000 + 0x8000,
  202. .flags = IORESOURCE_MEM,
  203. },
  204. [1] = {
  205. .start = IRQ_PF7,
  206. .end = IRQ_PF7,
  207. .flags = (IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL),
  208. },
  209. };
  210. static struct platform_device ax88180_device = {
  211. .name = "ax88180",
  212. .id = -1,
  213. .num_resources = ARRAY_SIZE(ax88180_resources),
  214. .resource = ax88180_resources,
  215. };
  216. #endif
  217. #if defined(CONFIG_USB_SL811_HCD) || defined(CONFIG_USB_SL811_HCD_MODULE)
  218. static struct resource sl811_hcd_resources[] = {
  219. {
  220. .start = 0x20340000,
  221. .end = 0x20340000,
  222. .flags = IORESOURCE_MEM,
  223. }, {
  224. .start = 0x20340004,
  225. .end = 0x20340004,
  226. .flags = IORESOURCE_MEM,
  227. }, {
  228. .start = CONFIG_USB_SL811_BFIN_IRQ,
  229. .end = CONFIG_USB_SL811_BFIN_IRQ,
  230. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  231. },
  232. };
  233. #if defined(CONFIG_USB_SL811_BFIN_USE_VBUS)
  234. void sl811_port_power(struct device *dev, int is_on)
  235. {
  236. gpio_request(CONFIG_USB_SL811_BFIN_GPIO_VBUS, "usb:SL811_VBUS");
  237. gpio_direction_output(CONFIG_USB_SL811_BFIN_GPIO_VBUS, is_on);
  238. }
  239. #endif
  240. static struct sl811_platform_data sl811_priv = {
  241. .potpg = 10,
  242. .power = 250, /* == 500mA */
  243. #if defined(CONFIG_USB_SL811_BFIN_USE_VBUS)
  244. .port_power = &sl811_port_power,
  245. #endif
  246. };
  247. static struct platform_device sl811_hcd_device = {
  248. .name = "sl811-hcd",
  249. .id = 0,
  250. .dev = {
  251. .platform_data = &sl811_priv,
  252. },
  253. .num_resources = ARRAY_SIZE(sl811_hcd_resources),
  254. .resource = sl811_hcd_resources,
  255. };
  256. #endif
  257. #if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
  258. static struct resource isp1362_hcd_resources[] = {
  259. {
  260. .start = 0x20360000,
  261. .end = 0x20360000,
  262. .flags = IORESOURCE_MEM,
  263. }, {
  264. .start = 0x20360004,
  265. .end = 0x20360004,
  266. .flags = IORESOURCE_MEM,
  267. }, {
  268. .start = CONFIG_USB_ISP1362_BFIN_GPIO_IRQ,
  269. .end = CONFIG_USB_ISP1362_BFIN_GPIO_IRQ,
  270. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  271. },
  272. };
  273. static struct isp1362_platform_data isp1362_priv = {
  274. .sel15Kres = 1,
  275. .clknotstop = 0,
  276. .oc_enable = 0,
  277. .int_act_high = 0,
  278. .int_edge_triggered = 0,
  279. .remote_wakeup_connected = 0,
  280. .no_power_switching = 1,
  281. .power_switching_mode = 0,
  282. };
  283. static struct platform_device isp1362_hcd_device = {
  284. .name = "isp1362-hcd",
  285. .id = 0,
  286. .dev = {
  287. .platform_data = &isp1362_priv,
  288. },
  289. .num_resources = ARRAY_SIZE(isp1362_hcd_resources),
  290. .resource = isp1362_hcd_resources,
  291. };
  292. #endif
  293. #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
  294. static struct platform_device bfin_mii_bus = {
  295. .name = "bfin_mii_bus",
  296. };
  297. static struct platform_device bfin_mac_device = {
  298. .name = "bfin_mac",
  299. .dev.platform_data = &bfin_mii_bus,
  300. };
  301. #endif
  302. #if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
  303. static struct resource net2272_bfin_resources[] = {
  304. {
  305. .start = 0x20300000,
  306. .end = 0x20300000 + 0x100,
  307. .flags = IORESOURCE_MEM,
  308. }, {
  309. .start = IRQ_PF7,
  310. .end = IRQ_PF7,
  311. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  312. },
  313. };
  314. static struct platform_device net2272_bfin_device = {
  315. .name = "net2272",
  316. .id = -1,
  317. .num_resources = ARRAY_SIZE(net2272_bfin_resources),
  318. .resource = net2272_bfin_resources,
  319. };
  320. #endif
  321. #if defined(CONFIG_MTD_NAND_PLATFORM) || defined(CONFIG_MTD_NAND_PLATFORM_MODULE)
  322. #ifdef CONFIG_MTD_PARTITIONS
  323. const char *part_probes[] = { "cmdlinepart", "RedBoot", NULL };
  324. static struct mtd_partition bfin_plat_nand_partitions[] = {
  325. {
  326. .name = "linux kernel(nand)",
  327. .size = 0x400000,
  328. .offset = 0,
  329. }, {
  330. .name = "file system(nand)",
  331. .size = MTDPART_SIZ_FULL,
  332. .offset = MTDPART_OFS_APPEND,
  333. },
  334. };
  335. #endif
  336. #define BFIN_NAND_PLAT_CLE 2
  337. #define BFIN_NAND_PLAT_ALE 1
  338. static void bfin_plat_nand_cmd_ctrl(struct mtd_info *mtd, int cmd, unsigned int ctrl)
  339. {
  340. struct nand_chip *this = mtd->priv;
  341. if (cmd == NAND_CMD_NONE)
  342. return;
  343. if (ctrl & NAND_CLE)
  344. writeb(cmd, this->IO_ADDR_W + (1 << BFIN_NAND_PLAT_CLE));
  345. else
  346. writeb(cmd, this->IO_ADDR_W + (1 << BFIN_NAND_PLAT_ALE));
  347. }
  348. #define BFIN_NAND_PLAT_READY GPIO_PF3
  349. static int bfin_plat_nand_dev_ready(struct mtd_info *mtd)
  350. {
  351. return gpio_get_value(BFIN_NAND_PLAT_READY);
  352. }
  353. static struct platform_nand_data bfin_plat_nand_data = {
  354. .chip = {
  355. .chip_delay = 30,
  356. #ifdef CONFIG_MTD_PARTITIONS
  357. .part_probe_types = part_probes,
  358. .partitions = bfin_plat_nand_partitions,
  359. .nr_partitions = ARRAY_SIZE(bfin_plat_nand_partitions),
  360. #endif
  361. },
  362. .ctrl = {
  363. .cmd_ctrl = bfin_plat_nand_cmd_ctrl,
  364. .dev_ready = bfin_plat_nand_dev_ready,
  365. },
  366. };
  367. #define MAX(x, y) (x > y ? x : y)
  368. static struct resource bfin_plat_nand_resources = {
  369. .start = 0x20212000,
  370. .end = 0x20212000 + (1 << MAX(BFIN_NAND_PLAT_CLE, BFIN_NAND_PLAT_ALE)),
  371. .flags = IORESOURCE_IO,
  372. };
  373. static struct platform_device bfin_async_nand_device = {
  374. .name = "gen_nand",
  375. .id = -1,
  376. .num_resources = 1,
  377. .resource = &bfin_plat_nand_resources,
  378. .dev = {
  379. .platform_data = &bfin_plat_nand_data,
  380. },
  381. };
  382. static void bfin_plat_nand_init(void)
  383. {
  384. gpio_request(BFIN_NAND_PLAT_READY, "bfin_nand_plat");
  385. }
  386. #else
  387. static void bfin_plat_nand_init(void) {}
  388. #endif
  389. #if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
  390. static struct mtd_partition stamp_partitions[] = {
  391. {
  392. .name = "bootloader(nor)",
  393. .size = 0x40000,
  394. .offset = 0,
  395. }, {
  396. .name = "linux kernel(nor)",
  397. .size = 0x180000,
  398. .offset = MTDPART_OFS_APPEND,
  399. }, {
  400. .name = "file system(nor)",
  401. .size = 0x400000 - 0x40000 - 0x180000 - 0x10000,
  402. .offset = MTDPART_OFS_APPEND,
  403. }, {
  404. .name = "MAC Address(nor)",
  405. .size = MTDPART_SIZ_FULL,
  406. .offset = 0x3F0000,
  407. .mask_flags = MTD_WRITEABLE,
  408. }
  409. };
  410. static struct physmap_flash_data stamp_flash_data = {
  411. .width = 2,
  412. .parts = stamp_partitions,
  413. .nr_parts = ARRAY_SIZE(stamp_partitions),
  414. };
  415. static struct resource stamp_flash_resource = {
  416. .start = 0x20000000,
  417. .end = 0x203fffff,
  418. .flags = IORESOURCE_MEM,
  419. };
  420. static struct platform_device stamp_flash_device = {
  421. .name = "physmap-flash",
  422. .id = 0,
  423. .dev = {
  424. .platform_data = &stamp_flash_data,
  425. },
  426. .num_resources = 1,
  427. .resource = &stamp_flash_resource,
  428. };
  429. #endif
  430. #if defined(CONFIG_MTD_M25P80) \
  431. || defined(CONFIG_MTD_M25P80_MODULE)
  432. static struct mtd_partition bfin_spi_flash_partitions[] = {
  433. {
  434. .name = "bootloader(spi)",
  435. .size = 0x00040000,
  436. .offset = 0,
  437. .mask_flags = MTD_CAP_ROM
  438. }, {
  439. .name = "linux kernel(spi)",
  440. .size = 0x180000,
  441. .offset = MTDPART_OFS_APPEND,
  442. }, {
  443. .name = "file system(spi)",
  444. .size = MTDPART_SIZ_FULL,
  445. .offset = MTDPART_OFS_APPEND,
  446. }
  447. };
  448. static struct flash_platform_data bfin_spi_flash_data = {
  449. .name = "m25p80",
  450. .parts = bfin_spi_flash_partitions,
  451. .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
  452. /* .type = "m25p64", */
  453. };
  454. /* SPI flash chip (m25p64) */
  455. static struct bfin5xx_spi_chip spi_flash_chip_info = {
  456. .enable_dma = 0, /* use dma transfer with this chip*/
  457. .bits_per_word = 8,
  458. };
  459. #endif
  460. #if defined(CONFIG_BFIN_SPI_ADC) \
  461. || defined(CONFIG_BFIN_SPI_ADC_MODULE)
  462. /* SPI ADC chip */
  463. static struct bfin5xx_spi_chip spi_adc_chip_info = {
  464. .enable_dma = 1, /* use dma transfer with this chip*/
  465. .bits_per_word = 16,
  466. };
  467. #endif
  468. #if defined(CONFIG_SND_BLACKFIN_AD1836) \
  469. || defined(CONFIG_SND_BLACKFIN_AD1836_MODULE)
  470. static struct bfin5xx_spi_chip ad1836_spi_chip_info = {
  471. .enable_dma = 0,
  472. .bits_per_word = 16,
  473. };
  474. #endif
  475. #if defined(CONFIG_SND_BF5XX_SOC_AD1938) \
  476. || defined(CONFIG_SND_BF5XX_SOC_AD1938_MODULE)
  477. static struct bfin5xx_spi_chip ad1938_spi_chip_info = {
  478. .enable_dma = 0,
  479. .bits_per_word = 8,
  480. .cs_gpio = GPIO_PF5,
  481. };
  482. #endif
  483. #if defined(CONFIG_AD9960) || defined(CONFIG_AD9960_MODULE)
  484. static struct bfin5xx_spi_chip ad9960_spi_chip_info = {
  485. .enable_dma = 0,
  486. .bits_per_word = 16,
  487. };
  488. #endif
  489. #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
  490. #define MMC_SPI_CARD_DETECT_INT IRQ_PF5
  491. static int bfin_mmc_spi_init(struct device *dev,
  492. irqreturn_t (*detect_int)(int, void *), void *data)
  493. {
  494. return request_irq(MMC_SPI_CARD_DETECT_INT, detect_int,
  495. IRQF_TRIGGER_FALLING, "mmc-spi-detect", data);
  496. }
  497. static void bfin_mmc_spi_exit(struct device *dev, void *data)
  498. {
  499. free_irq(MMC_SPI_CARD_DETECT_INT, data);
  500. }
  501. static struct mmc_spi_platform_data bfin_mmc_spi_pdata = {
  502. .init = bfin_mmc_spi_init,
  503. .exit = bfin_mmc_spi_exit,
  504. .detect_delay = 100, /* msecs */
  505. };
  506. static struct bfin5xx_spi_chip mmc_spi_chip_info = {
  507. .enable_dma = 0,
  508. .bits_per_word = 8,
  509. .pio_interrupt = 0,
  510. };
  511. #endif
  512. #if defined(CONFIG_PBX)
  513. static struct bfin5xx_spi_chip spi_si3xxx_chip_info = {
  514. .ctl_reg = 0x4, /* send zero */
  515. .enable_dma = 0,
  516. .bits_per_word = 8,
  517. .cs_change_per_word = 1,
  518. };
  519. #endif
  520. #if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
  521. #include <linux/spi/ad7877.h>
  522. static struct bfin5xx_spi_chip spi_ad7877_chip_info = {
  523. .enable_dma = 0,
  524. .bits_per_word = 16,
  525. };
  526. static const struct ad7877_platform_data bfin_ad7877_ts_info = {
  527. .model = 7877,
  528. .vref_delay_usecs = 50, /* internal, no capacitor */
  529. .x_plate_ohms = 419,
  530. .y_plate_ohms = 486,
  531. .pressure_max = 1000,
  532. .pressure_min = 0,
  533. .stopacq_polarity = 1,
  534. .first_conversion_delay = 3,
  535. .acquisition_time = 1,
  536. .averaging = 1,
  537. .pen_down_acc_interval = 1,
  538. };
  539. #endif
  540. #if defined(CONFIG_TOUCHSCREEN_AD7879) || defined(CONFIG_TOUCHSCREEN_AD7879_MODULE)
  541. #include <linux/spi/ad7879.h>
  542. static const struct ad7879_platform_data bfin_ad7879_ts_info = {
  543. .model = 7879, /* Model = AD7879 */
  544. .x_plate_ohms = 620, /* 620 Ohm from the touch datasheet */
  545. .pressure_max = 10000,
  546. .pressure_min = 0,
  547. .first_conversion_delay = 3, /* wait 512us before do a first conversion */
  548. .acquisition_time = 1, /* 4us acquisition time per sample */
  549. .median = 2, /* do 8 measurements */
  550. .averaging = 1, /* take the average of 4 middle samples */
  551. .pen_down_acc_interval = 255, /* 9.4 ms */
  552. .gpio_output = 1, /* configure AUX/VBAT/GPIO as GPIO output */
  553. .gpio_default = 1, /* During initialization set GPIO = HIGH */
  554. };
  555. #endif
  556. #if defined(CONFIG_INPUT_ADXL34X) || defined(CONFIG_INPUT_ADXL34X_MODULE)
  557. #include <linux/input.h>
  558. #include <linux/spi/adxl34x.h>
  559. static const struct adxl34x_platform_data adxl34x_info = {
  560. .x_axis_offset = 0,
  561. .y_axis_offset = 0,
  562. .z_axis_offset = 0,
  563. .tap_threshold = 0x31,
  564. .tap_duration = 0x10,
  565. .tap_latency = 0x60,
  566. .tap_window = 0xF0,
  567. .tap_axis_control = ADXL_TAP_X_EN | ADXL_TAP_Y_EN | ADXL_TAP_Z_EN,
  568. .act_axis_control = 0xFF,
  569. .activity_threshold = 5,
  570. .inactivity_threshold = 3,
  571. .inactivity_time = 4,
  572. .free_fall_threshold = 0x7,
  573. .free_fall_time = 0x20,
  574. .data_rate = 0x8,
  575. .data_range = ADXL_FULL_RES,
  576. .ev_type = EV_ABS,
  577. .ev_code_x = ABS_X, /* EV_REL */
  578. .ev_code_y = ABS_Y, /* EV_REL */
  579. .ev_code_z = ABS_Z, /* EV_REL */
  580. .ev_code_tap_x = BTN_TOUCH, /* EV_KEY */
  581. .ev_code_tap_y = BTN_TOUCH, /* EV_KEY */
  582. .ev_code_tap_z = BTN_TOUCH, /* EV_KEY */
  583. /* .ev_code_ff = KEY_F,*/ /* EV_KEY */
  584. /* .ev_code_act_inactivity = KEY_A,*/ /* EV_KEY */
  585. .power_mode = ADXL_AUTO_SLEEP | ADXL_LINK,
  586. .fifo_mode = ADXL_FIFO_STREAM,
  587. };
  588. #endif
  589. #if defined(CONFIG_TOUCHSCREEN_AD7879_SPI) || defined(CONFIG_TOUCHSCREEN_AD7879_SPI_MODULE)
  590. static struct bfin5xx_spi_chip spi_ad7879_chip_info = {
  591. .enable_dma = 0,
  592. .bits_per_word = 16,
  593. };
  594. #endif
  595. #if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
  596. static struct bfin5xx_spi_chip spidev_chip_info = {
  597. .enable_dma = 0,
  598. .bits_per_word = 8,
  599. };
  600. #endif
  601. #if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
  602. static struct bfin5xx_spi_chip lq035q1_spi_chip_info = {
  603. .enable_dma = 0,
  604. .bits_per_word = 8,
  605. };
  606. #endif
  607. #if defined(CONFIG_ENC28J60) || defined(CONFIG_ENC28J60_MODULE)
  608. static struct bfin5xx_spi_chip enc28j60_spi_chip_info = {
  609. .enable_dma = 1,
  610. .bits_per_word = 8,
  611. .cs_gpio = GPIO_PF10,
  612. };
  613. #endif
  614. #if defined(CONFIG_MTD_DATAFLASH) \
  615. || defined(CONFIG_MTD_DATAFLASH_MODULE)
  616. static struct mtd_partition bfin_spi_dataflash_partitions[] = {
  617. {
  618. .name = "bootloader(spi)",
  619. .size = 0x00040000,
  620. .offset = 0,
  621. .mask_flags = MTD_CAP_ROM
  622. }, {
  623. .name = "linux kernel(spi)",
  624. .size = 0x180000,
  625. .offset = MTDPART_OFS_APPEND,
  626. }, {
  627. .name = "file system(spi)",
  628. .size = MTDPART_SIZ_FULL,
  629. .offset = MTDPART_OFS_APPEND,
  630. }
  631. };
  632. static struct flash_platform_data bfin_spi_dataflash_data = {
  633. .name = "SPI Dataflash",
  634. .parts = bfin_spi_dataflash_partitions,
  635. .nr_parts = ARRAY_SIZE(bfin_spi_dataflash_partitions),
  636. };
  637. /* DataFlash chip */
  638. static struct bfin5xx_spi_chip data_flash_chip_info = {
  639. .enable_dma = 0, /* use dma transfer with this chip*/
  640. .bits_per_word = 8,
  641. };
  642. #endif
  643. static struct spi_board_info bfin_spi_board_info[] __initdata = {
  644. #if defined(CONFIG_MTD_M25P80) \
  645. || defined(CONFIG_MTD_M25P80_MODULE)
  646. {
  647. /* the modalias must be the same as spi device driver name */
  648. .modalias = "m25p80", /* Name of spi_driver for this device */
  649. .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
  650. .bus_num = 0, /* Framework bus number */
  651. .chip_select = 1, /* Framework chip select. On STAMP537 it is SPISSEL1*/
  652. .platform_data = &bfin_spi_flash_data,
  653. .controller_data = &spi_flash_chip_info,
  654. .mode = SPI_MODE_3,
  655. },
  656. #endif
  657. #if defined(CONFIG_MTD_DATAFLASH) \
  658. || defined(CONFIG_MTD_DATAFLASH_MODULE)
  659. { /* DataFlash chip */
  660. .modalias = "mtd_dataflash",
  661. .max_speed_hz = 33250000, /* max spi clock (SCK) speed in HZ */
  662. .bus_num = 0, /* Framework bus number */
  663. .chip_select = 1, /* Framework chip select. On STAMP537 it is SPISSEL1*/
  664. .platform_data = &bfin_spi_dataflash_data,
  665. .controller_data = &data_flash_chip_info,
  666. .mode = SPI_MODE_3,
  667. },
  668. #endif
  669. #if defined(CONFIG_BFIN_SPI_ADC) \
  670. || defined(CONFIG_BFIN_SPI_ADC_MODULE)
  671. {
  672. .modalias = "bfin_spi_adc", /* Name of spi_driver for this device */
  673. .max_speed_hz = 6250000, /* max spi clock (SCK) speed in HZ */
  674. .bus_num = 0, /* Framework bus number */
  675. .chip_select = 1, /* Framework chip select. */
  676. .platform_data = NULL, /* No spi_driver specific config */
  677. .controller_data = &spi_adc_chip_info,
  678. },
  679. #endif
  680. #if defined(CONFIG_SND_BLACKFIN_AD1836) \
  681. || defined(CONFIG_SND_BLACKFIN_AD1836_MODULE)
  682. {
  683. .modalias = "ad1836-spi",
  684. .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
  685. .bus_num = 0,
  686. .chip_select = CONFIG_SND_BLACKFIN_SPI_PFBIT,
  687. .controller_data = &ad1836_spi_chip_info,
  688. },
  689. #endif
  690. #if defined(CONFIG_SND_BF5XX_SOC_AD1938) || defined(CONFIG_SND_BF5XX_SOC_AD1938_MODULE)
  691. {
  692. .modalias = "ad1938-spi",
  693. .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
  694. .bus_num = 0,
  695. .chip_select = 0,/* CONFIG_SND_BLACKFIN_SPI_PFBIT */
  696. .controller_data = &ad1938_spi_chip_info,
  697. .mode = SPI_MODE_3,
  698. },
  699. #endif
  700. #if defined(CONFIG_AD9960) || defined(CONFIG_AD9960_MODULE)
  701. {
  702. .modalias = "ad9960-spi",
  703. .max_speed_hz = 10000000, /* max spi clock (SCK) speed in HZ */
  704. .bus_num = 0,
  705. .chip_select = 1,
  706. .controller_data = &ad9960_spi_chip_info,
  707. },
  708. #endif
  709. #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
  710. {
  711. .modalias = "mmc_spi",
  712. .max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */
  713. .bus_num = 0,
  714. .chip_select = 4,
  715. .platform_data = &bfin_mmc_spi_pdata,
  716. .controller_data = &mmc_spi_chip_info,
  717. .mode = SPI_MODE_3,
  718. },
  719. #endif
  720. #if defined(CONFIG_PBX)
  721. {
  722. .modalias = "fxs-spi",
  723. .max_speed_hz = 12500000, /* max spi clock (SCK) speed in HZ */
  724. .bus_num = 0,
  725. .chip_select = 8 - CONFIG_J11_JUMPER,
  726. .controller_data = &spi_si3xxx_chip_info,
  727. .mode = SPI_MODE_3,
  728. },
  729. {
  730. .modalias = "fxo-spi",
  731. .max_speed_hz = 12500000, /* max spi clock (SCK) speed in HZ */
  732. .bus_num = 0,
  733. .chip_select = 8 - CONFIG_J19_JUMPER,
  734. .controller_data = &spi_si3xxx_chip_info,
  735. .mode = SPI_MODE_3,
  736. },
  737. #endif
  738. #if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
  739. {
  740. .modalias = "ad7877",
  741. .platform_data = &bfin_ad7877_ts_info,
  742. .irq = IRQ_PF6,
  743. .max_speed_hz = 12500000, /* max spi clock (SCK) speed in HZ */
  744. .bus_num = 0,
  745. .chip_select = 1,
  746. .controller_data = &spi_ad7877_chip_info,
  747. },
  748. #endif
  749. #if defined(CONFIG_TOUCHSCREEN_AD7879_SPI) || defined(CONFIG_TOUCHSCREEN_AD7879_SPI_MODULE)
  750. {
  751. .modalias = "ad7879",
  752. .platform_data = &bfin_ad7879_ts_info,
  753. .irq = IRQ_PF7,
  754. .max_speed_hz = 5000000, /* max spi clock (SCK) speed in HZ */
  755. .bus_num = 0,
  756. .chip_select = 1,
  757. .controller_data = &spi_ad7879_chip_info,
  758. .mode = SPI_CPHA | SPI_CPOL,
  759. },
  760. #endif
  761. #if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
  762. {
  763. .modalias = "spidev",
  764. .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
  765. .bus_num = 0,
  766. .chip_select = 1,
  767. .controller_data = &spidev_chip_info,
  768. },
  769. #endif
  770. #if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
  771. {
  772. .modalias = "bfin-lq035q1-spi",
  773. .max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */
  774. .bus_num = 0,
  775. .chip_select = 2,
  776. .controller_data = &lq035q1_spi_chip_info,
  777. .mode = SPI_CPHA | SPI_CPOL,
  778. },
  779. #endif
  780. #if defined(CONFIG_ENC28J60) || defined(CONFIG_ENC28J60_MODULE)
  781. {
  782. .modalias = "enc28j60",
  783. .max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */
  784. .irq = IRQ_PF6,
  785. .bus_num = 0,
  786. .chip_select = 0, /* GPIO controlled SSEL */
  787. .controller_data = &enc28j60_spi_chip_info,
  788. .mode = SPI_MODE_0,
  789. },
  790. #endif
  791. };
  792. #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
  793. /* SPI controller data */
  794. static struct bfin5xx_spi_master bfin_spi0_info = {
  795. .num_chipselect = 8,
  796. .enable_dma = 1, /* master has the ability to do dma transfer */
  797. .pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
  798. };
  799. /* SPI (0) */
  800. static struct resource bfin_spi0_resource[] = {
  801. [0] = {
  802. .start = SPI0_REGBASE,
  803. .end = SPI0_REGBASE + 0xFF,
  804. .flags = IORESOURCE_MEM,
  805. },
  806. [1] = {
  807. .start = CH_SPI,
  808. .end = CH_SPI,
  809. .flags = IORESOURCE_DMA,
  810. },
  811. [2] = {
  812. .start = IRQ_SPI,
  813. .end = IRQ_SPI,
  814. .flags = IORESOURCE_IRQ,
  815. },
  816. };
  817. static struct platform_device bfin_spi0_device = {
  818. .name = "bfin-spi",
  819. .id = 0, /* Bus number */
  820. .num_resources = ARRAY_SIZE(bfin_spi0_resource),
  821. .resource = bfin_spi0_resource,
  822. .dev = {
  823. .platform_data = &bfin_spi0_info, /* Passed to driver */
  824. },
  825. };
  826. #endif /* spi master and devices */
  827. #if defined(CONFIG_SPI_BFIN_SPORT) || defined(CONFIG_SPI_BFIN_SPORT_MODULE)
  828. /* SPORT SPI controller data */
  829. static struct bfin5xx_spi_master bfin_sport_spi0_info = {
  830. .num_chipselect = 1, /* master only supports one device */
  831. .enable_dma = 0, /* master don't support DMA */
  832. .pin_req = {P_SPORT0_DTPRI, P_SPORT0_TSCLK, P_SPORT0_DRPRI,
  833. P_SPORT0_RSCLK, P_SPORT0_TFS, P_SPORT0_RFS, 0},
  834. };
  835. static struct resource bfin_sport_spi0_resource[] = {
  836. [0] = {
  837. .start = SPORT0_TCR1,
  838. .end = SPORT0_TCR1 + 0xFF,
  839. .flags = IORESOURCE_MEM,
  840. },
  841. [1] = {
  842. .start = IRQ_SPORT0_ERROR,
  843. .end = IRQ_SPORT0_ERROR,
  844. .flags = IORESOURCE_IRQ,
  845. },
  846. };
  847. static struct platform_device bfin_sport_spi0_device = {
  848. .name = "bfin-sport-spi",
  849. .id = 1, /* Bus number */
  850. .num_resources = ARRAY_SIZE(bfin_sport_spi0_resource),
  851. .resource = bfin_sport_spi0_resource,
  852. .dev = {
  853. .platform_data = &bfin_sport_spi0_info, /* Passed to driver */
  854. },
  855. };
  856. static struct bfin5xx_spi_master bfin_sport_spi1_info = {
  857. .num_chipselect = 1, /* master only supports one device */
  858. .enable_dma = 0, /* master don't support DMA */
  859. .pin_req = {P_SPORT1_DTPRI, P_SPORT1_TSCLK, P_SPORT1_DRPRI,
  860. P_SPORT1_RSCLK, P_SPORT1_TFS, P_SPORT1_RFS, 0},
  861. };
  862. static struct resource bfin_sport_spi1_resource[] = {
  863. [0] = {
  864. .start = SPORT1_TCR1,
  865. .end = SPORT1_TCR1 + 0xFF,
  866. .flags = IORESOURCE_MEM,
  867. },
  868. [1] = {
  869. .start = IRQ_SPORT1_ERROR,
  870. .end = IRQ_SPORT1_ERROR,
  871. .flags = IORESOURCE_IRQ,
  872. },
  873. };
  874. static struct platform_device bfin_sport_spi1_device = {
  875. .name = "bfin-sport-spi",
  876. .id = 2, /* Bus number */
  877. .num_resources = ARRAY_SIZE(bfin_sport_spi1_resource),
  878. .resource = bfin_sport_spi1_resource,
  879. .dev = {
  880. .platform_data = &bfin_sport_spi1_info, /* Passed to driver */
  881. },
  882. };
  883. #endif /* sport spi master and devices */
  884. #if defined(CONFIG_FB_BF537_LQ035) || defined(CONFIG_FB_BF537_LQ035_MODULE)
  885. static struct platform_device bfin_fb_device = {
  886. .name = "bf537-lq035",
  887. };
  888. #endif
  889. #if defined(CONFIG_FB_BFIN_7393) || defined(CONFIG_FB_BFIN_7393_MODULE)
  890. static struct platform_device bfin_fb_adv7393_device = {
  891. .name = "bfin-adv7393",
  892. };
  893. #endif
  894. #if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
  895. #include <asm/bfin-lq035q1.h>
  896. static struct bfin_lq035q1fb_disp_info bfin_lq035q1_data = {
  897. .mode = LQ035_NORM | LQ035_RGB | LQ035_RL | LQ035_TB,
  898. .use_bl = 0, /* let something else control the LCD Blacklight */
  899. .gpio_bl = GPIO_PF7,
  900. };
  901. static struct resource bfin_lq035q1_resources[] = {
  902. {
  903. .start = IRQ_PPI_ERROR,
  904. .end = IRQ_PPI_ERROR,
  905. .flags = IORESOURCE_IRQ,
  906. },
  907. };
  908. static struct platform_device bfin_lq035q1_device = {
  909. .name = "bfin-lq035q1",
  910. .id = -1,
  911. .num_resources = ARRAY_SIZE(bfin_lq035q1_resources),
  912. .resource = bfin_lq035q1_resources,
  913. .dev = {
  914. .platform_data = &bfin_lq035q1_data,
  915. },
  916. };
  917. #endif
  918. #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
  919. static struct resource bfin_uart_resources[] = {
  920. #ifdef CONFIG_SERIAL_BFIN_UART0
  921. {
  922. .start = 0xFFC00400,
  923. .end = 0xFFC004FF,
  924. .flags = IORESOURCE_MEM,
  925. },
  926. #endif
  927. #ifdef CONFIG_SERIAL_BFIN_UART1
  928. {
  929. .start = 0xFFC02000,
  930. .end = 0xFFC020FF,
  931. .flags = IORESOURCE_MEM,
  932. },
  933. #endif
  934. };
  935. static struct platform_device bfin_uart_device = {
  936. .name = "bfin-uart",
  937. .id = 1,
  938. .num_resources = ARRAY_SIZE(bfin_uart_resources),
  939. .resource = bfin_uart_resources,
  940. };
  941. #endif
  942. #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
  943. #ifdef CONFIG_BFIN_SIR0
  944. static struct resource bfin_sir0_resources[] = {
  945. {
  946. .start = 0xFFC00400,
  947. .end = 0xFFC004FF,
  948. .flags = IORESOURCE_MEM,
  949. },
  950. {
  951. .start = IRQ_UART0_RX,
  952. .end = IRQ_UART0_RX+1,
  953. .flags = IORESOURCE_IRQ,
  954. },
  955. {
  956. .start = CH_UART0_RX,
  957. .end = CH_UART0_RX+1,
  958. .flags = IORESOURCE_DMA,
  959. },
  960. };
  961. static struct platform_device bfin_sir0_device = {
  962. .name = "bfin_sir",
  963. .id = 0,
  964. .num_resources = ARRAY_SIZE(bfin_sir0_resources),
  965. .resource = bfin_sir0_resources,
  966. };
  967. #endif
  968. #ifdef CONFIG_BFIN_SIR1
  969. static struct resource bfin_sir1_resources[] = {
  970. {
  971. .start = 0xFFC02000,
  972. .end = 0xFFC020FF,
  973. .flags = IORESOURCE_MEM,
  974. },
  975. {
  976. .start = IRQ_UART1_RX,
  977. .end = IRQ_UART1_RX+1,
  978. .flags = IORESOURCE_IRQ,
  979. },
  980. {
  981. .start = CH_UART1_RX,
  982. .end = CH_UART1_RX+1,
  983. .flags = IORESOURCE_DMA,
  984. },
  985. };
  986. static struct platform_device bfin_sir1_device = {
  987. .name = "bfin_sir",
  988. .id = 1,
  989. .num_resources = ARRAY_SIZE(bfin_sir1_resources),
  990. .resource = bfin_sir1_resources,
  991. };
  992. #endif
  993. #endif
  994. #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
  995. static struct resource bfin_twi0_resource[] = {
  996. [0] = {
  997. .start = TWI0_REGBASE,
  998. .end = TWI0_REGBASE,
  999. .flags = IORESOURCE_MEM,
  1000. },
  1001. [1] = {
  1002. .start = IRQ_TWI,
  1003. .end = IRQ_TWI,
  1004. .flags = IORESOURCE_IRQ,
  1005. },
  1006. };
  1007. static struct platform_device i2c_bfin_twi_device = {
  1008. .name = "i2c-bfin-twi",
  1009. .id = 0,
  1010. .num_resources = ARRAY_SIZE(bfin_twi0_resource),
  1011. .resource = bfin_twi0_resource,
  1012. };
  1013. #endif
  1014. #if defined(CONFIG_KEYBOARD_ADP5588) || defined(CONFIG_KEYBOARD_ADP5588_MODULE)
  1015. #include <linux/input.h>
  1016. #include <linux/i2c/adp5588.h>
  1017. static const unsigned short adp5588_keymap[ADP5588_KEYMAPSIZE] = {
  1018. [0] = KEY_GRAVE,
  1019. [1] = KEY_1,
  1020. [2] = KEY_2,
  1021. [3] = KEY_3,
  1022. [4] = KEY_4,
  1023. [5] = KEY_5,
  1024. [6] = KEY_6,
  1025. [7] = KEY_7,
  1026. [8] = KEY_8,
  1027. [9] = KEY_9,
  1028. [10] = KEY_0,
  1029. [11] = KEY_MINUS,
  1030. [12] = KEY_EQUAL,
  1031. [13] = KEY_BACKSLASH,
  1032. [15] = KEY_KP0,
  1033. [16] = KEY_Q,
  1034. [17] = KEY_W,
  1035. [18] = KEY_E,
  1036. [19] = KEY_R,
  1037. [20] = KEY_T,
  1038. [21] = KEY_Y,
  1039. [22] = KEY_U,
  1040. [23] = KEY_I,
  1041. [24] = KEY_O,
  1042. [25] = KEY_P,
  1043. [26] = KEY_LEFTBRACE,
  1044. [27] = KEY_RIGHTBRACE,
  1045. [29] = KEY_KP1,
  1046. [30] = KEY_KP2,
  1047. [31] = KEY_KP3,
  1048. [32] = KEY_A,
  1049. [33] = KEY_S,
  1050. [34] = KEY_D,
  1051. [35] = KEY_F,
  1052. [36] = KEY_G,
  1053. [37] = KEY_H,
  1054. [38] = KEY_J,
  1055. [39] = KEY_K,
  1056. [40] = KEY_L,
  1057. [41] = KEY_SEMICOLON,
  1058. [42] = KEY_APOSTROPHE,
  1059. [43] = KEY_BACKSLASH,
  1060. [45] = KEY_KP4,
  1061. [46] = KEY_KP5,
  1062. [47] = KEY_KP6,
  1063. [48] = KEY_102ND,
  1064. [49] = KEY_Z,
  1065. [50] = KEY_X,
  1066. [51] = KEY_C,
  1067. [52] = KEY_V,
  1068. [53] = KEY_B,
  1069. [54] = KEY_N,
  1070. [55] = KEY_M,
  1071. [56] = KEY_COMMA,
  1072. [57] = KEY_DOT,
  1073. [58] = KEY_SLASH,
  1074. [60] = KEY_KPDOT,
  1075. [61] = KEY_KP7,
  1076. [62] = KEY_KP8,
  1077. [63] = KEY_KP9,
  1078. [64] = KEY_SPACE,
  1079. [65] = KEY_BACKSPACE,
  1080. [66] = KEY_TAB,
  1081. [67] = KEY_KPENTER,
  1082. [68] = KEY_ENTER,
  1083. [69] = KEY_ESC,
  1084. [70] = KEY_DELETE,
  1085. [74] = KEY_KPMINUS,
  1086. [76] = KEY_UP,
  1087. [77] = KEY_DOWN,
  1088. [78] = KEY_RIGHT,
  1089. [79] = KEY_LEFT,
  1090. };
  1091. static struct adp5588_kpad_platform_data adp5588_kpad_data = {
  1092. .rows = 8,
  1093. .cols = 10,
  1094. .keymap = adp5588_keymap,
  1095. .keymapsize = ARRAY_SIZE(adp5588_keymap),
  1096. .repeat = 0,
  1097. };
  1098. #endif
  1099. #if defined(CONFIG_PMIC_ADP5520) || defined(CONFIG_PMIC_ADP5520_MODULE)
  1100. #include <linux/mfd/adp5520.h>
  1101. /*
  1102. * ADP5520/5501 Backlight Data
  1103. */
  1104. static struct adp5520_backlight_platfrom_data adp5520_backlight_data = {
  1105. .fade_in = FADE_T_1200ms,
  1106. .fade_out = FADE_T_1200ms,
  1107. .fade_led_law = BL_LAW_LINEAR,
  1108. .en_ambl_sens = 1,
  1109. .abml_filt = BL_AMBL_FILT_640ms,
  1110. .l1_daylight_max = BL_CUR_mA(15),
  1111. .l1_daylight_dim = BL_CUR_mA(0),
  1112. .l2_office_max = BL_CUR_mA(7),
  1113. .l2_office_dim = BL_CUR_mA(0),
  1114. .l3_dark_max = BL_CUR_mA(3),
  1115. .l3_dark_dim = BL_CUR_mA(0),
  1116. .l2_trip = L2_COMP_CURR_uA(700),
  1117. .l2_hyst = L2_COMP_CURR_uA(50),
  1118. .l3_trip = L3_COMP_CURR_uA(80),
  1119. .l3_hyst = L3_COMP_CURR_uA(20),
  1120. };
  1121. /*
  1122. * ADP5520/5501 LEDs Data
  1123. */
  1124. #include <linux/leds.h>
  1125. static struct led_info adp5520_leds[] = {
  1126. {
  1127. .name = "adp5520-led1",
  1128. .default_trigger = "none",
  1129. .flags = FLAG_ID_ADP5520_LED1_ADP5501_LED0 | LED_OFFT_600ms,
  1130. },
  1131. #ifdef ADP5520_EN_ALL_LEDS
  1132. {
  1133. .name = "adp5520-led2",
  1134. .default_trigger = "none",
  1135. .flags = FLAG_ID_ADP5520_LED2_ADP5501_LED1,
  1136. },
  1137. {
  1138. .name = "adp5520-led3",
  1139. .default_trigger = "none",
  1140. .flags = FLAG_ID_ADP5520_LED3_ADP5501_LED2,
  1141. },
  1142. #endif
  1143. };
  1144. static struct adp5520_leds_platfrom_data adp5520_leds_data = {
  1145. .num_leds = ARRAY_SIZE(adp5520_leds),
  1146. .leds = adp5520_leds,
  1147. .fade_in = FADE_T_600ms,
  1148. .fade_out = FADE_T_600ms,
  1149. .led_on_time = LED_ONT_600ms,
  1150. };
  1151. /*
  1152. * ADP5520 GPIO Data
  1153. */
  1154. static struct adp5520_gpio_platfrom_data adp5520_gpio_data = {
  1155. .gpio_start = 50,
  1156. .gpio_en_mask = GPIO_C1 | GPIO_C2 | GPIO_R2,
  1157. .gpio_pullup_mask = GPIO_C1 | GPIO_C2 | GPIO_R2,
  1158. };
  1159. /*
  1160. * ADP5520 Keypad Data
  1161. */
  1162. #include <linux/input.h>
  1163. static const unsigned short adp5520_keymap[ADP5520_KEYMAPSIZE] = {
  1164. [KEY(0, 0)] = KEY_GRAVE,
  1165. [KEY(0, 1)] = KEY_1,
  1166. [KEY(0, 2)] = KEY_2,
  1167. [KEY(0, 3)] = KEY_3,
  1168. [KEY(1, 0)] = KEY_4,
  1169. [KEY(1, 1)] = KEY_5,
  1170. [KEY(1, 2)] = KEY_6,
  1171. [KEY(1, 3)] = KEY_7,
  1172. [KEY(2, 0)] = KEY_8,
  1173. [KEY(2, 1)] = KEY_9,
  1174. [KEY(2, 2)] = KEY_0,
  1175. [KEY(2, 3)] = KEY_MINUS,
  1176. [KEY(3, 0)] = KEY_EQUAL,
  1177. [KEY(3, 1)] = KEY_BACKSLASH,
  1178. [KEY(3, 2)] = KEY_BACKSPACE,
  1179. [KEY(3, 3)] = KEY_ENTER,
  1180. };
  1181. static struct adp5520_keys_platfrom_data adp5520_keys_data = {
  1182. .rows_en_mask = ROW_R3 | ROW_R2 | ROW_R1 | ROW_R0,
  1183. .cols_en_mask = COL_C3 | COL_C2 | COL_C1 | COL_C0,
  1184. .keymap = adp5520_keymap,
  1185. .keymapsize = ARRAY_SIZE(adp5520_keymap),
  1186. .repeat = 0,
  1187. };
  1188. /*
  1189. * ADP5520/5501 Multifuction Device Init Data
  1190. */
  1191. static struct adp5520_subdev_info adp5520_subdevs[] = {
  1192. {
  1193. .name = "adp5520-backlight",
  1194. .id = ID_ADP5520,
  1195. .platform_data = &adp5520_backlight_data,
  1196. },
  1197. {
  1198. .name = "adp5520-led",
  1199. .id = ID_ADP5520,
  1200. .platform_data = &adp5520_leds_data,
  1201. },
  1202. {
  1203. .name = "adp5520-gpio",
  1204. .id = ID_ADP5520,
  1205. .platform_data = &adp5520_gpio_data,
  1206. },
  1207. {
  1208. .name = "adp5520-keys",
  1209. .id = ID_ADP5520,
  1210. .platform_data = &adp5520_keys_data,
  1211. },
  1212. };
  1213. static struct adp5520_platform_data adp5520_pdev_data = {
  1214. .num_subdevs = ARRAY_SIZE(adp5520_subdevs),
  1215. .subdevs = adp5520_subdevs,
  1216. };
  1217. #endif
  1218. static struct i2c_board_info __initdata bfin_i2c_board_info[] = {
  1219. #if defined(CONFIG_JOYSTICK_AD7142) || defined(CONFIG_JOYSTICK_AD7142_MODULE)
  1220. {
  1221. I2C_BOARD_INFO("ad7142_joystick", 0x2C),
  1222. .irq = IRQ_PG5,
  1223. },
  1224. #endif
  1225. #if defined(CONFIG_BFIN_TWI_LCD) || defined(CONFIG_BFIN_TWI_LCD_MODULE)
  1226. {
  1227. I2C_BOARD_INFO("pcf8574_lcd", 0x22),
  1228. },
  1229. #endif
  1230. #if defined(CONFIG_INPUT_PCF8574) || defined(CONFIG_INPUT_PCF8574_MODULE)
  1231. {
  1232. I2C_BOARD_INFO("pcf8574_keypad", 0x27),
  1233. .irq = IRQ_PG6,
  1234. },
  1235. #endif
  1236. #if defined(CONFIG_TOUCHSCREEN_AD7879_I2C) || defined(CONFIG_TOUCHSCREEN_AD7879_I2C_MODULE)
  1237. {
  1238. I2C_BOARD_INFO("ad7879", 0x2F),
  1239. .irq = IRQ_PG5,
  1240. .platform_data = (void *)&bfin_ad7879_ts_info,
  1241. },
  1242. #endif
  1243. #if defined(CONFIG_KEYBOARD_ADP5588) || defined(CONFIG_KEYBOARD_ADP5588_MODULE)
  1244. {
  1245. I2C_BOARD_INFO("adp5588-keys", 0x34),
  1246. .irq = IRQ_PG0,
  1247. .platform_data = (void *)&adp5588_kpad_data,
  1248. },
  1249. #endif
  1250. #if defined(CONFIG_PMIC_ADP5520) || defined(CONFIG_PMIC_ADP5520_MODULE)
  1251. {
  1252. I2C_BOARD_INFO("pmic-adp5520", 0x32),
  1253. .irq = IRQ_PG0,
  1254. .platform_data = (void *)&adp5520_pdev_data,
  1255. },
  1256. #endif
  1257. #if defined(CONFIG_INPUT_ADXL34X_I2C) || defined(CONFIG_INPUT_ADXL34X_I2C_MODULE)
  1258. {
  1259. I2C_BOARD_INFO("adxl34x", 0x53),
  1260. .irq = IRQ_PG3,
  1261. .platform_data = (void *)&adxl34x_info,
  1262. },
  1263. #endif
  1264. };
  1265. #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
  1266. static struct platform_device bfin_sport0_uart_device = {
  1267. .name = "bfin-sport-uart",
  1268. .id = 0,
  1269. };
  1270. static struct platform_device bfin_sport1_uart_device = {
  1271. .name = "bfin-sport-uart",
  1272. .id = 1,
  1273. };
  1274. #endif
  1275. #if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
  1276. #define CF_IDE_NAND_CARD_USE_HDD_INTERFACE
  1277. /* #define CF_IDE_NAND_CARD_USE_CF_IN_COMMON_MEMORY_MODE */
  1278. #ifdef CF_IDE_NAND_CARD_USE_HDD_INTERFACE
  1279. #define PATA_INT IRQ_PF5
  1280. static struct pata_platform_info bfin_pata_platform_data = {
  1281. .ioport_shift = 1,
  1282. .irq_flags = IRQF_TRIGGER_HIGH | IRQF_DISABLED,
  1283. };
  1284. static struct resource bfin_pata_resources[] = {
  1285. {
  1286. .start = 0x20314020,
  1287. .end = 0x2031403F,
  1288. .flags = IORESOURCE_MEM,
  1289. },
  1290. {
  1291. .start = 0x2031401C,
  1292. .end = 0x2031401F,
  1293. .flags = IORESOURCE_MEM,
  1294. },
  1295. {
  1296. .start = PATA_INT,
  1297. .end = PATA_INT,
  1298. .flags = IORESOURCE_IRQ,
  1299. },
  1300. };
  1301. #elif defined(CF_IDE_NAND_CARD_USE_CF_IN_COMMON_MEMORY_MODE)
  1302. static struct pata_platform_info bfin_pata_platform_data = {
  1303. .ioport_shift = 0,
  1304. };
  1305. /* CompactFlash Storage Card Memory Mapped Adressing
  1306. * /REG = A11 = 1
  1307. */
  1308. static struct resource bfin_pata_resources[] = {
  1309. {
  1310. .start = 0x20211800,
  1311. .end = 0x20211807,
  1312. .flags = IORESOURCE_MEM,
  1313. },
  1314. {
  1315. .start = 0x2021180E, /* Device Ctl */
  1316. .end = 0x2021180E,
  1317. .flags = IORESOURCE_MEM,
  1318. },
  1319. };
  1320. #endif
  1321. static struct platform_device bfin_pata_device = {
  1322. .name = "pata_platform",
  1323. .id = -1,
  1324. .num_resources = ARRAY_SIZE(bfin_pata_resources),
  1325. .resource = bfin_pata_resources,
  1326. .dev = {
  1327. .platform_data = &bfin_pata_platform_data,
  1328. }
  1329. };
  1330. #endif
  1331. static const unsigned int cclk_vlev_datasheet[] =
  1332. {
  1333. VRPAIR(VLEV_085, 250000000),
  1334. VRPAIR(VLEV_090, 376000000),
  1335. VRPAIR(VLEV_095, 426000000),
  1336. VRPAIR(VLEV_100, 426000000),
  1337. VRPAIR(VLEV_105, 476000000),
  1338. VRPAIR(VLEV_110, 476000000),
  1339. VRPAIR(VLEV_115, 476000000),
  1340. VRPAIR(VLEV_120, 500000000),
  1341. VRPAIR(VLEV_125, 533000000),
  1342. VRPAIR(VLEV_130, 600000000),
  1343. };
  1344. static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {
  1345. .tuple_tab = cclk_vlev_datasheet,
  1346. .tabsize = ARRAY_SIZE(cclk_vlev_datasheet),
  1347. .vr_settling_time = 25 /* us */,
  1348. };
  1349. static struct platform_device bfin_dpmc = {
  1350. .name = "bfin dpmc",
  1351. .dev = {
  1352. .platform_data = &bfin_dmpc_vreg_data,
  1353. },
  1354. };
  1355. static struct platform_device *stamp_devices[] __initdata = {
  1356. &bfin_dpmc,
  1357. #if defined(CONFIG_BFIN_CFPCMCIA) || defined(CONFIG_BFIN_CFPCMCIA_MODULE)
  1358. &bfin_pcmcia_cf_device,
  1359. #endif
  1360. #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
  1361. &rtc_device,
  1362. #endif
  1363. #if defined(CONFIG_USB_SL811_HCD) || defined(CONFIG_USB_SL811_HCD_MODULE)
  1364. &sl811_hcd_device,
  1365. #endif
  1366. #if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
  1367. &isp1362_hcd_device,
  1368. #endif
  1369. #if defined(CONFIG_USB_ISP1760_HCD) || defined(CONFIG_USB_ISP1760_HCD_MODULE)
  1370. &bfin_isp1760_device,
  1371. #endif
  1372. #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
  1373. &smc91x_device,
  1374. #endif
  1375. #if defined(CONFIG_DM9000) || defined(CONFIG_DM9000_MODULE)
  1376. &dm9000_device,
  1377. #endif
  1378. #if defined(CONFIG_AX88180) || defined(CONFIG_AX88180_MODULE)
  1379. &ax88180_device,
  1380. #endif
  1381. #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
  1382. &bfin_mii_bus,
  1383. &bfin_mac_device,
  1384. #endif
  1385. #if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
  1386. &net2272_bfin_device,
  1387. #endif
  1388. #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
  1389. &bfin_spi0_device,
  1390. #endif
  1391. #if defined(CONFIG_SPI_BFIN_SPORT) || defined(CONFIG_SPI_BFIN_SPORT_MODULE)
  1392. &bfin_sport_spi0_device,
  1393. &bfin_sport_spi1_device,
  1394. #endif
  1395. #if defined(CONFIG_FB_BF537_LQ035) || defined(CONFIG_FB_BF537_LQ035_MODULE)
  1396. &bfin_fb_device,
  1397. #endif
  1398. #if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
  1399. &bfin_lq035q1_device,
  1400. #endif
  1401. #if defined(CONFIG_FB_BFIN_7393) || defined(CONFIG_FB_BFIN_7393_MODULE)
  1402. &bfin_fb_adv7393_device,
  1403. #endif
  1404. #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
  1405. &bfin_uart_device,
  1406. #endif
  1407. #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
  1408. #ifdef CONFIG_BFIN_SIR0
  1409. &bfin_sir0_device,
  1410. #endif
  1411. #ifdef CONFIG_BFIN_SIR1
  1412. &bfin_sir1_device,
  1413. #endif
  1414. #endif
  1415. #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
  1416. &i2c_bfin_twi_device,
  1417. #endif
  1418. #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
  1419. &bfin_sport0_uart_device,
  1420. &bfin_sport1_uart_device,
  1421. #endif
  1422. #if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
  1423. &bfin_pata_device,
  1424. #endif
  1425. #if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
  1426. &bfin_device_gpiokeys,
  1427. #endif
  1428. &bfin_gpios_device,
  1429. #if defined(CONFIG_MTD_NAND_PLATFORM) || defined(CONFIG_MTD_NAND_PLATFORM_MODULE)
  1430. &bfin_async_nand_device,
  1431. #endif
  1432. #if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
  1433. &stamp_flash_device,
  1434. #endif
  1435. };
  1436. static int __init stamp_init(void)
  1437. {
  1438. printk(KERN_INFO "%s(): registering device resources\n", __func__);
  1439. i2c_register_board_info(0, bfin_i2c_board_info,
  1440. ARRAY_SIZE(bfin_i2c_board_info));
  1441. bfin_plat_nand_init();
  1442. platform_add_devices(stamp_devices, ARRAY_SIZE(stamp_devices));
  1443. spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info));
  1444. #if (defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)) \
  1445. && defined(PATA_INT)
  1446. irq_desc[PATA_INT].status |= IRQ_NOAUTOEN;
  1447. #endif
  1448. return 0;
  1449. }
  1450. arch_initcall(stamp_init);
  1451. void native_machine_restart(char *cmd)
  1452. {
  1453. /* workaround reboot hang when booting from SPI */
  1454. if ((bfin_read_SYSCR() & 0x7) == 0x3)
  1455. bfin_reset_boot_spi_cs(P_DEFAULT_BOOT_SPI_CS);
  1456. }
  1457. /*
  1458. * Currently the MAC address is saved in Flash by U-Boot
  1459. */
  1460. #define FLASH_MAC 0x203f0000
  1461. void bfin_get_ether_addr(char *addr)
  1462. {
  1463. *(u32 *)(&(addr[0])) = bfin_read32(FLASH_MAC);
  1464. *(u16 *)(&(addr[4])) = bfin_read16(FLASH_MAC + 4);
  1465. }
  1466. EXPORT_SYMBOL(bfin_get_ether_addr);