vmwgfx_kms.c 49 KB

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  1. /**************************************************************************
  2. *
  3. * Copyright © 2009 VMware, Inc., Palo Alto, CA., USA
  4. * All Rights Reserved.
  5. *
  6. * Permission is hereby granted, free of charge, to any person obtaining a
  7. * copy of this software and associated documentation files (the
  8. * "Software"), to deal in the Software without restriction, including
  9. * without limitation the rights to use, copy, modify, merge, publish,
  10. * distribute, sub license, and/or sell copies of the Software, and to
  11. * permit persons to whom the Software is furnished to do so, subject to
  12. * the following conditions:
  13. *
  14. * The above copyright notice and this permission notice (including the
  15. * next paragraph) shall be included in all copies or substantial portions
  16. * of the Software.
  17. *
  18. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  19. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  20. * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
  21. * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
  22. * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
  23. * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
  24. * USE OR OTHER DEALINGS IN THE SOFTWARE.
  25. *
  26. **************************************************************************/
  27. #include "vmwgfx_kms.h"
  28. /* Might need a hrtimer here? */
  29. #define VMWGFX_PRESENT_RATE ((HZ / 60 > 0) ? HZ / 60 : 1)
  30. void vmw_display_unit_cleanup(struct vmw_display_unit *du)
  31. {
  32. if (du->cursor_surface)
  33. vmw_surface_unreference(&du->cursor_surface);
  34. if (du->cursor_dmabuf)
  35. vmw_dmabuf_unreference(&du->cursor_dmabuf);
  36. drm_crtc_cleanup(&du->crtc);
  37. drm_encoder_cleanup(&du->encoder);
  38. drm_connector_cleanup(&du->connector);
  39. }
  40. /*
  41. * Display Unit Cursor functions
  42. */
  43. int vmw_cursor_update_image(struct vmw_private *dev_priv,
  44. u32 *image, u32 width, u32 height,
  45. u32 hotspotX, u32 hotspotY)
  46. {
  47. struct {
  48. u32 cmd;
  49. SVGAFifoCmdDefineAlphaCursor cursor;
  50. } *cmd;
  51. u32 image_size = width * height * 4;
  52. u32 cmd_size = sizeof(*cmd) + image_size;
  53. if (!image)
  54. return -EINVAL;
  55. cmd = vmw_fifo_reserve(dev_priv, cmd_size);
  56. if (unlikely(cmd == NULL)) {
  57. DRM_ERROR("Fifo reserve failed.\n");
  58. return -ENOMEM;
  59. }
  60. memset(cmd, 0, sizeof(*cmd));
  61. memcpy(&cmd[1], image, image_size);
  62. cmd->cmd = cpu_to_le32(SVGA_CMD_DEFINE_ALPHA_CURSOR);
  63. cmd->cursor.id = cpu_to_le32(0);
  64. cmd->cursor.width = cpu_to_le32(width);
  65. cmd->cursor.height = cpu_to_le32(height);
  66. cmd->cursor.hotspotX = cpu_to_le32(hotspotX);
  67. cmd->cursor.hotspotY = cpu_to_le32(hotspotY);
  68. vmw_fifo_commit(dev_priv, cmd_size);
  69. return 0;
  70. }
  71. int vmw_cursor_update_dmabuf(struct vmw_private *dev_priv,
  72. struct vmw_dma_buffer *dmabuf,
  73. u32 width, u32 height,
  74. u32 hotspotX, u32 hotspotY)
  75. {
  76. struct ttm_bo_kmap_obj map;
  77. unsigned long kmap_offset;
  78. unsigned long kmap_num;
  79. void *virtual;
  80. bool dummy;
  81. int ret;
  82. kmap_offset = 0;
  83. kmap_num = (width*height*4 + PAGE_SIZE - 1) >> PAGE_SHIFT;
  84. ret = ttm_bo_reserve(&dmabuf->base, true, false, false, 0);
  85. if (unlikely(ret != 0)) {
  86. DRM_ERROR("reserve failed\n");
  87. return -EINVAL;
  88. }
  89. ret = ttm_bo_kmap(&dmabuf->base, kmap_offset, kmap_num, &map);
  90. if (unlikely(ret != 0))
  91. goto err_unreserve;
  92. virtual = ttm_kmap_obj_virtual(&map, &dummy);
  93. ret = vmw_cursor_update_image(dev_priv, virtual, width, height,
  94. hotspotX, hotspotY);
  95. ttm_bo_kunmap(&map);
  96. err_unreserve:
  97. ttm_bo_unreserve(&dmabuf->base);
  98. return ret;
  99. }
  100. void vmw_cursor_update_position(struct vmw_private *dev_priv,
  101. bool show, int x, int y)
  102. {
  103. __le32 __iomem *fifo_mem = dev_priv->mmio_virt;
  104. uint32_t count;
  105. iowrite32(show ? 1 : 0, fifo_mem + SVGA_FIFO_CURSOR_ON);
  106. iowrite32(x, fifo_mem + SVGA_FIFO_CURSOR_X);
  107. iowrite32(y, fifo_mem + SVGA_FIFO_CURSOR_Y);
  108. count = ioread32(fifo_mem + SVGA_FIFO_CURSOR_COUNT);
  109. iowrite32(++count, fifo_mem + SVGA_FIFO_CURSOR_COUNT);
  110. }
  111. int vmw_du_crtc_cursor_set(struct drm_crtc *crtc, struct drm_file *file_priv,
  112. uint32_t handle, uint32_t width, uint32_t height)
  113. {
  114. struct vmw_private *dev_priv = vmw_priv(crtc->dev);
  115. struct ttm_object_file *tfile = vmw_fpriv(file_priv)->tfile;
  116. struct vmw_display_unit *du = vmw_crtc_to_du(crtc);
  117. struct vmw_surface *surface = NULL;
  118. struct vmw_dma_buffer *dmabuf = NULL;
  119. int ret;
  120. /* A lot of the code assumes this */
  121. if (handle && (width != 64 || height != 64))
  122. return -EINVAL;
  123. if (handle) {
  124. ret = vmw_user_lookup_handle(dev_priv, tfile,
  125. handle, &surface, &dmabuf);
  126. if (ret) {
  127. DRM_ERROR("failed to find surface or dmabuf: %i\n", ret);
  128. return -EINVAL;
  129. }
  130. }
  131. /* need to do this before taking down old image */
  132. if (surface && !surface->snooper.image) {
  133. DRM_ERROR("surface not suitable for cursor\n");
  134. vmw_surface_unreference(&surface);
  135. return -EINVAL;
  136. }
  137. /* takedown old cursor */
  138. if (du->cursor_surface) {
  139. du->cursor_surface->snooper.crtc = NULL;
  140. vmw_surface_unreference(&du->cursor_surface);
  141. }
  142. if (du->cursor_dmabuf)
  143. vmw_dmabuf_unreference(&du->cursor_dmabuf);
  144. /* setup new image */
  145. if (surface) {
  146. /* vmw_user_surface_lookup takes one reference */
  147. du->cursor_surface = surface;
  148. du->cursor_surface->snooper.crtc = crtc;
  149. du->cursor_age = du->cursor_surface->snooper.age;
  150. vmw_cursor_update_image(dev_priv, surface->snooper.image,
  151. 64, 64, du->hotspot_x, du->hotspot_y);
  152. } else if (dmabuf) {
  153. /* vmw_user_surface_lookup takes one reference */
  154. du->cursor_dmabuf = dmabuf;
  155. ret = vmw_cursor_update_dmabuf(dev_priv, dmabuf, width, height,
  156. du->hotspot_x, du->hotspot_y);
  157. } else {
  158. vmw_cursor_update_position(dev_priv, false, 0, 0);
  159. return 0;
  160. }
  161. vmw_cursor_update_position(dev_priv, true,
  162. du->cursor_x + du->hotspot_x,
  163. du->cursor_y + du->hotspot_y);
  164. return 0;
  165. }
  166. int vmw_du_crtc_cursor_move(struct drm_crtc *crtc, int x, int y)
  167. {
  168. struct vmw_private *dev_priv = vmw_priv(crtc->dev);
  169. struct vmw_display_unit *du = vmw_crtc_to_du(crtc);
  170. bool shown = du->cursor_surface || du->cursor_dmabuf ? true : false;
  171. du->cursor_x = x + crtc->x;
  172. du->cursor_y = y + crtc->y;
  173. vmw_cursor_update_position(dev_priv, shown,
  174. du->cursor_x + du->hotspot_x,
  175. du->cursor_y + du->hotspot_y);
  176. return 0;
  177. }
  178. void vmw_kms_cursor_snoop(struct vmw_surface *srf,
  179. struct ttm_object_file *tfile,
  180. struct ttm_buffer_object *bo,
  181. SVGA3dCmdHeader *header)
  182. {
  183. struct ttm_bo_kmap_obj map;
  184. unsigned long kmap_offset;
  185. unsigned long kmap_num;
  186. SVGA3dCopyBox *box;
  187. unsigned box_count;
  188. void *virtual;
  189. bool dummy;
  190. struct vmw_dma_cmd {
  191. SVGA3dCmdHeader header;
  192. SVGA3dCmdSurfaceDMA dma;
  193. } *cmd;
  194. int i, ret;
  195. cmd = container_of(header, struct vmw_dma_cmd, header);
  196. /* No snooper installed */
  197. if (!srf->snooper.image)
  198. return;
  199. if (cmd->dma.host.face != 0 || cmd->dma.host.mipmap != 0) {
  200. DRM_ERROR("face and mipmap for cursors should never != 0\n");
  201. return;
  202. }
  203. if (cmd->header.size < 64) {
  204. DRM_ERROR("at least one full copy box must be given\n");
  205. return;
  206. }
  207. box = (SVGA3dCopyBox *)&cmd[1];
  208. box_count = (cmd->header.size - sizeof(SVGA3dCmdSurfaceDMA)) /
  209. sizeof(SVGA3dCopyBox);
  210. if (cmd->dma.guest.ptr.offset % PAGE_SIZE ||
  211. box->x != 0 || box->y != 0 || box->z != 0 ||
  212. box->srcx != 0 || box->srcy != 0 || box->srcz != 0 ||
  213. box->d != 1 || box_count != 1) {
  214. /* TODO handle none page aligned offsets */
  215. /* TODO handle more dst & src != 0 */
  216. /* TODO handle more then one copy */
  217. DRM_ERROR("Cant snoop dma request for cursor!\n");
  218. DRM_ERROR("(%u, %u, %u) (%u, %u, %u) (%ux%ux%u) %u %u\n",
  219. box->srcx, box->srcy, box->srcz,
  220. box->x, box->y, box->z,
  221. box->w, box->h, box->d, box_count,
  222. cmd->dma.guest.ptr.offset);
  223. return;
  224. }
  225. kmap_offset = cmd->dma.guest.ptr.offset >> PAGE_SHIFT;
  226. kmap_num = (64*64*4) >> PAGE_SHIFT;
  227. ret = ttm_bo_reserve(bo, true, false, false, 0);
  228. if (unlikely(ret != 0)) {
  229. DRM_ERROR("reserve failed\n");
  230. return;
  231. }
  232. ret = ttm_bo_kmap(bo, kmap_offset, kmap_num, &map);
  233. if (unlikely(ret != 0))
  234. goto err_unreserve;
  235. virtual = ttm_kmap_obj_virtual(&map, &dummy);
  236. if (box->w == 64 && cmd->dma.guest.pitch == 64*4) {
  237. memcpy(srf->snooper.image, virtual, 64*64*4);
  238. } else {
  239. /* Image is unsigned pointer. */
  240. for (i = 0; i < box->h; i++)
  241. memcpy(srf->snooper.image + i * 64,
  242. virtual + i * cmd->dma.guest.pitch,
  243. box->w * 4);
  244. }
  245. srf->snooper.age++;
  246. /* we can't call this function from this function since execbuf has
  247. * reserved fifo space.
  248. *
  249. * if (srf->snooper.crtc)
  250. * vmw_ldu_crtc_cursor_update_image(dev_priv,
  251. * srf->snooper.image, 64, 64,
  252. * du->hotspot_x, du->hotspot_y);
  253. */
  254. ttm_bo_kunmap(&map);
  255. err_unreserve:
  256. ttm_bo_unreserve(bo);
  257. }
  258. void vmw_kms_cursor_post_execbuf(struct vmw_private *dev_priv)
  259. {
  260. struct drm_device *dev = dev_priv->dev;
  261. struct vmw_display_unit *du;
  262. struct drm_crtc *crtc;
  263. mutex_lock(&dev->mode_config.mutex);
  264. list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
  265. du = vmw_crtc_to_du(crtc);
  266. if (!du->cursor_surface ||
  267. du->cursor_age == du->cursor_surface->snooper.age)
  268. continue;
  269. du->cursor_age = du->cursor_surface->snooper.age;
  270. vmw_cursor_update_image(dev_priv,
  271. du->cursor_surface->snooper.image,
  272. 64, 64, du->hotspot_x, du->hotspot_y);
  273. }
  274. mutex_unlock(&dev->mode_config.mutex);
  275. }
  276. /*
  277. * Generic framebuffer code
  278. */
  279. int vmw_framebuffer_create_handle(struct drm_framebuffer *fb,
  280. struct drm_file *file_priv,
  281. unsigned int *handle)
  282. {
  283. if (handle)
  284. handle = 0;
  285. return 0;
  286. }
  287. /*
  288. * Surface framebuffer code
  289. */
  290. #define vmw_framebuffer_to_vfbs(x) \
  291. container_of(x, struct vmw_framebuffer_surface, base.base)
  292. struct vmw_framebuffer_surface {
  293. struct vmw_framebuffer base;
  294. struct vmw_surface *surface;
  295. struct vmw_dma_buffer *buffer;
  296. struct list_head head;
  297. struct drm_master *master;
  298. };
  299. void vmw_framebuffer_surface_destroy(struct drm_framebuffer *framebuffer)
  300. {
  301. struct vmw_framebuffer_surface *vfbs =
  302. vmw_framebuffer_to_vfbs(framebuffer);
  303. struct vmw_master *vmaster = vmw_master(vfbs->master);
  304. mutex_lock(&vmaster->fb_surf_mutex);
  305. list_del(&vfbs->head);
  306. mutex_unlock(&vmaster->fb_surf_mutex);
  307. drm_master_put(&vfbs->master);
  308. drm_framebuffer_cleanup(framebuffer);
  309. vmw_surface_unreference(&vfbs->surface);
  310. ttm_base_object_unref(&vfbs->base.user_obj);
  311. kfree(vfbs);
  312. }
  313. static int do_surface_dirty_sou(struct vmw_private *dev_priv,
  314. struct drm_file *file_priv,
  315. struct vmw_framebuffer *framebuffer,
  316. unsigned flags, unsigned color,
  317. struct drm_clip_rect *clips,
  318. unsigned num_clips, int inc)
  319. {
  320. struct drm_clip_rect *clips_ptr;
  321. struct vmw_display_unit *units[VMWGFX_NUM_DISPLAY_UNITS];
  322. struct drm_crtc *crtc;
  323. size_t fifo_size;
  324. int i, num_units;
  325. int ret = 0; /* silence warning */
  326. int left, right, top, bottom;
  327. struct {
  328. SVGA3dCmdHeader header;
  329. SVGA3dCmdBlitSurfaceToScreen body;
  330. } *cmd;
  331. SVGASignedRect *blits;
  332. num_units = 0;
  333. list_for_each_entry(crtc, &dev_priv->dev->mode_config.crtc_list,
  334. head) {
  335. if (crtc->fb != &framebuffer->base)
  336. continue;
  337. units[num_units++] = vmw_crtc_to_du(crtc);
  338. }
  339. BUG_ON(!clips || !num_clips);
  340. fifo_size = sizeof(*cmd) + sizeof(SVGASignedRect) * num_clips;
  341. cmd = kzalloc(fifo_size, GFP_KERNEL);
  342. if (unlikely(cmd == NULL)) {
  343. DRM_ERROR("Temporary fifo memory alloc failed.\n");
  344. return -ENOMEM;
  345. }
  346. left = clips->x1;
  347. right = clips->x2;
  348. top = clips->y1;
  349. bottom = clips->y2;
  350. /* skip the first clip rect */
  351. for (i = 1, clips_ptr = clips + inc;
  352. i < num_clips; i++, clips_ptr += inc) {
  353. left = min_t(int, left, (int)clips_ptr->x1);
  354. right = max_t(int, right, (int)clips_ptr->x2);
  355. top = min_t(int, top, (int)clips_ptr->y1);
  356. bottom = max_t(int, bottom, (int)clips_ptr->y2);
  357. }
  358. /* only need to do this once */
  359. memset(cmd, 0, fifo_size);
  360. cmd->header.id = cpu_to_le32(SVGA_3D_CMD_BLIT_SURFACE_TO_SCREEN);
  361. cmd->header.size = cpu_to_le32(fifo_size - sizeof(cmd->header));
  362. cmd->body.srcRect.left = left;
  363. cmd->body.srcRect.right = right;
  364. cmd->body.srcRect.top = top;
  365. cmd->body.srcRect.bottom = bottom;
  366. clips_ptr = clips;
  367. blits = (SVGASignedRect *)&cmd[1];
  368. for (i = 0; i < num_clips; i++, clips_ptr += inc) {
  369. blits[i].left = clips_ptr->x1 - left;
  370. blits[i].right = clips_ptr->x2 - left;
  371. blits[i].top = clips_ptr->y1 - top;
  372. blits[i].bottom = clips_ptr->y2 - top;
  373. }
  374. /* do per unit writing, reuse fifo for each */
  375. for (i = 0; i < num_units; i++) {
  376. struct vmw_display_unit *unit = units[i];
  377. int clip_x1 = left - unit->crtc.x;
  378. int clip_y1 = top - unit->crtc.y;
  379. int clip_x2 = right - unit->crtc.x;
  380. int clip_y2 = bottom - unit->crtc.y;
  381. /* skip any crtcs that misses the clip region */
  382. if (clip_x1 >= unit->crtc.mode.hdisplay ||
  383. clip_y1 >= unit->crtc.mode.vdisplay ||
  384. clip_x2 <= 0 || clip_y2 <= 0)
  385. continue;
  386. /* need to reset sid as it is changed by execbuf */
  387. cmd->body.srcImage.sid = cpu_to_le32(framebuffer->user_handle);
  388. cmd->body.destScreenId = unit->unit;
  389. /*
  390. * The blit command is a lot more resilient then the
  391. * readback command when it comes to clip rects. So its
  392. * okay to go out of bounds.
  393. */
  394. cmd->body.destRect.left = clip_x1;
  395. cmd->body.destRect.right = clip_x2;
  396. cmd->body.destRect.top = clip_y1;
  397. cmd->body.destRect.bottom = clip_y2;
  398. ret = vmw_execbuf_process(file_priv, dev_priv, NULL, cmd,
  399. fifo_size, 0, NULL);
  400. if (unlikely(ret != 0))
  401. break;
  402. }
  403. kfree(cmd);
  404. return ret;
  405. }
  406. int vmw_framebuffer_surface_dirty(struct drm_framebuffer *framebuffer,
  407. struct drm_file *file_priv,
  408. unsigned flags, unsigned color,
  409. struct drm_clip_rect *clips,
  410. unsigned num_clips)
  411. {
  412. struct vmw_private *dev_priv = vmw_priv(framebuffer->dev);
  413. struct vmw_master *vmaster = vmw_master(file_priv->master);
  414. struct vmw_framebuffer_surface *vfbs =
  415. vmw_framebuffer_to_vfbs(framebuffer);
  416. struct drm_clip_rect norect;
  417. int ret, inc = 1;
  418. if (unlikely(vfbs->master != file_priv->master))
  419. return -EINVAL;
  420. /* Require ScreenObject support for 3D */
  421. if (!dev_priv->sou_priv)
  422. return -EINVAL;
  423. ret = ttm_read_lock(&vmaster->lock, true);
  424. if (unlikely(ret != 0))
  425. return ret;
  426. if (!num_clips) {
  427. num_clips = 1;
  428. clips = &norect;
  429. norect.x1 = norect.y1 = 0;
  430. norect.x2 = framebuffer->width;
  431. norect.y2 = framebuffer->height;
  432. } else if (flags & DRM_MODE_FB_DIRTY_ANNOTATE_COPY) {
  433. num_clips /= 2;
  434. inc = 2; /* skip source rects */
  435. }
  436. ret = do_surface_dirty_sou(dev_priv, file_priv, &vfbs->base,
  437. flags, color,
  438. clips, num_clips, inc);
  439. ttm_read_unlock(&vmaster->lock);
  440. return 0;
  441. }
  442. static struct drm_framebuffer_funcs vmw_framebuffer_surface_funcs = {
  443. .destroy = vmw_framebuffer_surface_destroy,
  444. .dirty = vmw_framebuffer_surface_dirty,
  445. .create_handle = vmw_framebuffer_create_handle,
  446. };
  447. static int vmw_kms_new_framebuffer_surface(struct vmw_private *dev_priv,
  448. struct drm_file *file_priv,
  449. struct vmw_surface *surface,
  450. struct vmw_framebuffer **out,
  451. const struct drm_mode_fb_cmd
  452. *mode_cmd)
  453. {
  454. struct drm_device *dev = dev_priv->dev;
  455. struct vmw_framebuffer_surface *vfbs;
  456. enum SVGA3dSurfaceFormat format;
  457. struct vmw_master *vmaster = vmw_master(file_priv->master);
  458. int ret;
  459. /* 3D is only supported on HWv8 hosts which supports screen objects */
  460. if (!dev_priv->sou_priv)
  461. return -ENOSYS;
  462. /*
  463. * Sanity checks.
  464. */
  465. /* Surface must be marked as a scanout. */
  466. if (unlikely(!surface->scanout))
  467. return -EINVAL;
  468. if (unlikely(surface->mip_levels[0] != 1 ||
  469. surface->num_sizes != 1 ||
  470. surface->sizes[0].width < mode_cmd->width ||
  471. surface->sizes[0].height < mode_cmd->height ||
  472. surface->sizes[0].depth != 1)) {
  473. DRM_ERROR("Incompatible surface dimensions "
  474. "for requested mode.\n");
  475. return -EINVAL;
  476. }
  477. switch (mode_cmd->depth) {
  478. case 32:
  479. format = SVGA3D_A8R8G8B8;
  480. break;
  481. case 24:
  482. format = SVGA3D_X8R8G8B8;
  483. break;
  484. case 16:
  485. format = SVGA3D_R5G6B5;
  486. break;
  487. case 15:
  488. format = SVGA3D_A1R5G5B5;
  489. break;
  490. case 8:
  491. format = SVGA3D_LUMINANCE8;
  492. break;
  493. default:
  494. DRM_ERROR("Invalid color depth: %d\n", mode_cmd->depth);
  495. return -EINVAL;
  496. }
  497. if (unlikely(format != surface->format)) {
  498. DRM_ERROR("Invalid surface format for requested mode.\n");
  499. return -EINVAL;
  500. }
  501. vfbs = kzalloc(sizeof(*vfbs), GFP_KERNEL);
  502. if (!vfbs) {
  503. ret = -ENOMEM;
  504. goto out_err1;
  505. }
  506. ret = drm_framebuffer_init(dev, &vfbs->base.base,
  507. &vmw_framebuffer_surface_funcs);
  508. if (ret)
  509. goto out_err2;
  510. if (!vmw_surface_reference(surface)) {
  511. DRM_ERROR("failed to reference surface %p\n", surface);
  512. goto out_err3;
  513. }
  514. /* XXX get the first 3 from the surface info */
  515. vfbs->base.base.bits_per_pixel = mode_cmd->bpp;
  516. vfbs->base.base.pitch = mode_cmd->pitch;
  517. vfbs->base.base.depth = mode_cmd->depth;
  518. vfbs->base.base.width = mode_cmd->width;
  519. vfbs->base.base.height = mode_cmd->height;
  520. vfbs->surface = surface;
  521. vfbs->base.user_handle = mode_cmd->handle;
  522. vfbs->master = drm_master_get(file_priv->master);
  523. mutex_lock(&vmaster->fb_surf_mutex);
  524. list_add_tail(&vfbs->head, &vmaster->fb_surf);
  525. mutex_unlock(&vmaster->fb_surf_mutex);
  526. *out = &vfbs->base;
  527. return 0;
  528. out_err3:
  529. drm_framebuffer_cleanup(&vfbs->base.base);
  530. out_err2:
  531. kfree(vfbs);
  532. out_err1:
  533. return ret;
  534. }
  535. /*
  536. * Dmabuf framebuffer code
  537. */
  538. #define vmw_framebuffer_to_vfbd(x) \
  539. container_of(x, struct vmw_framebuffer_dmabuf, base.base)
  540. struct vmw_framebuffer_dmabuf {
  541. struct vmw_framebuffer base;
  542. struct vmw_dma_buffer *buffer;
  543. };
  544. void vmw_framebuffer_dmabuf_destroy(struct drm_framebuffer *framebuffer)
  545. {
  546. struct vmw_framebuffer_dmabuf *vfbd =
  547. vmw_framebuffer_to_vfbd(framebuffer);
  548. drm_framebuffer_cleanup(framebuffer);
  549. vmw_dmabuf_unreference(&vfbd->buffer);
  550. ttm_base_object_unref(&vfbd->base.user_obj);
  551. kfree(vfbd);
  552. }
  553. static int do_dmabuf_dirty_ldu(struct vmw_private *dev_priv,
  554. struct vmw_framebuffer *framebuffer,
  555. unsigned flags, unsigned color,
  556. struct drm_clip_rect *clips,
  557. unsigned num_clips, int increment)
  558. {
  559. size_t fifo_size;
  560. int i;
  561. struct {
  562. uint32_t header;
  563. SVGAFifoCmdUpdate body;
  564. } *cmd;
  565. fifo_size = sizeof(*cmd) * num_clips;
  566. cmd = vmw_fifo_reserve(dev_priv, fifo_size);
  567. if (unlikely(cmd == NULL)) {
  568. DRM_ERROR("Fifo reserve failed.\n");
  569. return -ENOMEM;
  570. }
  571. memset(cmd, 0, fifo_size);
  572. for (i = 0; i < num_clips; i++, clips += increment) {
  573. cmd[i].header = cpu_to_le32(SVGA_CMD_UPDATE);
  574. cmd[i].body.x = cpu_to_le32(clips->x1);
  575. cmd[i].body.y = cpu_to_le32(clips->y1);
  576. cmd[i].body.width = cpu_to_le32(clips->x2 - clips->x1);
  577. cmd[i].body.height = cpu_to_le32(clips->y2 - clips->y1);
  578. }
  579. vmw_fifo_commit(dev_priv, fifo_size);
  580. return 0;
  581. }
  582. static int do_dmabuf_define_gmrfb(struct drm_file *file_priv,
  583. struct vmw_private *dev_priv,
  584. struct vmw_framebuffer *framebuffer)
  585. {
  586. int depth = framebuffer->base.depth;
  587. size_t fifo_size;
  588. int ret;
  589. struct {
  590. uint32_t header;
  591. SVGAFifoCmdDefineGMRFB body;
  592. } *cmd;
  593. /* Emulate RGBA support, contrary to svga_reg.h this is not
  594. * supported by hosts. This is only a problem if we are reading
  595. * this value later and expecting what we uploaded back.
  596. */
  597. if (depth == 32)
  598. depth = 24;
  599. fifo_size = sizeof(*cmd);
  600. cmd = kmalloc(fifo_size, GFP_KERNEL);
  601. if (unlikely(cmd == NULL)) {
  602. DRM_ERROR("Failed to allocate temporary cmd buffer.\n");
  603. return -ENOMEM;
  604. }
  605. memset(cmd, 0, fifo_size);
  606. cmd->header = SVGA_CMD_DEFINE_GMRFB;
  607. cmd->body.format.bitsPerPixel = framebuffer->base.bits_per_pixel;
  608. cmd->body.format.colorDepth = depth;
  609. cmd->body.format.reserved = 0;
  610. cmd->body.bytesPerLine = framebuffer->base.pitch;
  611. cmd->body.ptr.gmrId = framebuffer->user_handle;
  612. cmd->body.ptr.offset = 0;
  613. ret = vmw_execbuf_process(file_priv, dev_priv, NULL, cmd,
  614. fifo_size, 0, NULL);
  615. kfree(cmd);
  616. return ret;
  617. }
  618. static int do_dmabuf_dirty_sou(struct drm_file *file_priv,
  619. struct vmw_private *dev_priv,
  620. struct vmw_framebuffer *framebuffer,
  621. unsigned flags, unsigned color,
  622. struct drm_clip_rect *clips,
  623. unsigned num_clips, int increment)
  624. {
  625. struct vmw_display_unit *units[VMWGFX_NUM_DISPLAY_UNITS];
  626. struct drm_clip_rect *clips_ptr;
  627. int i, k, num_units, ret;
  628. struct drm_crtc *crtc;
  629. size_t fifo_size;
  630. struct {
  631. uint32_t header;
  632. SVGAFifoCmdBlitGMRFBToScreen body;
  633. } *blits;
  634. ret = do_dmabuf_define_gmrfb(file_priv, dev_priv, framebuffer);
  635. if (unlikely(ret != 0))
  636. return ret; /* define_gmrfb prints warnings */
  637. fifo_size = sizeof(*blits) * num_clips;
  638. blits = kmalloc(fifo_size, GFP_KERNEL);
  639. if (unlikely(blits == NULL)) {
  640. DRM_ERROR("Failed to allocate temporary cmd buffer.\n");
  641. return -ENOMEM;
  642. }
  643. num_units = 0;
  644. list_for_each_entry(crtc, &dev_priv->dev->mode_config.crtc_list, head) {
  645. if (crtc->fb != &framebuffer->base)
  646. continue;
  647. units[num_units++] = vmw_crtc_to_du(crtc);
  648. }
  649. for (k = 0; k < num_units; k++) {
  650. struct vmw_display_unit *unit = units[k];
  651. int hit_num = 0;
  652. clips_ptr = clips;
  653. for (i = 0; i < num_clips; i++, clips_ptr += increment) {
  654. int clip_x1 = clips_ptr->x1 - unit->crtc.x;
  655. int clip_y1 = clips_ptr->y1 - unit->crtc.y;
  656. int clip_x2 = clips_ptr->x2 - unit->crtc.x;
  657. int clip_y2 = clips_ptr->y2 - unit->crtc.y;
  658. /* skip any crtcs that misses the clip region */
  659. if (clip_x1 >= unit->crtc.mode.hdisplay ||
  660. clip_y1 >= unit->crtc.mode.vdisplay ||
  661. clip_x2 <= 0 || clip_y2 <= 0)
  662. continue;
  663. blits[hit_num].header = SVGA_CMD_BLIT_GMRFB_TO_SCREEN;
  664. blits[hit_num].body.destScreenId = unit->unit;
  665. blits[hit_num].body.srcOrigin.x = clips_ptr->x1;
  666. blits[hit_num].body.srcOrigin.y = clips_ptr->y1;
  667. blits[hit_num].body.destRect.left = clip_x1;
  668. blits[hit_num].body.destRect.top = clip_y1;
  669. blits[hit_num].body.destRect.right = clip_x2;
  670. blits[hit_num].body.destRect.bottom = clip_y2;
  671. hit_num++;
  672. }
  673. /* no clips hit the crtc */
  674. if (hit_num == 0)
  675. continue;
  676. fifo_size = sizeof(*blits) * hit_num;
  677. ret = vmw_execbuf_process(file_priv, dev_priv, NULL, blits,
  678. fifo_size, 0, NULL);
  679. if (unlikely(ret != 0))
  680. break;
  681. }
  682. kfree(blits);
  683. return ret;
  684. }
  685. int vmw_framebuffer_dmabuf_dirty(struct drm_framebuffer *framebuffer,
  686. struct drm_file *file_priv,
  687. unsigned flags, unsigned color,
  688. struct drm_clip_rect *clips,
  689. unsigned num_clips)
  690. {
  691. struct vmw_private *dev_priv = vmw_priv(framebuffer->dev);
  692. struct vmw_master *vmaster = vmw_master(file_priv->master);
  693. struct vmw_framebuffer_dmabuf *vfbd =
  694. vmw_framebuffer_to_vfbd(framebuffer);
  695. struct drm_clip_rect norect;
  696. int ret, increment = 1;
  697. ret = ttm_read_lock(&vmaster->lock, true);
  698. if (unlikely(ret != 0))
  699. return ret;
  700. if (!num_clips) {
  701. num_clips = 1;
  702. clips = &norect;
  703. norect.x1 = norect.y1 = 0;
  704. norect.x2 = framebuffer->width;
  705. norect.y2 = framebuffer->height;
  706. } else if (flags & DRM_MODE_FB_DIRTY_ANNOTATE_COPY) {
  707. num_clips /= 2;
  708. increment = 2;
  709. }
  710. if (dev_priv->ldu_priv) {
  711. ret = do_dmabuf_dirty_ldu(dev_priv, &vfbd->base,
  712. flags, color,
  713. clips, num_clips, increment);
  714. } else {
  715. ret = do_dmabuf_dirty_sou(file_priv, dev_priv, &vfbd->base,
  716. flags, color,
  717. clips, num_clips, increment);
  718. }
  719. ttm_read_unlock(&vmaster->lock);
  720. return ret;
  721. }
  722. static struct drm_framebuffer_funcs vmw_framebuffer_dmabuf_funcs = {
  723. .destroy = vmw_framebuffer_dmabuf_destroy,
  724. .dirty = vmw_framebuffer_dmabuf_dirty,
  725. .create_handle = vmw_framebuffer_create_handle,
  726. };
  727. /**
  728. * Pin the dmabuffer to the start of vram.
  729. */
  730. static int vmw_framebuffer_dmabuf_pin(struct vmw_framebuffer *vfb)
  731. {
  732. struct vmw_private *dev_priv = vmw_priv(vfb->base.dev);
  733. struct vmw_framebuffer_dmabuf *vfbd =
  734. vmw_framebuffer_to_vfbd(&vfb->base);
  735. int ret;
  736. /* This code should not be used with screen objects */
  737. BUG_ON(dev_priv->sou_priv);
  738. vmw_overlay_pause_all(dev_priv);
  739. ret = vmw_dmabuf_to_start_of_vram(dev_priv, vfbd->buffer, true, false);
  740. vmw_overlay_resume_all(dev_priv);
  741. WARN_ON(ret != 0);
  742. return 0;
  743. }
  744. static int vmw_framebuffer_dmabuf_unpin(struct vmw_framebuffer *vfb)
  745. {
  746. struct vmw_private *dev_priv = vmw_priv(vfb->base.dev);
  747. struct vmw_framebuffer_dmabuf *vfbd =
  748. vmw_framebuffer_to_vfbd(&vfb->base);
  749. if (!vfbd->buffer) {
  750. WARN_ON(!vfbd->buffer);
  751. return 0;
  752. }
  753. return vmw_dmabuf_unpin(dev_priv, vfbd->buffer, false);
  754. }
  755. static int vmw_kms_new_framebuffer_dmabuf(struct vmw_private *dev_priv,
  756. struct vmw_dma_buffer *dmabuf,
  757. struct vmw_framebuffer **out,
  758. const struct drm_mode_fb_cmd
  759. *mode_cmd)
  760. {
  761. struct drm_device *dev = dev_priv->dev;
  762. struct vmw_framebuffer_dmabuf *vfbd;
  763. unsigned int requested_size;
  764. int ret;
  765. requested_size = mode_cmd->height * mode_cmd->pitch;
  766. if (unlikely(requested_size > dmabuf->base.num_pages * PAGE_SIZE)) {
  767. DRM_ERROR("Screen buffer object size is too small "
  768. "for requested mode.\n");
  769. return -EINVAL;
  770. }
  771. /* Limited framebuffer color depth support for screen objects */
  772. if (dev_priv->sou_priv) {
  773. switch (mode_cmd->depth) {
  774. case 32:
  775. case 24:
  776. /* Only support 32 bpp for 32 and 24 depth fbs */
  777. if (mode_cmd->bpp == 32)
  778. break;
  779. DRM_ERROR("Invalid color depth/bbp: %d %d\n",
  780. mode_cmd->depth, mode_cmd->bpp);
  781. return -EINVAL;
  782. case 16:
  783. case 15:
  784. /* Only support 16 bpp for 16 and 15 depth fbs */
  785. if (mode_cmd->bpp == 16)
  786. break;
  787. DRM_ERROR("Invalid color depth/bbp: %d %d\n",
  788. mode_cmd->depth, mode_cmd->bpp);
  789. return -EINVAL;
  790. default:
  791. DRM_ERROR("Invalid color depth: %d\n", mode_cmd->depth);
  792. return -EINVAL;
  793. }
  794. }
  795. vfbd = kzalloc(sizeof(*vfbd), GFP_KERNEL);
  796. if (!vfbd) {
  797. ret = -ENOMEM;
  798. goto out_err1;
  799. }
  800. ret = drm_framebuffer_init(dev, &vfbd->base.base,
  801. &vmw_framebuffer_dmabuf_funcs);
  802. if (ret)
  803. goto out_err2;
  804. if (!vmw_dmabuf_reference(dmabuf)) {
  805. DRM_ERROR("failed to reference dmabuf %p\n", dmabuf);
  806. goto out_err3;
  807. }
  808. vfbd->base.base.bits_per_pixel = mode_cmd->bpp;
  809. vfbd->base.base.pitch = mode_cmd->pitch;
  810. vfbd->base.base.depth = mode_cmd->depth;
  811. vfbd->base.base.width = mode_cmd->width;
  812. vfbd->base.base.height = mode_cmd->height;
  813. if (!dev_priv->sou_priv) {
  814. vfbd->base.pin = vmw_framebuffer_dmabuf_pin;
  815. vfbd->base.unpin = vmw_framebuffer_dmabuf_unpin;
  816. }
  817. vfbd->base.dmabuf = true;
  818. vfbd->buffer = dmabuf;
  819. vfbd->base.user_handle = mode_cmd->handle;
  820. *out = &vfbd->base;
  821. return 0;
  822. out_err3:
  823. drm_framebuffer_cleanup(&vfbd->base.base);
  824. out_err2:
  825. kfree(vfbd);
  826. out_err1:
  827. return ret;
  828. }
  829. /*
  830. * Generic Kernel modesetting functions
  831. */
  832. static struct drm_framebuffer *vmw_kms_fb_create(struct drm_device *dev,
  833. struct drm_file *file_priv,
  834. struct drm_mode_fb_cmd *mode_cmd)
  835. {
  836. struct vmw_private *dev_priv = vmw_priv(dev);
  837. struct ttm_object_file *tfile = vmw_fpriv(file_priv)->tfile;
  838. struct vmw_framebuffer *vfb = NULL;
  839. struct vmw_surface *surface = NULL;
  840. struct vmw_dma_buffer *bo = NULL;
  841. struct ttm_base_object *user_obj;
  842. u64 required_size;
  843. int ret;
  844. /**
  845. * This code should be conditioned on Screen Objects not being used.
  846. * If screen objects are used, we can allocate a GMR to hold the
  847. * requested framebuffer.
  848. */
  849. required_size = mode_cmd->pitch * mode_cmd->height;
  850. if (unlikely(required_size > (u64) dev_priv->vram_size)) {
  851. DRM_ERROR("VRAM size is too small for requested mode.\n");
  852. return ERR_PTR(-ENOMEM);
  853. }
  854. /*
  855. * Take a reference on the user object of the resource
  856. * backing the kms fb. This ensures that user-space handle
  857. * lookups on that resource will always work as long as
  858. * it's registered with a kms framebuffer. This is important,
  859. * since vmw_execbuf_process identifies resources in the
  860. * command stream using user-space handles.
  861. */
  862. user_obj = ttm_base_object_lookup(tfile, mode_cmd->handle);
  863. if (unlikely(user_obj == NULL)) {
  864. DRM_ERROR("Could not locate requested kms frame buffer.\n");
  865. return ERR_PTR(-ENOENT);
  866. }
  867. /* returns either a dmabuf or surface */
  868. ret = vmw_user_lookup_handle(dev_priv, tfile,
  869. mode_cmd->handle,
  870. &surface, &bo);
  871. if (ret)
  872. goto err_out;
  873. /* Create the new framebuffer depending one what we got back */
  874. if (bo)
  875. ret = vmw_kms_new_framebuffer_dmabuf(dev_priv, bo, &vfb,
  876. mode_cmd);
  877. else if (surface)
  878. ret = vmw_kms_new_framebuffer_surface(dev_priv, file_priv,
  879. surface, &vfb, mode_cmd);
  880. else
  881. BUG();
  882. err_out:
  883. /* vmw_user_lookup_handle takes one ref so does new_fb */
  884. if (bo)
  885. vmw_dmabuf_unreference(&bo);
  886. if (surface)
  887. vmw_surface_unreference(&surface);
  888. if (ret) {
  889. DRM_ERROR("failed to create vmw_framebuffer: %i\n", ret);
  890. ttm_base_object_unref(&user_obj);
  891. return ERR_PTR(ret);
  892. } else
  893. vfb->user_obj = user_obj;
  894. return &vfb->base;
  895. }
  896. static struct drm_mode_config_funcs vmw_kms_funcs = {
  897. .fb_create = vmw_kms_fb_create,
  898. };
  899. int vmw_kms_present(struct vmw_private *dev_priv,
  900. struct drm_file *file_priv,
  901. struct vmw_framebuffer *vfb,
  902. struct vmw_surface *surface,
  903. uint32_t sid,
  904. int32_t destX, int32_t destY,
  905. struct drm_vmw_rect *clips,
  906. uint32_t num_clips)
  907. {
  908. struct vmw_display_unit *units[VMWGFX_NUM_DISPLAY_UNITS];
  909. struct drm_crtc *crtc;
  910. size_t fifo_size;
  911. int i, k, num_units;
  912. int ret = 0; /* silence warning */
  913. int left, right, top, bottom;
  914. struct {
  915. SVGA3dCmdHeader header;
  916. SVGA3dCmdBlitSurfaceToScreen body;
  917. } *cmd;
  918. SVGASignedRect *blits;
  919. num_units = 0;
  920. list_for_each_entry(crtc, &dev_priv->dev->mode_config.crtc_list, head) {
  921. if (crtc->fb != &vfb->base)
  922. continue;
  923. units[num_units++] = vmw_crtc_to_du(crtc);
  924. }
  925. BUG_ON(surface == NULL);
  926. BUG_ON(!clips || !num_clips);
  927. fifo_size = sizeof(*cmd) + sizeof(SVGASignedRect) * num_clips;
  928. cmd = kmalloc(fifo_size, GFP_KERNEL);
  929. if (unlikely(cmd == NULL)) {
  930. DRM_ERROR("Failed to allocate temporary fifo memory.\n");
  931. return -ENOMEM;
  932. }
  933. left = clips->x;
  934. right = clips->x + clips->w;
  935. top = clips->y;
  936. bottom = clips->y + clips->h;
  937. for (i = 1; i < num_clips; i++) {
  938. left = min_t(int, left, (int)clips[i].x);
  939. right = max_t(int, right, (int)clips[i].x + clips[i].w);
  940. top = min_t(int, top, (int)clips[i].y);
  941. bottom = max_t(int, bottom, (int)clips[i].y + clips[i].h);
  942. }
  943. /* only need to do this once */
  944. memset(cmd, 0, fifo_size);
  945. cmd->header.id = cpu_to_le32(SVGA_3D_CMD_BLIT_SURFACE_TO_SCREEN);
  946. cmd->header.size = cpu_to_le32(fifo_size - sizeof(cmd->header));
  947. cmd->body.srcRect.left = left;
  948. cmd->body.srcRect.right = right;
  949. cmd->body.srcRect.top = top;
  950. cmd->body.srcRect.bottom = bottom;
  951. blits = (SVGASignedRect *)&cmd[1];
  952. for (i = 0; i < num_clips; i++) {
  953. blits[i].left = clips[i].x - left;
  954. blits[i].right = clips[i].x + clips[i].w - left;
  955. blits[i].top = clips[i].y - top;
  956. blits[i].bottom = clips[i].y + clips[i].h - top;
  957. }
  958. for (k = 0; k < num_units; k++) {
  959. struct vmw_display_unit *unit = units[k];
  960. int clip_x1 = left + destX - unit->crtc.x;
  961. int clip_y1 = top + destY - unit->crtc.y;
  962. int clip_x2 = right + destX - unit->crtc.x;
  963. int clip_y2 = bottom + destY - unit->crtc.y;
  964. /* skip any crtcs that misses the clip region */
  965. if (clip_x1 >= unit->crtc.mode.hdisplay ||
  966. clip_y1 >= unit->crtc.mode.vdisplay ||
  967. clip_x2 <= 0 || clip_y2 <= 0)
  968. continue;
  969. /* need to reset sid as it is changed by execbuf */
  970. cmd->body.srcImage.sid = sid;
  971. cmd->body.destScreenId = unit->unit;
  972. /*
  973. * The blit command is a lot more resilient then the
  974. * readback command when it comes to clip rects. So its
  975. * okay to go out of bounds.
  976. */
  977. cmd->body.destRect.left = clip_x1;
  978. cmd->body.destRect.right = clip_x2;
  979. cmd->body.destRect.top = clip_y1;
  980. cmd->body.destRect.bottom = clip_y2;
  981. ret = vmw_execbuf_process(file_priv, dev_priv, NULL, cmd,
  982. fifo_size, 0, NULL);
  983. if (unlikely(ret != 0))
  984. break;
  985. }
  986. kfree(cmd);
  987. return ret;
  988. }
  989. int vmw_kms_readback(struct vmw_private *dev_priv,
  990. struct drm_file *file_priv,
  991. struct vmw_framebuffer *vfb,
  992. struct drm_vmw_fence_rep __user *user_fence_rep,
  993. struct drm_vmw_rect *clips,
  994. uint32_t num_clips)
  995. {
  996. struct vmw_framebuffer_dmabuf *vfbd =
  997. vmw_framebuffer_to_vfbd(&vfb->base);
  998. struct vmw_dma_buffer *dmabuf = vfbd->buffer;
  999. struct vmw_display_unit *units[VMWGFX_NUM_DISPLAY_UNITS];
  1000. struct drm_crtc *crtc;
  1001. size_t fifo_size;
  1002. int i, k, ret, num_units, blits_pos;
  1003. struct {
  1004. uint32_t header;
  1005. SVGAFifoCmdDefineGMRFB body;
  1006. } *cmd;
  1007. struct {
  1008. uint32_t header;
  1009. SVGAFifoCmdBlitScreenToGMRFB body;
  1010. } *blits;
  1011. num_units = 0;
  1012. list_for_each_entry(crtc, &dev_priv->dev->mode_config.crtc_list, head) {
  1013. if (crtc->fb != &vfb->base)
  1014. continue;
  1015. units[num_units++] = vmw_crtc_to_du(crtc);
  1016. }
  1017. BUG_ON(dmabuf == NULL);
  1018. BUG_ON(!clips || !num_clips);
  1019. /* take a safe guess at fifo size */
  1020. fifo_size = sizeof(*cmd) + sizeof(*blits) * num_clips * num_units;
  1021. cmd = kmalloc(fifo_size, GFP_KERNEL);
  1022. if (unlikely(cmd == NULL)) {
  1023. DRM_ERROR("Failed to allocate temporary fifo memory.\n");
  1024. return -ENOMEM;
  1025. }
  1026. memset(cmd, 0, fifo_size);
  1027. cmd->header = SVGA_CMD_DEFINE_GMRFB;
  1028. cmd->body.format.bitsPerPixel = vfb->base.bits_per_pixel;
  1029. cmd->body.format.colorDepth = vfb->base.depth;
  1030. cmd->body.format.reserved = 0;
  1031. cmd->body.bytesPerLine = vfb->base.pitch;
  1032. cmd->body.ptr.gmrId = vfb->user_handle;
  1033. cmd->body.ptr.offset = 0;
  1034. blits = (void *)&cmd[1];
  1035. blits_pos = 0;
  1036. for (i = 0; i < num_units; i++) {
  1037. struct drm_vmw_rect *c = clips;
  1038. for (k = 0; k < num_clips; k++, c++) {
  1039. /* transform clip coords to crtc origin based coords */
  1040. int clip_x1 = c->x - units[i]->crtc.x;
  1041. int clip_x2 = c->x - units[i]->crtc.x + c->w;
  1042. int clip_y1 = c->y - units[i]->crtc.y;
  1043. int clip_y2 = c->y - units[i]->crtc.y + c->h;
  1044. int dest_x = c->x;
  1045. int dest_y = c->y;
  1046. /* compensate for clipping, we negate
  1047. * a negative number and add that.
  1048. */
  1049. if (clip_x1 < 0)
  1050. dest_x += -clip_x1;
  1051. if (clip_y1 < 0)
  1052. dest_y += -clip_y1;
  1053. /* clip */
  1054. clip_x1 = max(clip_x1, 0);
  1055. clip_y1 = max(clip_y1, 0);
  1056. clip_x2 = min(clip_x2, units[i]->crtc.mode.hdisplay);
  1057. clip_y2 = min(clip_y2, units[i]->crtc.mode.vdisplay);
  1058. /* and cull any rects that misses the crtc */
  1059. if (clip_x1 >= units[i]->crtc.mode.hdisplay ||
  1060. clip_y1 >= units[i]->crtc.mode.vdisplay ||
  1061. clip_x2 <= 0 || clip_y2 <= 0)
  1062. continue;
  1063. blits[blits_pos].header = SVGA_CMD_BLIT_SCREEN_TO_GMRFB;
  1064. blits[blits_pos].body.srcScreenId = units[i]->unit;
  1065. blits[blits_pos].body.destOrigin.x = dest_x;
  1066. blits[blits_pos].body.destOrigin.y = dest_y;
  1067. blits[blits_pos].body.srcRect.left = clip_x1;
  1068. blits[blits_pos].body.srcRect.top = clip_y1;
  1069. blits[blits_pos].body.srcRect.right = clip_x2;
  1070. blits[blits_pos].body.srcRect.bottom = clip_y2;
  1071. blits_pos++;
  1072. }
  1073. }
  1074. /* reset size here and use calculated exact size from loops */
  1075. fifo_size = sizeof(*cmd) + sizeof(*blits) * blits_pos;
  1076. ret = vmw_execbuf_process(file_priv, dev_priv, NULL, cmd, fifo_size,
  1077. 0, user_fence_rep);
  1078. kfree(cmd);
  1079. return ret;
  1080. }
  1081. int vmw_kms_init(struct vmw_private *dev_priv)
  1082. {
  1083. struct drm_device *dev = dev_priv->dev;
  1084. int ret;
  1085. drm_mode_config_init(dev);
  1086. dev->mode_config.funcs = &vmw_kms_funcs;
  1087. dev->mode_config.min_width = 1;
  1088. dev->mode_config.min_height = 1;
  1089. /* assumed largest fb size */
  1090. dev->mode_config.max_width = 8192;
  1091. dev->mode_config.max_height = 8192;
  1092. ret = vmw_kms_init_screen_object_display(dev_priv);
  1093. if (ret) /* Fallback */
  1094. (void)vmw_kms_init_legacy_display_system(dev_priv);
  1095. return 0;
  1096. }
  1097. int vmw_kms_close(struct vmw_private *dev_priv)
  1098. {
  1099. /*
  1100. * Docs says we should take the lock before calling this function
  1101. * but since it destroys encoders and our destructor calls
  1102. * drm_encoder_cleanup which takes the lock we deadlock.
  1103. */
  1104. drm_mode_config_cleanup(dev_priv->dev);
  1105. if (dev_priv->sou_priv)
  1106. vmw_kms_close_screen_object_display(dev_priv);
  1107. else
  1108. vmw_kms_close_legacy_display_system(dev_priv);
  1109. return 0;
  1110. }
  1111. int vmw_kms_cursor_bypass_ioctl(struct drm_device *dev, void *data,
  1112. struct drm_file *file_priv)
  1113. {
  1114. struct drm_vmw_cursor_bypass_arg *arg = data;
  1115. struct vmw_display_unit *du;
  1116. struct drm_mode_object *obj;
  1117. struct drm_crtc *crtc;
  1118. int ret = 0;
  1119. mutex_lock(&dev->mode_config.mutex);
  1120. if (arg->flags & DRM_VMW_CURSOR_BYPASS_ALL) {
  1121. list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
  1122. du = vmw_crtc_to_du(crtc);
  1123. du->hotspot_x = arg->xhot;
  1124. du->hotspot_y = arg->yhot;
  1125. }
  1126. mutex_unlock(&dev->mode_config.mutex);
  1127. return 0;
  1128. }
  1129. obj = drm_mode_object_find(dev, arg->crtc_id, DRM_MODE_OBJECT_CRTC);
  1130. if (!obj) {
  1131. ret = -EINVAL;
  1132. goto out;
  1133. }
  1134. crtc = obj_to_crtc(obj);
  1135. du = vmw_crtc_to_du(crtc);
  1136. du->hotspot_x = arg->xhot;
  1137. du->hotspot_y = arg->yhot;
  1138. out:
  1139. mutex_unlock(&dev->mode_config.mutex);
  1140. return ret;
  1141. }
  1142. int vmw_kms_write_svga(struct vmw_private *vmw_priv,
  1143. unsigned width, unsigned height, unsigned pitch,
  1144. unsigned bpp, unsigned depth)
  1145. {
  1146. if (vmw_priv->capabilities & SVGA_CAP_PITCHLOCK)
  1147. vmw_write(vmw_priv, SVGA_REG_PITCHLOCK, pitch);
  1148. else if (vmw_fifo_have_pitchlock(vmw_priv))
  1149. iowrite32(pitch, vmw_priv->mmio_virt + SVGA_FIFO_PITCHLOCK);
  1150. vmw_write(vmw_priv, SVGA_REG_WIDTH, width);
  1151. vmw_write(vmw_priv, SVGA_REG_HEIGHT, height);
  1152. vmw_write(vmw_priv, SVGA_REG_BITS_PER_PIXEL, bpp);
  1153. if (vmw_read(vmw_priv, SVGA_REG_DEPTH) != depth) {
  1154. DRM_ERROR("Invalid depth %u for %u bpp, host expects %u\n",
  1155. depth, bpp, vmw_read(vmw_priv, SVGA_REG_DEPTH));
  1156. return -EINVAL;
  1157. }
  1158. return 0;
  1159. }
  1160. int vmw_kms_save_vga(struct vmw_private *vmw_priv)
  1161. {
  1162. struct vmw_vga_topology_state *save;
  1163. uint32_t i;
  1164. vmw_priv->vga_width = vmw_read(vmw_priv, SVGA_REG_WIDTH);
  1165. vmw_priv->vga_height = vmw_read(vmw_priv, SVGA_REG_HEIGHT);
  1166. vmw_priv->vga_bpp = vmw_read(vmw_priv, SVGA_REG_BITS_PER_PIXEL);
  1167. if (vmw_priv->capabilities & SVGA_CAP_PITCHLOCK)
  1168. vmw_priv->vga_pitchlock =
  1169. vmw_read(vmw_priv, SVGA_REG_PITCHLOCK);
  1170. else if (vmw_fifo_have_pitchlock(vmw_priv))
  1171. vmw_priv->vga_pitchlock = ioread32(vmw_priv->mmio_virt +
  1172. SVGA_FIFO_PITCHLOCK);
  1173. if (!(vmw_priv->capabilities & SVGA_CAP_DISPLAY_TOPOLOGY))
  1174. return 0;
  1175. vmw_priv->num_displays = vmw_read(vmw_priv,
  1176. SVGA_REG_NUM_GUEST_DISPLAYS);
  1177. if (vmw_priv->num_displays == 0)
  1178. vmw_priv->num_displays = 1;
  1179. for (i = 0; i < vmw_priv->num_displays; ++i) {
  1180. save = &vmw_priv->vga_save[i];
  1181. vmw_write(vmw_priv, SVGA_REG_DISPLAY_ID, i);
  1182. save->primary = vmw_read(vmw_priv, SVGA_REG_DISPLAY_IS_PRIMARY);
  1183. save->pos_x = vmw_read(vmw_priv, SVGA_REG_DISPLAY_POSITION_X);
  1184. save->pos_y = vmw_read(vmw_priv, SVGA_REG_DISPLAY_POSITION_Y);
  1185. save->width = vmw_read(vmw_priv, SVGA_REG_DISPLAY_WIDTH);
  1186. save->height = vmw_read(vmw_priv, SVGA_REG_DISPLAY_HEIGHT);
  1187. vmw_write(vmw_priv, SVGA_REG_DISPLAY_ID, SVGA_ID_INVALID);
  1188. if (i == 0 && vmw_priv->num_displays == 1 &&
  1189. save->width == 0 && save->height == 0) {
  1190. /*
  1191. * It should be fairly safe to assume that these
  1192. * values are uninitialized.
  1193. */
  1194. save->width = vmw_priv->vga_width - save->pos_x;
  1195. save->height = vmw_priv->vga_height - save->pos_y;
  1196. }
  1197. }
  1198. return 0;
  1199. }
  1200. int vmw_kms_restore_vga(struct vmw_private *vmw_priv)
  1201. {
  1202. struct vmw_vga_topology_state *save;
  1203. uint32_t i;
  1204. vmw_write(vmw_priv, SVGA_REG_WIDTH, vmw_priv->vga_width);
  1205. vmw_write(vmw_priv, SVGA_REG_HEIGHT, vmw_priv->vga_height);
  1206. vmw_write(vmw_priv, SVGA_REG_BITS_PER_PIXEL, vmw_priv->vga_bpp);
  1207. if (vmw_priv->capabilities & SVGA_CAP_PITCHLOCK)
  1208. vmw_write(vmw_priv, SVGA_REG_PITCHLOCK,
  1209. vmw_priv->vga_pitchlock);
  1210. else if (vmw_fifo_have_pitchlock(vmw_priv))
  1211. iowrite32(vmw_priv->vga_pitchlock,
  1212. vmw_priv->mmio_virt + SVGA_FIFO_PITCHLOCK);
  1213. if (!(vmw_priv->capabilities & SVGA_CAP_DISPLAY_TOPOLOGY))
  1214. return 0;
  1215. for (i = 0; i < vmw_priv->num_displays; ++i) {
  1216. save = &vmw_priv->vga_save[i];
  1217. vmw_write(vmw_priv, SVGA_REG_DISPLAY_ID, i);
  1218. vmw_write(vmw_priv, SVGA_REG_DISPLAY_IS_PRIMARY, save->primary);
  1219. vmw_write(vmw_priv, SVGA_REG_DISPLAY_POSITION_X, save->pos_x);
  1220. vmw_write(vmw_priv, SVGA_REG_DISPLAY_POSITION_Y, save->pos_y);
  1221. vmw_write(vmw_priv, SVGA_REG_DISPLAY_WIDTH, save->width);
  1222. vmw_write(vmw_priv, SVGA_REG_DISPLAY_HEIGHT, save->height);
  1223. vmw_write(vmw_priv, SVGA_REG_DISPLAY_ID, SVGA_ID_INVALID);
  1224. }
  1225. return 0;
  1226. }
  1227. bool vmw_kms_validate_mode_vram(struct vmw_private *dev_priv,
  1228. uint32_t pitch,
  1229. uint32_t height)
  1230. {
  1231. return ((u64) pitch * (u64) height) < (u64) dev_priv->vram_size;
  1232. }
  1233. /**
  1234. * Function called by DRM code called with vbl_lock held.
  1235. */
  1236. u32 vmw_get_vblank_counter(struct drm_device *dev, int crtc)
  1237. {
  1238. return 0;
  1239. }
  1240. /**
  1241. * Function called by DRM code called with vbl_lock held.
  1242. */
  1243. int vmw_enable_vblank(struct drm_device *dev, int crtc)
  1244. {
  1245. return -ENOSYS;
  1246. }
  1247. /**
  1248. * Function called by DRM code called with vbl_lock held.
  1249. */
  1250. void vmw_disable_vblank(struct drm_device *dev, int crtc)
  1251. {
  1252. }
  1253. /*
  1254. * Small shared kms functions.
  1255. */
  1256. int vmw_du_update_layout(struct vmw_private *dev_priv, unsigned num,
  1257. struct drm_vmw_rect *rects)
  1258. {
  1259. struct drm_device *dev = dev_priv->dev;
  1260. struct vmw_display_unit *du;
  1261. struct drm_connector *con;
  1262. mutex_lock(&dev->mode_config.mutex);
  1263. #if 0
  1264. {
  1265. unsigned int i;
  1266. DRM_INFO("%s: new layout ", __func__);
  1267. for (i = 0; i < num; i++)
  1268. DRM_INFO("(%i, %i %ux%u) ", rects[i].x, rects[i].y,
  1269. rects[i].w, rects[i].h);
  1270. DRM_INFO("\n");
  1271. }
  1272. #endif
  1273. list_for_each_entry(con, &dev->mode_config.connector_list, head) {
  1274. du = vmw_connector_to_du(con);
  1275. if (num > du->unit) {
  1276. du->pref_width = rects[du->unit].w;
  1277. du->pref_height = rects[du->unit].h;
  1278. du->pref_active = true;
  1279. du->gui_x = rects[du->unit].x;
  1280. du->gui_y = rects[du->unit].y;
  1281. } else {
  1282. du->pref_width = 800;
  1283. du->pref_height = 600;
  1284. du->pref_active = false;
  1285. }
  1286. con->status = vmw_du_connector_detect(con, true);
  1287. }
  1288. mutex_unlock(&dev->mode_config.mutex);
  1289. return 0;
  1290. }
  1291. void vmw_du_crtc_save(struct drm_crtc *crtc)
  1292. {
  1293. }
  1294. void vmw_du_crtc_restore(struct drm_crtc *crtc)
  1295. {
  1296. }
  1297. void vmw_du_crtc_gamma_set(struct drm_crtc *crtc,
  1298. u16 *r, u16 *g, u16 *b,
  1299. uint32_t start, uint32_t size)
  1300. {
  1301. struct vmw_private *dev_priv = vmw_priv(crtc->dev);
  1302. int i;
  1303. for (i = 0; i < size; i++) {
  1304. DRM_DEBUG("%d r/g/b = 0x%04x / 0x%04x / 0x%04x\n", i,
  1305. r[i], g[i], b[i]);
  1306. vmw_write(dev_priv, SVGA_PALETTE_BASE + i * 3 + 0, r[i] >> 8);
  1307. vmw_write(dev_priv, SVGA_PALETTE_BASE + i * 3 + 1, g[i] >> 8);
  1308. vmw_write(dev_priv, SVGA_PALETTE_BASE + i * 3 + 2, b[i] >> 8);
  1309. }
  1310. }
  1311. void vmw_du_connector_dpms(struct drm_connector *connector, int mode)
  1312. {
  1313. }
  1314. void vmw_du_connector_save(struct drm_connector *connector)
  1315. {
  1316. }
  1317. void vmw_du_connector_restore(struct drm_connector *connector)
  1318. {
  1319. }
  1320. enum drm_connector_status
  1321. vmw_du_connector_detect(struct drm_connector *connector, bool force)
  1322. {
  1323. uint32_t num_displays;
  1324. struct drm_device *dev = connector->dev;
  1325. struct vmw_private *dev_priv = vmw_priv(dev);
  1326. struct vmw_display_unit *du = vmw_connector_to_du(connector);
  1327. mutex_lock(&dev_priv->hw_mutex);
  1328. num_displays = vmw_read(dev_priv, SVGA_REG_NUM_DISPLAYS);
  1329. mutex_unlock(&dev_priv->hw_mutex);
  1330. return ((vmw_connector_to_du(connector)->unit < num_displays &&
  1331. du->pref_active) ?
  1332. connector_status_connected : connector_status_disconnected);
  1333. }
  1334. static struct drm_display_mode vmw_kms_connector_builtin[] = {
  1335. /* 640x480@60Hz */
  1336. { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 25175, 640, 656,
  1337. 752, 800, 0, 480, 489, 492, 525, 0,
  1338. DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
  1339. /* 800x600@60Hz */
  1340. { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 40000, 800, 840,
  1341. 968, 1056, 0, 600, 601, 605, 628, 0,
  1342. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1343. /* 1024x768@60Hz */
  1344. { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 65000, 1024, 1048,
  1345. 1184, 1344, 0, 768, 771, 777, 806, 0,
  1346. DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
  1347. /* 1152x864@75Hz */
  1348. { DRM_MODE("1152x864", DRM_MODE_TYPE_DRIVER, 108000, 1152, 1216,
  1349. 1344, 1600, 0, 864, 865, 868, 900, 0,
  1350. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1351. /* 1280x768@60Hz */
  1352. { DRM_MODE("1280x768", DRM_MODE_TYPE_DRIVER, 79500, 1280, 1344,
  1353. 1472, 1664, 0, 768, 771, 778, 798, 0,
  1354. DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1355. /* 1280x800@60Hz */
  1356. { DRM_MODE("1280x800", DRM_MODE_TYPE_DRIVER, 83500, 1280, 1352,
  1357. 1480, 1680, 0, 800, 803, 809, 831, 0,
  1358. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
  1359. /* 1280x960@60Hz */
  1360. { DRM_MODE("1280x960", DRM_MODE_TYPE_DRIVER, 108000, 1280, 1376,
  1361. 1488, 1800, 0, 960, 961, 964, 1000, 0,
  1362. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1363. /* 1280x1024@60Hz */
  1364. { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 108000, 1280, 1328,
  1365. 1440, 1688, 0, 1024, 1025, 1028, 1066, 0,
  1366. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1367. /* 1360x768@60Hz */
  1368. { DRM_MODE("1360x768", DRM_MODE_TYPE_DRIVER, 85500, 1360, 1424,
  1369. 1536, 1792, 0, 768, 771, 777, 795, 0,
  1370. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1371. /* 1440x1050@60Hz */
  1372. { DRM_MODE("1400x1050", DRM_MODE_TYPE_DRIVER, 121750, 1400, 1488,
  1373. 1632, 1864, 0, 1050, 1053, 1057, 1089, 0,
  1374. DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1375. /* 1440x900@60Hz */
  1376. { DRM_MODE("1440x900", DRM_MODE_TYPE_DRIVER, 106500, 1440, 1520,
  1377. 1672, 1904, 0, 900, 903, 909, 934, 0,
  1378. DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1379. /* 1600x1200@60Hz */
  1380. { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 162000, 1600, 1664,
  1381. 1856, 2160, 0, 1200, 1201, 1204, 1250, 0,
  1382. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1383. /* 1680x1050@60Hz */
  1384. { DRM_MODE("1680x1050", DRM_MODE_TYPE_DRIVER, 146250, 1680, 1784,
  1385. 1960, 2240, 0, 1050, 1053, 1059, 1089, 0,
  1386. DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1387. /* 1792x1344@60Hz */
  1388. { DRM_MODE("1792x1344", DRM_MODE_TYPE_DRIVER, 204750, 1792, 1920,
  1389. 2120, 2448, 0, 1344, 1345, 1348, 1394, 0,
  1390. DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1391. /* 1853x1392@60Hz */
  1392. { DRM_MODE("1856x1392", DRM_MODE_TYPE_DRIVER, 218250, 1856, 1952,
  1393. 2176, 2528, 0, 1392, 1393, 1396, 1439, 0,
  1394. DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1395. /* 1920x1200@60Hz */
  1396. { DRM_MODE("1920x1200", DRM_MODE_TYPE_DRIVER, 193250, 1920, 2056,
  1397. 2256, 2592, 0, 1200, 1203, 1209, 1245, 0,
  1398. DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1399. /* 1920x1440@60Hz */
  1400. { DRM_MODE("1920x1440", DRM_MODE_TYPE_DRIVER, 234000, 1920, 2048,
  1401. 2256, 2600, 0, 1440, 1441, 1444, 1500, 0,
  1402. DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1403. /* 2560x1600@60Hz */
  1404. { DRM_MODE("2560x1600", DRM_MODE_TYPE_DRIVER, 348500, 2560, 2752,
  1405. 3032, 3504, 0, 1600, 1603, 1609, 1658, 0,
  1406. DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1407. /* Terminate */
  1408. { DRM_MODE("", 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0) },
  1409. };
  1410. /**
  1411. * vmw_guess_mode_timing - Provide fake timings for a
  1412. * 60Hz vrefresh mode.
  1413. *
  1414. * @mode - Pointer to a struct drm_display_mode with hdisplay and vdisplay
  1415. * members filled in.
  1416. */
  1417. static void vmw_guess_mode_timing(struct drm_display_mode *mode)
  1418. {
  1419. mode->hsync_start = mode->hdisplay + 50;
  1420. mode->hsync_end = mode->hsync_start + 50;
  1421. mode->htotal = mode->hsync_end + 50;
  1422. mode->vsync_start = mode->vdisplay + 50;
  1423. mode->vsync_end = mode->vsync_start + 50;
  1424. mode->vtotal = mode->vsync_end + 50;
  1425. mode->clock = (u32)mode->htotal * (u32)mode->vtotal / 100 * 6;
  1426. mode->vrefresh = drm_mode_vrefresh(mode);
  1427. }
  1428. int vmw_du_connector_fill_modes(struct drm_connector *connector,
  1429. uint32_t max_width, uint32_t max_height)
  1430. {
  1431. struct vmw_display_unit *du = vmw_connector_to_du(connector);
  1432. struct drm_device *dev = connector->dev;
  1433. struct vmw_private *dev_priv = vmw_priv(dev);
  1434. struct drm_display_mode *mode = NULL;
  1435. struct drm_display_mode *bmode;
  1436. struct drm_display_mode prefmode = { DRM_MODE("preferred",
  1437. DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED,
  1438. 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
  1439. DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC)
  1440. };
  1441. int i;
  1442. /* Add preferred mode */
  1443. {
  1444. mode = drm_mode_duplicate(dev, &prefmode);
  1445. if (!mode)
  1446. return 0;
  1447. mode->hdisplay = du->pref_width;
  1448. mode->vdisplay = du->pref_height;
  1449. vmw_guess_mode_timing(mode);
  1450. if (vmw_kms_validate_mode_vram(dev_priv, mode->hdisplay * 2,
  1451. mode->vdisplay)) {
  1452. drm_mode_probed_add(connector, mode);
  1453. } else {
  1454. drm_mode_destroy(dev, mode);
  1455. mode = NULL;
  1456. }
  1457. if (du->pref_mode) {
  1458. list_del_init(&du->pref_mode->head);
  1459. drm_mode_destroy(dev, du->pref_mode);
  1460. }
  1461. /* mode might be null here, this is intended */
  1462. du->pref_mode = mode;
  1463. }
  1464. for (i = 0; vmw_kms_connector_builtin[i].type != 0; i++) {
  1465. bmode = &vmw_kms_connector_builtin[i];
  1466. if (bmode->hdisplay > max_width ||
  1467. bmode->vdisplay > max_height)
  1468. continue;
  1469. if (!vmw_kms_validate_mode_vram(dev_priv, bmode->hdisplay * 2,
  1470. bmode->vdisplay))
  1471. continue;
  1472. mode = drm_mode_duplicate(dev, bmode);
  1473. if (!mode)
  1474. return 0;
  1475. mode->vrefresh = drm_mode_vrefresh(mode);
  1476. drm_mode_probed_add(connector, mode);
  1477. }
  1478. /* Move the prefered mode first, help apps pick the right mode. */
  1479. if (du->pref_mode)
  1480. list_move(&du->pref_mode->head, &connector->probed_modes);
  1481. drm_mode_connector_list_update(connector);
  1482. return 1;
  1483. }
  1484. int vmw_du_connector_set_property(struct drm_connector *connector,
  1485. struct drm_property *property,
  1486. uint64_t val)
  1487. {
  1488. return 0;
  1489. }
  1490. int vmw_kms_update_layout_ioctl(struct drm_device *dev, void *data,
  1491. struct drm_file *file_priv)
  1492. {
  1493. struct vmw_private *dev_priv = vmw_priv(dev);
  1494. struct drm_vmw_update_layout_arg *arg =
  1495. (struct drm_vmw_update_layout_arg *)data;
  1496. struct vmw_master *vmaster = vmw_master(file_priv->master);
  1497. void __user *user_rects;
  1498. struct drm_vmw_rect *rects;
  1499. unsigned rects_size;
  1500. int ret;
  1501. int i;
  1502. struct drm_mode_config *mode_config = &dev->mode_config;
  1503. ret = ttm_read_lock(&vmaster->lock, true);
  1504. if (unlikely(ret != 0))
  1505. return ret;
  1506. if (!arg->num_outputs) {
  1507. struct drm_vmw_rect def_rect = {0, 0, 800, 600};
  1508. vmw_du_update_layout(dev_priv, 1, &def_rect);
  1509. goto out_unlock;
  1510. }
  1511. rects_size = arg->num_outputs * sizeof(struct drm_vmw_rect);
  1512. rects = kcalloc(arg->num_outputs, sizeof(struct drm_vmw_rect),
  1513. GFP_KERNEL);
  1514. if (unlikely(!rects)) {
  1515. ret = -ENOMEM;
  1516. goto out_unlock;
  1517. }
  1518. user_rects = (void __user *)(unsigned long)arg->rects;
  1519. ret = copy_from_user(rects, user_rects, rects_size);
  1520. if (unlikely(ret != 0)) {
  1521. DRM_ERROR("Failed to get rects.\n");
  1522. ret = -EFAULT;
  1523. goto out_free;
  1524. }
  1525. for (i = 0; i < arg->num_outputs; ++i) {
  1526. if (rects[i].x < 0 ||
  1527. rects[i].y < 0 ||
  1528. rects[i].x + rects[i].w > mode_config->max_width ||
  1529. rects[i].y + rects[i].h > mode_config->max_height) {
  1530. DRM_ERROR("Invalid GUI layout.\n");
  1531. ret = -EINVAL;
  1532. goto out_free;
  1533. }
  1534. }
  1535. vmw_du_update_layout(dev_priv, arg->num_outputs, rects);
  1536. out_free:
  1537. kfree(rects);
  1538. out_unlock:
  1539. ttm_read_unlock(&vmaster->lock);
  1540. return ret;
  1541. }