pgtable_32.h 6.6 KB

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  1. #ifndef _I386_PGTABLE_H
  2. #define _I386_PGTABLE_H
  3. /*
  4. * The Linux memory management assumes a three-level page table setup. On
  5. * the i386, we use that, but "fold" the mid level into the top-level page
  6. * table, so that we physically have the same two-level page table as the
  7. * i386 mmu expects.
  8. *
  9. * This file contains the functions and defines necessary to modify and use
  10. * the i386 page table tree.
  11. */
  12. #ifndef __ASSEMBLY__
  13. #include <asm/processor.h>
  14. #include <asm/fixmap.h>
  15. #include <linux/threads.h>
  16. #include <asm/paravirt.h>
  17. #include <linux/bitops.h>
  18. #include <linux/slab.h>
  19. #include <linux/list.h>
  20. #include <linux/spinlock.h>
  21. struct mm_struct;
  22. struct vm_area_struct;
  23. extern pgd_t swapper_pg_dir[1024];
  24. static inline void pgtable_cache_init(void) { }
  25. static inline void check_pgt_cache(void) { }
  26. void paging_init(void);
  27. /*
  28. * The Linux x86 paging architecture is 'compile-time dual-mode', it
  29. * implements both the traditional 2-level x86 page tables and the
  30. * newer 3-level PAE-mode page tables.
  31. */
  32. #ifdef CONFIG_X86_PAE
  33. # include <asm/pgtable-3level-defs.h>
  34. # define PMD_SIZE (1UL << PMD_SHIFT)
  35. # define PMD_MASK (~(PMD_SIZE - 1))
  36. #else
  37. # include <asm/pgtable-2level-defs.h>
  38. #endif
  39. #define PGDIR_SIZE (1UL << PGDIR_SHIFT)
  40. #define PGDIR_MASK (~(PGDIR_SIZE - 1))
  41. /* Just any arbitrary offset to the start of the vmalloc VM area: the
  42. * current 8MB value just means that there will be a 8MB "hole" after the
  43. * physical memory until the kernel virtual memory starts. That means that
  44. * any out-of-bounds memory accesses will hopefully be caught.
  45. * The vmalloc() routines leaves a hole of 4kB between each vmalloced
  46. * area for the same reason. ;)
  47. */
  48. #define VMALLOC_OFFSET (8 * 1024 * 1024)
  49. #define VMALLOC_START (((unsigned long)high_memory + 2 * VMALLOC_OFFSET - 1) \
  50. & ~(VMALLOC_OFFSET - 1))
  51. #ifdef CONFIG_X86_PAE
  52. #define LAST_PKMAP 512
  53. #else
  54. #define LAST_PKMAP 1024
  55. #endif
  56. #define PKMAP_BASE ((FIXADDR_BOOT_START - PAGE_SIZE * (LAST_PKMAP + 1)) \
  57. & PMD_MASK)
  58. #ifdef CONFIG_HIGHMEM
  59. # define VMALLOC_END (PKMAP_BASE - 2 * PAGE_SIZE)
  60. #else
  61. # define VMALLOC_END (FIXADDR_START - 2 * PAGE_SIZE)
  62. #endif
  63. /*
  64. * Define this if things work differently on an i386 and an i486:
  65. * it will (on an i486) warn about kernel memory accesses that are
  66. * done without a 'access_ok(VERIFY_WRITE,..)'
  67. */
  68. #undef TEST_ACCESS_OK
  69. /* The boot page tables (all created as a single array) */
  70. extern unsigned long pg0[];
  71. #define pte_present(x) ((x).pte_low & (_PAGE_PRESENT | _PAGE_PROTNONE))
  72. /* To avoid harmful races, pmd_none(x) should check only the lower when PAE */
  73. #define pmd_none(x) (!(unsigned long)pmd_val((x)))
  74. #define pmd_present(x) (pmd_val((x)) & _PAGE_PRESENT)
  75. #define pmd_bad(x) ((pmd_val(x) & (~PTE_MASK & ~_PAGE_USER)) != _KERNPG_TABLE)
  76. #define pages_to_mb(x) ((x) >> (20-PAGE_SHIFT))
  77. #ifdef CONFIG_X86_PAE
  78. # include <asm/pgtable-3level.h>
  79. #else
  80. # include <asm/pgtable-2level.h>
  81. #endif
  82. /*
  83. * Macro to mark a page protection value as "uncacheable".
  84. * On processors which do not support it, this is a no-op.
  85. */
  86. #define pgprot_noncached(prot) \
  87. ((boot_cpu_data.x86 > 3) \
  88. ? (__pgprot(pgprot_val(prot) | _PAGE_PCD | _PAGE_PWT)) \
  89. : (prot))
  90. /*
  91. * Conversion functions: convert a page and protection to a page entry,
  92. * and a page entry and page directory to the page they refer to.
  93. */
  94. #define mk_pte(page, pgprot) pfn_pte(page_to_pfn(page), (pgprot))
  95. /*
  96. * the pgd page can be thought of an array like this: pgd_t[PTRS_PER_PGD]
  97. *
  98. * this macro returns the index of the entry in the pgd page which would
  99. * control the given virtual address
  100. */
  101. #define pgd_index(address) (((address) >> PGDIR_SHIFT) & (PTRS_PER_PGD - 1))
  102. #define pgd_index_k(addr) pgd_index((addr))
  103. /*
  104. * pgd_offset() returns a (pgd_t *)
  105. * pgd_index() is used get the offset into the pgd page's array of pgd_t's;
  106. */
  107. #define pgd_offset(mm, address) ((mm)->pgd + pgd_index((address)))
  108. /*
  109. * a shortcut which implies the use of the kernel's pgd, instead
  110. * of a process's
  111. */
  112. #define pgd_offset_k(address) pgd_offset(&init_mm, (address))
  113. static inline int pud_large(pud_t pud) { return 0; }
  114. /*
  115. * the pmd page can be thought of an array like this: pmd_t[PTRS_PER_PMD]
  116. *
  117. * this macro returns the index of the entry in the pmd page which would
  118. * control the given virtual address
  119. */
  120. #define pmd_index(address) \
  121. (((address) >> PMD_SHIFT) & (PTRS_PER_PMD - 1))
  122. /*
  123. * the pte page can be thought of an array like this: pte_t[PTRS_PER_PTE]
  124. *
  125. * this macro returns the index of the entry in the pte page which would
  126. * control the given virtual address
  127. */
  128. #define pte_index(address) \
  129. (((address) >> PAGE_SHIFT) & (PTRS_PER_PTE - 1))
  130. #define pte_offset_kernel(dir, address) \
  131. ((pte_t *)pmd_page_vaddr(*(dir)) + pte_index((address)))
  132. #define pmd_page(pmd) (pfn_to_page(pmd_val((pmd)) >> PAGE_SHIFT))
  133. #define pmd_page_vaddr(pmd) \
  134. ((unsigned long)__va(pmd_val((pmd)) & PTE_MASK))
  135. #if defined(CONFIG_HIGHPTE)
  136. #define pte_offset_map(dir, address) \
  137. ((pte_t *)kmap_atomic_pte(pmd_page(*(dir)), KM_PTE0) + \
  138. pte_index((address)))
  139. #define pte_offset_map_nested(dir, address) \
  140. ((pte_t *)kmap_atomic_pte(pmd_page(*(dir)), KM_PTE1) + \
  141. pte_index((address)))
  142. #define pte_unmap(pte) kunmap_atomic((pte), KM_PTE0)
  143. #define pte_unmap_nested(pte) kunmap_atomic((pte), KM_PTE1)
  144. #else
  145. #define pte_offset_map(dir, address) \
  146. ((pte_t *)page_address(pmd_page(*(dir))) + pte_index((address)))
  147. #define pte_offset_map_nested(dir, address) pte_offset_map((dir), (address))
  148. #define pte_unmap(pte) do { } while (0)
  149. #define pte_unmap_nested(pte) do { } while (0)
  150. #endif
  151. /* Clear a kernel PTE and flush it from the TLB */
  152. #define kpte_clear_flush(ptep, vaddr) \
  153. do { \
  154. pte_clear(&init_mm, (vaddr), (ptep)); \
  155. __flush_tlb_one((vaddr)); \
  156. } while (0)
  157. /*
  158. * The i386 doesn't have any external MMU info: the kernel page
  159. * tables contain all the necessary information.
  160. */
  161. #define update_mmu_cache(vma, address, pte) do { } while (0)
  162. extern void native_pagetable_setup_start(pgd_t *base);
  163. extern void native_pagetable_setup_done(pgd_t *base);
  164. #ifndef CONFIG_PARAVIRT
  165. static inline void __init paravirt_pagetable_setup_start(pgd_t *base)
  166. {
  167. native_pagetable_setup_start(base);
  168. }
  169. static inline void __init paravirt_pagetable_setup_done(pgd_t *base)
  170. {
  171. native_pagetable_setup_done(base);
  172. }
  173. #endif /* !CONFIG_PARAVIRT */
  174. #endif /* !__ASSEMBLY__ */
  175. /*
  176. * kern_addr_valid() is (1) for FLATMEM and (0) for
  177. * SPARSEMEM and DISCONTIGMEM
  178. */
  179. #ifdef CONFIG_FLATMEM
  180. #define kern_addr_valid(addr) (1)
  181. #else
  182. #define kern_addr_valid(kaddr) (0)
  183. #endif
  184. #define io_remap_pfn_range(vma, vaddr, pfn, size, prot) \
  185. remap_pfn_range(vma, vaddr, pfn, size, prot)
  186. #endif /* _I386_PGTABLE_H */