dcr-native.h 3.2 KB

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  1. /*
  2. * (c) Copyright 2006 Benjamin Herrenschmidt, IBM Corp.
  3. * <benh@kernel.crashing.org>
  4. *
  5. * This program is free software; you can redistribute it and/or modify
  6. * it under the terms of the GNU General Public License as published by
  7. * the Free Software Foundation; either version 2 of the License, or
  8. * (at your option) any later version.
  9. *
  10. * This program is distributed in the hope that it will be useful,
  11. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  12. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See
  13. * the GNU General Public License for more details.
  14. *
  15. * You should have received a copy of the GNU General Public License
  16. * along with this program; if not, write to the Free Software
  17. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  18. */
  19. #ifndef _ASM_POWERPC_DCR_NATIVE_H
  20. #define _ASM_POWERPC_DCR_NATIVE_H
  21. #ifdef __KERNEL__
  22. #ifndef __ASSEMBLY__
  23. #include <linux/spinlock.h>
  24. typedef struct {
  25. unsigned int base;
  26. } dcr_host_t;
  27. #define DCR_MAP_OK(host) (1)
  28. #define dcr_map(dev, dcr_n, dcr_c) ((dcr_host_t){ .base = (dcr_n) })
  29. #define dcr_unmap(host, dcr_c) do {} while (0)
  30. #define dcr_read(host, dcr_n) mfdcr(dcr_n + host.base)
  31. #define dcr_write(host, dcr_n, value) mtdcr(dcr_n + host.base, value)
  32. /* Device Control Registers */
  33. void __mtdcr(int reg, unsigned int val);
  34. unsigned int __mfdcr(int reg);
  35. #define mfdcr(rn) \
  36. ({unsigned int rval; \
  37. if (__builtin_constant_p(rn)) \
  38. asm volatile("mfdcr %0," __stringify(rn) \
  39. : "=r" (rval)); \
  40. else \
  41. rval = __mfdcr(rn); \
  42. rval;})
  43. #define mtdcr(rn, v) \
  44. do { \
  45. if (__builtin_constant_p(rn)) \
  46. asm volatile("mtdcr " __stringify(rn) ",%0" \
  47. : : "r" (v)); \
  48. else \
  49. __mtdcr(rn, v); \
  50. } while (0)
  51. /* R/W of indirect DCRs make use of standard naming conventions for DCRs */
  52. extern spinlock_t dcr_ind_lock;
  53. static inline unsigned __mfdcri(int base_addr, int base_data, int reg)
  54. {
  55. unsigned long flags;
  56. unsigned int val;
  57. spin_lock_irqsave(&dcr_ind_lock, flags);
  58. __mtdcr(base_addr, reg);
  59. val = __mfdcr(base_data);
  60. spin_unlock_irqrestore(&dcr_ind_lock, flags);
  61. return val;
  62. }
  63. static inline void __mtdcri(int base_addr, int base_data, int reg,
  64. unsigned val)
  65. {
  66. unsigned long flags;
  67. spin_lock_irqsave(&dcr_ind_lock, flags);
  68. __mtdcr(base_addr, reg);
  69. __mtdcr(base_data, val);
  70. spin_unlock_irqrestore(&dcr_ind_lock, flags);
  71. }
  72. static inline void __dcri_clrset(int base_addr, int base_data, int reg,
  73. unsigned clr, unsigned set)
  74. {
  75. unsigned long flags;
  76. unsigned int val;
  77. spin_lock_irqsave(&dcr_ind_lock, flags);
  78. __mtdcr(base_addr, reg);
  79. val = (__mfdcr(base_data) & ~clr) | set;
  80. __mtdcr(base_data, val);
  81. spin_unlock_irqrestore(&dcr_ind_lock, flags);
  82. }
  83. #define mfdcri(base, reg) __mfdcri(DCRN_ ## base ## _CONFIG_ADDR, \
  84. DCRN_ ## base ## _CONFIG_DATA, \
  85. reg)
  86. #define mtdcri(base, reg, data) __mtdcri(DCRN_ ## base ## _CONFIG_ADDR, \
  87. DCRN_ ## base ## _CONFIG_DATA, \
  88. reg, data)
  89. #define dcri_clrset(base, reg, clr, set) __dcri_clrset(DCRN_ ## base ## _CONFIG_ADDR, \
  90. DCRN_ ## base ## _CONFIG_DATA, \
  91. reg, clr, set)
  92. #endif /* __ASSEMBLY__ */
  93. #endif /* __KERNEL__ */
  94. #endif /* _ASM_POWERPC_DCR_NATIVE_H */