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linux-vybrid_pu...
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arch
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arm
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mach-clps711x
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include
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mach
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autcpu12.h

autcpu12.h 2.3 KB
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  1. /*
    2. 

  2.  * AUTCPU12 specific defines
    3. 

  3.  *
    4. 

  4.  * (c) 2001 Thomas Gleixner, autronix automation <gleixner@autronix.de>
    5. 

  5.  *
    6. 

  6.  * This program is free software; you can redistribute it and/or modify
    7. 

  7.  * it under the terms of the GNU General Public License as published by
    8. 

  8.  * the Free Software Foundation; either version 2 of the License, or
    9. 

  9.  * (at your option) any later version.
    10. 

  10.  *
    11. 

  11.  * This program is distributed in the hope that it will be useful,
    12. 

  12.  * but WITHOUT ANY WARRANTY; without even the implied warranty of
    13. 

  13.  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
    14. 

  14.  * GNU General Public License for more details.
    15. 

  15.  *
    16. 

  16.  * You should have received a copy of the GNU General Public License
    17. 

  17.  * along with this program; if not, write to the Free Software
    18. 

  18.  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
    19. 

  19.  */
    20. 

  20. #ifndef __ASM_ARCH_AUTCPU12_H
    21. 

  21. #define __ASM_ARCH_AUTCPU12_H
    22. 

  22. 

  23. /*
    24. 

  24.  * The flash bank is wired to chip select 0
    25. 

  25.  */
    26. 

  26. #define AUTCPU12_PHYS_FLASH		CS0_PHYS_BASE		/* physical */
    27. 

  27. 

  28. /* offset for device specific information structure */
    29. 

  29. #define AUTCPU12_LCDINFO_OFFS		(0x00010000)	
    30. 

  30. 

  31. /* Videomemory in the internal SRAM (CS 6) */
    32. 

  32. #define AUTCPU12_PHYS_VIDEO		CS6_PHYS_BASE
    33. 

  33. 

  34. /*
    35. 

  35. * All special IO's are tied to CS1
    36. 

  36. */
    37. 

  37. #define AUTCPU12_PHYS_CHAR_LCD         	CS1_PHYS_BASE +0x00000000  /* physical */
    38. 

  38. 

  39. #define AUTCPU12_PHYS_NVRAM            	CS1_PHYS_BASE +0x02000000  /* physical */
    40. 

  40. 

  41. #define AUTCPU12_PHYS_CSAUX1           	CS1_PHYS_BASE +0x04000000  /* physical */
    42. 

  42. 

  43. #define AUTCPU12_PHYS_SMC              	CS1_PHYS_BASE +0x06000000  /* physical */
    44. 

  44. 

  45. #define AUTCPU12_PHYS_CAN              	CS1_PHYS_BASE +0x08000000  /* physical */
    46. 

  46. 

  47. #define AUTCPU12_PHYS_TOUCH            	CS1_PHYS_BASE +0x0A000000  /* physical */
    48. 

  48. 

  49. #define AUTCPU12_PHYS_IO               	CS1_PHYS_BASE +0x0C000000  /* physical */
    50. 

  50. 

  51. #define AUTCPU12_PHYS_LPT              	CS1_PHYS_BASE +0x0E000000  /* physical */
    52. 

  52. 

  53. /* 
    54. 

  54. * defines for smartmedia card access 
    55. 

  55. */
    56. 

  56. #define AUTCPU12_SMC_RDY		(1<<2)
    57. 

  57. #define AUTCPU12_SMC_ALE		(1<<3)
    58. 

  58. #define AUTCPU12_SMC_CLE  		(1<<4)
    59. 

  59. #define AUTCPU12_SMC_PORT_OFFSET	PBDR
    60. 

  60. #define AUTCPU12_SMC_SELECT_OFFSET 	0x10
    61. 

  61. /*
    62. 

  62. * defines for lcd contrast 
    63. 

  63. */
    64. 

  64. #define AUTCPU12_DPOT_PORT_OFFSET	PEDR
    65. 

  65. #define	AUTCPU12_DPOT_CS		(1<<0)
    66. 

  66. #define AUTCPU12_DPOT_CLK    		(1<<1)
    67. 

  67. #define	AUTCPU12_DPOT_UD		(1<<2)
    68. 

  68. 

  69. #endif
    70.