patch_intelhdmi.c 26 KB

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  1. /*
  2. *
  3. * patch_intelhdmi.c - Patch for Intel HDMI codecs
  4. *
  5. * Copyright(c) 2008 Intel Corporation. All rights reserved.
  6. *
  7. * Authors:
  8. * Jiang Zhe <zhe.jiang@intel.com>
  9. * Wu Fengguang <wfg@linux.intel.com>
  10. *
  11. * Maintained by:
  12. * Wu Fengguang <wfg@linux.intel.com>
  13. *
  14. * This program is free software; you can redistribute it and/or modify it
  15. * under the terms of the GNU General Public License as published by the Free
  16. * Software Foundation; either version 2 of the License, or (at your option)
  17. * any later version.
  18. *
  19. * This program is distributed in the hope that it will be useful, but
  20. * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
  21. * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
  22. * for more details.
  23. *
  24. * You should have received a copy of the GNU General Public License
  25. * along with this program; if not, write to the Free Software Foundation,
  26. * Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
  27. */
  28. #include <linux/init.h>
  29. #include <linux/delay.h>
  30. #include <linux/slab.h>
  31. #include <sound/core.h>
  32. #include "hda_codec.h"
  33. #include "hda_local.h"
  34. /*
  35. * The HDMI/DisplayPort configuration can be highly dynamic. A graphics device
  36. * could support two independent pipes, each of them can be connected to one or
  37. * more ports (DVI, HDMI or DisplayPort).
  38. *
  39. * The HDA correspondence of pipes/ports are converter/pin nodes.
  40. */
  41. #define INTEL_HDMI_CVTS 2
  42. #define INTEL_HDMI_PINS 3
  43. static char *intel_hdmi_pcm_names[INTEL_HDMI_CVTS] = {
  44. "INTEL HDMI 0",
  45. "INTEL HDMI 1",
  46. };
  47. struct intel_hdmi_spec {
  48. int num_cvts;
  49. int num_pins;
  50. hda_nid_t cvt[INTEL_HDMI_CVTS+1]; /* audio sources */
  51. hda_nid_t pin[INTEL_HDMI_PINS+1]; /* audio sinks */
  52. /*
  53. * source connection for each pin
  54. */
  55. hda_nid_t pin_cvt[INTEL_HDMI_PINS+1];
  56. /*
  57. * HDMI sink attached to each pin
  58. */
  59. struct hdmi_eld sink_eld[INTEL_HDMI_PINS];
  60. /*
  61. * export one pcm per pipe
  62. */
  63. struct hda_pcm pcm_rec[INTEL_HDMI_CVTS];
  64. };
  65. struct hdmi_audio_infoframe {
  66. u8 type; /* 0x84 */
  67. u8 ver; /* 0x01 */
  68. u8 len; /* 0x0a */
  69. u8 checksum; /* PB0 */
  70. u8 CC02_CT47; /* CC in bits 0:2, CT in 4:7 */
  71. u8 SS01_SF24;
  72. u8 CXT04;
  73. u8 CA;
  74. u8 LFEPBL01_LSV36_DM_INH7;
  75. u8 reserved[5]; /* PB6 - PB10 */
  76. };
  77. /*
  78. * CEA speaker placement:
  79. *
  80. * FLH FCH FRH
  81. * FLW FL FLC FC FRC FR FRW
  82. *
  83. * LFE
  84. * TC
  85. *
  86. * RL RLC RC RRC RR
  87. *
  88. * The Left/Right Surround channel _notions_ LS/RS in SMPTE 320M corresponds to
  89. * CEA RL/RR; The SMPTE channel _assignment_ C/LFE is swapped to CEA LFE/FC.
  90. */
  91. enum cea_speaker_placement {
  92. FL = (1 << 0), /* Front Left */
  93. FC = (1 << 1), /* Front Center */
  94. FR = (1 << 2), /* Front Right */
  95. FLC = (1 << 3), /* Front Left Center */
  96. FRC = (1 << 4), /* Front Right Center */
  97. RL = (1 << 5), /* Rear Left */
  98. RC = (1 << 6), /* Rear Center */
  99. RR = (1 << 7), /* Rear Right */
  100. RLC = (1 << 8), /* Rear Left Center */
  101. RRC = (1 << 9), /* Rear Right Center */
  102. LFE = (1 << 10), /* Low Frequency Effect */
  103. FLW = (1 << 11), /* Front Left Wide */
  104. FRW = (1 << 12), /* Front Right Wide */
  105. FLH = (1 << 13), /* Front Left High */
  106. FCH = (1 << 14), /* Front Center High */
  107. FRH = (1 << 15), /* Front Right High */
  108. TC = (1 << 16), /* Top Center */
  109. };
  110. /*
  111. * ELD SA bits in the CEA Speaker Allocation data block
  112. */
  113. static int eld_speaker_allocation_bits[] = {
  114. [0] = FL | FR,
  115. [1] = LFE,
  116. [2] = FC,
  117. [3] = RL | RR,
  118. [4] = RC,
  119. [5] = FLC | FRC,
  120. [6] = RLC | RRC,
  121. /* the following are not defined in ELD yet */
  122. [7] = FLW | FRW,
  123. [8] = FLH | FRH,
  124. [9] = TC,
  125. [10] = FCH,
  126. };
  127. struct cea_channel_speaker_allocation {
  128. int ca_index;
  129. int speakers[8];
  130. /* derived values, just for convenience */
  131. int channels;
  132. int spk_mask;
  133. };
  134. /*
  135. * This is an ordered list!
  136. *
  137. * The preceding ones have better chances to be selected by
  138. * hdmi_setup_channel_allocation().
  139. */
  140. static struct cea_channel_speaker_allocation channel_allocations[] = {
  141. /* channel: 8 7 6 5 4 3 2 1 */
  142. { .ca_index = 0x00, .speakers = { 0, 0, 0, 0, 0, 0, FR, FL } },
  143. /* 2.1 */
  144. { .ca_index = 0x01, .speakers = { 0, 0, 0, 0, 0, LFE, FR, FL } },
  145. /* Dolby Surround */
  146. { .ca_index = 0x02, .speakers = { 0, 0, 0, 0, FC, 0, FR, FL } },
  147. { .ca_index = 0x03, .speakers = { 0, 0, 0, 0, FC, LFE, FR, FL } },
  148. { .ca_index = 0x04, .speakers = { 0, 0, 0, RC, 0, 0, FR, FL } },
  149. { .ca_index = 0x05, .speakers = { 0, 0, 0, RC, 0, LFE, FR, FL } },
  150. { .ca_index = 0x06, .speakers = { 0, 0, 0, RC, FC, 0, FR, FL } },
  151. { .ca_index = 0x07, .speakers = { 0, 0, 0, RC, FC, LFE, FR, FL } },
  152. { .ca_index = 0x08, .speakers = { 0, 0, RR, RL, 0, 0, FR, FL } },
  153. { .ca_index = 0x09, .speakers = { 0, 0, RR, RL, 0, LFE, FR, FL } },
  154. { .ca_index = 0x0a, .speakers = { 0, 0, RR, RL, FC, 0, FR, FL } },
  155. /* 5.1 */
  156. { .ca_index = 0x0b, .speakers = { 0, 0, RR, RL, FC, LFE, FR, FL } },
  157. { .ca_index = 0x0c, .speakers = { 0, RC, RR, RL, 0, 0, FR, FL } },
  158. { .ca_index = 0x0d, .speakers = { 0, RC, RR, RL, 0, LFE, FR, FL } },
  159. { .ca_index = 0x0e, .speakers = { 0, RC, RR, RL, FC, 0, FR, FL } },
  160. /* 6.1 */
  161. { .ca_index = 0x0f, .speakers = { 0, RC, RR, RL, FC, LFE, FR, FL } },
  162. { .ca_index = 0x10, .speakers = { RRC, RLC, RR, RL, 0, 0, FR, FL } },
  163. { .ca_index = 0x11, .speakers = { RRC, RLC, RR, RL, 0, LFE, FR, FL } },
  164. { .ca_index = 0x12, .speakers = { RRC, RLC, RR, RL, FC, 0, FR, FL } },
  165. /* 7.1 */
  166. { .ca_index = 0x13, .speakers = { RRC, RLC, RR, RL, FC, LFE, FR, FL } },
  167. { .ca_index = 0x14, .speakers = { FRC, FLC, 0, 0, 0, 0, FR, FL } },
  168. { .ca_index = 0x15, .speakers = { FRC, FLC, 0, 0, 0, LFE, FR, FL } },
  169. { .ca_index = 0x16, .speakers = { FRC, FLC, 0, 0, FC, 0, FR, FL } },
  170. { .ca_index = 0x17, .speakers = { FRC, FLC, 0, 0, FC, LFE, FR, FL } },
  171. { .ca_index = 0x18, .speakers = { FRC, FLC, 0, RC, 0, 0, FR, FL } },
  172. { .ca_index = 0x19, .speakers = { FRC, FLC, 0, RC, 0, LFE, FR, FL } },
  173. { .ca_index = 0x1a, .speakers = { FRC, FLC, 0, RC, FC, 0, FR, FL } },
  174. { .ca_index = 0x1b, .speakers = { FRC, FLC, 0, RC, FC, LFE, FR, FL } },
  175. { .ca_index = 0x1c, .speakers = { FRC, FLC, RR, RL, 0, 0, FR, FL } },
  176. { .ca_index = 0x1d, .speakers = { FRC, FLC, RR, RL, 0, LFE, FR, FL } },
  177. { .ca_index = 0x1e, .speakers = { FRC, FLC, RR, RL, FC, 0, FR, FL } },
  178. { .ca_index = 0x1f, .speakers = { FRC, FLC, RR, RL, FC, LFE, FR, FL } },
  179. { .ca_index = 0x20, .speakers = { 0, FCH, RR, RL, FC, 0, FR, FL } },
  180. { .ca_index = 0x21, .speakers = { 0, FCH, RR, RL, FC, LFE, FR, FL } },
  181. { .ca_index = 0x22, .speakers = { TC, 0, RR, RL, FC, 0, FR, FL } },
  182. { .ca_index = 0x23, .speakers = { TC, 0, RR, RL, FC, LFE, FR, FL } },
  183. { .ca_index = 0x24, .speakers = { FRH, FLH, RR, RL, 0, 0, FR, FL } },
  184. { .ca_index = 0x25, .speakers = { FRH, FLH, RR, RL, 0, LFE, FR, FL } },
  185. { .ca_index = 0x26, .speakers = { FRW, FLW, RR, RL, 0, 0, FR, FL } },
  186. { .ca_index = 0x27, .speakers = { FRW, FLW, RR, RL, 0, LFE, FR, FL } },
  187. { .ca_index = 0x28, .speakers = { TC, RC, RR, RL, FC, 0, FR, FL } },
  188. { .ca_index = 0x29, .speakers = { TC, RC, RR, RL, FC, LFE, FR, FL } },
  189. { .ca_index = 0x2a, .speakers = { FCH, RC, RR, RL, FC, 0, FR, FL } },
  190. { .ca_index = 0x2b, .speakers = { FCH, RC, RR, RL, FC, LFE, FR, FL } },
  191. { .ca_index = 0x2c, .speakers = { TC, FCH, RR, RL, FC, 0, FR, FL } },
  192. { .ca_index = 0x2d, .speakers = { TC, FCH, RR, RL, FC, LFE, FR, FL } },
  193. { .ca_index = 0x2e, .speakers = { FRH, FLH, RR, RL, FC, 0, FR, FL } },
  194. { .ca_index = 0x2f, .speakers = { FRH, FLH, RR, RL, FC, LFE, FR, FL } },
  195. { .ca_index = 0x30, .speakers = { FRW, FLW, RR, RL, FC, 0, FR, FL } },
  196. { .ca_index = 0x31, .speakers = { FRW, FLW, RR, RL, FC, LFE, FR, FL } },
  197. };
  198. /*
  199. * HDA/HDMI auto parsing
  200. */
  201. static int hda_node_index(hda_nid_t *nids, hda_nid_t nid)
  202. {
  203. int i;
  204. for (i = 0; nids[i]; i++)
  205. if (nids[i] == nid)
  206. return i;
  207. snd_printk(KERN_WARNING "HDMI: nid %d not registered\n", nid);
  208. return -EINVAL;
  209. }
  210. static int intel_hdmi_read_pin_conn(struct hda_codec *codec, hda_nid_t pin_nid)
  211. {
  212. struct intel_hdmi_spec *spec = codec->spec;
  213. hda_nid_t conn_list[HDA_MAX_CONNECTIONS];
  214. int conn_len, curr;
  215. int index;
  216. if (!(get_wcaps(codec, pin_nid) & AC_WCAP_CONN_LIST)) {
  217. snd_printk(KERN_WARNING
  218. "HDMI: pin %d wcaps %#x "
  219. "does not support connection list\n",
  220. pin_nid, get_wcaps(codec, pin_nid));
  221. return -EINVAL;
  222. }
  223. conn_len = snd_hda_get_connections(codec, pin_nid, conn_list,
  224. HDA_MAX_CONNECTIONS);
  225. if (conn_len > 1)
  226. curr = snd_hda_codec_read(codec, pin_nid, 0,
  227. AC_VERB_GET_CONNECT_SEL, 0);
  228. else
  229. curr = 0;
  230. index = hda_node_index(spec->pin, pin_nid);
  231. if (index < 0)
  232. return -EINVAL;
  233. spec->pin_cvt[index] = conn_list[curr];
  234. return 0;
  235. }
  236. static void hdmi_get_show_eld(struct hda_codec *codec, hda_nid_t pin_nid,
  237. struct hdmi_eld *eld)
  238. {
  239. if (!snd_hdmi_get_eld(eld, codec, pin_nid))
  240. snd_hdmi_show_eld(eld);
  241. }
  242. static void hdmi_present_sense(struct hda_codec *codec, hda_nid_t pin_nid,
  243. struct hdmi_eld *eld)
  244. {
  245. int present = snd_hda_pin_sense(codec, pin_nid);
  246. eld->monitor_present = !!(present & AC_PINSENSE_PRESENCE);
  247. eld->eld_valid = !!(present & AC_PINSENSE_ELDV);
  248. if (present & AC_PINSENSE_ELDV)
  249. hdmi_get_show_eld(codec, pin_nid, eld);
  250. }
  251. static int intel_hdmi_add_pin(struct hda_codec *codec, hda_nid_t pin_nid)
  252. {
  253. struct intel_hdmi_spec *spec = codec->spec;
  254. if (spec->num_pins >= INTEL_HDMI_PINS) {
  255. snd_printk(KERN_WARNING
  256. "HDMI: no space for pin %d \n", pin_nid);
  257. return -EINVAL;
  258. }
  259. hdmi_present_sense(codec, pin_nid, &spec->sink_eld[spec->num_pins]);
  260. spec->pin[spec->num_pins] = pin_nid;
  261. spec->num_pins++;
  262. /*
  263. * It is assumed that converter nodes come first in the node list and
  264. * hence have been registered and usable now.
  265. */
  266. return intel_hdmi_read_pin_conn(codec, pin_nid);
  267. }
  268. static int intel_hdmi_add_cvt(struct hda_codec *codec, hda_nid_t nid)
  269. {
  270. struct intel_hdmi_spec *spec = codec->spec;
  271. if (spec->num_cvts >= INTEL_HDMI_CVTS) {
  272. snd_printk(KERN_WARNING
  273. "HDMI: no space for converter %d \n", nid);
  274. return -EINVAL;
  275. }
  276. spec->cvt[spec->num_cvts] = nid;
  277. spec->num_cvts++;
  278. return 0;
  279. }
  280. static int intel_hdmi_parse_codec(struct hda_codec *codec)
  281. {
  282. hda_nid_t nid;
  283. int i, nodes;
  284. nodes = snd_hda_get_sub_nodes(codec, codec->afg, &nid);
  285. if (!nid || nodes < 0) {
  286. snd_printk(KERN_WARNING "HDMI: failed to get afg sub nodes\n");
  287. return -EINVAL;
  288. }
  289. for (i = 0; i < nodes; i++, nid++) {
  290. unsigned int caps;
  291. unsigned int type;
  292. caps = snd_hda_param_read(codec, nid, AC_PAR_AUDIO_WIDGET_CAP);
  293. type = get_wcaps_type(caps);
  294. if (!(caps & AC_WCAP_DIGITAL))
  295. continue;
  296. switch (type) {
  297. case AC_WID_AUD_OUT:
  298. if (intel_hdmi_add_cvt(codec, nid) < 0)
  299. return -EINVAL;
  300. break;
  301. case AC_WID_PIN:
  302. caps = snd_hda_param_read(codec, nid, AC_PAR_PIN_CAP);
  303. if (!(caps & (AC_PINCAP_HDMI | AC_PINCAP_DP)))
  304. continue;
  305. if (intel_hdmi_add_pin(codec, nid) < 0)
  306. return -EINVAL;
  307. break;
  308. }
  309. }
  310. return 0;
  311. }
  312. /*
  313. * HDMI routines
  314. */
  315. #ifdef BE_PARANOID
  316. static void hdmi_get_dip_index(struct hda_codec *codec, hda_nid_t pin_nid,
  317. int *packet_index, int *byte_index)
  318. {
  319. int val;
  320. val = snd_hda_codec_read(codec, pin_nid, 0,
  321. AC_VERB_GET_HDMI_DIP_INDEX, 0);
  322. *packet_index = val >> 5;
  323. *byte_index = val & 0x1f;
  324. }
  325. #endif
  326. static void hdmi_set_dip_index(struct hda_codec *codec, hda_nid_t pin_nid,
  327. int packet_index, int byte_index)
  328. {
  329. int val;
  330. val = (packet_index << 5) | (byte_index & 0x1f);
  331. snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_INDEX, val);
  332. }
  333. static void hdmi_write_dip_byte(struct hda_codec *codec, hda_nid_t pin_nid,
  334. unsigned char val)
  335. {
  336. snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_DATA, val);
  337. }
  338. static void hdmi_enable_output(struct hda_codec *codec, hda_nid_t pin_nid)
  339. {
  340. /* Unmute */
  341. if (get_wcaps(codec, pin_nid) & AC_WCAP_OUT_AMP)
  342. snd_hda_codec_write(codec, pin_nid, 0,
  343. AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE);
  344. /* Enable pin out */
  345. snd_hda_codec_write(codec, pin_nid, 0,
  346. AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT);
  347. }
  348. /*
  349. * Enable Audio InfoFrame Transmission
  350. */
  351. static void hdmi_start_infoframe_trans(struct hda_codec *codec,
  352. hda_nid_t pin_nid)
  353. {
  354. hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
  355. snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_XMIT,
  356. AC_DIPXMIT_BEST);
  357. }
  358. /*
  359. * Disable Audio InfoFrame Transmission
  360. */
  361. static void hdmi_stop_infoframe_trans(struct hda_codec *codec,
  362. hda_nid_t pin_nid)
  363. {
  364. hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
  365. snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_XMIT,
  366. AC_DIPXMIT_DISABLE);
  367. }
  368. static int hdmi_get_channel_count(struct hda_codec *codec, hda_nid_t nid)
  369. {
  370. return 1 + snd_hda_codec_read(codec, nid, 0,
  371. AC_VERB_GET_CVT_CHAN_COUNT, 0);
  372. }
  373. static void hdmi_set_channel_count(struct hda_codec *codec,
  374. hda_nid_t nid, int chs)
  375. {
  376. if (chs != hdmi_get_channel_count(codec, nid))
  377. snd_hda_codec_write(codec, nid, 0,
  378. AC_VERB_SET_CVT_CHAN_COUNT, chs - 1);
  379. }
  380. static void hdmi_debug_channel_mapping(struct hda_codec *codec,
  381. hda_nid_t pin_nid)
  382. {
  383. #ifdef CONFIG_SND_DEBUG_VERBOSE
  384. int i;
  385. int slot;
  386. for (i = 0; i < 8; i++) {
  387. slot = snd_hda_codec_read(codec, pin_nid, 0,
  388. AC_VERB_GET_HDMI_CHAN_SLOT, i);
  389. printk(KERN_DEBUG "HDMI: ASP channel %d => slot %d\n",
  390. slot >> 4, slot & 0xf);
  391. }
  392. #endif
  393. }
  394. /*
  395. * Audio InfoFrame routines
  396. */
  397. static void hdmi_debug_dip_size(struct hda_codec *codec, hda_nid_t pin_nid)
  398. {
  399. #ifdef CONFIG_SND_DEBUG_VERBOSE
  400. int i;
  401. int size;
  402. size = snd_hdmi_get_eld_size(codec, pin_nid);
  403. printk(KERN_DEBUG "HDMI: ELD buf size is %d\n", size);
  404. for (i = 0; i < 8; i++) {
  405. size = snd_hda_codec_read(codec, pin_nid, 0,
  406. AC_VERB_GET_HDMI_DIP_SIZE, i);
  407. printk(KERN_DEBUG "HDMI: DIP GP[%d] buf size is %d\n", i, size);
  408. }
  409. #endif
  410. }
  411. static void hdmi_clear_dip_buffers(struct hda_codec *codec, hda_nid_t pin_nid)
  412. {
  413. #ifdef BE_PARANOID
  414. int i, j;
  415. int size;
  416. int pi, bi;
  417. for (i = 0; i < 8; i++) {
  418. size = snd_hda_codec_read(codec, pin_nid, 0,
  419. AC_VERB_GET_HDMI_DIP_SIZE, i);
  420. if (size == 0)
  421. continue;
  422. hdmi_set_dip_index(codec, pin_nid, i, 0x0);
  423. for (j = 1; j < 1000; j++) {
  424. hdmi_write_dip_byte(codec, pin_nid, 0x0);
  425. hdmi_get_dip_index(codec, pin_nid, &pi, &bi);
  426. if (pi != i)
  427. snd_printd(KERN_INFO "dip index %d: %d != %d\n",
  428. bi, pi, i);
  429. if (bi == 0) /* byte index wrapped around */
  430. break;
  431. }
  432. snd_printd(KERN_INFO
  433. "HDMI: DIP GP[%d] buf reported size=%d, written=%d\n",
  434. i, size, j);
  435. }
  436. #endif
  437. }
  438. static void hdmi_checksum_audio_infoframe(struct hdmi_audio_infoframe *ai)
  439. {
  440. u8 *bytes = (u8 *)ai;
  441. u8 sum = 0;
  442. int i;
  443. ai->checksum = 0;
  444. for (i = 0; i < sizeof(*ai); i++)
  445. sum += bytes[i];
  446. ai->checksum = - sum;
  447. }
  448. static void hdmi_fill_audio_infoframe(struct hda_codec *codec,
  449. hda_nid_t pin_nid,
  450. struct hdmi_audio_infoframe *ai)
  451. {
  452. u8 *bytes = (u8 *)ai;
  453. int i;
  454. hdmi_debug_dip_size(codec, pin_nid);
  455. hdmi_clear_dip_buffers(codec, pin_nid); /* be paranoid */
  456. hdmi_checksum_audio_infoframe(ai);
  457. hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
  458. for (i = 0; i < sizeof(*ai); i++)
  459. hdmi_write_dip_byte(codec, pin_nid, bytes[i]);
  460. }
  461. /*
  462. * Compute derived values in channel_allocations[].
  463. */
  464. static void init_channel_allocations(void)
  465. {
  466. int i, j;
  467. struct cea_channel_speaker_allocation *p;
  468. for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) {
  469. p = channel_allocations + i;
  470. p->channels = 0;
  471. p->spk_mask = 0;
  472. for (j = 0; j < ARRAY_SIZE(p->speakers); j++)
  473. if (p->speakers[j]) {
  474. p->channels++;
  475. p->spk_mask |= p->speakers[j];
  476. }
  477. }
  478. }
  479. /*
  480. * The transformation takes two steps:
  481. *
  482. * eld->spk_alloc => (eld_speaker_allocation_bits[]) => spk_mask
  483. * spk_mask => (channel_allocations[]) => ai->CA
  484. *
  485. * TODO: it could select the wrong CA from multiple candidates.
  486. */
  487. static int hdmi_setup_channel_allocation(struct hda_codec *codec, hda_nid_t nid,
  488. struct hdmi_audio_infoframe *ai)
  489. {
  490. struct intel_hdmi_spec *spec = codec->spec;
  491. struct hdmi_eld *eld;
  492. int i;
  493. int spk_mask = 0;
  494. int channels = 1 + (ai->CC02_CT47 & 0x7);
  495. char buf[SND_PRINT_CHANNEL_ALLOCATION_ADVISED_BUFSIZE];
  496. /*
  497. * CA defaults to 0 for basic stereo audio
  498. */
  499. if (channels <= 2)
  500. return 0;
  501. i = hda_node_index(spec->pin_cvt, nid);
  502. if (i < 0)
  503. return 0;
  504. eld = &spec->sink_eld[i];
  505. /*
  506. * HDMI sink's ELD info cannot always be retrieved for now, e.g.
  507. * in console or for audio devices. Assume the highest speakers
  508. * configuration, to _not_ prohibit multi-channel audio playback.
  509. */
  510. if (!eld->spk_alloc)
  511. eld->spk_alloc = 0xffff;
  512. /*
  513. * expand ELD's speaker allocation mask
  514. *
  515. * ELD tells the speaker mask in a compact(paired) form,
  516. * expand ELD's notions to match the ones used by Audio InfoFrame.
  517. */
  518. for (i = 0; i < ARRAY_SIZE(eld_speaker_allocation_bits); i++) {
  519. if (eld->spk_alloc & (1 << i))
  520. spk_mask |= eld_speaker_allocation_bits[i];
  521. }
  522. /* search for the first working match in the CA table */
  523. for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) {
  524. if (channels == channel_allocations[i].channels &&
  525. (spk_mask & channel_allocations[i].spk_mask) ==
  526. channel_allocations[i].spk_mask) {
  527. ai->CA = channel_allocations[i].ca_index;
  528. break;
  529. }
  530. }
  531. snd_print_channel_allocation(eld->spk_alloc, buf, sizeof(buf));
  532. snd_printdd(KERN_INFO
  533. "HDMI: select CA 0x%x for %d-channel allocation: %s\n",
  534. ai->CA, channels, buf);
  535. return ai->CA;
  536. }
  537. static void hdmi_setup_channel_mapping(struct hda_codec *codec,
  538. hda_nid_t pin_nid,
  539. struct hdmi_audio_infoframe *ai)
  540. {
  541. int i;
  542. if (!ai->CA)
  543. return;
  544. /*
  545. * TODO: adjust channel mapping if necessary
  546. * ALSA sequence is front/surr/clfe/side?
  547. */
  548. for (i = 0; i < 8; i++)
  549. snd_hda_codec_write(codec, pin_nid, 0,
  550. AC_VERB_SET_HDMI_CHAN_SLOT,
  551. (i << 4) | i);
  552. hdmi_debug_channel_mapping(codec, pin_nid);
  553. }
  554. static bool hdmi_infoframe_uptodate(struct hda_codec *codec, hda_nid_t pin_nid,
  555. struct hdmi_audio_infoframe *ai)
  556. {
  557. u8 *bytes = (u8 *)ai;
  558. u8 val;
  559. int i;
  560. if (snd_hda_codec_read(codec, pin_nid, 0, AC_VERB_GET_HDMI_DIP_XMIT, 0)
  561. != AC_DIPXMIT_BEST)
  562. return false;
  563. hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
  564. for (i = 0; i < sizeof(*ai); i++) {
  565. val = snd_hda_codec_read(codec, pin_nid, 0,
  566. AC_VERB_GET_HDMI_DIP_DATA, 0);
  567. if (val != bytes[i])
  568. return false;
  569. }
  570. return true;
  571. }
  572. static void hdmi_setup_audio_infoframe(struct hda_codec *codec, hda_nid_t nid,
  573. struct snd_pcm_substream *substream)
  574. {
  575. struct intel_hdmi_spec *spec = codec->spec;
  576. hda_nid_t pin_nid;
  577. int i;
  578. struct hdmi_audio_infoframe ai = {
  579. .type = 0x84,
  580. .ver = 0x01,
  581. .len = 0x0a,
  582. .CC02_CT47 = substream->runtime->channels - 1,
  583. };
  584. hdmi_setup_channel_allocation(codec, nid, &ai);
  585. for (i = 0; i < spec->num_pins; i++) {
  586. if (spec->pin_cvt[i] != nid)
  587. continue;
  588. if (!spec->sink_eld[i].monitor_present)
  589. continue;
  590. pin_nid = spec->pin[i];
  591. if (!hdmi_infoframe_uptodate(codec, pin_nid, &ai)) {
  592. hdmi_setup_channel_mapping(codec, pin_nid, &ai);
  593. hdmi_stop_infoframe_trans(codec, pin_nid);
  594. hdmi_fill_audio_infoframe(codec, pin_nid, &ai);
  595. hdmi_start_infoframe_trans(codec, pin_nid);
  596. }
  597. }
  598. }
  599. /*
  600. * Unsolicited events
  601. */
  602. static void hdmi_intrinsic_event(struct hda_codec *codec, unsigned int res)
  603. {
  604. struct intel_hdmi_spec *spec = codec->spec;
  605. int tag = res >> AC_UNSOL_RES_TAG_SHIFT;
  606. int pind = !!(res & AC_UNSOL_RES_PD);
  607. int eldv = !!(res & AC_UNSOL_RES_ELDV);
  608. int index;
  609. printk(KERN_INFO
  610. "HDMI hot plug event: Pin=%d Presence_Detect=%d ELD_Valid=%d\n",
  611. tag, pind, eldv);
  612. index = hda_node_index(spec->pin, tag);
  613. if (index < 0)
  614. return;
  615. spec->sink_eld[index].monitor_present = pind;
  616. spec->sink_eld[index].eld_valid = eldv;
  617. if (pind && eldv) {
  618. hdmi_get_show_eld(codec, spec->pin[index], &spec->sink_eld[index]);
  619. /* TODO: do real things about ELD */
  620. }
  621. }
  622. static void hdmi_non_intrinsic_event(struct hda_codec *codec, unsigned int res)
  623. {
  624. int tag = res >> AC_UNSOL_RES_TAG_SHIFT;
  625. int subtag = (res & AC_UNSOL_RES_SUBTAG) >> AC_UNSOL_RES_SUBTAG_SHIFT;
  626. int cp_state = !!(res & AC_UNSOL_RES_CP_STATE);
  627. int cp_ready = !!(res & AC_UNSOL_RES_CP_READY);
  628. printk(KERN_INFO
  629. "HDMI CP event: PIN=%d SUBTAG=0x%x CP_STATE=%d CP_READY=%d\n",
  630. tag,
  631. subtag,
  632. cp_state,
  633. cp_ready);
  634. /* TODO */
  635. if (cp_state)
  636. ;
  637. if (cp_ready)
  638. ;
  639. }
  640. static void intel_hdmi_unsol_event(struct hda_codec *codec, unsigned int res)
  641. {
  642. struct intel_hdmi_spec *spec = codec->spec;
  643. int tag = res >> AC_UNSOL_RES_TAG_SHIFT;
  644. int subtag = (res & AC_UNSOL_RES_SUBTAG) >> AC_UNSOL_RES_SUBTAG_SHIFT;
  645. if (hda_node_index(spec->pin, tag) < 0) {
  646. snd_printd(KERN_INFO "Unexpected HDMI event tag 0x%x\n", tag);
  647. return;
  648. }
  649. if (subtag == 0)
  650. hdmi_intrinsic_event(codec, res);
  651. else
  652. hdmi_non_intrinsic_event(codec, res);
  653. }
  654. /*
  655. * Callbacks
  656. */
  657. static void hdmi_setup_stream(struct hda_codec *codec, hda_nid_t nid,
  658. u32 stream_tag, int format)
  659. {
  660. int tag;
  661. int fmt;
  662. tag = snd_hda_codec_read(codec, nid, 0, AC_VERB_GET_CONV, 0) >> 4;
  663. fmt = snd_hda_codec_read(codec, nid, 0, AC_VERB_GET_STREAM_FORMAT, 0);
  664. snd_printdd("hdmi_setup_stream: "
  665. "NID=0x%x, %sstream=0x%x, %sformat=0x%x\n",
  666. nid,
  667. tag == stream_tag ? "" : "new-",
  668. stream_tag,
  669. fmt == format ? "" : "new-",
  670. format);
  671. if (tag != stream_tag)
  672. snd_hda_codec_write(codec, nid, 0,
  673. AC_VERB_SET_CHANNEL_STREAMID, stream_tag << 4);
  674. if (fmt != format)
  675. snd_hda_codec_write(codec, nid, 0,
  676. AC_VERB_SET_STREAM_FORMAT, format);
  677. }
  678. static int intel_hdmi_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
  679. struct hda_codec *codec,
  680. unsigned int stream_tag,
  681. unsigned int format,
  682. struct snd_pcm_substream *substream)
  683. {
  684. hdmi_set_channel_count(codec, hinfo->nid,
  685. substream->runtime->channels);
  686. hdmi_setup_audio_infoframe(codec, hinfo->nid, substream);
  687. hdmi_setup_stream(codec, hinfo->nid, stream_tag, format);
  688. return 0;
  689. }
  690. static int intel_hdmi_playback_pcm_cleanup(struct hda_pcm_stream *hinfo,
  691. struct hda_codec *codec,
  692. struct snd_pcm_substream *substream)
  693. {
  694. return 0;
  695. }
  696. static struct hda_pcm_stream intel_hdmi_pcm_playback = {
  697. .substreams = 1,
  698. .channels_min = 2,
  699. .ops = {
  700. .prepare = intel_hdmi_playback_pcm_prepare,
  701. .cleanup = intel_hdmi_playback_pcm_cleanup,
  702. },
  703. };
  704. static int intel_hdmi_build_pcms(struct hda_codec *codec)
  705. {
  706. struct intel_hdmi_spec *spec = codec->spec;
  707. struct hda_pcm *info = spec->pcm_rec;
  708. int i;
  709. codec->num_pcms = spec->num_cvts;
  710. codec->pcm_info = info;
  711. for (i = 0; i < codec->num_pcms; i++, info++) {
  712. unsigned int chans;
  713. chans = get_wcaps(codec, spec->cvt[i]);
  714. chans = get_wcaps_channels(chans);
  715. info->name = intel_hdmi_pcm_names[i];
  716. info->pcm_type = HDA_PCM_TYPE_HDMI;
  717. info->stream[SNDRV_PCM_STREAM_PLAYBACK] =
  718. intel_hdmi_pcm_playback;
  719. info->stream[SNDRV_PCM_STREAM_PLAYBACK].nid = spec->cvt[i];
  720. info->stream[SNDRV_PCM_STREAM_PLAYBACK].channels_max = chans;
  721. }
  722. return 0;
  723. }
  724. static int intel_hdmi_build_controls(struct hda_codec *codec)
  725. {
  726. struct intel_hdmi_spec *spec = codec->spec;
  727. int err;
  728. int i;
  729. for (i = 0; i < codec->num_pcms; i++) {
  730. err = snd_hda_create_spdif_out_ctls(codec, spec->cvt[i]);
  731. if (err < 0)
  732. return err;
  733. }
  734. return 0;
  735. }
  736. static int intel_hdmi_init(struct hda_codec *codec)
  737. {
  738. struct intel_hdmi_spec *spec = codec->spec;
  739. int i;
  740. for (i = 0; spec->pin[i]; i++) {
  741. hdmi_enable_output(codec, spec->pin[i]);
  742. snd_hda_codec_write(codec, spec->pin[i], 0,
  743. AC_VERB_SET_UNSOLICITED_ENABLE,
  744. AC_USRSP_EN | spec->pin[i]);
  745. }
  746. return 0;
  747. }
  748. static void intel_hdmi_free(struct hda_codec *codec)
  749. {
  750. struct intel_hdmi_spec *spec = codec->spec;
  751. int i;
  752. for (i = 0; i < spec->num_pins; i++)
  753. snd_hda_eld_proc_free(codec, &spec->sink_eld[i]);
  754. kfree(spec);
  755. }
  756. static struct hda_codec_ops intel_hdmi_patch_ops = {
  757. .init = intel_hdmi_init,
  758. .free = intel_hdmi_free,
  759. .build_pcms = intel_hdmi_build_pcms,
  760. .build_controls = intel_hdmi_build_controls,
  761. .unsol_event = intel_hdmi_unsol_event,
  762. };
  763. static int patch_intel_hdmi(struct hda_codec *codec)
  764. {
  765. struct intel_hdmi_spec *spec;
  766. int i;
  767. spec = kzalloc(sizeof(*spec), GFP_KERNEL);
  768. if (spec == NULL)
  769. return -ENOMEM;
  770. codec->spec = spec;
  771. if (intel_hdmi_parse_codec(codec) < 0) {
  772. codec->spec = NULL;
  773. kfree(spec);
  774. return -EINVAL;
  775. }
  776. codec->patch_ops = intel_hdmi_patch_ops;
  777. for (i = 0; i < spec->num_pins; i++)
  778. snd_hda_eld_proc_new(codec, &spec->sink_eld[i], i);
  779. init_channel_allocations();
  780. return 0;
  781. }
  782. static struct hda_codec_preset snd_hda_preset_intelhdmi[] = {
  783. { .id = 0x808629fb, .name = "G45 DEVCL", .patch = patch_intel_hdmi },
  784. { .id = 0x80862801, .name = "G45 DEVBLC", .patch = patch_intel_hdmi },
  785. { .id = 0x80862802, .name = "G45 DEVCTG", .patch = patch_intel_hdmi },
  786. { .id = 0x80862803, .name = "G45 DEVELK", .patch = patch_intel_hdmi },
  787. { .id = 0x80862804, .name = "G45 DEVIBX", .patch = patch_intel_hdmi },
  788. { .id = 0x80860054, .name = "Q57 DEVIBX", .patch = patch_intel_hdmi },
  789. { .id = 0x10951392, .name = "SiI1392 HDMI", .patch = patch_intel_hdmi },
  790. {} /* terminator */
  791. };
  792. MODULE_ALIAS("snd-hda-codec-id:808629fb");
  793. MODULE_ALIAS("snd-hda-codec-id:80862801");
  794. MODULE_ALIAS("snd-hda-codec-id:80862802");
  795. MODULE_ALIAS("snd-hda-codec-id:80862803");
  796. MODULE_ALIAS("snd-hda-codec-id:80862804");
  797. MODULE_ALIAS("snd-hda-codec-id:80860054");
  798. MODULE_ALIAS("snd-hda-codec-id:10951392");
  799. MODULE_LICENSE("GPL");
  800. MODULE_DESCRIPTION("Intel HDMI HD-audio codec");
  801. static struct hda_codec_preset_list intel_list = {
  802. .preset = snd_hda_preset_intelhdmi,
  803. .owner = THIS_MODULE,
  804. };
  805. static int __init patch_intelhdmi_init(void)
  806. {
  807. return snd_hda_add_codec_preset(&intel_list);
  808. }
  809. static void __exit patch_intelhdmi_exit(void)
  810. {
  811. snd_hda_delete_codec_preset(&intel_list);
  812. }
  813. module_init(patch_intelhdmi_init)
  814. module_exit(patch_intelhdmi_exit)