cpu.h 6.0 KB

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  1. /*
  2. * arch/arm/mach-at91/include/mach/cpu.h
  3. *
  4. * Copyright (C) 2006 SAN People
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License as published by
  8. * the Free Software Foundation; either version 2 of the License, or
  9. * (at your option) any later version.
  10. *
  11. */
  12. #ifndef __ASM_ARCH_CPU_H
  13. #define __ASM_ARCH_CPU_H
  14. #include <mach/hardware.h>
  15. #include <mach/at91_dbgu.h>
  16. #define ARCH_ID_AT91RM9200 0x09290780
  17. #define ARCH_ID_AT91SAM9260 0x019803a0
  18. #define ARCH_ID_AT91SAM9261 0x019703a0
  19. #define ARCH_ID_AT91SAM9263 0x019607a0
  20. #define ARCH_ID_AT91SAM9G10 0x019903a0
  21. #define ARCH_ID_AT91SAM9G20 0x019905a0
  22. #define ARCH_ID_AT91SAM9RL64 0x019b03a0
  23. #define ARCH_ID_AT91SAM9G45 0x819b05a0
  24. #define ARCH_ID_AT91SAM9G45MRL 0x819b05a2 /* aka 9G45-ES2 & non ES lots */
  25. #define ARCH_ID_AT91SAM9G45ES 0x819b05a1 /* 9G45-ES (Engineering Sample) */
  26. #define ARCH_ID_AT91SAM9X5 0x819a05a0
  27. #define ARCH_ID_AT91CAP9 0x039A03A0
  28. #define ARCH_ID_AT91SAM9XE128 0x329973a0
  29. #define ARCH_ID_AT91SAM9XE256 0x329a93a0
  30. #define ARCH_ID_AT91SAM9XE512 0x329aa3a0
  31. #define ARCH_ID_AT91M40800 0x14080044
  32. #define ARCH_ID_AT91R40807 0x44080746
  33. #define ARCH_ID_AT91M40807 0x14080745
  34. #define ARCH_ID_AT91R40008 0x44000840
  35. static inline unsigned long at91_cpu_identify(void)
  36. {
  37. return (dbgu_readl(AT91_DBGU, CIDR) & ~AT91_CIDR_VERSION);
  38. }
  39. static inline unsigned long at91_cpu_fully_identify(void)
  40. {
  41. return dbgu_readl(AT91_DBGU, CIDR);
  42. }
  43. #define ARCH_EXID_AT91SAM9M11 0x00000001
  44. #define ARCH_EXID_AT91SAM9M10 0x00000002
  45. #define ARCH_EXID_AT91SAM9G46 0x00000003
  46. #define ARCH_EXID_AT91SAM9G45 0x00000004
  47. #define ARCH_EXID_AT91SAM9G15 0x00000000
  48. #define ARCH_EXID_AT91SAM9G35 0x00000001
  49. #define ARCH_EXID_AT91SAM9X35 0x00000002
  50. #define ARCH_EXID_AT91SAM9G25 0x00000003
  51. #define ARCH_EXID_AT91SAM9X25 0x00000004
  52. static inline unsigned long at91_exid_identify(void)
  53. {
  54. return dbgu_readl(AT91_DBGU, EXID);
  55. }
  56. #define ARCH_FAMILY_AT91X92 0x09200000
  57. #define ARCH_FAMILY_AT91SAM9 0x01900000
  58. #define ARCH_FAMILY_AT91SAM9XE 0x02900000
  59. static inline unsigned long at91_arch_identify(void)
  60. {
  61. return (dbgu_readl(AT91_DBGU, CIDR) & AT91_CIDR_ARCH);
  62. }
  63. #ifdef CONFIG_ARCH_AT91CAP9
  64. #include <mach/at91_pmc.h>
  65. #define ARCH_REVISION_CAP9_B 0x399
  66. #define ARCH_REVISION_CAP9_C 0x601
  67. static inline unsigned long at91cap9_rev_identify(void)
  68. {
  69. return (at91_sys_read(AT91_PMC_VER));
  70. }
  71. #endif
  72. #ifdef CONFIG_ARCH_AT91RM9200
  73. extern int rm9200_type;
  74. #define ARCH_REVISON_9200_BGA (0 << 0)
  75. #define ARCH_REVISON_9200_PQFP (1 << 0)
  76. #define cpu_is_at91rm9200() (at91_cpu_identify() == ARCH_ID_AT91RM9200)
  77. #define cpu_is_at91rm9200_bga() (!cpu_is_at91rm9200_pqfp())
  78. #define cpu_is_at91rm9200_pqfp() (cpu_is_at91rm9200() && rm9200_type & ARCH_REVISON_9200_PQFP)
  79. #else
  80. #define cpu_is_at91rm9200() (0)
  81. #define cpu_is_at91rm9200_bga() (0)
  82. #define cpu_is_at91rm9200_pqfp() (0)
  83. #endif
  84. #ifdef CONFIG_ARCH_AT91SAM9260
  85. #define cpu_is_at91sam9xe() (at91_arch_identify() == ARCH_FAMILY_AT91SAM9XE)
  86. #define cpu_is_at91sam9260() ((at91_cpu_identify() == ARCH_ID_AT91SAM9260) || cpu_is_at91sam9xe())
  87. #else
  88. #define cpu_is_at91sam9xe() (0)
  89. #define cpu_is_at91sam9260() (0)
  90. #endif
  91. #ifdef CONFIG_ARCH_AT91SAM9G20
  92. #define cpu_is_at91sam9g20() (at91_cpu_identify() == ARCH_ID_AT91SAM9G20)
  93. #else
  94. #define cpu_is_at91sam9g20() (0)
  95. #endif
  96. #ifdef CONFIG_ARCH_AT91SAM9261
  97. #define cpu_is_at91sam9261() (at91_cpu_identify() == ARCH_ID_AT91SAM9261)
  98. #else
  99. #define cpu_is_at91sam9261() (0)
  100. #endif
  101. #ifdef CONFIG_ARCH_AT91SAM9G10
  102. #define cpu_is_at91sam9g10() ((at91_cpu_identify() & ~AT91_CIDR_EXT) == ARCH_ID_AT91SAM9G10)
  103. #else
  104. #define cpu_is_at91sam9g10() (0)
  105. #endif
  106. #ifdef CONFIG_ARCH_AT91SAM9263
  107. #define cpu_is_at91sam9263() (at91_cpu_identify() == ARCH_ID_AT91SAM9263)
  108. #else
  109. #define cpu_is_at91sam9263() (0)
  110. #endif
  111. #ifdef CONFIG_ARCH_AT91SAM9RL
  112. #define cpu_is_at91sam9rl() (at91_cpu_identify() == ARCH_ID_AT91SAM9RL64)
  113. #else
  114. #define cpu_is_at91sam9rl() (0)
  115. #endif
  116. #ifdef CONFIG_ARCH_AT91SAM9G45
  117. #define cpu_is_at91sam9g45() (at91_cpu_identify() == ARCH_ID_AT91SAM9G45)
  118. #define cpu_is_at91sam9g45es() (at91_cpu_fully_identify() == ARCH_ID_AT91SAM9G45ES)
  119. #define cpu_is_at91sam9m10() (cpu_is_at91sam9g45() && \
  120. (at91_exid_identify() == ARCH_EXID_AT91SAM9M10))
  121. #define cpu_is_at91sam9m46() (cpu_is_at91sam9g45() && \
  122. (at91_exid_identify() == ARCH_EXID_AT91SAM9G46))
  123. #define cpu_is_at91sam9m11() (cpu_is_at91sam9g45() && \
  124. (at91_exid_identify() == ARCH_EXID_AT91SAM9M11))
  125. #else
  126. #define cpu_is_at91sam9g45() (0)
  127. #define cpu_is_at91sam9g45es() (0)
  128. #define cpu_is_at91sam9m10() (0)
  129. #define cpu_is_at91sam9g46() (0)
  130. #define cpu_is_at91sam9m11() (0)
  131. #endif
  132. #ifdef CONFIG_ARCH_AT91SAM9X5
  133. #define cpu_is_at91sam9x5() (at91_cpu_identify() == ARCH_ID_AT91SAM9X5)
  134. #define cpu_is_at91sam9g15() (cpu_is_at91sam9x5() && \
  135. (at91_exid_identify() == ARCH_EXID_AT91SAM9G15))
  136. #define cpu_is_at91sam9g35() (cpu_is_at91sam9x5() && \
  137. (at91_exid_identify() == ARCH_EXID_AT91SAM9G35))
  138. #define cpu_is_at91sam9x35() (cpu_is_at91sam9x5() && \
  139. (at91_exid_identify() == ARCH_EXID_AT91SAM9X35))
  140. #define cpu_is_at91sam9g25() (cpu_is_at91sam9x5() && \
  141. (at91_exid_identify() == ARCH_EXID_AT91SAM9G25))
  142. #define cpu_is_at91sam9x25() (cpu_is_at91sam9x5() && \
  143. (at91_exid_identify() == ARCH_EXID_AT91SAM9X25))
  144. #else
  145. #define cpu_is_at91sam9x5() (0)
  146. #define cpu_is_at91sam9g15() (0)
  147. #define cpu_is_at91sam9g35() (0)
  148. #define cpu_is_at91sam9x35() (0)
  149. #define cpu_is_at91sam9g25() (0)
  150. #define cpu_is_at91sam9x25() (0)
  151. #endif
  152. #ifdef CONFIG_ARCH_AT91CAP9
  153. #define cpu_is_at91cap9() (at91_cpu_identify() == ARCH_ID_AT91CAP9)
  154. #define cpu_is_at91cap9_revB() (at91cap9_rev_identify() == ARCH_REVISION_CAP9_B)
  155. #define cpu_is_at91cap9_revC() (at91cap9_rev_identify() == ARCH_REVISION_CAP9_C)
  156. #else
  157. #define cpu_is_at91cap9() (0)
  158. #define cpu_is_at91cap9_revB() (0)
  159. #define cpu_is_at91cap9_revC() (0)
  160. #endif
  161. /*
  162. * Since this is ARM, we will never run on any AVR32 CPU. But these
  163. * definitions may reduce clutter in common drivers.
  164. */
  165. #define cpu_is_at32ap7000() (0)
  166. #endif