cx88-dvb.c 46 KB

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  1. /*
  2. *
  3. * device driver for Conexant 2388x based TV cards
  4. * MPEG Transport Stream (DVB) routines
  5. *
  6. * (c) 2004, 2005 Chris Pascoe <c.pascoe@itee.uq.edu.au>
  7. * (c) 2004 Gerd Knorr <kraxel@bytesex.org> [SuSE Labs]
  8. *
  9. * This program is free software; you can redistribute it and/or modify
  10. * it under the terms of the GNU General Public License as published by
  11. * the Free Software Foundation; either version 2 of the License, or
  12. * (at your option) any later version.
  13. *
  14. * This program is distributed in the hope that it will be useful,
  15. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  17. * GNU General Public License for more details.
  18. *
  19. * You should have received a copy of the GNU General Public License
  20. * along with this program; if not, write to the Free Software
  21. * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  22. */
  23. #include <linux/module.h>
  24. #include <linux/init.h>
  25. #include <linux/device.h>
  26. #include <linux/fs.h>
  27. #include <linux/kthread.h>
  28. #include <linux/file.h>
  29. #include <linux/suspend.h>
  30. #include "cx88.h"
  31. #include "dvb-pll.h"
  32. #include <media/v4l2-common.h>
  33. #include "mt352.h"
  34. #include "mt352_priv.h"
  35. #include "cx88-vp3054-i2c.h"
  36. #include "zl10353.h"
  37. #include "cx22702.h"
  38. #include "or51132.h"
  39. #include "lgdt330x.h"
  40. #include "s5h1409.h"
  41. #include "xc5000.h"
  42. #include "nxt200x.h"
  43. #include "cx24123.h"
  44. #include "isl6421.h"
  45. #include "tuner-simple.h"
  46. #include "tda9887.h"
  47. #include "s5h1411.h"
  48. #include "stv0299.h"
  49. #include "z0194a.h"
  50. #include "stv0288.h"
  51. #include "stb6000.h"
  52. #include "cx24116.h"
  53. #include "stv0900.h"
  54. #include "stb6100.h"
  55. #include "stb6100_proc.h"
  56. #include "mb86a16.h"
  57. #include "ds3000.h"
  58. MODULE_DESCRIPTION("driver for cx2388x based DVB cards");
  59. MODULE_AUTHOR("Chris Pascoe <c.pascoe@itee.uq.edu.au>");
  60. MODULE_AUTHOR("Gerd Knorr <kraxel@bytesex.org> [SuSE Labs]");
  61. MODULE_LICENSE("GPL");
  62. static unsigned int debug;
  63. module_param(debug, int, 0644);
  64. MODULE_PARM_DESC(debug,"enable debug messages [dvb]");
  65. static unsigned int dvb_buf_tscnt = 32;
  66. module_param(dvb_buf_tscnt, int, 0644);
  67. MODULE_PARM_DESC(dvb_buf_tscnt, "DVB Buffer TS count [dvb]");
  68. DVB_DEFINE_MOD_OPT_ADAPTER_NR(adapter_nr);
  69. #define dprintk(level,fmt, arg...) if (debug >= level) \
  70. printk(KERN_DEBUG "%s/2-dvb: " fmt, core->name, ## arg)
  71. /* ------------------------------------------------------------------ */
  72. static int dvb_buf_setup(struct videobuf_queue *q,
  73. unsigned int *count, unsigned int *size)
  74. {
  75. struct cx8802_dev *dev = q->priv_data;
  76. dev->ts_packet_size = 188 * 4;
  77. dev->ts_packet_count = dvb_buf_tscnt;
  78. *size = dev->ts_packet_size * dev->ts_packet_count;
  79. *count = dvb_buf_tscnt;
  80. return 0;
  81. }
  82. static int dvb_buf_prepare(struct videobuf_queue *q,
  83. struct videobuf_buffer *vb, enum v4l2_field field)
  84. {
  85. struct cx8802_dev *dev = q->priv_data;
  86. return cx8802_buf_prepare(q, dev, (struct cx88_buffer*)vb,field);
  87. }
  88. static void dvb_buf_queue(struct videobuf_queue *q, struct videobuf_buffer *vb)
  89. {
  90. struct cx8802_dev *dev = q->priv_data;
  91. cx8802_buf_queue(dev, (struct cx88_buffer*)vb);
  92. }
  93. static void dvb_buf_release(struct videobuf_queue *q,
  94. struct videobuf_buffer *vb)
  95. {
  96. cx88_free_buffer(q, (struct cx88_buffer*)vb);
  97. }
  98. static const struct videobuf_queue_ops dvb_qops = {
  99. .buf_setup = dvb_buf_setup,
  100. .buf_prepare = dvb_buf_prepare,
  101. .buf_queue = dvb_buf_queue,
  102. .buf_release = dvb_buf_release,
  103. };
  104. /* ------------------------------------------------------------------ */
  105. static int cx88_dvb_bus_ctrl(struct dvb_frontend* fe, int acquire)
  106. {
  107. struct cx8802_dev *dev= fe->dvb->priv;
  108. struct cx8802_driver *drv = NULL;
  109. int ret = 0;
  110. int fe_id;
  111. fe_id = videobuf_dvb_find_frontend(&dev->frontends, fe);
  112. if (!fe_id) {
  113. printk(KERN_ERR "%s() No frontend found\n", __func__);
  114. return -EINVAL;
  115. }
  116. mutex_lock(&dev->core->lock);
  117. drv = cx8802_get_driver(dev, CX88_MPEG_DVB);
  118. if (drv) {
  119. if (acquire){
  120. dev->frontends.active_fe_id = fe_id;
  121. ret = drv->request_acquire(drv);
  122. } else {
  123. ret = drv->request_release(drv);
  124. dev->frontends.active_fe_id = 0;
  125. }
  126. }
  127. mutex_unlock(&dev->core->lock);
  128. return ret;
  129. }
  130. static void cx88_dvb_gate_ctrl(struct cx88_core *core, int open)
  131. {
  132. struct videobuf_dvb_frontends *f;
  133. struct videobuf_dvb_frontend *fe;
  134. if (!core->dvbdev)
  135. return;
  136. f = &core->dvbdev->frontends;
  137. if (!f)
  138. return;
  139. if (f->gate <= 1) /* undefined or fe0 */
  140. fe = videobuf_dvb_get_frontend(f, 1);
  141. else
  142. fe = videobuf_dvb_get_frontend(f, f->gate);
  143. if (fe && fe->dvb.frontend && fe->dvb.frontend->ops.i2c_gate_ctrl)
  144. fe->dvb.frontend->ops.i2c_gate_ctrl(fe->dvb.frontend, open);
  145. }
  146. /* ------------------------------------------------------------------ */
  147. static int dvico_fusionhdtv_demod_init(struct dvb_frontend* fe)
  148. {
  149. static const u8 clock_config [] = { CLOCK_CTL, 0x38, 0x39 };
  150. static const u8 reset [] = { RESET, 0x80 };
  151. static const u8 adc_ctl_1_cfg [] = { ADC_CTL_1, 0x40 };
  152. static const u8 agc_cfg [] = { AGC_TARGET, 0x24, 0x20 };
  153. static const u8 gpp_ctl_cfg [] = { GPP_CTL, 0x33 };
  154. static const u8 capt_range_cfg[] = { CAPT_RANGE, 0x32 };
  155. mt352_write(fe, clock_config, sizeof(clock_config));
  156. udelay(200);
  157. mt352_write(fe, reset, sizeof(reset));
  158. mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg));
  159. mt352_write(fe, agc_cfg, sizeof(agc_cfg));
  160. mt352_write(fe, gpp_ctl_cfg, sizeof(gpp_ctl_cfg));
  161. mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
  162. return 0;
  163. }
  164. static int dvico_dual_demod_init(struct dvb_frontend *fe)
  165. {
  166. static const u8 clock_config [] = { CLOCK_CTL, 0x38, 0x38 };
  167. static const u8 reset [] = { RESET, 0x80 };
  168. static const u8 adc_ctl_1_cfg [] = { ADC_CTL_1, 0x40 };
  169. static const u8 agc_cfg [] = { AGC_TARGET, 0x28, 0x20 };
  170. static const u8 gpp_ctl_cfg [] = { GPP_CTL, 0x33 };
  171. static const u8 capt_range_cfg[] = { CAPT_RANGE, 0x32 };
  172. mt352_write(fe, clock_config, sizeof(clock_config));
  173. udelay(200);
  174. mt352_write(fe, reset, sizeof(reset));
  175. mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg));
  176. mt352_write(fe, agc_cfg, sizeof(agc_cfg));
  177. mt352_write(fe, gpp_ctl_cfg, sizeof(gpp_ctl_cfg));
  178. mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
  179. return 0;
  180. }
  181. static int dntv_live_dvbt_demod_init(struct dvb_frontend* fe)
  182. {
  183. static const u8 clock_config [] = { 0x89, 0x38, 0x39 };
  184. static const u8 reset [] = { 0x50, 0x80 };
  185. static const u8 adc_ctl_1_cfg [] = { 0x8E, 0x40 };
  186. static const u8 agc_cfg [] = { 0x67, 0x10, 0x23, 0x00, 0xFF, 0xFF,
  187. 0x00, 0xFF, 0x00, 0x40, 0x40 };
  188. static const u8 dntv_extra[] = { 0xB5, 0x7A };
  189. static const u8 capt_range_cfg[] = { 0x75, 0x32 };
  190. mt352_write(fe, clock_config, sizeof(clock_config));
  191. udelay(2000);
  192. mt352_write(fe, reset, sizeof(reset));
  193. mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg));
  194. mt352_write(fe, agc_cfg, sizeof(agc_cfg));
  195. udelay(2000);
  196. mt352_write(fe, dntv_extra, sizeof(dntv_extra));
  197. mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
  198. return 0;
  199. }
  200. static const struct mt352_config dvico_fusionhdtv = {
  201. .demod_address = 0x0f,
  202. .demod_init = dvico_fusionhdtv_demod_init,
  203. };
  204. static const struct mt352_config dntv_live_dvbt_config = {
  205. .demod_address = 0x0f,
  206. .demod_init = dntv_live_dvbt_demod_init,
  207. };
  208. static const struct mt352_config dvico_fusionhdtv_dual = {
  209. .demod_address = 0x0f,
  210. .demod_init = dvico_dual_demod_init,
  211. };
  212. static const struct zl10353_config cx88_terratec_cinergy_ht_pci_mkii_config = {
  213. .demod_address = (0x1e >> 1),
  214. .no_tuner = 1,
  215. .if2 = 45600,
  216. };
  217. static struct mb86a16_config twinhan_vp1027 = {
  218. .demod_address = 0x08,
  219. };
  220. #if defined(CONFIG_VIDEO_CX88_VP3054) || (defined(CONFIG_VIDEO_CX88_VP3054_MODULE) && defined(MODULE))
  221. static int dntv_live_dvbt_pro_demod_init(struct dvb_frontend* fe)
  222. {
  223. static const u8 clock_config [] = { 0x89, 0x38, 0x38 };
  224. static const u8 reset [] = { 0x50, 0x80 };
  225. static const u8 adc_ctl_1_cfg [] = { 0x8E, 0x40 };
  226. static const u8 agc_cfg [] = { 0x67, 0x10, 0x20, 0x00, 0xFF, 0xFF,
  227. 0x00, 0xFF, 0x00, 0x40, 0x40 };
  228. static const u8 dntv_extra[] = { 0xB5, 0x7A };
  229. static const u8 capt_range_cfg[] = { 0x75, 0x32 };
  230. mt352_write(fe, clock_config, sizeof(clock_config));
  231. udelay(2000);
  232. mt352_write(fe, reset, sizeof(reset));
  233. mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg));
  234. mt352_write(fe, agc_cfg, sizeof(agc_cfg));
  235. udelay(2000);
  236. mt352_write(fe, dntv_extra, sizeof(dntv_extra));
  237. mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
  238. return 0;
  239. }
  240. static const struct mt352_config dntv_live_dvbt_pro_config = {
  241. .demod_address = 0x0f,
  242. .no_tuner = 1,
  243. .demod_init = dntv_live_dvbt_pro_demod_init,
  244. };
  245. #endif
  246. static const struct zl10353_config dvico_fusionhdtv_hybrid = {
  247. .demod_address = 0x0f,
  248. .no_tuner = 1,
  249. };
  250. static const struct zl10353_config dvico_fusionhdtv_xc3028 = {
  251. .demod_address = 0x0f,
  252. .if2 = 45600,
  253. .no_tuner = 1,
  254. };
  255. static const struct mt352_config dvico_fusionhdtv_mt352_xc3028 = {
  256. .demod_address = 0x0f,
  257. .if2 = 4560,
  258. .no_tuner = 1,
  259. .demod_init = dvico_fusionhdtv_demod_init,
  260. };
  261. static const struct zl10353_config dvico_fusionhdtv_plus_v1_1 = {
  262. .demod_address = 0x0f,
  263. };
  264. static const struct cx22702_config connexant_refboard_config = {
  265. .demod_address = 0x43,
  266. .output_mode = CX22702_SERIAL_OUTPUT,
  267. };
  268. static const struct cx22702_config hauppauge_hvr_config = {
  269. .demod_address = 0x63,
  270. .output_mode = CX22702_SERIAL_OUTPUT,
  271. };
  272. static int or51132_set_ts_param(struct dvb_frontend* fe, int is_punctured)
  273. {
  274. struct cx8802_dev *dev= fe->dvb->priv;
  275. dev->ts_gen_cntrl = is_punctured ? 0x04 : 0x00;
  276. return 0;
  277. }
  278. static const struct or51132_config pchdtv_hd3000 = {
  279. .demod_address = 0x15,
  280. .set_ts_params = or51132_set_ts_param,
  281. };
  282. static int lgdt330x_pll_rf_set(struct dvb_frontend* fe, int index)
  283. {
  284. struct cx8802_dev *dev= fe->dvb->priv;
  285. struct cx88_core *core = dev->core;
  286. dprintk(1, "%s: index = %d\n", __func__, index);
  287. if (index == 0)
  288. cx_clear(MO_GP0_IO, 8);
  289. else
  290. cx_set(MO_GP0_IO, 8);
  291. return 0;
  292. }
  293. static int lgdt330x_set_ts_param(struct dvb_frontend* fe, int is_punctured)
  294. {
  295. struct cx8802_dev *dev= fe->dvb->priv;
  296. if (is_punctured)
  297. dev->ts_gen_cntrl |= 0x04;
  298. else
  299. dev->ts_gen_cntrl &= ~0x04;
  300. return 0;
  301. }
  302. static struct lgdt330x_config fusionhdtv_3_gold = {
  303. .demod_address = 0x0e,
  304. .demod_chip = LGDT3302,
  305. .serial_mpeg = 0x04, /* TPSERIAL for 3302 in TOP_CONTROL */
  306. .set_ts_params = lgdt330x_set_ts_param,
  307. };
  308. static const struct lgdt330x_config fusionhdtv_5_gold = {
  309. .demod_address = 0x0e,
  310. .demod_chip = LGDT3303,
  311. .serial_mpeg = 0x40, /* TPSERIAL for 3303 in TOP_CONTROL */
  312. .set_ts_params = lgdt330x_set_ts_param,
  313. };
  314. static const struct lgdt330x_config pchdtv_hd5500 = {
  315. .demod_address = 0x59,
  316. .demod_chip = LGDT3303,
  317. .serial_mpeg = 0x40, /* TPSERIAL for 3303 in TOP_CONTROL */
  318. .set_ts_params = lgdt330x_set_ts_param,
  319. };
  320. static int nxt200x_set_ts_param(struct dvb_frontend* fe, int is_punctured)
  321. {
  322. struct cx8802_dev *dev= fe->dvb->priv;
  323. dev->ts_gen_cntrl = is_punctured ? 0x04 : 0x00;
  324. return 0;
  325. }
  326. static const struct nxt200x_config ati_hdtvwonder = {
  327. .demod_address = 0x0a,
  328. .set_ts_params = nxt200x_set_ts_param,
  329. };
  330. static int cx24123_set_ts_param(struct dvb_frontend* fe,
  331. int is_punctured)
  332. {
  333. struct cx8802_dev *dev= fe->dvb->priv;
  334. dev->ts_gen_cntrl = 0x02;
  335. return 0;
  336. }
  337. static int kworld_dvbs_100_set_voltage(struct dvb_frontend* fe,
  338. fe_sec_voltage_t voltage)
  339. {
  340. struct cx8802_dev *dev= fe->dvb->priv;
  341. struct cx88_core *core = dev->core;
  342. if (voltage == SEC_VOLTAGE_OFF)
  343. cx_write(MO_GP0_IO, 0x000006fb);
  344. else
  345. cx_write(MO_GP0_IO, 0x000006f9);
  346. if (core->prev_set_voltage)
  347. return core->prev_set_voltage(fe, voltage);
  348. return 0;
  349. }
  350. static int geniatech_dvbs_set_voltage(struct dvb_frontend *fe,
  351. fe_sec_voltage_t voltage)
  352. {
  353. struct cx8802_dev *dev= fe->dvb->priv;
  354. struct cx88_core *core = dev->core;
  355. if (voltage == SEC_VOLTAGE_OFF) {
  356. dprintk(1,"LNB Voltage OFF\n");
  357. cx_write(MO_GP0_IO, 0x0000efff);
  358. }
  359. if (core->prev_set_voltage)
  360. return core->prev_set_voltage(fe, voltage);
  361. return 0;
  362. }
  363. static int tevii_dvbs_set_voltage(struct dvb_frontend *fe,
  364. fe_sec_voltage_t voltage)
  365. {
  366. struct cx8802_dev *dev= fe->dvb->priv;
  367. struct cx88_core *core = dev->core;
  368. cx_set(MO_GP0_IO, 0x6040);
  369. switch (voltage) {
  370. case SEC_VOLTAGE_13:
  371. cx_clear(MO_GP0_IO, 0x20);
  372. break;
  373. case SEC_VOLTAGE_18:
  374. cx_set(MO_GP0_IO, 0x20);
  375. break;
  376. case SEC_VOLTAGE_OFF:
  377. cx_clear(MO_GP0_IO, 0x20);
  378. break;
  379. }
  380. if (core->prev_set_voltage)
  381. return core->prev_set_voltage(fe, voltage);
  382. return 0;
  383. }
  384. static int vp1027_set_voltage(struct dvb_frontend *fe,
  385. fe_sec_voltage_t voltage)
  386. {
  387. struct cx8802_dev *dev = fe->dvb->priv;
  388. struct cx88_core *core = dev->core;
  389. switch (voltage) {
  390. case SEC_VOLTAGE_13:
  391. dprintk(1, "LNB SEC Voltage=13\n");
  392. cx_write(MO_GP0_IO, 0x00001220);
  393. break;
  394. case SEC_VOLTAGE_18:
  395. dprintk(1, "LNB SEC Voltage=18\n");
  396. cx_write(MO_GP0_IO, 0x00001222);
  397. break;
  398. case SEC_VOLTAGE_OFF:
  399. dprintk(1, "LNB Voltage OFF\n");
  400. cx_write(MO_GP0_IO, 0x00001230);
  401. break;
  402. }
  403. if (core->prev_set_voltage)
  404. return core->prev_set_voltage(fe, voltage);
  405. return 0;
  406. }
  407. static const struct cx24123_config geniatech_dvbs_config = {
  408. .demod_address = 0x55,
  409. .set_ts_params = cx24123_set_ts_param,
  410. };
  411. static const struct cx24123_config hauppauge_novas_config = {
  412. .demod_address = 0x55,
  413. .set_ts_params = cx24123_set_ts_param,
  414. };
  415. static const struct cx24123_config kworld_dvbs_100_config = {
  416. .demod_address = 0x15,
  417. .set_ts_params = cx24123_set_ts_param,
  418. .lnb_polarity = 1,
  419. };
  420. static const struct s5h1409_config pinnacle_pctv_hd_800i_config = {
  421. .demod_address = 0x32 >> 1,
  422. .output_mode = S5H1409_PARALLEL_OUTPUT,
  423. .gpio = S5H1409_GPIO_ON,
  424. .qam_if = 44000,
  425. .inversion = S5H1409_INVERSION_OFF,
  426. .status_mode = S5H1409_DEMODLOCKING,
  427. .mpeg_timing = S5H1409_MPEGTIMING_NONCONTINOUS_NONINVERTING_CLOCK,
  428. };
  429. static const struct s5h1409_config dvico_hdtv5_pci_nano_config = {
  430. .demod_address = 0x32 >> 1,
  431. .output_mode = S5H1409_SERIAL_OUTPUT,
  432. .gpio = S5H1409_GPIO_OFF,
  433. .inversion = S5H1409_INVERSION_OFF,
  434. .status_mode = S5H1409_DEMODLOCKING,
  435. .mpeg_timing = S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
  436. };
  437. static const struct s5h1409_config kworld_atsc_120_config = {
  438. .demod_address = 0x32 >> 1,
  439. .output_mode = S5H1409_SERIAL_OUTPUT,
  440. .gpio = S5H1409_GPIO_OFF,
  441. .inversion = S5H1409_INVERSION_OFF,
  442. .status_mode = S5H1409_DEMODLOCKING,
  443. .mpeg_timing = S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
  444. };
  445. static const struct xc5000_config pinnacle_pctv_hd_800i_tuner_config = {
  446. .i2c_address = 0x64,
  447. .if_khz = 5380,
  448. };
  449. static const struct zl10353_config cx88_pinnacle_hybrid_pctv = {
  450. .demod_address = (0x1e >> 1),
  451. .no_tuner = 1,
  452. .if2 = 45600,
  453. };
  454. static const struct zl10353_config cx88_geniatech_x8000_mt = {
  455. .demod_address = (0x1e >> 1),
  456. .no_tuner = 1,
  457. .disable_i2c_gate_ctrl = 1,
  458. };
  459. static const struct s5h1411_config dvico_fusionhdtv7_config = {
  460. .output_mode = S5H1411_SERIAL_OUTPUT,
  461. .gpio = S5H1411_GPIO_ON,
  462. .mpeg_timing = S5H1411_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
  463. .qam_if = S5H1411_IF_44000,
  464. .vsb_if = S5H1411_IF_44000,
  465. .inversion = S5H1411_INVERSION_OFF,
  466. .status_mode = S5H1411_DEMODLOCKING
  467. };
  468. static const struct xc5000_config dvico_fusionhdtv7_tuner_config = {
  469. .i2c_address = 0xc2 >> 1,
  470. .if_khz = 5380,
  471. };
  472. static int attach_xc3028(u8 addr, struct cx8802_dev *dev)
  473. {
  474. struct dvb_frontend *fe;
  475. struct videobuf_dvb_frontend *fe0 = NULL;
  476. struct xc2028_ctrl ctl;
  477. struct xc2028_config cfg = {
  478. .i2c_adap = &dev->core->i2c_adap,
  479. .i2c_addr = addr,
  480. .ctrl = &ctl,
  481. };
  482. /* Get the first frontend */
  483. fe0 = videobuf_dvb_get_frontend(&dev->frontends, 1);
  484. if (!fe0)
  485. return -EINVAL;
  486. if (!fe0->dvb.frontend) {
  487. printk(KERN_ERR "%s/2: dvb frontend not attached. "
  488. "Can't attach xc3028\n",
  489. dev->core->name);
  490. return -EINVAL;
  491. }
  492. /*
  493. * Some xc3028 devices may be hidden by an I2C gate. This is known
  494. * to happen with some s5h1409-based devices.
  495. * Now that I2C gate is open, sets up xc3028 configuration
  496. */
  497. cx88_setup_xc3028(dev->core, &ctl);
  498. fe = dvb_attach(xc2028_attach, fe0->dvb.frontend, &cfg);
  499. if (!fe) {
  500. printk(KERN_ERR "%s/2: xc3028 attach failed\n",
  501. dev->core->name);
  502. dvb_frontend_detach(fe0->dvb.frontend);
  503. dvb_unregister_frontend(fe0->dvb.frontend);
  504. fe0->dvb.frontend = NULL;
  505. return -EINVAL;
  506. }
  507. printk(KERN_INFO "%s/2: xc3028 attached\n",
  508. dev->core->name);
  509. return 0;
  510. }
  511. static int cx24116_set_ts_param(struct dvb_frontend *fe,
  512. int is_punctured)
  513. {
  514. struct cx8802_dev *dev = fe->dvb->priv;
  515. dev->ts_gen_cntrl = 0x2;
  516. return 0;
  517. }
  518. static int stv0900_set_ts_param(struct dvb_frontend *fe,
  519. int is_punctured)
  520. {
  521. struct cx8802_dev *dev = fe->dvb->priv;
  522. dev->ts_gen_cntrl = 0;
  523. return 0;
  524. }
  525. static int cx24116_reset_device(struct dvb_frontend *fe)
  526. {
  527. struct cx8802_dev *dev = fe->dvb->priv;
  528. struct cx88_core *core = dev->core;
  529. /* Reset the part */
  530. /* Put the cx24116 into reset */
  531. cx_write(MO_SRST_IO, 0);
  532. msleep(10);
  533. /* Take the cx24116 out of reset */
  534. cx_write(MO_SRST_IO, 1);
  535. msleep(10);
  536. return 0;
  537. }
  538. static const struct cx24116_config hauppauge_hvr4000_config = {
  539. .demod_address = 0x05,
  540. .set_ts_params = cx24116_set_ts_param,
  541. .reset_device = cx24116_reset_device,
  542. };
  543. static const struct cx24116_config tevii_s460_config = {
  544. .demod_address = 0x55,
  545. .set_ts_params = cx24116_set_ts_param,
  546. .reset_device = cx24116_reset_device,
  547. };
  548. static int ds3000_set_ts_param(struct dvb_frontend *fe,
  549. int is_punctured)
  550. {
  551. struct cx8802_dev *dev = fe->dvb->priv;
  552. dev->ts_gen_cntrl = 4;
  553. return 0;
  554. }
  555. static struct ds3000_config tevii_ds3000_config = {
  556. .demod_address = 0x68,
  557. .set_ts_params = ds3000_set_ts_param,
  558. };
  559. static const struct stv0900_config prof_7301_stv0900_config = {
  560. .demod_address = 0x6a,
  561. /* demod_mode = 0,*/
  562. .xtal = 27000000,
  563. .clkmode = 3,/* 0-CLKI, 2-XTALI, else AUTO */
  564. .diseqc_mode = 2,/* 2/3 PWM */
  565. .tun1_maddress = 0,/* 0x60 */
  566. .tun1_adc = 0,/* 2 Vpp */
  567. .path1_mode = 3,
  568. .set_ts_params = stv0900_set_ts_param,
  569. };
  570. static const struct stb6100_config prof_7301_stb6100_config = {
  571. .tuner_address = 0x60,
  572. .refclock = 27000000,
  573. };
  574. static const struct stv0299_config tevii_tuner_sharp_config = {
  575. .demod_address = 0x68,
  576. .inittab = sharp_z0194a_inittab,
  577. .mclk = 88000000UL,
  578. .invert = 1,
  579. .skip_reinit = 0,
  580. .lock_output = 1,
  581. .volt13_op0_op1 = STV0299_VOLT13_OP1,
  582. .min_delay_ms = 100,
  583. .set_symbol_rate = sharp_z0194a_set_symbol_rate,
  584. .set_ts_params = cx24116_set_ts_param,
  585. };
  586. static const struct stv0288_config tevii_tuner_earda_config = {
  587. .demod_address = 0x68,
  588. .min_delay_ms = 100,
  589. .set_ts_params = cx24116_set_ts_param,
  590. };
  591. static int cx8802_alloc_frontends(struct cx8802_dev *dev)
  592. {
  593. struct cx88_core *core = dev->core;
  594. struct videobuf_dvb_frontend *fe = NULL;
  595. int i;
  596. mutex_init(&dev->frontends.lock);
  597. INIT_LIST_HEAD(&dev->frontends.felist);
  598. if (!core->board.num_frontends)
  599. return -ENODEV;
  600. printk(KERN_INFO "%s() allocating %d frontend(s)\n", __func__,
  601. core->board.num_frontends);
  602. for (i = 1; i <= core->board.num_frontends; i++) {
  603. fe = videobuf_dvb_alloc_frontend(&dev->frontends, i);
  604. if (!fe) {
  605. printk(KERN_ERR "%s() failed to alloc\n", __func__);
  606. videobuf_dvb_dealloc_frontends(&dev->frontends);
  607. return -ENOMEM;
  608. }
  609. }
  610. return 0;
  611. }
  612. static const u8 samsung_smt_7020_inittab[] = {
  613. 0x01, 0x15,
  614. 0x02, 0x00,
  615. 0x03, 0x00,
  616. 0x04, 0x7D,
  617. 0x05, 0x0F,
  618. 0x06, 0x02,
  619. 0x07, 0x00,
  620. 0x08, 0x60,
  621. 0x0A, 0xC2,
  622. 0x0B, 0x00,
  623. 0x0C, 0x01,
  624. 0x0D, 0x81,
  625. 0x0E, 0x44,
  626. 0x0F, 0x09,
  627. 0x10, 0x3C,
  628. 0x11, 0x84,
  629. 0x12, 0xDA,
  630. 0x13, 0x99,
  631. 0x14, 0x8D,
  632. 0x15, 0xCE,
  633. 0x16, 0xE8,
  634. 0x17, 0x43,
  635. 0x18, 0x1C,
  636. 0x19, 0x1B,
  637. 0x1A, 0x1D,
  638. 0x1C, 0x12,
  639. 0x1D, 0x00,
  640. 0x1E, 0x00,
  641. 0x1F, 0x00,
  642. 0x20, 0x00,
  643. 0x21, 0x00,
  644. 0x22, 0x00,
  645. 0x23, 0x00,
  646. 0x28, 0x02,
  647. 0x29, 0x28,
  648. 0x2A, 0x14,
  649. 0x2B, 0x0F,
  650. 0x2C, 0x09,
  651. 0x2D, 0x05,
  652. 0x31, 0x1F,
  653. 0x32, 0x19,
  654. 0x33, 0xFC,
  655. 0x34, 0x13,
  656. 0xff, 0xff,
  657. };
  658. static int samsung_smt_7020_tuner_set_params(struct dvb_frontend *fe,
  659. struct dvb_frontend_parameters *params)
  660. {
  661. struct cx8802_dev *dev = fe->dvb->priv;
  662. u8 buf[4];
  663. u32 div;
  664. struct i2c_msg msg = {
  665. .addr = 0x61,
  666. .flags = 0,
  667. .buf = buf,
  668. .len = sizeof(buf) };
  669. div = params->frequency / 125;
  670. buf[0] = (div >> 8) & 0x7f;
  671. buf[1] = div & 0xff;
  672. buf[2] = 0x84; /* 0xC4 */
  673. buf[3] = 0x00;
  674. if (params->frequency < 1500000)
  675. buf[3] |= 0x10;
  676. if (fe->ops.i2c_gate_ctrl)
  677. fe->ops.i2c_gate_ctrl(fe, 1);
  678. if (i2c_transfer(&dev->core->i2c_adap, &msg, 1) != 1)
  679. return -EIO;
  680. return 0;
  681. }
  682. static int samsung_smt_7020_set_tone(struct dvb_frontend *fe,
  683. fe_sec_tone_mode_t tone)
  684. {
  685. struct cx8802_dev *dev = fe->dvb->priv;
  686. struct cx88_core *core = dev->core;
  687. cx_set(MO_GP0_IO, 0x0800);
  688. switch (tone) {
  689. case SEC_TONE_ON:
  690. cx_set(MO_GP0_IO, 0x08);
  691. break;
  692. case SEC_TONE_OFF:
  693. cx_clear(MO_GP0_IO, 0x08);
  694. break;
  695. default:
  696. return -EINVAL;
  697. }
  698. return 0;
  699. }
  700. static int samsung_smt_7020_set_voltage(struct dvb_frontend *fe,
  701. fe_sec_voltage_t voltage)
  702. {
  703. struct cx8802_dev *dev = fe->dvb->priv;
  704. struct cx88_core *core = dev->core;
  705. u8 data;
  706. struct i2c_msg msg = {
  707. .addr = 8,
  708. .flags = 0,
  709. .buf = &data,
  710. .len = sizeof(data) };
  711. cx_set(MO_GP0_IO, 0x8000);
  712. switch (voltage) {
  713. case SEC_VOLTAGE_OFF:
  714. break;
  715. case SEC_VOLTAGE_13:
  716. data = ISL6421_EN1 | ISL6421_LLC1;
  717. cx_clear(MO_GP0_IO, 0x80);
  718. break;
  719. case SEC_VOLTAGE_18:
  720. data = ISL6421_EN1 | ISL6421_LLC1 | ISL6421_VSEL1;
  721. cx_clear(MO_GP0_IO, 0x80);
  722. break;
  723. default:
  724. return -EINVAL;
  725. };
  726. return (i2c_transfer(&dev->core->i2c_adap, &msg, 1) == 1) ? 0 : -EIO;
  727. }
  728. static int samsung_smt_7020_stv0299_set_symbol_rate(struct dvb_frontend *fe,
  729. u32 srate, u32 ratio)
  730. {
  731. u8 aclk = 0;
  732. u8 bclk = 0;
  733. if (srate < 1500000) {
  734. aclk = 0xb7;
  735. bclk = 0x47;
  736. } else if (srate < 3000000) {
  737. aclk = 0xb7;
  738. bclk = 0x4b;
  739. } else if (srate < 7000000) {
  740. aclk = 0xb7;
  741. bclk = 0x4f;
  742. } else if (srate < 14000000) {
  743. aclk = 0xb7;
  744. bclk = 0x53;
  745. } else if (srate < 30000000) {
  746. aclk = 0xb6;
  747. bclk = 0x53;
  748. } else if (srate < 45000000) {
  749. aclk = 0xb4;
  750. bclk = 0x51;
  751. }
  752. stv0299_writereg(fe, 0x13, aclk);
  753. stv0299_writereg(fe, 0x14, bclk);
  754. stv0299_writereg(fe, 0x1f, (ratio >> 16) & 0xff);
  755. stv0299_writereg(fe, 0x20, (ratio >> 8) & 0xff);
  756. stv0299_writereg(fe, 0x21, ratio & 0xf0);
  757. return 0;
  758. }
  759. static const struct stv0299_config samsung_stv0299_config = {
  760. .demod_address = 0x68,
  761. .inittab = samsung_smt_7020_inittab,
  762. .mclk = 88000000UL,
  763. .invert = 0,
  764. .skip_reinit = 0,
  765. .lock_output = STV0299_LOCKOUTPUT_LK,
  766. .volt13_op0_op1 = STV0299_VOLT13_OP1,
  767. .min_delay_ms = 100,
  768. .set_symbol_rate = samsung_smt_7020_stv0299_set_symbol_rate,
  769. };
  770. static int dvb_register(struct cx8802_dev *dev)
  771. {
  772. struct cx88_core *core = dev->core;
  773. struct videobuf_dvb_frontend *fe0, *fe1 = NULL;
  774. int mfe_shared = 0; /* bus not shared by default */
  775. if (0 != core->i2c_rc) {
  776. printk(KERN_ERR "%s/2: no i2c-bus available, cannot attach dvb drivers\n", core->name);
  777. goto frontend_detach;
  778. }
  779. /* Get the first frontend */
  780. fe0 = videobuf_dvb_get_frontend(&dev->frontends, 1);
  781. if (!fe0)
  782. goto frontend_detach;
  783. /* multi-frontend gate control is undefined or defaults to fe0 */
  784. dev->frontends.gate = 0;
  785. /* Sets the gate control callback to be used by i2c command calls */
  786. core->gate_ctrl = cx88_dvb_gate_ctrl;
  787. /* init frontend(s) */
  788. switch (core->boardnr) {
  789. case CX88_BOARD_HAUPPAUGE_DVB_T1:
  790. fe0->dvb.frontend = dvb_attach(cx22702_attach,
  791. &connexant_refboard_config,
  792. &core->i2c_adap);
  793. if (fe0->dvb.frontend != NULL) {
  794. if (!dvb_attach(dvb_pll_attach, fe0->dvb.frontend,
  795. 0x61, &core->i2c_adap,
  796. DVB_PLL_THOMSON_DTT759X))
  797. goto frontend_detach;
  798. }
  799. break;
  800. case CX88_BOARD_TERRATEC_CINERGY_1400_DVB_T1:
  801. case CX88_BOARD_CONEXANT_DVB_T1:
  802. case CX88_BOARD_KWORLD_DVB_T_CX22702:
  803. case CX88_BOARD_WINFAST_DTV1000:
  804. fe0->dvb.frontend = dvb_attach(cx22702_attach,
  805. &connexant_refboard_config,
  806. &core->i2c_adap);
  807. if (fe0->dvb.frontend != NULL) {
  808. if (!dvb_attach(dvb_pll_attach, fe0->dvb.frontend,
  809. 0x60, &core->i2c_adap,
  810. DVB_PLL_THOMSON_DTT7579))
  811. goto frontend_detach;
  812. }
  813. break;
  814. case CX88_BOARD_WINFAST_DTV2000H:
  815. case CX88_BOARD_WINFAST_DTV2000H_J:
  816. case CX88_BOARD_HAUPPAUGE_HVR1100:
  817. case CX88_BOARD_HAUPPAUGE_HVR1100LP:
  818. case CX88_BOARD_HAUPPAUGE_HVR1300:
  819. fe0->dvb.frontend = dvb_attach(cx22702_attach,
  820. &hauppauge_hvr_config,
  821. &core->i2c_adap);
  822. if (fe0->dvb.frontend != NULL) {
  823. if (!dvb_attach(simple_tuner_attach, fe0->dvb.frontend,
  824. &core->i2c_adap, 0x61,
  825. TUNER_PHILIPS_FMD1216ME_MK3))
  826. goto frontend_detach;
  827. }
  828. break;
  829. case CX88_BOARD_HAUPPAUGE_HVR3000:
  830. /* MFE frontend 1 */
  831. mfe_shared = 1;
  832. dev->frontends.gate = 2;
  833. /* DVB-S init */
  834. fe0->dvb.frontend = dvb_attach(cx24123_attach,
  835. &hauppauge_novas_config,
  836. &dev->core->i2c_adap);
  837. if (fe0->dvb.frontend) {
  838. if (!dvb_attach(isl6421_attach,
  839. fe0->dvb.frontend,
  840. &dev->core->i2c_adap,
  841. 0x08, ISL6421_DCL, 0x00))
  842. goto frontend_detach;
  843. }
  844. /* MFE frontend 2 */
  845. fe1 = videobuf_dvb_get_frontend(&dev->frontends, 2);
  846. if (!fe1)
  847. goto frontend_detach;
  848. /* DVB-T init */
  849. fe1->dvb.frontend = dvb_attach(cx22702_attach,
  850. &hauppauge_hvr_config,
  851. &dev->core->i2c_adap);
  852. if (fe1->dvb.frontend) {
  853. fe1->dvb.frontend->id = 1;
  854. if (!dvb_attach(simple_tuner_attach,
  855. fe1->dvb.frontend,
  856. &dev->core->i2c_adap,
  857. 0x61, TUNER_PHILIPS_FMD1216ME_MK3))
  858. goto frontend_detach;
  859. }
  860. break;
  861. case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_PLUS:
  862. fe0->dvb.frontend = dvb_attach(mt352_attach,
  863. &dvico_fusionhdtv,
  864. &core->i2c_adap);
  865. if (fe0->dvb.frontend != NULL) {
  866. if (!dvb_attach(dvb_pll_attach, fe0->dvb.frontend,
  867. 0x60, NULL, DVB_PLL_THOMSON_DTT7579))
  868. goto frontend_detach;
  869. break;
  870. }
  871. /* ZL10353 replaces MT352 on later cards */
  872. fe0->dvb.frontend = dvb_attach(zl10353_attach,
  873. &dvico_fusionhdtv_plus_v1_1,
  874. &core->i2c_adap);
  875. if (fe0->dvb.frontend != NULL) {
  876. if (!dvb_attach(dvb_pll_attach, fe0->dvb.frontend,
  877. 0x60, NULL, DVB_PLL_THOMSON_DTT7579))
  878. goto frontend_detach;
  879. }
  880. break;
  881. case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL:
  882. /* The tin box says DEE1601, but it seems to be DTT7579
  883. * compatible, with a slightly different MT352 AGC gain. */
  884. fe0->dvb.frontend = dvb_attach(mt352_attach,
  885. &dvico_fusionhdtv_dual,
  886. &core->i2c_adap);
  887. if (fe0->dvb.frontend != NULL) {
  888. if (!dvb_attach(dvb_pll_attach, fe0->dvb.frontend,
  889. 0x61, NULL, DVB_PLL_THOMSON_DTT7579))
  890. goto frontend_detach;
  891. break;
  892. }
  893. /* ZL10353 replaces MT352 on later cards */
  894. fe0->dvb.frontend = dvb_attach(zl10353_attach,
  895. &dvico_fusionhdtv_plus_v1_1,
  896. &core->i2c_adap);
  897. if (fe0->dvb.frontend != NULL) {
  898. if (!dvb_attach(dvb_pll_attach, fe0->dvb.frontend,
  899. 0x61, NULL, DVB_PLL_THOMSON_DTT7579))
  900. goto frontend_detach;
  901. }
  902. break;
  903. case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T1:
  904. fe0->dvb.frontend = dvb_attach(mt352_attach,
  905. &dvico_fusionhdtv,
  906. &core->i2c_adap);
  907. if (fe0->dvb.frontend != NULL) {
  908. if (!dvb_attach(dvb_pll_attach, fe0->dvb.frontend,
  909. 0x61, NULL, DVB_PLL_LG_Z201))
  910. goto frontend_detach;
  911. }
  912. break;
  913. case CX88_BOARD_KWORLD_DVB_T:
  914. case CX88_BOARD_DNTV_LIVE_DVB_T:
  915. case CX88_BOARD_ADSTECH_DVB_T_PCI:
  916. fe0->dvb.frontend = dvb_attach(mt352_attach,
  917. &dntv_live_dvbt_config,
  918. &core->i2c_adap);
  919. if (fe0->dvb.frontend != NULL) {
  920. if (!dvb_attach(dvb_pll_attach, fe0->dvb.frontend,
  921. 0x61, NULL, DVB_PLL_UNKNOWN_1))
  922. goto frontend_detach;
  923. }
  924. break;
  925. case CX88_BOARD_DNTV_LIVE_DVB_T_PRO:
  926. #if defined(CONFIG_VIDEO_CX88_VP3054) || (defined(CONFIG_VIDEO_CX88_VP3054_MODULE) && defined(MODULE))
  927. /* MT352 is on a secondary I2C bus made from some GPIO lines */
  928. fe0->dvb.frontend = dvb_attach(mt352_attach, &dntv_live_dvbt_pro_config,
  929. &dev->vp3054->adap);
  930. if (fe0->dvb.frontend != NULL) {
  931. if (!dvb_attach(simple_tuner_attach, fe0->dvb.frontend,
  932. &core->i2c_adap, 0x61,
  933. TUNER_PHILIPS_FMD1216ME_MK3))
  934. goto frontend_detach;
  935. }
  936. #else
  937. printk(KERN_ERR "%s/2: built without vp3054 support\n",
  938. core->name);
  939. #endif
  940. break;
  941. case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_HYBRID:
  942. fe0->dvb.frontend = dvb_attach(zl10353_attach,
  943. &dvico_fusionhdtv_hybrid,
  944. &core->i2c_adap);
  945. if (fe0->dvb.frontend != NULL) {
  946. if (!dvb_attach(simple_tuner_attach, fe0->dvb.frontend,
  947. &core->i2c_adap, 0x61,
  948. TUNER_THOMSON_FE6600))
  949. goto frontend_detach;
  950. }
  951. break;
  952. case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_PRO:
  953. fe0->dvb.frontend = dvb_attach(zl10353_attach,
  954. &dvico_fusionhdtv_xc3028,
  955. &core->i2c_adap);
  956. if (fe0->dvb.frontend == NULL)
  957. fe0->dvb.frontend = dvb_attach(mt352_attach,
  958. &dvico_fusionhdtv_mt352_xc3028,
  959. &core->i2c_adap);
  960. /*
  961. * On this board, the demod provides the I2C bus pullup.
  962. * We must not permit gate_ctrl to be performed, or
  963. * the xc3028 cannot communicate on the bus.
  964. */
  965. if (fe0->dvb.frontend)
  966. fe0->dvb.frontend->ops.i2c_gate_ctrl = NULL;
  967. if (attach_xc3028(0x61, dev) < 0)
  968. goto frontend_detach;
  969. break;
  970. case CX88_BOARD_PCHDTV_HD3000:
  971. fe0->dvb.frontend = dvb_attach(or51132_attach, &pchdtv_hd3000,
  972. &core->i2c_adap);
  973. if (fe0->dvb.frontend != NULL) {
  974. if (!dvb_attach(simple_tuner_attach, fe0->dvb.frontend,
  975. &core->i2c_adap, 0x61,
  976. TUNER_THOMSON_DTT761X))
  977. goto frontend_detach;
  978. }
  979. break;
  980. case CX88_BOARD_DVICO_FUSIONHDTV_3_GOLD_Q:
  981. dev->ts_gen_cntrl = 0x08;
  982. /* Do a hardware reset of chip before using it. */
  983. cx_clear(MO_GP0_IO, 1);
  984. mdelay(100);
  985. cx_set(MO_GP0_IO, 1);
  986. mdelay(200);
  987. /* Select RF connector callback */
  988. fusionhdtv_3_gold.pll_rf_set = lgdt330x_pll_rf_set;
  989. fe0->dvb.frontend = dvb_attach(lgdt330x_attach,
  990. &fusionhdtv_3_gold,
  991. &core->i2c_adap);
  992. if (fe0->dvb.frontend != NULL) {
  993. if (!dvb_attach(simple_tuner_attach, fe0->dvb.frontend,
  994. &core->i2c_adap, 0x61,
  995. TUNER_MICROTUNE_4042FI5))
  996. goto frontend_detach;
  997. }
  998. break;
  999. case CX88_BOARD_DVICO_FUSIONHDTV_3_GOLD_T:
  1000. dev->ts_gen_cntrl = 0x08;
  1001. /* Do a hardware reset of chip before using it. */
  1002. cx_clear(MO_GP0_IO, 1);
  1003. mdelay(100);
  1004. cx_set(MO_GP0_IO, 9);
  1005. mdelay(200);
  1006. fe0->dvb.frontend = dvb_attach(lgdt330x_attach,
  1007. &fusionhdtv_3_gold,
  1008. &core->i2c_adap);
  1009. if (fe0->dvb.frontend != NULL) {
  1010. if (!dvb_attach(simple_tuner_attach, fe0->dvb.frontend,
  1011. &core->i2c_adap, 0x61,
  1012. TUNER_THOMSON_DTT761X))
  1013. goto frontend_detach;
  1014. }
  1015. break;
  1016. case CX88_BOARD_DVICO_FUSIONHDTV_5_GOLD:
  1017. dev->ts_gen_cntrl = 0x08;
  1018. /* Do a hardware reset of chip before using it. */
  1019. cx_clear(MO_GP0_IO, 1);
  1020. mdelay(100);
  1021. cx_set(MO_GP0_IO, 1);
  1022. mdelay(200);
  1023. fe0->dvb.frontend = dvb_attach(lgdt330x_attach,
  1024. &fusionhdtv_5_gold,
  1025. &core->i2c_adap);
  1026. if (fe0->dvb.frontend != NULL) {
  1027. if (!dvb_attach(simple_tuner_attach, fe0->dvb.frontend,
  1028. &core->i2c_adap, 0x61,
  1029. TUNER_LG_TDVS_H06XF))
  1030. goto frontend_detach;
  1031. if (!dvb_attach(tda9887_attach, fe0->dvb.frontend,
  1032. &core->i2c_adap, 0x43))
  1033. goto frontend_detach;
  1034. }
  1035. break;
  1036. case CX88_BOARD_PCHDTV_HD5500:
  1037. dev->ts_gen_cntrl = 0x08;
  1038. /* Do a hardware reset of chip before using it. */
  1039. cx_clear(MO_GP0_IO, 1);
  1040. mdelay(100);
  1041. cx_set(MO_GP0_IO, 1);
  1042. mdelay(200);
  1043. fe0->dvb.frontend = dvb_attach(lgdt330x_attach,
  1044. &pchdtv_hd5500,
  1045. &core->i2c_adap);
  1046. if (fe0->dvb.frontend != NULL) {
  1047. if (!dvb_attach(simple_tuner_attach, fe0->dvb.frontend,
  1048. &core->i2c_adap, 0x61,
  1049. TUNER_LG_TDVS_H06XF))
  1050. goto frontend_detach;
  1051. if (!dvb_attach(tda9887_attach, fe0->dvb.frontend,
  1052. &core->i2c_adap, 0x43))
  1053. goto frontend_detach;
  1054. }
  1055. break;
  1056. case CX88_BOARD_ATI_HDTVWONDER:
  1057. fe0->dvb.frontend = dvb_attach(nxt200x_attach,
  1058. &ati_hdtvwonder,
  1059. &core->i2c_adap);
  1060. if (fe0->dvb.frontend != NULL) {
  1061. if (!dvb_attach(simple_tuner_attach, fe0->dvb.frontend,
  1062. &core->i2c_adap, 0x61,
  1063. TUNER_PHILIPS_TUV1236D))
  1064. goto frontend_detach;
  1065. }
  1066. break;
  1067. case CX88_BOARD_HAUPPAUGE_NOVASPLUS_S1:
  1068. case CX88_BOARD_HAUPPAUGE_NOVASE2_S1:
  1069. fe0->dvb.frontend = dvb_attach(cx24123_attach,
  1070. &hauppauge_novas_config,
  1071. &core->i2c_adap);
  1072. if (fe0->dvb.frontend) {
  1073. if (!dvb_attach(isl6421_attach, fe0->dvb.frontend,
  1074. &core->i2c_adap, 0x08, ISL6421_DCL, 0x00))
  1075. goto frontend_detach;
  1076. }
  1077. break;
  1078. case CX88_BOARD_KWORLD_DVBS_100:
  1079. fe0->dvb.frontend = dvb_attach(cx24123_attach,
  1080. &kworld_dvbs_100_config,
  1081. &core->i2c_adap);
  1082. if (fe0->dvb.frontend) {
  1083. core->prev_set_voltage = fe0->dvb.frontend->ops.set_voltage;
  1084. fe0->dvb.frontend->ops.set_voltage = kworld_dvbs_100_set_voltage;
  1085. }
  1086. break;
  1087. case CX88_BOARD_GENIATECH_DVBS:
  1088. fe0->dvb.frontend = dvb_attach(cx24123_attach,
  1089. &geniatech_dvbs_config,
  1090. &core->i2c_adap);
  1091. if (fe0->dvb.frontend) {
  1092. core->prev_set_voltage = fe0->dvb.frontend->ops.set_voltage;
  1093. fe0->dvb.frontend->ops.set_voltage = geniatech_dvbs_set_voltage;
  1094. }
  1095. break;
  1096. case CX88_BOARD_PINNACLE_PCTV_HD_800i:
  1097. fe0->dvb.frontend = dvb_attach(s5h1409_attach,
  1098. &pinnacle_pctv_hd_800i_config,
  1099. &core->i2c_adap);
  1100. if (fe0->dvb.frontend != NULL) {
  1101. if (!dvb_attach(xc5000_attach, fe0->dvb.frontend,
  1102. &core->i2c_adap,
  1103. &pinnacle_pctv_hd_800i_tuner_config))
  1104. goto frontend_detach;
  1105. }
  1106. break;
  1107. case CX88_BOARD_DVICO_FUSIONHDTV_5_PCI_NANO:
  1108. fe0->dvb.frontend = dvb_attach(s5h1409_attach,
  1109. &dvico_hdtv5_pci_nano_config,
  1110. &core->i2c_adap);
  1111. if (fe0->dvb.frontend != NULL) {
  1112. struct dvb_frontend *fe;
  1113. struct xc2028_config cfg = {
  1114. .i2c_adap = &core->i2c_adap,
  1115. .i2c_addr = 0x61,
  1116. };
  1117. static struct xc2028_ctrl ctl = {
  1118. .fname = XC2028_DEFAULT_FIRMWARE,
  1119. .max_len = 64,
  1120. .scode_table = XC3028_FE_OREN538,
  1121. };
  1122. fe = dvb_attach(xc2028_attach,
  1123. fe0->dvb.frontend, &cfg);
  1124. if (fe != NULL && fe->ops.tuner_ops.set_config != NULL)
  1125. fe->ops.tuner_ops.set_config(fe, &ctl);
  1126. }
  1127. break;
  1128. case CX88_BOARD_PINNACLE_HYBRID_PCTV:
  1129. case CX88_BOARD_WINFAST_DTV1800H:
  1130. fe0->dvb.frontend = dvb_attach(zl10353_attach,
  1131. &cx88_pinnacle_hybrid_pctv,
  1132. &core->i2c_adap);
  1133. if (fe0->dvb.frontend) {
  1134. fe0->dvb.frontend->ops.i2c_gate_ctrl = NULL;
  1135. if (attach_xc3028(0x61, dev) < 0)
  1136. goto frontend_detach;
  1137. }
  1138. break;
  1139. case CX88_BOARD_GENIATECH_X8000_MT:
  1140. dev->ts_gen_cntrl = 0x00;
  1141. fe0->dvb.frontend = dvb_attach(zl10353_attach,
  1142. &cx88_geniatech_x8000_mt,
  1143. &core->i2c_adap);
  1144. if (attach_xc3028(0x61, dev) < 0)
  1145. goto frontend_detach;
  1146. break;
  1147. case CX88_BOARD_KWORLD_ATSC_120:
  1148. fe0->dvb.frontend = dvb_attach(s5h1409_attach,
  1149. &kworld_atsc_120_config,
  1150. &core->i2c_adap);
  1151. if (attach_xc3028(0x61, dev) < 0)
  1152. goto frontend_detach;
  1153. break;
  1154. case CX88_BOARD_DVICO_FUSIONHDTV_7_GOLD:
  1155. fe0->dvb.frontend = dvb_attach(s5h1411_attach,
  1156. &dvico_fusionhdtv7_config,
  1157. &core->i2c_adap);
  1158. if (fe0->dvb.frontend != NULL) {
  1159. if (!dvb_attach(xc5000_attach, fe0->dvb.frontend,
  1160. &core->i2c_adap,
  1161. &dvico_fusionhdtv7_tuner_config))
  1162. goto frontend_detach;
  1163. }
  1164. break;
  1165. case CX88_BOARD_HAUPPAUGE_HVR4000:
  1166. /* MFE frontend 1 */
  1167. mfe_shared = 1;
  1168. dev->frontends.gate = 2;
  1169. /* DVB-S/S2 Init */
  1170. fe0->dvb.frontend = dvb_attach(cx24116_attach,
  1171. &hauppauge_hvr4000_config,
  1172. &dev->core->i2c_adap);
  1173. if (fe0->dvb.frontend) {
  1174. if (!dvb_attach(isl6421_attach,
  1175. fe0->dvb.frontend,
  1176. &dev->core->i2c_adap,
  1177. 0x08, ISL6421_DCL, 0x00))
  1178. goto frontend_detach;
  1179. }
  1180. /* MFE frontend 2 */
  1181. fe1 = videobuf_dvb_get_frontend(&dev->frontends, 2);
  1182. if (!fe1)
  1183. goto frontend_detach;
  1184. /* DVB-T Init */
  1185. fe1->dvb.frontend = dvb_attach(cx22702_attach,
  1186. &hauppauge_hvr_config,
  1187. &dev->core->i2c_adap);
  1188. if (fe1->dvb.frontend) {
  1189. fe1->dvb.frontend->id = 1;
  1190. if (!dvb_attach(simple_tuner_attach,
  1191. fe1->dvb.frontend,
  1192. &dev->core->i2c_adap,
  1193. 0x61, TUNER_PHILIPS_FMD1216ME_MK3))
  1194. goto frontend_detach;
  1195. }
  1196. break;
  1197. case CX88_BOARD_HAUPPAUGE_HVR4000LITE:
  1198. fe0->dvb.frontend = dvb_attach(cx24116_attach,
  1199. &hauppauge_hvr4000_config,
  1200. &dev->core->i2c_adap);
  1201. if (fe0->dvb.frontend) {
  1202. if (!dvb_attach(isl6421_attach,
  1203. fe0->dvb.frontend,
  1204. &dev->core->i2c_adap,
  1205. 0x08, ISL6421_DCL, 0x00))
  1206. goto frontend_detach;
  1207. }
  1208. break;
  1209. case CX88_BOARD_PROF_6200:
  1210. case CX88_BOARD_TBS_8910:
  1211. case CX88_BOARD_TEVII_S420:
  1212. fe0->dvb.frontend = dvb_attach(stv0299_attach,
  1213. &tevii_tuner_sharp_config,
  1214. &core->i2c_adap);
  1215. if (fe0->dvb.frontend != NULL) {
  1216. if (!dvb_attach(dvb_pll_attach, fe0->dvb.frontend, 0x60,
  1217. &core->i2c_adap, DVB_PLL_OPERA1))
  1218. goto frontend_detach;
  1219. core->prev_set_voltage = fe0->dvb.frontend->ops.set_voltage;
  1220. fe0->dvb.frontend->ops.set_voltage = tevii_dvbs_set_voltage;
  1221. } else {
  1222. fe0->dvb.frontend = dvb_attach(stv0288_attach,
  1223. &tevii_tuner_earda_config,
  1224. &core->i2c_adap);
  1225. if (fe0->dvb.frontend != NULL) {
  1226. if (!dvb_attach(stb6000_attach, fe0->dvb.frontend, 0x61,
  1227. &core->i2c_adap))
  1228. goto frontend_detach;
  1229. core->prev_set_voltage = fe0->dvb.frontend->ops.set_voltage;
  1230. fe0->dvb.frontend->ops.set_voltage = tevii_dvbs_set_voltage;
  1231. }
  1232. }
  1233. break;
  1234. case CX88_BOARD_TEVII_S460:
  1235. fe0->dvb.frontend = dvb_attach(cx24116_attach,
  1236. &tevii_s460_config,
  1237. &core->i2c_adap);
  1238. if (fe0->dvb.frontend != NULL)
  1239. fe0->dvb.frontend->ops.set_voltage = tevii_dvbs_set_voltage;
  1240. break;
  1241. case CX88_BOARD_TEVII_S464:
  1242. fe0->dvb.frontend = dvb_attach(ds3000_attach,
  1243. &tevii_ds3000_config,
  1244. &core->i2c_adap);
  1245. if (fe0->dvb.frontend != NULL)
  1246. fe0->dvb.frontend->ops.set_voltage =
  1247. tevii_dvbs_set_voltage;
  1248. break;
  1249. case CX88_BOARD_OMICOM_SS4_PCI:
  1250. case CX88_BOARD_TBS_8920:
  1251. case CX88_BOARD_PROF_7300:
  1252. case CX88_BOARD_SATTRADE_ST4200:
  1253. fe0->dvb.frontend = dvb_attach(cx24116_attach,
  1254. &hauppauge_hvr4000_config,
  1255. &core->i2c_adap);
  1256. if (fe0->dvb.frontend != NULL)
  1257. fe0->dvb.frontend->ops.set_voltage = tevii_dvbs_set_voltage;
  1258. break;
  1259. case CX88_BOARD_TERRATEC_CINERGY_HT_PCI_MKII:
  1260. fe0->dvb.frontend = dvb_attach(zl10353_attach,
  1261. &cx88_terratec_cinergy_ht_pci_mkii_config,
  1262. &core->i2c_adap);
  1263. if (fe0->dvb.frontend) {
  1264. fe0->dvb.frontend->ops.i2c_gate_ctrl = NULL;
  1265. if (attach_xc3028(0x61, dev) < 0)
  1266. goto frontend_detach;
  1267. }
  1268. break;
  1269. case CX88_BOARD_PROF_7301:{
  1270. struct dvb_tuner_ops *tuner_ops = NULL;
  1271. fe0->dvb.frontend = dvb_attach(stv0900_attach,
  1272. &prof_7301_stv0900_config,
  1273. &core->i2c_adap, 0);
  1274. if (fe0->dvb.frontend != NULL) {
  1275. if (!dvb_attach(stb6100_attach, fe0->dvb.frontend,
  1276. &prof_7301_stb6100_config,
  1277. &core->i2c_adap))
  1278. goto frontend_detach;
  1279. tuner_ops = &fe0->dvb.frontend->ops.tuner_ops;
  1280. tuner_ops->set_frequency = stb6100_set_freq;
  1281. tuner_ops->get_frequency = stb6100_get_freq;
  1282. tuner_ops->set_bandwidth = stb6100_set_bandw;
  1283. tuner_ops->get_bandwidth = stb6100_get_bandw;
  1284. core->prev_set_voltage =
  1285. fe0->dvb.frontend->ops.set_voltage;
  1286. fe0->dvb.frontend->ops.set_voltage =
  1287. tevii_dvbs_set_voltage;
  1288. }
  1289. break;
  1290. }
  1291. case CX88_BOARD_SAMSUNG_SMT_7020:
  1292. dev->ts_gen_cntrl = 0x08;
  1293. cx_set(MO_GP0_IO, 0x0101);
  1294. cx_clear(MO_GP0_IO, 0x01);
  1295. mdelay(100);
  1296. cx_set(MO_GP0_IO, 0x01);
  1297. mdelay(200);
  1298. fe0->dvb.frontend = dvb_attach(stv0299_attach,
  1299. &samsung_stv0299_config,
  1300. &dev->core->i2c_adap);
  1301. if (fe0->dvb.frontend) {
  1302. fe0->dvb.frontend->ops.tuner_ops.set_params =
  1303. samsung_smt_7020_tuner_set_params;
  1304. fe0->dvb.frontend->tuner_priv =
  1305. &dev->core->i2c_adap;
  1306. fe0->dvb.frontend->ops.set_voltage =
  1307. samsung_smt_7020_set_voltage;
  1308. fe0->dvb.frontend->ops.set_tone =
  1309. samsung_smt_7020_set_tone;
  1310. }
  1311. break;
  1312. case CX88_BOARD_TWINHAN_VP1027_DVBS:
  1313. dev->ts_gen_cntrl = 0x00;
  1314. fe0->dvb.frontend = dvb_attach(mb86a16_attach,
  1315. &twinhan_vp1027,
  1316. &core->i2c_adap);
  1317. if (fe0->dvb.frontend) {
  1318. core->prev_set_voltage =
  1319. fe0->dvb.frontend->ops.set_voltage;
  1320. fe0->dvb.frontend->ops.set_voltage =
  1321. vp1027_set_voltage;
  1322. }
  1323. break;
  1324. default:
  1325. printk(KERN_ERR "%s/2: The frontend of your DVB/ATSC card isn't supported yet\n",
  1326. core->name);
  1327. break;
  1328. }
  1329. if ( (NULL == fe0->dvb.frontend) || (fe1 && NULL == fe1->dvb.frontend) ) {
  1330. printk(KERN_ERR
  1331. "%s/2: frontend initialization failed\n",
  1332. core->name);
  1333. goto frontend_detach;
  1334. }
  1335. /* define general-purpose callback pointer */
  1336. fe0->dvb.frontend->callback = cx88_tuner_callback;
  1337. /* Ensure all frontends negotiate bus access */
  1338. fe0->dvb.frontend->ops.ts_bus_ctrl = cx88_dvb_bus_ctrl;
  1339. if (fe1)
  1340. fe1->dvb.frontend->ops.ts_bus_ctrl = cx88_dvb_bus_ctrl;
  1341. /* Put the analog decoder in standby to keep it quiet */
  1342. call_all(core, core, s_power, 0);
  1343. /* register everything */
  1344. return videobuf_dvb_register_bus(&dev->frontends, THIS_MODULE, dev,
  1345. &dev->pci->dev, adapter_nr, mfe_shared, NULL);
  1346. frontend_detach:
  1347. core->gate_ctrl = NULL;
  1348. videobuf_dvb_dealloc_frontends(&dev->frontends);
  1349. return -EINVAL;
  1350. }
  1351. /* ----------------------------------------------------------- */
  1352. /* CX8802 MPEG -> mini driver - We have been given the hardware */
  1353. static int cx8802_dvb_advise_acquire(struct cx8802_driver *drv)
  1354. {
  1355. struct cx88_core *core = drv->core;
  1356. int err = 0;
  1357. dprintk( 1, "%s\n", __func__);
  1358. switch (core->boardnr) {
  1359. case CX88_BOARD_HAUPPAUGE_HVR1300:
  1360. /* We arrive here with either the cx23416 or the cx22702
  1361. * on the bus. Take the bus from the cx23416 and enable the
  1362. * cx22702 demod
  1363. */
  1364. /* Toggle reset on cx22702 leaving i2c active */
  1365. cx_set(MO_GP0_IO, 0x00000080);
  1366. udelay(1000);
  1367. cx_clear(MO_GP0_IO, 0x00000080);
  1368. udelay(50);
  1369. cx_set(MO_GP0_IO, 0x00000080);
  1370. udelay(1000);
  1371. /* enable the cx22702 pins */
  1372. cx_clear(MO_GP0_IO, 0x00000004);
  1373. udelay(1000);
  1374. break;
  1375. case CX88_BOARD_HAUPPAUGE_HVR3000:
  1376. case CX88_BOARD_HAUPPAUGE_HVR4000:
  1377. /* Toggle reset on cx22702 leaving i2c active */
  1378. cx_set(MO_GP0_IO, 0x00000080);
  1379. udelay(1000);
  1380. cx_clear(MO_GP0_IO, 0x00000080);
  1381. udelay(50);
  1382. cx_set(MO_GP0_IO, 0x00000080);
  1383. udelay(1000);
  1384. switch (core->dvbdev->frontends.active_fe_id) {
  1385. case 1: /* DVB-S/S2 Enabled */
  1386. /* tri-state the cx22702 pins */
  1387. cx_set(MO_GP0_IO, 0x00000004);
  1388. /* Take the cx24116/cx24123 out of reset */
  1389. cx_write(MO_SRST_IO, 1);
  1390. core->dvbdev->ts_gen_cntrl = 0x02; /* Parallel IO */
  1391. break;
  1392. case 2: /* DVB-T Enabled */
  1393. /* Put the cx24116/cx24123 into reset */
  1394. cx_write(MO_SRST_IO, 0);
  1395. /* enable the cx22702 pins */
  1396. cx_clear(MO_GP0_IO, 0x00000004);
  1397. core->dvbdev->ts_gen_cntrl = 0x0c; /* Serial IO */
  1398. break;
  1399. }
  1400. udelay(1000);
  1401. break;
  1402. default:
  1403. err = -ENODEV;
  1404. }
  1405. return err;
  1406. }
  1407. /* CX8802 MPEG -> mini driver - We no longer have the hardware */
  1408. static int cx8802_dvb_advise_release(struct cx8802_driver *drv)
  1409. {
  1410. struct cx88_core *core = drv->core;
  1411. int err = 0;
  1412. dprintk( 1, "%s\n", __func__);
  1413. switch (core->boardnr) {
  1414. case CX88_BOARD_HAUPPAUGE_HVR1300:
  1415. /* Do Nothing, leave the cx22702 on the bus. */
  1416. break;
  1417. case CX88_BOARD_HAUPPAUGE_HVR3000:
  1418. case CX88_BOARD_HAUPPAUGE_HVR4000:
  1419. break;
  1420. default:
  1421. err = -ENODEV;
  1422. }
  1423. return err;
  1424. }
  1425. static int cx8802_dvb_probe(struct cx8802_driver *drv)
  1426. {
  1427. struct cx88_core *core = drv->core;
  1428. struct cx8802_dev *dev = drv->core->dvbdev;
  1429. int err;
  1430. struct videobuf_dvb_frontend *fe;
  1431. int i;
  1432. dprintk( 1, "%s\n", __func__);
  1433. dprintk( 1, " ->being probed by Card=%d Name=%s, PCI %02x:%02x\n",
  1434. core->boardnr,
  1435. core->name,
  1436. core->pci_bus,
  1437. core->pci_slot);
  1438. err = -ENODEV;
  1439. if (!(core->board.mpeg & CX88_MPEG_DVB))
  1440. goto fail_core;
  1441. /* If vp3054 isn't enabled, a stub will just return 0 */
  1442. err = vp3054_i2c_probe(dev);
  1443. if (0 != err)
  1444. goto fail_core;
  1445. /* dvb stuff */
  1446. printk(KERN_INFO "%s/2: cx2388x based DVB/ATSC card\n", core->name);
  1447. dev->ts_gen_cntrl = 0x0c;
  1448. err = cx8802_alloc_frontends(dev);
  1449. if (err)
  1450. goto fail_core;
  1451. err = -ENODEV;
  1452. for (i = 1; i <= core->board.num_frontends; i++) {
  1453. fe = videobuf_dvb_get_frontend(&core->dvbdev->frontends, i);
  1454. if (fe == NULL) {
  1455. printk(KERN_ERR "%s() failed to get frontend(%d)\n",
  1456. __func__, i);
  1457. goto fail_probe;
  1458. }
  1459. videobuf_queue_sg_init(&fe->dvb.dvbq, &dvb_qops,
  1460. &dev->pci->dev, &dev->slock,
  1461. V4L2_BUF_TYPE_VIDEO_CAPTURE,
  1462. V4L2_FIELD_TOP,
  1463. sizeof(struct cx88_buffer),
  1464. dev, NULL);
  1465. /* init struct videobuf_dvb */
  1466. fe->dvb.name = dev->core->name;
  1467. }
  1468. err = dvb_register(dev);
  1469. if (err)
  1470. /* frontends/adapter de-allocated in dvb_register */
  1471. printk(KERN_ERR "%s/2: dvb_register failed (err = %d)\n",
  1472. core->name, err);
  1473. return err;
  1474. fail_probe:
  1475. videobuf_dvb_dealloc_frontends(&core->dvbdev->frontends);
  1476. fail_core:
  1477. return err;
  1478. }
  1479. static int cx8802_dvb_remove(struct cx8802_driver *drv)
  1480. {
  1481. struct cx88_core *core = drv->core;
  1482. struct cx8802_dev *dev = drv->core->dvbdev;
  1483. dprintk( 1, "%s\n", __func__);
  1484. videobuf_dvb_unregister_bus(&dev->frontends);
  1485. vp3054_i2c_remove(dev);
  1486. core->gate_ctrl = NULL;
  1487. return 0;
  1488. }
  1489. static struct cx8802_driver cx8802_dvb_driver = {
  1490. .type_id = CX88_MPEG_DVB,
  1491. .hw_access = CX8802_DRVCTL_SHARED,
  1492. .probe = cx8802_dvb_probe,
  1493. .remove = cx8802_dvb_remove,
  1494. .advise_acquire = cx8802_dvb_advise_acquire,
  1495. .advise_release = cx8802_dvb_advise_release,
  1496. };
  1497. static int __init dvb_init(void)
  1498. {
  1499. printk(KERN_INFO "cx88/2: cx2388x dvb driver version %d.%d.%d loaded\n",
  1500. (CX88_VERSION_CODE >> 16) & 0xff,
  1501. (CX88_VERSION_CODE >> 8) & 0xff,
  1502. CX88_VERSION_CODE & 0xff);
  1503. #ifdef SNAPSHOT
  1504. printk(KERN_INFO "cx2388x: snapshot date %04d-%02d-%02d\n",
  1505. SNAPSHOT/10000, (SNAPSHOT/100)%100, SNAPSHOT%100);
  1506. #endif
  1507. return cx8802_register_driver(&cx8802_dvb_driver);
  1508. }
  1509. static void __exit dvb_fini(void)
  1510. {
  1511. cx8802_unregister_driver(&cx8802_dvb_driver);
  1512. }
  1513. module_init(dvb_init);
  1514. module_exit(dvb_fini);
  1515. /*
  1516. * Local variables:
  1517. * c-basic-offset: 8
  1518. * compile-command: "make DVB=1"
  1519. * End:
  1520. */