Kconfig 63 KB

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  1. config ARM
  2. bool
  3. default y
  4. select HAVE_AOUT
  5. select HAVE_DMA_API_DEBUG
  6. select HAVE_IDE if PCI || ISA || PCMCIA
  7. select HAVE_MEMBLOCK
  8. select RTC_LIB
  9. select SYS_SUPPORTS_APM_EMULATION
  10. select GENERIC_ATOMIC64 if (CPU_V6 || !CPU_32v6K || !AEABI)
  11. select HAVE_OPROFILE if (HAVE_PERF_EVENTS)
  12. select HAVE_ARCH_KGDB
  13. select HAVE_KPROBES if !XIP_KERNEL
  14. select HAVE_KRETPROBES if (HAVE_KPROBES)
  15. select HAVE_FUNCTION_TRACER if (!XIP_KERNEL)
  16. select HAVE_FTRACE_MCOUNT_RECORD if (!XIP_KERNEL)
  17. select HAVE_DYNAMIC_FTRACE if (!XIP_KERNEL)
  18. select HAVE_FUNCTION_GRAPH_TRACER if (!THUMB2_KERNEL)
  19. select HAVE_GENERIC_DMA_COHERENT
  20. select HAVE_KERNEL_GZIP
  21. select HAVE_KERNEL_LZO
  22. select HAVE_KERNEL_LZMA
  23. select HAVE_IRQ_WORK
  24. select HAVE_PERF_EVENTS
  25. select PERF_USE_VMALLOC
  26. select HAVE_REGS_AND_STACK_ACCESS_API
  27. select HAVE_HW_BREAKPOINT if (PERF_EVENTS && (CPU_V6 || CPU_V6K || CPU_V7))
  28. select HAVE_C_RECORDMCOUNT
  29. select HAVE_GENERIC_HARDIRQS
  30. select HAVE_SPARSE_IRQ
  31. select GENERIC_IRQ_SHOW
  32. select CPU_PM if (SUSPEND || CPU_IDLE)
  33. help
  34. The ARM series is a line of low-power-consumption RISC chip designs
  35. licensed by ARM Ltd and targeted at embedded applications and
  36. handhelds such as the Compaq IPAQ. ARM-based PCs are no longer
  37. manufactured, but legacy ARM-based PC hardware remains popular in
  38. Europe. There is an ARM Linux project with a web page at
  39. <http://www.arm.linux.org.uk/>.
  40. config ARM_HAS_SG_CHAIN
  41. bool
  42. config HAVE_PWM
  43. bool
  44. config MIGHT_HAVE_PCI
  45. bool
  46. config SYS_SUPPORTS_APM_EMULATION
  47. bool
  48. config HAVE_SCHED_CLOCK
  49. bool
  50. config GENERIC_GPIO
  51. bool
  52. config ARCH_USES_GETTIMEOFFSET
  53. bool
  54. default n
  55. config GENERIC_CLOCKEVENTS
  56. bool
  57. config GENERIC_CLOCKEVENTS_BROADCAST
  58. bool
  59. depends on GENERIC_CLOCKEVENTS
  60. default y if SMP
  61. config KTIME_SCALAR
  62. bool
  63. default y
  64. config HAVE_TCM
  65. bool
  66. select GENERIC_ALLOCATOR
  67. config HAVE_PROC_CPU
  68. bool
  69. config NO_IOPORT
  70. bool
  71. config EISA
  72. bool
  73. ---help---
  74. The Extended Industry Standard Architecture (EISA) bus was
  75. developed as an open alternative to the IBM MicroChannel bus.
  76. The EISA bus provided some of the features of the IBM MicroChannel
  77. bus while maintaining backward compatibility with cards made for
  78. the older ISA bus. The EISA bus saw limited use between 1988 and
  79. 1995 when it was made obsolete by the PCI bus.
  80. Say Y here if you are building a kernel for an EISA-based machine.
  81. Otherwise, say N.
  82. config SBUS
  83. bool
  84. config MCA
  85. bool
  86. help
  87. MicroChannel Architecture is found in some IBM PS/2 machines and
  88. laptops. It is a bus system similar to PCI or ISA. See
  89. <file:Documentation/mca.txt> (and especially the web page given
  90. there) before attempting to build an MCA bus kernel.
  91. config STACKTRACE_SUPPORT
  92. bool
  93. default y
  94. config HAVE_LATENCYTOP_SUPPORT
  95. bool
  96. depends on !SMP
  97. default y
  98. config LOCKDEP_SUPPORT
  99. bool
  100. default y
  101. config TRACE_IRQFLAGS_SUPPORT
  102. bool
  103. default y
  104. config HARDIRQS_SW_RESEND
  105. bool
  106. default y
  107. config GENERIC_IRQ_PROBE
  108. bool
  109. default y
  110. config GENERIC_LOCKBREAK
  111. bool
  112. default y
  113. depends on SMP && PREEMPT
  114. config RWSEM_GENERIC_SPINLOCK
  115. bool
  116. default y
  117. config RWSEM_XCHGADD_ALGORITHM
  118. bool
  119. config ARCH_HAS_ILOG2_U32
  120. bool
  121. config ARCH_HAS_ILOG2_U64
  122. bool
  123. config ARCH_HAS_CPUFREQ
  124. bool
  125. help
  126. Internal node to signify that the ARCH has CPUFREQ support
  127. and that the relevant menu configurations are displayed for
  128. it.
  129. config ARCH_HAS_CPU_IDLE_WAIT
  130. def_bool y
  131. config GENERIC_HWEIGHT
  132. bool
  133. default y
  134. config GENERIC_CALIBRATE_DELAY
  135. bool
  136. default y
  137. config ARCH_MAY_HAVE_PC_FDC
  138. bool
  139. config ZONE_DMA
  140. bool
  141. config NEED_DMA_MAP_STATE
  142. def_bool y
  143. config GENERIC_ISA_DMA
  144. bool
  145. config FIQ
  146. bool
  147. config ARCH_MTD_XIP
  148. bool
  149. config VECTORS_BASE
  150. hex
  151. default 0xffff0000 if MMU || CPU_HIGH_VECTOR
  152. default DRAM_BASE if REMAP_VECTORS_TO_RAM
  153. default 0x00000000
  154. help
  155. The base address of exception vectors.
  156. config ARM_PATCH_PHYS_VIRT
  157. bool "Patch physical to virtual translations at runtime" if EMBEDDED
  158. default y
  159. depends on !XIP_KERNEL && MMU
  160. depends on !ARCH_REALVIEW || !SPARSEMEM
  161. help
  162. Patch phys-to-virt and virt-to-phys translation functions at
  163. boot and module load time according to the position of the
  164. kernel in system memory.
  165. This can only be used with non-XIP MMU kernels where the base
  166. of physical memory is at a 16MB boundary.
  167. Only disable this option if you know that you do not require
  168. this feature (eg, building a kernel for a single machine) and
  169. you need to shrink the kernel to the minimal size.
  170. config NEED_MACH_MEMORY_H
  171. bool
  172. help
  173. Select this when mach/memory.h is required to provide special
  174. definitions for this platform. The need for mach/memory.h should
  175. be avoided when possible.
  176. config PHYS_OFFSET
  177. hex "Physical address of main memory"
  178. depends on !ARM_PATCH_PHYS_VIRT && !NEED_MACH_MEMORY_H
  179. help
  180. Please provide the physical address corresponding to the
  181. location of main memory in your system.
  182. config GENERIC_BUG
  183. def_bool y
  184. depends on BUG
  185. source "init/Kconfig"
  186. source "kernel/Kconfig.freezer"
  187. menu "System Type"
  188. config MMU
  189. bool "MMU-based Paged Memory Management Support"
  190. default y
  191. help
  192. Select if you want MMU-based virtualised addressing space
  193. support by paged memory management. If unsure, say 'Y'.
  194. #
  195. # The "ARM system type" choice list is ordered alphabetically by option
  196. # text. Please add new entries in the option alphabetic order.
  197. #
  198. choice
  199. prompt "ARM system type"
  200. default ARCH_VERSATILE
  201. config ARCH_INTEGRATOR
  202. bool "ARM Ltd. Integrator family"
  203. select ARM_AMBA
  204. select ARCH_HAS_CPUFREQ
  205. select CLKDEV_LOOKUP
  206. select HAVE_MACH_CLKDEV
  207. select ICST
  208. select GENERIC_CLOCKEVENTS
  209. select PLAT_VERSATILE
  210. select PLAT_VERSATILE_FPGA_IRQ
  211. select NEED_MACH_MEMORY_H
  212. help
  213. Support for ARM's Integrator platform.
  214. config ARCH_REALVIEW
  215. bool "ARM Ltd. RealView family"
  216. select ARM_AMBA
  217. select CLKDEV_LOOKUP
  218. select HAVE_MACH_CLKDEV
  219. select ICST
  220. select GENERIC_CLOCKEVENTS
  221. select ARCH_WANT_OPTIONAL_GPIOLIB
  222. select PLAT_VERSATILE
  223. select PLAT_VERSATILE_CLCD
  224. select ARM_TIMER_SP804
  225. select GPIO_PL061 if GPIOLIB
  226. select NEED_MACH_MEMORY_H
  227. help
  228. This enables support for ARM Ltd RealView boards.
  229. config ARCH_VERSATILE
  230. bool "ARM Ltd. Versatile family"
  231. select ARM_AMBA
  232. select ARM_VIC
  233. select CLKDEV_LOOKUP
  234. select HAVE_MACH_CLKDEV
  235. select ICST
  236. select GENERIC_CLOCKEVENTS
  237. select ARCH_WANT_OPTIONAL_GPIOLIB
  238. select PLAT_VERSATILE
  239. select PLAT_VERSATILE_CLCD
  240. select PLAT_VERSATILE_FPGA_IRQ
  241. select ARM_TIMER_SP804
  242. help
  243. This enables support for ARM Ltd Versatile board.
  244. config ARCH_VEXPRESS
  245. bool "ARM Ltd. Versatile Express family"
  246. select ARCH_WANT_OPTIONAL_GPIOLIB
  247. select ARM_AMBA
  248. select ARM_TIMER_SP804
  249. select CLKDEV_LOOKUP
  250. select HAVE_MACH_CLKDEV
  251. select GENERIC_CLOCKEVENTS
  252. select HAVE_CLK
  253. select HAVE_PATA_PLATFORM
  254. select ICST
  255. select PLAT_VERSATILE
  256. select PLAT_VERSATILE_CLCD
  257. help
  258. This enables support for the ARM Ltd Versatile Express boards.
  259. config ARCH_AT91
  260. bool "Atmel AT91"
  261. select ARCH_REQUIRE_GPIOLIB
  262. select HAVE_CLK
  263. select CLKDEV_LOOKUP
  264. help
  265. This enables support for systems based on the Atmel AT91RM9200,
  266. AT91SAM9 and AT91CAP9 processors.
  267. config ARCH_BCMRING
  268. bool "Broadcom BCMRING"
  269. depends on MMU
  270. select CPU_V6
  271. select ARM_AMBA
  272. select ARM_TIMER_SP804
  273. select CLKDEV_LOOKUP
  274. select GENERIC_CLOCKEVENTS
  275. select ARCH_WANT_OPTIONAL_GPIOLIB
  276. help
  277. Support for Broadcom's BCMRing platform.
  278. config ARCH_CLPS711X
  279. bool "Cirrus Logic CLPS711x/EP721x-based"
  280. select CPU_ARM720T
  281. select ARCH_USES_GETTIMEOFFSET
  282. select NEED_MACH_MEMORY_H
  283. help
  284. Support for Cirrus Logic 711x/721x based boards.
  285. config ARCH_CNS3XXX
  286. bool "Cavium Networks CNS3XXX family"
  287. select CPU_V6K
  288. select GENERIC_CLOCKEVENTS
  289. select ARM_GIC
  290. select MIGHT_HAVE_PCI
  291. select PCI_DOMAINS if PCI
  292. help
  293. Support for Cavium Networks CNS3XXX platform.
  294. config ARCH_GEMINI
  295. bool "Cortina Systems Gemini"
  296. select CPU_FA526
  297. select ARCH_REQUIRE_GPIOLIB
  298. select ARCH_USES_GETTIMEOFFSET
  299. help
  300. Support for the Cortina Systems Gemini family SoCs
  301. config ARCH_PRIMA2
  302. bool "CSR SiRFSoC PRIMA2 ARM Cortex A9 Platform"
  303. select CPU_V7
  304. select NO_IOPORT
  305. select GENERIC_CLOCKEVENTS
  306. select CLKDEV_LOOKUP
  307. select GENERIC_IRQ_CHIP
  308. select USE_OF
  309. select ZONE_DMA
  310. help
  311. Support for CSR SiRFSoC ARM Cortex A9 Platform
  312. config ARCH_EBSA110
  313. bool "EBSA-110"
  314. select CPU_SA110
  315. select ISA
  316. select NO_IOPORT
  317. select ARCH_USES_GETTIMEOFFSET
  318. select NEED_MACH_MEMORY_H
  319. help
  320. This is an evaluation board for the StrongARM processor available
  321. from Digital. It has limited hardware on-board, including an
  322. Ethernet interface, two PCMCIA sockets, two serial ports and a
  323. parallel port.
  324. config ARCH_EP93XX
  325. bool "EP93xx-based"
  326. select CPU_ARM920T
  327. select ARM_AMBA
  328. select ARM_VIC
  329. select CLKDEV_LOOKUP
  330. select ARCH_REQUIRE_GPIOLIB
  331. select ARCH_HAS_HOLES_MEMORYMODEL
  332. select ARCH_USES_GETTIMEOFFSET
  333. select NEED_MEMORY_H
  334. help
  335. This enables support for the Cirrus EP93xx series of CPUs.
  336. config ARCH_FOOTBRIDGE
  337. bool "FootBridge"
  338. select CPU_SA110
  339. select FOOTBRIDGE
  340. select GENERIC_CLOCKEVENTS
  341. select HAVE_IDE
  342. select NEED_MACH_MEMORY_H
  343. help
  344. Support for systems based on the DC21285 companion chip
  345. ("FootBridge"), such as the Simtec CATS and the Rebel NetWinder.
  346. config ARCH_MXC
  347. bool "Freescale MXC/iMX-based"
  348. select GENERIC_CLOCKEVENTS
  349. select ARCH_REQUIRE_GPIOLIB
  350. select CLKDEV_LOOKUP
  351. select CLKSRC_MMIO
  352. select GENERIC_IRQ_CHIP
  353. select HAVE_SCHED_CLOCK
  354. help
  355. Support for Freescale MXC/iMX-based family of processors
  356. config ARCH_MXS
  357. bool "Freescale MXS-based"
  358. select GENERIC_CLOCKEVENTS
  359. select ARCH_REQUIRE_GPIOLIB
  360. select CLKDEV_LOOKUP
  361. select CLKSRC_MMIO
  362. help
  363. Support for Freescale MXS-based family of processors
  364. config ARCH_NETX
  365. bool "Hilscher NetX based"
  366. select CLKSRC_MMIO
  367. select CPU_ARM926T
  368. select ARM_VIC
  369. select GENERIC_CLOCKEVENTS
  370. help
  371. This enables support for systems based on the Hilscher NetX Soc
  372. config ARCH_H720X
  373. bool "Hynix HMS720x-based"
  374. select CPU_ARM720T
  375. select ISA_DMA_API
  376. select ARCH_USES_GETTIMEOFFSET
  377. help
  378. This enables support for systems based on the Hynix HMS720x
  379. config ARCH_IOP13XX
  380. bool "IOP13xx-based"
  381. depends on MMU
  382. select CPU_XSC3
  383. select PLAT_IOP
  384. select PCI
  385. select ARCH_SUPPORTS_MSI
  386. select VMSPLIT_1G
  387. select NEED_MACH_MEMORY_H
  388. help
  389. Support for Intel's IOP13XX (XScale) family of processors.
  390. config ARCH_IOP32X
  391. bool "IOP32x-based"
  392. depends on MMU
  393. select CPU_XSCALE
  394. select PLAT_IOP
  395. select PCI
  396. select ARCH_REQUIRE_GPIOLIB
  397. help
  398. Support for Intel's 80219 and IOP32X (XScale) family of
  399. processors.
  400. config ARCH_IOP33X
  401. bool "IOP33x-based"
  402. depends on MMU
  403. select CPU_XSCALE
  404. select PLAT_IOP
  405. select PCI
  406. select ARCH_REQUIRE_GPIOLIB
  407. help
  408. Support for Intel's IOP33X (XScale) family of processors.
  409. config ARCH_IXP23XX
  410. bool "IXP23XX-based"
  411. depends on MMU
  412. select CPU_XSC3
  413. select PCI
  414. select ARCH_USES_GETTIMEOFFSET
  415. select NEED_MACH_MEMORY_H
  416. help
  417. Support for Intel's IXP23xx (XScale) family of processors.
  418. config ARCH_IXP2000
  419. bool "IXP2400/2800-based"
  420. depends on MMU
  421. select CPU_XSCALE
  422. select PCI
  423. select ARCH_USES_GETTIMEOFFSET
  424. select NEED_MACH_MEMORY_H
  425. help
  426. Support for Intel's IXP2400/2800 (XScale) family of processors.
  427. config ARCH_IXP4XX
  428. bool "IXP4xx-based"
  429. depends on MMU
  430. select CLKSRC_MMIO
  431. select CPU_XSCALE
  432. select GENERIC_GPIO
  433. select GENERIC_CLOCKEVENTS
  434. select HAVE_SCHED_CLOCK
  435. select MIGHT_HAVE_PCI
  436. select DMABOUNCE if PCI
  437. help
  438. Support for Intel's IXP4XX (XScale) family of processors.
  439. config ARCH_DOVE
  440. bool "Marvell Dove"
  441. select CPU_V7
  442. select PCI
  443. select ARCH_REQUIRE_GPIOLIB
  444. select GENERIC_CLOCKEVENTS
  445. select PLAT_ORION
  446. help
  447. Support for the Marvell Dove SoC 88AP510
  448. config ARCH_KIRKWOOD
  449. bool "Marvell Kirkwood"
  450. select CPU_FEROCEON
  451. select PCI
  452. select ARCH_REQUIRE_GPIOLIB
  453. select GENERIC_CLOCKEVENTS
  454. select PLAT_ORION
  455. help
  456. Support for the following Marvell Kirkwood series SoCs:
  457. 88F6180, 88F6192 and 88F6281.
  458. config ARCH_LPC32XX
  459. bool "NXP LPC32XX"
  460. select CLKSRC_MMIO
  461. select CPU_ARM926T
  462. select ARCH_REQUIRE_GPIOLIB
  463. select HAVE_IDE
  464. select ARM_AMBA
  465. select USB_ARCH_HAS_OHCI
  466. select CLKDEV_LOOKUP
  467. select GENERIC_CLOCKEVENTS
  468. help
  469. Support for the NXP LPC32XX family of processors
  470. config ARCH_MV78XX0
  471. bool "Marvell MV78xx0"
  472. select CPU_FEROCEON
  473. select PCI
  474. select ARCH_REQUIRE_GPIOLIB
  475. select GENERIC_CLOCKEVENTS
  476. select PLAT_ORION
  477. help
  478. Support for the following Marvell MV78xx0 series SoCs:
  479. MV781x0, MV782x0.
  480. config ARCH_ORION5X
  481. bool "Marvell Orion"
  482. depends on MMU
  483. select CPU_FEROCEON
  484. select PCI
  485. select ARCH_REQUIRE_GPIOLIB
  486. select GENERIC_CLOCKEVENTS
  487. select PLAT_ORION
  488. help
  489. Support for the following Marvell Orion 5x series SoCs:
  490. Orion-1 (5181), Orion-VoIP (5181L), Orion-NAS (5182),
  491. Orion-2 (5281), Orion-1-90 (6183).
  492. config ARCH_MMP
  493. bool "Marvell PXA168/910/MMP2"
  494. depends on MMU
  495. select ARCH_REQUIRE_GPIOLIB
  496. select CLKDEV_LOOKUP
  497. select GENERIC_CLOCKEVENTS
  498. select HAVE_SCHED_CLOCK
  499. select TICK_ONESHOT
  500. select PLAT_PXA
  501. select SPARSE_IRQ
  502. help
  503. Support for Marvell's PXA168/PXA910(MMP) and MMP2 processor line.
  504. config ARCH_KS8695
  505. bool "Micrel/Kendin KS8695"
  506. select CPU_ARM922T
  507. select ARCH_REQUIRE_GPIOLIB
  508. select ARCH_USES_GETTIMEOFFSET
  509. select NEED_MACH_MEMORY_H
  510. help
  511. Support for Micrel/Kendin KS8695 "Centaur" (ARM922T) based
  512. System-on-Chip devices.
  513. config ARCH_W90X900
  514. bool "Nuvoton W90X900 CPU"
  515. select CPU_ARM926T
  516. select ARCH_REQUIRE_GPIOLIB
  517. select CLKDEV_LOOKUP
  518. select CLKSRC_MMIO
  519. select GENERIC_CLOCKEVENTS
  520. help
  521. Support for Nuvoton (Winbond logic dept.) ARM9 processor,
  522. At present, the w90x900 has been renamed nuc900, regarding
  523. the ARM series product line, you can login the following
  524. link address to know more.
  525. <http://www.nuvoton.com/hq/enu/ProductAndSales/ProductLines/
  526. ConsumerElectronicsIC/ARMMicrocontroller/ARMMicrocontroller>
  527. config ARCH_NUC93X
  528. bool "Nuvoton NUC93X CPU"
  529. select CPU_ARM926T
  530. select CLKDEV_LOOKUP
  531. help
  532. Support for Nuvoton (Winbond logic dept.) NUC93X MCU,The NUC93X is a
  533. low-power and high performance MPEG-4/JPEG multimedia controller chip.
  534. config ARCH_TEGRA
  535. bool "NVIDIA Tegra"
  536. select CLKDEV_LOOKUP
  537. select CLKSRC_MMIO
  538. select GENERIC_CLOCKEVENTS
  539. select GENERIC_GPIO
  540. select HAVE_CLK
  541. select HAVE_SCHED_CLOCK
  542. select ARCH_HAS_CPUFREQ
  543. help
  544. This enables support for NVIDIA Tegra based systems (Tegra APX,
  545. Tegra 6xx and Tegra 2 series).
  546. config ARCH_PNX4008
  547. bool "Philips Nexperia PNX4008 Mobile"
  548. select CPU_ARM926T
  549. select CLKDEV_LOOKUP
  550. select ARCH_USES_GETTIMEOFFSET
  551. help
  552. This enables support for Philips PNX4008 mobile platform.
  553. config ARCH_PXA
  554. bool "PXA2xx/PXA3xx-based"
  555. depends on MMU
  556. select ARCH_MTD_XIP
  557. select ARCH_HAS_CPUFREQ
  558. select CLKDEV_LOOKUP
  559. select CLKSRC_MMIO
  560. select ARCH_REQUIRE_GPIOLIB
  561. select GENERIC_CLOCKEVENTS
  562. select HAVE_SCHED_CLOCK
  563. select TICK_ONESHOT
  564. select PLAT_PXA
  565. select SPARSE_IRQ
  566. select AUTO_ZRELADDR
  567. select MULTI_IRQ_HANDLER
  568. select ARM_CPU_SUSPEND if PM
  569. select HAVE_IDE
  570. help
  571. Support for Intel/Marvell's PXA2xx/PXA3xx processor line.
  572. config ARCH_MSM
  573. bool "Qualcomm MSM"
  574. select HAVE_CLK
  575. select GENERIC_CLOCKEVENTS
  576. select ARCH_REQUIRE_GPIOLIB
  577. select CLKDEV_LOOKUP
  578. help
  579. Support for Qualcomm MSM/QSD based systems. This runs on the
  580. apps processor of the MSM/QSD and depends on a shared memory
  581. interface to the modem processor which runs the baseband
  582. stack and controls some vital subsystems
  583. (clock and power control, etc).
  584. config ARCH_SHMOBILE
  585. bool "Renesas SH-Mobile / R-Mobile"
  586. select HAVE_CLK
  587. select CLKDEV_LOOKUP
  588. select HAVE_MACH_CLKDEV
  589. select GENERIC_CLOCKEVENTS
  590. select NO_IOPORT
  591. select SPARSE_IRQ
  592. select MULTI_IRQ_HANDLER
  593. select PM_GENERIC_DOMAINS if PM
  594. select NEED_MACH_MEMORY_H
  595. help
  596. Support for Renesas's SH-Mobile and R-Mobile ARM platforms.
  597. config ARCH_RPC
  598. bool "RiscPC"
  599. select ARCH_ACORN
  600. select FIQ
  601. select TIMER_ACORN
  602. select ARCH_MAY_HAVE_PC_FDC
  603. select HAVE_PATA_PLATFORM
  604. select ISA_DMA_API
  605. select NO_IOPORT
  606. select ARCH_SPARSEMEM_ENABLE
  607. select ARCH_USES_GETTIMEOFFSET
  608. select HAVE_IDE
  609. select NEED_MACH_MEMORY_H
  610. help
  611. On the Acorn Risc-PC, Linux can support the internal IDE disk and
  612. CD-ROM interface, serial and parallel port, and the floppy drive.
  613. config ARCH_SA1100
  614. bool "SA1100-based"
  615. select CLKSRC_MMIO
  616. select CPU_SA1100
  617. select ISA
  618. select ARCH_SPARSEMEM_ENABLE
  619. select ARCH_MTD_XIP
  620. select ARCH_HAS_CPUFREQ
  621. select CPU_FREQ
  622. select GENERIC_CLOCKEVENTS
  623. select HAVE_CLK
  624. select HAVE_SCHED_CLOCK
  625. select TICK_ONESHOT
  626. select ARCH_REQUIRE_GPIOLIB
  627. select HAVE_IDE
  628. select NEED_MACH_MEMORY_H
  629. help
  630. Support for StrongARM 11x0 based boards.
  631. config ARCH_S3C2410
  632. bool "Samsung S3C2410, S3C2412, S3C2413, S3C2416, S3C2440, S3C2442, S3C2443, S3C2450"
  633. select GENERIC_GPIO
  634. select ARCH_HAS_CPUFREQ
  635. select HAVE_CLK
  636. select CLKDEV_LOOKUP
  637. select ARCH_USES_GETTIMEOFFSET
  638. select HAVE_S3C2410_I2C if I2C
  639. help
  640. Samsung S3C2410X CPU based systems, such as the Simtec Electronics
  641. BAST (<http://www.simtec.co.uk/products/EB110ITX/>), the IPAQ 1940 or
  642. the Samsung SMDK2410 development board (and derivatives).
  643. Note, the S3C2416 and the S3C2450 are so close that they even share
  644. the same SoC ID code. This means that there is no separate machine
  645. directory (no arch/arm/mach-s3c2450) as the S3C2416 was first.
  646. config ARCH_S3C64XX
  647. bool "Samsung S3C64XX"
  648. select PLAT_SAMSUNG
  649. select CPU_V6
  650. select ARM_VIC
  651. select HAVE_CLK
  652. select CLKDEV_LOOKUP
  653. select NO_IOPORT
  654. select ARCH_USES_GETTIMEOFFSET
  655. select ARCH_HAS_CPUFREQ
  656. select ARCH_REQUIRE_GPIOLIB
  657. select SAMSUNG_CLKSRC
  658. select SAMSUNG_IRQ_VIC_TIMER
  659. select S3C_GPIO_TRACK
  660. select S3C_GPIO_PULL_UPDOWN
  661. select S3C_GPIO_CFG_S3C24XX
  662. select S3C_GPIO_CFG_S3C64XX
  663. select S3C_DEV_NAND
  664. select USB_ARCH_HAS_OHCI
  665. select SAMSUNG_GPIOLIB_4BIT
  666. select HAVE_S3C2410_I2C if I2C
  667. select HAVE_S3C2410_WATCHDOG if WATCHDOG
  668. help
  669. Samsung S3C64XX series based systems
  670. config ARCH_S5P64X0
  671. bool "Samsung S5P6440 S5P6450"
  672. select CPU_V6
  673. select GENERIC_GPIO
  674. select HAVE_CLK
  675. select CLKDEV_LOOKUP
  676. select CLKSRC_MMIO
  677. select HAVE_S3C2410_WATCHDOG if WATCHDOG
  678. select GENERIC_CLOCKEVENTS
  679. select HAVE_SCHED_CLOCK
  680. select HAVE_S3C2410_I2C if I2C
  681. select HAVE_S3C_RTC if RTC_CLASS
  682. help
  683. Samsung S5P64X0 CPU based systems, such as the Samsung SMDK6440,
  684. SMDK6450.
  685. config ARCH_S5PC100
  686. bool "Samsung S5PC100"
  687. select GENERIC_GPIO
  688. select HAVE_CLK
  689. select CLKDEV_LOOKUP
  690. select CPU_V7
  691. select ARM_L1_CACHE_SHIFT_6
  692. select ARCH_USES_GETTIMEOFFSET
  693. select HAVE_S3C2410_I2C if I2C
  694. select HAVE_S3C_RTC if RTC_CLASS
  695. select HAVE_S3C2410_WATCHDOG if WATCHDOG
  696. help
  697. Samsung S5PC100 series based systems
  698. config ARCH_S5PV210
  699. bool "Samsung S5PV210/S5PC110"
  700. select CPU_V7
  701. select ARCH_SPARSEMEM_ENABLE
  702. select ARCH_HAS_HOLES_MEMORYMODEL
  703. select GENERIC_GPIO
  704. select HAVE_CLK
  705. select CLKDEV_LOOKUP
  706. select CLKSRC_MMIO
  707. select ARM_L1_CACHE_SHIFT_6
  708. select ARCH_HAS_CPUFREQ
  709. select GENERIC_CLOCKEVENTS
  710. select HAVE_SCHED_CLOCK
  711. select HAVE_S3C2410_I2C if I2C
  712. select HAVE_S3C_RTC if RTC_CLASS
  713. select HAVE_S3C2410_WATCHDOG if WATCHDOG
  714. select NEED_MACH_MEMORY_H
  715. help
  716. Samsung S5PV210/S5PC110 series based systems
  717. config ARCH_EXYNOS4
  718. bool "Samsung EXYNOS4"
  719. select CPU_V7
  720. select ARCH_SPARSEMEM_ENABLE
  721. select ARCH_HAS_HOLES_MEMORYMODEL
  722. select GENERIC_GPIO
  723. select HAVE_CLK
  724. select CLKDEV_LOOKUP
  725. select ARCH_HAS_CPUFREQ
  726. select GENERIC_CLOCKEVENTS
  727. select HAVE_S3C_RTC if RTC_CLASS
  728. select HAVE_S3C2410_I2C if I2C
  729. select HAVE_S3C2410_WATCHDOG if WATCHDOG
  730. select NEED_MACH_MEMORY_H
  731. help
  732. Samsung EXYNOS4 series based systems
  733. config ARCH_SHARK
  734. bool "Shark"
  735. select CPU_SA110
  736. select ISA
  737. select ISA_DMA
  738. select ZONE_DMA
  739. select PCI
  740. select ARCH_USES_GETTIMEOFFSET
  741. select NEED_MACH_MEMORY_H
  742. help
  743. Support for the StrongARM based Digital DNARD machine, also known
  744. as "Shark" (<http://www.shark-linux.de/shark.html>).
  745. config ARCH_TCC_926
  746. bool "Telechips TCC ARM926-based systems"
  747. select CLKSRC_MMIO
  748. select CPU_ARM926T
  749. select HAVE_CLK
  750. select CLKDEV_LOOKUP
  751. select GENERIC_CLOCKEVENTS
  752. help
  753. Support for Telechips TCC ARM926-based systems.
  754. config ARCH_U300
  755. bool "ST-Ericsson U300 Series"
  756. depends on MMU
  757. select CLKSRC_MMIO
  758. select CPU_ARM926T
  759. select HAVE_SCHED_CLOCK
  760. select HAVE_TCM
  761. select ARM_AMBA
  762. select ARM_VIC
  763. select GENERIC_CLOCKEVENTS
  764. select CLKDEV_LOOKUP
  765. select HAVE_MACH_CLKDEV
  766. select GENERIC_GPIO
  767. select ARCH_REQUIRE_GPIOLIB
  768. select NEED_MACH_MEMORY_H
  769. help
  770. Support for ST-Ericsson U300 series mobile platforms.
  771. config ARCH_U8500
  772. bool "ST-Ericsson U8500 Series"
  773. select CPU_V7
  774. select ARM_AMBA
  775. select GENERIC_CLOCKEVENTS
  776. select CLKDEV_LOOKUP
  777. select ARCH_REQUIRE_GPIOLIB
  778. select ARCH_HAS_CPUFREQ
  779. help
  780. Support for ST-Ericsson's Ux500 architecture
  781. config ARCH_NOMADIK
  782. bool "STMicroelectronics Nomadik"
  783. select ARM_AMBA
  784. select ARM_VIC
  785. select CPU_ARM926T
  786. select CLKDEV_LOOKUP
  787. select GENERIC_CLOCKEVENTS
  788. select ARCH_REQUIRE_GPIOLIB
  789. help
  790. Support for the Nomadik platform by ST-Ericsson
  791. config ARCH_DAVINCI
  792. bool "TI DaVinci"
  793. select GENERIC_CLOCKEVENTS
  794. select ARCH_REQUIRE_GPIOLIB
  795. select ZONE_DMA
  796. select HAVE_IDE
  797. select CLKDEV_LOOKUP
  798. select GENERIC_ALLOCATOR
  799. select GENERIC_IRQ_CHIP
  800. select ARCH_HAS_HOLES_MEMORYMODEL
  801. help
  802. Support for TI's DaVinci platform.
  803. config ARCH_OMAP
  804. bool "TI OMAP"
  805. select HAVE_CLK
  806. select ARCH_REQUIRE_GPIOLIB
  807. select ARCH_HAS_CPUFREQ
  808. select CLKSRC_MMIO
  809. select GENERIC_CLOCKEVENTS
  810. select HAVE_SCHED_CLOCK
  811. select ARCH_HAS_HOLES_MEMORYMODEL
  812. help
  813. Support for TI's OMAP platform (OMAP1/2/3/4).
  814. config PLAT_SPEAR
  815. bool "ST SPEAr"
  816. select ARM_AMBA
  817. select ARCH_REQUIRE_GPIOLIB
  818. select CLKDEV_LOOKUP
  819. select CLKSRC_MMIO
  820. select GENERIC_CLOCKEVENTS
  821. select HAVE_CLK
  822. help
  823. Support for ST's SPEAr platform (SPEAr3xx, SPEAr6xx and SPEAr13xx).
  824. config ARCH_VT8500
  825. bool "VIA/WonderMedia 85xx"
  826. select CPU_ARM926T
  827. select GENERIC_GPIO
  828. select ARCH_HAS_CPUFREQ
  829. select GENERIC_CLOCKEVENTS
  830. select ARCH_REQUIRE_GPIOLIB
  831. select HAVE_PWM
  832. help
  833. Support for VIA/WonderMedia VT8500/WM85xx System-on-Chip.
  834. config ARCH_ZYNQ
  835. bool "Xilinx Zynq ARM Cortex A9 Platform"
  836. select CPU_V7
  837. select GENERIC_CLOCKEVENTS
  838. select CLKDEV_LOOKUP
  839. select ARM_GIC
  840. select ARM_AMBA
  841. select ICST
  842. select USE_OF
  843. help
  844. Support for Xilinx Zynq ARM Cortex A9 Platform
  845. endchoice
  846. #
  847. # This is sorted alphabetically by mach-* pathname. However, plat-*
  848. # Kconfigs may be included either alphabetically (according to the
  849. # plat- suffix) or along side the corresponding mach-* source.
  850. #
  851. source "arch/arm/mach-at91/Kconfig"
  852. source "arch/arm/mach-bcmring/Kconfig"
  853. source "arch/arm/mach-clps711x/Kconfig"
  854. source "arch/arm/mach-cns3xxx/Kconfig"
  855. source "arch/arm/mach-davinci/Kconfig"
  856. source "arch/arm/mach-dove/Kconfig"
  857. source "arch/arm/mach-ep93xx/Kconfig"
  858. source "arch/arm/mach-footbridge/Kconfig"
  859. source "arch/arm/mach-gemini/Kconfig"
  860. source "arch/arm/mach-h720x/Kconfig"
  861. source "arch/arm/mach-integrator/Kconfig"
  862. source "arch/arm/mach-iop32x/Kconfig"
  863. source "arch/arm/mach-iop33x/Kconfig"
  864. source "arch/arm/mach-iop13xx/Kconfig"
  865. source "arch/arm/mach-ixp4xx/Kconfig"
  866. source "arch/arm/mach-ixp2000/Kconfig"
  867. source "arch/arm/mach-ixp23xx/Kconfig"
  868. source "arch/arm/mach-kirkwood/Kconfig"
  869. source "arch/arm/mach-ks8695/Kconfig"
  870. source "arch/arm/mach-lpc32xx/Kconfig"
  871. source "arch/arm/mach-msm/Kconfig"
  872. source "arch/arm/mach-mv78xx0/Kconfig"
  873. source "arch/arm/plat-mxc/Kconfig"
  874. source "arch/arm/mach-mxs/Kconfig"
  875. source "arch/arm/mach-netx/Kconfig"
  876. source "arch/arm/mach-nomadik/Kconfig"
  877. source "arch/arm/plat-nomadik/Kconfig"
  878. source "arch/arm/mach-nuc93x/Kconfig"
  879. source "arch/arm/plat-omap/Kconfig"
  880. source "arch/arm/mach-omap1/Kconfig"
  881. source "arch/arm/mach-omap2/Kconfig"
  882. source "arch/arm/mach-orion5x/Kconfig"
  883. source "arch/arm/mach-pxa/Kconfig"
  884. source "arch/arm/plat-pxa/Kconfig"
  885. source "arch/arm/mach-mmp/Kconfig"
  886. source "arch/arm/mach-realview/Kconfig"
  887. source "arch/arm/mach-sa1100/Kconfig"
  888. source "arch/arm/plat-samsung/Kconfig"
  889. source "arch/arm/plat-s3c24xx/Kconfig"
  890. source "arch/arm/plat-s5p/Kconfig"
  891. source "arch/arm/plat-spear/Kconfig"
  892. source "arch/arm/plat-tcc/Kconfig"
  893. if ARCH_S3C2410
  894. source "arch/arm/mach-s3c2410/Kconfig"
  895. source "arch/arm/mach-s3c2412/Kconfig"
  896. source "arch/arm/mach-s3c2416/Kconfig"
  897. source "arch/arm/mach-s3c2440/Kconfig"
  898. source "arch/arm/mach-s3c2443/Kconfig"
  899. endif
  900. if ARCH_S3C64XX
  901. source "arch/arm/mach-s3c64xx/Kconfig"
  902. endif
  903. source "arch/arm/mach-s5p64x0/Kconfig"
  904. source "arch/arm/mach-s5pc100/Kconfig"
  905. source "arch/arm/mach-s5pv210/Kconfig"
  906. source "arch/arm/mach-exynos4/Kconfig"
  907. source "arch/arm/mach-shmobile/Kconfig"
  908. source "arch/arm/mach-tegra/Kconfig"
  909. source "arch/arm/mach-u300/Kconfig"
  910. source "arch/arm/mach-ux500/Kconfig"
  911. source "arch/arm/mach-versatile/Kconfig"
  912. source "arch/arm/mach-vexpress/Kconfig"
  913. source "arch/arm/plat-versatile/Kconfig"
  914. source "arch/arm/mach-vt8500/Kconfig"
  915. source "arch/arm/mach-w90x900/Kconfig"
  916. # Definitions to make life easier
  917. config ARCH_ACORN
  918. bool
  919. config PLAT_IOP
  920. bool
  921. select GENERIC_CLOCKEVENTS
  922. select HAVE_SCHED_CLOCK
  923. config PLAT_ORION
  924. bool
  925. select CLKSRC_MMIO
  926. select GENERIC_IRQ_CHIP
  927. select HAVE_SCHED_CLOCK
  928. config PLAT_PXA
  929. bool
  930. config PLAT_VERSATILE
  931. bool
  932. config ARM_TIMER_SP804
  933. bool
  934. select CLKSRC_MMIO
  935. source arch/arm/mm/Kconfig
  936. config IWMMXT
  937. bool "Enable iWMMXt support"
  938. depends on CPU_XSCALE || CPU_XSC3 || CPU_MOHAWK || CPU_PJ4
  939. default y if PXA27x || PXA3xx || PXA95x || ARCH_MMP
  940. help
  941. Enable support for iWMMXt context switching at run time if
  942. running on a CPU that supports it.
  943. # bool 'Use XScale PMU as timer source' CONFIG_XSCALE_PMU_TIMER
  944. config XSCALE_PMU
  945. bool
  946. depends on CPU_XSCALE && !XSCALE_PMU_TIMER
  947. default y
  948. config CPU_HAS_PMU
  949. depends on (CPU_V6 || CPU_V6K || CPU_V7 || XSCALE_PMU) && \
  950. (!ARCH_OMAP3 || OMAP3_EMU)
  951. default y
  952. bool
  953. config MULTI_IRQ_HANDLER
  954. bool
  955. help
  956. Allow each machine to specify it's own IRQ handler at run time.
  957. if !MMU
  958. source "arch/arm/Kconfig-nommu"
  959. endif
  960. config ARM_ERRATA_411920
  961. bool "ARM errata: Invalidation of the Instruction Cache operation can fail"
  962. depends on CPU_V6 || CPU_V6K
  963. help
  964. Invalidation of the Instruction Cache operation can
  965. fail. This erratum is present in 1136 (before r1p4), 1156 and 1176.
  966. It does not affect the MPCore. This option enables the ARM Ltd.
  967. recommended workaround.
  968. config ARM_ERRATA_430973
  969. bool "ARM errata: Stale prediction on replaced interworking branch"
  970. depends on CPU_V7
  971. help
  972. This option enables the workaround for the 430973 Cortex-A8
  973. (r1p0..r1p2) erratum. If a code sequence containing an ARM/Thumb
  974. interworking branch is replaced with another code sequence at the
  975. same virtual address, whether due to self-modifying code or virtual
  976. to physical address re-mapping, Cortex-A8 does not recover from the
  977. stale interworking branch prediction. This results in Cortex-A8
  978. executing the new code sequence in the incorrect ARM or Thumb state.
  979. The workaround enables the BTB/BTAC operations by setting ACTLR.IBE
  980. and also flushes the branch target cache at every context switch.
  981. Note that setting specific bits in the ACTLR register may not be
  982. available in non-secure mode.
  983. config ARM_ERRATA_458693
  984. bool "ARM errata: Processor deadlock when a false hazard is created"
  985. depends on CPU_V7
  986. help
  987. This option enables the workaround for the 458693 Cortex-A8 (r2p0)
  988. erratum. For very specific sequences of memory operations, it is
  989. possible for a hazard condition intended for a cache line to instead
  990. be incorrectly associated with a different cache line. This false
  991. hazard might then cause a processor deadlock. The workaround enables
  992. the L1 caching of the NEON accesses and disables the PLD instruction
  993. in the ACTLR register. Note that setting specific bits in the ACTLR
  994. register may not be available in non-secure mode.
  995. config ARM_ERRATA_460075
  996. bool "ARM errata: Data written to the L2 cache can be overwritten with stale data"
  997. depends on CPU_V7
  998. help
  999. This option enables the workaround for the 460075 Cortex-A8 (r2p0)
  1000. erratum. Any asynchronous access to the L2 cache may encounter a
  1001. situation in which recent store transactions to the L2 cache are lost
  1002. and overwritten with stale memory contents from external memory. The
  1003. workaround disables the write-allocate mode for the L2 cache via the
  1004. ACTLR register. Note that setting specific bits in the ACTLR register
  1005. may not be available in non-secure mode.
  1006. config ARM_ERRATA_742230
  1007. bool "ARM errata: DMB operation may be faulty"
  1008. depends on CPU_V7 && SMP
  1009. help
  1010. This option enables the workaround for the 742230 Cortex-A9
  1011. (r1p0..r2p2) erratum. Under rare circumstances, a DMB instruction
  1012. between two write operations may not ensure the correct visibility
  1013. ordering of the two writes. This workaround sets a specific bit in
  1014. the diagnostic register of the Cortex-A9 which causes the DMB
  1015. instruction to behave as a DSB, ensuring the correct behaviour of
  1016. the two writes.
  1017. config ARM_ERRATA_742231
  1018. bool "ARM errata: Incorrect hazard handling in the SCU may lead to data corruption"
  1019. depends on CPU_V7 && SMP
  1020. help
  1021. This option enables the workaround for the 742231 Cortex-A9
  1022. (r2p0..r2p2) erratum. Under certain conditions, specific to the
  1023. Cortex-A9 MPCore micro-architecture, two CPUs working in SMP mode,
  1024. accessing some data located in the same cache line, may get corrupted
  1025. data due to bad handling of the address hazard when the line gets
  1026. replaced from one of the CPUs at the same time as another CPU is
  1027. accessing it. This workaround sets specific bits in the diagnostic
  1028. register of the Cortex-A9 which reduces the linefill issuing
  1029. capabilities of the processor.
  1030. config PL310_ERRATA_588369
  1031. bool "Clean & Invalidate maintenance operations do not invalidate clean lines"
  1032. depends on CACHE_L2X0
  1033. help
  1034. The PL310 L2 cache controller implements three types of Clean &
  1035. Invalidate maintenance operations: by Physical Address
  1036. (offset 0x7F0), by Index/Way (0x7F8) and by Way (0x7FC).
  1037. They are architecturally defined to behave as the execution of a
  1038. clean operation followed immediately by an invalidate operation,
  1039. both performing to the same memory location. This functionality
  1040. is not correctly implemented in PL310 as clean lines are not
  1041. invalidated as a result of these operations.
  1042. config ARM_ERRATA_720789
  1043. bool "ARM errata: TLBIASIDIS and TLBIMVAIS operations can broadcast a faulty ASID"
  1044. depends on CPU_V7 && SMP
  1045. help
  1046. This option enables the workaround for the 720789 Cortex-A9 (prior to
  1047. r2p0) erratum. A faulty ASID can be sent to the other CPUs for the
  1048. broadcasted CP15 TLB maintenance operations TLBIASIDIS and TLBIMVAIS.
  1049. As a consequence of this erratum, some TLB entries which should be
  1050. invalidated are not, resulting in an incoherency in the system page
  1051. tables. The workaround changes the TLB flushing routines to invalidate
  1052. entries regardless of the ASID.
  1053. config PL310_ERRATA_727915
  1054. bool "Background Clean & Invalidate by Way operation can cause data corruption"
  1055. depends on CACHE_L2X0
  1056. help
  1057. PL310 implements the Clean & Invalidate by Way L2 cache maintenance
  1058. operation (offset 0x7FC). This operation runs in background so that
  1059. PL310 can handle normal accesses while it is in progress. Under very
  1060. rare circumstances, due to this erratum, write data can be lost when
  1061. PL310 treats a cacheable write transaction during a Clean &
  1062. Invalidate by Way operation.
  1063. config ARM_ERRATA_743622
  1064. bool "ARM errata: Faulty hazard checking in the Store Buffer may lead to data corruption"
  1065. depends on CPU_V7
  1066. help
  1067. This option enables the workaround for the 743622 Cortex-A9
  1068. (r2p0..r2p2) erratum. Under very rare conditions, a faulty
  1069. optimisation in the Cortex-A9 Store Buffer may lead to data
  1070. corruption. This workaround sets a specific bit in the diagnostic
  1071. register of the Cortex-A9 which disables the Store Buffer
  1072. optimisation, preventing the defect from occurring. This has no
  1073. visible impact on the overall performance or power consumption of the
  1074. processor.
  1075. config ARM_ERRATA_751472
  1076. bool "ARM errata: Interrupted ICIALLUIS may prevent completion of broadcasted operation"
  1077. depends on CPU_V7 && SMP
  1078. help
  1079. This option enables the workaround for the 751472 Cortex-A9 (prior
  1080. to r3p0) erratum. An interrupted ICIALLUIS operation may prevent the
  1081. completion of a following broadcasted operation if the second
  1082. operation is received by a CPU before the ICIALLUIS has completed,
  1083. potentially leading to corrupted entries in the cache or TLB.
  1084. config ARM_ERRATA_753970
  1085. bool "ARM errata: cache sync operation may be faulty"
  1086. depends on CACHE_PL310
  1087. help
  1088. This option enables the workaround for the 753970 PL310 (r3p0) erratum.
  1089. Under some condition the effect of cache sync operation on
  1090. the store buffer still remains when the operation completes.
  1091. This means that the store buffer is always asked to drain and
  1092. this prevents it from merging any further writes. The workaround
  1093. is to replace the normal offset of cache sync operation (0x730)
  1094. by another offset targeting an unmapped PL310 register 0x740.
  1095. This has the same effect as the cache sync operation: store buffer
  1096. drain and waiting for all buffers empty.
  1097. config ARM_ERRATA_754322
  1098. bool "ARM errata: possible faulty MMU translations following an ASID switch"
  1099. depends on CPU_V7
  1100. help
  1101. This option enables the workaround for the 754322 Cortex-A9 (r2p*,
  1102. r3p*) erratum. A speculative memory access may cause a page table walk
  1103. which starts prior to an ASID switch but completes afterwards. This
  1104. can populate the micro-TLB with a stale entry which may be hit with
  1105. the new ASID. This workaround places two dsb instructions in the mm
  1106. switching code so that no page table walks can cross the ASID switch.
  1107. config ARM_ERRATA_754327
  1108. bool "ARM errata: no automatic Store Buffer drain"
  1109. depends on CPU_V7 && SMP
  1110. help
  1111. This option enables the workaround for the 754327 Cortex-A9 (prior to
  1112. r2p0) erratum. The Store Buffer does not have any automatic draining
  1113. mechanism and therefore a livelock may occur if an external agent
  1114. continuously polls a memory location waiting to observe an update.
  1115. This workaround defines cpu_relax() as smp_mb(), preventing correctly
  1116. written polling loops from denying visibility of updates to memory.
  1117. config ARM_ERRATA_364296
  1118. bool "ARM errata: Possible cache data corruption with hit-under-miss enabled"
  1119. depends on CPU_V6 && !SMP
  1120. help
  1121. This options enables the workaround for the 364296 ARM1136
  1122. r0p2 erratum (possible cache data corruption with
  1123. hit-under-miss enabled). It sets the undocumented bit 31 in
  1124. the auxiliary control register and the FI bit in the control
  1125. register, thus disabling hit-under-miss without putting the
  1126. processor into full low interrupt latency mode. ARM11MPCore
  1127. is not affected.
  1128. config ARM_ERRATA_764369
  1129. bool "ARM errata: Data cache line maintenance operation by MVA may not succeed"
  1130. depends on CPU_V7 && SMP
  1131. help
  1132. This option enables the workaround for erratum 764369
  1133. affecting Cortex-A9 MPCore with two or more processors (all
  1134. current revisions). Under certain timing circumstances, a data
  1135. cache line maintenance operation by MVA targeting an Inner
  1136. Shareable memory region may fail to proceed up to either the
  1137. Point of Coherency or to the Point of Unification of the
  1138. system. This workaround adds a DSB instruction before the
  1139. relevant cache maintenance functions and sets a specific bit
  1140. in the diagnostic control register of the SCU.
  1141. endmenu
  1142. source "arch/arm/common/Kconfig"
  1143. menu "Bus support"
  1144. config ARM_AMBA
  1145. bool
  1146. config ISA
  1147. bool
  1148. help
  1149. Find out whether you have ISA slots on your motherboard. ISA is the
  1150. name of a bus system, i.e. the way the CPU talks to the other stuff
  1151. inside your box. Other bus systems are PCI, EISA, MicroChannel
  1152. (MCA) or VESA. ISA is an older system, now being displaced by PCI;
  1153. newer boards don't support it. If you have ISA, say Y, otherwise N.
  1154. # Select ISA DMA controller support
  1155. config ISA_DMA
  1156. bool
  1157. select ISA_DMA_API
  1158. # Select ISA DMA interface
  1159. config ISA_DMA_API
  1160. bool
  1161. config PCI
  1162. bool "PCI support" if MIGHT_HAVE_PCI
  1163. help
  1164. Find out whether you have a PCI motherboard. PCI is the name of a
  1165. bus system, i.e. the way the CPU talks to the other stuff inside
  1166. your box. Other bus systems are ISA, EISA, MicroChannel (MCA) or
  1167. VESA. If you have PCI, say Y, otherwise N.
  1168. config PCI_DOMAINS
  1169. bool
  1170. depends on PCI
  1171. config PCI_NANOENGINE
  1172. bool "BSE nanoEngine PCI support"
  1173. depends on SA1100_NANOENGINE
  1174. help
  1175. Enable PCI on the BSE nanoEngine board.
  1176. config PCI_SYSCALL
  1177. def_bool PCI
  1178. # Select the host bridge type
  1179. config PCI_HOST_VIA82C505
  1180. bool
  1181. depends on PCI && ARCH_SHARK
  1182. default y
  1183. config PCI_HOST_ITE8152
  1184. bool
  1185. depends on PCI && MACH_ARMCORE
  1186. default y
  1187. select DMABOUNCE
  1188. source "drivers/pci/Kconfig"
  1189. source "drivers/pcmcia/Kconfig"
  1190. endmenu
  1191. menu "Kernel Features"
  1192. source "kernel/time/Kconfig"
  1193. config SMP
  1194. bool "Symmetric Multi-Processing"
  1195. depends on CPU_V6K || CPU_V7
  1196. depends on GENERIC_CLOCKEVENTS
  1197. depends on REALVIEW_EB_ARM11MP || REALVIEW_EB_A9MP || \
  1198. MACH_REALVIEW_PB11MP || MACH_REALVIEW_PBX || ARCH_OMAP4 || \
  1199. ARCH_EXYNOS4 || ARCH_TEGRA || ARCH_U8500 || ARCH_VEXPRESS_CA9X4 || \
  1200. ARCH_MSM_SCORPIONMP || ARCH_SHMOBILE
  1201. depends on MMU
  1202. select USE_GENERIC_SMP_HELPERS
  1203. select HAVE_ARM_SCU if !ARCH_MSM_SCORPIONMP
  1204. help
  1205. This enables support for systems with more than one CPU. If you have
  1206. a system with only one CPU, like most personal computers, say N. If
  1207. you have a system with more than one CPU, say Y.
  1208. If you say N here, the kernel will run on single and multiprocessor
  1209. machines, but will use only one CPU of a multiprocessor machine. If
  1210. you say Y here, the kernel will run on many, but not all, single
  1211. processor machines. On a single processor machine, the kernel will
  1212. run faster if you say N here.
  1213. See also <file:Documentation/x86/i386/IO-APIC.txt>,
  1214. <file:Documentation/nmi_watchdog.txt> and the SMP-HOWTO available at
  1215. <http://tldp.org/HOWTO/SMP-HOWTO.html>.
  1216. If you don't know what to do here, say N.
  1217. config SMP_ON_UP
  1218. bool "Allow booting SMP kernel on uniprocessor systems (EXPERIMENTAL)"
  1219. depends on EXPERIMENTAL
  1220. depends on SMP && !XIP_KERNEL
  1221. default y
  1222. help
  1223. SMP kernels contain instructions which fail on non-SMP processors.
  1224. Enabling this option allows the kernel to modify itself to make
  1225. these instructions safe. Disabling it allows about 1K of space
  1226. savings.
  1227. If you don't know what to do here, say Y.
  1228. config ARM_CPU_TOPOLOGY
  1229. bool "Support cpu topology definition"
  1230. depends on SMP && CPU_V7
  1231. default y
  1232. help
  1233. Support ARM cpu topology definition. The MPIDR register defines
  1234. affinity between processors which is then used to describe the cpu
  1235. topology of an ARM System.
  1236. config SCHED_MC
  1237. bool "Multi-core scheduler support"
  1238. depends on ARM_CPU_TOPOLOGY
  1239. help
  1240. Multi-core scheduler support improves the CPU scheduler's decision
  1241. making when dealing with multi-core CPU chips at a cost of slightly
  1242. increased overhead in some places. If unsure say N here.
  1243. config SCHED_SMT
  1244. bool "SMT scheduler support"
  1245. depends on ARM_CPU_TOPOLOGY
  1246. help
  1247. Improves the CPU scheduler's decision making when dealing with
  1248. MultiThreading at a cost of slightly increased overhead in some
  1249. places. If unsure say N here.
  1250. config HAVE_ARM_SCU
  1251. bool
  1252. help
  1253. This option enables support for the ARM system coherency unit
  1254. config HAVE_ARM_TWD
  1255. bool
  1256. depends on SMP
  1257. select TICK_ONESHOT
  1258. help
  1259. This options enables support for the ARM timer and watchdog unit
  1260. choice
  1261. prompt "Memory split"
  1262. default VMSPLIT_3G
  1263. help
  1264. Select the desired split between kernel and user memory.
  1265. If you are not absolutely sure what you are doing, leave this
  1266. option alone!
  1267. config VMSPLIT_3G
  1268. bool "3G/1G user/kernel split"
  1269. config VMSPLIT_2G
  1270. bool "2G/2G user/kernel split"
  1271. config VMSPLIT_1G
  1272. bool "1G/3G user/kernel split"
  1273. endchoice
  1274. config PAGE_OFFSET
  1275. hex
  1276. default 0x40000000 if VMSPLIT_1G
  1277. default 0x80000000 if VMSPLIT_2G
  1278. default 0xC0000000
  1279. config NR_CPUS
  1280. int "Maximum number of CPUs (2-32)"
  1281. range 2 32
  1282. depends on SMP
  1283. default "4"
  1284. config HOTPLUG_CPU
  1285. bool "Support for hot-pluggable CPUs (EXPERIMENTAL)"
  1286. depends on SMP && HOTPLUG && EXPERIMENTAL
  1287. help
  1288. Say Y here to experiment with turning CPUs off and on. CPUs
  1289. can be controlled through /sys/devices/system/cpu.
  1290. config LOCAL_TIMERS
  1291. bool "Use local timer interrupts"
  1292. depends on SMP
  1293. default y
  1294. select HAVE_ARM_TWD if (!ARCH_MSM_SCORPIONMP && !EXYNOS4_MCT)
  1295. help
  1296. Enable support for local timers on SMP platforms, rather then the
  1297. legacy IPI broadcast method. Local timers allows the system
  1298. accounting to be spread across the timer interval, preventing a
  1299. "thundering herd" at every timer tick.
  1300. source kernel/Kconfig.preempt
  1301. config HZ
  1302. int
  1303. default 200 if ARCH_EBSA110 || ARCH_S3C2410 || ARCH_S5P64X0 || \
  1304. ARCH_S5PV210 || ARCH_EXYNOS4
  1305. default OMAP_32K_TIMER_HZ if ARCH_OMAP && OMAP_32K_TIMER
  1306. default AT91_TIMER_HZ if ARCH_AT91
  1307. default SHMOBILE_TIMER_HZ if ARCH_SHMOBILE
  1308. default 100
  1309. config THUMB2_KERNEL
  1310. bool "Compile the kernel in Thumb-2 mode (EXPERIMENTAL)"
  1311. depends on CPU_V7 && !CPU_V6 && !CPU_V6K && EXPERIMENTAL
  1312. select AEABI
  1313. select ARM_ASM_UNIFIED
  1314. select ARM_UNWIND
  1315. help
  1316. By enabling this option, the kernel will be compiled in
  1317. Thumb-2 mode. A compiler/assembler that understand the unified
  1318. ARM-Thumb syntax is needed.
  1319. If unsure, say N.
  1320. config THUMB2_AVOID_R_ARM_THM_JUMP11
  1321. bool "Work around buggy Thumb-2 short branch relocations in gas"
  1322. depends on THUMB2_KERNEL && MODULES
  1323. default y
  1324. help
  1325. Various binutils versions can resolve Thumb-2 branches to
  1326. locally-defined, preemptible global symbols as short-range "b.n"
  1327. branch instructions.
  1328. This is a problem, because there's no guarantee the final
  1329. destination of the symbol, or any candidate locations for a
  1330. trampoline, are within range of the branch. For this reason, the
  1331. kernel does not support fixing up the R_ARM_THM_JUMP11 (102)
  1332. relocation in modules at all, and it makes little sense to add
  1333. support.
  1334. The symptom is that the kernel fails with an "unsupported
  1335. relocation" error when loading some modules.
  1336. Until fixed tools are available, passing
  1337. -fno-optimize-sibling-calls to gcc should prevent gcc generating
  1338. code which hits this problem, at the cost of a bit of extra runtime
  1339. stack usage in some cases.
  1340. The problem is described in more detail at:
  1341. https://bugs.launchpad.net/binutils-linaro/+bug/725126
  1342. Only Thumb-2 kernels are affected.
  1343. Unless you are sure your tools don't have this problem, say Y.
  1344. config ARM_ASM_UNIFIED
  1345. bool
  1346. config AEABI
  1347. bool "Use the ARM EABI to compile the kernel"
  1348. help
  1349. This option allows for the kernel to be compiled using the latest
  1350. ARM ABI (aka EABI). This is only useful if you are using a user
  1351. space environment that is also compiled with EABI.
  1352. Since there are major incompatibilities between the legacy ABI and
  1353. EABI, especially with regard to structure member alignment, this
  1354. option also changes the kernel syscall calling convention to
  1355. disambiguate both ABIs and allow for backward compatibility support
  1356. (selected with CONFIG_OABI_COMPAT).
  1357. To use this you need GCC version 4.0.0 or later.
  1358. config OABI_COMPAT
  1359. bool "Allow old ABI binaries to run with this kernel (EXPERIMENTAL)"
  1360. depends on AEABI && EXPERIMENTAL && !THUMB2_KERNEL
  1361. default y
  1362. help
  1363. This option preserves the old syscall interface along with the
  1364. new (ARM EABI) one. It also provides a compatibility layer to
  1365. intercept syscalls that have structure arguments which layout
  1366. in memory differs between the legacy ABI and the new ARM EABI
  1367. (only for non "thumb" binaries). This option adds a tiny
  1368. overhead to all syscalls and produces a slightly larger kernel.
  1369. If you know you'll be using only pure EABI user space then you
  1370. can say N here. If this option is not selected and you attempt
  1371. to execute a legacy ABI binary then the result will be
  1372. UNPREDICTABLE (in fact it can be predicted that it won't work
  1373. at all). If in doubt say Y.
  1374. config ARCH_HAS_HOLES_MEMORYMODEL
  1375. bool
  1376. config ARCH_SPARSEMEM_ENABLE
  1377. bool
  1378. config ARCH_SPARSEMEM_DEFAULT
  1379. def_bool ARCH_SPARSEMEM_ENABLE
  1380. config ARCH_SELECT_MEMORY_MODEL
  1381. def_bool ARCH_SPARSEMEM_ENABLE
  1382. config HAVE_ARCH_PFN_VALID
  1383. def_bool ARCH_HAS_HOLES_MEMORYMODEL || !SPARSEMEM
  1384. config HIGHMEM
  1385. bool "High Memory Support"
  1386. depends on MMU
  1387. help
  1388. The address space of ARM processors is only 4 Gigabytes large
  1389. and it has to accommodate user address space, kernel address
  1390. space as well as some memory mapped IO. That means that, if you
  1391. have a large amount of physical memory and/or IO, not all of the
  1392. memory can be "permanently mapped" by the kernel. The physical
  1393. memory that is not permanently mapped is called "high memory".
  1394. Depending on the selected kernel/user memory split, minimum
  1395. vmalloc space and actual amount of RAM, you may not need this
  1396. option which should result in a slightly faster kernel.
  1397. If unsure, say n.
  1398. config HIGHPTE
  1399. bool "Allocate 2nd-level pagetables from highmem"
  1400. depends on HIGHMEM
  1401. config HW_PERF_EVENTS
  1402. bool "Enable hardware performance counter support for perf events"
  1403. depends on PERF_EVENTS && CPU_HAS_PMU
  1404. default y
  1405. help
  1406. Enable hardware performance counter support for perf events. If
  1407. disabled, perf events will use software events only.
  1408. source "mm/Kconfig"
  1409. config FORCE_MAX_ZONEORDER
  1410. int "Maximum zone order" if ARCH_SHMOBILE
  1411. range 11 64 if ARCH_SHMOBILE
  1412. default "9" if SA1111
  1413. default "11"
  1414. help
  1415. The kernel memory allocator divides physically contiguous memory
  1416. blocks into "zones", where each zone is a power of two number of
  1417. pages. This option selects the largest power of two that the kernel
  1418. keeps in the memory allocator. If you need to allocate very large
  1419. blocks of physically contiguous memory, then you may need to
  1420. increase this value.
  1421. This config option is actually maximum order plus one. For example,
  1422. a value of 11 means that the largest free memory block is 2^10 pages.
  1423. config LEDS
  1424. bool "Timer and CPU usage LEDs"
  1425. depends on ARCH_CDB89712 || ARCH_EBSA110 || \
  1426. ARCH_EBSA285 || ARCH_INTEGRATOR || \
  1427. ARCH_LUBBOCK || MACH_MAINSTONE || ARCH_NETWINDER || \
  1428. ARCH_OMAP || ARCH_P720T || ARCH_PXA_IDP || \
  1429. ARCH_SA1100 || ARCH_SHARK || ARCH_VERSATILE || \
  1430. ARCH_AT91 || ARCH_DAVINCI || \
  1431. ARCH_KS8695 || MACH_RD88F5182 || ARCH_REALVIEW
  1432. help
  1433. If you say Y here, the LEDs on your machine will be used
  1434. to provide useful information about your current system status.
  1435. If you are compiling a kernel for a NetWinder or EBSA-285, you will
  1436. be able to select which LEDs are active using the options below. If
  1437. you are compiling a kernel for the EBSA-110 or the LART however, the
  1438. red LED will simply flash regularly to indicate that the system is
  1439. still functional. It is safe to say Y here if you have a CATS
  1440. system, but the driver will do nothing.
  1441. config LEDS_TIMER
  1442. bool "Timer LED" if (!ARCH_CDB89712 && !ARCH_OMAP) || \
  1443. OMAP_OSK_MISTRAL || MACH_OMAP_H2 \
  1444. || MACH_OMAP_PERSEUS2
  1445. depends on LEDS
  1446. depends on !GENERIC_CLOCKEVENTS
  1447. default y if ARCH_EBSA110
  1448. help
  1449. If you say Y here, one of the system LEDs (the green one on the
  1450. NetWinder, the amber one on the EBSA285, or the red one on the LART)
  1451. will flash regularly to indicate that the system is still
  1452. operational. This is mainly useful to kernel hackers who are
  1453. debugging unstable kernels.
  1454. The LART uses the same LED for both Timer LED and CPU usage LED
  1455. functions. You may choose to use both, but the Timer LED function
  1456. will overrule the CPU usage LED.
  1457. config LEDS_CPU
  1458. bool "CPU usage LED" if (!ARCH_CDB89712 && !ARCH_EBSA110 && \
  1459. !ARCH_OMAP) \
  1460. || OMAP_OSK_MISTRAL || MACH_OMAP_H2 \
  1461. || MACH_OMAP_PERSEUS2
  1462. depends on LEDS
  1463. help
  1464. If you say Y here, the red LED will be used to give a good real
  1465. time indication of CPU usage, by lighting whenever the idle task
  1466. is not currently executing.
  1467. The LART uses the same LED for both Timer LED and CPU usage LED
  1468. functions. You may choose to use both, but the Timer LED function
  1469. will overrule the CPU usage LED.
  1470. config ALIGNMENT_TRAP
  1471. bool
  1472. depends on CPU_CP15_MMU
  1473. default y if !ARCH_EBSA110
  1474. select HAVE_PROC_CPU if PROC_FS
  1475. help
  1476. ARM processors cannot fetch/store information which is not
  1477. naturally aligned on the bus, i.e., a 4 byte fetch must start at an
  1478. address divisible by 4. On 32-bit ARM processors, these non-aligned
  1479. fetch/store instructions will be emulated in software if you say
  1480. here, which has a severe performance impact. This is necessary for
  1481. correct operation of some network protocols. With an IP-only
  1482. configuration it is safe to say N, otherwise say Y.
  1483. config UACCESS_WITH_MEMCPY
  1484. bool "Use kernel mem{cpy,set}() for {copy_to,clear}_user() (EXPERIMENTAL)"
  1485. depends on MMU && EXPERIMENTAL
  1486. default y if CPU_FEROCEON
  1487. help
  1488. Implement faster copy_to_user and clear_user methods for CPU
  1489. cores where a 8-word STM instruction give significantly higher
  1490. memory write throughput than a sequence of individual 32bit stores.
  1491. A possible side effect is a slight increase in scheduling latency
  1492. between threads sharing the same address space if they invoke
  1493. such copy operations with large buffers.
  1494. However, if the CPU data cache is using a write-allocate mode,
  1495. this option is unlikely to provide any performance gain.
  1496. config SECCOMP
  1497. bool
  1498. prompt "Enable seccomp to safely compute untrusted bytecode"
  1499. ---help---
  1500. This kernel feature is useful for number crunching applications
  1501. that may need to compute untrusted bytecode during their
  1502. execution. By using pipes or other transports made available to
  1503. the process as file descriptors supporting the read/write
  1504. syscalls, it's possible to isolate those applications in
  1505. their own address space using seccomp. Once seccomp is
  1506. enabled via prctl(PR_SET_SECCOMP), it cannot be disabled
  1507. and the task is only allowed to execute a few safe syscalls
  1508. defined by each seccomp mode.
  1509. config CC_STACKPROTECTOR
  1510. bool "Enable -fstack-protector buffer overflow detection (EXPERIMENTAL)"
  1511. depends on EXPERIMENTAL
  1512. help
  1513. This option turns on the -fstack-protector GCC feature. This
  1514. feature puts, at the beginning of functions, a canary value on
  1515. the stack just before the return address, and validates
  1516. the value just before actually returning. Stack based buffer
  1517. overflows (that need to overwrite this return address) now also
  1518. overwrite the canary, which gets detected and the attack is then
  1519. neutralized via a kernel panic.
  1520. This feature requires gcc version 4.2 or above.
  1521. config DEPRECATED_PARAM_STRUCT
  1522. bool "Provide old way to pass kernel parameters"
  1523. help
  1524. This was deprecated in 2001 and announced to live on for 5 years.
  1525. Some old boot loaders still use this way.
  1526. endmenu
  1527. menu "Boot options"
  1528. config USE_OF
  1529. bool "Flattened Device Tree support"
  1530. select OF
  1531. select OF_EARLY_FLATTREE
  1532. select IRQ_DOMAIN
  1533. help
  1534. Include support for flattened device tree machine descriptions.
  1535. # Compressed boot loader in ROM. Yes, we really want to ask about
  1536. # TEXT and BSS so we preserve their values in the config files.
  1537. config ZBOOT_ROM_TEXT
  1538. hex "Compressed ROM boot loader base address"
  1539. default "0"
  1540. help
  1541. The physical address at which the ROM-able zImage is to be
  1542. placed in the target. Platforms which normally make use of
  1543. ROM-able zImage formats normally set this to a suitable
  1544. value in their defconfig file.
  1545. If ZBOOT_ROM is not enabled, this has no effect.
  1546. config ZBOOT_ROM_BSS
  1547. hex "Compressed ROM boot loader BSS address"
  1548. default "0"
  1549. help
  1550. The base address of an area of read/write memory in the target
  1551. for the ROM-able zImage which must be available while the
  1552. decompressor is running. It must be large enough to hold the
  1553. entire decompressed kernel plus an additional 128 KiB.
  1554. Platforms which normally make use of ROM-able zImage formats
  1555. normally set this to a suitable value in their defconfig file.
  1556. If ZBOOT_ROM is not enabled, this has no effect.
  1557. config ZBOOT_ROM
  1558. bool "Compressed boot loader in ROM/flash"
  1559. depends on ZBOOT_ROM_TEXT != ZBOOT_ROM_BSS
  1560. help
  1561. Say Y here if you intend to execute your compressed kernel image
  1562. (zImage) directly from ROM or flash. If unsure, say N.
  1563. choice
  1564. prompt "Include SD/MMC loader in zImage (EXPERIMENTAL)"
  1565. depends on ZBOOT_ROM && ARCH_SH7372 && EXPERIMENTAL
  1566. default ZBOOT_ROM_NONE
  1567. help
  1568. Include experimental SD/MMC loading code in the ROM-able zImage.
  1569. With this enabled it is possible to write the the ROM-able zImage
  1570. kernel image to an MMC or SD card and boot the kernel straight
  1571. from the reset vector. At reset the processor Mask ROM will load
  1572. the first part of the the ROM-able zImage which in turn loads the
  1573. rest the kernel image to RAM.
  1574. config ZBOOT_ROM_NONE
  1575. bool "No SD/MMC loader in zImage (EXPERIMENTAL)"
  1576. help
  1577. Do not load image from SD or MMC
  1578. config ZBOOT_ROM_MMCIF
  1579. bool "Include MMCIF loader in zImage (EXPERIMENTAL)"
  1580. help
  1581. Load image from MMCIF hardware block.
  1582. config ZBOOT_ROM_SH_MOBILE_SDHI
  1583. bool "Include SuperH Mobile SDHI loader in zImage (EXPERIMENTAL)"
  1584. help
  1585. Load image from SDHI hardware block
  1586. endchoice
  1587. config ARM_APPENDED_DTB
  1588. bool "Use appended device tree blob to zImage (EXPERIMENTAL)"
  1589. depends on OF && !ZBOOT_ROM && EXPERIMENTAL
  1590. help
  1591. With this option, the boot code will look for a device tree binary
  1592. (DTB) appended to zImage
  1593. (e.g. cat zImage <filename>.dtb > zImage_w_dtb).
  1594. This is meant as a backward compatibility convenience for those
  1595. systems with a bootloader that can't be upgraded to accommodate
  1596. the documented boot protocol using a device tree.
  1597. Beware that there is very little in terms of protection against
  1598. this option being confused by leftover garbage in memory that might
  1599. look like a DTB header after a reboot if no actual DTB is appended
  1600. to zImage. Do not leave this option active in a production kernel
  1601. if you don't intend to always append a DTB. Proper passing of the
  1602. location into r2 of a bootloader provided DTB is always preferable
  1603. to this option.
  1604. config ARM_ATAG_DTB_COMPAT
  1605. bool "Supplement the appended DTB with traditional ATAG information"
  1606. depends on ARM_APPENDED_DTB
  1607. help
  1608. Some old bootloaders can't be updated to a DTB capable one, yet
  1609. they provide ATAGs with memory configuration, the ramdisk address,
  1610. the kernel cmdline string, etc. Such information is dynamically
  1611. provided by the bootloader and can't always be stored in a static
  1612. DTB. To allow a device tree enabled kernel to be used with such
  1613. bootloaders, this option allows zImage to extract the information
  1614. from the ATAG list and store it at run time into the appended DTB.
  1615. config CMDLINE
  1616. string "Default kernel command string"
  1617. default ""
  1618. help
  1619. On some architectures (EBSA110 and CATS), there is currently no way
  1620. for the boot loader to pass arguments to the kernel. For these
  1621. architectures, you should supply some command-line options at build
  1622. time by entering them here. As a minimum, you should specify the
  1623. memory size and the root device (e.g., mem=64M root=/dev/nfs).
  1624. choice
  1625. prompt "Kernel command line type" if CMDLINE != ""
  1626. default CMDLINE_FROM_BOOTLOADER
  1627. config CMDLINE_FROM_BOOTLOADER
  1628. bool "Use bootloader kernel arguments if available"
  1629. help
  1630. Uses the command-line options passed by the boot loader. If
  1631. the boot loader doesn't provide any, the default kernel command
  1632. string provided in CMDLINE will be used.
  1633. config CMDLINE_EXTEND
  1634. bool "Extend bootloader kernel arguments"
  1635. help
  1636. The command-line arguments provided by the boot loader will be
  1637. appended to the default kernel command string.
  1638. config CMDLINE_FORCE
  1639. bool "Always use the default kernel command string"
  1640. help
  1641. Always use the default kernel command string, even if the boot
  1642. loader passes other arguments to the kernel.
  1643. This is useful if you cannot or don't want to change the
  1644. command-line options your boot loader passes to the kernel.
  1645. endchoice
  1646. config XIP_KERNEL
  1647. bool "Kernel Execute-In-Place from ROM"
  1648. depends on !ZBOOT_ROM
  1649. help
  1650. Execute-In-Place allows the kernel to run from non-volatile storage
  1651. directly addressable by the CPU, such as NOR flash. This saves RAM
  1652. space since the text section of the kernel is not loaded from flash
  1653. to RAM. Read-write sections, such as the data section and stack,
  1654. are still copied to RAM. The XIP kernel is not compressed since
  1655. it has to run directly from flash, so it will take more space to
  1656. store it. The flash address used to link the kernel object files,
  1657. and for storing it, is configuration dependent. Therefore, if you
  1658. say Y here, you must know the proper physical address where to
  1659. store the kernel image depending on your own flash memory usage.
  1660. Also note that the make target becomes "make xipImage" rather than
  1661. "make zImage" or "make Image". The final kernel binary to put in
  1662. ROM memory will be arch/arm/boot/xipImage.
  1663. If unsure, say N.
  1664. config XIP_PHYS_ADDR
  1665. hex "XIP Kernel Physical Location"
  1666. depends on XIP_KERNEL
  1667. default "0x00080000"
  1668. help
  1669. This is the physical address in your flash memory the kernel will
  1670. be linked for and stored to. This address is dependent on your
  1671. own flash usage.
  1672. config KEXEC
  1673. bool "Kexec system call (EXPERIMENTAL)"
  1674. depends on EXPERIMENTAL
  1675. help
  1676. kexec is a system call that implements the ability to shutdown your
  1677. current kernel, and to start another kernel. It is like a reboot
  1678. but it is independent of the system firmware. And like a reboot
  1679. you can start any kernel with it, not just Linux.
  1680. It is an ongoing process to be certain the hardware in a machine
  1681. is properly shutdown, so do not be surprised if this code does not
  1682. initially work for you. It may help to enable device hotplugging
  1683. support.
  1684. config ATAGS_PROC
  1685. bool "Export atags in procfs"
  1686. depends on KEXEC
  1687. default y
  1688. help
  1689. Should the atags used to boot the kernel be exported in an "atags"
  1690. file in procfs. Useful with kexec.
  1691. config CRASH_DUMP
  1692. bool "Build kdump crash kernel (EXPERIMENTAL)"
  1693. depends on EXPERIMENTAL
  1694. help
  1695. Generate crash dump after being started by kexec. This should
  1696. be normally only set in special crash dump kernels which are
  1697. loaded in the main kernel with kexec-tools into a specially
  1698. reserved region and then later executed after a crash by
  1699. kdump/kexec. The crash dump kernel must be compiled to a
  1700. memory address not used by the main kernel
  1701. For more details see Documentation/kdump/kdump.txt
  1702. config AUTO_ZRELADDR
  1703. bool "Auto calculation of the decompressed kernel image address"
  1704. depends on !ZBOOT_ROM && !ARCH_U300
  1705. help
  1706. ZRELADDR is the physical address where the decompressed kernel
  1707. image will be placed. If AUTO_ZRELADDR is selected, the address
  1708. will be determined at run-time by masking the current IP with
  1709. 0xf8000000. This assumes the zImage being placed in the first 128MB
  1710. from start of memory.
  1711. endmenu
  1712. menu "CPU Power Management"
  1713. if ARCH_HAS_CPUFREQ
  1714. source "drivers/cpufreq/Kconfig"
  1715. config CPU_FREQ_IMX
  1716. tristate "CPUfreq driver for i.MX CPUs"
  1717. depends on ARCH_MXC && CPU_FREQ
  1718. help
  1719. This enables the CPUfreq driver for i.MX CPUs.
  1720. config CPU_FREQ_SA1100
  1721. bool
  1722. config CPU_FREQ_SA1110
  1723. bool
  1724. config CPU_FREQ_INTEGRATOR
  1725. tristate "CPUfreq driver for ARM Integrator CPUs"
  1726. depends on ARCH_INTEGRATOR && CPU_FREQ
  1727. default y
  1728. help
  1729. This enables the CPUfreq driver for ARM Integrator CPUs.
  1730. For details, take a look at <file:Documentation/cpu-freq>.
  1731. If in doubt, say Y.
  1732. config CPU_FREQ_PXA
  1733. bool
  1734. depends on CPU_FREQ && ARCH_PXA && PXA25x
  1735. default y
  1736. select CPU_FREQ_DEFAULT_GOV_USERSPACE
  1737. config CPU_FREQ_S3C
  1738. bool
  1739. help
  1740. Internal configuration node for common cpufreq on Samsung SoC
  1741. config CPU_FREQ_S3C24XX
  1742. bool "CPUfreq driver for Samsung S3C24XX series CPUs (EXPERIMENTAL)"
  1743. depends on ARCH_S3C2410 && CPU_FREQ && EXPERIMENTAL
  1744. select CPU_FREQ_S3C
  1745. help
  1746. This enables the CPUfreq driver for the Samsung S3C24XX family
  1747. of CPUs.
  1748. For details, take a look at <file:Documentation/cpu-freq>.
  1749. If in doubt, say N.
  1750. config CPU_FREQ_S3C24XX_PLL
  1751. bool "Support CPUfreq changing of PLL frequency (EXPERIMENTAL)"
  1752. depends on CPU_FREQ_S3C24XX && EXPERIMENTAL
  1753. help
  1754. Compile in support for changing the PLL frequency from the
  1755. S3C24XX series CPUfreq driver. The PLL takes time to settle
  1756. after a frequency change, so by default it is not enabled.
  1757. This also means that the PLL tables for the selected CPU(s) will
  1758. be built which may increase the size of the kernel image.
  1759. config CPU_FREQ_S3C24XX_DEBUG
  1760. bool "Debug CPUfreq Samsung driver core"
  1761. depends on CPU_FREQ_S3C24XX
  1762. help
  1763. Enable s3c_freq_dbg for the Samsung S3C CPUfreq core
  1764. config CPU_FREQ_S3C24XX_IODEBUG
  1765. bool "Debug CPUfreq Samsung driver IO timing"
  1766. depends on CPU_FREQ_S3C24XX
  1767. help
  1768. Enable s3c_freq_iodbg for the Samsung S3C CPUfreq core
  1769. config CPU_FREQ_S3C24XX_DEBUGFS
  1770. bool "Export debugfs for CPUFreq"
  1771. depends on CPU_FREQ_S3C24XX && DEBUG_FS
  1772. help
  1773. Export status information via debugfs.
  1774. endif
  1775. source "drivers/cpuidle/Kconfig"
  1776. endmenu
  1777. menu "Floating point emulation"
  1778. comment "At least one emulation must be selected"
  1779. config FPE_NWFPE
  1780. bool "NWFPE math emulation"
  1781. depends on (!AEABI || OABI_COMPAT) && !THUMB2_KERNEL
  1782. ---help---
  1783. Say Y to include the NWFPE floating point emulator in the kernel.
  1784. This is necessary to run most binaries. Linux does not currently
  1785. support floating point hardware so you need to say Y here even if
  1786. your machine has an FPA or floating point co-processor podule.
  1787. You may say N here if you are going to load the Acorn FPEmulator
  1788. early in the bootup.
  1789. config FPE_NWFPE_XP
  1790. bool "Support extended precision"
  1791. depends on FPE_NWFPE
  1792. help
  1793. Say Y to include 80-bit support in the kernel floating-point
  1794. emulator. Otherwise, only 32 and 64-bit support is compiled in.
  1795. Note that gcc does not generate 80-bit operations by default,
  1796. so in most cases this option only enlarges the size of the
  1797. floating point emulator without any good reason.
  1798. You almost surely want to say N here.
  1799. config FPE_FASTFPE
  1800. bool "FastFPE math emulation (EXPERIMENTAL)"
  1801. depends on (!AEABI || OABI_COMPAT) && !CPU_32v3 && EXPERIMENTAL
  1802. ---help---
  1803. Say Y here to include the FAST floating point emulator in the kernel.
  1804. This is an experimental much faster emulator which now also has full
  1805. precision for the mantissa. It does not support any exceptions.
  1806. It is very simple, and approximately 3-6 times faster than NWFPE.
  1807. It should be sufficient for most programs. It may be not suitable
  1808. for scientific calculations, but you have to check this for yourself.
  1809. If you do not feel you need a faster FP emulation you should better
  1810. choose NWFPE.
  1811. config VFP
  1812. bool "VFP-format floating point maths"
  1813. depends on CPU_V6 || CPU_V6K || CPU_ARM926T || CPU_V7 || CPU_FEROCEON
  1814. help
  1815. Say Y to include VFP support code in the kernel. This is needed
  1816. if your hardware includes a VFP unit.
  1817. Please see <file:Documentation/arm/VFP/release-notes.txt> for
  1818. release notes and additional status information.
  1819. Say N if your target does not have VFP hardware.
  1820. config VFPv3
  1821. bool
  1822. depends on VFP
  1823. default y if CPU_V7
  1824. config NEON
  1825. bool "Advanced SIMD (NEON) Extension support"
  1826. depends on VFPv3 && CPU_V7
  1827. help
  1828. Say Y to include support code for NEON, the ARMv7 Advanced SIMD
  1829. Extension.
  1830. endmenu
  1831. menu "Userspace binary formats"
  1832. source "fs/Kconfig.binfmt"
  1833. config ARTHUR
  1834. tristate "RISC OS personality"
  1835. depends on !AEABI
  1836. help
  1837. Say Y here to include the kernel code necessary if you want to run
  1838. Acorn RISC OS/Arthur binaries under Linux. This code is still very
  1839. experimental; if this sounds frightening, say N and sleep in peace.
  1840. You can also say M here to compile this support as a module (which
  1841. will be called arthur).
  1842. endmenu
  1843. menu "Power management options"
  1844. source "kernel/power/Kconfig"
  1845. config ARCH_SUSPEND_POSSIBLE
  1846. depends on !ARCH_S5P64X0 && !ARCH_S5PC100
  1847. depends on CPU_ARM920T || CPU_ARM926T || CPU_SA1100 || \
  1848. CPU_V6 || CPU_V6K || CPU_V7 || CPU_XSC3 || CPU_XSCALE
  1849. def_bool y
  1850. config ARM_CPU_SUSPEND
  1851. def_bool PM_SLEEP
  1852. endmenu
  1853. source "net/Kconfig"
  1854. source "drivers/Kconfig"
  1855. source "fs/Kconfig"
  1856. source "arch/arm/Kconfig.debug"
  1857. source "security/Kconfig"
  1858. source "crypto/Kconfig"
  1859. source "lib/Kconfig"