qla_iocb.c 75 KB

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  1. /*
  2. * QLogic Fibre Channel HBA Driver
  3. * Copyright (c) 2003-2013 QLogic Corporation
  4. *
  5. * See LICENSE.qla2xxx for copyright and licensing details.
  6. */
  7. #include "qla_def.h"
  8. #include "qla_target.h"
  9. #include <linux/blkdev.h>
  10. #include <linux/delay.h>
  11. #include <scsi/scsi_tcq.h>
  12. static void qla25xx_set_que(srb_t *, struct rsp_que **);
  13. /**
  14. * qla2x00_get_cmd_direction() - Determine control_flag data direction.
  15. * @cmd: SCSI command
  16. *
  17. * Returns the proper CF_* direction based on CDB.
  18. */
  19. static inline uint16_t
  20. qla2x00_get_cmd_direction(srb_t *sp)
  21. {
  22. uint16_t cflags;
  23. struct scsi_cmnd *cmd = GET_CMD_SP(sp);
  24. struct scsi_qla_host *vha = sp->fcport->vha;
  25. cflags = 0;
  26. /* Set transfer direction */
  27. if (cmd->sc_data_direction == DMA_TO_DEVICE) {
  28. cflags = CF_WRITE;
  29. vha->qla_stats.output_bytes += scsi_bufflen(cmd);
  30. } else if (cmd->sc_data_direction == DMA_FROM_DEVICE) {
  31. cflags = CF_READ;
  32. vha->qla_stats.input_bytes += scsi_bufflen(cmd);
  33. }
  34. return (cflags);
  35. }
  36. /**
  37. * qla2x00_calc_iocbs_32() - Determine number of Command Type 2 and
  38. * Continuation Type 0 IOCBs to allocate.
  39. *
  40. * @dsds: number of data segment decriptors needed
  41. *
  42. * Returns the number of IOCB entries needed to store @dsds.
  43. */
  44. uint16_t
  45. qla2x00_calc_iocbs_32(uint16_t dsds)
  46. {
  47. uint16_t iocbs;
  48. iocbs = 1;
  49. if (dsds > 3) {
  50. iocbs += (dsds - 3) / 7;
  51. if ((dsds - 3) % 7)
  52. iocbs++;
  53. }
  54. return (iocbs);
  55. }
  56. /**
  57. * qla2x00_calc_iocbs_64() - Determine number of Command Type 3 and
  58. * Continuation Type 1 IOCBs to allocate.
  59. *
  60. * @dsds: number of data segment decriptors needed
  61. *
  62. * Returns the number of IOCB entries needed to store @dsds.
  63. */
  64. uint16_t
  65. qla2x00_calc_iocbs_64(uint16_t dsds)
  66. {
  67. uint16_t iocbs;
  68. iocbs = 1;
  69. if (dsds > 2) {
  70. iocbs += (dsds - 2) / 5;
  71. if ((dsds - 2) % 5)
  72. iocbs++;
  73. }
  74. return (iocbs);
  75. }
  76. /**
  77. * qla2x00_prep_cont_type0_iocb() - Initialize a Continuation Type 0 IOCB.
  78. * @ha: HA context
  79. *
  80. * Returns a pointer to the Continuation Type 0 IOCB packet.
  81. */
  82. static inline cont_entry_t *
  83. qla2x00_prep_cont_type0_iocb(struct scsi_qla_host *vha)
  84. {
  85. cont_entry_t *cont_pkt;
  86. struct req_que *req = vha->req;
  87. /* Adjust ring index. */
  88. req->ring_index++;
  89. if (req->ring_index == req->length) {
  90. req->ring_index = 0;
  91. req->ring_ptr = req->ring;
  92. } else {
  93. req->ring_ptr++;
  94. }
  95. cont_pkt = (cont_entry_t *)req->ring_ptr;
  96. /* Load packet defaults. */
  97. *((uint32_t *)(&cont_pkt->entry_type)) =
  98. __constant_cpu_to_le32(CONTINUE_TYPE);
  99. return (cont_pkt);
  100. }
  101. /**
  102. * qla2x00_prep_cont_type1_iocb() - Initialize a Continuation Type 1 IOCB.
  103. * @ha: HA context
  104. *
  105. * Returns a pointer to the continuation type 1 IOCB packet.
  106. */
  107. static inline cont_a64_entry_t *
  108. qla2x00_prep_cont_type1_iocb(scsi_qla_host_t *vha, struct req_que *req)
  109. {
  110. cont_a64_entry_t *cont_pkt;
  111. /* Adjust ring index. */
  112. req->ring_index++;
  113. if (req->ring_index == req->length) {
  114. req->ring_index = 0;
  115. req->ring_ptr = req->ring;
  116. } else {
  117. req->ring_ptr++;
  118. }
  119. cont_pkt = (cont_a64_entry_t *)req->ring_ptr;
  120. /* Load packet defaults. */
  121. *((uint32_t *)(&cont_pkt->entry_type)) = IS_QLAFX00(vha->hw) ?
  122. __constant_cpu_to_le32(CONTINUE_A64_TYPE_FX00) :
  123. __constant_cpu_to_le32(CONTINUE_A64_TYPE);
  124. return (cont_pkt);
  125. }
  126. static inline int
  127. qla24xx_configure_prot_mode(srb_t *sp, uint16_t *fw_prot_opts)
  128. {
  129. struct scsi_cmnd *cmd = GET_CMD_SP(sp);
  130. uint8_t guard = scsi_host_get_guard(cmd->device->host);
  131. /* We always use DIFF Bundling for best performance */
  132. *fw_prot_opts = 0;
  133. /* Translate SCSI opcode to a protection opcode */
  134. switch (scsi_get_prot_op(cmd)) {
  135. case SCSI_PROT_READ_STRIP:
  136. *fw_prot_opts |= PO_MODE_DIF_REMOVE;
  137. break;
  138. case SCSI_PROT_WRITE_INSERT:
  139. *fw_prot_opts |= PO_MODE_DIF_INSERT;
  140. break;
  141. case SCSI_PROT_READ_INSERT:
  142. *fw_prot_opts |= PO_MODE_DIF_INSERT;
  143. break;
  144. case SCSI_PROT_WRITE_STRIP:
  145. *fw_prot_opts |= PO_MODE_DIF_REMOVE;
  146. break;
  147. case SCSI_PROT_READ_PASS:
  148. case SCSI_PROT_WRITE_PASS:
  149. if (guard & SHOST_DIX_GUARD_IP)
  150. *fw_prot_opts |= PO_MODE_DIF_TCP_CKSUM;
  151. else
  152. *fw_prot_opts |= PO_MODE_DIF_PASS;
  153. break;
  154. default: /* Normal Request */
  155. *fw_prot_opts |= PO_MODE_DIF_PASS;
  156. break;
  157. }
  158. return scsi_prot_sg_count(cmd);
  159. }
  160. /*
  161. * qla2x00_build_scsi_iocbs_32() - Build IOCB command utilizing 32bit
  162. * capable IOCB types.
  163. *
  164. * @sp: SRB command to process
  165. * @cmd_pkt: Command type 2 IOCB
  166. * @tot_dsds: Total number of segments to transfer
  167. */
  168. void qla2x00_build_scsi_iocbs_32(srb_t *sp, cmd_entry_t *cmd_pkt,
  169. uint16_t tot_dsds)
  170. {
  171. uint16_t avail_dsds;
  172. uint32_t *cur_dsd;
  173. scsi_qla_host_t *vha;
  174. struct scsi_cmnd *cmd;
  175. struct scatterlist *sg;
  176. int i;
  177. cmd = GET_CMD_SP(sp);
  178. /* Update entry type to indicate Command Type 2 IOCB */
  179. *((uint32_t *)(&cmd_pkt->entry_type)) =
  180. __constant_cpu_to_le32(COMMAND_TYPE);
  181. /* No data transfer */
  182. if (!scsi_bufflen(cmd) || cmd->sc_data_direction == DMA_NONE) {
  183. cmd_pkt->byte_count = __constant_cpu_to_le32(0);
  184. return;
  185. }
  186. vha = sp->fcport->vha;
  187. cmd_pkt->control_flags |= cpu_to_le16(qla2x00_get_cmd_direction(sp));
  188. /* Three DSDs are available in the Command Type 2 IOCB */
  189. avail_dsds = 3;
  190. cur_dsd = (uint32_t *)&cmd_pkt->dseg_0_address;
  191. /* Load data segments */
  192. scsi_for_each_sg(cmd, sg, tot_dsds, i) {
  193. cont_entry_t *cont_pkt;
  194. /* Allocate additional continuation packets? */
  195. if (avail_dsds == 0) {
  196. /*
  197. * Seven DSDs are available in the Continuation
  198. * Type 0 IOCB.
  199. */
  200. cont_pkt = qla2x00_prep_cont_type0_iocb(vha);
  201. cur_dsd = (uint32_t *)&cont_pkt->dseg_0_address;
  202. avail_dsds = 7;
  203. }
  204. *cur_dsd++ = cpu_to_le32(sg_dma_address(sg));
  205. *cur_dsd++ = cpu_to_le32(sg_dma_len(sg));
  206. avail_dsds--;
  207. }
  208. }
  209. /**
  210. * qla2x00_build_scsi_iocbs_64() - Build IOCB command utilizing 64bit
  211. * capable IOCB types.
  212. *
  213. * @sp: SRB command to process
  214. * @cmd_pkt: Command type 3 IOCB
  215. * @tot_dsds: Total number of segments to transfer
  216. */
  217. void qla2x00_build_scsi_iocbs_64(srb_t *sp, cmd_entry_t *cmd_pkt,
  218. uint16_t tot_dsds)
  219. {
  220. uint16_t avail_dsds;
  221. uint32_t *cur_dsd;
  222. scsi_qla_host_t *vha;
  223. struct scsi_cmnd *cmd;
  224. struct scatterlist *sg;
  225. int i;
  226. cmd = GET_CMD_SP(sp);
  227. /* Update entry type to indicate Command Type 3 IOCB */
  228. *((uint32_t *)(&cmd_pkt->entry_type)) =
  229. __constant_cpu_to_le32(COMMAND_A64_TYPE);
  230. /* No data transfer */
  231. if (!scsi_bufflen(cmd) || cmd->sc_data_direction == DMA_NONE) {
  232. cmd_pkt->byte_count = __constant_cpu_to_le32(0);
  233. return;
  234. }
  235. vha = sp->fcport->vha;
  236. cmd_pkt->control_flags |= cpu_to_le16(qla2x00_get_cmd_direction(sp));
  237. /* Two DSDs are available in the Command Type 3 IOCB */
  238. avail_dsds = 2;
  239. cur_dsd = (uint32_t *)&cmd_pkt->dseg_0_address;
  240. /* Load data segments */
  241. scsi_for_each_sg(cmd, sg, tot_dsds, i) {
  242. dma_addr_t sle_dma;
  243. cont_a64_entry_t *cont_pkt;
  244. /* Allocate additional continuation packets? */
  245. if (avail_dsds == 0) {
  246. /*
  247. * Five DSDs are available in the Continuation
  248. * Type 1 IOCB.
  249. */
  250. cont_pkt = qla2x00_prep_cont_type1_iocb(vha, vha->req);
  251. cur_dsd = (uint32_t *)cont_pkt->dseg_0_address;
  252. avail_dsds = 5;
  253. }
  254. sle_dma = sg_dma_address(sg);
  255. *cur_dsd++ = cpu_to_le32(LSD(sle_dma));
  256. *cur_dsd++ = cpu_to_le32(MSD(sle_dma));
  257. *cur_dsd++ = cpu_to_le32(sg_dma_len(sg));
  258. avail_dsds--;
  259. }
  260. }
  261. /**
  262. * qla2x00_start_scsi() - Send a SCSI command to the ISP
  263. * @sp: command to send to the ISP
  264. *
  265. * Returns non-zero if a failure occurred, else zero.
  266. */
  267. int
  268. qla2x00_start_scsi(srb_t *sp)
  269. {
  270. int ret, nseg;
  271. unsigned long flags;
  272. scsi_qla_host_t *vha;
  273. struct scsi_cmnd *cmd;
  274. uint32_t *clr_ptr;
  275. uint32_t index;
  276. uint32_t handle;
  277. cmd_entry_t *cmd_pkt;
  278. uint16_t cnt;
  279. uint16_t req_cnt;
  280. uint16_t tot_dsds;
  281. struct device_reg_2xxx __iomem *reg;
  282. struct qla_hw_data *ha;
  283. struct req_que *req;
  284. struct rsp_que *rsp;
  285. char tag[2];
  286. /* Setup device pointers. */
  287. ret = 0;
  288. vha = sp->fcport->vha;
  289. ha = vha->hw;
  290. reg = &ha->iobase->isp;
  291. cmd = GET_CMD_SP(sp);
  292. req = ha->req_q_map[0];
  293. rsp = ha->rsp_q_map[0];
  294. /* So we know we haven't pci_map'ed anything yet */
  295. tot_dsds = 0;
  296. /* Send marker if required */
  297. if (vha->marker_needed != 0) {
  298. if (qla2x00_marker(vha, req, rsp, 0, 0, MK_SYNC_ALL) !=
  299. QLA_SUCCESS) {
  300. return (QLA_FUNCTION_FAILED);
  301. }
  302. vha->marker_needed = 0;
  303. }
  304. /* Acquire ring specific lock */
  305. spin_lock_irqsave(&ha->hardware_lock, flags);
  306. /* Check for room in outstanding command list. */
  307. handle = req->current_outstanding_cmd;
  308. for (index = 1; index < req->num_outstanding_cmds; index++) {
  309. handle++;
  310. if (handle == req->num_outstanding_cmds)
  311. handle = 1;
  312. if (!req->outstanding_cmds[handle])
  313. break;
  314. }
  315. if (index == req->num_outstanding_cmds)
  316. goto queuing_error;
  317. /* Map the sg table so we have an accurate count of sg entries needed */
  318. if (scsi_sg_count(cmd)) {
  319. nseg = dma_map_sg(&ha->pdev->dev, scsi_sglist(cmd),
  320. scsi_sg_count(cmd), cmd->sc_data_direction);
  321. if (unlikely(!nseg))
  322. goto queuing_error;
  323. } else
  324. nseg = 0;
  325. tot_dsds = nseg;
  326. /* Calculate the number of request entries needed. */
  327. req_cnt = ha->isp_ops->calc_req_entries(tot_dsds);
  328. if (req->cnt < (req_cnt + 2)) {
  329. cnt = RD_REG_WORD_RELAXED(ISP_REQ_Q_OUT(ha, reg));
  330. if (req->ring_index < cnt)
  331. req->cnt = cnt - req->ring_index;
  332. else
  333. req->cnt = req->length -
  334. (req->ring_index - cnt);
  335. /* If still no head room then bail out */
  336. if (req->cnt < (req_cnt + 2))
  337. goto queuing_error;
  338. }
  339. /* Build command packet */
  340. req->current_outstanding_cmd = handle;
  341. req->outstanding_cmds[handle] = sp;
  342. sp->handle = handle;
  343. cmd->host_scribble = (unsigned char *)(unsigned long)handle;
  344. req->cnt -= req_cnt;
  345. cmd_pkt = (cmd_entry_t *)req->ring_ptr;
  346. cmd_pkt->handle = handle;
  347. /* Zero out remaining portion of packet. */
  348. clr_ptr = (uint32_t *)cmd_pkt + 2;
  349. memset(clr_ptr, 0, REQUEST_ENTRY_SIZE - 8);
  350. cmd_pkt->dseg_count = cpu_to_le16(tot_dsds);
  351. /* Set target ID and LUN number*/
  352. SET_TARGET_ID(ha, cmd_pkt->target, sp->fcport->loop_id);
  353. cmd_pkt->lun = cpu_to_le16(cmd->device->lun);
  354. /* Update tagged queuing modifier */
  355. if (scsi_populate_tag_msg(cmd, tag)) {
  356. switch (tag[0]) {
  357. case HEAD_OF_QUEUE_TAG:
  358. cmd_pkt->control_flags =
  359. __constant_cpu_to_le16(CF_HEAD_TAG);
  360. break;
  361. case ORDERED_QUEUE_TAG:
  362. cmd_pkt->control_flags =
  363. __constant_cpu_to_le16(CF_ORDERED_TAG);
  364. break;
  365. default:
  366. cmd_pkt->control_flags =
  367. __constant_cpu_to_le16(CF_SIMPLE_TAG);
  368. break;
  369. }
  370. }
  371. /* Load SCSI command packet. */
  372. memcpy(cmd_pkt->scsi_cdb, cmd->cmnd, cmd->cmd_len);
  373. cmd_pkt->byte_count = cpu_to_le32((uint32_t)scsi_bufflen(cmd));
  374. /* Build IOCB segments */
  375. ha->isp_ops->build_iocbs(sp, cmd_pkt, tot_dsds);
  376. /* Set total data segment count. */
  377. cmd_pkt->entry_count = (uint8_t)req_cnt;
  378. wmb();
  379. /* Adjust ring index. */
  380. req->ring_index++;
  381. if (req->ring_index == req->length) {
  382. req->ring_index = 0;
  383. req->ring_ptr = req->ring;
  384. } else
  385. req->ring_ptr++;
  386. sp->flags |= SRB_DMA_VALID;
  387. /* Set chip new ring index. */
  388. WRT_REG_WORD(ISP_REQ_Q_IN(ha, reg), req->ring_index);
  389. RD_REG_WORD_RELAXED(ISP_REQ_Q_IN(ha, reg)); /* PCI Posting. */
  390. /* Manage unprocessed RIO/ZIO commands in response queue. */
  391. if (vha->flags.process_response_queue &&
  392. rsp->ring_ptr->signature != RESPONSE_PROCESSED)
  393. qla2x00_process_response_queue(rsp);
  394. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  395. return (QLA_SUCCESS);
  396. queuing_error:
  397. if (tot_dsds)
  398. scsi_dma_unmap(cmd);
  399. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  400. return (QLA_FUNCTION_FAILED);
  401. }
  402. /**
  403. * qla2x00_start_iocbs() - Execute the IOCB command
  404. */
  405. void
  406. qla2x00_start_iocbs(struct scsi_qla_host *vha, struct req_que *req)
  407. {
  408. struct qla_hw_data *ha = vha->hw;
  409. device_reg_t __iomem *reg = ISP_QUE_REG(ha, req->id);
  410. if (IS_QLA82XX(ha)) {
  411. qla82xx_start_iocbs(vha);
  412. } else {
  413. /* Adjust ring index. */
  414. req->ring_index++;
  415. if (req->ring_index == req->length) {
  416. req->ring_index = 0;
  417. req->ring_ptr = req->ring;
  418. } else
  419. req->ring_ptr++;
  420. /* Set chip new ring index. */
  421. if (ha->mqenable || IS_QLA83XX(ha)) {
  422. WRT_REG_DWORD(req->req_q_in, req->ring_index);
  423. RD_REG_DWORD_RELAXED(&ha->iobase->isp24.hccr);
  424. } else if (IS_QLAFX00(ha)) {
  425. WRT_REG_DWORD(&reg->ispfx00.req_q_in, req->ring_index);
  426. RD_REG_DWORD_RELAXED(&reg->ispfx00.req_q_in);
  427. QLAFX00_SET_HST_INTR(ha, ha->rqstq_intr_code);
  428. } else if (IS_FWI2_CAPABLE(ha)) {
  429. WRT_REG_DWORD(&reg->isp24.req_q_in, req->ring_index);
  430. RD_REG_DWORD_RELAXED(&reg->isp24.req_q_in);
  431. } else {
  432. WRT_REG_WORD(ISP_REQ_Q_IN(ha, &reg->isp),
  433. req->ring_index);
  434. RD_REG_WORD_RELAXED(ISP_REQ_Q_IN(ha, &reg->isp));
  435. }
  436. }
  437. }
  438. /**
  439. * qla2x00_marker() - Send a marker IOCB to the firmware.
  440. * @ha: HA context
  441. * @loop_id: loop ID
  442. * @lun: LUN
  443. * @type: marker modifier
  444. *
  445. * Can be called from both normal and interrupt context.
  446. *
  447. * Returns non-zero if a failure occurred, else zero.
  448. */
  449. static int
  450. __qla2x00_marker(struct scsi_qla_host *vha, struct req_que *req,
  451. struct rsp_que *rsp, uint16_t loop_id,
  452. uint16_t lun, uint8_t type)
  453. {
  454. mrk_entry_t *mrk;
  455. struct mrk_entry_24xx *mrk24 = NULL;
  456. struct mrk_entry_fx00 *mrkfx = NULL;
  457. struct qla_hw_data *ha = vha->hw;
  458. scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
  459. req = ha->req_q_map[0];
  460. mrk = (mrk_entry_t *)qla2x00_alloc_iocbs(vha, NULL);
  461. if (mrk == NULL) {
  462. ql_log(ql_log_warn, base_vha, 0x3026,
  463. "Failed to allocate Marker IOCB.\n");
  464. return (QLA_FUNCTION_FAILED);
  465. }
  466. mrk->entry_type = MARKER_TYPE;
  467. mrk->modifier = type;
  468. if (type != MK_SYNC_ALL) {
  469. if (IS_QLAFX00(ha)) {
  470. mrkfx = (struct mrk_entry_fx00 *) mrk;
  471. mrkfx->handle = MAKE_HANDLE(req->id, mrkfx->handle);
  472. mrkfx->handle_hi = 0;
  473. mrkfx->tgt_id = cpu_to_le16(loop_id);
  474. mrkfx->lun[1] = LSB(lun);
  475. mrkfx->lun[2] = MSB(lun);
  476. host_to_fcp_swap(mrkfx->lun, sizeof(mrkfx->lun));
  477. } else if (IS_FWI2_CAPABLE(ha)) {
  478. mrk24 = (struct mrk_entry_24xx *) mrk;
  479. mrk24->nport_handle = cpu_to_le16(loop_id);
  480. mrk24->lun[1] = LSB(lun);
  481. mrk24->lun[2] = MSB(lun);
  482. host_to_fcp_swap(mrk24->lun, sizeof(mrk24->lun));
  483. mrk24->vp_index = vha->vp_idx;
  484. mrk24->handle = MAKE_HANDLE(req->id, mrk24->handle);
  485. } else {
  486. SET_TARGET_ID(ha, mrk->target, loop_id);
  487. mrk->lun = cpu_to_le16(lun);
  488. }
  489. }
  490. wmb();
  491. qla2x00_start_iocbs(vha, req);
  492. return (QLA_SUCCESS);
  493. }
  494. int
  495. qla2x00_marker(struct scsi_qla_host *vha, struct req_que *req,
  496. struct rsp_que *rsp, uint16_t loop_id, uint16_t lun,
  497. uint8_t type)
  498. {
  499. int ret;
  500. unsigned long flags = 0;
  501. spin_lock_irqsave(&vha->hw->hardware_lock, flags);
  502. ret = __qla2x00_marker(vha, req, rsp, loop_id, lun, type);
  503. spin_unlock_irqrestore(&vha->hw->hardware_lock, flags);
  504. return (ret);
  505. }
  506. /*
  507. * qla2x00_issue_marker
  508. *
  509. * Issue marker
  510. * Caller CAN have hardware lock held as specified by ha_locked parameter.
  511. * Might release it, then reaquire.
  512. */
  513. int qla2x00_issue_marker(scsi_qla_host_t *vha, int ha_locked)
  514. {
  515. if (ha_locked) {
  516. if (__qla2x00_marker(vha, vha->req, vha->req->rsp, 0, 0,
  517. MK_SYNC_ALL) != QLA_SUCCESS)
  518. return QLA_FUNCTION_FAILED;
  519. } else {
  520. if (qla2x00_marker(vha, vha->req, vha->req->rsp, 0, 0,
  521. MK_SYNC_ALL) != QLA_SUCCESS)
  522. return QLA_FUNCTION_FAILED;
  523. }
  524. vha->marker_needed = 0;
  525. return QLA_SUCCESS;
  526. }
  527. static inline int
  528. qla24xx_build_scsi_type_6_iocbs(srb_t *sp, struct cmd_type_6 *cmd_pkt,
  529. uint16_t tot_dsds)
  530. {
  531. uint32_t *cur_dsd = NULL;
  532. scsi_qla_host_t *vha;
  533. struct qla_hw_data *ha;
  534. struct scsi_cmnd *cmd;
  535. struct scatterlist *cur_seg;
  536. uint32_t *dsd_seg;
  537. void *next_dsd;
  538. uint8_t avail_dsds;
  539. uint8_t first_iocb = 1;
  540. uint32_t dsd_list_len;
  541. struct dsd_dma *dsd_ptr;
  542. struct ct6_dsd *ctx;
  543. cmd = GET_CMD_SP(sp);
  544. /* Update entry type to indicate Command Type 3 IOCB */
  545. *((uint32_t *)(&cmd_pkt->entry_type)) =
  546. __constant_cpu_to_le32(COMMAND_TYPE_6);
  547. /* No data transfer */
  548. if (!scsi_bufflen(cmd) || cmd->sc_data_direction == DMA_NONE) {
  549. cmd_pkt->byte_count = __constant_cpu_to_le32(0);
  550. return 0;
  551. }
  552. vha = sp->fcport->vha;
  553. ha = vha->hw;
  554. /* Set transfer direction */
  555. if (cmd->sc_data_direction == DMA_TO_DEVICE) {
  556. cmd_pkt->control_flags =
  557. __constant_cpu_to_le16(CF_WRITE_DATA);
  558. vha->qla_stats.output_bytes += scsi_bufflen(cmd);
  559. } else if (cmd->sc_data_direction == DMA_FROM_DEVICE) {
  560. cmd_pkt->control_flags =
  561. __constant_cpu_to_le16(CF_READ_DATA);
  562. vha->qla_stats.input_bytes += scsi_bufflen(cmd);
  563. }
  564. cur_seg = scsi_sglist(cmd);
  565. ctx = GET_CMD_CTX_SP(sp);
  566. while (tot_dsds) {
  567. avail_dsds = (tot_dsds > QLA_DSDS_PER_IOCB) ?
  568. QLA_DSDS_PER_IOCB : tot_dsds;
  569. tot_dsds -= avail_dsds;
  570. dsd_list_len = (avail_dsds + 1) * QLA_DSD_SIZE;
  571. dsd_ptr = list_first_entry(&ha->gbl_dsd_list,
  572. struct dsd_dma, list);
  573. next_dsd = dsd_ptr->dsd_addr;
  574. list_del(&dsd_ptr->list);
  575. ha->gbl_dsd_avail--;
  576. list_add_tail(&dsd_ptr->list, &ctx->dsd_list);
  577. ctx->dsd_use_cnt++;
  578. ha->gbl_dsd_inuse++;
  579. if (first_iocb) {
  580. first_iocb = 0;
  581. dsd_seg = (uint32_t *)&cmd_pkt->fcp_data_dseg_address;
  582. *dsd_seg++ = cpu_to_le32(LSD(dsd_ptr->dsd_list_dma));
  583. *dsd_seg++ = cpu_to_le32(MSD(dsd_ptr->dsd_list_dma));
  584. cmd_pkt->fcp_data_dseg_len = cpu_to_le32(dsd_list_len);
  585. } else {
  586. *cur_dsd++ = cpu_to_le32(LSD(dsd_ptr->dsd_list_dma));
  587. *cur_dsd++ = cpu_to_le32(MSD(dsd_ptr->dsd_list_dma));
  588. *cur_dsd++ = cpu_to_le32(dsd_list_len);
  589. }
  590. cur_dsd = (uint32_t *)next_dsd;
  591. while (avail_dsds) {
  592. dma_addr_t sle_dma;
  593. sle_dma = sg_dma_address(cur_seg);
  594. *cur_dsd++ = cpu_to_le32(LSD(sle_dma));
  595. *cur_dsd++ = cpu_to_le32(MSD(sle_dma));
  596. *cur_dsd++ = cpu_to_le32(sg_dma_len(cur_seg));
  597. cur_seg = sg_next(cur_seg);
  598. avail_dsds--;
  599. }
  600. }
  601. /* Null termination */
  602. *cur_dsd++ = 0;
  603. *cur_dsd++ = 0;
  604. *cur_dsd++ = 0;
  605. cmd_pkt->control_flags |= CF_DATA_SEG_DESCR_ENABLE;
  606. return 0;
  607. }
  608. /*
  609. * qla24xx_calc_dsd_lists() - Determine number of DSD list required
  610. * for Command Type 6.
  611. *
  612. * @dsds: number of data segment decriptors needed
  613. *
  614. * Returns the number of dsd list needed to store @dsds.
  615. */
  616. inline uint16_t
  617. qla24xx_calc_dsd_lists(uint16_t dsds)
  618. {
  619. uint16_t dsd_lists = 0;
  620. dsd_lists = (dsds/QLA_DSDS_PER_IOCB);
  621. if (dsds % QLA_DSDS_PER_IOCB)
  622. dsd_lists++;
  623. return dsd_lists;
  624. }
  625. /**
  626. * qla24xx_build_scsi_iocbs() - Build IOCB command utilizing Command Type 7
  627. * IOCB types.
  628. *
  629. * @sp: SRB command to process
  630. * @cmd_pkt: Command type 3 IOCB
  631. * @tot_dsds: Total number of segments to transfer
  632. */
  633. inline void
  634. qla24xx_build_scsi_iocbs(srb_t *sp, struct cmd_type_7 *cmd_pkt,
  635. uint16_t tot_dsds)
  636. {
  637. uint16_t avail_dsds;
  638. uint32_t *cur_dsd;
  639. scsi_qla_host_t *vha;
  640. struct scsi_cmnd *cmd;
  641. struct scatterlist *sg;
  642. int i;
  643. struct req_que *req;
  644. cmd = GET_CMD_SP(sp);
  645. /* Update entry type to indicate Command Type 3 IOCB */
  646. *((uint32_t *)(&cmd_pkt->entry_type)) =
  647. __constant_cpu_to_le32(COMMAND_TYPE_7);
  648. /* No data transfer */
  649. if (!scsi_bufflen(cmd) || cmd->sc_data_direction == DMA_NONE) {
  650. cmd_pkt->byte_count = __constant_cpu_to_le32(0);
  651. return;
  652. }
  653. vha = sp->fcport->vha;
  654. req = vha->req;
  655. /* Set transfer direction */
  656. if (cmd->sc_data_direction == DMA_TO_DEVICE) {
  657. cmd_pkt->task_mgmt_flags =
  658. __constant_cpu_to_le16(TMF_WRITE_DATA);
  659. vha->qla_stats.output_bytes += scsi_bufflen(cmd);
  660. } else if (cmd->sc_data_direction == DMA_FROM_DEVICE) {
  661. cmd_pkt->task_mgmt_flags =
  662. __constant_cpu_to_le16(TMF_READ_DATA);
  663. vha->qla_stats.input_bytes += scsi_bufflen(cmd);
  664. }
  665. /* One DSD is available in the Command Type 3 IOCB */
  666. avail_dsds = 1;
  667. cur_dsd = (uint32_t *)&cmd_pkt->dseg_0_address;
  668. /* Load data segments */
  669. scsi_for_each_sg(cmd, sg, tot_dsds, i) {
  670. dma_addr_t sle_dma;
  671. cont_a64_entry_t *cont_pkt;
  672. /* Allocate additional continuation packets? */
  673. if (avail_dsds == 0) {
  674. /*
  675. * Five DSDs are available in the Continuation
  676. * Type 1 IOCB.
  677. */
  678. cont_pkt = qla2x00_prep_cont_type1_iocb(vha, vha->req);
  679. cur_dsd = (uint32_t *)cont_pkt->dseg_0_address;
  680. avail_dsds = 5;
  681. }
  682. sle_dma = sg_dma_address(sg);
  683. *cur_dsd++ = cpu_to_le32(LSD(sle_dma));
  684. *cur_dsd++ = cpu_to_le32(MSD(sle_dma));
  685. *cur_dsd++ = cpu_to_le32(sg_dma_len(sg));
  686. avail_dsds--;
  687. }
  688. }
  689. struct fw_dif_context {
  690. uint32_t ref_tag;
  691. uint16_t app_tag;
  692. uint8_t ref_tag_mask[4]; /* Validation/Replacement Mask*/
  693. uint8_t app_tag_mask[2]; /* Validation/Replacement Mask*/
  694. };
  695. /*
  696. * qla24xx_set_t10dif_tags_from_cmd - Extract Ref and App tags from SCSI command
  697. *
  698. */
  699. static inline void
  700. qla24xx_set_t10dif_tags(srb_t *sp, struct fw_dif_context *pkt,
  701. unsigned int protcnt)
  702. {
  703. struct scsi_cmnd *cmd = GET_CMD_SP(sp);
  704. switch (scsi_get_prot_type(cmd)) {
  705. case SCSI_PROT_DIF_TYPE0:
  706. /*
  707. * No check for ql2xenablehba_err_chk, as it would be an
  708. * I/O error if hba tag generation is not done.
  709. */
  710. pkt->ref_tag = cpu_to_le32((uint32_t)
  711. (0xffffffff & scsi_get_lba(cmd)));
  712. if (!qla2x00_hba_err_chk_enabled(sp))
  713. break;
  714. pkt->ref_tag_mask[0] = 0xff;
  715. pkt->ref_tag_mask[1] = 0xff;
  716. pkt->ref_tag_mask[2] = 0xff;
  717. pkt->ref_tag_mask[3] = 0xff;
  718. break;
  719. /*
  720. * For TYPE 2 protection: 16 bit GUARD + 32 bit REF tag has to
  721. * match LBA in CDB + N
  722. */
  723. case SCSI_PROT_DIF_TYPE2:
  724. pkt->app_tag = __constant_cpu_to_le16(0);
  725. pkt->app_tag_mask[0] = 0x0;
  726. pkt->app_tag_mask[1] = 0x0;
  727. pkt->ref_tag = cpu_to_le32((uint32_t)
  728. (0xffffffff & scsi_get_lba(cmd)));
  729. if (!qla2x00_hba_err_chk_enabled(sp))
  730. break;
  731. /* enable ALL bytes of the ref tag */
  732. pkt->ref_tag_mask[0] = 0xff;
  733. pkt->ref_tag_mask[1] = 0xff;
  734. pkt->ref_tag_mask[2] = 0xff;
  735. pkt->ref_tag_mask[3] = 0xff;
  736. break;
  737. /* For Type 3 protection: 16 bit GUARD only */
  738. case SCSI_PROT_DIF_TYPE3:
  739. pkt->ref_tag_mask[0] = pkt->ref_tag_mask[1] =
  740. pkt->ref_tag_mask[2] = pkt->ref_tag_mask[3] =
  741. 0x00;
  742. break;
  743. /*
  744. * For TYpe 1 protection: 16 bit GUARD tag, 32 bit REF tag, and
  745. * 16 bit app tag.
  746. */
  747. case SCSI_PROT_DIF_TYPE1:
  748. pkt->ref_tag = cpu_to_le32((uint32_t)
  749. (0xffffffff & scsi_get_lba(cmd)));
  750. pkt->app_tag = __constant_cpu_to_le16(0);
  751. pkt->app_tag_mask[0] = 0x0;
  752. pkt->app_tag_mask[1] = 0x0;
  753. if (!qla2x00_hba_err_chk_enabled(sp))
  754. break;
  755. /* enable ALL bytes of the ref tag */
  756. pkt->ref_tag_mask[0] = 0xff;
  757. pkt->ref_tag_mask[1] = 0xff;
  758. pkt->ref_tag_mask[2] = 0xff;
  759. pkt->ref_tag_mask[3] = 0xff;
  760. break;
  761. }
  762. }
  763. struct qla2_sgx {
  764. dma_addr_t dma_addr; /* OUT */
  765. uint32_t dma_len; /* OUT */
  766. uint32_t tot_bytes; /* IN */
  767. struct scatterlist *cur_sg; /* IN */
  768. /* for book keeping, bzero on initial invocation */
  769. uint32_t bytes_consumed;
  770. uint32_t num_bytes;
  771. uint32_t tot_partial;
  772. /* for debugging */
  773. uint32_t num_sg;
  774. srb_t *sp;
  775. };
  776. static int
  777. qla24xx_get_one_block_sg(uint32_t blk_sz, struct qla2_sgx *sgx,
  778. uint32_t *partial)
  779. {
  780. struct scatterlist *sg;
  781. uint32_t cumulative_partial, sg_len;
  782. dma_addr_t sg_dma_addr;
  783. if (sgx->num_bytes == sgx->tot_bytes)
  784. return 0;
  785. sg = sgx->cur_sg;
  786. cumulative_partial = sgx->tot_partial;
  787. sg_dma_addr = sg_dma_address(sg);
  788. sg_len = sg_dma_len(sg);
  789. sgx->dma_addr = sg_dma_addr + sgx->bytes_consumed;
  790. if ((cumulative_partial + (sg_len - sgx->bytes_consumed)) >= blk_sz) {
  791. sgx->dma_len = (blk_sz - cumulative_partial);
  792. sgx->tot_partial = 0;
  793. sgx->num_bytes += blk_sz;
  794. *partial = 0;
  795. } else {
  796. sgx->dma_len = sg_len - sgx->bytes_consumed;
  797. sgx->tot_partial += sgx->dma_len;
  798. *partial = 1;
  799. }
  800. sgx->bytes_consumed += sgx->dma_len;
  801. if (sg_len == sgx->bytes_consumed) {
  802. sg = sg_next(sg);
  803. sgx->num_sg++;
  804. sgx->cur_sg = sg;
  805. sgx->bytes_consumed = 0;
  806. }
  807. return 1;
  808. }
  809. static int
  810. qla24xx_walk_and_build_sglist_no_difb(struct qla_hw_data *ha, srb_t *sp,
  811. uint32_t *dsd, uint16_t tot_dsds)
  812. {
  813. void *next_dsd;
  814. uint8_t avail_dsds = 0;
  815. uint32_t dsd_list_len;
  816. struct dsd_dma *dsd_ptr;
  817. struct scatterlist *sg_prot;
  818. uint32_t *cur_dsd = dsd;
  819. uint16_t used_dsds = tot_dsds;
  820. uint32_t prot_int;
  821. uint32_t partial;
  822. struct qla2_sgx sgx;
  823. dma_addr_t sle_dma;
  824. uint32_t sle_dma_len, tot_prot_dma_len = 0;
  825. struct scsi_cmnd *cmd = GET_CMD_SP(sp);
  826. prot_int = cmd->device->sector_size;
  827. memset(&sgx, 0, sizeof(struct qla2_sgx));
  828. sgx.tot_bytes = scsi_bufflen(cmd);
  829. sgx.cur_sg = scsi_sglist(cmd);
  830. sgx.sp = sp;
  831. sg_prot = scsi_prot_sglist(cmd);
  832. while (qla24xx_get_one_block_sg(prot_int, &sgx, &partial)) {
  833. sle_dma = sgx.dma_addr;
  834. sle_dma_len = sgx.dma_len;
  835. alloc_and_fill:
  836. /* Allocate additional continuation packets? */
  837. if (avail_dsds == 0) {
  838. avail_dsds = (used_dsds > QLA_DSDS_PER_IOCB) ?
  839. QLA_DSDS_PER_IOCB : used_dsds;
  840. dsd_list_len = (avail_dsds + 1) * 12;
  841. used_dsds -= avail_dsds;
  842. /* allocate tracking DS */
  843. dsd_ptr = kzalloc(sizeof(struct dsd_dma), GFP_ATOMIC);
  844. if (!dsd_ptr)
  845. return 1;
  846. /* allocate new list */
  847. dsd_ptr->dsd_addr = next_dsd =
  848. dma_pool_alloc(ha->dl_dma_pool, GFP_ATOMIC,
  849. &dsd_ptr->dsd_list_dma);
  850. if (!next_dsd) {
  851. /*
  852. * Need to cleanup only this dsd_ptr, rest
  853. * will be done by sp_free_dma()
  854. */
  855. kfree(dsd_ptr);
  856. return 1;
  857. }
  858. list_add_tail(&dsd_ptr->list,
  859. &((struct crc_context *)sp->u.scmd.ctx)->dsd_list);
  860. sp->flags |= SRB_CRC_CTX_DSD_VALID;
  861. /* add new list to cmd iocb or last list */
  862. *cur_dsd++ = cpu_to_le32(LSD(dsd_ptr->dsd_list_dma));
  863. *cur_dsd++ = cpu_to_le32(MSD(dsd_ptr->dsd_list_dma));
  864. *cur_dsd++ = dsd_list_len;
  865. cur_dsd = (uint32_t *)next_dsd;
  866. }
  867. *cur_dsd++ = cpu_to_le32(LSD(sle_dma));
  868. *cur_dsd++ = cpu_to_le32(MSD(sle_dma));
  869. *cur_dsd++ = cpu_to_le32(sle_dma_len);
  870. avail_dsds--;
  871. if (partial == 0) {
  872. /* Got a full protection interval */
  873. sle_dma = sg_dma_address(sg_prot) + tot_prot_dma_len;
  874. sle_dma_len = 8;
  875. tot_prot_dma_len += sle_dma_len;
  876. if (tot_prot_dma_len == sg_dma_len(sg_prot)) {
  877. tot_prot_dma_len = 0;
  878. sg_prot = sg_next(sg_prot);
  879. }
  880. partial = 1; /* So as to not re-enter this block */
  881. goto alloc_and_fill;
  882. }
  883. }
  884. /* Null termination */
  885. *cur_dsd++ = 0;
  886. *cur_dsd++ = 0;
  887. *cur_dsd++ = 0;
  888. return 0;
  889. }
  890. static int
  891. qla24xx_walk_and_build_sglist(struct qla_hw_data *ha, srb_t *sp, uint32_t *dsd,
  892. uint16_t tot_dsds)
  893. {
  894. void *next_dsd;
  895. uint8_t avail_dsds = 0;
  896. uint32_t dsd_list_len;
  897. struct dsd_dma *dsd_ptr;
  898. struct scatterlist *sg;
  899. uint32_t *cur_dsd = dsd;
  900. int i;
  901. uint16_t used_dsds = tot_dsds;
  902. struct scsi_cmnd *cmd = GET_CMD_SP(sp);
  903. scsi_for_each_sg(cmd, sg, tot_dsds, i) {
  904. dma_addr_t sle_dma;
  905. /* Allocate additional continuation packets? */
  906. if (avail_dsds == 0) {
  907. avail_dsds = (used_dsds > QLA_DSDS_PER_IOCB) ?
  908. QLA_DSDS_PER_IOCB : used_dsds;
  909. dsd_list_len = (avail_dsds + 1) * 12;
  910. used_dsds -= avail_dsds;
  911. /* allocate tracking DS */
  912. dsd_ptr = kzalloc(sizeof(struct dsd_dma), GFP_ATOMIC);
  913. if (!dsd_ptr)
  914. return 1;
  915. /* allocate new list */
  916. dsd_ptr->dsd_addr = next_dsd =
  917. dma_pool_alloc(ha->dl_dma_pool, GFP_ATOMIC,
  918. &dsd_ptr->dsd_list_dma);
  919. if (!next_dsd) {
  920. /*
  921. * Need to cleanup only this dsd_ptr, rest
  922. * will be done by sp_free_dma()
  923. */
  924. kfree(dsd_ptr);
  925. return 1;
  926. }
  927. list_add_tail(&dsd_ptr->list,
  928. &((struct crc_context *)sp->u.scmd.ctx)->dsd_list);
  929. sp->flags |= SRB_CRC_CTX_DSD_VALID;
  930. /* add new list to cmd iocb or last list */
  931. *cur_dsd++ = cpu_to_le32(LSD(dsd_ptr->dsd_list_dma));
  932. *cur_dsd++ = cpu_to_le32(MSD(dsd_ptr->dsd_list_dma));
  933. *cur_dsd++ = dsd_list_len;
  934. cur_dsd = (uint32_t *)next_dsd;
  935. }
  936. sle_dma = sg_dma_address(sg);
  937. *cur_dsd++ = cpu_to_le32(LSD(sle_dma));
  938. *cur_dsd++ = cpu_to_le32(MSD(sle_dma));
  939. *cur_dsd++ = cpu_to_le32(sg_dma_len(sg));
  940. avail_dsds--;
  941. }
  942. /* Null termination */
  943. *cur_dsd++ = 0;
  944. *cur_dsd++ = 0;
  945. *cur_dsd++ = 0;
  946. return 0;
  947. }
  948. static int
  949. qla24xx_walk_and_build_prot_sglist(struct qla_hw_data *ha, srb_t *sp,
  950. uint32_t *dsd,
  951. uint16_t tot_dsds)
  952. {
  953. void *next_dsd;
  954. uint8_t avail_dsds = 0;
  955. uint32_t dsd_list_len;
  956. struct dsd_dma *dsd_ptr;
  957. struct scatterlist *sg;
  958. int i;
  959. struct scsi_cmnd *cmd;
  960. uint32_t *cur_dsd = dsd;
  961. uint16_t used_dsds = tot_dsds;
  962. cmd = GET_CMD_SP(sp);
  963. scsi_for_each_prot_sg(cmd, sg, tot_dsds, i) {
  964. dma_addr_t sle_dma;
  965. /* Allocate additional continuation packets? */
  966. if (avail_dsds == 0) {
  967. avail_dsds = (used_dsds > QLA_DSDS_PER_IOCB) ?
  968. QLA_DSDS_PER_IOCB : used_dsds;
  969. dsd_list_len = (avail_dsds + 1) * 12;
  970. used_dsds -= avail_dsds;
  971. /* allocate tracking DS */
  972. dsd_ptr = kzalloc(sizeof(struct dsd_dma), GFP_ATOMIC);
  973. if (!dsd_ptr)
  974. return 1;
  975. /* allocate new list */
  976. dsd_ptr->dsd_addr = next_dsd =
  977. dma_pool_alloc(ha->dl_dma_pool, GFP_ATOMIC,
  978. &dsd_ptr->dsd_list_dma);
  979. if (!next_dsd) {
  980. /*
  981. * Need to cleanup only this dsd_ptr, rest
  982. * will be done by sp_free_dma()
  983. */
  984. kfree(dsd_ptr);
  985. return 1;
  986. }
  987. list_add_tail(&dsd_ptr->list,
  988. &((struct crc_context *)sp->u.scmd.ctx)->dsd_list);
  989. sp->flags |= SRB_CRC_CTX_DSD_VALID;
  990. /* add new list to cmd iocb or last list */
  991. *cur_dsd++ = cpu_to_le32(LSD(dsd_ptr->dsd_list_dma));
  992. *cur_dsd++ = cpu_to_le32(MSD(dsd_ptr->dsd_list_dma));
  993. *cur_dsd++ = dsd_list_len;
  994. cur_dsd = (uint32_t *)next_dsd;
  995. }
  996. sle_dma = sg_dma_address(sg);
  997. *cur_dsd++ = cpu_to_le32(LSD(sle_dma));
  998. *cur_dsd++ = cpu_to_le32(MSD(sle_dma));
  999. *cur_dsd++ = cpu_to_le32(sg_dma_len(sg));
  1000. avail_dsds--;
  1001. }
  1002. /* Null termination */
  1003. *cur_dsd++ = 0;
  1004. *cur_dsd++ = 0;
  1005. *cur_dsd++ = 0;
  1006. return 0;
  1007. }
  1008. /**
  1009. * qla24xx_build_scsi_crc_2_iocbs() - Build IOCB command utilizing Command
  1010. * Type 6 IOCB types.
  1011. *
  1012. * @sp: SRB command to process
  1013. * @cmd_pkt: Command type 3 IOCB
  1014. * @tot_dsds: Total number of segments to transfer
  1015. */
  1016. static inline int
  1017. qla24xx_build_scsi_crc_2_iocbs(srb_t *sp, struct cmd_type_crc_2 *cmd_pkt,
  1018. uint16_t tot_dsds, uint16_t tot_prot_dsds, uint16_t fw_prot_opts)
  1019. {
  1020. uint32_t *cur_dsd, *fcp_dl;
  1021. scsi_qla_host_t *vha;
  1022. struct scsi_cmnd *cmd;
  1023. struct scatterlist *cur_seg;
  1024. int sgc;
  1025. uint32_t total_bytes = 0;
  1026. uint32_t data_bytes;
  1027. uint32_t dif_bytes;
  1028. uint8_t bundling = 1;
  1029. uint16_t blk_size;
  1030. uint8_t *clr_ptr;
  1031. struct crc_context *crc_ctx_pkt = NULL;
  1032. struct qla_hw_data *ha;
  1033. uint8_t additional_fcpcdb_len;
  1034. uint16_t fcp_cmnd_len;
  1035. struct fcp_cmnd *fcp_cmnd;
  1036. dma_addr_t crc_ctx_dma;
  1037. char tag[2];
  1038. cmd = GET_CMD_SP(sp);
  1039. sgc = 0;
  1040. /* Update entry type to indicate Command Type CRC_2 IOCB */
  1041. *((uint32_t *)(&cmd_pkt->entry_type)) =
  1042. __constant_cpu_to_le32(COMMAND_TYPE_CRC_2);
  1043. vha = sp->fcport->vha;
  1044. ha = vha->hw;
  1045. /* No data transfer */
  1046. data_bytes = scsi_bufflen(cmd);
  1047. if (!data_bytes || cmd->sc_data_direction == DMA_NONE) {
  1048. cmd_pkt->byte_count = __constant_cpu_to_le32(0);
  1049. return QLA_SUCCESS;
  1050. }
  1051. cmd_pkt->vp_index = sp->fcport->vha->vp_idx;
  1052. /* Set transfer direction */
  1053. if (cmd->sc_data_direction == DMA_TO_DEVICE) {
  1054. cmd_pkt->control_flags =
  1055. __constant_cpu_to_le16(CF_WRITE_DATA);
  1056. } else if (cmd->sc_data_direction == DMA_FROM_DEVICE) {
  1057. cmd_pkt->control_flags =
  1058. __constant_cpu_to_le16(CF_READ_DATA);
  1059. }
  1060. if ((scsi_get_prot_op(cmd) == SCSI_PROT_READ_INSERT) ||
  1061. (scsi_get_prot_op(cmd) == SCSI_PROT_WRITE_STRIP) ||
  1062. (scsi_get_prot_op(cmd) == SCSI_PROT_READ_STRIP) ||
  1063. (scsi_get_prot_op(cmd) == SCSI_PROT_WRITE_INSERT))
  1064. bundling = 0;
  1065. /* Allocate CRC context from global pool */
  1066. crc_ctx_pkt = sp->u.scmd.ctx =
  1067. dma_pool_alloc(ha->dl_dma_pool, GFP_ATOMIC, &crc_ctx_dma);
  1068. if (!crc_ctx_pkt)
  1069. goto crc_queuing_error;
  1070. /* Zero out CTX area. */
  1071. clr_ptr = (uint8_t *)crc_ctx_pkt;
  1072. memset(clr_ptr, 0, sizeof(*crc_ctx_pkt));
  1073. crc_ctx_pkt->crc_ctx_dma = crc_ctx_dma;
  1074. sp->flags |= SRB_CRC_CTX_DMA_VALID;
  1075. /* Set handle */
  1076. crc_ctx_pkt->handle = cmd_pkt->handle;
  1077. INIT_LIST_HEAD(&crc_ctx_pkt->dsd_list);
  1078. qla24xx_set_t10dif_tags(sp, (struct fw_dif_context *)
  1079. &crc_ctx_pkt->ref_tag, tot_prot_dsds);
  1080. cmd_pkt->crc_context_address[0] = cpu_to_le32(LSD(crc_ctx_dma));
  1081. cmd_pkt->crc_context_address[1] = cpu_to_le32(MSD(crc_ctx_dma));
  1082. cmd_pkt->crc_context_len = CRC_CONTEXT_LEN_FW;
  1083. /* Determine SCSI command length -- align to 4 byte boundary */
  1084. if (cmd->cmd_len > 16) {
  1085. additional_fcpcdb_len = cmd->cmd_len - 16;
  1086. if ((cmd->cmd_len % 4) != 0) {
  1087. /* SCSI cmd > 16 bytes must be multiple of 4 */
  1088. goto crc_queuing_error;
  1089. }
  1090. fcp_cmnd_len = 12 + cmd->cmd_len + 4;
  1091. } else {
  1092. additional_fcpcdb_len = 0;
  1093. fcp_cmnd_len = 12 + 16 + 4;
  1094. }
  1095. fcp_cmnd = &crc_ctx_pkt->fcp_cmnd;
  1096. fcp_cmnd->additional_cdb_len = additional_fcpcdb_len;
  1097. if (cmd->sc_data_direction == DMA_TO_DEVICE)
  1098. fcp_cmnd->additional_cdb_len |= 1;
  1099. else if (cmd->sc_data_direction == DMA_FROM_DEVICE)
  1100. fcp_cmnd->additional_cdb_len |= 2;
  1101. int_to_scsilun(cmd->device->lun, &fcp_cmnd->lun);
  1102. memcpy(fcp_cmnd->cdb, cmd->cmnd, cmd->cmd_len);
  1103. cmd_pkt->fcp_cmnd_dseg_len = cpu_to_le16(fcp_cmnd_len);
  1104. cmd_pkt->fcp_cmnd_dseg_address[0] = cpu_to_le32(
  1105. LSD(crc_ctx_dma + CRC_CONTEXT_FCPCMND_OFF));
  1106. cmd_pkt->fcp_cmnd_dseg_address[1] = cpu_to_le32(
  1107. MSD(crc_ctx_dma + CRC_CONTEXT_FCPCMND_OFF));
  1108. fcp_cmnd->task_management = 0;
  1109. /*
  1110. * Update tagged queuing modifier if using command tag queuing
  1111. */
  1112. if (scsi_populate_tag_msg(cmd, tag)) {
  1113. switch (tag[0]) {
  1114. case HEAD_OF_QUEUE_TAG:
  1115. fcp_cmnd->task_attribute = TSK_HEAD_OF_QUEUE;
  1116. break;
  1117. case ORDERED_QUEUE_TAG:
  1118. fcp_cmnd->task_attribute = TSK_ORDERED;
  1119. break;
  1120. default:
  1121. fcp_cmnd->task_attribute = 0;
  1122. break;
  1123. }
  1124. } else {
  1125. fcp_cmnd->task_attribute = 0;
  1126. }
  1127. cmd_pkt->fcp_rsp_dseg_len = 0; /* Let response come in status iocb */
  1128. /* Compute dif len and adjust data len to incude protection */
  1129. dif_bytes = 0;
  1130. blk_size = cmd->device->sector_size;
  1131. dif_bytes = (data_bytes / blk_size) * 8;
  1132. switch (scsi_get_prot_op(GET_CMD_SP(sp))) {
  1133. case SCSI_PROT_READ_INSERT:
  1134. case SCSI_PROT_WRITE_STRIP:
  1135. total_bytes = data_bytes;
  1136. data_bytes += dif_bytes;
  1137. break;
  1138. case SCSI_PROT_READ_STRIP:
  1139. case SCSI_PROT_WRITE_INSERT:
  1140. case SCSI_PROT_READ_PASS:
  1141. case SCSI_PROT_WRITE_PASS:
  1142. total_bytes = data_bytes + dif_bytes;
  1143. break;
  1144. default:
  1145. BUG();
  1146. }
  1147. if (!qla2x00_hba_err_chk_enabled(sp))
  1148. fw_prot_opts |= 0x10; /* Disable Guard tag checking */
  1149. /* HBA error checking enabled */
  1150. else if (IS_PI_UNINIT_CAPABLE(ha)) {
  1151. if ((scsi_get_prot_type(GET_CMD_SP(sp)) == SCSI_PROT_DIF_TYPE1)
  1152. || (scsi_get_prot_type(GET_CMD_SP(sp)) ==
  1153. SCSI_PROT_DIF_TYPE2))
  1154. fw_prot_opts |= BIT_10;
  1155. else if (scsi_get_prot_type(GET_CMD_SP(sp)) ==
  1156. SCSI_PROT_DIF_TYPE3)
  1157. fw_prot_opts |= BIT_11;
  1158. }
  1159. if (!bundling) {
  1160. cur_dsd = (uint32_t *) &crc_ctx_pkt->u.nobundling.data_address;
  1161. } else {
  1162. /*
  1163. * Configure Bundling if we need to fetch interlaving
  1164. * protection PCI accesses
  1165. */
  1166. fw_prot_opts |= PO_ENABLE_DIF_BUNDLING;
  1167. crc_ctx_pkt->u.bundling.dif_byte_count = cpu_to_le32(dif_bytes);
  1168. crc_ctx_pkt->u.bundling.dseg_count = cpu_to_le16(tot_dsds -
  1169. tot_prot_dsds);
  1170. cur_dsd = (uint32_t *) &crc_ctx_pkt->u.bundling.data_address;
  1171. }
  1172. /* Finish the common fields of CRC pkt */
  1173. crc_ctx_pkt->blk_size = cpu_to_le16(blk_size);
  1174. crc_ctx_pkt->prot_opts = cpu_to_le16(fw_prot_opts);
  1175. crc_ctx_pkt->byte_count = cpu_to_le32(data_bytes);
  1176. crc_ctx_pkt->guard_seed = __constant_cpu_to_le16(0);
  1177. /* Fibre channel byte count */
  1178. cmd_pkt->byte_count = cpu_to_le32(total_bytes);
  1179. fcp_dl = (uint32_t *)(crc_ctx_pkt->fcp_cmnd.cdb + 16 +
  1180. additional_fcpcdb_len);
  1181. *fcp_dl = htonl(total_bytes);
  1182. if (!data_bytes || cmd->sc_data_direction == DMA_NONE) {
  1183. cmd_pkt->byte_count = __constant_cpu_to_le32(0);
  1184. return QLA_SUCCESS;
  1185. }
  1186. /* Walks data segments */
  1187. cmd_pkt->control_flags |=
  1188. __constant_cpu_to_le16(CF_DATA_SEG_DESCR_ENABLE);
  1189. if (!bundling && tot_prot_dsds) {
  1190. if (qla24xx_walk_and_build_sglist_no_difb(ha, sp,
  1191. cur_dsd, tot_dsds))
  1192. goto crc_queuing_error;
  1193. } else if (qla24xx_walk_and_build_sglist(ha, sp, cur_dsd,
  1194. (tot_dsds - tot_prot_dsds)))
  1195. goto crc_queuing_error;
  1196. if (bundling && tot_prot_dsds) {
  1197. /* Walks dif segments */
  1198. cur_seg = scsi_prot_sglist(cmd);
  1199. cmd_pkt->control_flags |=
  1200. __constant_cpu_to_le16(CF_DIF_SEG_DESCR_ENABLE);
  1201. cur_dsd = (uint32_t *) &crc_ctx_pkt->u.bundling.dif_address;
  1202. if (qla24xx_walk_and_build_prot_sglist(ha, sp, cur_dsd,
  1203. tot_prot_dsds))
  1204. goto crc_queuing_error;
  1205. }
  1206. return QLA_SUCCESS;
  1207. crc_queuing_error:
  1208. /* Cleanup will be performed by the caller */
  1209. return QLA_FUNCTION_FAILED;
  1210. }
  1211. /**
  1212. * qla24xx_start_scsi() - Send a SCSI command to the ISP
  1213. * @sp: command to send to the ISP
  1214. *
  1215. * Returns non-zero if a failure occurred, else zero.
  1216. */
  1217. int
  1218. qla24xx_start_scsi(srb_t *sp)
  1219. {
  1220. int ret, nseg;
  1221. unsigned long flags;
  1222. uint32_t *clr_ptr;
  1223. uint32_t index;
  1224. uint32_t handle;
  1225. struct cmd_type_7 *cmd_pkt;
  1226. uint16_t cnt;
  1227. uint16_t req_cnt;
  1228. uint16_t tot_dsds;
  1229. struct req_que *req = NULL;
  1230. struct rsp_que *rsp = NULL;
  1231. struct scsi_cmnd *cmd = GET_CMD_SP(sp);
  1232. struct scsi_qla_host *vha = sp->fcport->vha;
  1233. struct qla_hw_data *ha = vha->hw;
  1234. char tag[2];
  1235. /* Setup device pointers. */
  1236. ret = 0;
  1237. qla25xx_set_que(sp, &rsp);
  1238. req = vha->req;
  1239. /* So we know we haven't pci_map'ed anything yet */
  1240. tot_dsds = 0;
  1241. /* Send marker if required */
  1242. if (vha->marker_needed != 0) {
  1243. if (qla2x00_marker(vha, req, rsp, 0, 0, MK_SYNC_ALL) !=
  1244. QLA_SUCCESS)
  1245. return QLA_FUNCTION_FAILED;
  1246. vha->marker_needed = 0;
  1247. }
  1248. /* Acquire ring specific lock */
  1249. spin_lock_irqsave(&ha->hardware_lock, flags);
  1250. /* Check for room in outstanding command list. */
  1251. handle = req->current_outstanding_cmd;
  1252. for (index = 1; index < req->num_outstanding_cmds; index++) {
  1253. handle++;
  1254. if (handle == req->num_outstanding_cmds)
  1255. handle = 1;
  1256. if (!req->outstanding_cmds[handle])
  1257. break;
  1258. }
  1259. if (index == req->num_outstanding_cmds)
  1260. goto queuing_error;
  1261. /* Map the sg table so we have an accurate count of sg entries needed */
  1262. if (scsi_sg_count(cmd)) {
  1263. nseg = dma_map_sg(&ha->pdev->dev, scsi_sglist(cmd),
  1264. scsi_sg_count(cmd), cmd->sc_data_direction);
  1265. if (unlikely(!nseg))
  1266. goto queuing_error;
  1267. } else
  1268. nseg = 0;
  1269. tot_dsds = nseg;
  1270. req_cnt = qla24xx_calc_iocbs(vha, tot_dsds);
  1271. if (req->cnt < (req_cnt + 2)) {
  1272. cnt = RD_REG_DWORD_RELAXED(req->req_q_out);
  1273. if (req->ring_index < cnt)
  1274. req->cnt = cnt - req->ring_index;
  1275. else
  1276. req->cnt = req->length -
  1277. (req->ring_index - cnt);
  1278. if (req->cnt < (req_cnt + 2))
  1279. goto queuing_error;
  1280. }
  1281. /* Build command packet. */
  1282. req->current_outstanding_cmd = handle;
  1283. req->outstanding_cmds[handle] = sp;
  1284. sp->handle = handle;
  1285. cmd->host_scribble = (unsigned char *)(unsigned long)handle;
  1286. req->cnt -= req_cnt;
  1287. cmd_pkt = (struct cmd_type_7 *)req->ring_ptr;
  1288. cmd_pkt->handle = MAKE_HANDLE(req->id, handle);
  1289. /* Zero out remaining portion of packet. */
  1290. /* tagged queuing modifier -- default is TSK_SIMPLE (0). */
  1291. clr_ptr = (uint32_t *)cmd_pkt + 2;
  1292. memset(clr_ptr, 0, REQUEST_ENTRY_SIZE - 8);
  1293. cmd_pkt->dseg_count = cpu_to_le16(tot_dsds);
  1294. /* Set NPORT-ID and LUN number*/
  1295. cmd_pkt->nport_handle = cpu_to_le16(sp->fcport->loop_id);
  1296. cmd_pkt->port_id[0] = sp->fcport->d_id.b.al_pa;
  1297. cmd_pkt->port_id[1] = sp->fcport->d_id.b.area;
  1298. cmd_pkt->port_id[2] = sp->fcport->d_id.b.domain;
  1299. cmd_pkt->vp_index = sp->fcport->vha->vp_idx;
  1300. int_to_scsilun(cmd->device->lun, &cmd_pkt->lun);
  1301. host_to_fcp_swap((uint8_t *)&cmd_pkt->lun, sizeof(cmd_pkt->lun));
  1302. /* Update tagged queuing modifier -- default is TSK_SIMPLE (0). */
  1303. if (scsi_populate_tag_msg(cmd, tag)) {
  1304. switch (tag[0]) {
  1305. case HEAD_OF_QUEUE_TAG:
  1306. cmd_pkt->task = TSK_HEAD_OF_QUEUE;
  1307. break;
  1308. case ORDERED_QUEUE_TAG:
  1309. cmd_pkt->task = TSK_ORDERED;
  1310. break;
  1311. }
  1312. }
  1313. /* Load SCSI command packet. */
  1314. memcpy(cmd_pkt->fcp_cdb, cmd->cmnd, cmd->cmd_len);
  1315. host_to_fcp_swap(cmd_pkt->fcp_cdb, sizeof(cmd_pkt->fcp_cdb));
  1316. cmd_pkt->byte_count = cpu_to_le32((uint32_t)scsi_bufflen(cmd));
  1317. /* Build IOCB segments */
  1318. qla24xx_build_scsi_iocbs(sp, cmd_pkt, tot_dsds);
  1319. /* Set total data segment count. */
  1320. cmd_pkt->entry_count = (uint8_t)req_cnt;
  1321. /* Specify response queue number where completion should happen */
  1322. cmd_pkt->entry_status = (uint8_t) rsp->id;
  1323. wmb();
  1324. /* Adjust ring index. */
  1325. req->ring_index++;
  1326. if (req->ring_index == req->length) {
  1327. req->ring_index = 0;
  1328. req->ring_ptr = req->ring;
  1329. } else
  1330. req->ring_ptr++;
  1331. sp->flags |= SRB_DMA_VALID;
  1332. /* Set chip new ring index. */
  1333. WRT_REG_DWORD(req->req_q_in, req->ring_index);
  1334. RD_REG_DWORD_RELAXED(&ha->iobase->isp24.hccr);
  1335. /* Manage unprocessed RIO/ZIO commands in response queue. */
  1336. if (vha->flags.process_response_queue &&
  1337. rsp->ring_ptr->signature != RESPONSE_PROCESSED)
  1338. qla24xx_process_response_queue(vha, rsp);
  1339. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  1340. return QLA_SUCCESS;
  1341. queuing_error:
  1342. if (tot_dsds)
  1343. scsi_dma_unmap(cmd);
  1344. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  1345. return QLA_FUNCTION_FAILED;
  1346. }
  1347. /**
  1348. * qla24xx_dif_start_scsi() - Send a SCSI command to the ISP
  1349. * @sp: command to send to the ISP
  1350. *
  1351. * Returns non-zero if a failure occurred, else zero.
  1352. */
  1353. int
  1354. qla24xx_dif_start_scsi(srb_t *sp)
  1355. {
  1356. int nseg;
  1357. unsigned long flags;
  1358. uint32_t *clr_ptr;
  1359. uint32_t index;
  1360. uint32_t handle;
  1361. uint16_t cnt;
  1362. uint16_t req_cnt = 0;
  1363. uint16_t tot_dsds;
  1364. uint16_t tot_prot_dsds;
  1365. uint16_t fw_prot_opts = 0;
  1366. struct req_que *req = NULL;
  1367. struct rsp_que *rsp = NULL;
  1368. struct scsi_cmnd *cmd = GET_CMD_SP(sp);
  1369. struct scsi_qla_host *vha = sp->fcport->vha;
  1370. struct qla_hw_data *ha = vha->hw;
  1371. struct cmd_type_crc_2 *cmd_pkt;
  1372. uint32_t status = 0;
  1373. #define QDSS_GOT_Q_SPACE BIT_0
  1374. /* Only process protection or >16 cdb in this routine */
  1375. if (scsi_get_prot_op(cmd) == SCSI_PROT_NORMAL) {
  1376. if (cmd->cmd_len <= 16)
  1377. return qla24xx_start_scsi(sp);
  1378. }
  1379. /* Setup device pointers. */
  1380. qla25xx_set_que(sp, &rsp);
  1381. req = vha->req;
  1382. /* So we know we haven't pci_map'ed anything yet */
  1383. tot_dsds = 0;
  1384. /* Send marker if required */
  1385. if (vha->marker_needed != 0) {
  1386. if (qla2x00_marker(vha, req, rsp, 0, 0, MK_SYNC_ALL) !=
  1387. QLA_SUCCESS)
  1388. return QLA_FUNCTION_FAILED;
  1389. vha->marker_needed = 0;
  1390. }
  1391. /* Acquire ring specific lock */
  1392. spin_lock_irqsave(&ha->hardware_lock, flags);
  1393. /* Check for room in outstanding command list. */
  1394. handle = req->current_outstanding_cmd;
  1395. for (index = 1; index < req->num_outstanding_cmds; index++) {
  1396. handle++;
  1397. if (handle == req->num_outstanding_cmds)
  1398. handle = 1;
  1399. if (!req->outstanding_cmds[handle])
  1400. break;
  1401. }
  1402. if (index == req->num_outstanding_cmds)
  1403. goto queuing_error;
  1404. /* Compute number of required data segments */
  1405. /* Map the sg table so we have an accurate count of sg entries needed */
  1406. if (scsi_sg_count(cmd)) {
  1407. nseg = dma_map_sg(&ha->pdev->dev, scsi_sglist(cmd),
  1408. scsi_sg_count(cmd), cmd->sc_data_direction);
  1409. if (unlikely(!nseg))
  1410. goto queuing_error;
  1411. else
  1412. sp->flags |= SRB_DMA_VALID;
  1413. if ((scsi_get_prot_op(cmd) == SCSI_PROT_READ_INSERT) ||
  1414. (scsi_get_prot_op(cmd) == SCSI_PROT_WRITE_STRIP)) {
  1415. struct qla2_sgx sgx;
  1416. uint32_t partial;
  1417. memset(&sgx, 0, sizeof(struct qla2_sgx));
  1418. sgx.tot_bytes = scsi_bufflen(cmd);
  1419. sgx.cur_sg = scsi_sglist(cmd);
  1420. sgx.sp = sp;
  1421. nseg = 0;
  1422. while (qla24xx_get_one_block_sg(
  1423. cmd->device->sector_size, &sgx, &partial))
  1424. nseg++;
  1425. }
  1426. } else
  1427. nseg = 0;
  1428. /* number of required data segments */
  1429. tot_dsds = nseg;
  1430. /* Compute number of required protection segments */
  1431. if (qla24xx_configure_prot_mode(sp, &fw_prot_opts)) {
  1432. nseg = dma_map_sg(&ha->pdev->dev, scsi_prot_sglist(cmd),
  1433. scsi_prot_sg_count(cmd), cmd->sc_data_direction);
  1434. if (unlikely(!nseg))
  1435. goto queuing_error;
  1436. else
  1437. sp->flags |= SRB_CRC_PROT_DMA_VALID;
  1438. if ((scsi_get_prot_op(cmd) == SCSI_PROT_READ_INSERT) ||
  1439. (scsi_get_prot_op(cmd) == SCSI_PROT_WRITE_STRIP)) {
  1440. nseg = scsi_bufflen(cmd) / cmd->device->sector_size;
  1441. }
  1442. } else {
  1443. nseg = 0;
  1444. }
  1445. req_cnt = 1;
  1446. /* Total Data and protection sg segment(s) */
  1447. tot_prot_dsds = nseg;
  1448. tot_dsds += nseg;
  1449. if (req->cnt < (req_cnt + 2)) {
  1450. cnt = RD_REG_DWORD_RELAXED(req->req_q_out);
  1451. if (req->ring_index < cnt)
  1452. req->cnt = cnt - req->ring_index;
  1453. else
  1454. req->cnt = req->length -
  1455. (req->ring_index - cnt);
  1456. if (req->cnt < (req_cnt + 2))
  1457. goto queuing_error;
  1458. }
  1459. status |= QDSS_GOT_Q_SPACE;
  1460. /* Build header part of command packet (excluding the OPCODE). */
  1461. req->current_outstanding_cmd = handle;
  1462. req->outstanding_cmds[handle] = sp;
  1463. sp->handle = handle;
  1464. cmd->host_scribble = (unsigned char *)(unsigned long)handle;
  1465. req->cnt -= req_cnt;
  1466. /* Fill-in common area */
  1467. cmd_pkt = (struct cmd_type_crc_2 *)req->ring_ptr;
  1468. cmd_pkt->handle = MAKE_HANDLE(req->id, handle);
  1469. clr_ptr = (uint32_t *)cmd_pkt + 2;
  1470. memset(clr_ptr, 0, REQUEST_ENTRY_SIZE - 8);
  1471. /* Set NPORT-ID and LUN number*/
  1472. cmd_pkt->nport_handle = cpu_to_le16(sp->fcport->loop_id);
  1473. cmd_pkt->port_id[0] = sp->fcport->d_id.b.al_pa;
  1474. cmd_pkt->port_id[1] = sp->fcport->d_id.b.area;
  1475. cmd_pkt->port_id[2] = sp->fcport->d_id.b.domain;
  1476. int_to_scsilun(cmd->device->lun, &cmd_pkt->lun);
  1477. host_to_fcp_swap((uint8_t *)&cmd_pkt->lun, sizeof(cmd_pkt->lun));
  1478. /* Total Data and protection segment(s) */
  1479. cmd_pkt->dseg_count = cpu_to_le16(tot_dsds);
  1480. /* Build IOCB segments and adjust for data protection segments */
  1481. if (qla24xx_build_scsi_crc_2_iocbs(sp, (struct cmd_type_crc_2 *)
  1482. req->ring_ptr, tot_dsds, tot_prot_dsds, fw_prot_opts) !=
  1483. QLA_SUCCESS)
  1484. goto queuing_error;
  1485. cmd_pkt->entry_count = (uint8_t)req_cnt;
  1486. /* Specify response queue number where completion should happen */
  1487. cmd_pkt->entry_status = (uint8_t) rsp->id;
  1488. cmd_pkt->timeout = __constant_cpu_to_le16(0);
  1489. wmb();
  1490. /* Adjust ring index. */
  1491. req->ring_index++;
  1492. if (req->ring_index == req->length) {
  1493. req->ring_index = 0;
  1494. req->ring_ptr = req->ring;
  1495. } else
  1496. req->ring_ptr++;
  1497. /* Set chip new ring index. */
  1498. WRT_REG_DWORD(req->req_q_in, req->ring_index);
  1499. RD_REG_DWORD_RELAXED(&ha->iobase->isp24.hccr);
  1500. /* Manage unprocessed RIO/ZIO commands in response queue. */
  1501. if (vha->flags.process_response_queue &&
  1502. rsp->ring_ptr->signature != RESPONSE_PROCESSED)
  1503. qla24xx_process_response_queue(vha, rsp);
  1504. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  1505. return QLA_SUCCESS;
  1506. queuing_error:
  1507. if (status & QDSS_GOT_Q_SPACE) {
  1508. req->outstanding_cmds[handle] = NULL;
  1509. req->cnt += req_cnt;
  1510. }
  1511. /* Cleanup will be performed by the caller (queuecommand) */
  1512. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  1513. return QLA_FUNCTION_FAILED;
  1514. }
  1515. static void qla25xx_set_que(srb_t *sp, struct rsp_que **rsp)
  1516. {
  1517. struct scsi_cmnd *cmd = GET_CMD_SP(sp);
  1518. struct qla_hw_data *ha = sp->fcport->vha->hw;
  1519. int affinity = cmd->request->cpu;
  1520. if (ha->flags.cpu_affinity_enabled && affinity >= 0 &&
  1521. affinity < ha->max_rsp_queues - 1)
  1522. *rsp = ha->rsp_q_map[affinity + 1];
  1523. else
  1524. *rsp = ha->rsp_q_map[0];
  1525. }
  1526. /* Generic Control-SRB manipulation functions. */
  1527. void *
  1528. qla2x00_alloc_iocbs(scsi_qla_host_t *vha, srb_t *sp)
  1529. {
  1530. struct qla_hw_data *ha = vha->hw;
  1531. struct req_que *req = ha->req_q_map[0];
  1532. device_reg_t __iomem *reg = ISP_QUE_REG(ha, req->id);
  1533. uint32_t index, handle;
  1534. request_t *pkt;
  1535. uint16_t cnt, req_cnt;
  1536. pkt = NULL;
  1537. req_cnt = 1;
  1538. handle = 0;
  1539. if (!sp)
  1540. goto skip_cmd_array;
  1541. /* Check for room in outstanding command list. */
  1542. handle = req->current_outstanding_cmd;
  1543. for (index = 1; req->num_outstanding_cmds; index++) {
  1544. handle++;
  1545. if (handle == req->num_outstanding_cmds)
  1546. handle = 1;
  1547. if (!req->outstanding_cmds[handle])
  1548. break;
  1549. }
  1550. if (index == req->num_outstanding_cmds) {
  1551. ql_log(ql_log_warn, vha, 0x700b,
  1552. "No room on outstanding cmd array.\n");
  1553. goto queuing_error;
  1554. }
  1555. /* Prep command array. */
  1556. req->current_outstanding_cmd = handle;
  1557. req->outstanding_cmds[handle] = sp;
  1558. sp->handle = handle;
  1559. /* Adjust entry-counts as needed. */
  1560. if (sp->type != SRB_SCSI_CMD)
  1561. req_cnt = sp->iocbs;
  1562. skip_cmd_array:
  1563. /* Check for room on request queue. */
  1564. if (req->cnt < req_cnt) {
  1565. if (ha->mqenable || IS_QLA83XX(ha))
  1566. cnt = RD_REG_DWORD(&reg->isp25mq.req_q_out);
  1567. else if (IS_QLA82XX(ha))
  1568. cnt = RD_REG_DWORD(&reg->isp82.req_q_out);
  1569. else if (IS_FWI2_CAPABLE(ha))
  1570. cnt = RD_REG_DWORD(&reg->isp24.req_q_out);
  1571. else if (IS_QLAFX00(ha))
  1572. cnt = RD_REG_DWORD(&reg->ispfx00.req_q_out);
  1573. else
  1574. cnt = qla2x00_debounce_register(
  1575. ISP_REQ_Q_OUT(ha, &reg->isp));
  1576. if (req->ring_index < cnt)
  1577. req->cnt = cnt - req->ring_index;
  1578. else
  1579. req->cnt = req->length -
  1580. (req->ring_index - cnt);
  1581. }
  1582. if (req->cnt < req_cnt)
  1583. goto queuing_error;
  1584. /* Prep packet */
  1585. req->cnt -= req_cnt;
  1586. pkt = req->ring_ptr;
  1587. memset(pkt, 0, REQUEST_ENTRY_SIZE);
  1588. if (IS_QLAFX00(ha)) {
  1589. WRT_REG_BYTE((void __iomem *)&pkt->entry_count, req_cnt);
  1590. WRT_REG_WORD((void __iomem *)&pkt->handle, handle);
  1591. } else {
  1592. pkt->entry_count = req_cnt;
  1593. pkt->handle = handle;
  1594. }
  1595. queuing_error:
  1596. return pkt;
  1597. }
  1598. static void
  1599. qla24xx_login_iocb(srb_t *sp, struct logio_entry_24xx *logio)
  1600. {
  1601. struct srb_iocb *lio = &sp->u.iocb_cmd;
  1602. logio->entry_type = LOGINOUT_PORT_IOCB_TYPE;
  1603. logio->control_flags = cpu_to_le16(LCF_COMMAND_PLOGI);
  1604. if (lio->u.logio.flags & SRB_LOGIN_COND_PLOGI)
  1605. logio->control_flags |= cpu_to_le16(LCF_COND_PLOGI);
  1606. if (lio->u.logio.flags & SRB_LOGIN_SKIP_PRLI)
  1607. logio->control_flags |= cpu_to_le16(LCF_SKIP_PRLI);
  1608. logio->nport_handle = cpu_to_le16(sp->fcport->loop_id);
  1609. logio->port_id[0] = sp->fcport->d_id.b.al_pa;
  1610. logio->port_id[1] = sp->fcport->d_id.b.area;
  1611. logio->port_id[2] = sp->fcport->d_id.b.domain;
  1612. logio->vp_index = sp->fcport->vha->vp_idx;
  1613. }
  1614. static void
  1615. qla2x00_login_iocb(srb_t *sp, struct mbx_entry *mbx)
  1616. {
  1617. struct qla_hw_data *ha = sp->fcport->vha->hw;
  1618. struct srb_iocb *lio = &sp->u.iocb_cmd;
  1619. uint16_t opts;
  1620. mbx->entry_type = MBX_IOCB_TYPE;
  1621. SET_TARGET_ID(ha, mbx->loop_id, sp->fcport->loop_id);
  1622. mbx->mb0 = cpu_to_le16(MBC_LOGIN_FABRIC_PORT);
  1623. opts = lio->u.logio.flags & SRB_LOGIN_COND_PLOGI ? BIT_0 : 0;
  1624. opts |= lio->u.logio.flags & SRB_LOGIN_SKIP_PRLI ? BIT_1 : 0;
  1625. if (HAS_EXTENDED_IDS(ha)) {
  1626. mbx->mb1 = cpu_to_le16(sp->fcport->loop_id);
  1627. mbx->mb10 = cpu_to_le16(opts);
  1628. } else {
  1629. mbx->mb1 = cpu_to_le16((sp->fcport->loop_id << 8) | opts);
  1630. }
  1631. mbx->mb2 = cpu_to_le16(sp->fcport->d_id.b.domain);
  1632. mbx->mb3 = cpu_to_le16(sp->fcport->d_id.b.area << 8 |
  1633. sp->fcport->d_id.b.al_pa);
  1634. mbx->mb9 = cpu_to_le16(sp->fcport->vha->vp_idx);
  1635. }
  1636. static void
  1637. qla24xx_logout_iocb(srb_t *sp, struct logio_entry_24xx *logio)
  1638. {
  1639. logio->entry_type = LOGINOUT_PORT_IOCB_TYPE;
  1640. logio->control_flags =
  1641. cpu_to_le16(LCF_COMMAND_LOGO|LCF_IMPL_LOGO);
  1642. logio->nport_handle = cpu_to_le16(sp->fcport->loop_id);
  1643. logio->port_id[0] = sp->fcport->d_id.b.al_pa;
  1644. logio->port_id[1] = sp->fcport->d_id.b.area;
  1645. logio->port_id[2] = sp->fcport->d_id.b.domain;
  1646. logio->vp_index = sp->fcport->vha->vp_idx;
  1647. }
  1648. static void
  1649. qla2x00_logout_iocb(srb_t *sp, struct mbx_entry *mbx)
  1650. {
  1651. struct qla_hw_data *ha = sp->fcport->vha->hw;
  1652. mbx->entry_type = MBX_IOCB_TYPE;
  1653. SET_TARGET_ID(ha, mbx->loop_id, sp->fcport->loop_id);
  1654. mbx->mb0 = cpu_to_le16(MBC_LOGOUT_FABRIC_PORT);
  1655. mbx->mb1 = HAS_EXTENDED_IDS(ha) ?
  1656. cpu_to_le16(sp->fcport->loop_id):
  1657. cpu_to_le16(sp->fcport->loop_id << 8);
  1658. mbx->mb2 = cpu_to_le16(sp->fcport->d_id.b.domain);
  1659. mbx->mb3 = cpu_to_le16(sp->fcport->d_id.b.area << 8 |
  1660. sp->fcport->d_id.b.al_pa);
  1661. mbx->mb9 = cpu_to_le16(sp->fcport->vha->vp_idx);
  1662. /* Implicit: mbx->mbx10 = 0. */
  1663. }
  1664. static void
  1665. qla24xx_adisc_iocb(srb_t *sp, struct logio_entry_24xx *logio)
  1666. {
  1667. logio->entry_type = LOGINOUT_PORT_IOCB_TYPE;
  1668. logio->control_flags = cpu_to_le16(LCF_COMMAND_ADISC);
  1669. logio->nport_handle = cpu_to_le16(sp->fcport->loop_id);
  1670. logio->vp_index = sp->fcport->vha->vp_idx;
  1671. }
  1672. static void
  1673. qla2x00_adisc_iocb(srb_t *sp, struct mbx_entry *mbx)
  1674. {
  1675. struct qla_hw_data *ha = sp->fcport->vha->hw;
  1676. mbx->entry_type = MBX_IOCB_TYPE;
  1677. SET_TARGET_ID(ha, mbx->loop_id, sp->fcport->loop_id);
  1678. mbx->mb0 = cpu_to_le16(MBC_GET_PORT_DATABASE);
  1679. if (HAS_EXTENDED_IDS(ha)) {
  1680. mbx->mb1 = cpu_to_le16(sp->fcport->loop_id);
  1681. mbx->mb10 = cpu_to_le16(BIT_0);
  1682. } else {
  1683. mbx->mb1 = cpu_to_le16((sp->fcport->loop_id << 8) | BIT_0);
  1684. }
  1685. mbx->mb2 = cpu_to_le16(MSW(ha->async_pd_dma));
  1686. mbx->mb3 = cpu_to_le16(LSW(ha->async_pd_dma));
  1687. mbx->mb6 = cpu_to_le16(MSW(MSD(ha->async_pd_dma)));
  1688. mbx->mb7 = cpu_to_le16(LSW(MSD(ha->async_pd_dma)));
  1689. mbx->mb9 = cpu_to_le16(sp->fcport->vha->vp_idx);
  1690. }
  1691. static void
  1692. qla24xx_tm_iocb(srb_t *sp, struct tsk_mgmt_entry *tsk)
  1693. {
  1694. uint32_t flags;
  1695. unsigned int lun;
  1696. struct fc_port *fcport = sp->fcport;
  1697. scsi_qla_host_t *vha = fcport->vha;
  1698. struct qla_hw_data *ha = vha->hw;
  1699. struct srb_iocb *iocb = &sp->u.iocb_cmd;
  1700. struct req_que *req = vha->req;
  1701. flags = iocb->u.tmf.flags;
  1702. lun = iocb->u.tmf.lun;
  1703. tsk->entry_type = TSK_MGMT_IOCB_TYPE;
  1704. tsk->entry_count = 1;
  1705. tsk->handle = MAKE_HANDLE(req->id, tsk->handle);
  1706. tsk->nport_handle = cpu_to_le16(fcport->loop_id);
  1707. tsk->timeout = cpu_to_le16(ha->r_a_tov / 10 * 2);
  1708. tsk->control_flags = cpu_to_le32(flags);
  1709. tsk->port_id[0] = fcport->d_id.b.al_pa;
  1710. tsk->port_id[1] = fcport->d_id.b.area;
  1711. tsk->port_id[2] = fcport->d_id.b.domain;
  1712. tsk->vp_index = fcport->vha->vp_idx;
  1713. if (flags == TCF_LUN_RESET) {
  1714. int_to_scsilun(lun, &tsk->lun);
  1715. host_to_fcp_swap((uint8_t *)&tsk->lun,
  1716. sizeof(tsk->lun));
  1717. }
  1718. }
  1719. static void
  1720. qla24xx_els_iocb(srb_t *sp, struct els_entry_24xx *els_iocb)
  1721. {
  1722. struct fc_bsg_job *bsg_job = sp->u.bsg_job;
  1723. els_iocb->entry_type = ELS_IOCB_TYPE;
  1724. els_iocb->entry_count = 1;
  1725. els_iocb->sys_define = 0;
  1726. els_iocb->entry_status = 0;
  1727. els_iocb->handle = sp->handle;
  1728. els_iocb->nport_handle = cpu_to_le16(sp->fcport->loop_id);
  1729. els_iocb->tx_dsd_count = __constant_cpu_to_le16(bsg_job->request_payload.sg_cnt);
  1730. els_iocb->vp_index = sp->fcport->vha->vp_idx;
  1731. els_iocb->sof_type = EST_SOFI3;
  1732. els_iocb->rx_dsd_count = __constant_cpu_to_le16(bsg_job->reply_payload.sg_cnt);
  1733. els_iocb->opcode =
  1734. sp->type == SRB_ELS_CMD_RPT ?
  1735. bsg_job->request->rqst_data.r_els.els_code :
  1736. bsg_job->request->rqst_data.h_els.command_code;
  1737. els_iocb->port_id[0] = sp->fcport->d_id.b.al_pa;
  1738. els_iocb->port_id[1] = sp->fcport->d_id.b.area;
  1739. els_iocb->port_id[2] = sp->fcport->d_id.b.domain;
  1740. els_iocb->control_flags = 0;
  1741. els_iocb->rx_byte_count =
  1742. cpu_to_le32(bsg_job->reply_payload.payload_len);
  1743. els_iocb->tx_byte_count =
  1744. cpu_to_le32(bsg_job->request_payload.payload_len);
  1745. els_iocb->tx_address[0] = cpu_to_le32(LSD(sg_dma_address
  1746. (bsg_job->request_payload.sg_list)));
  1747. els_iocb->tx_address[1] = cpu_to_le32(MSD(sg_dma_address
  1748. (bsg_job->request_payload.sg_list)));
  1749. els_iocb->tx_len = cpu_to_le32(sg_dma_len
  1750. (bsg_job->request_payload.sg_list));
  1751. els_iocb->rx_address[0] = cpu_to_le32(LSD(sg_dma_address
  1752. (bsg_job->reply_payload.sg_list)));
  1753. els_iocb->rx_address[1] = cpu_to_le32(MSD(sg_dma_address
  1754. (bsg_job->reply_payload.sg_list)));
  1755. els_iocb->rx_len = cpu_to_le32(sg_dma_len
  1756. (bsg_job->reply_payload.sg_list));
  1757. }
  1758. static void
  1759. qla2x00_ct_iocb(srb_t *sp, ms_iocb_entry_t *ct_iocb)
  1760. {
  1761. uint16_t avail_dsds;
  1762. uint32_t *cur_dsd;
  1763. struct scatterlist *sg;
  1764. int index;
  1765. uint16_t tot_dsds;
  1766. scsi_qla_host_t *vha = sp->fcport->vha;
  1767. struct qla_hw_data *ha = vha->hw;
  1768. struct fc_bsg_job *bsg_job = sp->u.bsg_job;
  1769. int loop_iterartion = 0;
  1770. int cont_iocb_prsnt = 0;
  1771. int entry_count = 1;
  1772. memset(ct_iocb, 0, sizeof(ms_iocb_entry_t));
  1773. ct_iocb->entry_type = CT_IOCB_TYPE;
  1774. ct_iocb->entry_status = 0;
  1775. ct_iocb->handle1 = sp->handle;
  1776. SET_TARGET_ID(ha, ct_iocb->loop_id, sp->fcport->loop_id);
  1777. ct_iocb->status = __constant_cpu_to_le16(0);
  1778. ct_iocb->control_flags = __constant_cpu_to_le16(0);
  1779. ct_iocb->timeout = 0;
  1780. ct_iocb->cmd_dsd_count =
  1781. __constant_cpu_to_le16(bsg_job->request_payload.sg_cnt);
  1782. ct_iocb->total_dsd_count =
  1783. __constant_cpu_to_le16(bsg_job->request_payload.sg_cnt + 1);
  1784. ct_iocb->req_bytecount =
  1785. cpu_to_le32(bsg_job->request_payload.payload_len);
  1786. ct_iocb->rsp_bytecount =
  1787. cpu_to_le32(bsg_job->reply_payload.payload_len);
  1788. ct_iocb->dseg_req_address[0] = cpu_to_le32(LSD(sg_dma_address
  1789. (bsg_job->request_payload.sg_list)));
  1790. ct_iocb->dseg_req_address[1] = cpu_to_le32(MSD(sg_dma_address
  1791. (bsg_job->request_payload.sg_list)));
  1792. ct_iocb->dseg_req_length = ct_iocb->req_bytecount;
  1793. ct_iocb->dseg_rsp_address[0] = cpu_to_le32(LSD(sg_dma_address
  1794. (bsg_job->reply_payload.sg_list)));
  1795. ct_iocb->dseg_rsp_address[1] = cpu_to_le32(MSD(sg_dma_address
  1796. (bsg_job->reply_payload.sg_list)));
  1797. ct_iocb->dseg_rsp_length = ct_iocb->rsp_bytecount;
  1798. avail_dsds = 1;
  1799. cur_dsd = (uint32_t *)ct_iocb->dseg_rsp_address;
  1800. index = 0;
  1801. tot_dsds = bsg_job->reply_payload.sg_cnt;
  1802. for_each_sg(bsg_job->reply_payload.sg_list, sg, tot_dsds, index) {
  1803. dma_addr_t sle_dma;
  1804. cont_a64_entry_t *cont_pkt;
  1805. /* Allocate additional continuation packets? */
  1806. if (avail_dsds == 0) {
  1807. /*
  1808. * Five DSDs are available in the Cont.
  1809. * Type 1 IOCB.
  1810. */
  1811. cont_pkt = qla2x00_prep_cont_type1_iocb(vha,
  1812. vha->hw->req_q_map[0]);
  1813. cur_dsd = (uint32_t *) cont_pkt->dseg_0_address;
  1814. avail_dsds = 5;
  1815. cont_iocb_prsnt = 1;
  1816. entry_count++;
  1817. }
  1818. sle_dma = sg_dma_address(sg);
  1819. *cur_dsd++ = cpu_to_le32(LSD(sle_dma));
  1820. *cur_dsd++ = cpu_to_le32(MSD(sle_dma));
  1821. *cur_dsd++ = cpu_to_le32(sg_dma_len(sg));
  1822. loop_iterartion++;
  1823. avail_dsds--;
  1824. }
  1825. ct_iocb->entry_count = entry_count;
  1826. }
  1827. static void
  1828. qla24xx_ct_iocb(srb_t *sp, struct ct_entry_24xx *ct_iocb)
  1829. {
  1830. uint16_t avail_dsds;
  1831. uint32_t *cur_dsd;
  1832. struct scatterlist *sg;
  1833. int index;
  1834. uint16_t tot_dsds;
  1835. scsi_qla_host_t *vha = sp->fcport->vha;
  1836. struct qla_hw_data *ha = vha->hw;
  1837. struct fc_bsg_job *bsg_job = sp->u.bsg_job;
  1838. int loop_iterartion = 0;
  1839. int cont_iocb_prsnt = 0;
  1840. int entry_count = 1;
  1841. ct_iocb->entry_type = CT_IOCB_TYPE;
  1842. ct_iocb->entry_status = 0;
  1843. ct_iocb->sys_define = 0;
  1844. ct_iocb->handle = sp->handle;
  1845. ct_iocb->nport_handle = cpu_to_le16(sp->fcport->loop_id);
  1846. ct_iocb->vp_index = sp->fcport->vha->vp_idx;
  1847. ct_iocb->comp_status = __constant_cpu_to_le16(0);
  1848. ct_iocb->cmd_dsd_count =
  1849. __constant_cpu_to_le16(bsg_job->request_payload.sg_cnt);
  1850. ct_iocb->timeout = 0;
  1851. ct_iocb->rsp_dsd_count =
  1852. __constant_cpu_to_le16(bsg_job->reply_payload.sg_cnt);
  1853. ct_iocb->rsp_byte_count =
  1854. cpu_to_le32(bsg_job->reply_payload.payload_len);
  1855. ct_iocb->cmd_byte_count =
  1856. cpu_to_le32(bsg_job->request_payload.payload_len);
  1857. ct_iocb->dseg_0_address[0] = cpu_to_le32(LSD(sg_dma_address
  1858. (bsg_job->request_payload.sg_list)));
  1859. ct_iocb->dseg_0_address[1] = cpu_to_le32(MSD(sg_dma_address
  1860. (bsg_job->request_payload.sg_list)));
  1861. ct_iocb->dseg_0_len = cpu_to_le32(sg_dma_len
  1862. (bsg_job->request_payload.sg_list));
  1863. avail_dsds = 1;
  1864. cur_dsd = (uint32_t *)ct_iocb->dseg_1_address;
  1865. index = 0;
  1866. tot_dsds = bsg_job->reply_payload.sg_cnt;
  1867. for_each_sg(bsg_job->reply_payload.sg_list, sg, tot_dsds, index) {
  1868. dma_addr_t sle_dma;
  1869. cont_a64_entry_t *cont_pkt;
  1870. /* Allocate additional continuation packets? */
  1871. if (avail_dsds == 0) {
  1872. /*
  1873. * Five DSDs are available in the Cont.
  1874. * Type 1 IOCB.
  1875. */
  1876. cont_pkt = qla2x00_prep_cont_type1_iocb(vha,
  1877. ha->req_q_map[0]);
  1878. cur_dsd = (uint32_t *) cont_pkt->dseg_0_address;
  1879. avail_dsds = 5;
  1880. cont_iocb_prsnt = 1;
  1881. entry_count++;
  1882. }
  1883. sle_dma = sg_dma_address(sg);
  1884. *cur_dsd++ = cpu_to_le32(LSD(sle_dma));
  1885. *cur_dsd++ = cpu_to_le32(MSD(sle_dma));
  1886. *cur_dsd++ = cpu_to_le32(sg_dma_len(sg));
  1887. loop_iterartion++;
  1888. avail_dsds--;
  1889. }
  1890. ct_iocb->entry_count = entry_count;
  1891. }
  1892. /*
  1893. * qla82xx_start_scsi() - Send a SCSI command to the ISP
  1894. * @sp: command to send to the ISP
  1895. *
  1896. * Returns non-zero if a failure occurred, else zero.
  1897. */
  1898. int
  1899. qla82xx_start_scsi(srb_t *sp)
  1900. {
  1901. int ret, nseg;
  1902. unsigned long flags;
  1903. struct scsi_cmnd *cmd;
  1904. uint32_t *clr_ptr;
  1905. uint32_t index;
  1906. uint32_t handle;
  1907. uint16_t cnt;
  1908. uint16_t req_cnt;
  1909. uint16_t tot_dsds;
  1910. struct device_reg_82xx __iomem *reg;
  1911. uint32_t dbval;
  1912. uint32_t *fcp_dl;
  1913. uint8_t additional_cdb_len;
  1914. struct ct6_dsd *ctx;
  1915. struct scsi_qla_host *vha = sp->fcport->vha;
  1916. struct qla_hw_data *ha = vha->hw;
  1917. struct req_que *req = NULL;
  1918. struct rsp_que *rsp = NULL;
  1919. char tag[2];
  1920. /* Setup device pointers. */
  1921. ret = 0;
  1922. reg = &ha->iobase->isp82;
  1923. cmd = GET_CMD_SP(sp);
  1924. req = vha->req;
  1925. rsp = ha->rsp_q_map[0];
  1926. /* So we know we haven't pci_map'ed anything yet */
  1927. tot_dsds = 0;
  1928. dbval = 0x04 | (ha->portnum << 5);
  1929. /* Send marker if required */
  1930. if (vha->marker_needed != 0) {
  1931. if (qla2x00_marker(vha, req,
  1932. rsp, 0, 0, MK_SYNC_ALL) != QLA_SUCCESS) {
  1933. ql_log(ql_log_warn, vha, 0x300c,
  1934. "qla2x00_marker failed for cmd=%p.\n", cmd);
  1935. return QLA_FUNCTION_FAILED;
  1936. }
  1937. vha->marker_needed = 0;
  1938. }
  1939. /* Acquire ring specific lock */
  1940. spin_lock_irqsave(&ha->hardware_lock, flags);
  1941. /* Check for room in outstanding command list. */
  1942. handle = req->current_outstanding_cmd;
  1943. for (index = 1; index < req->num_outstanding_cmds; index++) {
  1944. handle++;
  1945. if (handle == req->num_outstanding_cmds)
  1946. handle = 1;
  1947. if (!req->outstanding_cmds[handle])
  1948. break;
  1949. }
  1950. if (index == req->num_outstanding_cmds)
  1951. goto queuing_error;
  1952. /* Map the sg table so we have an accurate count of sg entries needed */
  1953. if (scsi_sg_count(cmd)) {
  1954. nseg = dma_map_sg(&ha->pdev->dev, scsi_sglist(cmd),
  1955. scsi_sg_count(cmd), cmd->sc_data_direction);
  1956. if (unlikely(!nseg))
  1957. goto queuing_error;
  1958. } else
  1959. nseg = 0;
  1960. tot_dsds = nseg;
  1961. if (tot_dsds > ql2xshiftctondsd) {
  1962. struct cmd_type_6 *cmd_pkt;
  1963. uint16_t more_dsd_lists = 0;
  1964. struct dsd_dma *dsd_ptr;
  1965. uint16_t i;
  1966. more_dsd_lists = qla24xx_calc_dsd_lists(tot_dsds);
  1967. if ((more_dsd_lists + ha->gbl_dsd_inuse) >= NUM_DSD_CHAIN) {
  1968. ql_dbg(ql_dbg_io, vha, 0x300d,
  1969. "Num of DSD list %d is than %d for cmd=%p.\n",
  1970. more_dsd_lists + ha->gbl_dsd_inuse, NUM_DSD_CHAIN,
  1971. cmd);
  1972. goto queuing_error;
  1973. }
  1974. if (more_dsd_lists <= ha->gbl_dsd_avail)
  1975. goto sufficient_dsds;
  1976. else
  1977. more_dsd_lists -= ha->gbl_dsd_avail;
  1978. for (i = 0; i < more_dsd_lists; i++) {
  1979. dsd_ptr = kzalloc(sizeof(struct dsd_dma), GFP_ATOMIC);
  1980. if (!dsd_ptr) {
  1981. ql_log(ql_log_fatal, vha, 0x300e,
  1982. "Failed to allocate memory for dsd_dma "
  1983. "for cmd=%p.\n", cmd);
  1984. goto queuing_error;
  1985. }
  1986. dsd_ptr->dsd_addr = dma_pool_alloc(ha->dl_dma_pool,
  1987. GFP_ATOMIC, &dsd_ptr->dsd_list_dma);
  1988. if (!dsd_ptr->dsd_addr) {
  1989. kfree(dsd_ptr);
  1990. ql_log(ql_log_fatal, vha, 0x300f,
  1991. "Failed to allocate memory for dsd_addr "
  1992. "for cmd=%p.\n", cmd);
  1993. goto queuing_error;
  1994. }
  1995. list_add_tail(&dsd_ptr->list, &ha->gbl_dsd_list);
  1996. ha->gbl_dsd_avail++;
  1997. }
  1998. sufficient_dsds:
  1999. req_cnt = 1;
  2000. if (req->cnt < (req_cnt + 2)) {
  2001. cnt = (uint16_t)RD_REG_DWORD_RELAXED(
  2002. &reg->req_q_out[0]);
  2003. if (req->ring_index < cnt)
  2004. req->cnt = cnt - req->ring_index;
  2005. else
  2006. req->cnt = req->length -
  2007. (req->ring_index - cnt);
  2008. if (req->cnt < (req_cnt + 2))
  2009. goto queuing_error;
  2010. }
  2011. ctx = sp->u.scmd.ctx =
  2012. mempool_alloc(ha->ctx_mempool, GFP_ATOMIC);
  2013. if (!ctx) {
  2014. ql_log(ql_log_fatal, vha, 0x3010,
  2015. "Failed to allocate ctx for cmd=%p.\n", cmd);
  2016. goto queuing_error;
  2017. }
  2018. memset(ctx, 0, sizeof(struct ct6_dsd));
  2019. ctx->fcp_cmnd = dma_pool_alloc(ha->fcp_cmnd_dma_pool,
  2020. GFP_ATOMIC, &ctx->fcp_cmnd_dma);
  2021. if (!ctx->fcp_cmnd) {
  2022. ql_log(ql_log_fatal, vha, 0x3011,
  2023. "Failed to allocate fcp_cmnd for cmd=%p.\n", cmd);
  2024. goto queuing_error;
  2025. }
  2026. /* Initialize the DSD list and dma handle */
  2027. INIT_LIST_HEAD(&ctx->dsd_list);
  2028. ctx->dsd_use_cnt = 0;
  2029. if (cmd->cmd_len > 16) {
  2030. additional_cdb_len = cmd->cmd_len - 16;
  2031. if ((cmd->cmd_len % 4) != 0) {
  2032. /* SCSI command bigger than 16 bytes must be
  2033. * multiple of 4
  2034. */
  2035. ql_log(ql_log_warn, vha, 0x3012,
  2036. "scsi cmd len %d not multiple of 4 "
  2037. "for cmd=%p.\n", cmd->cmd_len, cmd);
  2038. goto queuing_error_fcp_cmnd;
  2039. }
  2040. ctx->fcp_cmnd_len = 12 + cmd->cmd_len + 4;
  2041. } else {
  2042. additional_cdb_len = 0;
  2043. ctx->fcp_cmnd_len = 12 + 16 + 4;
  2044. }
  2045. cmd_pkt = (struct cmd_type_6 *)req->ring_ptr;
  2046. cmd_pkt->handle = MAKE_HANDLE(req->id, handle);
  2047. /* Zero out remaining portion of packet. */
  2048. /* tagged queuing modifier -- default is TSK_SIMPLE (0). */
  2049. clr_ptr = (uint32_t *)cmd_pkt + 2;
  2050. memset(clr_ptr, 0, REQUEST_ENTRY_SIZE - 8);
  2051. cmd_pkt->dseg_count = cpu_to_le16(tot_dsds);
  2052. /* Set NPORT-ID and LUN number*/
  2053. cmd_pkt->nport_handle = cpu_to_le16(sp->fcport->loop_id);
  2054. cmd_pkt->port_id[0] = sp->fcport->d_id.b.al_pa;
  2055. cmd_pkt->port_id[1] = sp->fcport->d_id.b.area;
  2056. cmd_pkt->port_id[2] = sp->fcport->d_id.b.domain;
  2057. cmd_pkt->vp_index = sp->fcport->vha->vp_idx;
  2058. /* Build IOCB segments */
  2059. if (qla24xx_build_scsi_type_6_iocbs(sp, cmd_pkt, tot_dsds))
  2060. goto queuing_error_fcp_cmnd;
  2061. int_to_scsilun(cmd->device->lun, &cmd_pkt->lun);
  2062. host_to_fcp_swap((uint8_t *)&cmd_pkt->lun, sizeof(cmd_pkt->lun));
  2063. /* build FCP_CMND IU */
  2064. memset(ctx->fcp_cmnd, 0, sizeof(struct fcp_cmnd));
  2065. int_to_scsilun(cmd->device->lun, &ctx->fcp_cmnd->lun);
  2066. ctx->fcp_cmnd->additional_cdb_len = additional_cdb_len;
  2067. if (cmd->sc_data_direction == DMA_TO_DEVICE)
  2068. ctx->fcp_cmnd->additional_cdb_len |= 1;
  2069. else if (cmd->sc_data_direction == DMA_FROM_DEVICE)
  2070. ctx->fcp_cmnd->additional_cdb_len |= 2;
  2071. /*
  2072. * Update tagged queuing modifier -- default is TSK_SIMPLE (0).
  2073. */
  2074. if (scsi_populate_tag_msg(cmd, tag)) {
  2075. switch (tag[0]) {
  2076. case HEAD_OF_QUEUE_TAG:
  2077. ctx->fcp_cmnd->task_attribute =
  2078. TSK_HEAD_OF_QUEUE;
  2079. break;
  2080. case ORDERED_QUEUE_TAG:
  2081. ctx->fcp_cmnd->task_attribute =
  2082. TSK_ORDERED;
  2083. break;
  2084. }
  2085. }
  2086. /* Populate the FCP_PRIO. */
  2087. if (ha->flags.fcp_prio_enabled)
  2088. ctx->fcp_cmnd->task_attribute |=
  2089. sp->fcport->fcp_prio << 3;
  2090. memcpy(ctx->fcp_cmnd->cdb, cmd->cmnd, cmd->cmd_len);
  2091. fcp_dl = (uint32_t *)(ctx->fcp_cmnd->cdb + 16 +
  2092. additional_cdb_len);
  2093. *fcp_dl = htonl((uint32_t)scsi_bufflen(cmd));
  2094. cmd_pkt->fcp_cmnd_dseg_len = cpu_to_le16(ctx->fcp_cmnd_len);
  2095. cmd_pkt->fcp_cmnd_dseg_address[0] =
  2096. cpu_to_le32(LSD(ctx->fcp_cmnd_dma));
  2097. cmd_pkt->fcp_cmnd_dseg_address[1] =
  2098. cpu_to_le32(MSD(ctx->fcp_cmnd_dma));
  2099. sp->flags |= SRB_FCP_CMND_DMA_VALID;
  2100. cmd_pkt->byte_count = cpu_to_le32((uint32_t)scsi_bufflen(cmd));
  2101. /* Set total data segment count. */
  2102. cmd_pkt->entry_count = (uint8_t)req_cnt;
  2103. /* Specify response queue number where
  2104. * completion should happen
  2105. */
  2106. cmd_pkt->entry_status = (uint8_t) rsp->id;
  2107. } else {
  2108. struct cmd_type_7 *cmd_pkt;
  2109. req_cnt = qla24xx_calc_iocbs(vha, tot_dsds);
  2110. if (req->cnt < (req_cnt + 2)) {
  2111. cnt = (uint16_t)RD_REG_DWORD_RELAXED(
  2112. &reg->req_q_out[0]);
  2113. if (req->ring_index < cnt)
  2114. req->cnt = cnt - req->ring_index;
  2115. else
  2116. req->cnt = req->length -
  2117. (req->ring_index - cnt);
  2118. }
  2119. if (req->cnt < (req_cnt + 2))
  2120. goto queuing_error;
  2121. cmd_pkt = (struct cmd_type_7 *)req->ring_ptr;
  2122. cmd_pkt->handle = MAKE_HANDLE(req->id, handle);
  2123. /* Zero out remaining portion of packet. */
  2124. /* tagged queuing modifier -- default is TSK_SIMPLE (0).*/
  2125. clr_ptr = (uint32_t *)cmd_pkt + 2;
  2126. memset(clr_ptr, 0, REQUEST_ENTRY_SIZE - 8);
  2127. cmd_pkt->dseg_count = cpu_to_le16(tot_dsds);
  2128. /* Set NPORT-ID and LUN number*/
  2129. cmd_pkt->nport_handle = cpu_to_le16(sp->fcport->loop_id);
  2130. cmd_pkt->port_id[0] = sp->fcport->d_id.b.al_pa;
  2131. cmd_pkt->port_id[1] = sp->fcport->d_id.b.area;
  2132. cmd_pkt->port_id[2] = sp->fcport->d_id.b.domain;
  2133. cmd_pkt->vp_index = sp->fcport->vha->vp_idx;
  2134. int_to_scsilun(cmd->device->lun, &cmd_pkt->lun);
  2135. host_to_fcp_swap((uint8_t *)&cmd_pkt->lun,
  2136. sizeof(cmd_pkt->lun));
  2137. /*
  2138. * Update tagged queuing modifier -- default is TSK_SIMPLE (0).
  2139. */
  2140. if (scsi_populate_tag_msg(cmd, tag)) {
  2141. switch (tag[0]) {
  2142. case HEAD_OF_QUEUE_TAG:
  2143. cmd_pkt->task = TSK_HEAD_OF_QUEUE;
  2144. break;
  2145. case ORDERED_QUEUE_TAG:
  2146. cmd_pkt->task = TSK_ORDERED;
  2147. break;
  2148. }
  2149. }
  2150. /* Populate the FCP_PRIO. */
  2151. if (ha->flags.fcp_prio_enabled)
  2152. cmd_pkt->task |= sp->fcport->fcp_prio << 3;
  2153. /* Load SCSI command packet. */
  2154. memcpy(cmd_pkt->fcp_cdb, cmd->cmnd, cmd->cmd_len);
  2155. host_to_fcp_swap(cmd_pkt->fcp_cdb, sizeof(cmd_pkt->fcp_cdb));
  2156. cmd_pkt->byte_count = cpu_to_le32((uint32_t)scsi_bufflen(cmd));
  2157. /* Build IOCB segments */
  2158. qla24xx_build_scsi_iocbs(sp, cmd_pkt, tot_dsds);
  2159. /* Set total data segment count. */
  2160. cmd_pkt->entry_count = (uint8_t)req_cnt;
  2161. /* Specify response queue number where
  2162. * completion should happen.
  2163. */
  2164. cmd_pkt->entry_status = (uint8_t) rsp->id;
  2165. }
  2166. /* Build command packet. */
  2167. req->current_outstanding_cmd = handle;
  2168. req->outstanding_cmds[handle] = sp;
  2169. sp->handle = handle;
  2170. cmd->host_scribble = (unsigned char *)(unsigned long)handle;
  2171. req->cnt -= req_cnt;
  2172. wmb();
  2173. /* Adjust ring index. */
  2174. req->ring_index++;
  2175. if (req->ring_index == req->length) {
  2176. req->ring_index = 0;
  2177. req->ring_ptr = req->ring;
  2178. } else
  2179. req->ring_ptr++;
  2180. sp->flags |= SRB_DMA_VALID;
  2181. /* Set chip new ring index. */
  2182. /* write, read and verify logic */
  2183. dbval = dbval | (req->id << 8) | (req->ring_index << 16);
  2184. if (ql2xdbwr)
  2185. qla82xx_wr_32(ha, ha->nxdb_wr_ptr, dbval);
  2186. else {
  2187. WRT_REG_DWORD(
  2188. (unsigned long __iomem *)ha->nxdb_wr_ptr,
  2189. dbval);
  2190. wmb();
  2191. while (RD_REG_DWORD((void __iomem *)ha->nxdb_rd_ptr) != dbval) {
  2192. WRT_REG_DWORD(
  2193. (unsigned long __iomem *)ha->nxdb_wr_ptr,
  2194. dbval);
  2195. wmb();
  2196. }
  2197. }
  2198. /* Manage unprocessed RIO/ZIO commands in response queue. */
  2199. if (vha->flags.process_response_queue &&
  2200. rsp->ring_ptr->signature != RESPONSE_PROCESSED)
  2201. qla24xx_process_response_queue(vha, rsp);
  2202. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  2203. return QLA_SUCCESS;
  2204. queuing_error_fcp_cmnd:
  2205. dma_pool_free(ha->fcp_cmnd_dma_pool, ctx->fcp_cmnd, ctx->fcp_cmnd_dma);
  2206. queuing_error:
  2207. if (tot_dsds)
  2208. scsi_dma_unmap(cmd);
  2209. if (sp->u.scmd.ctx) {
  2210. mempool_free(sp->u.scmd.ctx, ha->ctx_mempool);
  2211. sp->u.scmd.ctx = NULL;
  2212. }
  2213. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  2214. return QLA_FUNCTION_FAILED;
  2215. }
  2216. int
  2217. qla2x00_start_sp(srb_t *sp)
  2218. {
  2219. int rval;
  2220. struct qla_hw_data *ha = sp->fcport->vha->hw;
  2221. void *pkt;
  2222. unsigned long flags;
  2223. rval = QLA_FUNCTION_FAILED;
  2224. spin_lock_irqsave(&ha->hardware_lock, flags);
  2225. pkt = qla2x00_alloc_iocbs(sp->fcport->vha, sp);
  2226. if (!pkt) {
  2227. ql_log(ql_log_warn, sp->fcport->vha, 0x700c,
  2228. "qla2x00_alloc_iocbs failed.\n");
  2229. goto done;
  2230. }
  2231. rval = QLA_SUCCESS;
  2232. switch (sp->type) {
  2233. case SRB_LOGIN_CMD:
  2234. IS_FWI2_CAPABLE(ha) ?
  2235. qla24xx_login_iocb(sp, pkt) :
  2236. qla2x00_login_iocb(sp, pkt);
  2237. break;
  2238. case SRB_LOGOUT_CMD:
  2239. IS_FWI2_CAPABLE(ha) ?
  2240. qla24xx_logout_iocb(sp, pkt) :
  2241. qla2x00_logout_iocb(sp, pkt);
  2242. break;
  2243. case SRB_ELS_CMD_RPT:
  2244. case SRB_ELS_CMD_HST:
  2245. qla24xx_els_iocb(sp, pkt);
  2246. break;
  2247. case SRB_CT_CMD:
  2248. IS_FWI2_CAPABLE(ha) ?
  2249. qla24xx_ct_iocb(sp, pkt) :
  2250. qla2x00_ct_iocb(sp, pkt);
  2251. break;
  2252. case SRB_ADISC_CMD:
  2253. IS_FWI2_CAPABLE(ha) ?
  2254. qla24xx_adisc_iocb(sp, pkt) :
  2255. qla2x00_adisc_iocb(sp, pkt);
  2256. break;
  2257. case SRB_TM_CMD:
  2258. IS_QLAFX00(ha) ?
  2259. qlafx00_tm_iocb(sp, pkt) :
  2260. qla24xx_tm_iocb(sp, pkt);
  2261. break;
  2262. case SRB_FXIOCB_DCMD:
  2263. case SRB_FXIOCB_BCMD:
  2264. qlafx00_fxdisc_iocb(sp, pkt);
  2265. break;
  2266. case SRB_ABT_CMD:
  2267. qlafx00_abort_iocb(sp, pkt);
  2268. break;
  2269. default:
  2270. break;
  2271. }
  2272. wmb();
  2273. qla2x00_start_iocbs(sp->fcport->vha, ha->req_q_map[0]);
  2274. done:
  2275. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  2276. return rval;
  2277. }
  2278. static void
  2279. qla25xx_build_bidir_iocb(srb_t *sp, struct scsi_qla_host *vha,
  2280. struct cmd_bidir *cmd_pkt, uint32_t tot_dsds)
  2281. {
  2282. uint16_t avail_dsds;
  2283. uint32_t *cur_dsd;
  2284. uint32_t req_data_len = 0;
  2285. uint32_t rsp_data_len = 0;
  2286. struct scatterlist *sg;
  2287. int index;
  2288. int entry_count = 1;
  2289. struct fc_bsg_job *bsg_job = sp->u.bsg_job;
  2290. /*Update entry type to indicate bidir command */
  2291. *((uint32_t *)(&cmd_pkt->entry_type)) =
  2292. __constant_cpu_to_le32(COMMAND_BIDIRECTIONAL);
  2293. /* Set the transfer direction, in this set both flags
  2294. * Also set the BD_WRAP_BACK flag, firmware will take care
  2295. * assigning DID=SID for outgoing pkts.
  2296. */
  2297. cmd_pkt->wr_dseg_count = cpu_to_le16(bsg_job->request_payload.sg_cnt);
  2298. cmd_pkt->rd_dseg_count = cpu_to_le16(bsg_job->reply_payload.sg_cnt);
  2299. cmd_pkt->control_flags =
  2300. __constant_cpu_to_le16(BD_WRITE_DATA | BD_READ_DATA |
  2301. BD_WRAP_BACK);
  2302. req_data_len = rsp_data_len = bsg_job->request_payload.payload_len;
  2303. cmd_pkt->wr_byte_count = cpu_to_le32(req_data_len);
  2304. cmd_pkt->rd_byte_count = cpu_to_le32(rsp_data_len);
  2305. cmd_pkt->timeout = cpu_to_le16(qla2x00_get_async_timeout(vha) + 2);
  2306. vha->bidi_stats.transfer_bytes += req_data_len;
  2307. vha->bidi_stats.io_count++;
  2308. /* Only one dsd is available for bidirectional IOCB, remaining dsds
  2309. * are bundled in continuation iocb
  2310. */
  2311. avail_dsds = 1;
  2312. cur_dsd = (uint32_t *)&cmd_pkt->fcp_data_dseg_address;
  2313. index = 0;
  2314. for_each_sg(bsg_job->request_payload.sg_list, sg,
  2315. bsg_job->request_payload.sg_cnt, index) {
  2316. dma_addr_t sle_dma;
  2317. cont_a64_entry_t *cont_pkt;
  2318. /* Allocate additional continuation packets */
  2319. if (avail_dsds == 0) {
  2320. /* Continuation type 1 IOCB can accomodate
  2321. * 5 DSDS
  2322. */
  2323. cont_pkt = qla2x00_prep_cont_type1_iocb(vha, vha->req);
  2324. cur_dsd = (uint32_t *) cont_pkt->dseg_0_address;
  2325. avail_dsds = 5;
  2326. entry_count++;
  2327. }
  2328. sle_dma = sg_dma_address(sg);
  2329. *cur_dsd++ = cpu_to_le32(LSD(sle_dma));
  2330. *cur_dsd++ = cpu_to_le32(MSD(sle_dma));
  2331. *cur_dsd++ = cpu_to_le32(sg_dma_len(sg));
  2332. avail_dsds--;
  2333. }
  2334. /* For read request DSD will always goes to continuation IOCB
  2335. * and follow the write DSD. If there is room on the current IOCB
  2336. * then it is added to that IOCB else new continuation IOCB is
  2337. * allocated.
  2338. */
  2339. for_each_sg(bsg_job->reply_payload.sg_list, sg,
  2340. bsg_job->reply_payload.sg_cnt, index) {
  2341. dma_addr_t sle_dma;
  2342. cont_a64_entry_t *cont_pkt;
  2343. /* Allocate additional continuation packets */
  2344. if (avail_dsds == 0) {
  2345. /* Continuation type 1 IOCB can accomodate
  2346. * 5 DSDS
  2347. */
  2348. cont_pkt = qla2x00_prep_cont_type1_iocb(vha, vha->req);
  2349. cur_dsd = (uint32_t *) cont_pkt->dseg_0_address;
  2350. avail_dsds = 5;
  2351. entry_count++;
  2352. }
  2353. sle_dma = sg_dma_address(sg);
  2354. *cur_dsd++ = cpu_to_le32(LSD(sle_dma));
  2355. *cur_dsd++ = cpu_to_le32(MSD(sle_dma));
  2356. *cur_dsd++ = cpu_to_le32(sg_dma_len(sg));
  2357. avail_dsds--;
  2358. }
  2359. /* This value should be same as number of IOCB required for this cmd */
  2360. cmd_pkt->entry_count = entry_count;
  2361. }
  2362. int
  2363. qla2x00_start_bidir(srb_t *sp, struct scsi_qla_host *vha, uint32_t tot_dsds)
  2364. {
  2365. struct qla_hw_data *ha = vha->hw;
  2366. unsigned long flags;
  2367. uint32_t handle;
  2368. uint32_t index;
  2369. uint16_t req_cnt;
  2370. uint16_t cnt;
  2371. uint32_t *clr_ptr;
  2372. struct cmd_bidir *cmd_pkt = NULL;
  2373. struct rsp_que *rsp;
  2374. struct req_que *req;
  2375. int rval = EXT_STATUS_OK;
  2376. rval = QLA_SUCCESS;
  2377. rsp = ha->rsp_q_map[0];
  2378. req = vha->req;
  2379. /* Send marker if required */
  2380. if (vha->marker_needed != 0) {
  2381. if (qla2x00_marker(vha, req,
  2382. rsp, 0, 0, MK_SYNC_ALL) != QLA_SUCCESS)
  2383. return EXT_STATUS_MAILBOX;
  2384. vha->marker_needed = 0;
  2385. }
  2386. /* Acquire ring specific lock */
  2387. spin_lock_irqsave(&ha->hardware_lock, flags);
  2388. /* Check for room in outstanding command list. */
  2389. handle = req->current_outstanding_cmd;
  2390. for (index = 1; index < req->num_outstanding_cmds; index++) {
  2391. handle++;
  2392. if (handle == req->num_outstanding_cmds)
  2393. handle = 1;
  2394. if (!req->outstanding_cmds[handle])
  2395. break;
  2396. }
  2397. if (index == req->num_outstanding_cmds) {
  2398. rval = EXT_STATUS_BUSY;
  2399. goto queuing_error;
  2400. }
  2401. /* Calculate number of IOCB required */
  2402. req_cnt = qla24xx_calc_iocbs(vha, tot_dsds);
  2403. /* Check for room on request queue. */
  2404. if (req->cnt < req_cnt + 2) {
  2405. cnt = RD_REG_DWORD_RELAXED(req->req_q_out);
  2406. if (req->ring_index < cnt)
  2407. req->cnt = cnt - req->ring_index;
  2408. else
  2409. req->cnt = req->length -
  2410. (req->ring_index - cnt);
  2411. }
  2412. if (req->cnt < req_cnt + 2) {
  2413. rval = EXT_STATUS_BUSY;
  2414. goto queuing_error;
  2415. }
  2416. cmd_pkt = (struct cmd_bidir *)req->ring_ptr;
  2417. cmd_pkt->handle = MAKE_HANDLE(req->id, handle);
  2418. /* Zero out remaining portion of packet. */
  2419. /* tagged queuing modifier -- default is TSK_SIMPLE (0).*/
  2420. clr_ptr = (uint32_t *)cmd_pkt + 2;
  2421. memset(clr_ptr, 0, REQUEST_ENTRY_SIZE - 8);
  2422. /* Set NPORT-ID (of vha)*/
  2423. cmd_pkt->nport_handle = cpu_to_le16(vha->self_login_loop_id);
  2424. cmd_pkt->port_id[0] = vha->d_id.b.al_pa;
  2425. cmd_pkt->port_id[1] = vha->d_id.b.area;
  2426. cmd_pkt->port_id[2] = vha->d_id.b.domain;
  2427. qla25xx_build_bidir_iocb(sp, vha, cmd_pkt, tot_dsds);
  2428. cmd_pkt->entry_status = (uint8_t) rsp->id;
  2429. /* Build command packet. */
  2430. req->current_outstanding_cmd = handle;
  2431. req->outstanding_cmds[handle] = sp;
  2432. sp->handle = handle;
  2433. req->cnt -= req_cnt;
  2434. /* Send the command to the firmware */
  2435. wmb();
  2436. qla2x00_start_iocbs(vha, req);
  2437. queuing_error:
  2438. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  2439. return rval;
  2440. }