w83792d.c 50 KB

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  1. /*
  2. w83792d.c - Part of lm_sensors, Linux kernel modules for hardware
  3. monitoring
  4. Copyright (C) 2004, 2005 Winbond Electronics Corp.
  5. Chunhao Huang <DZShen@Winbond.com.tw>,
  6. Rudolf Marek <r.marek@sh.cvut.cz>
  7. This program is free software; you can redistribute it and/or modify
  8. it under the terms of the GNU General Public License as published by
  9. the Free Software Foundation; either version 2 of the License, or
  10. (at your option) any later version.
  11. This program is distributed in the hope that it will be useful,
  12. but WITHOUT ANY WARRANTY; without even the implied warranty of
  13. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  14. GNU General Public License for more details.
  15. You should have received a copy of the GNU General Public License
  16. along with this program; if not, write to the Free Software
  17. Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  18. Note:
  19. 1. This driver is only for 2.6 kernel, 2.4 kernel need a different driver.
  20. 2. This driver is only for Winbond W83792D C version device, there
  21. are also some motherboards with B version W83792D device. The
  22. calculation method to in6-in7(measured value, limits) is a little
  23. different between C and B version. C or B version can be identified
  24. by CR[0x49h].
  25. */
  26. /*
  27. Supports following chips:
  28. Chip #vin #fanin #pwm #temp wchipid vendid i2c ISA
  29. w83792d 9 7 7 3 0x7a 0x5ca3 yes no
  30. */
  31. #include <linux/config.h>
  32. #include <linux/module.h>
  33. #include <linux/init.h>
  34. #include <linux/slab.h>
  35. #include <linux/i2c.h>
  36. #include <linux/hwmon.h>
  37. #include <linux/hwmon-sysfs.h>
  38. #include <linux/err.h>
  39. /* Addresses to scan */
  40. static unsigned short normal_i2c[] = { 0x2c, 0x2d, 0x2e, 0x2f, I2C_CLIENT_END };
  41. /* Insmod parameters */
  42. I2C_CLIENT_INSMOD_1(w83792d);
  43. I2C_CLIENT_MODULE_PARM(force_subclients, "List of subclient addresses: "
  44. "{bus, clientaddr, subclientaddr1, subclientaddr2}");
  45. static int init;
  46. module_param(init, bool, 0);
  47. MODULE_PARM_DESC(init, "Set to one to force chip initialization");
  48. /* The W83792D registers */
  49. static const u8 W83792D_REG_IN[9] = {
  50. 0x20, /* Vcore A in DataSheet */
  51. 0x21, /* Vcore B in DataSheet */
  52. 0x22, /* VIN0 in DataSheet */
  53. 0x23, /* VIN1 in DataSheet */
  54. 0x24, /* VIN2 in DataSheet */
  55. 0x25, /* VIN3 in DataSheet */
  56. 0x26, /* 5VCC in DataSheet */
  57. 0xB0, /* 5VSB in DataSheet */
  58. 0xB1 /* VBAT in DataSheet */
  59. };
  60. #define W83792D_REG_LOW_BITS1 0x3E /* Low Bits I in DataSheet */
  61. #define W83792D_REG_LOW_BITS2 0x3F /* Low Bits II in DataSheet */
  62. static const u8 W83792D_REG_IN_MAX[9] = {
  63. 0x2B, /* Vcore A High Limit in DataSheet */
  64. 0x2D, /* Vcore B High Limit in DataSheet */
  65. 0x2F, /* VIN0 High Limit in DataSheet */
  66. 0x31, /* VIN1 High Limit in DataSheet */
  67. 0x33, /* VIN2 High Limit in DataSheet */
  68. 0x35, /* VIN3 High Limit in DataSheet */
  69. 0x37, /* 5VCC High Limit in DataSheet */
  70. 0xB4, /* 5VSB High Limit in DataSheet */
  71. 0xB6 /* VBAT High Limit in DataSheet */
  72. };
  73. static const u8 W83792D_REG_IN_MIN[9] = {
  74. 0x2C, /* Vcore A Low Limit in DataSheet */
  75. 0x2E, /* Vcore B Low Limit in DataSheet */
  76. 0x30, /* VIN0 Low Limit in DataSheet */
  77. 0x32, /* VIN1 Low Limit in DataSheet */
  78. 0x34, /* VIN2 Low Limit in DataSheet */
  79. 0x36, /* VIN3 Low Limit in DataSheet */
  80. 0x38, /* 5VCC Low Limit in DataSheet */
  81. 0xB5, /* 5VSB Low Limit in DataSheet */
  82. 0xB7 /* VBAT Low Limit in DataSheet */
  83. };
  84. static const u8 W83792D_REG_FAN[7] = {
  85. 0x28, /* FAN 1 Count in DataSheet */
  86. 0x29, /* FAN 2 Count in DataSheet */
  87. 0x2A, /* FAN 3 Count in DataSheet */
  88. 0xB8, /* FAN 4 Count in DataSheet */
  89. 0xB9, /* FAN 5 Count in DataSheet */
  90. 0xBA, /* FAN 6 Count in DataSheet */
  91. 0xBE /* FAN 7 Count in DataSheet */
  92. };
  93. static const u8 W83792D_REG_FAN_MIN[7] = {
  94. 0x3B, /* FAN 1 Count Low Limit in DataSheet */
  95. 0x3C, /* FAN 2 Count Low Limit in DataSheet */
  96. 0x3D, /* FAN 3 Count Low Limit in DataSheet */
  97. 0xBB, /* FAN 4 Count Low Limit in DataSheet */
  98. 0xBC, /* FAN 5 Count Low Limit in DataSheet */
  99. 0xBD, /* FAN 6 Count Low Limit in DataSheet */
  100. 0xBF /* FAN 7 Count Low Limit in DataSheet */
  101. };
  102. #define W83792D_REG_FAN_CFG 0x84 /* FAN Configuration in DataSheet */
  103. static const u8 W83792D_REG_FAN_DIV[4] = {
  104. 0x47, /* contains FAN2 and FAN1 Divisor */
  105. 0x5B, /* contains FAN4 and FAN3 Divisor */
  106. 0x5C, /* contains FAN6 and FAN5 Divisor */
  107. 0x9E /* contains FAN7 Divisor. */
  108. };
  109. static const u8 W83792D_REG_PWM[7] = {
  110. 0x81, /* FAN 1 Duty Cycle, be used to control */
  111. 0x83, /* FAN 2 Duty Cycle, be used to control */
  112. 0x94, /* FAN 3 Duty Cycle, be used to control */
  113. 0xA3, /* FAN 4 Duty Cycle, be used to control */
  114. 0xA4, /* FAN 5 Duty Cycle, be used to control */
  115. 0xA5, /* FAN 6 Duty Cycle, be used to control */
  116. 0xA6 /* FAN 7 Duty Cycle, be used to control */
  117. };
  118. #define W83792D_REG_BANK 0x4E
  119. #define W83792D_REG_TEMP2_CONFIG 0xC2
  120. #define W83792D_REG_TEMP3_CONFIG 0xCA
  121. static const u8 W83792D_REG_TEMP1[3] = {
  122. 0x27, /* TEMP 1 in DataSheet */
  123. 0x39, /* TEMP 1 Over in DataSheet */
  124. 0x3A, /* TEMP 1 Hyst in DataSheet */
  125. };
  126. static const u8 W83792D_REG_TEMP_ADD[2][6] = {
  127. { 0xC0, /* TEMP 2 in DataSheet */
  128. 0xC1, /* TEMP 2(0.5 deg) in DataSheet */
  129. 0xC5, /* TEMP 2 Over High part in DataSheet */
  130. 0xC6, /* TEMP 2 Over Low part in DataSheet */
  131. 0xC3, /* TEMP 2 Thyst High part in DataSheet */
  132. 0xC4 }, /* TEMP 2 Thyst Low part in DataSheet */
  133. { 0xC8, /* TEMP 3 in DataSheet */
  134. 0xC9, /* TEMP 3(0.5 deg) in DataSheet */
  135. 0xCD, /* TEMP 3 Over High part in DataSheet */
  136. 0xCE, /* TEMP 3 Over Low part in DataSheet */
  137. 0xCB, /* TEMP 3 Thyst High part in DataSheet */
  138. 0xCC } /* TEMP 3 Thyst Low part in DataSheet */
  139. };
  140. static const u8 W83792D_REG_THERMAL[3] = {
  141. 0x85, /* SmartFanI: Fan1 target value */
  142. 0x86, /* SmartFanI: Fan2 target value */
  143. 0x96 /* SmartFanI: Fan3 target value */
  144. };
  145. static const u8 W83792D_REG_TOLERANCE[3] = {
  146. 0x87, /* (bit3-0)SmartFan Fan1 tolerance */
  147. 0x87, /* (bit7-4)SmartFan Fan2 tolerance */
  148. 0x97 /* (bit3-0)SmartFan Fan3 tolerance */
  149. };
  150. static const u8 W83792D_REG_POINTS[3][4] = {
  151. { 0x85, /* SmartFanII: Fan1 temp point 1 */
  152. 0xE3, /* SmartFanII: Fan1 temp point 2 */
  153. 0xE4, /* SmartFanII: Fan1 temp point 3 */
  154. 0xE5 }, /* SmartFanII: Fan1 temp point 4 */
  155. { 0x86, /* SmartFanII: Fan2 temp point 1 */
  156. 0xE6, /* SmartFanII: Fan2 temp point 2 */
  157. 0xE7, /* SmartFanII: Fan2 temp point 3 */
  158. 0xE8 }, /* SmartFanII: Fan2 temp point 4 */
  159. { 0x96, /* SmartFanII: Fan3 temp point 1 */
  160. 0xE9, /* SmartFanII: Fan3 temp point 2 */
  161. 0xEA, /* SmartFanII: Fan3 temp point 3 */
  162. 0xEB } /* SmartFanII: Fan3 temp point 4 */
  163. };
  164. static const u8 W83792D_REG_LEVELS[3][4] = {
  165. { 0x88, /* (bit3-0) SmartFanII: Fan1 Non-Stop */
  166. 0x88, /* (bit7-4) SmartFanII: Fan1 Level 1 */
  167. 0xE0, /* (bit7-4) SmartFanII: Fan1 Level 2 */
  168. 0xE0 }, /* (bit3-0) SmartFanII: Fan1 Level 3 */
  169. { 0x89, /* (bit3-0) SmartFanII: Fan2 Non-Stop */
  170. 0x89, /* (bit7-4) SmartFanII: Fan2 Level 1 */
  171. 0xE1, /* (bit7-4) SmartFanII: Fan2 Level 2 */
  172. 0xE1 }, /* (bit3-0) SmartFanII: Fan2 Level 3 */
  173. { 0x98, /* (bit3-0) SmartFanII: Fan3 Non-Stop */
  174. 0x98, /* (bit7-4) SmartFanII: Fan3 Level 1 */
  175. 0xE2, /* (bit7-4) SmartFanII: Fan3 Level 2 */
  176. 0xE2 } /* (bit3-0) SmartFanII: Fan3 Level 3 */
  177. };
  178. #define W83792D_REG_GPIO_EN 0x1A
  179. #define W83792D_REG_CONFIG 0x40
  180. #define W83792D_REG_VID_FANDIV 0x47
  181. #define W83792D_REG_CHIPID 0x49
  182. #define W83792D_REG_WCHIPID 0x58
  183. #define W83792D_REG_CHIPMAN 0x4F
  184. #define W83792D_REG_PIN 0x4B
  185. #define W83792D_REG_I2C_SUBADDR 0x4A
  186. #define W83792D_REG_ALARM1 0xA9 /* realtime status register1 */
  187. #define W83792D_REG_ALARM2 0xAA /* realtime status register2 */
  188. #define W83792D_REG_ALARM3 0xAB /* realtime status register3 */
  189. #define W83792D_REG_CHASSIS 0x42 /* Bit 5: Case Open status bit */
  190. #define W83792D_REG_CHASSIS_CLR 0x44 /* Bit 7: Case Open CLR_CHS/Reset bit */
  191. /* control in0/in1 's limit modifiability */
  192. #define W83792D_REG_VID_IN_B 0x17
  193. #define W83792D_REG_VBAT 0x5D
  194. #define W83792D_REG_I2C_ADDR 0x48
  195. /* Conversions. Rounding and limit checking is only done on the TO_REG
  196. variants. Note that you should be a bit careful with which arguments
  197. these macros are called: arguments may be evaluated more than once.
  198. Fixing this is just not worth it. */
  199. #define IN_FROM_REG(nr,val) (((nr)<=1)?(val*2): \
  200. ((((nr)==6)||((nr)==7))?(val*6):(val*4)))
  201. #define IN_TO_REG(nr,val) (((nr)<=1)?(val/2): \
  202. ((((nr)==6)||((nr)==7))?(val/6):(val/4)))
  203. static inline u8
  204. FAN_TO_REG(long rpm, int div)
  205. {
  206. if (rpm == 0)
  207. return 255;
  208. rpm = SENSORS_LIMIT(rpm, 1, 1000000);
  209. return SENSORS_LIMIT((1350000 + rpm * div / 2) / (rpm * div), 1, 254);
  210. }
  211. #define FAN_FROM_REG(val,div) ((val) == 0 ? -1 : \
  212. ((val) == 255 ? 0 : \
  213. 1350000 / ((val) * (div))))
  214. /* for temp1 */
  215. #define TEMP1_TO_REG(val) (SENSORS_LIMIT(((val) < 0 ? (val)+0x100*1000 \
  216. : (val)) / 1000, 0, 0xff))
  217. #define TEMP1_FROM_REG(val) (((val) & 0x80 ? (val)-0x100 : (val)) * 1000)
  218. /* for temp2 and temp3, because they need addtional resolution */
  219. #define TEMP_ADD_FROM_REG(val1, val2) \
  220. ((((val1) & 0x80 ? (val1)-0x100 \
  221. : (val1)) * 1000) + ((val2 & 0x80) ? 500 : 0))
  222. #define TEMP_ADD_TO_REG_HIGH(val) \
  223. (SENSORS_LIMIT(((val) < 0 ? (val)+0x100*1000 \
  224. : (val)) / 1000, 0, 0xff))
  225. #define TEMP_ADD_TO_REG_LOW(val) ((val%1000) ? 0x80 : 0x00)
  226. #define PWM_FROM_REG(val) (val)
  227. #define PWM_TO_REG(val) (SENSORS_LIMIT((val),0,255))
  228. #define DIV_FROM_REG(val) (1 << (val))
  229. static inline u8
  230. DIV_TO_REG(long val)
  231. {
  232. int i;
  233. val = SENSORS_LIMIT(val, 1, 128) >> 1;
  234. for (i = 0; i < 7; i++) {
  235. if (val == 0)
  236. break;
  237. val >>= 1;
  238. }
  239. return ((u8) i);
  240. }
  241. struct w83792d_data {
  242. struct i2c_client client;
  243. struct class_device *class_dev;
  244. enum chips type;
  245. struct semaphore update_lock;
  246. char valid; /* !=0 if following fields are valid */
  247. unsigned long last_updated; /* In jiffies */
  248. /* array of 2 pointers to subclients */
  249. struct i2c_client *lm75[2];
  250. u8 in[9]; /* Register value */
  251. u8 in_max[9]; /* Register value */
  252. u8 in_min[9]; /* Register value */
  253. u16 low_bits; /* Additional resolution to voltage in6-0 */
  254. u8 fan[7]; /* Register value */
  255. u8 fan_min[7]; /* Register value */
  256. u8 temp1[3]; /* current, over, thyst */
  257. u8 temp_add[2][6]; /* Register value */
  258. u8 fan_div[7]; /* Register encoding, shifted right */
  259. u8 pwm[7]; /* We only consider the first 3 set of pwm,
  260. although 792 chip has 7 set of pwm. */
  261. u8 pwmenable[3];
  262. u8 pwm_mode[7]; /* indicates PWM or DC mode: 1->PWM; 0->DC */
  263. u32 alarms; /* realtime status register encoding,combined */
  264. u8 chassis; /* Chassis status */
  265. u8 chassis_clear; /* CLR_CHS, clear chassis intrusion detection */
  266. u8 thermal_cruise[3]; /* Smart FanI: Fan1,2,3 target value */
  267. u8 tolerance[3]; /* Fan1,2,3 tolerance(Smart Fan I/II) */
  268. u8 sf2_points[3][4]; /* Smart FanII: Fan1,2,3 temperature points */
  269. u8 sf2_levels[3][4]; /* Smart FanII: Fan1,2,3 duty cycle levels */
  270. };
  271. static int w83792d_attach_adapter(struct i2c_adapter *adapter);
  272. static int w83792d_detect(struct i2c_adapter *adapter, int address, int kind);
  273. static int w83792d_detach_client(struct i2c_client *client);
  274. static struct w83792d_data *w83792d_update_device(struct device *dev);
  275. #ifdef DEBUG
  276. static void w83792d_print_debug(struct w83792d_data *data, struct device *dev);
  277. #endif
  278. static void w83792d_init_client(struct i2c_client *client);
  279. static struct i2c_driver w83792d_driver = {
  280. .driver = {
  281. .name = "w83792d",
  282. },
  283. .attach_adapter = w83792d_attach_adapter,
  284. .detach_client = w83792d_detach_client,
  285. };
  286. static inline long in_count_from_reg(int nr, struct w83792d_data *data)
  287. {
  288. /* in7 and in8 do not have low bits, but the formula still works */
  289. return ((data->in[nr] << 2) | ((data->low_bits >> (2 * nr)) & 0x03));
  290. }
  291. /* The SMBus locks itself. The Winbond W83792D chip has a bank register,
  292. but the driver only accesses registers in bank 0, so we don't have
  293. to switch banks and lock access between switches. */
  294. static inline int w83792d_read_value(struct i2c_client *client, u8 reg)
  295. {
  296. return i2c_smbus_read_byte_data(client, reg);
  297. }
  298. static inline int
  299. w83792d_write_value(struct i2c_client *client, u8 reg, u8 value)
  300. {
  301. return i2c_smbus_write_byte_data(client, reg, value);
  302. }
  303. /* following are the sysfs callback functions */
  304. static ssize_t show_in(struct device *dev, struct device_attribute *attr,
  305. char *buf)
  306. {
  307. struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
  308. int nr = sensor_attr->index;
  309. struct w83792d_data *data = w83792d_update_device(dev);
  310. return sprintf(buf,"%ld\n", IN_FROM_REG(nr,(in_count_from_reg(nr, data))));
  311. }
  312. #define show_in_reg(reg) \
  313. static ssize_t show_##reg(struct device *dev, struct device_attribute *attr, \
  314. char *buf) \
  315. { \
  316. struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr); \
  317. int nr = sensor_attr->index; \
  318. struct w83792d_data *data = w83792d_update_device(dev); \
  319. return sprintf(buf,"%ld\n", (long)(IN_FROM_REG(nr, (data->reg[nr])*4))); \
  320. }
  321. show_in_reg(in_min);
  322. show_in_reg(in_max);
  323. #define store_in_reg(REG, reg) \
  324. static ssize_t store_in_##reg (struct device *dev, \
  325. struct device_attribute *attr, \
  326. const char *buf, size_t count) \
  327. { \
  328. struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr); \
  329. int nr = sensor_attr->index; \
  330. struct i2c_client *client = to_i2c_client(dev); \
  331. struct w83792d_data *data = i2c_get_clientdata(client); \
  332. u32 val; \
  333. \
  334. val = simple_strtoul(buf, NULL, 10); \
  335. data->in_##reg[nr] = SENSORS_LIMIT(IN_TO_REG(nr, val)/4, 0, 255); \
  336. w83792d_write_value(client, W83792D_REG_IN_##REG[nr], data->in_##reg[nr]); \
  337. \
  338. return count; \
  339. }
  340. store_in_reg(MIN, min);
  341. store_in_reg(MAX, max);
  342. static struct sensor_device_attribute sda_in_input[] = {
  343. SENSOR_ATTR(in0_input, S_IRUGO, show_in, NULL, 0),
  344. SENSOR_ATTR(in1_input, S_IRUGO, show_in, NULL, 1),
  345. SENSOR_ATTR(in2_input, S_IRUGO, show_in, NULL, 2),
  346. SENSOR_ATTR(in3_input, S_IRUGO, show_in, NULL, 3),
  347. SENSOR_ATTR(in4_input, S_IRUGO, show_in, NULL, 4),
  348. SENSOR_ATTR(in5_input, S_IRUGO, show_in, NULL, 5),
  349. SENSOR_ATTR(in6_input, S_IRUGO, show_in, NULL, 6),
  350. SENSOR_ATTR(in7_input, S_IRUGO, show_in, NULL, 7),
  351. SENSOR_ATTR(in8_input, S_IRUGO, show_in, NULL, 8),
  352. };
  353. static struct sensor_device_attribute sda_in_min[] = {
  354. SENSOR_ATTR(in0_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 0),
  355. SENSOR_ATTR(in1_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 1),
  356. SENSOR_ATTR(in2_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 2),
  357. SENSOR_ATTR(in3_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 3),
  358. SENSOR_ATTR(in4_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 4),
  359. SENSOR_ATTR(in5_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 5),
  360. SENSOR_ATTR(in6_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 6),
  361. SENSOR_ATTR(in7_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 7),
  362. SENSOR_ATTR(in8_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 8),
  363. };
  364. static struct sensor_device_attribute sda_in_max[] = {
  365. SENSOR_ATTR(in0_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 0),
  366. SENSOR_ATTR(in1_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 1),
  367. SENSOR_ATTR(in2_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 2),
  368. SENSOR_ATTR(in3_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 3),
  369. SENSOR_ATTR(in4_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 4),
  370. SENSOR_ATTR(in5_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 5),
  371. SENSOR_ATTR(in6_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 6),
  372. SENSOR_ATTR(in7_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 7),
  373. SENSOR_ATTR(in8_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 8),
  374. };
  375. #define show_fan_reg(reg) \
  376. static ssize_t show_##reg (struct device *dev, struct device_attribute *attr, \
  377. char *buf) \
  378. { \
  379. struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr); \
  380. int nr = sensor_attr->index - 1; \
  381. struct w83792d_data *data = w83792d_update_device(dev); \
  382. return sprintf(buf,"%d\n", \
  383. FAN_FROM_REG(data->reg[nr], DIV_FROM_REG(data->fan_div[nr]))); \
  384. }
  385. show_fan_reg(fan);
  386. show_fan_reg(fan_min);
  387. static ssize_t
  388. store_fan_min(struct device *dev, struct device_attribute *attr,
  389. const char *buf, size_t count)
  390. {
  391. struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
  392. int nr = sensor_attr->index - 1;
  393. struct i2c_client *client = to_i2c_client(dev);
  394. struct w83792d_data *data = i2c_get_clientdata(client);
  395. u32 val;
  396. val = simple_strtoul(buf, NULL, 10);
  397. data->fan_min[nr] = FAN_TO_REG(val, DIV_FROM_REG(data->fan_div[nr]));
  398. w83792d_write_value(client, W83792D_REG_FAN_MIN[nr],
  399. data->fan_min[nr]);
  400. return count;
  401. }
  402. static ssize_t
  403. show_fan_div(struct device *dev, struct device_attribute *attr,
  404. char *buf)
  405. {
  406. struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
  407. int nr = sensor_attr->index;
  408. struct w83792d_data *data = w83792d_update_device(dev);
  409. return sprintf(buf, "%u\n", DIV_FROM_REG(data->fan_div[nr - 1]));
  410. }
  411. /* Note: we save and restore the fan minimum here, because its value is
  412. determined in part by the fan divisor. This follows the principle of
  413. least suprise; the user doesn't expect the fan minimum to change just
  414. because the divisor changed. */
  415. static ssize_t
  416. store_fan_div(struct device *dev, struct device_attribute *attr,
  417. const char *buf, size_t count)
  418. {
  419. struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
  420. int nr = sensor_attr->index - 1;
  421. struct i2c_client *client = to_i2c_client(dev);
  422. struct w83792d_data *data = i2c_get_clientdata(client);
  423. unsigned long min;
  424. /*u8 reg;*/
  425. u8 fan_div_reg = 0;
  426. u8 tmp_fan_div;
  427. /* Save fan_min */
  428. min = FAN_FROM_REG(data->fan_min[nr],
  429. DIV_FROM_REG(data->fan_div[nr]));
  430. data->fan_div[nr] = DIV_TO_REG(simple_strtoul(buf, NULL, 10));
  431. fan_div_reg = w83792d_read_value(client, W83792D_REG_FAN_DIV[nr >> 1]);
  432. fan_div_reg &= (nr & 0x01) ? 0x8f : 0xf8;
  433. tmp_fan_div = (nr & 0x01) ? (((data->fan_div[nr]) << 4) & 0x70)
  434. : ((data->fan_div[nr]) & 0x07);
  435. w83792d_write_value(client, W83792D_REG_FAN_DIV[nr >> 1],
  436. fan_div_reg | tmp_fan_div);
  437. /* Restore fan_min */
  438. data->fan_min[nr] = FAN_TO_REG(min, DIV_FROM_REG(data->fan_div[nr]));
  439. w83792d_write_value(client, W83792D_REG_FAN_MIN[nr], data->fan_min[nr]);
  440. return count;
  441. }
  442. static struct sensor_device_attribute sda_fan_input[] = {
  443. SENSOR_ATTR(fan1_input, S_IRUGO, show_fan, NULL, 1),
  444. SENSOR_ATTR(fan2_input, S_IRUGO, show_fan, NULL, 2),
  445. SENSOR_ATTR(fan3_input, S_IRUGO, show_fan, NULL, 3),
  446. SENSOR_ATTR(fan4_input, S_IRUGO, show_fan, NULL, 4),
  447. SENSOR_ATTR(fan5_input, S_IRUGO, show_fan, NULL, 5),
  448. SENSOR_ATTR(fan6_input, S_IRUGO, show_fan, NULL, 6),
  449. SENSOR_ATTR(fan7_input, S_IRUGO, show_fan, NULL, 7),
  450. };
  451. static struct sensor_device_attribute sda_fan_min[] = {
  452. SENSOR_ATTR(fan1_min, S_IWUSR | S_IRUGO, show_fan_min, store_fan_min, 1),
  453. SENSOR_ATTR(fan2_min, S_IWUSR | S_IRUGO, show_fan_min, store_fan_min, 2),
  454. SENSOR_ATTR(fan3_min, S_IWUSR | S_IRUGO, show_fan_min, store_fan_min, 3),
  455. SENSOR_ATTR(fan4_min, S_IWUSR | S_IRUGO, show_fan_min, store_fan_min, 4),
  456. SENSOR_ATTR(fan5_min, S_IWUSR | S_IRUGO, show_fan_min, store_fan_min, 5),
  457. SENSOR_ATTR(fan6_min, S_IWUSR | S_IRUGO, show_fan_min, store_fan_min, 6),
  458. SENSOR_ATTR(fan7_min, S_IWUSR | S_IRUGO, show_fan_min, store_fan_min, 7),
  459. };
  460. static struct sensor_device_attribute sda_fan_div[] = {
  461. SENSOR_ATTR(fan1_div, S_IWUSR | S_IRUGO, show_fan_div, store_fan_div, 1),
  462. SENSOR_ATTR(fan2_div, S_IWUSR | S_IRUGO, show_fan_div, store_fan_div, 2),
  463. SENSOR_ATTR(fan3_div, S_IWUSR | S_IRUGO, show_fan_div, store_fan_div, 3),
  464. SENSOR_ATTR(fan4_div, S_IWUSR | S_IRUGO, show_fan_div, store_fan_div, 4),
  465. SENSOR_ATTR(fan5_div, S_IWUSR | S_IRUGO, show_fan_div, store_fan_div, 5),
  466. SENSOR_ATTR(fan6_div, S_IWUSR | S_IRUGO, show_fan_div, store_fan_div, 6),
  467. SENSOR_ATTR(fan7_div, S_IWUSR | S_IRUGO, show_fan_div, store_fan_div, 7),
  468. };
  469. /* read/write the temperature1, includes measured value and limits */
  470. static ssize_t show_temp1(struct device *dev, struct device_attribute *attr,
  471. char *buf)
  472. {
  473. struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
  474. int nr = sensor_attr->index;
  475. struct w83792d_data *data = w83792d_update_device(dev);
  476. return sprintf(buf, "%d\n", TEMP1_FROM_REG(data->temp1[nr]));
  477. }
  478. static ssize_t store_temp1(struct device *dev, struct device_attribute *attr,
  479. const char *buf, size_t count)
  480. {
  481. struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
  482. int nr = sensor_attr->index;
  483. struct i2c_client *client = to_i2c_client(dev);
  484. struct w83792d_data *data = i2c_get_clientdata(client);
  485. s32 val;
  486. val = simple_strtol(buf, NULL, 10);
  487. data->temp1[nr] = TEMP1_TO_REG(val);
  488. w83792d_write_value(client, W83792D_REG_TEMP1[nr],
  489. data->temp1[nr]);
  490. return count;
  491. }
  492. /* read/write the temperature2-3, includes measured value and limits */
  493. static ssize_t show_temp23(struct device *dev, struct device_attribute *attr,
  494. char *buf)
  495. {
  496. struct sensor_device_attribute_2 *sensor_attr = to_sensor_dev_attr_2(attr);
  497. int nr = sensor_attr->nr;
  498. int index = sensor_attr->index;
  499. struct w83792d_data *data = w83792d_update_device(dev);
  500. return sprintf(buf,"%ld\n",
  501. (long)TEMP_ADD_FROM_REG(data->temp_add[nr][index],
  502. data->temp_add[nr][index+1]));
  503. }
  504. static ssize_t store_temp23(struct device *dev, struct device_attribute *attr,
  505. const char *buf, size_t count)
  506. {
  507. struct sensor_device_attribute_2 *sensor_attr = to_sensor_dev_attr_2(attr);
  508. int nr = sensor_attr->nr;
  509. int index = sensor_attr->index;
  510. struct i2c_client *client = to_i2c_client(dev);
  511. struct w83792d_data *data = i2c_get_clientdata(client);
  512. s32 val;
  513. val = simple_strtol(buf, NULL, 10);
  514. data->temp_add[nr][index] = TEMP_ADD_TO_REG_HIGH(val);
  515. data->temp_add[nr][index+1] = TEMP_ADD_TO_REG_LOW(val);
  516. w83792d_write_value(client, W83792D_REG_TEMP_ADD[nr][index],
  517. data->temp_add[nr][index]);
  518. w83792d_write_value(client, W83792D_REG_TEMP_ADD[nr][index+1],
  519. data->temp_add[nr][index+1]);
  520. return count;
  521. }
  522. static struct sensor_device_attribute_2 sda_temp_input[] = {
  523. SENSOR_ATTR_2(temp1_input, S_IRUGO, show_temp1, NULL, 0, 0),
  524. SENSOR_ATTR_2(temp2_input, S_IRUGO, show_temp23, NULL, 0, 0),
  525. SENSOR_ATTR_2(temp3_input, S_IRUGO, show_temp23, NULL, 1, 0),
  526. };
  527. static struct sensor_device_attribute_2 sda_temp_max[] = {
  528. SENSOR_ATTR_2(temp1_max, S_IRUGO | S_IWUSR, show_temp1, store_temp1, 0, 1),
  529. SENSOR_ATTR_2(temp2_max, S_IRUGO | S_IWUSR, show_temp23, store_temp23, 0, 2),
  530. SENSOR_ATTR_2(temp3_max, S_IRUGO | S_IWUSR, show_temp23, store_temp23, 1, 2),
  531. };
  532. static struct sensor_device_attribute_2 sda_temp_max_hyst[] = {
  533. SENSOR_ATTR_2(temp1_max_hyst, S_IRUGO | S_IWUSR, show_temp1, store_temp1, 0, 2),
  534. SENSOR_ATTR_2(temp2_max_hyst, S_IRUGO | S_IWUSR, show_temp23, store_temp23, 0, 4),
  535. SENSOR_ATTR_2(temp3_max_hyst, S_IRUGO | S_IWUSR, show_temp23, store_temp23, 1, 4),
  536. };
  537. /* get reatime status of all sensors items: voltage, temp, fan */
  538. static ssize_t
  539. show_alarms_reg(struct device *dev, struct device_attribute *attr, char *buf)
  540. {
  541. struct w83792d_data *data = w83792d_update_device(dev);
  542. return sprintf(buf, "%d\n", data->alarms);
  543. }
  544. static
  545. DEVICE_ATTR(alarms, S_IRUGO, show_alarms_reg, NULL);
  546. #define device_create_file_alarms() \
  547. device_create_file(dev, &dev_attr_alarms);
  548. static ssize_t
  549. show_pwm(struct device *dev, struct device_attribute *attr,
  550. char *buf)
  551. {
  552. struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
  553. int nr = sensor_attr->index;
  554. struct w83792d_data *data = w83792d_update_device(dev);
  555. return sprintf(buf, "%ld\n", (long) PWM_FROM_REG(data->pwm[nr-1]));
  556. }
  557. static ssize_t
  558. show_pwmenable(struct device *dev, struct device_attribute *attr,
  559. char *buf)
  560. {
  561. struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
  562. int nr = sensor_attr->index - 1;
  563. struct w83792d_data *data = w83792d_update_device(dev);
  564. long pwm_enable_tmp = 1;
  565. switch (data->pwmenable[nr]) {
  566. case 0:
  567. pwm_enable_tmp = 1; /* manual mode */
  568. break;
  569. case 1:
  570. pwm_enable_tmp = 3; /*thermal cruise/Smart Fan I */
  571. break;
  572. case 2:
  573. pwm_enable_tmp = 2; /* Smart Fan II */
  574. break;
  575. }
  576. return sprintf(buf, "%ld\n", pwm_enable_tmp);
  577. }
  578. static ssize_t
  579. store_pwm(struct device *dev, struct device_attribute *attr,
  580. const char *buf, size_t count)
  581. {
  582. struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
  583. int nr = sensor_attr->index - 1;
  584. struct i2c_client *client = to_i2c_client(dev);
  585. struct w83792d_data *data = i2c_get_clientdata(client);
  586. u32 val;
  587. val = simple_strtoul(buf, NULL, 10);
  588. data->pwm[nr] = PWM_TO_REG(val);
  589. w83792d_write_value(client, W83792D_REG_PWM[nr], data->pwm[nr]);
  590. return count;
  591. }
  592. static ssize_t
  593. store_pwmenable(struct device *dev, struct device_attribute *attr,
  594. const char *buf, size_t count)
  595. {
  596. struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
  597. int nr = sensor_attr->index - 1;
  598. struct i2c_client *client = to_i2c_client(dev);
  599. struct w83792d_data *data = i2c_get_clientdata(client);
  600. u32 val;
  601. u8 fan_cfg_tmp, cfg1_tmp, cfg2_tmp, cfg3_tmp, cfg4_tmp;
  602. val = simple_strtoul(buf, NULL, 10);
  603. switch (val) {
  604. case 1:
  605. data->pwmenable[nr] = 0; /* manual mode */
  606. break;
  607. case 2:
  608. data->pwmenable[nr] = 2; /* Smart Fan II */
  609. break;
  610. case 3:
  611. data->pwmenable[nr] = 1; /* thermal cruise/Smart Fan I */
  612. break;
  613. default:
  614. return -EINVAL;
  615. }
  616. cfg1_tmp = data->pwmenable[0];
  617. cfg2_tmp = (data->pwmenable[1]) << 2;
  618. cfg3_tmp = (data->pwmenable[2]) << 4;
  619. cfg4_tmp = w83792d_read_value(client,W83792D_REG_FAN_CFG) & 0xc0;
  620. fan_cfg_tmp = ((cfg4_tmp | cfg3_tmp) | cfg2_tmp) | cfg1_tmp;
  621. w83792d_write_value(client, W83792D_REG_FAN_CFG, fan_cfg_tmp);
  622. return count;
  623. }
  624. static struct sensor_device_attribute sda_pwm[] = {
  625. SENSOR_ATTR(pwm1, S_IWUSR | S_IRUGO, show_pwm, store_pwm, 1),
  626. SENSOR_ATTR(pwm2, S_IWUSR | S_IRUGO, show_pwm, store_pwm, 2),
  627. SENSOR_ATTR(pwm3, S_IWUSR | S_IRUGO, show_pwm, store_pwm, 3),
  628. };
  629. static struct sensor_device_attribute sda_pwm_enable[] = {
  630. SENSOR_ATTR(pwm1_enable, S_IWUSR | S_IRUGO,
  631. show_pwmenable, store_pwmenable, 1),
  632. SENSOR_ATTR(pwm2_enable, S_IWUSR | S_IRUGO,
  633. show_pwmenable, store_pwmenable, 2),
  634. SENSOR_ATTR(pwm3_enable, S_IWUSR | S_IRUGO,
  635. show_pwmenable, store_pwmenable, 3),
  636. };
  637. static ssize_t
  638. show_pwm_mode(struct device *dev, struct device_attribute *attr,
  639. char *buf)
  640. {
  641. struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
  642. int nr = sensor_attr->index;
  643. struct w83792d_data *data = w83792d_update_device(dev);
  644. return sprintf(buf, "%d\n", data->pwm_mode[nr-1]);
  645. }
  646. static ssize_t
  647. store_pwm_mode(struct device *dev, struct device_attribute *attr,
  648. const char *buf, size_t count)
  649. {
  650. struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
  651. int nr = sensor_attr->index - 1;
  652. struct i2c_client *client = to_i2c_client(dev);
  653. struct w83792d_data *data = i2c_get_clientdata(client);
  654. u32 val;
  655. u8 pwm_mode_mask = 0;
  656. val = simple_strtoul(buf, NULL, 10);
  657. data->pwm_mode[nr] = SENSORS_LIMIT(val, 0, 1);
  658. pwm_mode_mask = w83792d_read_value(client,
  659. W83792D_REG_PWM[nr]) & 0x7f;
  660. w83792d_write_value(client, W83792D_REG_PWM[nr],
  661. ((data->pwm_mode[nr]) << 7) | pwm_mode_mask);
  662. return count;
  663. }
  664. static struct sensor_device_attribute sda_pwm_mode[] = {
  665. SENSOR_ATTR(pwm1_mode, S_IWUSR | S_IRUGO,
  666. show_pwm_mode, store_pwm_mode, 1),
  667. SENSOR_ATTR(pwm2_mode, S_IWUSR | S_IRUGO,
  668. show_pwm_mode, store_pwm_mode, 2),
  669. SENSOR_ATTR(pwm3_mode, S_IWUSR | S_IRUGO,
  670. show_pwm_mode, store_pwm_mode, 3),
  671. };
  672. static ssize_t
  673. show_regs_chassis(struct device *dev, struct device_attribute *attr,
  674. char *buf)
  675. {
  676. struct w83792d_data *data = w83792d_update_device(dev);
  677. return sprintf(buf, "%d\n", data->chassis);
  678. }
  679. static DEVICE_ATTR(chassis, S_IRUGO, show_regs_chassis, NULL);
  680. #define device_create_file_chassis() \
  681. do { \
  682. device_create_file(dev, &dev_attr_chassis); \
  683. } while (0)
  684. static ssize_t
  685. show_chassis_clear(struct device *dev, struct device_attribute *attr, char *buf)
  686. {
  687. struct w83792d_data *data = w83792d_update_device(dev);
  688. return sprintf(buf, "%d\n", data->chassis_clear);
  689. }
  690. static ssize_t
  691. store_chassis_clear(struct device *dev, struct device_attribute *attr,
  692. const char *buf, size_t count)
  693. {
  694. struct i2c_client *client = to_i2c_client(dev);
  695. struct w83792d_data *data = i2c_get_clientdata(client);
  696. u32 val;
  697. u8 temp1 = 0, temp2 = 0;
  698. val = simple_strtoul(buf, NULL, 10);
  699. data->chassis_clear = SENSORS_LIMIT(val, 0 ,1);
  700. temp1 = ((data->chassis_clear) << 7) & 0x80;
  701. temp2 = w83792d_read_value(client,
  702. W83792D_REG_CHASSIS_CLR) & 0x7f;
  703. w83792d_write_value(client, W83792D_REG_CHASSIS_CLR, temp1 | temp2);
  704. return count;
  705. }
  706. static DEVICE_ATTR(chassis_clear, S_IRUGO | S_IWUSR,
  707. show_chassis_clear, store_chassis_clear);
  708. #define device_create_file_chassis_clear() \
  709. do { \
  710. device_create_file(dev, &dev_attr_chassis_clear); \
  711. } while (0)
  712. /* For Smart Fan I / Thermal Cruise */
  713. static ssize_t
  714. show_thermal_cruise(struct device *dev, struct device_attribute *attr,
  715. char *buf)
  716. {
  717. struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
  718. int nr = sensor_attr->index;
  719. struct w83792d_data *data = w83792d_update_device(dev);
  720. return sprintf(buf, "%ld\n", (long)data->thermal_cruise[nr-1]);
  721. }
  722. static ssize_t
  723. store_thermal_cruise(struct device *dev, struct device_attribute *attr,
  724. const char *buf, size_t count)
  725. {
  726. struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
  727. int nr = sensor_attr->index - 1;
  728. struct i2c_client *client = to_i2c_client(dev);
  729. struct w83792d_data *data = i2c_get_clientdata(client);
  730. u32 val;
  731. u8 target_tmp=0, target_mask=0;
  732. val = simple_strtoul(buf, NULL, 10);
  733. target_tmp = val;
  734. target_tmp = target_tmp & 0x7f;
  735. target_mask = w83792d_read_value(client, W83792D_REG_THERMAL[nr]) & 0x80;
  736. data->thermal_cruise[nr] = SENSORS_LIMIT(target_tmp, 0, 255);
  737. w83792d_write_value(client, W83792D_REG_THERMAL[nr],
  738. (data->thermal_cruise[nr]) | target_mask);
  739. return count;
  740. }
  741. static struct sensor_device_attribute sda_thermal_cruise[] = {
  742. SENSOR_ATTR(thermal_cruise1, S_IWUSR | S_IRUGO,
  743. show_thermal_cruise, store_thermal_cruise, 1),
  744. SENSOR_ATTR(thermal_cruise2, S_IWUSR | S_IRUGO,
  745. show_thermal_cruise, store_thermal_cruise, 2),
  746. SENSOR_ATTR(thermal_cruise3, S_IWUSR | S_IRUGO,
  747. show_thermal_cruise, store_thermal_cruise, 3),
  748. };
  749. /* For Smart Fan I/Thermal Cruise and Smart Fan II */
  750. static ssize_t
  751. show_tolerance(struct device *dev, struct device_attribute *attr,
  752. char *buf)
  753. {
  754. struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
  755. int nr = sensor_attr->index;
  756. struct w83792d_data *data = w83792d_update_device(dev);
  757. return sprintf(buf, "%ld\n", (long)data->tolerance[nr-1]);
  758. }
  759. static ssize_t
  760. store_tolerance(struct device *dev, struct device_attribute *attr,
  761. const char *buf, size_t count)
  762. {
  763. struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
  764. int nr = sensor_attr->index - 1;
  765. struct i2c_client *client = to_i2c_client(dev);
  766. struct w83792d_data *data = i2c_get_clientdata(client);
  767. u32 val;
  768. u8 tol_tmp, tol_mask;
  769. val = simple_strtoul(buf, NULL, 10);
  770. tol_mask = w83792d_read_value(client,
  771. W83792D_REG_TOLERANCE[nr]) & ((nr == 1) ? 0x0f : 0xf0);
  772. tol_tmp = SENSORS_LIMIT(val, 0, 15);
  773. tol_tmp &= 0x0f;
  774. data->tolerance[nr] = tol_tmp;
  775. if (nr == 1) {
  776. tol_tmp <<= 4;
  777. }
  778. w83792d_write_value(client, W83792D_REG_TOLERANCE[nr],
  779. tol_mask | tol_tmp);
  780. return count;
  781. }
  782. static struct sensor_device_attribute sda_tolerance[] = {
  783. SENSOR_ATTR(tolerance1, S_IWUSR | S_IRUGO,
  784. show_tolerance, store_tolerance, 1),
  785. SENSOR_ATTR(tolerance2, S_IWUSR | S_IRUGO,
  786. show_tolerance, store_tolerance, 2),
  787. SENSOR_ATTR(tolerance3, S_IWUSR | S_IRUGO,
  788. show_tolerance, store_tolerance, 3),
  789. };
  790. /* For Smart Fan II */
  791. static ssize_t
  792. show_sf2_point(struct device *dev, struct device_attribute *attr,
  793. char *buf)
  794. {
  795. struct sensor_device_attribute_2 *sensor_attr = to_sensor_dev_attr_2(attr);
  796. int nr = sensor_attr->nr;
  797. int index = sensor_attr->index;
  798. struct w83792d_data *data = w83792d_update_device(dev);
  799. return sprintf(buf, "%ld\n", (long)data->sf2_points[index-1][nr-1]);
  800. }
  801. static ssize_t
  802. store_sf2_point(struct device *dev, struct device_attribute *attr,
  803. const char *buf, size_t count)
  804. {
  805. struct sensor_device_attribute_2 *sensor_attr = to_sensor_dev_attr_2(attr);
  806. int nr = sensor_attr->nr - 1;
  807. int index = sensor_attr->index - 1;
  808. struct i2c_client *client = to_i2c_client(dev);
  809. struct w83792d_data *data = i2c_get_clientdata(client);
  810. u32 val;
  811. u8 mask_tmp = 0;
  812. val = simple_strtoul(buf, NULL, 10);
  813. data->sf2_points[index][nr] = SENSORS_LIMIT(val, 0, 127);
  814. mask_tmp = w83792d_read_value(client,
  815. W83792D_REG_POINTS[index][nr]) & 0x80;
  816. w83792d_write_value(client, W83792D_REG_POINTS[index][nr],
  817. mask_tmp|data->sf2_points[index][nr]);
  818. return count;
  819. }
  820. static struct sensor_device_attribute_2 sda_sf2_point[] = {
  821. SENSOR_ATTR_2(sf2_point1_fan1, S_IRUGO | S_IWUSR,
  822. show_sf2_point, store_sf2_point, 1, 1),
  823. SENSOR_ATTR_2(sf2_point2_fan1, S_IRUGO | S_IWUSR,
  824. show_sf2_point, store_sf2_point, 2, 1),
  825. SENSOR_ATTR_2(sf2_point3_fan1, S_IRUGO | S_IWUSR,
  826. show_sf2_point, store_sf2_point, 3, 1),
  827. SENSOR_ATTR_2(sf2_point4_fan1, S_IRUGO | S_IWUSR,
  828. show_sf2_point, store_sf2_point, 4, 1),
  829. SENSOR_ATTR_2(sf2_point1_fan2, S_IRUGO | S_IWUSR,
  830. show_sf2_point, store_sf2_point, 1, 2),
  831. SENSOR_ATTR_2(sf2_point2_fan2, S_IRUGO | S_IWUSR,
  832. show_sf2_point, store_sf2_point, 2, 2),
  833. SENSOR_ATTR_2(sf2_point3_fan2, S_IRUGO | S_IWUSR,
  834. show_sf2_point, store_sf2_point, 3, 2),
  835. SENSOR_ATTR_2(sf2_point4_fan2, S_IRUGO | S_IWUSR,
  836. show_sf2_point, store_sf2_point, 4, 2),
  837. SENSOR_ATTR_2(sf2_point1_fan3, S_IRUGO | S_IWUSR,
  838. show_sf2_point, store_sf2_point, 1, 3),
  839. SENSOR_ATTR_2(sf2_point2_fan3, S_IRUGO | S_IWUSR,
  840. show_sf2_point, store_sf2_point, 2, 3),
  841. SENSOR_ATTR_2(sf2_point3_fan3, S_IRUGO | S_IWUSR,
  842. show_sf2_point, store_sf2_point, 3, 3),
  843. SENSOR_ATTR_2(sf2_point4_fan3, S_IRUGO | S_IWUSR,
  844. show_sf2_point, store_sf2_point, 4, 3),
  845. };
  846. static ssize_t
  847. show_sf2_level(struct device *dev, struct device_attribute *attr,
  848. char *buf)
  849. {
  850. struct sensor_device_attribute_2 *sensor_attr = to_sensor_dev_attr_2(attr);
  851. int nr = sensor_attr->nr;
  852. int index = sensor_attr->index;
  853. struct w83792d_data *data = w83792d_update_device(dev);
  854. return sprintf(buf, "%d\n",
  855. (((data->sf2_levels[index-1][nr]) * 100) / 15));
  856. }
  857. static ssize_t
  858. store_sf2_level(struct device *dev, struct device_attribute *attr,
  859. const char *buf, size_t count)
  860. {
  861. struct sensor_device_attribute_2 *sensor_attr = to_sensor_dev_attr_2(attr);
  862. int nr = sensor_attr->nr;
  863. int index = sensor_attr->index - 1;
  864. struct i2c_client *client = to_i2c_client(dev);
  865. struct w83792d_data *data = i2c_get_clientdata(client);
  866. u32 val;
  867. u8 mask_tmp=0, level_tmp=0;
  868. val = simple_strtoul(buf, NULL, 10);
  869. data->sf2_levels[index][nr] = SENSORS_LIMIT((val * 15) / 100, 0, 15);
  870. mask_tmp = w83792d_read_value(client, W83792D_REG_LEVELS[index][nr])
  871. & ((nr==3) ? 0xf0 : 0x0f);
  872. if (nr==3) {
  873. level_tmp = data->sf2_levels[index][nr];
  874. } else {
  875. level_tmp = data->sf2_levels[index][nr] << 4;
  876. }
  877. w83792d_write_value(client, W83792D_REG_LEVELS[index][nr], level_tmp | mask_tmp);
  878. return count;
  879. }
  880. static struct sensor_device_attribute_2 sda_sf2_level[] = {
  881. SENSOR_ATTR_2(sf2_level1_fan1, S_IRUGO | S_IWUSR,
  882. show_sf2_level, store_sf2_level, 1, 1),
  883. SENSOR_ATTR_2(sf2_level2_fan1, S_IRUGO | S_IWUSR,
  884. show_sf2_level, store_sf2_level, 2, 1),
  885. SENSOR_ATTR_2(sf2_level3_fan1, S_IRUGO | S_IWUSR,
  886. show_sf2_level, store_sf2_level, 3, 1),
  887. SENSOR_ATTR_2(sf2_level1_fan2, S_IRUGO | S_IWUSR,
  888. show_sf2_level, store_sf2_level, 1, 2),
  889. SENSOR_ATTR_2(sf2_level2_fan2, S_IRUGO | S_IWUSR,
  890. show_sf2_level, store_sf2_level, 2, 2),
  891. SENSOR_ATTR_2(sf2_level3_fan2, S_IRUGO | S_IWUSR,
  892. show_sf2_level, store_sf2_level, 3, 2),
  893. SENSOR_ATTR_2(sf2_level1_fan3, S_IRUGO | S_IWUSR,
  894. show_sf2_level, store_sf2_level, 1, 3),
  895. SENSOR_ATTR_2(sf2_level2_fan3, S_IRUGO | S_IWUSR,
  896. show_sf2_level, store_sf2_level, 2, 3),
  897. SENSOR_ATTR_2(sf2_level3_fan3, S_IRUGO | S_IWUSR,
  898. show_sf2_level, store_sf2_level, 3, 3),
  899. };
  900. /* This function is called when:
  901. * w83792d_driver is inserted (when this module is loaded), for each
  902. available adapter
  903. * when a new adapter is inserted (and w83792d_driver is still present) */
  904. static int
  905. w83792d_attach_adapter(struct i2c_adapter *adapter)
  906. {
  907. if (!(adapter->class & I2C_CLASS_HWMON))
  908. return 0;
  909. return i2c_probe(adapter, &addr_data, w83792d_detect);
  910. }
  911. static int
  912. w83792d_create_subclient(struct i2c_adapter *adapter,
  913. struct i2c_client *new_client, int addr,
  914. struct i2c_client **sub_cli)
  915. {
  916. int err;
  917. struct i2c_client *sub_client;
  918. (*sub_cli) = sub_client = kzalloc(sizeof(struct i2c_client), GFP_KERNEL);
  919. if (!(sub_client)) {
  920. return -ENOMEM;
  921. }
  922. sub_client->addr = 0x48 + addr;
  923. i2c_set_clientdata(sub_client, NULL);
  924. sub_client->adapter = adapter;
  925. sub_client->driver = &w83792d_driver;
  926. sub_client->flags = 0;
  927. strlcpy(sub_client->name, "w83792d subclient", I2C_NAME_SIZE);
  928. if ((err = i2c_attach_client(sub_client))) {
  929. dev_err(&new_client->dev, "subclient registration "
  930. "at address 0x%x failed\n", sub_client->addr);
  931. kfree(sub_client);
  932. return err;
  933. }
  934. return 0;
  935. }
  936. static int
  937. w83792d_detect_subclients(struct i2c_adapter *adapter, int address, int kind,
  938. struct i2c_client *new_client)
  939. {
  940. int i, id, err;
  941. u8 val;
  942. struct w83792d_data *data = i2c_get_clientdata(new_client);
  943. id = i2c_adapter_id(adapter);
  944. if (force_subclients[0] == id && force_subclients[1] == address) {
  945. for (i = 2; i <= 3; i++) {
  946. if (force_subclients[i] < 0x48 ||
  947. force_subclients[i] > 0x4f) {
  948. dev_err(&new_client->dev, "invalid subclient "
  949. "address %d; must be 0x48-0x4f\n",
  950. force_subclients[i]);
  951. err = -ENODEV;
  952. goto ERROR_SC_0;
  953. }
  954. }
  955. w83792d_write_value(new_client, W83792D_REG_I2C_SUBADDR,
  956. (force_subclients[2] & 0x07) |
  957. ((force_subclients[3] & 0x07) << 4));
  958. }
  959. val = w83792d_read_value(new_client, W83792D_REG_I2C_SUBADDR);
  960. if (!(val & 0x08)) {
  961. err = w83792d_create_subclient(adapter, new_client, val & 0x7,
  962. &data->lm75[0]);
  963. if (err < 0)
  964. goto ERROR_SC_0;
  965. }
  966. if (!(val & 0x80)) {
  967. if ((data->lm75[0] != NULL) &&
  968. ((val & 0x7) == ((val >> 4) & 0x7))) {
  969. dev_err(&new_client->dev, "duplicate addresses 0x%x, "
  970. "use force_subclient\n", data->lm75[0]->addr);
  971. err = -ENODEV;
  972. goto ERROR_SC_1;
  973. }
  974. err = w83792d_create_subclient(adapter, new_client,
  975. (val >> 4) & 0x7, &data->lm75[1]);
  976. if (err < 0)
  977. goto ERROR_SC_1;
  978. }
  979. return 0;
  980. /* Undo inits in case of errors */
  981. ERROR_SC_1:
  982. if (data->lm75[0] != NULL) {
  983. i2c_detach_client(data->lm75[0]);
  984. kfree(data->lm75[0]);
  985. }
  986. ERROR_SC_0:
  987. return err;
  988. }
  989. static void device_create_file_fan(struct device *dev, int i)
  990. {
  991. device_create_file(dev, &sda_fan_input[i].dev_attr);
  992. device_create_file(dev, &sda_fan_div[i].dev_attr);
  993. device_create_file(dev, &sda_fan_min[i].dev_attr);
  994. }
  995. static int
  996. w83792d_detect(struct i2c_adapter *adapter, int address, int kind)
  997. {
  998. int i = 0, val1 = 0, val2;
  999. struct i2c_client *client;
  1000. struct device *dev;
  1001. struct w83792d_data *data;
  1002. int err = 0;
  1003. const char *client_name = "";
  1004. if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA)) {
  1005. goto ERROR0;
  1006. }
  1007. /* OK. For now, we presume we have a valid client. We now create the
  1008. client structure, even though we cannot fill it completely yet.
  1009. But it allows us to access w83792d_{read,write}_value. */
  1010. if (!(data = kzalloc(sizeof(struct w83792d_data), GFP_KERNEL))) {
  1011. err = -ENOMEM;
  1012. goto ERROR0;
  1013. }
  1014. client = &data->client;
  1015. dev = &client->dev;
  1016. i2c_set_clientdata(client, data);
  1017. client->addr = address;
  1018. client->adapter = adapter;
  1019. client->driver = &w83792d_driver;
  1020. client->flags = 0;
  1021. /* Now, we do the remaining detection. */
  1022. /* The w83792d may be stuck in some other bank than bank 0. This may
  1023. make reading other information impossible. Specify a force=... or
  1024. force_*=... parameter, and the Winbond will be reset to the right
  1025. bank. */
  1026. if (kind < 0) {
  1027. if (w83792d_read_value(client, W83792D_REG_CONFIG) & 0x80) {
  1028. dev_warn(dev, "Detection failed at step 3\n");
  1029. goto ERROR1;
  1030. }
  1031. val1 = w83792d_read_value(client, W83792D_REG_BANK);
  1032. val2 = w83792d_read_value(client, W83792D_REG_CHIPMAN);
  1033. /* Check for Winbond ID if in bank 0 */
  1034. if (!(val1 & 0x07)) { /* is Bank0 */
  1035. if (((!(val1 & 0x80)) && (val2 != 0xa3)) ||
  1036. ((val1 & 0x80) && (val2 != 0x5c))) {
  1037. goto ERROR1;
  1038. }
  1039. }
  1040. /* If Winbond chip, address of chip and W83792D_REG_I2C_ADDR
  1041. should match */
  1042. if (w83792d_read_value(client,
  1043. W83792D_REG_I2C_ADDR) != address) {
  1044. dev_warn(dev, "Detection failed at step 5\n");
  1045. goto ERROR1;
  1046. }
  1047. }
  1048. /* We have either had a force parameter, or we have already detected the
  1049. Winbond. Put it now into bank 0 and Vendor ID High Byte */
  1050. w83792d_write_value(client,
  1051. W83792D_REG_BANK,
  1052. (w83792d_read_value(client,
  1053. W83792D_REG_BANK) & 0x78) | 0x80);
  1054. /* Determine the chip type. */
  1055. if (kind <= 0) {
  1056. /* get vendor ID */
  1057. val2 = w83792d_read_value(client, W83792D_REG_CHIPMAN);
  1058. if (val2 != 0x5c) { /* the vendor is NOT Winbond */
  1059. goto ERROR1;
  1060. }
  1061. val1 = w83792d_read_value(client, W83792D_REG_WCHIPID);
  1062. if (val1 == 0x7a) {
  1063. kind = w83792d;
  1064. } else {
  1065. if (kind == 0)
  1066. dev_warn(dev,
  1067. "w83792d: Ignoring 'force' parameter for"
  1068. " unknown chip at adapter %d, address"
  1069. " 0x%02x\n", i2c_adapter_id(adapter),
  1070. address);
  1071. goto ERROR1;
  1072. }
  1073. }
  1074. if (kind == w83792d) {
  1075. client_name = "w83792d";
  1076. } else {
  1077. dev_err(dev, "w83792d: Internal error: unknown"
  1078. " kind (%d)?!?", kind);
  1079. goto ERROR1;
  1080. }
  1081. /* Fill in the remaining client fields and put into the global list */
  1082. strlcpy(client->name, client_name, I2C_NAME_SIZE);
  1083. data->type = kind;
  1084. data->valid = 0;
  1085. init_MUTEX(&data->update_lock);
  1086. /* Tell the I2C layer a new client has arrived */
  1087. if ((err = i2c_attach_client(client)))
  1088. goto ERROR1;
  1089. if ((err = w83792d_detect_subclients(adapter, address,
  1090. kind, client)))
  1091. goto ERROR2;
  1092. /* Initialize the chip */
  1093. w83792d_init_client(client);
  1094. /* A few vars need to be filled upon startup */
  1095. for (i = 0; i < 7; i++) {
  1096. data->fan_min[i] = w83792d_read_value(client,
  1097. W83792D_REG_FAN_MIN[i]);
  1098. }
  1099. /* Register sysfs hooks */
  1100. data->class_dev = hwmon_device_register(dev);
  1101. if (IS_ERR(data->class_dev)) {
  1102. err = PTR_ERR(data->class_dev);
  1103. goto ERROR3;
  1104. }
  1105. for (i = 0; i < 9; i++) {
  1106. device_create_file(dev, &sda_in_input[i].dev_attr);
  1107. device_create_file(dev, &sda_in_max[i].dev_attr);
  1108. device_create_file(dev, &sda_in_min[i].dev_attr);
  1109. }
  1110. for (i = 0; i < 3; i++)
  1111. device_create_file_fan(dev, i);
  1112. /* Read GPIO enable register to check if pins for fan 4,5 are used as
  1113. GPIO */
  1114. val1 = w83792d_read_value(client, W83792D_REG_GPIO_EN);
  1115. if (!(val1 & 0x40))
  1116. device_create_file_fan(dev, 3);
  1117. if (!(val1 & 0x20))
  1118. device_create_file_fan(dev, 4);
  1119. val1 = w83792d_read_value(client, W83792D_REG_PIN);
  1120. if (val1 & 0x40)
  1121. device_create_file_fan(dev, 5);
  1122. if (val1 & 0x04)
  1123. device_create_file_fan(dev, 6);
  1124. for (i = 0; i < 3; i++) {
  1125. device_create_file(dev, &sda_temp_input[i].dev_attr);
  1126. device_create_file(dev, &sda_temp_max[i].dev_attr);
  1127. device_create_file(dev, &sda_temp_max_hyst[i].dev_attr);
  1128. device_create_file(dev, &sda_thermal_cruise[i].dev_attr);
  1129. device_create_file(dev, &sda_tolerance[i].dev_attr);
  1130. }
  1131. device_create_file_alarms();
  1132. for (i = 0; i < ARRAY_SIZE(sda_pwm); i++) {
  1133. device_create_file(dev, &sda_pwm[i].dev_attr);
  1134. device_create_file(dev, &sda_pwm_enable[i].dev_attr);
  1135. device_create_file(dev, &sda_pwm_mode[i].dev_attr);
  1136. }
  1137. device_create_file_chassis();
  1138. device_create_file_chassis_clear();
  1139. for (i = 0; i < ARRAY_SIZE(sda_sf2_point); i++)
  1140. device_create_file(dev, &sda_sf2_point[i].dev_attr);
  1141. for (i = 0; i < ARRAY_SIZE(sda_sf2_level); i++)
  1142. device_create_file(dev, &sda_sf2_level[i].dev_attr);
  1143. return 0;
  1144. ERROR3:
  1145. if (data->lm75[0] != NULL) {
  1146. i2c_detach_client(data->lm75[0]);
  1147. kfree(data->lm75[0]);
  1148. }
  1149. if (data->lm75[1] != NULL) {
  1150. i2c_detach_client(data->lm75[1]);
  1151. kfree(data->lm75[1]);
  1152. }
  1153. ERROR2:
  1154. i2c_detach_client(client);
  1155. ERROR1:
  1156. kfree(data);
  1157. ERROR0:
  1158. return err;
  1159. }
  1160. static int
  1161. w83792d_detach_client(struct i2c_client *client)
  1162. {
  1163. struct w83792d_data *data = i2c_get_clientdata(client);
  1164. int err;
  1165. /* main client */
  1166. if (data)
  1167. hwmon_device_unregister(data->class_dev);
  1168. if ((err = i2c_detach_client(client)))
  1169. return err;
  1170. /* main client */
  1171. if (data)
  1172. kfree(data);
  1173. /* subclient */
  1174. else
  1175. kfree(client);
  1176. return 0;
  1177. }
  1178. static void
  1179. w83792d_init_client(struct i2c_client *client)
  1180. {
  1181. u8 temp2_cfg, temp3_cfg, vid_in_b;
  1182. if (init) {
  1183. w83792d_write_value(client, W83792D_REG_CONFIG, 0x80);
  1184. }
  1185. /* Clear the bit6 of W83792D_REG_VID_IN_B(set it into 0):
  1186. W83792D_REG_VID_IN_B bit6 = 0: the high/low limit of
  1187. vin0/vin1 can be modified by user;
  1188. W83792D_REG_VID_IN_B bit6 = 1: the high/low limit of
  1189. vin0/vin1 auto-updated, can NOT be modified by user. */
  1190. vid_in_b = w83792d_read_value(client, W83792D_REG_VID_IN_B);
  1191. w83792d_write_value(client, W83792D_REG_VID_IN_B,
  1192. vid_in_b & 0xbf);
  1193. temp2_cfg = w83792d_read_value(client, W83792D_REG_TEMP2_CONFIG);
  1194. temp3_cfg = w83792d_read_value(client, W83792D_REG_TEMP3_CONFIG);
  1195. w83792d_write_value(client, W83792D_REG_TEMP2_CONFIG,
  1196. temp2_cfg & 0xe6);
  1197. w83792d_write_value(client, W83792D_REG_TEMP3_CONFIG,
  1198. temp3_cfg & 0xe6);
  1199. /* Start monitoring */
  1200. w83792d_write_value(client, W83792D_REG_CONFIG,
  1201. (w83792d_read_value(client,
  1202. W83792D_REG_CONFIG) & 0xf7)
  1203. | 0x01);
  1204. }
  1205. static struct w83792d_data *w83792d_update_device(struct device *dev)
  1206. {
  1207. struct i2c_client *client = to_i2c_client(dev);
  1208. struct w83792d_data *data = i2c_get_clientdata(client);
  1209. int i, j;
  1210. u8 reg_array_tmp[4], pwm_array_tmp[7], reg_tmp;
  1211. down(&data->update_lock);
  1212. if (time_after
  1213. (jiffies - data->last_updated, (unsigned long) (HZ * 3))
  1214. || time_before(jiffies, data->last_updated) || !data->valid) {
  1215. dev_dbg(dev, "Starting device update\n");
  1216. /* Update the voltages measured value and limits */
  1217. for (i = 0; i < 9; i++) {
  1218. data->in[i] = w83792d_read_value(client,
  1219. W83792D_REG_IN[i]);
  1220. data->in_max[i] = w83792d_read_value(client,
  1221. W83792D_REG_IN_MAX[i]);
  1222. data->in_min[i] = w83792d_read_value(client,
  1223. W83792D_REG_IN_MIN[i]);
  1224. }
  1225. data->low_bits = w83792d_read_value(client,
  1226. W83792D_REG_LOW_BITS1) +
  1227. (w83792d_read_value(client,
  1228. W83792D_REG_LOW_BITS2) << 8);
  1229. for (i = 0; i < 7; i++) {
  1230. /* Update the Fan measured value and limits */
  1231. data->fan[i] = w83792d_read_value(client,
  1232. W83792D_REG_FAN[i]);
  1233. data->fan_min[i] = w83792d_read_value(client,
  1234. W83792D_REG_FAN_MIN[i]);
  1235. /* Update the PWM/DC Value and PWM/DC flag */
  1236. pwm_array_tmp[i] = w83792d_read_value(client,
  1237. W83792D_REG_PWM[i]);
  1238. data->pwm[i] = pwm_array_tmp[i] & 0x0f;
  1239. data->pwm_mode[i] = pwm_array_tmp[i] >> 7;
  1240. }
  1241. reg_tmp = w83792d_read_value(client, W83792D_REG_FAN_CFG);
  1242. data->pwmenable[0] = reg_tmp & 0x03;
  1243. data->pwmenable[1] = (reg_tmp>>2) & 0x03;
  1244. data->pwmenable[2] = (reg_tmp>>4) & 0x03;
  1245. for (i = 0; i < 3; i++) {
  1246. data->temp1[i] = w83792d_read_value(client,
  1247. W83792D_REG_TEMP1[i]);
  1248. }
  1249. for (i = 0; i < 2; i++) {
  1250. for (j = 0; j < 6; j++) {
  1251. data->temp_add[i][j] = w83792d_read_value(
  1252. client,W83792D_REG_TEMP_ADD[i][j]);
  1253. }
  1254. }
  1255. /* Update the Fan Divisor */
  1256. for (i = 0; i < 4; i++) {
  1257. reg_array_tmp[i] = w83792d_read_value(client,
  1258. W83792D_REG_FAN_DIV[i]);
  1259. }
  1260. data->fan_div[0] = reg_array_tmp[0] & 0x07;
  1261. data->fan_div[1] = (reg_array_tmp[0] >> 4) & 0x07;
  1262. data->fan_div[2] = reg_array_tmp[1] & 0x07;
  1263. data->fan_div[3] = (reg_array_tmp[1] >> 4) & 0x07;
  1264. data->fan_div[4] = reg_array_tmp[2] & 0x07;
  1265. data->fan_div[5] = (reg_array_tmp[2] >> 4) & 0x07;
  1266. data->fan_div[6] = reg_array_tmp[3] & 0x07;
  1267. /* Update the realtime status */
  1268. data->alarms = w83792d_read_value(client, W83792D_REG_ALARM1) +
  1269. (w83792d_read_value(client, W83792D_REG_ALARM2) << 8) +
  1270. (w83792d_read_value(client, W83792D_REG_ALARM3) << 16);
  1271. /* Update CaseOpen status and it's CLR_CHS. */
  1272. data->chassis = (w83792d_read_value(client,
  1273. W83792D_REG_CHASSIS) >> 5) & 0x01;
  1274. data->chassis_clear = (w83792d_read_value(client,
  1275. W83792D_REG_CHASSIS_CLR) >> 7) & 0x01;
  1276. /* Update Thermal Cruise/Smart Fan I target value */
  1277. for (i = 0; i < 3; i++) {
  1278. data->thermal_cruise[i] =
  1279. w83792d_read_value(client,
  1280. W83792D_REG_THERMAL[i]) & 0x7f;
  1281. }
  1282. /* Update Smart Fan I/II tolerance */
  1283. reg_tmp = w83792d_read_value(client, W83792D_REG_TOLERANCE[0]);
  1284. data->tolerance[0] = reg_tmp & 0x0f;
  1285. data->tolerance[1] = (reg_tmp >> 4) & 0x0f;
  1286. data->tolerance[2] = w83792d_read_value(client,
  1287. W83792D_REG_TOLERANCE[2]) & 0x0f;
  1288. /* Update Smart Fan II temperature points */
  1289. for (i = 0; i < 3; i++) {
  1290. for (j = 0; j < 4; j++) {
  1291. data->sf2_points[i][j] = w83792d_read_value(
  1292. client,W83792D_REG_POINTS[i][j]) & 0x7f;
  1293. }
  1294. }
  1295. /* Update Smart Fan II duty cycle levels */
  1296. for (i = 0; i < 3; i++) {
  1297. reg_tmp = w83792d_read_value(client,
  1298. W83792D_REG_LEVELS[i][0]);
  1299. data->sf2_levels[i][0] = reg_tmp & 0x0f;
  1300. data->sf2_levels[i][1] = (reg_tmp >> 4) & 0x0f;
  1301. reg_tmp = w83792d_read_value(client,
  1302. W83792D_REG_LEVELS[i][2]);
  1303. data->sf2_levels[i][2] = (reg_tmp >> 4) & 0x0f;
  1304. data->sf2_levels[i][3] = reg_tmp & 0x0f;
  1305. }
  1306. data->last_updated = jiffies;
  1307. data->valid = 1;
  1308. }
  1309. up(&data->update_lock);
  1310. #ifdef DEBUG
  1311. w83792d_print_debug(data, dev);
  1312. #endif
  1313. return data;
  1314. }
  1315. #ifdef DEBUG
  1316. static void w83792d_print_debug(struct w83792d_data *data, struct device *dev)
  1317. {
  1318. int i=0, j=0;
  1319. dev_dbg(dev, "==========The following is the debug message...========\n");
  1320. dev_dbg(dev, "9 set of Voltages: =====>\n");
  1321. for (i=0; i<9; i++) {
  1322. dev_dbg(dev, "vin[%d] is: 0x%x\n", i, data->in[i]);
  1323. dev_dbg(dev, "vin[%d] max is: 0x%x\n", i, data->in_max[i]);
  1324. dev_dbg(dev, "vin[%d] min is: 0x%x\n", i, data->in_min[i]);
  1325. }
  1326. dev_dbg(dev, "Low Bit1 is: 0x%x\n", data->low_bits & 0xff);
  1327. dev_dbg(dev, "Low Bit2 is: 0x%x\n", data->low_bits >> 8);
  1328. dev_dbg(dev, "7 set of Fan Counts and Duty Cycles: =====>\n");
  1329. for (i=0; i<7; i++) {
  1330. dev_dbg(dev, "fan[%d] is: 0x%x\n", i, data->fan[i]);
  1331. dev_dbg(dev, "fan[%d] min is: 0x%x\n", i, data->fan_min[i]);
  1332. dev_dbg(dev, "pwm[%d] is: 0x%x\n", i, data->pwm[i]);
  1333. dev_dbg(dev, "pwm_mode[%d] is: 0x%x\n", i, data->pwm_mode[i]);
  1334. }
  1335. dev_dbg(dev, "3 set of Temperatures: =====>\n");
  1336. for (i=0; i<3; i++) {
  1337. dev_dbg(dev, "temp1[%d] is: 0x%x\n", i, data->temp1[i]);
  1338. }
  1339. for (i=0; i<2; i++) {
  1340. for (j=0; j<6; j++) {
  1341. dev_dbg(dev, "temp_add[%d][%d] is: 0x%x\n", i, j,
  1342. data->temp_add[i][j]);
  1343. }
  1344. }
  1345. for (i=0; i<7; i++) {
  1346. dev_dbg(dev, "fan_div[%d] is: 0x%x\n", i, data->fan_div[i]);
  1347. }
  1348. dev_dbg(dev, "==========End of the debug message...==================\n");
  1349. dev_dbg(dev, "\n");
  1350. }
  1351. #endif
  1352. static int __init
  1353. sensors_w83792d_init(void)
  1354. {
  1355. return i2c_add_driver(&w83792d_driver);
  1356. }
  1357. static void __exit
  1358. sensors_w83792d_exit(void)
  1359. {
  1360. i2c_del_driver(&w83792d_driver);
  1361. }
  1362. MODULE_AUTHOR("Chunhao Huang @ Winbond <DZShen@Winbond.com.tw>");
  1363. MODULE_DESCRIPTION("W83792AD/D driver for linux-2.6");
  1364. MODULE_LICENSE("GPL");
  1365. module_init(sensors_w83792d_init);
  1366. module_exit(sensors_w83792d_exit);