mpc52xx_uart.c 38 KB

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  1. /*
  2. * Driver for the PSC of the Freescale MPC52xx PSCs configured as UARTs.
  3. *
  4. * FIXME According to the usermanual the status bits in the status register
  5. * are only updated when the peripherals access the FIFO and not when the
  6. * CPU access them. So since we use this bits to know when we stop writing
  7. * and reading, they may not be updated in-time and a race condition may
  8. * exists. But I haven't be able to prove this and I don't care. But if
  9. * any problem arises, it might worth checking. The TX/RX FIFO Stats
  10. * registers should be used in addition.
  11. * Update: Actually, they seem updated ... At least the bits we use.
  12. *
  13. *
  14. * Maintainer : Sylvain Munaut <tnt@246tNt.com>
  15. *
  16. * Some of the code has been inspired/copied from the 2.4 code written
  17. * by Dale Farnsworth <dfarnsworth@mvista.com>.
  18. *
  19. * Copyright (C) 2008 Freescale Semiconductor Inc.
  20. * John Rigby <jrigby@gmail.com>
  21. * Added support for MPC5121
  22. * Copyright (C) 2006 Secret Lab Technologies Ltd.
  23. * Grant Likely <grant.likely@secretlab.ca>
  24. * Copyright (C) 2004-2006 Sylvain Munaut <tnt@246tNt.com>
  25. * Copyright (C) 2003 MontaVista, Software, Inc.
  26. *
  27. * This file is licensed under the terms of the GNU General Public License
  28. * version 2. This program is licensed "as is" without any warranty of any
  29. * kind, whether express or implied.
  30. */
  31. /* Platform device Usage :
  32. *
  33. * Since PSCs can have multiple function, the correct driver for each one
  34. * is selected by calling mpc52xx_match_psc_function(...). The function
  35. * handled by this driver is "uart".
  36. *
  37. * The driver init all necessary registers to place the PSC in uart mode without
  38. * DCD. However, the pin multiplexing aren't changed and should be set either
  39. * by the bootloader or in the platform init code.
  40. *
  41. * The idx field must be equal to the PSC index (e.g. 0 for PSC1, 1 for PSC2,
  42. * and so on). So the PSC1 is mapped to /dev/ttyPSC0, PSC2 to /dev/ttyPSC1 and
  43. * so on. But be warned, it's an ABSOLUTE REQUIREMENT ! This is needed mainly
  44. * fpr the console code : without this 1:1 mapping, at early boot time, when we
  45. * are parsing the kernel args console=ttyPSC?, we wouldn't know which PSC it
  46. * will be mapped to.
  47. */
  48. /* OF Platform device Usage :
  49. *
  50. * This driver is only used for PSCs configured in uart mode. The device
  51. * tree will have a node for each PSC in uart mode w/ device_type = "serial"
  52. * and "mpc52xx-psc-uart" in the compatible string
  53. *
  54. * By default, PSC devices are enumerated in the order they are found. However
  55. * a particular PSC number can be forces by adding 'device_no = <port#>'
  56. * to the device node.
  57. *
  58. * The driver init all necessary registers to place the PSC in uart mode without
  59. * DCD. However, the pin multiplexing aren't changed and should be set either
  60. * by the bootloader or in the platform init code.
  61. */
  62. #undef DEBUG
  63. #include <linux/device.h>
  64. #include <linux/module.h>
  65. #include <linux/tty.h>
  66. #include <linux/serial.h>
  67. #include <linux/sysrq.h>
  68. #include <linux/console.h>
  69. #include <linux/delay.h>
  70. #include <linux/io.h>
  71. #if defined(CONFIG_PPC_MERGE)
  72. #include <linux/of.h>
  73. #include <linux/of_platform.h>
  74. #else
  75. #include <linux/platform_device.h>
  76. #endif
  77. #include <asm/mpc52xx.h>
  78. #include <asm/mpc512x.h>
  79. #include <asm/mpc52xx_psc.h>
  80. #if defined(CONFIG_SERIAL_MPC52xx_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
  81. #define SUPPORT_SYSRQ
  82. #endif
  83. #include <linux/serial_core.h>
  84. /* We've been assigned a range on the "Low-density serial ports" major */
  85. #define SERIAL_PSC_MAJOR 204
  86. #define SERIAL_PSC_MINOR 148
  87. #define ISR_PASS_LIMIT 256 /* Max number of iteration in the interrupt */
  88. static struct uart_port mpc52xx_uart_ports[MPC52xx_PSC_MAXNUM];
  89. /* Rem: - We use the read_status_mask as a shadow of
  90. * psc->mpc52xx_psc_imr
  91. * - It's important that is array is all zero on start as we
  92. * use it to know if it's initialized or not ! If it's not sure
  93. * it's cleared, then a memset(...,0,...) should be added to
  94. * the console_init
  95. */
  96. #if defined(CONFIG_PPC_MERGE)
  97. /* lookup table for matching device nodes to index numbers */
  98. static struct device_node *mpc52xx_uart_nodes[MPC52xx_PSC_MAXNUM];
  99. static void mpc52xx_uart_of_enumerate(void);
  100. #endif
  101. #define PSC(port) ((struct mpc52xx_psc __iomem *)((port)->membase))
  102. /* Forward declaration of the interruption handling routine */
  103. static irqreturn_t mpc52xx_uart_int(int irq, void *dev_id);
  104. /* Simple macro to test if a port is console or not. This one is taken
  105. * for serial_core.c and maybe should be moved to serial_core.h ? */
  106. #ifdef CONFIG_SERIAL_CORE_CONSOLE
  107. #define uart_console(port) \
  108. ((port)->cons && (port)->cons->index == (port)->line)
  109. #else
  110. #define uart_console(port) (0)
  111. #endif
  112. #if defined(CONFIG_PPC_MERGE)
  113. static struct of_device_id mpc52xx_uart_of_match[] = {
  114. #ifdef CONFIG_PPC_MPC52xx
  115. { .compatible = "fsl,mpc5200-psc-uart", .data = &mpc52xx_psc_ops, },
  116. /* binding used by old lite5200 device trees: */
  117. { .compatible = "mpc5200-psc-uart", .data = &mpc52xx_psc_ops, },
  118. /* binding used by efika: */
  119. { .compatible = "mpc5200-serial", .data = &mpc52xx_psc_ops, },
  120. #endif
  121. #ifdef CONFIG_PPC_MPC512x
  122. { .compatible = "fsl,mpc5121-psc-uart", .data = &mpc512x_psc_ops, },
  123. {},
  124. #endif
  125. };
  126. #if defined(CONFIG_PPC_MERGE)
  127. static const struct of_device_id mpc52xx_uart_of_match[] = {
  128. {.type = "serial",
  129. .compatible = "mpc5200-psc-uart",
  130. #endif
  131. {},
  132. };
  133. #endif
  134. #endif
  135. /* ======================================================================== */
  136. /* PSC fifo operations for isolating differences between 52xx and 512x */
  137. /* ======================================================================== */
  138. struct psc_ops {
  139. void (*fifo_init)(struct uart_port *port);
  140. int (*raw_rx_rdy)(struct uart_port *port);
  141. int (*raw_tx_rdy)(struct uart_port *port);
  142. int (*rx_rdy)(struct uart_port *port);
  143. int (*tx_rdy)(struct uart_port *port);
  144. int (*tx_empty)(struct uart_port *port);
  145. void (*stop_rx)(struct uart_port *port);
  146. void (*start_tx)(struct uart_port *port);
  147. void (*stop_tx)(struct uart_port *port);
  148. void (*rx_clr_irq)(struct uart_port *port);
  149. void (*tx_clr_irq)(struct uart_port *port);
  150. void (*write_char)(struct uart_port *port, unsigned char c);
  151. unsigned char (*read_char)(struct uart_port *port);
  152. void (*cw_disable_ints)(struct uart_port *port);
  153. void (*cw_restore_ints)(struct uart_port *port);
  154. unsigned long (*getuartclk)(void *p);
  155. };
  156. #ifdef CONFIG_PPC_MPC52xx
  157. #define FIFO_52xx(port) ((struct mpc52xx_psc_fifo __iomem *)(PSC(port)+1))
  158. static void mpc52xx_psc_fifo_init(struct uart_port *port)
  159. {
  160. struct mpc52xx_psc __iomem *psc = PSC(port);
  161. struct mpc52xx_psc_fifo __iomem *fifo = FIFO_52xx(port);
  162. /* /32 prescaler */
  163. out_be16(&psc->mpc52xx_psc_clock_select, 0xdd00);
  164. out_8(&fifo->rfcntl, 0x00);
  165. out_be16(&fifo->rfalarm, 0x1ff);
  166. out_8(&fifo->tfcntl, 0x07);
  167. out_be16(&fifo->tfalarm, 0x80);
  168. port->read_status_mask |= MPC52xx_PSC_IMR_RXRDY | MPC52xx_PSC_IMR_TXRDY;
  169. out_be16(&psc->mpc52xx_psc_imr, port->read_status_mask);
  170. }
  171. static int mpc52xx_psc_raw_rx_rdy(struct uart_port *port)
  172. {
  173. return in_be16(&PSC(port)->mpc52xx_psc_status)
  174. & MPC52xx_PSC_SR_RXRDY;
  175. }
  176. static int mpc52xx_psc_raw_tx_rdy(struct uart_port *port)
  177. {
  178. return in_be16(&PSC(port)->mpc52xx_psc_status)
  179. & MPC52xx_PSC_SR_TXRDY;
  180. }
  181. static int mpc52xx_psc_rx_rdy(struct uart_port *port)
  182. {
  183. return in_be16(&PSC(port)->mpc52xx_psc_isr)
  184. & port->read_status_mask
  185. & MPC52xx_PSC_IMR_RXRDY;
  186. }
  187. static int mpc52xx_psc_tx_rdy(struct uart_port *port)
  188. {
  189. return in_be16(&PSC(port)->mpc52xx_psc_isr)
  190. & port->read_status_mask
  191. & MPC52xx_PSC_IMR_TXRDY;
  192. }
  193. static int mpc52xx_psc_tx_empty(struct uart_port *port)
  194. {
  195. return in_be16(&PSC(port)->mpc52xx_psc_status)
  196. & MPC52xx_PSC_SR_TXEMP;
  197. }
  198. static void mpc52xx_psc_start_tx(struct uart_port *port)
  199. {
  200. port->read_status_mask |= MPC52xx_PSC_IMR_TXRDY;
  201. out_be16(&PSC(port)->mpc52xx_psc_imr, port->read_status_mask);
  202. }
  203. static void mpc52xx_psc_stop_tx(struct uart_port *port)
  204. {
  205. port->read_status_mask &= ~MPC52xx_PSC_IMR_TXRDY;
  206. out_be16(&PSC(port)->mpc52xx_psc_imr, port->read_status_mask);
  207. }
  208. static void mpc52xx_psc_stop_rx(struct uart_port *port)
  209. {
  210. port->read_status_mask &= ~MPC52xx_PSC_IMR_RXRDY;
  211. out_be16(&PSC(port)->mpc52xx_psc_imr, port->read_status_mask);
  212. }
  213. static void mpc52xx_psc_rx_clr_irq(struct uart_port *port)
  214. {
  215. }
  216. static void mpc52xx_psc_tx_clr_irq(struct uart_port *port)
  217. {
  218. }
  219. static void mpc52xx_psc_write_char(struct uart_port *port, unsigned char c)
  220. {
  221. out_8(&PSC(port)->mpc52xx_psc_buffer_8, c);
  222. }
  223. static unsigned char mpc52xx_psc_read_char(struct uart_port *port)
  224. {
  225. return in_8(&PSC(port)->mpc52xx_psc_buffer_8);
  226. }
  227. static void mpc52xx_psc_cw_disable_ints(struct uart_port *port)
  228. {
  229. out_be16(&PSC(port)->mpc52xx_psc_imr, 0);
  230. }
  231. static void mpc52xx_psc_cw_restore_ints(struct uart_port *port)
  232. {
  233. out_be16(&PSC(port)->mpc52xx_psc_imr, port->read_status_mask);
  234. }
  235. /* Search for bus-frequency property in this node or a parent */
  236. static unsigned long mpc52xx_getuartclk(void *p)
  237. {
  238. #if defined(CONFIG_PPC_MERGE)
  239. /*
  240. * 5200 UARTs have a / 32 prescaler
  241. * but the generic serial code assumes 16
  242. * so return ipb freq / 2
  243. */
  244. return mpc52xx_find_ipb_freq(p) / 2;
  245. #else
  246. pr_debug("unexpected call to mpc52xx_getuartclk with arch/ppc\n");
  247. return NULL;
  248. #endif
  249. }
  250. static struct psc_ops mpc52xx_psc_ops = {
  251. .fifo_init = mpc52xx_psc_fifo_init,
  252. .raw_rx_rdy = mpc52xx_psc_raw_rx_rdy,
  253. .raw_tx_rdy = mpc52xx_psc_raw_tx_rdy,
  254. .rx_rdy = mpc52xx_psc_rx_rdy,
  255. .tx_rdy = mpc52xx_psc_tx_rdy,
  256. .tx_empty = mpc52xx_psc_tx_empty,
  257. .stop_rx = mpc52xx_psc_stop_rx,
  258. .start_tx = mpc52xx_psc_start_tx,
  259. .stop_tx = mpc52xx_psc_stop_tx,
  260. .rx_clr_irq = mpc52xx_psc_rx_clr_irq,
  261. .tx_clr_irq = mpc52xx_psc_tx_clr_irq,
  262. .write_char = mpc52xx_psc_write_char,
  263. .read_char = mpc52xx_psc_read_char,
  264. .cw_disable_ints = mpc52xx_psc_cw_disable_ints,
  265. .cw_restore_ints = mpc52xx_psc_cw_restore_ints,
  266. .getuartclk = mpc52xx_getuartclk,
  267. };
  268. #endif /* CONFIG_MPC52xx */
  269. #ifdef CONFIG_PPC_MPC512x
  270. #define FIFO_512x(port) ((struct mpc512x_psc_fifo __iomem *)(PSC(port)+1))
  271. static void mpc512x_psc_fifo_init(struct uart_port *port)
  272. {
  273. out_be32(&FIFO_512x(port)->txcmd, MPC512x_PSC_FIFO_RESET_SLICE);
  274. out_be32(&FIFO_512x(port)->txcmd, MPC512x_PSC_FIFO_ENABLE_SLICE);
  275. out_be32(&FIFO_512x(port)->txalarm, 1);
  276. out_be32(&FIFO_512x(port)->tximr, 0);
  277. out_be32(&FIFO_512x(port)->rxcmd, MPC512x_PSC_FIFO_RESET_SLICE);
  278. out_be32(&FIFO_512x(port)->rxcmd, MPC512x_PSC_FIFO_ENABLE_SLICE);
  279. out_be32(&FIFO_512x(port)->rxalarm, 1);
  280. out_be32(&FIFO_512x(port)->rximr, 0);
  281. out_be32(&FIFO_512x(port)->tximr, MPC512x_PSC_FIFO_ALARM);
  282. out_be32(&FIFO_512x(port)->rximr, MPC512x_PSC_FIFO_ALARM);
  283. }
  284. static int mpc512x_psc_raw_rx_rdy(struct uart_port *port)
  285. {
  286. return !(in_be32(&FIFO_512x(port)->rxsr) & MPC512x_PSC_FIFO_EMPTY);
  287. }
  288. static int mpc512x_psc_raw_tx_rdy(struct uart_port *port)
  289. {
  290. return !(in_be32(&FIFO_512x(port)->txsr) & MPC512x_PSC_FIFO_FULL);
  291. }
  292. static int mpc512x_psc_rx_rdy(struct uart_port *port)
  293. {
  294. return in_be32(&FIFO_512x(port)->rxsr)
  295. & in_be32(&FIFO_512x(port)->rximr)
  296. & MPC512x_PSC_FIFO_ALARM;
  297. }
  298. static int mpc512x_psc_tx_rdy(struct uart_port *port)
  299. {
  300. return in_be32(&FIFO_512x(port)->txsr)
  301. & in_be32(&FIFO_512x(port)->tximr)
  302. & MPC512x_PSC_FIFO_ALARM;
  303. }
  304. static int mpc512x_psc_tx_empty(struct uart_port *port)
  305. {
  306. return in_be32(&FIFO_512x(port)->txsr)
  307. & MPC512x_PSC_FIFO_EMPTY;
  308. }
  309. static void mpc512x_psc_stop_rx(struct uart_port *port)
  310. {
  311. unsigned long rx_fifo_imr;
  312. rx_fifo_imr = in_be32(&FIFO_512x(port)->rximr);
  313. rx_fifo_imr &= ~MPC512x_PSC_FIFO_ALARM;
  314. out_be32(&FIFO_512x(port)->rximr, rx_fifo_imr);
  315. }
  316. static void mpc512x_psc_start_tx(struct uart_port *port)
  317. {
  318. unsigned long tx_fifo_imr;
  319. tx_fifo_imr = in_be32(&FIFO_512x(port)->tximr);
  320. tx_fifo_imr |= MPC512x_PSC_FIFO_ALARM;
  321. out_be32(&FIFO_512x(port)->tximr, tx_fifo_imr);
  322. }
  323. static void mpc512x_psc_stop_tx(struct uart_port *port)
  324. {
  325. unsigned long tx_fifo_imr;
  326. tx_fifo_imr = in_be32(&FIFO_512x(port)->tximr);
  327. tx_fifo_imr &= ~MPC512x_PSC_FIFO_ALARM;
  328. out_be32(&FIFO_512x(port)->tximr, tx_fifo_imr);
  329. }
  330. static void mpc512x_psc_rx_clr_irq(struct uart_port *port)
  331. {
  332. out_be32(&FIFO_512x(port)->rxisr, in_be32(&FIFO_512x(port)->rxisr));
  333. }
  334. static void mpc512x_psc_tx_clr_irq(struct uart_port *port)
  335. {
  336. out_be32(&FIFO_512x(port)->txisr, in_be32(&FIFO_512x(port)->txisr));
  337. }
  338. static void mpc512x_psc_write_char(struct uart_port *port, unsigned char c)
  339. {
  340. out_8(&FIFO_512x(port)->txdata_8, c);
  341. }
  342. static unsigned char mpc512x_psc_read_char(struct uart_port *port)
  343. {
  344. return in_8(&FIFO_512x(port)->rxdata_8);
  345. }
  346. static void mpc512x_psc_cw_disable_ints(struct uart_port *port)
  347. {
  348. port->read_status_mask =
  349. in_be32(&FIFO_512x(port)->tximr) << 16 |
  350. in_be32(&FIFO_512x(port)->rximr);
  351. out_be32(&FIFO_512x(port)->tximr, 0);
  352. out_be32(&FIFO_512x(port)->rximr, 0);
  353. }
  354. static void mpc512x_psc_cw_restore_ints(struct uart_port *port)
  355. {
  356. out_be32(&FIFO_512x(port)->tximr,
  357. (port->read_status_mask >> 16) & 0x7f);
  358. out_be32(&FIFO_512x(port)->rximr, port->read_status_mask & 0x7f);
  359. }
  360. static unsigned long mpc512x_getuartclk(void *p)
  361. {
  362. return mpc512x_find_ips_freq(p);
  363. }
  364. static struct psc_ops mpc512x_psc_ops = {
  365. .fifo_init = mpc512x_psc_fifo_init,
  366. .raw_rx_rdy = mpc512x_psc_raw_rx_rdy,
  367. .raw_tx_rdy = mpc512x_psc_raw_tx_rdy,
  368. .rx_rdy = mpc512x_psc_rx_rdy,
  369. .tx_rdy = mpc512x_psc_tx_rdy,
  370. .tx_empty = mpc512x_psc_tx_empty,
  371. .stop_rx = mpc512x_psc_stop_rx,
  372. .start_tx = mpc512x_psc_start_tx,
  373. .stop_tx = mpc512x_psc_stop_tx,
  374. .rx_clr_irq = mpc512x_psc_rx_clr_irq,
  375. .tx_clr_irq = mpc512x_psc_tx_clr_irq,
  376. .write_char = mpc512x_psc_write_char,
  377. .read_char = mpc512x_psc_read_char,
  378. .cw_disable_ints = mpc512x_psc_cw_disable_ints,
  379. .cw_restore_ints = mpc512x_psc_cw_restore_ints,
  380. .getuartclk = mpc512x_getuartclk,
  381. };
  382. #endif
  383. static struct psc_ops *psc_ops;
  384. /* ======================================================================== */
  385. /* UART operations */
  386. /* ======================================================================== */
  387. static unsigned int
  388. mpc52xx_uart_tx_empty(struct uart_port *port)
  389. {
  390. return psc_ops->tx_empty(port) ? TIOCSER_TEMT : 0;
  391. }
  392. static void
  393. mpc52xx_uart_set_mctrl(struct uart_port *port, unsigned int mctrl)
  394. {
  395. /* Not implemented */
  396. }
  397. static unsigned int
  398. mpc52xx_uart_get_mctrl(struct uart_port *port)
  399. {
  400. /* Not implemented */
  401. return TIOCM_CTS | TIOCM_DSR | TIOCM_CAR;
  402. }
  403. static void
  404. mpc52xx_uart_stop_tx(struct uart_port *port)
  405. {
  406. /* port->lock taken by caller */
  407. psc_ops->stop_tx(port);
  408. }
  409. static void
  410. mpc52xx_uart_start_tx(struct uart_port *port)
  411. {
  412. /* port->lock taken by caller */
  413. psc_ops->start_tx(port);
  414. }
  415. static void
  416. mpc52xx_uart_send_xchar(struct uart_port *port, char ch)
  417. {
  418. unsigned long flags;
  419. spin_lock_irqsave(&port->lock, flags);
  420. port->x_char = ch;
  421. if (ch) {
  422. /* Make sure tx interrupts are on */
  423. /* Truly necessary ??? They should be anyway */
  424. psc_ops->start_tx(port);
  425. }
  426. spin_unlock_irqrestore(&port->lock, flags);
  427. }
  428. static void
  429. mpc52xx_uart_stop_rx(struct uart_port *port)
  430. {
  431. /* port->lock taken by caller */
  432. psc_ops->stop_rx(port);
  433. }
  434. static void
  435. mpc52xx_uart_enable_ms(struct uart_port *port)
  436. {
  437. /* Not implemented */
  438. }
  439. static void
  440. mpc52xx_uart_break_ctl(struct uart_port *port, int ctl)
  441. {
  442. unsigned long flags;
  443. spin_lock_irqsave(&port->lock, flags);
  444. if (ctl == -1)
  445. out_8(&PSC(port)->command, MPC52xx_PSC_START_BRK);
  446. else
  447. out_8(&PSC(port)->command, MPC52xx_PSC_STOP_BRK);
  448. spin_unlock_irqrestore(&port->lock, flags);
  449. }
  450. static int
  451. mpc52xx_uart_startup(struct uart_port *port)
  452. {
  453. struct mpc52xx_psc __iomem *psc = PSC(port);
  454. int ret;
  455. /* Request IRQ */
  456. ret = request_irq(port->irq, mpc52xx_uart_int,
  457. IRQF_DISABLED | IRQF_SAMPLE_RANDOM | IRQF_SHARED,
  458. "mpc52xx_psc_uart", port);
  459. if (ret)
  460. return ret;
  461. /* Reset/activate the port, clear and enable interrupts */
  462. out_8(&psc->command, MPC52xx_PSC_RST_RX);
  463. out_8(&psc->command, MPC52xx_PSC_RST_TX);
  464. out_be32(&psc->sicr, 0); /* UART mode DCD ignored */
  465. psc_ops->fifo_init(port);
  466. out_8(&psc->command, MPC52xx_PSC_TX_ENABLE);
  467. out_8(&psc->command, MPC52xx_PSC_RX_ENABLE);
  468. return 0;
  469. }
  470. static void
  471. mpc52xx_uart_shutdown(struct uart_port *port)
  472. {
  473. struct mpc52xx_psc __iomem *psc = PSC(port);
  474. /* Shut down the port. Leave TX active if on a console port */
  475. out_8(&psc->command, MPC52xx_PSC_RST_RX);
  476. if (!uart_console(port))
  477. out_8(&psc->command, MPC52xx_PSC_RST_TX);
  478. port->read_status_mask = 0;
  479. out_be16(&psc->mpc52xx_psc_imr, port->read_status_mask);
  480. /* Release interrupt */
  481. free_irq(port->irq, port);
  482. }
  483. static void
  484. mpc52xx_uart_set_termios(struct uart_port *port, struct ktermios *new,
  485. struct ktermios *old)
  486. {
  487. struct mpc52xx_psc __iomem *psc = PSC(port);
  488. unsigned long flags;
  489. unsigned char mr1, mr2;
  490. unsigned short ctr;
  491. unsigned int j, baud, quot;
  492. /* Prepare what we're gonna write */
  493. mr1 = 0;
  494. switch (new->c_cflag & CSIZE) {
  495. case CS5: mr1 |= MPC52xx_PSC_MODE_5_BITS;
  496. break;
  497. case CS6: mr1 |= MPC52xx_PSC_MODE_6_BITS;
  498. break;
  499. case CS7: mr1 |= MPC52xx_PSC_MODE_7_BITS;
  500. break;
  501. case CS8:
  502. default: mr1 |= MPC52xx_PSC_MODE_8_BITS;
  503. }
  504. if (new->c_cflag & PARENB) {
  505. mr1 |= (new->c_cflag & PARODD) ?
  506. MPC52xx_PSC_MODE_PARODD : MPC52xx_PSC_MODE_PAREVEN;
  507. } else
  508. mr1 |= MPC52xx_PSC_MODE_PARNONE;
  509. mr2 = 0;
  510. if (new->c_cflag & CSTOPB)
  511. mr2 |= MPC52xx_PSC_MODE_TWO_STOP;
  512. else
  513. mr2 |= ((new->c_cflag & CSIZE) == CS5) ?
  514. MPC52xx_PSC_MODE_ONE_STOP_5_BITS :
  515. MPC52xx_PSC_MODE_ONE_STOP;
  516. baud = uart_get_baud_rate(port, new, old, 0, port->uartclk/16);
  517. quot = uart_get_divisor(port, baud);
  518. ctr = quot & 0xffff;
  519. /* Get the lock */
  520. spin_lock_irqsave(&port->lock, flags);
  521. /* Update the per-port timeout */
  522. uart_update_timeout(port, new->c_cflag, baud);
  523. /* Do our best to flush TX & RX, so we don't loose anything */
  524. /* But we don't wait indefinitly ! */
  525. j = 5000000; /* Maximum wait */
  526. /* FIXME Can't receive chars since set_termios might be called at early
  527. * boot for the console, all stuff is not yet ready to receive at that
  528. * time and that just makes the kernel oops */
  529. /* while (j-- && mpc52xx_uart_int_rx_chars(port)); */
  530. while (!mpc52xx_uart_tx_empty(port) && --j)
  531. udelay(1);
  532. if (!j)
  533. printk(KERN_ERR "mpc52xx_uart.c: "
  534. "Unable to flush RX & TX fifos in-time in set_termios."
  535. "Some chars may have been lost.\n");
  536. /* Reset the TX & RX */
  537. out_8(&psc->command, MPC52xx_PSC_RST_RX);
  538. out_8(&psc->command, MPC52xx_PSC_RST_TX);
  539. /* Send new mode settings */
  540. out_8(&psc->command, MPC52xx_PSC_SEL_MODE_REG_1);
  541. out_8(&psc->mode, mr1);
  542. out_8(&psc->mode, mr2);
  543. out_8(&psc->ctur, ctr >> 8);
  544. out_8(&psc->ctlr, ctr & 0xff);
  545. /* Reenable TX & RX */
  546. out_8(&psc->command, MPC52xx_PSC_TX_ENABLE);
  547. out_8(&psc->command, MPC52xx_PSC_RX_ENABLE);
  548. /* We're all set, release the lock */
  549. spin_unlock_irqrestore(&port->lock, flags);
  550. }
  551. static const char *
  552. mpc52xx_uart_type(struct uart_port *port)
  553. {
  554. return port->type == PORT_MPC52xx ? "MPC52xx PSC" : NULL;
  555. }
  556. static void
  557. mpc52xx_uart_release_port(struct uart_port *port)
  558. {
  559. /* remapped by us ? */
  560. if (port->flags & UPF_IOREMAP) {
  561. iounmap(port->membase);
  562. port->membase = NULL;
  563. }
  564. release_mem_region(port->mapbase, sizeof(struct mpc52xx_psc));
  565. }
  566. static int
  567. mpc52xx_uart_request_port(struct uart_port *port)
  568. {
  569. int err;
  570. if (port->flags & UPF_IOREMAP) /* Need to remap ? */
  571. port->membase = ioremap(port->mapbase,
  572. sizeof(struct mpc52xx_psc));
  573. if (!port->membase)
  574. return -EINVAL;
  575. err = request_mem_region(port->mapbase, sizeof(struct mpc52xx_psc),
  576. "mpc52xx_psc_uart") != NULL ? 0 : -EBUSY;
  577. if (err && (port->flags & UPF_IOREMAP)) {
  578. iounmap(port->membase);
  579. port->membase = NULL;
  580. }
  581. return err;
  582. }
  583. static void
  584. mpc52xx_uart_config_port(struct uart_port *port, int flags)
  585. {
  586. if ((flags & UART_CONFIG_TYPE)
  587. && (mpc52xx_uart_request_port(port) == 0))
  588. port->type = PORT_MPC52xx;
  589. }
  590. static int
  591. mpc52xx_uart_verify_port(struct uart_port *port, struct serial_struct *ser)
  592. {
  593. if (ser->type != PORT_UNKNOWN && ser->type != PORT_MPC52xx)
  594. return -EINVAL;
  595. if ((ser->irq != port->irq) ||
  596. (ser->io_type != SERIAL_IO_MEM) ||
  597. (ser->baud_base != port->uartclk) ||
  598. (ser->iomem_base != (void *)port->mapbase) ||
  599. (ser->hub6 != 0))
  600. return -EINVAL;
  601. return 0;
  602. }
  603. static struct uart_ops mpc52xx_uart_ops = {
  604. .tx_empty = mpc52xx_uart_tx_empty,
  605. .set_mctrl = mpc52xx_uart_set_mctrl,
  606. .get_mctrl = mpc52xx_uart_get_mctrl,
  607. .stop_tx = mpc52xx_uart_stop_tx,
  608. .start_tx = mpc52xx_uart_start_tx,
  609. .send_xchar = mpc52xx_uart_send_xchar,
  610. .stop_rx = mpc52xx_uart_stop_rx,
  611. .enable_ms = mpc52xx_uart_enable_ms,
  612. .break_ctl = mpc52xx_uart_break_ctl,
  613. .startup = mpc52xx_uart_startup,
  614. .shutdown = mpc52xx_uart_shutdown,
  615. .set_termios = mpc52xx_uart_set_termios,
  616. /* .pm = mpc52xx_uart_pm, Not supported yet */
  617. /* .set_wake = mpc52xx_uart_set_wake, Not supported yet */
  618. .type = mpc52xx_uart_type,
  619. .release_port = mpc52xx_uart_release_port,
  620. .request_port = mpc52xx_uart_request_port,
  621. .config_port = mpc52xx_uart_config_port,
  622. .verify_port = mpc52xx_uart_verify_port
  623. };
  624. /* ======================================================================== */
  625. /* Interrupt handling */
  626. /* ======================================================================== */
  627. static inline int
  628. mpc52xx_uart_int_rx_chars(struct uart_port *port)
  629. {
  630. struct tty_struct *tty = port->info->tty;
  631. unsigned char ch, flag;
  632. unsigned short status;
  633. /* While we can read, do so ! */
  634. while (psc_ops->raw_rx_rdy(port)) {
  635. /* Get the char */
  636. ch = psc_ops->read_char(port);
  637. /* Handle sysreq char */
  638. #ifdef SUPPORT_SYSRQ
  639. if (uart_handle_sysrq_char(port, ch)) {
  640. port->sysrq = 0;
  641. continue;
  642. }
  643. #endif
  644. /* Store it */
  645. flag = TTY_NORMAL;
  646. port->icount.rx++;
  647. status = in_be16(&PSC(port)->mpc52xx_psc_status);
  648. if (status & (MPC52xx_PSC_SR_PE |
  649. MPC52xx_PSC_SR_FE |
  650. MPC52xx_PSC_SR_RB)) {
  651. if (status & MPC52xx_PSC_SR_RB) {
  652. flag = TTY_BREAK;
  653. uart_handle_break(port);
  654. } else if (status & MPC52xx_PSC_SR_PE)
  655. flag = TTY_PARITY;
  656. else if (status & MPC52xx_PSC_SR_FE)
  657. flag = TTY_FRAME;
  658. /* Clear error condition */
  659. out_8(&PSC(port)->command, MPC52xx_PSC_RST_ERR_STAT);
  660. }
  661. tty_insert_flip_char(tty, ch, flag);
  662. if (status & MPC52xx_PSC_SR_OE) {
  663. /*
  664. * Overrun is special, since it's
  665. * reported immediately, and doesn't
  666. * affect the current character
  667. */
  668. tty_insert_flip_char(tty, 0, TTY_OVERRUN);
  669. }
  670. }
  671. tty_flip_buffer_push(tty);
  672. return psc_ops->raw_rx_rdy(port);
  673. }
  674. static inline int
  675. mpc52xx_uart_int_tx_chars(struct uart_port *port)
  676. {
  677. struct circ_buf *xmit = &port->info->xmit;
  678. /* Process out of band chars */
  679. if (port->x_char) {
  680. psc_ops->write_char(port, port->x_char);
  681. port->icount.tx++;
  682. port->x_char = 0;
  683. return 1;
  684. }
  685. /* Nothing to do ? */
  686. if (uart_circ_empty(xmit) || uart_tx_stopped(port)) {
  687. mpc52xx_uart_stop_tx(port);
  688. return 0;
  689. }
  690. /* Send chars */
  691. while (psc_ops->raw_tx_rdy(port)) {
  692. psc_ops->write_char(port, xmit->buf[xmit->tail]);
  693. xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
  694. port->icount.tx++;
  695. if (uart_circ_empty(xmit))
  696. break;
  697. }
  698. /* Wake up */
  699. if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
  700. uart_write_wakeup(port);
  701. /* Maybe we're done after all */
  702. if (uart_circ_empty(xmit)) {
  703. mpc52xx_uart_stop_tx(port);
  704. return 0;
  705. }
  706. return 1;
  707. }
  708. static irqreturn_t
  709. mpc52xx_uart_int(int irq, void *dev_id)
  710. {
  711. struct uart_port *port = dev_id;
  712. unsigned long pass = ISR_PASS_LIMIT;
  713. unsigned int keepgoing;
  714. spin_lock(&port->lock);
  715. /* While we have stuff to do, we continue */
  716. do {
  717. /* If we don't find anything to do, we stop */
  718. keepgoing = 0;
  719. psc_ops->rx_clr_irq(port);
  720. if (psc_ops->rx_rdy(port))
  721. keepgoing |= mpc52xx_uart_int_rx_chars(port);
  722. psc_ops->tx_clr_irq(port);
  723. if (psc_ops->tx_rdy(port))
  724. keepgoing |= mpc52xx_uart_int_tx_chars(port);
  725. /* Limit number of iteration */
  726. if (!(--pass))
  727. keepgoing = 0;
  728. } while (keepgoing);
  729. spin_unlock(&port->lock);
  730. return IRQ_HANDLED;
  731. }
  732. /* ======================================================================== */
  733. /* Console ( if applicable ) */
  734. /* ======================================================================== */
  735. #ifdef CONFIG_SERIAL_MPC52xx_CONSOLE
  736. static void __init
  737. mpc52xx_console_get_options(struct uart_port *port,
  738. int *baud, int *parity, int *bits, int *flow)
  739. {
  740. struct mpc52xx_psc __iomem *psc = PSC(port);
  741. unsigned char mr1;
  742. pr_debug("mpc52xx_console_get_options(port=%p)\n", port);
  743. /* Read the mode registers */
  744. out_8(&psc->command, MPC52xx_PSC_SEL_MODE_REG_1);
  745. mr1 = in_8(&psc->mode);
  746. /* CT{U,L}R are write-only ! */
  747. *baud = CONFIG_SERIAL_MPC52xx_CONSOLE_BAUD;
  748. #if !defined(CONFIG_PPC_MERGE)
  749. if (__res.bi_baudrate)
  750. *baud = __res.bi_baudrate;
  751. #endif
  752. /* Parse them */
  753. switch (mr1 & MPC52xx_PSC_MODE_BITS_MASK) {
  754. case MPC52xx_PSC_MODE_5_BITS:
  755. *bits = 5;
  756. break;
  757. case MPC52xx_PSC_MODE_6_BITS:
  758. *bits = 6;
  759. break;
  760. case MPC52xx_PSC_MODE_7_BITS:
  761. *bits = 7;
  762. break;
  763. case MPC52xx_PSC_MODE_8_BITS:
  764. default:
  765. *bits = 8;
  766. }
  767. if (mr1 & MPC52xx_PSC_MODE_PARNONE)
  768. *parity = 'n';
  769. else
  770. *parity = mr1 & MPC52xx_PSC_MODE_PARODD ? 'o' : 'e';
  771. }
  772. static void
  773. mpc52xx_console_write(struct console *co, const char *s, unsigned int count)
  774. {
  775. struct uart_port *port = &mpc52xx_uart_ports[co->index];
  776. unsigned int i, j;
  777. /* Disable interrupts */
  778. psc_ops->cw_disable_ints(port);
  779. /* Wait the TX buffer to be empty */
  780. j = 5000000; /* Maximum wait */
  781. while (!mpc52xx_uart_tx_empty(port) && --j)
  782. udelay(1);
  783. /* Write all the chars */
  784. for (i = 0; i < count; i++, s++) {
  785. /* Line return handling */
  786. if (*s == '\n')
  787. psc_ops->write_char(port, '\r');
  788. /* Send the char */
  789. psc_ops->write_char(port, *s);
  790. /* Wait the TX buffer to be empty */
  791. j = 20000; /* Maximum wait */
  792. while (!mpc52xx_uart_tx_empty(port) && --j)
  793. udelay(1);
  794. }
  795. /* Restore interrupt state */
  796. psc_ops->cw_restore_ints(port);
  797. }
  798. #if !defined(CONFIG_PPC_MERGE)
  799. static int __init
  800. mpc52xx_console_setup(struct console *co, char *options)
  801. {
  802. struct uart_port *port = &mpc52xx_uart_ports[co->index];
  803. int baud = CONFIG_SERIAL_MPC52xx_CONSOLE_BAUD;
  804. int bits = 8;
  805. int parity = 'n';
  806. int flow = 'n';
  807. if (co->index < 0 || co->index >= MPC52xx_PSC_MAXNUM)
  808. return -EINVAL;
  809. /* Basic port init. Needed since we use some uart_??? func before
  810. * real init for early access */
  811. spin_lock_init(&port->lock);
  812. port->uartclk = __res.bi_ipbfreq / 2; /* Look at CTLR doc */
  813. port->ops = &mpc52xx_uart_ops;
  814. port->mapbase = MPC52xx_PA(MPC52xx_PSCx_OFFSET(co->index+1));
  815. /* We ioremap ourself */
  816. port->membase = ioremap(port->mapbase, MPC52xx_PSC_SIZE);
  817. if (port->membase == NULL)
  818. return -EINVAL;
  819. /* Setup the port parameters accoding to options */
  820. if (options)
  821. uart_parse_options(options, &baud, &parity, &bits, &flow);
  822. else
  823. mpc52xx_console_get_options(port, &baud, &parity, &bits, &flow);
  824. return uart_set_options(port, co, baud, parity, bits, flow);
  825. }
  826. #else
  827. static int __init
  828. mpc52xx_console_setup(struct console *co, char *options)
  829. {
  830. struct uart_port *port = &mpc52xx_uart_ports[co->index];
  831. struct device_node *np = mpc52xx_uart_nodes[co->index];
  832. unsigned int uartclk;
  833. struct resource res;
  834. int ret;
  835. int baud = CONFIG_SERIAL_MPC52xx_CONSOLE_BAUD;
  836. int bits = 8;
  837. int parity = 'n';
  838. int flow = 'n';
  839. pr_debug("mpc52xx_console_setup co=%p, co->index=%i, options=%s\n",
  840. co, co->index, options);
  841. if ((co->index < 0) || (co->index > MPC52xx_PSC_MAXNUM)) {
  842. pr_debug("PSC%x out of range\n", co->index);
  843. return -EINVAL;
  844. }
  845. if (!np) {
  846. pr_debug("PSC%x not found in device tree\n", co->index);
  847. return -EINVAL;
  848. }
  849. pr_debug("Console on ttyPSC%x is %s\n",
  850. co->index, mpc52xx_uart_nodes[co->index]->full_name);
  851. /* Fetch register locations */
  852. ret = of_address_to_resource(np, 0, &res);
  853. if (ret) {
  854. pr_debug("Could not get resources for PSC%x\n", co->index);
  855. return ret;
  856. }
  857. uartclk = psc_ops->getuartclk(np);
  858. if (uartclk == 0) {
  859. pr_debug("Could not find uart clock frequency!\n");
  860. return -EINVAL;
  861. }
  862. /* Basic port init. Needed since we use some uart_??? func before
  863. * real init for early access */
  864. spin_lock_init(&port->lock);
  865. port->uartclk = uartclk;
  866. port->ops = &mpc52xx_uart_ops;
  867. port->mapbase = res.start;
  868. port->membase = ioremap(res.start, sizeof(struct mpc52xx_psc));
  869. port->irq = irq_of_parse_and_map(np, 0);
  870. if (port->membase == NULL)
  871. return -EINVAL;
  872. pr_debug("mpc52xx-psc uart at %p, mapped to %p, irq=%x, freq=%i\n",
  873. (void *)port->mapbase, port->membase,
  874. port->irq, port->uartclk);
  875. /* Setup the port parameters accoding to options */
  876. if (options)
  877. uart_parse_options(options, &baud, &parity, &bits, &flow);
  878. else
  879. mpc52xx_console_get_options(port, &baud, &parity, &bits, &flow);
  880. pr_debug("Setting console parameters: %i %i%c1 flow=%c\n",
  881. baud, bits, parity, flow);
  882. return uart_set_options(port, co, baud, parity, bits, flow);
  883. }
  884. #endif /* defined(CONFIG_PPC_MERGE) */
  885. static struct uart_driver mpc52xx_uart_driver;
  886. static struct console mpc52xx_console = {
  887. .name = "ttyPSC",
  888. .write = mpc52xx_console_write,
  889. .device = uart_console_device,
  890. .setup = mpc52xx_console_setup,
  891. .flags = CON_PRINTBUFFER,
  892. .index = -1, /* Specified on the cmdline (e.g. console=ttyPSC0) */
  893. .data = &mpc52xx_uart_driver,
  894. };
  895. static int __init
  896. mpc52xx_console_init(void)
  897. {
  898. #if defined(CONFIG_PPC_MERGE)
  899. mpc52xx_uart_of_enumerate();
  900. #endif
  901. register_console(&mpc52xx_console);
  902. return 0;
  903. }
  904. console_initcall(mpc52xx_console_init);
  905. #define MPC52xx_PSC_CONSOLE &mpc52xx_console
  906. #else
  907. #define MPC52xx_PSC_CONSOLE NULL
  908. #endif
  909. /* ======================================================================== */
  910. /* UART Driver */
  911. /* ======================================================================== */
  912. static struct uart_driver mpc52xx_uart_driver = {
  913. .driver_name = "mpc52xx_psc_uart",
  914. .dev_name = "ttyPSC",
  915. .major = SERIAL_PSC_MAJOR,
  916. .minor = SERIAL_PSC_MINOR,
  917. .nr = MPC52xx_PSC_MAXNUM,
  918. .cons = MPC52xx_PSC_CONSOLE,
  919. };
  920. #if !defined(CONFIG_PPC_MERGE)
  921. /* ======================================================================== */
  922. /* Platform Driver */
  923. /* ======================================================================== */
  924. static int __devinit
  925. mpc52xx_uart_probe(struct platform_device *dev)
  926. {
  927. struct resource *res = dev->resource;
  928. struct uart_port *port = NULL;
  929. int i, idx, ret;
  930. /* Check validity & presence */
  931. idx = dev->id;
  932. if (idx < 0 || idx >= MPC52xx_PSC_MAXNUM)
  933. return -EINVAL;
  934. if (!mpc52xx_match_psc_function(idx, "uart"))
  935. return -ENODEV;
  936. /* Init the port structure */
  937. port = &mpc52xx_uart_ports[idx];
  938. spin_lock_init(&port->lock);
  939. port->uartclk = __res.bi_ipbfreq / 2; /* Look at CTLR doc */
  940. port->fifosize = 512;
  941. port->iotype = UPIO_MEM;
  942. port->flags = UPF_BOOT_AUTOCONF |
  943. (uart_console(port) ? 0 : UPF_IOREMAP);
  944. port->line = idx;
  945. port->ops = &mpc52xx_uart_ops;
  946. port->dev = &dev->dev;
  947. /* Search for IRQ and mapbase */
  948. for (i = 0 ; i < dev->num_resources ; i++, res++) {
  949. if (res->flags & IORESOURCE_MEM)
  950. port->mapbase = res->start;
  951. else if (res->flags & IORESOURCE_IRQ)
  952. port->irq = res->start;
  953. }
  954. if (!port->irq || !port->mapbase)
  955. return -EINVAL;
  956. /* Add the port to the uart sub-system */
  957. ret = uart_add_one_port(&mpc52xx_uart_driver, port);
  958. if (!ret)
  959. platform_set_drvdata(dev, (void *)port);
  960. return ret;
  961. }
  962. static int
  963. mpc52xx_uart_remove(struct platform_device *dev)
  964. {
  965. struct uart_port *port = (struct uart_port *) platform_get_drvdata(dev);
  966. platform_set_drvdata(dev, NULL);
  967. if (port)
  968. uart_remove_one_port(&mpc52xx_uart_driver, port);
  969. return 0;
  970. }
  971. #ifdef CONFIG_PM
  972. static int
  973. mpc52xx_uart_suspend(struct platform_device *dev, pm_message_t state)
  974. {
  975. struct uart_port *port = (struct uart_port *) platform_get_drvdata(dev);
  976. if (port)
  977. uart_suspend_port(&mpc52xx_uart_driver, port);
  978. return 0;
  979. }
  980. static int
  981. mpc52xx_uart_resume(struct platform_device *dev)
  982. {
  983. struct uart_port *port = (struct uart_port *) platform_get_drvdata(dev);
  984. if (port)
  985. uart_resume_port(&mpc52xx_uart_driver, port);
  986. return 0;
  987. }
  988. #endif
  989. static struct platform_driver mpc52xx_uart_platform_driver = {
  990. .probe = mpc52xx_uart_probe,
  991. .remove = mpc52xx_uart_remove,
  992. #ifdef CONFIG_PM
  993. .suspend = mpc52xx_uart_suspend,
  994. .resume = mpc52xx_uart_resume,
  995. #endif
  996. .driver = {
  997. .owner = THIS_MODULE,
  998. .name = "mpc52xx-psc",
  999. },
  1000. };
  1001. #endif /* !defined(CONFIG_PPC_MERGE) */
  1002. #if defined(CONFIG_PPC_MERGE)
  1003. /* ======================================================================== */
  1004. /* OF Platform Driver */
  1005. /* ======================================================================== */
  1006. static int __devinit
  1007. mpc52xx_uart_of_probe(struct of_device *op, const struct of_device_id *match)
  1008. {
  1009. int idx = -1;
  1010. unsigned int uartclk;
  1011. struct uart_port *port = NULL;
  1012. struct resource res;
  1013. int ret;
  1014. dev_dbg(&op->dev, "mpc52xx_uart_probe(op=%p, match=%p)\n", op, match);
  1015. /* Check validity & presence */
  1016. for (idx = 0; idx < MPC52xx_PSC_MAXNUM; idx++)
  1017. if (mpc52xx_uart_nodes[idx] == op->node)
  1018. break;
  1019. if (idx >= MPC52xx_PSC_MAXNUM)
  1020. return -EINVAL;
  1021. pr_debug("Found %s assigned to ttyPSC%x\n",
  1022. mpc52xx_uart_nodes[idx]->full_name, idx);
  1023. uartclk = psc_ops->getuartclk(op->node);
  1024. if (uartclk == 0) {
  1025. dev_dbg(&op->dev, "Could not find uart clock frequency!\n");
  1026. return -EINVAL;
  1027. }
  1028. /* Init the port structure */
  1029. port = &mpc52xx_uart_ports[idx];
  1030. spin_lock_init(&port->lock);
  1031. port->uartclk = uartclk;
  1032. port->fifosize = 512;
  1033. port->iotype = UPIO_MEM;
  1034. port->flags = UPF_BOOT_AUTOCONF |
  1035. (uart_console(port) ? 0 : UPF_IOREMAP);
  1036. port->line = idx;
  1037. port->ops = &mpc52xx_uart_ops;
  1038. port->dev = &op->dev;
  1039. /* Search for IRQ and mapbase */
  1040. ret = of_address_to_resource(op->node, 0, &res);
  1041. if (ret)
  1042. return ret;
  1043. port->mapbase = res.start;
  1044. port->irq = irq_of_parse_and_map(op->node, 0);
  1045. dev_dbg(&op->dev, "mpc52xx-psc uart at %p, irq=%x, freq=%i\n",
  1046. (void *)port->mapbase, port->irq, port->uartclk);
  1047. if ((port->irq == NO_IRQ) || !port->mapbase) {
  1048. printk(KERN_ERR "Could not allocate resources for PSC\n");
  1049. return -EINVAL;
  1050. }
  1051. /* Add the port to the uart sub-system */
  1052. ret = uart_add_one_port(&mpc52xx_uart_driver, port);
  1053. if (!ret)
  1054. dev_set_drvdata(&op->dev, (void *)port);
  1055. return ret;
  1056. }
  1057. static int
  1058. mpc52xx_uart_of_remove(struct of_device *op)
  1059. {
  1060. struct uart_port *port = dev_get_drvdata(&op->dev);
  1061. dev_set_drvdata(&op->dev, NULL);
  1062. if (port) {
  1063. uart_remove_one_port(&mpc52xx_uart_driver, port);
  1064. irq_dispose_mapping(port->irq);
  1065. }
  1066. return 0;
  1067. }
  1068. #ifdef CONFIG_PM
  1069. static int
  1070. mpc52xx_uart_of_suspend(struct of_device *op, pm_message_t state)
  1071. {
  1072. struct uart_port *port = (struct uart_port *) dev_get_drvdata(&op->dev);
  1073. if (port)
  1074. uart_suspend_port(&mpc52xx_uart_driver, port);
  1075. return 0;
  1076. }
  1077. static int
  1078. mpc52xx_uart_of_resume(struct of_device *op)
  1079. {
  1080. struct uart_port *port = (struct uart_port *) dev_get_drvdata(&op->dev);
  1081. if (port)
  1082. uart_resume_port(&mpc52xx_uart_driver, port);
  1083. return 0;
  1084. }
  1085. #endif
  1086. static void
  1087. mpc52xx_uart_of_assign(struct device_node *np, int idx)
  1088. {
  1089. int free_idx = -1;
  1090. int i;
  1091. /* Find the first free node */
  1092. for (i = 0; i < MPC52xx_PSC_MAXNUM; i++) {
  1093. if (mpc52xx_uart_nodes[i] == NULL) {
  1094. free_idx = i;
  1095. break;
  1096. }
  1097. }
  1098. if ((idx < 0) || (idx >= MPC52xx_PSC_MAXNUM))
  1099. idx = free_idx;
  1100. if (idx < 0)
  1101. return; /* No free slot; abort */
  1102. of_node_get(np);
  1103. /* If the slot is already occupied, then swap slots */
  1104. if (mpc52xx_uart_nodes[idx] && (free_idx != -1))
  1105. mpc52xx_uart_nodes[free_idx] = mpc52xx_uart_nodes[idx];
  1106. mpc52xx_uart_nodes[idx] = np;
  1107. }
  1108. static void
  1109. mpc52xx_uart_of_enumerate(void)
  1110. {
  1111. static int enum_done;
  1112. struct device_node *np;
  1113. const unsigned int *devno;
  1114. const struct of_device_id *match;
  1115. int i;
  1116. if (enum_done)
  1117. return;
  1118. for_each_node_by_type(np, "serial") {
  1119. match = of_match_node(mpc52xx_uart_of_match, np);
  1120. if (!match)
  1121. continue;
  1122. psc_ops = match->data;
  1123. /* Is a particular device number requested? */
  1124. devno = of_get_property(np, "port-number", NULL);
  1125. mpc52xx_uart_of_assign(np, devno ? *devno : -1);
  1126. }
  1127. enum_done = 1;
  1128. for (i = 0; i < MPC52xx_PSC_MAXNUM; i++) {
  1129. if (mpc52xx_uart_nodes[i])
  1130. pr_debug("%s assigned to ttyPSC%x\n",
  1131. mpc52xx_uart_nodes[i]->full_name, i);
  1132. }
  1133. }
  1134. MODULE_DEVICE_TABLE(of, mpc52xx_uart_of_match);
  1135. static struct of_platform_driver mpc52xx_uart_of_driver = {
  1136. .match_table = mpc52xx_uart_of_match,
  1137. .probe = mpc52xx_uart_of_probe,
  1138. .remove = mpc52xx_uart_of_remove,
  1139. #ifdef CONFIG_PM
  1140. .suspend = mpc52xx_uart_of_suspend,
  1141. .resume = mpc52xx_uart_of_resume,
  1142. #endif
  1143. .driver = {
  1144. .name = "mpc52xx-psc-uart",
  1145. },
  1146. };
  1147. #endif /* defined(CONFIG_PPC_MERGE) */
  1148. /* ======================================================================== */
  1149. /* Module */
  1150. /* ======================================================================== */
  1151. static int __init
  1152. mpc52xx_uart_init(void)
  1153. {
  1154. int ret;
  1155. printk(KERN_INFO "Serial: MPC52xx PSC UART driver\n");
  1156. ret = uart_register_driver(&mpc52xx_uart_driver);
  1157. if (ret) {
  1158. printk(KERN_ERR "%s: uart_register_driver failed (%i)\n",
  1159. __FILE__, ret);
  1160. return ret;
  1161. }
  1162. #if defined(CONFIG_PPC_MERGE)
  1163. mpc52xx_uart_of_enumerate();
  1164. ret = of_register_platform_driver(&mpc52xx_uart_of_driver);
  1165. if (ret) {
  1166. printk(KERN_ERR "%s: of_register_platform_driver failed (%i)\n",
  1167. __FILE__, ret);
  1168. uart_unregister_driver(&mpc52xx_uart_driver);
  1169. return ret;
  1170. }
  1171. #else
  1172. psc_ops = &mpc52xx_psc_ops;
  1173. ret = platform_driver_register(&mpc52xx_uart_platform_driver);
  1174. if (ret) {
  1175. printk(KERN_ERR "%s: platform_driver_register failed (%i)\n",
  1176. __FILE__, ret);
  1177. uart_unregister_driver(&mpc52xx_uart_driver);
  1178. return ret;
  1179. }
  1180. #endif
  1181. return 0;
  1182. }
  1183. static void __exit
  1184. mpc52xx_uart_exit(void)
  1185. {
  1186. #if defined(CONFIG_PPC_MERGE)
  1187. of_unregister_platform_driver(&mpc52xx_uart_of_driver);
  1188. #else
  1189. platform_driver_unregister(&mpc52xx_uart_platform_driver);
  1190. #endif
  1191. uart_unregister_driver(&mpc52xx_uart_driver);
  1192. }
  1193. module_init(mpc52xx_uart_init);
  1194. module_exit(mpc52xx_uart_exit);
  1195. MODULE_AUTHOR("Sylvain Munaut <tnt@246tNt.com>");
  1196. MODULE_DESCRIPTION("Freescale MPC52xx PSC UART");
  1197. MODULE_LICENSE("GPL");