Kconfig 8.5 KB

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  1. menu "Platform support"
  2. choice
  3. prompt "Machine type"
  4. depends on PPC64 || 6xx
  5. default PPC_MULTIPLATFORM
  6. config PPC_MULTIPLATFORM
  7. bool "Generic desktop/server/laptop"
  8. help
  9. Select this option if configuring for an IBM pSeries or
  10. RS/6000 machine, an Apple machine, or a PReP, CHRP,
  11. Maple or Cell-based machine.
  12. config PPC_82xx
  13. bool "Freescale 82xx"
  14. depends on 6xx
  15. select WANT_DEVICE_TREE
  16. config PPC_83xx
  17. bool "Freescale 83xx"
  18. depends on 6xx
  19. select FSL_SOC
  20. select MPC83xx
  21. select IPIC
  22. select WANT_DEVICE_TREE
  23. select FSL_EMB_PERFMON
  24. config PPC_86xx
  25. bool "Freescale 86xx"
  26. depends on 6xx
  27. select FSL_SOC
  28. select ALTIVEC
  29. help
  30. The Freescale E600 SoCs have 74xx cores.
  31. endchoice
  32. config CLASSIC32
  33. def_bool y
  34. depends on 6xx && PPC_MULTIPLATFORM
  35. source "arch/powerpc/platforms/pseries/Kconfig"
  36. source "arch/powerpc/platforms/iseries/Kconfig"
  37. source "arch/powerpc/platforms/chrp/Kconfig"
  38. source "arch/powerpc/platforms/512x/Kconfig"
  39. source "arch/powerpc/platforms/52xx/Kconfig"
  40. source "arch/powerpc/platforms/powermac/Kconfig"
  41. source "arch/powerpc/platforms/prep/Kconfig"
  42. source "arch/powerpc/platforms/maple/Kconfig"
  43. source "arch/powerpc/platforms/pasemi/Kconfig"
  44. source "arch/powerpc/platforms/celleb/Kconfig"
  45. source "arch/powerpc/platforms/ps3/Kconfig"
  46. source "arch/powerpc/platforms/cell/Kconfig"
  47. source "arch/powerpc/platforms/8xx/Kconfig"
  48. source "arch/powerpc/platforms/82xx/Kconfig"
  49. source "arch/powerpc/platforms/83xx/Kconfig"
  50. source "arch/powerpc/platforms/85xx/Kconfig"
  51. source "arch/powerpc/platforms/86xx/Kconfig"
  52. source "arch/powerpc/platforms/embedded6xx/Kconfig"
  53. source "arch/powerpc/platforms/44x/Kconfig"
  54. source "arch/powerpc/platforms/40x/Kconfig"
  55. config PPC_NATIVE
  56. bool
  57. depends on PPC_MULTIPLATFORM
  58. help
  59. Support for running natively on the hardware, i.e. without
  60. a hypervisor. This option is not user-selectable but should
  61. be selected by all platforms that need it.
  62. config UDBG_RTAS_CONSOLE
  63. bool "RTAS based debug console"
  64. depends on PPC_RTAS
  65. default n
  66. config PPC_UDBG_BEAT
  67. bool "BEAT based debug console"
  68. depends on PPC_CELLEB
  69. default n
  70. config XICS
  71. depends on PPC_PSERIES
  72. bool
  73. default y
  74. config IPIC
  75. bool
  76. default n
  77. config MPIC
  78. bool
  79. default n
  80. config MPIC_WEIRD
  81. bool
  82. default n
  83. config PPC_I8259
  84. bool
  85. default n
  86. config U3_DART
  87. bool
  88. depends on PPC_MULTIPLATFORM && PPC64
  89. default n
  90. config PPC_RTAS
  91. bool
  92. default n
  93. config RTAS_ERROR_LOGGING
  94. bool
  95. depends on PPC_RTAS
  96. default n
  97. config RTAS_PROC
  98. bool "Proc interface to RTAS"
  99. depends on PPC_RTAS
  100. default y
  101. config RTAS_FLASH
  102. tristate "Firmware flash interface"
  103. depends on PPC64 && RTAS_PROC
  104. config PPC_PMI
  105. tristate "Support for PMI"
  106. depends on PPC_IBM_CELL_BLADE
  107. help
  108. PMI (Platform Management Interrupt) is a way to
  109. communicate with the BMC (Baseboard Management Controller).
  110. It is used in some IBM Cell blades.
  111. default m
  112. config MMIO_NVRAM
  113. bool
  114. default n
  115. config MPIC_U3_HT_IRQS
  116. bool
  117. depends on PPC_MAPLE
  118. default y
  119. config MPIC_BROKEN_REGREAD
  120. bool
  121. depends on MPIC
  122. help
  123. This option enables a MPIC driver workaround for some chips
  124. that have a bug that causes some interrupt source information
  125. to not read back properly. It is safe to use on other chips as
  126. well, but enabling it uses about 8KB of memory to keep copies
  127. of the register contents in software.
  128. config IBMVIO
  129. depends on PPC_PSERIES || PPC_ISERIES
  130. bool
  131. default y
  132. config IBMEBUS
  133. depends on PPC_PSERIES
  134. bool "Support for GX bus based adapters"
  135. help
  136. Bus device driver for GX bus based adapters.
  137. config PPC_MPC106
  138. bool
  139. default n
  140. config PPC_970_NAP
  141. bool
  142. default n
  143. config PPC_INDIRECT_IO
  144. bool
  145. select GENERIC_IOMAP
  146. default n
  147. config GENERIC_IOMAP
  148. bool
  149. default n
  150. source "drivers/cpufreq/Kconfig"
  151. menu "CPU Frequency drivers"
  152. depends on CPU_FREQ
  153. config CPU_FREQ_PMAC
  154. bool "Support for Apple PowerBooks"
  155. depends on ADB_PMU && PPC32
  156. select CPU_FREQ_TABLE
  157. help
  158. This adds support for frequency switching on Apple PowerBooks,
  159. this currently includes some models of iBook & Titanium
  160. PowerBook.
  161. config CPU_FREQ_PMAC64
  162. bool "Support for some Apple G5s"
  163. depends on PPC_PMAC && PPC64
  164. select CPU_FREQ_TABLE
  165. help
  166. This adds support for frequency switching on Apple iMac G5,
  167. and some of the more recent desktop G5 machines as well.
  168. config PPC_PASEMI_CPUFREQ
  169. bool "Support for PA Semi PWRficient"
  170. depends on PPC_PASEMI
  171. default y
  172. select CPU_FREQ_TABLE
  173. help
  174. This adds the support for frequency switching on PA Semi
  175. PWRficient processors.
  176. endmenu
  177. config PPC601_SYNC_FIX
  178. bool "Workarounds for PPC601 bugs"
  179. depends on 6xx && (PPC_PREP || PPC_PMAC)
  180. help
  181. Some versions of the PPC601 (the first PowerPC chip) have bugs which
  182. mean that extra synchronization instructions are required near
  183. certain instructions, typically those that make major changes to the
  184. CPU state. These extra instructions reduce performance slightly.
  185. If you say N here, these extra instructions will not be included,
  186. resulting in a kernel which will run faster but may not run at all
  187. on some systems with the PPC601 chip.
  188. If in doubt, say Y here.
  189. config TAU
  190. bool "On-chip CPU temperature sensor support"
  191. depends on CLASSIC32
  192. help
  193. G3 and G4 processors have an on-chip temperature sensor called the
  194. 'Thermal Assist Unit (TAU)', which, in theory, can measure the on-die
  195. temperature within 2-4 degrees Celsius. This option shows the current
  196. on-die temperature in /proc/cpuinfo if the cpu supports it.
  197. Unfortunately, on some chip revisions, this sensor is very inaccurate
  198. and in many cases, does not work at all, so don't assume the cpu
  199. temp is actually what /proc/cpuinfo says it is.
  200. config TAU_INT
  201. bool "Interrupt driven TAU driver (DANGEROUS)"
  202. depends on TAU
  203. ---help---
  204. The TAU supports an interrupt driven mode which causes an interrupt
  205. whenever the temperature goes out of range. This is the fastest way
  206. to get notified the temp has exceeded a range. With this option off,
  207. a timer is used to re-check the temperature periodically.
  208. However, on some cpus it appears that the TAU interrupt hardware
  209. is buggy and can cause a situation which would lead unexplained hard
  210. lockups.
  211. Unless you are extending the TAU driver, or enjoy kernel/hardware
  212. debugging, leave this option off.
  213. config TAU_AVERAGE
  214. bool "Average high and low temp"
  215. depends on TAU
  216. ---help---
  217. The TAU hardware can compare the temperature to an upper and lower
  218. bound. The default behavior is to show both the upper and lower
  219. bound in /proc/cpuinfo. If the range is large, the temperature is
  220. either changing a lot, or the TAU hardware is broken (likely on some
  221. G4's). If the range is small (around 4 degrees), the temperature is
  222. relatively stable. If you say Y here, a single temperature value,
  223. halfway between the upper and lower bounds, will be reported in
  224. /proc/cpuinfo.
  225. If in doubt, say N here.
  226. config QUICC_ENGINE
  227. bool
  228. select PPC_LIB_RHEAP
  229. select CRC32
  230. help
  231. The QUICC Engine (QE) is a new generation of communications
  232. coprocessors on Freescale embedded CPUs (akin to CPM in older chips).
  233. Selecting this option means that you wish to build a kernel
  234. for a machine with a QE coprocessor.
  235. config CPM2
  236. bool "Enable support for the CPM2 (Communications Processor Module)"
  237. depends on MPC85xx || 8260
  238. select CPM
  239. select PPC_LIB_RHEAP
  240. help
  241. The CPM2 (Communications Processor Module) is a coprocessor on
  242. embedded CPUs made by Freescale. Selecting this option means that
  243. you wish to build a kernel for a machine with a CPM2 coprocessor
  244. on it (826x, 827x, 8560).
  245. config PPC_CPM_NEW_BINDING
  246. bool
  247. depends on CPM1 || CPM2
  248. help
  249. Select this if your board has been converted to use the new
  250. device tree bindings for CPM, and no longer needs the
  251. ioport callbacks or the platform device glue code.
  252. The fs_enet and cpm_uart drivers will be built as
  253. of_platform devices.
  254. config AXON_RAM
  255. tristate "Axon DDR2 memory device driver"
  256. depends on PPC_IBM_CELL_BLADE
  257. default m
  258. help
  259. It registers one block device per Axon's DDR2 memory bank found
  260. on a system. Block devices are called axonram?, their major and
  261. minor numbers are available in /proc/devices, /proc/partitions or
  262. in /sys/block/axonram?/dev.
  263. config FSL_ULI1575
  264. bool
  265. default n
  266. select GENERIC_ISA_DMA
  267. help
  268. Supports for the ULI1575 PCIe south bridge that exists on some
  269. Freescale reference boards. The boards all use the ULI in pretty
  270. much the same way.
  271. config CPM
  272. bool
  273. config OF_RTC
  274. bool
  275. help
  276. Uses information from the OF or flattened device tree to instatiate
  277. platform devices for direct mapped RTC chips like the DS1742 or DS1743.
  278. source "arch/powerpc/sysdev/bestcomm/Kconfig"
  279. endmenu