events.c 40 KB

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  1. /*
  2. * Xen event channels
  3. *
  4. * Xen models interrupts with abstract event channels. Because each
  5. * domain gets 1024 event channels, but NR_IRQ is not that large, we
  6. * must dynamically map irqs<->event channels. The event channels
  7. * interface with the rest of the kernel by defining a xen interrupt
  8. * chip. When an event is received, it is mapped to an irq and sent
  9. * through the normal interrupt processing path.
  10. *
  11. * There are four kinds of events which can be mapped to an event
  12. * channel:
  13. *
  14. * 1. Inter-domain notifications. This includes all the virtual
  15. * device events, since they're driven by front-ends in another domain
  16. * (typically dom0).
  17. * 2. VIRQs, typically used for timers. These are per-cpu events.
  18. * 3. IPIs.
  19. * 4. PIRQs - Hardware interrupts.
  20. *
  21. * Jeremy Fitzhardinge <jeremy@xensource.com>, XenSource Inc, 2007
  22. */
  23. #include <linux/linkage.h>
  24. #include <linux/interrupt.h>
  25. #include <linux/irq.h>
  26. #include <linux/module.h>
  27. #include <linux/string.h>
  28. #include <linux/bootmem.h>
  29. #include <linux/slab.h>
  30. #include <linux/irqnr.h>
  31. #include <linux/pci.h>
  32. #include <asm/desc.h>
  33. #include <asm/ptrace.h>
  34. #include <asm/irq.h>
  35. #include <asm/idle.h>
  36. #include <asm/io_apic.h>
  37. #include <asm/sync_bitops.h>
  38. #include <asm/xen/pci.h>
  39. #include <asm/xen/hypercall.h>
  40. #include <asm/xen/hypervisor.h>
  41. #include <xen/xen.h>
  42. #include <xen/hvm.h>
  43. #include <xen/xen-ops.h>
  44. #include <xen/events.h>
  45. #include <xen/interface/xen.h>
  46. #include <xen/interface/event_channel.h>
  47. #include <xen/interface/hvm/hvm_op.h>
  48. #include <xen/interface/hvm/params.h>
  49. /*
  50. * This lock protects updates to the following mapping and reference-count
  51. * arrays. The lock does not need to be acquired to read the mapping tables.
  52. */
  53. static DEFINE_MUTEX(irq_mapping_update_lock);
  54. static LIST_HEAD(xen_irq_list_head);
  55. /* IRQ <-> VIRQ mapping. */
  56. static DEFINE_PER_CPU(int [NR_VIRQS], virq_to_irq) = {[0 ... NR_VIRQS-1] = -1};
  57. /* IRQ <-> IPI mapping */
  58. static DEFINE_PER_CPU(int [XEN_NR_IPIS], ipi_to_irq) = {[0 ... XEN_NR_IPIS-1] = -1};
  59. /* Interrupt types. */
  60. enum xen_irq_type {
  61. IRQT_UNBOUND = 0,
  62. IRQT_PIRQ,
  63. IRQT_VIRQ,
  64. IRQT_IPI,
  65. IRQT_EVTCHN
  66. };
  67. /*
  68. * Packed IRQ information:
  69. * type - enum xen_irq_type
  70. * event channel - irq->event channel mapping
  71. * cpu - cpu this event channel is bound to
  72. * index - type-specific information:
  73. * PIRQ - vector, with MSB being "needs EIO", or physical IRQ of the HVM
  74. * guest, or GSI (real passthrough IRQ) of the device.
  75. * VIRQ - virq number
  76. * IPI - IPI vector
  77. * EVTCHN -
  78. */
  79. struct irq_info
  80. {
  81. struct list_head list;
  82. enum xen_irq_type type; /* type */
  83. unsigned irq;
  84. unsigned short evtchn; /* event channel */
  85. unsigned short cpu; /* cpu bound */
  86. union {
  87. unsigned short virq;
  88. enum ipi_vector ipi;
  89. struct {
  90. unsigned short pirq;
  91. unsigned short gsi;
  92. unsigned char vector;
  93. unsigned char flags;
  94. uint16_t domid;
  95. } pirq;
  96. } u;
  97. };
  98. #define PIRQ_NEEDS_EOI (1 << 0)
  99. #define PIRQ_SHAREABLE (1 << 1)
  100. static int *evtchn_to_irq;
  101. static DEFINE_PER_CPU(unsigned long [NR_EVENT_CHANNELS/BITS_PER_LONG],
  102. cpu_evtchn_mask);
  103. /* Xen will never allocate port zero for any purpose. */
  104. #define VALID_EVTCHN(chn) ((chn) != 0)
  105. static struct irq_chip xen_dynamic_chip;
  106. static struct irq_chip xen_percpu_chip;
  107. static struct irq_chip xen_pirq_chip;
  108. static void enable_dynirq(struct irq_data *data);
  109. static void disable_dynirq(struct irq_data *data);
  110. /* Get info for IRQ */
  111. static struct irq_info *info_for_irq(unsigned irq)
  112. {
  113. return irq_get_handler_data(irq);
  114. }
  115. /* Constructors for packed IRQ information. */
  116. static void xen_irq_info_common_init(struct irq_info *info,
  117. unsigned irq,
  118. enum xen_irq_type type,
  119. unsigned short evtchn,
  120. unsigned short cpu)
  121. {
  122. BUG_ON(info->type != IRQT_UNBOUND && info->type != type);
  123. info->type = type;
  124. info->irq = irq;
  125. info->evtchn = evtchn;
  126. info->cpu = cpu;
  127. evtchn_to_irq[evtchn] = irq;
  128. }
  129. static void xen_irq_info_evtchn_init(unsigned irq,
  130. unsigned short evtchn)
  131. {
  132. struct irq_info *info = info_for_irq(irq);
  133. xen_irq_info_common_init(info, irq, IRQT_EVTCHN, evtchn, 0);
  134. }
  135. static void xen_irq_info_ipi_init(unsigned cpu,
  136. unsigned irq,
  137. unsigned short evtchn,
  138. enum ipi_vector ipi)
  139. {
  140. struct irq_info *info = info_for_irq(irq);
  141. xen_irq_info_common_init(info, irq, IRQT_IPI, evtchn, 0);
  142. info->u.ipi = ipi;
  143. per_cpu(ipi_to_irq, cpu)[ipi] = irq;
  144. }
  145. static void xen_irq_info_virq_init(unsigned cpu,
  146. unsigned irq,
  147. unsigned short evtchn,
  148. unsigned short virq)
  149. {
  150. struct irq_info *info = info_for_irq(irq);
  151. xen_irq_info_common_init(info, irq, IRQT_VIRQ, evtchn, 0);
  152. info->u.virq = virq;
  153. per_cpu(virq_to_irq, cpu)[virq] = irq;
  154. }
  155. static void xen_irq_info_pirq_init(unsigned irq,
  156. unsigned short evtchn,
  157. unsigned short pirq,
  158. unsigned short gsi,
  159. unsigned short vector,
  160. uint16_t domid,
  161. unsigned char flags)
  162. {
  163. struct irq_info *info = info_for_irq(irq);
  164. xen_irq_info_common_init(info, irq, IRQT_PIRQ, evtchn, 0);
  165. info->u.pirq.pirq = pirq;
  166. info->u.pirq.gsi = gsi;
  167. info->u.pirq.vector = vector;
  168. info->u.pirq.domid = domid;
  169. info->u.pirq.flags = flags;
  170. }
  171. /*
  172. * Accessors for packed IRQ information.
  173. */
  174. static unsigned int evtchn_from_irq(unsigned irq)
  175. {
  176. if (unlikely(WARN(irq < 0 || irq >= nr_irqs, "Invalid irq %d!\n", irq)))
  177. return 0;
  178. return info_for_irq(irq)->evtchn;
  179. }
  180. unsigned irq_from_evtchn(unsigned int evtchn)
  181. {
  182. return evtchn_to_irq[evtchn];
  183. }
  184. EXPORT_SYMBOL_GPL(irq_from_evtchn);
  185. static enum ipi_vector ipi_from_irq(unsigned irq)
  186. {
  187. struct irq_info *info = info_for_irq(irq);
  188. BUG_ON(info == NULL);
  189. BUG_ON(info->type != IRQT_IPI);
  190. return info->u.ipi;
  191. }
  192. static unsigned virq_from_irq(unsigned irq)
  193. {
  194. struct irq_info *info = info_for_irq(irq);
  195. BUG_ON(info == NULL);
  196. BUG_ON(info->type != IRQT_VIRQ);
  197. return info->u.virq;
  198. }
  199. static unsigned pirq_from_irq(unsigned irq)
  200. {
  201. struct irq_info *info = info_for_irq(irq);
  202. BUG_ON(info == NULL);
  203. BUG_ON(info->type != IRQT_PIRQ);
  204. return info->u.pirq.pirq;
  205. }
  206. static enum xen_irq_type type_from_irq(unsigned irq)
  207. {
  208. return info_for_irq(irq)->type;
  209. }
  210. static unsigned cpu_from_irq(unsigned irq)
  211. {
  212. return info_for_irq(irq)->cpu;
  213. }
  214. static unsigned int cpu_from_evtchn(unsigned int evtchn)
  215. {
  216. int irq = evtchn_to_irq[evtchn];
  217. unsigned ret = 0;
  218. if (irq != -1)
  219. ret = cpu_from_irq(irq);
  220. return ret;
  221. }
  222. static bool pirq_needs_eoi(unsigned irq)
  223. {
  224. struct irq_info *info = info_for_irq(irq);
  225. BUG_ON(info->type != IRQT_PIRQ);
  226. return info->u.pirq.flags & PIRQ_NEEDS_EOI;
  227. }
  228. static inline unsigned long active_evtchns(unsigned int cpu,
  229. struct shared_info *sh,
  230. unsigned int idx)
  231. {
  232. return (sh->evtchn_pending[idx] &
  233. per_cpu(cpu_evtchn_mask, cpu)[idx] &
  234. ~sh->evtchn_mask[idx]);
  235. }
  236. static void bind_evtchn_to_cpu(unsigned int chn, unsigned int cpu)
  237. {
  238. int irq = evtchn_to_irq[chn];
  239. BUG_ON(irq == -1);
  240. #ifdef CONFIG_SMP
  241. cpumask_copy(irq_to_desc(irq)->irq_data.affinity, cpumask_of(cpu));
  242. #endif
  243. clear_bit(chn, per_cpu(cpu_evtchn_mask, cpu_from_irq(irq)));
  244. set_bit(chn, per_cpu(cpu_evtchn_mask, cpu));
  245. info_for_irq(irq)->cpu = cpu;
  246. }
  247. static void init_evtchn_cpu_bindings(void)
  248. {
  249. int i;
  250. #ifdef CONFIG_SMP
  251. struct irq_info *info;
  252. /* By default all event channels notify CPU#0. */
  253. list_for_each_entry(info, &xen_irq_list_head, list) {
  254. struct irq_desc *desc = irq_to_desc(info->irq);
  255. cpumask_copy(desc->irq_data.affinity, cpumask_of(0));
  256. }
  257. #endif
  258. for_each_possible_cpu(i)
  259. memset(per_cpu(cpu_evtchn_mask, i),
  260. (i == 0) ? ~0 : 0, sizeof(*per_cpu(cpu_evtchn_mask, i)));
  261. }
  262. static inline void clear_evtchn(int port)
  263. {
  264. struct shared_info *s = HYPERVISOR_shared_info;
  265. sync_clear_bit(port, &s->evtchn_pending[0]);
  266. }
  267. static inline void set_evtchn(int port)
  268. {
  269. struct shared_info *s = HYPERVISOR_shared_info;
  270. sync_set_bit(port, &s->evtchn_pending[0]);
  271. }
  272. static inline int test_evtchn(int port)
  273. {
  274. struct shared_info *s = HYPERVISOR_shared_info;
  275. return sync_test_bit(port, &s->evtchn_pending[0]);
  276. }
  277. /**
  278. * notify_remote_via_irq - send event to remote end of event channel via irq
  279. * @irq: irq of event channel to send event to
  280. *
  281. * Unlike notify_remote_via_evtchn(), this is safe to use across
  282. * save/restore. Notifications on a broken connection are silently
  283. * dropped.
  284. */
  285. void notify_remote_via_irq(int irq)
  286. {
  287. int evtchn = evtchn_from_irq(irq);
  288. if (VALID_EVTCHN(evtchn))
  289. notify_remote_via_evtchn(evtchn);
  290. }
  291. EXPORT_SYMBOL_GPL(notify_remote_via_irq);
  292. static void mask_evtchn(int port)
  293. {
  294. struct shared_info *s = HYPERVISOR_shared_info;
  295. sync_set_bit(port, &s->evtchn_mask[0]);
  296. }
  297. static void unmask_evtchn(int port)
  298. {
  299. struct shared_info *s = HYPERVISOR_shared_info;
  300. unsigned int cpu = get_cpu();
  301. BUG_ON(!irqs_disabled());
  302. /* Slow path (hypercall) if this is a non-local port. */
  303. if (unlikely(cpu != cpu_from_evtchn(port))) {
  304. struct evtchn_unmask unmask = { .port = port };
  305. (void)HYPERVISOR_event_channel_op(EVTCHNOP_unmask, &unmask);
  306. } else {
  307. struct vcpu_info *vcpu_info = __this_cpu_read(xen_vcpu);
  308. sync_clear_bit(port, &s->evtchn_mask[0]);
  309. /*
  310. * The following is basically the equivalent of
  311. * 'hw_resend_irq'. Just like a real IO-APIC we 'lose
  312. * the interrupt edge' if the channel is masked.
  313. */
  314. if (sync_test_bit(port, &s->evtchn_pending[0]) &&
  315. !sync_test_and_set_bit(port / BITS_PER_LONG,
  316. &vcpu_info->evtchn_pending_sel))
  317. vcpu_info->evtchn_upcall_pending = 1;
  318. }
  319. put_cpu();
  320. }
  321. static void xen_irq_init(unsigned irq)
  322. {
  323. struct irq_info *info;
  324. #ifdef CONFIG_SMP
  325. struct irq_desc *desc = irq_to_desc(irq);
  326. /* By default all event channels notify CPU#0. */
  327. cpumask_copy(desc->irq_data.affinity, cpumask_of(0));
  328. #endif
  329. info = kzalloc(sizeof(*info), GFP_KERNEL);
  330. if (info == NULL)
  331. panic("Unable to allocate metadata for IRQ%d\n", irq);
  332. info->type = IRQT_UNBOUND;
  333. irq_set_handler_data(irq, info);
  334. list_add_tail(&info->list, &xen_irq_list_head);
  335. }
  336. static int __must_check xen_allocate_irq_dynamic(void)
  337. {
  338. int first = 0;
  339. int irq;
  340. #ifdef CONFIG_X86_IO_APIC
  341. /*
  342. * For an HVM guest or domain 0 which see "real" (emulated or
  343. * actual respectively) GSIs we allocate dynamic IRQs
  344. * e.g. those corresponding to event channels or MSIs
  345. * etc. from the range above those "real" GSIs to avoid
  346. * collisions.
  347. */
  348. if (xen_initial_domain() || xen_hvm_domain())
  349. first = get_nr_irqs_gsi();
  350. #endif
  351. irq = irq_alloc_desc_from(first, -1);
  352. if (irq >= 0)
  353. xen_irq_init(irq);
  354. return irq;
  355. }
  356. static int __must_check xen_allocate_irq_gsi(unsigned gsi)
  357. {
  358. int irq;
  359. /*
  360. * A PV guest has no concept of a GSI (since it has no ACPI
  361. * nor access to/knowledge of the physical APICs). Therefore
  362. * all IRQs are dynamically allocated from the entire IRQ
  363. * space.
  364. */
  365. if (xen_pv_domain() && !xen_initial_domain())
  366. return xen_allocate_irq_dynamic();
  367. /* Legacy IRQ descriptors are already allocated by the arch. */
  368. if (gsi < NR_IRQS_LEGACY)
  369. irq = gsi;
  370. else
  371. irq = irq_alloc_desc_at(gsi, -1);
  372. xen_irq_init(irq);
  373. return irq;
  374. }
  375. static void xen_free_irq(unsigned irq)
  376. {
  377. struct irq_info *info = irq_get_handler_data(irq);
  378. list_del(&info->list);
  379. irq_set_handler_data(irq, NULL);
  380. kfree(info);
  381. /* Legacy IRQ descriptors are managed by the arch. */
  382. if (irq < NR_IRQS_LEGACY)
  383. return;
  384. irq_free_desc(irq);
  385. }
  386. static void pirq_query_unmask(int irq)
  387. {
  388. struct physdev_irq_status_query irq_status;
  389. struct irq_info *info = info_for_irq(irq);
  390. BUG_ON(info->type != IRQT_PIRQ);
  391. irq_status.irq = pirq_from_irq(irq);
  392. if (HYPERVISOR_physdev_op(PHYSDEVOP_irq_status_query, &irq_status))
  393. irq_status.flags = 0;
  394. info->u.pirq.flags &= ~PIRQ_NEEDS_EOI;
  395. if (irq_status.flags & XENIRQSTAT_needs_eoi)
  396. info->u.pirq.flags |= PIRQ_NEEDS_EOI;
  397. }
  398. static bool probing_irq(int irq)
  399. {
  400. struct irq_desc *desc = irq_to_desc(irq);
  401. return desc && desc->action == NULL;
  402. }
  403. static void eoi_pirq(struct irq_data *data)
  404. {
  405. int evtchn = evtchn_from_irq(data->irq);
  406. struct physdev_eoi eoi = { .irq = pirq_from_irq(data->irq) };
  407. int rc = 0;
  408. irq_move_irq(data);
  409. if (VALID_EVTCHN(evtchn))
  410. clear_evtchn(evtchn);
  411. if (pirq_needs_eoi(data->irq)) {
  412. rc = HYPERVISOR_physdev_op(PHYSDEVOP_eoi, &eoi);
  413. WARN_ON(rc);
  414. }
  415. }
  416. static void mask_ack_pirq(struct irq_data *data)
  417. {
  418. disable_dynirq(data);
  419. eoi_pirq(data);
  420. }
  421. static unsigned int __startup_pirq(unsigned int irq)
  422. {
  423. struct evtchn_bind_pirq bind_pirq;
  424. struct irq_info *info = info_for_irq(irq);
  425. int evtchn = evtchn_from_irq(irq);
  426. int rc;
  427. BUG_ON(info->type != IRQT_PIRQ);
  428. if (VALID_EVTCHN(evtchn))
  429. goto out;
  430. bind_pirq.pirq = pirq_from_irq(irq);
  431. /* NB. We are happy to share unless we are probing. */
  432. bind_pirq.flags = info->u.pirq.flags & PIRQ_SHAREABLE ?
  433. BIND_PIRQ__WILL_SHARE : 0;
  434. rc = HYPERVISOR_event_channel_op(EVTCHNOP_bind_pirq, &bind_pirq);
  435. if (rc != 0) {
  436. if (!probing_irq(irq))
  437. printk(KERN_INFO "Failed to obtain physical IRQ %d\n",
  438. irq);
  439. return 0;
  440. }
  441. evtchn = bind_pirq.port;
  442. pirq_query_unmask(irq);
  443. evtchn_to_irq[evtchn] = irq;
  444. bind_evtchn_to_cpu(evtchn, 0);
  445. info->evtchn = evtchn;
  446. out:
  447. unmask_evtchn(evtchn);
  448. eoi_pirq(irq_get_irq_data(irq));
  449. return 0;
  450. }
  451. static unsigned int startup_pirq(struct irq_data *data)
  452. {
  453. return __startup_pirq(data->irq);
  454. }
  455. static void shutdown_pirq(struct irq_data *data)
  456. {
  457. struct evtchn_close close;
  458. unsigned int irq = data->irq;
  459. struct irq_info *info = info_for_irq(irq);
  460. int evtchn = evtchn_from_irq(irq);
  461. BUG_ON(info->type != IRQT_PIRQ);
  462. if (!VALID_EVTCHN(evtchn))
  463. return;
  464. mask_evtchn(evtchn);
  465. close.port = evtchn;
  466. if (HYPERVISOR_event_channel_op(EVTCHNOP_close, &close) != 0)
  467. BUG();
  468. bind_evtchn_to_cpu(evtchn, 0);
  469. evtchn_to_irq[evtchn] = -1;
  470. info->evtchn = 0;
  471. }
  472. static void enable_pirq(struct irq_data *data)
  473. {
  474. startup_pirq(data);
  475. }
  476. static void disable_pirq(struct irq_data *data)
  477. {
  478. disable_dynirq(data);
  479. }
  480. static int find_irq_by_gsi(unsigned gsi)
  481. {
  482. struct irq_info *info;
  483. list_for_each_entry(info, &xen_irq_list_head, list) {
  484. if (info->type != IRQT_PIRQ)
  485. continue;
  486. if (info->u.pirq.gsi == gsi)
  487. return info->irq;
  488. }
  489. return -1;
  490. }
  491. /*
  492. * Do not make any assumptions regarding the relationship between the
  493. * IRQ number returned here and the Xen pirq argument.
  494. *
  495. * Note: We don't assign an event channel until the irq actually started
  496. * up. Return an existing irq if we've already got one for the gsi.
  497. *
  498. * Shareable implies level triggered, not shareable implies edge
  499. * triggered here.
  500. */
  501. int xen_bind_pirq_gsi_to_irq(unsigned gsi,
  502. unsigned pirq, int shareable, char *name)
  503. {
  504. int irq = -1;
  505. struct physdev_irq irq_op;
  506. mutex_lock(&irq_mapping_update_lock);
  507. irq = find_irq_by_gsi(gsi);
  508. if (irq != -1) {
  509. printk(KERN_INFO "xen_map_pirq_gsi: returning irq %d for gsi %u\n",
  510. irq, gsi);
  511. goto out; /* XXX need refcount? */
  512. }
  513. irq = xen_allocate_irq_gsi(gsi);
  514. if (irq < 0)
  515. goto out;
  516. irq_op.irq = irq;
  517. irq_op.vector = 0;
  518. /* Only the privileged domain can do this. For non-priv, the pcifront
  519. * driver provides a PCI bus that does the call to do exactly
  520. * this in the priv domain. */
  521. if (xen_initial_domain() &&
  522. HYPERVISOR_physdev_op(PHYSDEVOP_alloc_irq_vector, &irq_op)) {
  523. xen_free_irq(irq);
  524. irq = -ENOSPC;
  525. goto out;
  526. }
  527. xen_irq_info_pirq_init(irq, 0, pirq, gsi, irq_op.vector, DOMID_SELF,
  528. shareable ? PIRQ_SHAREABLE : 0);
  529. pirq_query_unmask(irq);
  530. /* We try to use the handler with the appropriate semantic for the
  531. * type of interrupt: if the interrupt is an edge triggered
  532. * interrupt we use handle_edge_irq.
  533. *
  534. * On the other hand if the interrupt is level triggered we use
  535. * handle_fasteoi_irq like the native code does for this kind of
  536. * interrupts.
  537. *
  538. * Depending on the Xen version, pirq_needs_eoi might return true
  539. * not only for level triggered interrupts but for edge triggered
  540. * interrupts too. In any case Xen always honors the eoi mechanism,
  541. * not injecting any more pirqs of the same kind if the first one
  542. * hasn't received an eoi yet. Therefore using the fasteoi handler
  543. * is the right choice either way.
  544. */
  545. if (shareable)
  546. irq_set_chip_and_handler_name(irq, &xen_pirq_chip,
  547. handle_fasteoi_irq, name);
  548. else
  549. irq_set_chip_and_handler_name(irq, &xen_pirq_chip,
  550. handle_edge_irq, name);
  551. out:
  552. mutex_unlock(&irq_mapping_update_lock);
  553. return irq;
  554. }
  555. #ifdef CONFIG_PCI_MSI
  556. int xen_allocate_pirq_msi(struct pci_dev *dev, struct msi_desc *msidesc)
  557. {
  558. int rc;
  559. struct physdev_get_free_pirq op_get_free_pirq;
  560. op_get_free_pirq.type = MAP_PIRQ_TYPE_MSI;
  561. rc = HYPERVISOR_physdev_op(PHYSDEVOP_get_free_pirq, &op_get_free_pirq);
  562. WARN_ONCE(rc == -ENOSYS,
  563. "hypervisor does not support the PHYSDEVOP_get_free_pirq interface\n");
  564. return rc ? -1 : op_get_free_pirq.pirq;
  565. }
  566. int xen_bind_pirq_msi_to_irq(struct pci_dev *dev, struct msi_desc *msidesc,
  567. int pirq, int vector, const char *name,
  568. domid_t domid)
  569. {
  570. int irq, ret;
  571. mutex_lock(&irq_mapping_update_lock);
  572. irq = xen_allocate_irq_dynamic();
  573. if (irq < 0)
  574. goto out;
  575. irq_set_chip_and_handler_name(irq, &xen_pirq_chip, handle_edge_irq,
  576. name);
  577. xen_irq_info_pirq_init(irq, 0, pirq, 0, vector, domid, 0);
  578. ret = irq_set_msi_desc(irq, msidesc);
  579. if (ret < 0)
  580. goto error_irq;
  581. out:
  582. mutex_unlock(&irq_mapping_update_lock);
  583. return irq;
  584. error_irq:
  585. mutex_unlock(&irq_mapping_update_lock);
  586. xen_free_irq(irq);
  587. return ret;
  588. }
  589. #endif
  590. int xen_destroy_irq(int irq)
  591. {
  592. struct irq_desc *desc;
  593. struct physdev_unmap_pirq unmap_irq;
  594. struct irq_info *info = info_for_irq(irq);
  595. int rc = -ENOENT;
  596. mutex_lock(&irq_mapping_update_lock);
  597. desc = irq_to_desc(irq);
  598. if (!desc)
  599. goto out;
  600. if (xen_initial_domain()) {
  601. unmap_irq.pirq = info->u.pirq.pirq;
  602. unmap_irq.domid = info->u.pirq.domid;
  603. rc = HYPERVISOR_physdev_op(PHYSDEVOP_unmap_pirq, &unmap_irq);
  604. /* If another domain quits without making the pci_disable_msix
  605. * call, the Xen hypervisor takes care of freeing the PIRQs
  606. * (free_domain_pirqs).
  607. */
  608. if ((rc == -ESRCH && info->u.pirq.domid != DOMID_SELF))
  609. printk(KERN_INFO "domain %d does not have %d anymore\n",
  610. info->u.pirq.domid, info->u.pirq.pirq);
  611. else if (rc) {
  612. printk(KERN_WARNING "unmap irq failed %d\n", rc);
  613. goto out;
  614. }
  615. }
  616. xen_free_irq(irq);
  617. out:
  618. mutex_unlock(&irq_mapping_update_lock);
  619. return rc;
  620. }
  621. int xen_irq_from_pirq(unsigned pirq)
  622. {
  623. int irq;
  624. struct irq_info *info;
  625. mutex_lock(&irq_mapping_update_lock);
  626. list_for_each_entry(info, &xen_irq_list_head, list) {
  627. if (info->type != IRQT_PIRQ)
  628. continue;
  629. irq = info->irq;
  630. if (info->u.pirq.pirq == pirq)
  631. goto out;
  632. }
  633. irq = -1;
  634. out:
  635. mutex_unlock(&irq_mapping_update_lock);
  636. return irq;
  637. }
  638. int xen_pirq_from_irq(unsigned irq)
  639. {
  640. return pirq_from_irq(irq);
  641. }
  642. EXPORT_SYMBOL_GPL(xen_pirq_from_irq);
  643. int bind_evtchn_to_irq(unsigned int evtchn)
  644. {
  645. int irq;
  646. mutex_lock(&irq_mapping_update_lock);
  647. irq = evtchn_to_irq[evtchn];
  648. if (irq == -1) {
  649. irq = xen_allocate_irq_dynamic();
  650. if (irq == -1)
  651. goto out;
  652. irq_set_chip_and_handler_name(irq, &xen_dynamic_chip,
  653. handle_edge_irq, "event");
  654. xen_irq_info_evtchn_init(irq, evtchn);
  655. }
  656. out:
  657. mutex_unlock(&irq_mapping_update_lock);
  658. return irq;
  659. }
  660. EXPORT_SYMBOL_GPL(bind_evtchn_to_irq);
  661. static int bind_ipi_to_irq(unsigned int ipi, unsigned int cpu)
  662. {
  663. struct evtchn_bind_ipi bind_ipi;
  664. int evtchn, irq;
  665. mutex_lock(&irq_mapping_update_lock);
  666. irq = per_cpu(ipi_to_irq, cpu)[ipi];
  667. if (irq == -1) {
  668. irq = xen_allocate_irq_dynamic();
  669. if (irq < 0)
  670. goto out;
  671. irq_set_chip_and_handler_name(irq, &xen_percpu_chip,
  672. handle_percpu_irq, "ipi");
  673. bind_ipi.vcpu = cpu;
  674. if (HYPERVISOR_event_channel_op(EVTCHNOP_bind_ipi,
  675. &bind_ipi) != 0)
  676. BUG();
  677. evtchn = bind_ipi.port;
  678. xen_irq_info_ipi_init(cpu, irq, evtchn, ipi);
  679. bind_evtchn_to_cpu(evtchn, cpu);
  680. }
  681. out:
  682. mutex_unlock(&irq_mapping_update_lock);
  683. return irq;
  684. }
  685. static int bind_interdomain_evtchn_to_irq(unsigned int remote_domain,
  686. unsigned int remote_port)
  687. {
  688. struct evtchn_bind_interdomain bind_interdomain;
  689. int err;
  690. bind_interdomain.remote_dom = remote_domain;
  691. bind_interdomain.remote_port = remote_port;
  692. err = HYPERVISOR_event_channel_op(EVTCHNOP_bind_interdomain,
  693. &bind_interdomain);
  694. return err ? : bind_evtchn_to_irq(bind_interdomain.local_port);
  695. }
  696. static int find_virq(unsigned int virq, unsigned int cpu)
  697. {
  698. struct evtchn_status status;
  699. int port, rc = -ENOENT;
  700. memset(&status, 0, sizeof(status));
  701. for (port = 0; port <= NR_EVENT_CHANNELS; port++) {
  702. status.dom = DOMID_SELF;
  703. status.port = port;
  704. rc = HYPERVISOR_event_channel_op(EVTCHNOP_status, &status);
  705. if (rc < 0)
  706. continue;
  707. if (status.status != EVTCHNSTAT_virq)
  708. continue;
  709. if (status.u.virq == virq && status.vcpu == cpu) {
  710. rc = port;
  711. break;
  712. }
  713. }
  714. return rc;
  715. }
  716. int bind_virq_to_irq(unsigned int virq, unsigned int cpu)
  717. {
  718. struct evtchn_bind_virq bind_virq;
  719. int evtchn, irq, ret;
  720. mutex_lock(&irq_mapping_update_lock);
  721. irq = per_cpu(virq_to_irq, cpu)[virq];
  722. if (irq == -1) {
  723. irq = xen_allocate_irq_dynamic();
  724. if (irq == -1)
  725. goto out;
  726. irq_set_chip_and_handler_name(irq, &xen_percpu_chip,
  727. handle_percpu_irq, "virq");
  728. bind_virq.virq = virq;
  729. bind_virq.vcpu = cpu;
  730. ret = HYPERVISOR_event_channel_op(EVTCHNOP_bind_virq,
  731. &bind_virq);
  732. if (ret == 0)
  733. evtchn = bind_virq.port;
  734. else {
  735. if (ret == -EEXIST)
  736. ret = find_virq(virq, cpu);
  737. BUG_ON(ret < 0);
  738. evtchn = ret;
  739. }
  740. xen_irq_info_virq_init(cpu, irq, evtchn, virq);
  741. bind_evtchn_to_cpu(evtchn, cpu);
  742. }
  743. out:
  744. mutex_unlock(&irq_mapping_update_lock);
  745. return irq;
  746. }
  747. static void unbind_from_irq(unsigned int irq)
  748. {
  749. struct evtchn_close close;
  750. int evtchn = evtchn_from_irq(irq);
  751. mutex_lock(&irq_mapping_update_lock);
  752. if (VALID_EVTCHN(evtchn)) {
  753. close.port = evtchn;
  754. if (HYPERVISOR_event_channel_op(EVTCHNOP_close, &close) != 0)
  755. BUG();
  756. switch (type_from_irq(irq)) {
  757. case IRQT_VIRQ:
  758. per_cpu(virq_to_irq, cpu_from_evtchn(evtchn))
  759. [virq_from_irq(irq)] = -1;
  760. break;
  761. case IRQT_IPI:
  762. per_cpu(ipi_to_irq, cpu_from_evtchn(evtchn))
  763. [ipi_from_irq(irq)] = -1;
  764. break;
  765. default:
  766. break;
  767. }
  768. /* Closed ports are implicitly re-bound to VCPU0. */
  769. bind_evtchn_to_cpu(evtchn, 0);
  770. evtchn_to_irq[evtchn] = -1;
  771. }
  772. BUG_ON(info_for_irq(irq)->type == IRQT_UNBOUND);
  773. xen_free_irq(irq);
  774. mutex_unlock(&irq_mapping_update_lock);
  775. }
  776. int bind_evtchn_to_irqhandler(unsigned int evtchn,
  777. irq_handler_t handler,
  778. unsigned long irqflags,
  779. const char *devname, void *dev_id)
  780. {
  781. int irq, retval;
  782. irq = bind_evtchn_to_irq(evtchn);
  783. if (irq < 0)
  784. return irq;
  785. retval = request_irq(irq, handler, irqflags, devname, dev_id);
  786. if (retval != 0) {
  787. unbind_from_irq(irq);
  788. return retval;
  789. }
  790. return irq;
  791. }
  792. EXPORT_SYMBOL_GPL(bind_evtchn_to_irqhandler);
  793. int bind_interdomain_evtchn_to_irqhandler(unsigned int remote_domain,
  794. unsigned int remote_port,
  795. irq_handler_t handler,
  796. unsigned long irqflags,
  797. const char *devname,
  798. void *dev_id)
  799. {
  800. int irq, retval;
  801. irq = bind_interdomain_evtchn_to_irq(remote_domain, remote_port);
  802. if (irq < 0)
  803. return irq;
  804. retval = request_irq(irq, handler, irqflags, devname, dev_id);
  805. if (retval != 0) {
  806. unbind_from_irq(irq);
  807. return retval;
  808. }
  809. return irq;
  810. }
  811. EXPORT_SYMBOL_GPL(bind_interdomain_evtchn_to_irqhandler);
  812. int bind_virq_to_irqhandler(unsigned int virq, unsigned int cpu,
  813. irq_handler_t handler,
  814. unsigned long irqflags, const char *devname, void *dev_id)
  815. {
  816. int irq, retval;
  817. irq = bind_virq_to_irq(virq, cpu);
  818. if (irq < 0)
  819. return irq;
  820. retval = request_irq(irq, handler, irqflags, devname, dev_id);
  821. if (retval != 0) {
  822. unbind_from_irq(irq);
  823. return retval;
  824. }
  825. return irq;
  826. }
  827. EXPORT_SYMBOL_GPL(bind_virq_to_irqhandler);
  828. int bind_ipi_to_irqhandler(enum ipi_vector ipi,
  829. unsigned int cpu,
  830. irq_handler_t handler,
  831. unsigned long irqflags,
  832. const char *devname,
  833. void *dev_id)
  834. {
  835. int irq, retval;
  836. irq = bind_ipi_to_irq(ipi, cpu);
  837. if (irq < 0)
  838. return irq;
  839. irqflags |= IRQF_NO_SUSPEND | IRQF_FORCE_RESUME | IRQF_EARLY_RESUME;
  840. retval = request_irq(irq, handler, irqflags, devname, dev_id);
  841. if (retval != 0) {
  842. unbind_from_irq(irq);
  843. return retval;
  844. }
  845. return irq;
  846. }
  847. void unbind_from_irqhandler(unsigned int irq, void *dev_id)
  848. {
  849. free_irq(irq, dev_id);
  850. unbind_from_irq(irq);
  851. }
  852. EXPORT_SYMBOL_GPL(unbind_from_irqhandler);
  853. void xen_send_IPI_one(unsigned int cpu, enum ipi_vector vector)
  854. {
  855. int irq = per_cpu(ipi_to_irq, cpu)[vector];
  856. BUG_ON(irq < 0);
  857. notify_remote_via_irq(irq);
  858. }
  859. irqreturn_t xen_debug_interrupt(int irq, void *dev_id)
  860. {
  861. struct shared_info *sh = HYPERVISOR_shared_info;
  862. int cpu = smp_processor_id();
  863. unsigned long *cpu_evtchn = per_cpu(cpu_evtchn_mask, cpu);
  864. int i;
  865. unsigned long flags;
  866. static DEFINE_SPINLOCK(debug_lock);
  867. struct vcpu_info *v;
  868. spin_lock_irqsave(&debug_lock, flags);
  869. printk("\nvcpu %d\n ", cpu);
  870. for_each_online_cpu(i) {
  871. int pending;
  872. v = per_cpu(xen_vcpu, i);
  873. pending = (get_irq_regs() && i == cpu)
  874. ? xen_irqs_disabled(get_irq_regs())
  875. : v->evtchn_upcall_mask;
  876. printk("%d: masked=%d pending=%d event_sel %0*lx\n ", i,
  877. pending, v->evtchn_upcall_pending,
  878. (int)(sizeof(v->evtchn_pending_sel)*2),
  879. v->evtchn_pending_sel);
  880. }
  881. v = per_cpu(xen_vcpu, cpu);
  882. printk("\npending:\n ");
  883. for (i = ARRAY_SIZE(sh->evtchn_pending)-1; i >= 0; i--)
  884. printk("%0*lx%s", (int)sizeof(sh->evtchn_pending[0])*2,
  885. sh->evtchn_pending[i],
  886. i % 8 == 0 ? "\n " : " ");
  887. printk("\nglobal mask:\n ");
  888. for (i = ARRAY_SIZE(sh->evtchn_mask)-1; i >= 0; i--)
  889. printk("%0*lx%s",
  890. (int)(sizeof(sh->evtchn_mask[0])*2),
  891. sh->evtchn_mask[i],
  892. i % 8 == 0 ? "\n " : " ");
  893. printk("\nglobally unmasked:\n ");
  894. for (i = ARRAY_SIZE(sh->evtchn_mask)-1; i >= 0; i--)
  895. printk("%0*lx%s", (int)(sizeof(sh->evtchn_mask[0])*2),
  896. sh->evtchn_pending[i] & ~sh->evtchn_mask[i],
  897. i % 8 == 0 ? "\n " : " ");
  898. printk("\nlocal cpu%d mask:\n ", cpu);
  899. for (i = (NR_EVENT_CHANNELS/BITS_PER_LONG)-1; i >= 0; i--)
  900. printk("%0*lx%s", (int)(sizeof(cpu_evtchn[0])*2),
  901. cpu_evtchn[i],
  902. i % 8 == 0 ? "\n " : " ");
  903. printk("\nlocally unmasked:\n ");
  904. for (i = ARRAY_SIZE(sh->evtchn_mask)-1; i >= 0; i--) {
  905. unsigned long pending = sh->evtchn_pending[i]
  906. & ~sh->evtchn_mask[i]
  907. & cpu_evtchn[i];
  908. printk("%0*lx%s", (int)(sizeof(sh->evtchn_mask[0])*2),
  909. pending, i % 8 == 0 ? "\n " : " ");
  910. }
  911. printk("\npending list:\n");
  912. for (i = 0; i < NR_EVENT_CHANNELS; i++) {
  913. if (sync_test_bit(i, sh->evtchn_pending)) {
  914. int word_idx = i / BITS_PER_LONG;
  915. printk(" %d: event %d -> irq %d%s%s%s\n",
  916. cpu_from_evtchn(i), i,
  917. evtchn_to_irq[i],
  918. sync_test_bit(word_idx, &v->evtchn_pending_sel)
  919. ? "" : " l2-clear",
  920. !sync_test_bit(i, sh->evtchn_mask)
  921. ? "" : " globally-masked",
  922. sync_test_bit(i, cpu_evtchn)
  923. ? "" : " locally-masked");
  924. }
  925. }
  926. spin_unlock_irqrestore(&debug_lock, flags);
  927. return IRQ_HANDLED;
  928. }
  929. static DEFINE_PER_CPU(unsigned, xed_nesting_count);
  930. static DEFINE_PER_CPU(unsigned int, current_word_idx);
  931. static DEFINE_PER_CPU(unsigned int, current_bit_idx);
  932. /*
  933. * Mask out the i least significant bits of w
  934. */
  935. #define MASK_LSBS(w, i) (w & ((~0UL) << i))
  936. /*
  937. * Search the CPUs pending events bitmasks. For each one found, map
  938. * the event number to an irq, and feed it into do_IRQ() for
  939. * handling.
  940. *
  941. * Xen uses a two-level bitmap to speed searching. The first level is
  942. * a bitset of words which contain pending event bits. The second
  943. * level is a bitset of pending events themselves.
  944. */
  945. static void __xen_evtchn_do_upcall(void)
  946. {
  947. int start_word_idx, start_bit_idx;
  948. int word_idx, bit_idx;
  949. int i;
  950. int cpu = get_cpu();
  951. struct shared_info *s = HYPERVISOR_shared_info;
  952. struct vcpu_info *vcpu_info = __this_cpu_read(xen_vcpu);
  953. unsigned count;
  954. do {
  955. unsigned long pending_words;
  956. vcpu_info->evtchn_upcall_pending = 0;
  957. if (__this_cpu_inc_return(xed_nesting_count) - 1)
  958. goto out;
  959. #ifndef CONFIG_X86 /* No need for a barrier -- XCHG is a barrier on x86. */
  960. /* Clear master flag /before/ clearing selector flag. */
  961. wmb();
  962. #endif
  963. pending_words = xchg(&vcpu_info->evtchn_pending_sel, 0);
  964. start_word_idx = __this_cpu_read(current_word_idx);
  965. start_bit_idx = __this_cpu_read(current_bit_idx);
  966. word_idx = start_word_idx;
  967. for (i = 0; pending_words != 0; i++) {
  968. unsigned long pending_bits;
  969. unsigned long words;
  970. words = MASK_LSBS(pending_words, word_idx);
  971. /*
  972. * If we masked out all events, wrap to beginning.
  973. */
  974. if (words == 0) {
  975. word_idx = 0;
  976. bit_idx = 0;
  977. continue;
  978. }
  979. word_idx = __ffs(words);
  980. pending_bits = active_evtchns(cpu, s, word_idx);
  981. bit_idx = 0; /* usually scan entire word from start */
  982. if (word_idx == start_word_idx) {
  983. /* We scan the starting word in two parts */
  984. if (i == 0)
  985. /* 1st time: start in the middle */
  986. bit_idx = start_bit_idx;
  987. else
  988. /* 2nd time: mask bits done already */
  989. bit_idx &= (1UL << start_bit_idx) - 1;
  990. }
  991. do {
  992. unsigned long bits;
  993. int port, irq;
  994. struct irq_desc *desc;
  995. bits = MASK_LSBS(pending_bits, bit_idx);
  996. /* If we masked out all events, move on. */
  997. if (bits == 0)
  998. break;
  999. bit_idx = __ffs(bits);
  1000. /* Process port. */
  1001. port = (word_idx * BITS_PER_LONG) + bit_idx;
  1002. irq = evtchn_to_irq[port];
  1003. if (irq != -1) {
  1004. desc = irq_to_desc(irq);
  1005. if (desc)
  1006. generic_handle_irq_desc(irq, desc);
  1007. }
  1008. bit_idx = (bit_idx + 1) % BITS_PER_LONG;
  1009. /* Next caller starts at last processed + 1 */
  1010. __this_cpu_write(current_word_idx,
  1011. bit_idx ? word_idx :
  1012. (word_idx+1) % BITS_PER_LONG);
  1013. __this_cpu_write(current_bit_idx, bit_idx);
  1014. } while (bit_idx != 0);
  1015. /* Scan start_l1i twice; all others once. */
  1016. if ((word_idx != start_word_idx) || (i != 0))
  1017. pending_words &= ~(1UL << word_idx);
  1018. word_idx = (word_idx + 1) % BITS_PER_LONG;
  1019. }
  1020. BUG_ON(!irqs_disabled());
  1021. count = __this_cpu_read(xed_nesting_count);
  1022. __this_cpu_write(xed_nesting_count, 0);
  1023. } while (count != 1 || vcpu_info->evtchn_upcall_pending);
  1024. out:
  1025. put_cpu();
  1026. }
  1027. void xen_evtchn_do_upcall(struct pt_regs *regs)
  1028. {
  1029. struct pt_regs *old_regs = set_irq_regs(regs);
  1030. exit_idle();
  1031. irq_enter();
  1032. __xen_evtchn_do_upcall();
  1033. irq_exit();
  1034. set_irq_regs(old_regs);
  1035. }
  1036. void xen_hvm_evtchn_do_upcall(void)
  1037. {
  1038. __xen_evtchn_do_upcall();
  1039. }
  1040. EXPORT_SYMBOL_GPL(xen_hvm_evtchn_do_upcall);
  1041. /* Rebind a new event channel to an existing irq. */
  1042. void rebind_evtchn_irq(int evtchn, int irq)
  1043. {
  1044. struct irq_info *info = info_for_irq(irq);
  1045. /* Make sure the irq is masked, since the new event channel
  1046. will also be masked. */
  1047. disable_irq(irq);
  1048. mutex_lock(&irq_mapping_update_lock);
  1049. /* After resume the irq<->evtchn mappings are all cleared out */
  1050. BUG_ON(evtchn_to_irq[evtchn] != -1);
  1051. /* Expect irq to have been bound before,
  1052. so there should be a proper type */
  1053. BUG_ON(info->type == IRQT_UNBOUND);
  1054. xen_irq_info_evtchn_init(irq, evtchn);
  1055. mutex_unlock(&irq_mapping_update_lock);
  1056. /* new event channels are always bound to cpu 0 */
  1057. irq_set_affinity(irq, cpumask_of(0));
  1058. /* Unmask the event channel. */
  1059. enable_irq(irq);
  1060. }
  1061. /* Rebind an evtchn so that it gets delivered to a specific cpu */
  1062. static int rebind_irq_to_cpu(unsigned irq, unsigned tcpu)
  1063. {
  1064. struct evtchn_bind_vcpu bind_vcpu;
  1065. int evtchn = evtchn_from_irq(irq);
  1066. if (!VALID_EVTCHN(evtchn))
  1067. return -1;
  1068. /*
  1069. * Events delivered via platform PCI interrupts are always
  1070. * routed to vcpu 0 and hence cannot be rebound.
  1071. */
  1072. if (xen_hvm_domain() && !xen_have_vector_callback)
  1073. return -1;
  1074. /* Send future instances of this interrupt to other vcpu. */
  1075. bind_vcpu.port = evtchn;
  1076. bind_vcpu.vcpu = tcpu;
  1077. /*
  1078. * If this fails, it usually just indicates that we're dealing with a
  1079. * virq or IPI channel, which don't actually need to be rebound. Ignore
  1080. * it, but don't do the xenlinux-level rebind in that case.
  1081. */
  1082. if (HYPERVISOR_event_channel_op(EVTCHNOP_bind_vcpu, &bind_vcpu) >= 0)
  1083. bind_evtchn_to_cpu(evtchn, tcpu);
  1084. return 0;
  1085. }
  1086. static int set_affinity_irq(struct irq_data *data, const struct cpumask *dest,
  1087. bool force)
  1088. {
  1089. unsigned tcpu = cpumask_first(dest);
  1090. return rebind_irq_to_cpu(data->irq, tcpu);
  1091. }
  1092. int resend_irq_on_evtchn(unsigned int irq)
  1093. {
  1094. int masked, evtchn = evtchn_from_irq(irq);
  1095. struct shared_info *s = HYPERVISOR_shared_info;
  1096. if (!VALID_EVTCHN(evtchn))
  1097. return 1;
  1098. masked = sync_test_and_set_bit(evtchn, s->evtchn_mask);
  1099. sync_set_bit(evtchn, s->evtchn_pending);
  1100. if (!masked)
  1101. unmask_evtchn(evtchn);
  1102. return 1;
  1103. }
  1104. static void enable_dynirq(struct irq_data *data)
  1105. {
  1106. int evtchn = evtchn_from_irq(data->irq);
  1107. if (VALID_EVTCHN(evtchn))
  1108. unmask_evtchn(evtchn);
  1109. }
  1110. static void disable_dynirq(struct irq_data *data)
  1111. {
  1112. int evtchn = evtchn_from_irq(data->irq);
  1113. if (VALID_EVTCHN(evtchn))
  1114. mask_evtchn(evtchn);
  1115. }
  1116. static void ack_dynirq(struct irq_data *data)
  1117. {
  1118. int evtchn = evtchn_from_irq(data->irq);
  1119. irq_move_irq(data);
  1120. if (VALID_EVTCHN(evtchn))
  1121. clear_evtchn(evtchn);
  1122. }
  1123. static void mask_ack_dynirq(struct irq_data *data)
  1124. {
  1125. disable_dynirq(data);
  1126. ack_dynirq(data);
  1127. }
  1128. static int retrigger_dynirq(struct irq_data *data)
  1129. {
  1130. int evtchn = evtchn_from_irq(data->irq);
  1131. struct shared_info *sh = HYPERVISOR_shared_info;
  1132. int ret = 0;
  1133. if (VALID_EVTCHN(evtchn)) {
  1134. int masked;
  1135. masked = sync_test_and_set_bit(evtchn, sh->evtchn_mask);
  1136. sync_set_bit(evtchn, sh->evtchn_pending);
  1137. if (!masked)
  1138. unmask_evtchn(evtchn);
  1139. ret = 1;
  1140. }
  1141. return ret;
  1142. }
  1143. static void restore_pirqs(void)
  1144. {
  1145. int pirq, rc, irq, gsi;
  1146. struct physdev_map_pirq map_irq;
  1147. struct irq_info *info;
  1148. list_for_each_entry(info, &xen_irq_list_head, list) {
  1149. if (info->type != IRQT_PIRQ)
  1150. continue;
  1151. pirq = info->u.pirq.pirq;
  1152. gsi = info->u.pirq.gsi;
  1153. irq = info->irq;
  1154. /* save/restore of PT devices doesn't work, so at this point the
  1155. * only devices present are GSI based emulated devices */
  1156. if (!gsi)
  1157. continue;
  1158. map_irq.domid = DOMID_SELF;
  1159. map_irq.type = MAP_PIRQ_TYPE_GSI;
  1160. map_irq.index = gsi;
  1161. map_irq.pirq = pirq;
  1162. rc = HYPERVISOR_physdev_op(PHYSDEVOP_map_pirq, &map_irq);
  1163. if (rc) {
  1164. printk(KERN_WARNING "xen map irq failed gsi=%d irq=%d pirq=%d rc=%d\n",
  1165. gsi, irq, pirq, rc);
  1166. xen_free_irq(irq);
  1167. continue;
  1168. }
  1169. printk(KERN_DEBUG "xen: --> irq=%d, pirq=%d\n", irq, map_irq.pirq);
  1170. __startup_pirq(irq);
  1171. }
  1172. }
  1173. static void restore_cpu_virqs(unsigned int cpu)
  1174. {
  1175. struct evtchn_bind_virq bind_virq;
  1176. int virq, irq, evtchn;
  1177. for (virq = 0; virq < NR_VIRQS; virq++) {
  1178. if ((irq = per_cpu(virq_to_irq, cpu)[virq]) == -1)
  1179. continue;
  1180. BUG_ON(virq_from_irq(irq) != virq);
  1181. /* Get a new binding from Xen. */
  1182. bind_virq.virq = virq;
  1183. bind_virq.vcpu = cpu;
  1184. if (HYPERVISOR_event_channel_op(EVTCHNOP_bind_virq,
  1185. &bind_virq) != 0)
  1186. BUG();
  1187. evtchn = bind_virq.port;
  1188. /* Record the new mapping. */
  1189. xen_irq_info_virq_init(cpu, irq, evtchn, virq);
  1190. bind_evtchn_to_cpu(evtchn, cpu);
  1191. }
  1192. }
  1193. static void restore_cpu_ipis(unsigned int cpu)
  1194. {
  1195. struct evtchn_bind_ipi bind_ipi;
  1196. int ipi, irq, evtchn;
  1197. for (ipi = 0; ipi < XEN_NR_IPIS; ipi++) {
  1198. if ((irq = per_cpu(ipi_to_irq, cpu)[ipi]) == -1)
  1199. continue;
  1200. BUG_ON(ipi_from_irq(irq) != ipi);
  1201. /* Get a new binding from Xen. */
  1202. bind_ipi.vcpu = cpu;
  1203. if (HYPERVISOR_event_channel_op(EVTCHNOP_bind_ipi,
  1204. &bind_ipi) != 0)
  1205. BUG();
  1206. evtchn = bind_ipi.port;
  1207. /* Record the new mapping. */
  1208. xen_irq_info_ipi_init(cpu, irq, evtchn, ipi);
  1209. bind_evtchn_to_cpu(evtchn, cpu);
  1210. }
  1211. }
  1212. /* Clear an irq's pending state, in preparation for polling on it */
  1213. void xen_clear_irq_pending(int irq)
  1214. {
  1215. int evtchn = evtchn_from_irq(irq);
  1216. if (VALID_EVTCHN(evtchn))
  1217. clear_evtchn(evtchn);
  1218. }
  1219. EXPORT_SYMBOL(xen_clear_irq_pending);
  1220. void xen_set_irq_pending(int irq)
  1221. {
  1222. int evtchn = evtchn_from_irq(irq);
  1223. if (VALID_EVTCHN(evtchn))
  1224. set_evtchn(evtchn);
  1225. }
  1226. bool xen_test_irq_pending(int irq)
  1227. {
  1228. int evtchn = evtchn_from_irq(irq);
  1229. bool ret = false;
  1230. if (VALID_EVTCHN(evtchn))
  1231. ret = test_evtchn(evtchn);
  1232. return ret;
  1233. }
  1234. /* Poll waiting for an irq to become pending with timeout. In the usual case,
  1235. * the irq will be disabled so it won't deliver an interrupt. */
  1236. void xen_poll_irq_timeout(int irq, u64 timeout)
  1237. {
  1238. evtchn_port_t evtchn = evtchn_from_irq(irq);
  1239. if (VALID_EVTCHN(evtchn)) {
  1240. struct sched_poll poll;
  1241. poll.nr_ports = 1;
  1242. poll.timeout = timeout;
  1243. set_xen_guest_handle(poll.ports, &evtchn);
  1244. if (HYPERVISOR_sched_op(SCHEDOP_poll, &poll) != 0)
  1245. BUG();
  1246. }
  1247. }
  1248. EXPORT_SYMBOL(xen_poll_irq_timeout);
  1249. /* Poll waiting for an irq to become pending. In the usual case, the
  1250. * irq will be disabled so it won't deliver an interrupt. */
  1251. void xen_poll_irq(int irq)
  1252. {
  1253. xen_poll_irq_timeout(irq, 0 /* no timeout */);
  1254. }
  1255. /* Check whether the IRQ line is shared with other guests. */
  1256. int xen_test_irq_shared(int irq)
  1257. {
  1258. struct irq_info *info = info_for_irq(irq);
  1259. struct physdev_irq_status_query irq_status = { .irq = info->u.pirq.pirq };
  1260. if (HYPERVISOR_physdev_op(PHYSDEVOP_irq_status_query, &irq_status))
  1261. return 0;
  1262. return !(irq_status.flags & XENIRQSTAT_shared);
  1263. }
  1264. EXPORT_SYMBOL_GPL(xen_test_irq_shared);
  1265. void xen_irq_resume(void)
  1266. {
  1267. unsigned int cpu, evtchn;
  1268. struct irq_info *info;
  1269. init_evtchn_cpu_bindings();
  1270. /* New event-channel space is not 'live' yet. */
  1271. for (evtchn = 0; evtchn < NR_EVENT_CHANNELS; evtchn++)
  1272. mask_evtchn(evtchn);
  1273. /* No IRQ <-> event-channel mappings. */
  1274. list_for_each_entry(info, &xen_irq_list_head, list)
  1275. info->evtchn = 0; /* zap event-channel binding */
  1276. for (evtchn = 0; evtchn < NR_EVENT_CHANNELS; evtchn++)
  1277. evtchn_to_irq[evtchn] = -1;
  1278. for_each_possible_cpu(cpu) {
  1279. restore_cpu_virqs(cpu);
  1280. restore_cpu_ipis(cpu);
  1281. }
  1282. restore_pirqs();
  1283. }
  1284. static struct irq_chip xen_dynamic_chip __read_mostly = {
  1285. .name = "xen-dyn",
  1286. .irq_disable = disable_dynirq,
  1287. .irq_mask = disable_dynirq,
  1288. .irq_unmask = enable_dynirq,
  1289. .irq_ack = ack_dynirq,
  1290. .irq_mask_ack = mask_ack_dynirq,
  1291. .irq_set_affinity = set_affinity_irq,
  1292. .irq_retrigger = retrigger_dynirq,
  1293. };
  1294. static struct irq_chip xen_pirq_chip __read_mostly = {
  1295. .name = "xen-pirq",
  1296. .irq_startup = startup_pirq,
  1297. .irq_shutdown = shutdown_pirq,
  1298. .irq_enable = enable_pirq,
  1299. .irq_disable = disable_pirq,
  1300. .irq_mask = disable_dynirq,
  1301. .irq_unmask = enable_dynirq,
  1302. .irq_ack = eoi_pirq,
  1303. .irq_eoi = eoi_pirq,
  1304. .irq_mask_ack = mask_ack_pirq,
  1305. .irq_set_affinity = set_affinity_irq,
  1306. .irq_retrigger = retrigger_dynirq,
  1307. };
  1308. static struct irq_chip xen_percpu_chip __read_mostly = {
  1309. .name = "xen-percpu",
  1310. .irq_disable = disable_dynirq,
  1311. .irq_mask = disable_dynirq,
  1312. .irq_unmask = enable_dynirq,
  1313. .irq_ack = ack_dynirq,
  1314. };
  1315. int xen_set_callback_via(uint64_t via)
  1316. {
  1317. struct xen_hvm_param a;
  1318. a.domid = DOMID_SELF;
  1319. a.index = HVM_PARAM_CALLBACK_IRQ;
  1320. a.value = via;
  1321. return HYPERVISOR_hvm_op(HVMOP_set_param, &a);
  1322. }
  1323. EXPORT_SYMBOL_GPL(xen_set_callback_via);
  1324. #ifdef CONFIG_XEN_PVHVM
  1325. /* Vector callbacks are better than PCI interrupts to receive event
  1326. * channel notifications because we can receive vector callbacks on any
  1327. * vcpu and we don't need PCI support or APIC interactions. */
  1328. void xen_callback_vector(void)
  1329. {
  1330. int rc;
  1331. uint64_t callback_via;
  1332. if (xen_have_vector_callback) {
  1333. callback_via = HVM_CALLBACK_VECTOR(XEN_HVM_EVTCHN_CALLBACK);
  1334. rc = xen_set_callback_via(callback_via);
  1335. if (rc) {
  1336. printk(KERN_ERR "Request for Xen HVM callback vector"
  1337. " failed.\n");
  1338. xen_have_vector_callback = 0;
  1339. return;
  1340. }
  1341. printk(KERN_INFO "Xen HVM callback vector for event delivery is "
  1342. "enabled\n");
  1343. /* in the restore case the vector has already been allocated */
  1344. if (!test_bit(XEN_HVM_EVTCHN_CALLBACK, used_vectors))
  1345. alloc_intr_gate(XEN_HVM_EVTCHN_CALLBACK, xen_hvm_callback_vector);
  1346. }
  1347. }
  1348. #else
  1349. void xen_callback_vector(void) {}
  1350. #endif
  1351. void __init xen_init_IRQ(void)
  1352. {
  1353. int i;
  1354. evtchn_to_irq = kcalloc(NR_EVENT_CHANNELS, sizeof(*evtchn_to_irq),
  1355. GFP_KERNEL);
  1356. BUG_ON(!evtchn_to_irq);
  1357. for (i = 0; i < NR_EVENT_CHANNELS; i++)
  1358. evtchn_to_irq[i] = -1;
  1359. init_evtchn_cpu_bindings();
  1360. /* No event channels are 'live' right now. */
  1361. for (i = 0; i < NR_EVENT_CHANNELS; i++)
  1362. mask_evtchn(i);
  1363. if (xen_hvm_domain()) {
  1364. xen_callback_vector();
  1365. native_init_IRQ();
  1366. /* pci_xen_hvm_init must be called after native_init_IRQ so that
  1367. * __acpi_register_gsi can point at the right function */
  1368. pci_xen_hvm_init();
  1369. } else {
  1370. irq_ctx_init(smp_processor_id());
  1371. if (xen_initial_domain())
  1372. pci_xen_initial_domain();
  1373. }
  1374. }