exception.h 8.9 KB

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  1. #ifndef _ASM_POWERPC_EXCEPTION_H
  2. #define _ASM_POWERPC_EXCEPTION_H
  3. /*
  4. * Extracted from head_64.S
  5. *
  6. * PowerPC version
  7. * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
  8. *
  9. * Rewritten by Cort Dougan (cort@cs.nmt.edu) for PReP
  10. * Copyright (C) 1996 Cort Dougan <cort@cs.nmt.edu>
  11. * Adapted for Power Macintosh by Paul Mackerras.
  12. * Low-level exception handlers and MMU support
  13. * rewritten by Paul Mackerras.
  14. * Copyright (C) 1996 Paul Mackerras.
  15. *
  16. * Adapted for 64bit PowerPC by Dave Engebretsen, Peter Bergner, and
  17. * Mike Corrigan {engebret|bergner|mikejc}@us.ibm.com
  18. *
  19. * This file contains the low-level support and setup for the
  20. * PowerPC-64 platform, including trap and interrupt dispatch.
  21. *
  22. * This program is free software; you can redistribute it and/or
  23. * modify it under the terms of the GNU General Public License
  24. * as published by the Free Software Foundation; either version
  25. * 2 of the License, or (at your option) any later version.
  26. */
  27. /*
  28. * The following macros define the code that appears as
  29. * the prologue to each of the exception handlers. They
  30. * are split into two parts to allow a single kernel binary
  31. * to be used for pSeries and iSeries.
  32. *
  33. * We make as much of the exception code common between native
  34. * exception handlers (including pSeries LPAR) and iSeries LPAR
  35. * implementations as possible.
  36. */
  37. #define EX_R9 0
  38. #define EX_R10 8
  39. #define EX_R11 16
  40. #define EX_R12 24
  41. #define EX_R13 32
  42. #define EX_SRR0 40
  43. #define EX_DAR 48
  44. #define EX_DSISR 56
  45. #define EX_CCR 60
  46. #define EX_R3 64
  47. #define EX_LR 72
  48. /*
  49. * We're short on space and time in the exception prolog, so we can't
  50. * use the normal SET_REG_IMMEDIATE macro. Normally we just need the
  51. * low halfword of the address, but for Kdump we need the whole low
  52. * word.
  53. */
  54. #define LOAD_HANDLER(reg, label) \
  55. addi reg,reg,(label)-_stext; /* virt addr of handler ... */
  56. #define EXCEPTION_PROLOG_1(area) \
  57. mfspr r13,SPRN_SPRG3; /* get paca address into r13 */ \
  58. std r9,area+EX_R9(r13); /* save r9 - r12 */ \
  59. std r10,area+EX_R10(r13); \
  60. std r11,area+EX_R11(r13); \
  61. std r12,area+EX_R12(r13); \
  62. mfspr r9,SPRN_SPRG1; \
  63. std r9,area+EX_R13(r13); \
  64. mfcr r9
  65. #define EXCEPTION_PROLOG_PSERIES(area, label) \
  66. EXCEPTION_PROLOG_1(area); \
  67. ld r12,PACAKBASE(r13); /* get high part of &label */ \
  68. ld r10,PACAKMSR(r13); /* get MSR value for kernel */ \
  69. mfspr r11,SPRN_SRR0; /* save SRR0 */ \
  70. LOAD_HANDLER(r12,label) \
  71. mtspr SPRN_SRR0,r12; \
  72. mfspr r12,SPRN_SRR1; /* and SRR1 */ \
  73. mtspr SPRN_SRR1,r10; \
  74. rfid; \
  75. b . /* prevent speculative execution */
  76. /*
  77. * The common exception prolog is used for all except a few exceptions
  78. * such as a segment miss on a kernel address. We have to be prepared
  79. * to take another exception from the point where we first touch the
  80. * kernel stack onwards.
  81. *
  82. * On entry r13 points to the paca, r9-r13 are saved in the paca,
  83. * r9 contains the saved CR, r11 and r12 contain the saved SRR0 and
  84. * SRR1, and relocation is on.
  85. */
  86. #define EXCEPTION_PROLOG_COMMON(n, area) \
  87. andi. r10,r12,MSR_PR; /* See if coming from user */ \
  88. mr r10,r1; /* Save r1 */ \
  89. subi r1,r1,INT_FRAME_SIZE; /* alloc frame on kernel stack */ \
  90. beq- 1f; \
  91. ld r1,PACAKSAVE(r13); /* kernel stack to use */ \
  92. 1: cmpdi cr1,r1,0; /* check if r1 is in userspace */ \
  93. bge- cr1,2f; /* abort if it is */ \
  94. b 3f; \
  95. 2: li r1,(n); /* will be reloaded later */ \
  96. sth r1,PACA_TRAP_SAVE(r13); \
  97. b bad_stack; \
  98. 3: std r9,_CCR(r1); /* save CR in stackframe */ \
  99. std r11,_NIP(r1); /* save SRR0 in stackframe */ \
  100. std r12,_MSR(r1); /* save SRR1 in stackframe */ \
  101. std r10,0(r1); /* make stack chain pointer */ \
  102. std r0,GPR0(r1); /* save r0 in stackframe */ \
  103. std r10,GPR1(r1); /* save r1 in stackframe */ \
  104. ACCOUNT_CPU_USER_ENTRY(r9, r10); \
  105. std r2,GPR2(r1); /* save r2 in stackframe */ \
  106. SAVE_4GPRS(3, r1); /* save r3 - r6 in stackframe */ \
  107. SAVE_2GPRS(7, r1); /* save r7, r8 in stackframe */ \
  108. ld r9,area+EX_R9(r13); /* move r9, r10 to stackframe */ \
  109. ld r10,area+EX_R10(r13); \
  110. std r9,GPR9(r1); \
  111. std r10,GPR10(r1); \
  112. ld r9,area+EX_R11(r13); /* move r11 - r13 to stackframe */ \
  113. ld r10,area+EX_R12(r13); \
  114. ld r11,area+EX_R13(r13); \
  115. std r9,GPR11(r1); \
  116. std r10,GPR12(r1); \
  117. std r11,GPR13(r1); \
  118. ld r2,PACATOC(r13); /* get kernel TOC into r2 */ \
  119. mflr r9; /* save LR in stackframe */ \
  120. std r9,_LINK(r1); \
  121. mfctr r10; /* save CTR in stackframe */ \
  122. std r10,_CTR(r1); \
  123. lbz r10,PACASOFTIRQEN(r13); \
  124. mfspr r11,SPRN_XER; /* save XER in stackframe */ \
  125. std r10,SOFTE(r1); \
  126. std r11,_XER(r1); \
  127. li r9,(n)+1; \
  128. std r9,_TRAP(r1); /* set trap number */ \
  129. li r10,0; \
  130. ld r11,exception_marker@toc(r2); \
  131. std r10,RESULT(r1); /* clear regs->result */ \
  132. std r11,STACK_FRAME_OVERHEAD-16(r1); /* mark the frame */
  133. /*
  134. * Exception vectors.
  135. */
  136. #define STD_EXCEPTION_PSERIES(n, label) \
  137. . = n; \
  138. .globl label##_pSeries; \
  139. label##_pSeries: \
  140. HMT_MEDIUM; \
  141. mtspr SPRN_SPRG1,r13; /* save r13 */ \
  142. EXCEPTION_PROLOG_PSERIES(PACA_EXGEN, label##_common)
  143. #define HSTD_EXCEPTION_PSERIES(n, label) \
  144. . = n; \
  145. .globl label##_pSeries; \
  146. label##_pSeries: \
  147. HMT_MEDIUM; \
  148. mtspr SPRN_SPRG1,r20; /* save r20 */ \
  149. mfspr r20,SPRN_HSRR0; /* copy HSRR0 to SRR0 */ \
  150. mtspr SPRN_SRR0,r20; \
  151. mfspr r20,SPRN_HSRR1; /* copy HSRR0 to SRR0 */ \
  152. mtspr SPRN_SRR1,r20; \
  153. mfspr r20,SPRN_SPRG1; /* restore r20 */ \
  154. mtspr SPRN_SPRG1,r13; /* save r13 */ \
  155. EXCEPTION_PROLOG_PSERIES(PACA_EXGEN, label##_common)
  156. #define MASKABLE_EXCEPTION_PSERIES(n, label) \
  157. . = n; \
  158. .globl label##_pSeries; \
  159. label##_pSeries: \
  160. HMT_MEDIUM; \
  161. mtspr SPRN_SPRG1,r13; /* save r13 */ \
  162. mfspr r13,SPRN_SPRG3; /* get paca address into r13 */ \
  163. std r9,PACA_EXGEN+EX_R9(r13); /* save r9, r10 */ \
  164. std r10,PACA_EXGEN+EX_R10(r13); \
  165. lbz r10,PACASOFTIRQEN(r13); \
  166. mfcr r9; \
  167. cmpwi r10,0; \
  168. beq masked_interrupt; \
  169. mfspr r10,SPRN_SPRG1; \
  170. std r10,PACA_EXGEN+EX_R13(r13); \
  171. std r11,PACA_EXGEN+EX_R11(r13); \
  172. std r12,PACA_EXGEN+EX_R12(r13); \
  173. ld r12,PACAKBASE(r13); /* get high part of &label */ \
  174. ld r10,PACAKMSR(r13); /* get MSR value for kernel */ \
  175. mfspr r11,SPRN_SRR0; /* save SRR0 */ \
  176. LOAD_HANDLER(r12,label##_common) \
  177. mtspr SPRN_SRR0,r12; \
  178. mfspr r12,SPRN_SRR1; /* and SRR1 */ \
  179. mtspr SPRN_SRR1,r10; \
  180. rfid; \
  181. b . /* prevent speculative execution */
  182. #ifdef CONFIG_PPC_ISERIES
  183. #define DISABLE_INTS \
  184. li r11,0; \
  185. stb r11,PACASOFTIRQEN(r13); \
  186. BEGIN_FW_FTR_SECTION; \
  187. stb r11,PACAHARDIRQEN(r13); \
  188. END_FW_FTR_SECTION_IFCLR(FW_FEATURE_ISERIES); \
  189. TRACE_DISABLE_INTS; \
  190. BEGIN_FW_FTR_SECTION; \
  191. mfmsr r10; \
  192. ori r10,r10,MSR_EE; \
  193. mtmsrd r10,1; \
  194. END_FW_FTR_SECTION_IFSET(FW_FEATURE_ISERIES)
  195. #else
  196. #define DISABLE_INTS \
  197. li r11,0; \
  198. stb r11,PACASOFTIRQEN(r13); \
  199. stb r11,PACAHARDIRQEN(r13); \
  200. TRACE_DISABLE_INTS
  201. #endif /* CONFIG_PPC_ISERIES */
  202. #define ENABLE_INTS \
  203. ld r12,_MSR(r1); \
  204. mfmsr r11; \
  205. rlwimi r11,r12,0,MSR_EE; \
  206. mtmsrd r11,1
  207. #define STD_EXCEPTION_COMMON(trap, label, hdlr) \
  208. .align 7; \
  209. .globl label##_common; \
  210. label##_common: \
  211. EXCEPTION_PROLOG_COMMON(trap, PACA_EXGEN); \
  212. DISABLE_INTS; \
  213. bl .save_nvgprs; \
  214. addi r3,r1,STACK_FRAME_OVERHEAD; \
  215. bl hdlr; \
  216. b .ret_from_except
  217. /*
  218. * Like STD_EXCEPTION_COMMON, but for exceptions that can occur
  219. * in the idle task and therefore need the special idle handling.
  220. */
  221. #define STD_EXCEPTION_COMMON_IDLE(trap, label, hdlr) \
  222. .align 7; \
  223. .globl label##_common; \
  224. label##_common: \
  225. EXCEPTION_PROLOG_COMMON(trap, PACA_EXGEN); \
  226. FINISH_NAP; \
  227. DISABLE_INTS; \
  228. bl .save_nvgprs; \
  229. addi r3,r1,STACK_FRAME_OVERHEAD; \
  230. bl hdlr; \
  231. b .ret_from_except
  232. #define STD_EXCEPTION_COMMON_LITE(trap, label, hdlr) \
  233. .align 7; \
  234. .globl label##_common; \
  235. label##_common: \
  236. EXCEPTION_PROLOG_COMMON(trap, PACA_EXGEN); \
  237. FINISH_NAP; \
  238. DISABLE_INTS; \
  239. BEGIN_FTR_SECTION \
  240. bl .ppc64_runlatch_on; \
  241. END_FTR_SECTION_IFSET(CPU_FTR_CTRL) \
  242. addi r3,r1,STACK_FRAME_OVERHEAD; \
  243. bl hdlr; \
  244. b .ret_from_except_lite
  245. /*
  246. * When the idle code in power4_idle puts the CPU into NAP mode,
  247. * it has to do so in a loop, and relies on the external interrupt
  248. * and decrementer interrupt entry code to get it out of the loop.
  249. * It sets the _TLF_NAPPING bit in current_thread_info()->local_flags
  250. * to signal that it is in the loop and needs help to get out.
  251. */
  252. #ifdef CONFIG_PPC_970_NAP
  253. #define FINISH_NAP \
  254. BEGIN_FTR_SECTION \
  255. clrrdi r11,r1,THREAD_SHIFT; \
  256. ld r9,TI_LOCAL_FLAGS(r11); \
  257. andi. r10,r9,_TLF_NAPPING; \
  258. bnel power4_fixup_nap; \
  259. END_FTR_SECTION_IFSET(CPU_FTR_CAN_NAP)
  260. #else
  261. #define FINISH_NAP
  262. #endif
  263. #endif /* _ASM_POWERPC_EXCEPTION_H */