xonar_wm87x6.c 34 KB

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  1. /*
  2. * card driver for models with WM8776/WM8766 DACs (Xonar DS)
  3. *
  4. * Copyright (c) Clemens Ladisch <clemens@ladisch.de>
  5. *
  6. *
  7. * This driver is free software; you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License, version 2.
  9. *
  10. * This driver is distributed in the hope that it will be useful,
  11. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  12. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  13. * GNU General Public License for more details.
  14. *
  15. * You should have received a copy of the GNU General Public License
  16. * along with this driver; if not, see <http://www.gnu.org/licenses/>.
  17. */
  18. /*
  19. * Xonar DS
  20. * --------
  21. *
  22. * CMI8788:
  23. *
  24. * SPI 0 -> WM8766 (surround, center/LFE, back)
  25. * SPI 1 -> WM8776 (front, input)
  26. *
  27. * GPIO 4 <- headphone detect, 0 = plugged
  28. * GPIO 6 -> route input jack to mic-in (0) or line-in (1)
  29. * GPIO 7 -> enable output to front L/R speaker channels
  30. * GPIO 8 -> enable output to other speaker channels and front panel headphone
  31. *
  32. * WM8776:
  33. *
  34. * input 1 <- line
  35. * input 2 <- mic
  36. * input 3 <- front mic
  37. * input 4 <- aux
  38. */
  39. /*
  40. * Xonar HDAV1.3 Slim
  41. * ------------------
  42. *
  43. * CMI8788:
  44. *
  45. * I²C <-> WM8776 (addr 0011010)
  46. *
  47. * GPIO 0 -> disable HDMI output
  48. * GPIO 1 -> enable HP output
  49. * GPIO 6 -> firmware EEPROM I²C clock
  50. * GPIO 7 <-> firmware EEPROM I²C data
  51. *
  52. * UART <-> HDMI controller
  53. *
  54. * WM8776:
  55. *
  56. * input 1 <- mic
  57. * input 2 <- aux
  58. */
  59. #include <linux/pci.h>
  60. #include <linux/delay.h>
  61. #include <sound/control.h>
  62. #include <sound/core.h>
  63. #include <sound/info.h>
  64. #include <sound/jack.h>
  65. #include <sound/pcm.h>
  66. #include <sound/pcm_params.h>
  67. #include <sound/tlv.h>
  68. #include "xonar.h"
  69. #include "wm8776.h"
  70. #include "wm8766.h"
  71. #define GPIO_DS_HP_DETECT 0x0010
  72. #define GPIO_DS_INPUT_ROUTE 0x0040
  73. #define GPIO_DS_OUTPUT_FRONTLR 0x0080
  74. #define GPIO_DS_OUTPUT_ENABLE 0x0100
  75. #define LC_CONTROL_LIMITER 0x40000000
  76. #define LC_CONTROL_ALC 0x20000000
  77. struct xonar_wm87x6 {
  78. struct xonar_generic generic;
  79. u16 wm8776_regs[0x17];
  80. u16 wm8766_regs[0x10];
  81. struct snd_kcontrol *line_adcmux_control;
  82. struct snd_kcontrol *mic_adcmux_control;
  83. struct snd_kcontrol *lc_controls[13];
  84. struct snd_jack *hp_jack;
  85. };
  86. static void wm8776_write(struct oxygen *chip,
  87. unsigned int reg, unsigned int value)
  88. {
  89. struct xonar_wm87x6 *data = chip->model_data;
  90. oxygen_write_spi(chip, OXYGEN_SPI_TRIGGER |
  91. OXYGEN_SPI_DATA_LENGTH_2 |
  92. OXYGEN_SPI_CLOCK_160 |
  93. (1 << OXYGEN_SPI_CODEC_SHIFT) |
  94. OXYGEN_SPI_CEN_LATCH_CLOCK_LO,
  95. (reg << 9) | value);
  96. if (reg < ARRAY_SIZE(data->wm8776_regs)) {
  97. if (reg >= WM8776_HPLVOL && reg <= WM8776_DACMASTER)
  98. value &= ~WM8776_UPDATE;
  99. data->wm8776_regs[reg] = value;
  100. }
  101. }
  102. static void wm8776_write_cached(struct oxygen *chip,
  103. unsigned int reg, unsigned int value)
  104. {
  105. struct xonar_wm87x6 *data = chip->model_data;
  106. if (reg >= ARRAY_SIZE(data->wm8776_regs) ||
  107. value != data->wm8776_regs[reg])
  108. wm8776_write(chip, reg, value);
  109. }
  110. static void wm8766_write(struct oxygen *chip,
  111. unsigned int reg, unsigned int value)
  112. {
  113. struct xonar_wm87x6 *data = chip->model_data;
  114. oxygen_write_spi(chip, OXYGEN_SPI_TRIGGER |
  115. OXYGEN_SPI_DATA_LENGTH_2 |
  116. OXYGEN_SPI_CLOCK_160 |
  117. (0 << OXYGEN_SPI_CODEC_SHIFT) |
  118. OXYGEN_SPI_CEN_LATCH_CLOCK_LO,
  119. (reg << 9) | value);
  120. if (reg < ARRAY_SIZE(data->wm8766_regs)) {
  121. if ((reg >= WM8766_LDA1 && reg <= WM8766_RDA1) ||
  122. (reg >= WM8766_LDA2 && reg <= WM8766_MASTDA))
  123. value &= ~WM8766_UPDATE;
  124. data->wm8766_regs[reg] = value;
  125. }
  126. }
  127. static void wm8766_write_cached(struct oxygen *chip,
  128. unsigned int reg, unsigned int value)
  129. {
  130. struct xonar_wm87x6 *data = chip->model_data;
  131. if (reg >= ARRAY_SIZE(data->wm8766_regs) ||
  132. value != data->wm8766_regs[reg])
  133. wm8766_write(chip, reg, value);
  134. }
  135. static void wm8776_registers_init(struct oxygen *chip)
  136. {
  137. struct xonar_wm87x6 *data = chip->model_data;
  138. wm8776_write(chip, WM8776_RESET, 0);
  139. wm8776_write(chip, WM8776_DACCTRL1, WM8776_DZCEN |
  140. WM8776_PL_LEFT_LEFT | WM8776_PL_RIGHT_RIGHT);
  141. wm8776_write(chip, WM8776_DACMUTE, chip->dac_mute ? WM8776_DMUTE : 0);
  142. wm8776_write(chip, WM8776_DACIFCTRL,
  143. WM8776_DACFMT_LJUST | WM8776_DACWL_24);
  144. wm8776_write(chip, WM8776_ADCIFCTRL,
  145. data->wm8776_regs[WM8776_ADCIFCTRL]);
  146. wm8776_write(chip, WM8776_MSTRCTRL, data->wm8776_regs[WM8776_MSTRCTRL]);
  147. wm8776_write(chip, WM8776_PWRDOWN, data->wm8776_regs[WM8776_PWRDOWN]);
  148. wm8776_write(chip, WM8776_HPLVOL, data->wm8776_regs[WM8776_HPLVOL]);
  149. wm8776_write(chip, WM8776_HPRVOL, data->wm8776_regs[WM8776_HPRVOL] |
  150. WM8776_UPDATE);
  151. wm8776_write(chip, WM8776_ADCLVOL, data->wm8776_regs[WM8776_ADCLVOL]);
  152. wm8776_write(chip, WM8776_ADCRVOL, data->wm8776_regs[WM8776_ADCRVOL]);
  153. wm8776_write(chip, WM8776_ADCMUX, data->wm8776_regs[WM8776_ADCMUX]);
  154. wm8776_write(chip, WM8776_DACLVOL, chip->dac_volume[0]);
  155. wm8776_write(chip, WM8776_DACRVOL, chip->dac_volume[1] | WM8776_UPDATE);
  156. }
  157. static void wm8766_registers_init(struct oxygen *chip)
  158. {
  159. struct xonar_wm87x6 *data = chip->model_data;
  160. wm8766_write(chip, WM8766_RESET, 0);
  161. wm8766_write(chip, WM8766_DAC_CTRL, data->wm8766_regs[WM8766_DAC_CTRL]);
  162. wm8766_write(chip, WM8766_INT_CTRL, WM8766_FMT_LJUST | WM8766_IWL_24);
  163. wm8766_write(chip, WM8766_DAC_CTRL2,
  164. WM8766_ZCD | (chip->dac_mute ? WM8766_DMUTE_MASK : 0));
  165. wm8766_write(chip, WM8766_LDA1, chip->dac_volume[2]);
  166. wm8766_write(chip, WM8766_RDA1, chip->dac_volume[3]);
  167. wm8766_write(chip, WM8766_LDA2, chip->dac_volume[4]);
  168. wm8766_write(chip, WM8766_RDA2, chip->dac_volume[5]);
  169. wm8766_write(chip, WM8766_LDA3, chip->dac_volume[6]);
  170. wm8766_write(chip, WM8766_RDA3, chip->dac_volume[7] | WM8766_UPDATE);
  171. }
  172. static void wm8776_init(struct oxygen *chip)
  173. {
  174. struct xonar_wm87x6 *data = chip->model_data;
  175. data->wm8776_regs[WM8776_HPLVOL] = (0x79 - 60) | WM8776_HPZCEN;
  176. data->wm8776_regs[WM8776_HPRVOL] = (0x79 - 60) | WM8776_HPZCEN;
  177. data->wm8776_regs[WM8776_ADCIFCTRL] =
  178. WM8776_ADCFMT_LJUST | WM8776_ADCWL_24 | WM8776_ADCMCLK;
  179. data->wm8776_regs[WM8776_MSTRCTRL] =
  180. WM8776_ADCRATE_256 | WM8776_DACRATE_256;
  181. data->wm8776_regs[WM8776_PWRDOWN] = WM8776_HPPD;
  182. data->wm8776_regs[WM8776_ADCLVOL] = 0xa5 | WM8776_ZCA;
  183. data->wm8776_regs[WM8776_ADCRVOL] = 0xa5 | WM8776_ZCA;
  184. data->wm8776_regs[WM8776_ADCMUX] = 0x001;
  185. wm8776_registers_init(chip);
  186. }
  187. static void wm8766_init(struct oxygen *chip)
  188. {
  189. struct xonar_wm87x6 *data = chip->model_data;
  190. data->wm8766_regs[WM8766_DAC_CTRL] =
  191. WM8766_PL_LEFT_LEFT | WM8766_PL_RIGHT_RIGHT;
  192. wm8766_registers_init(chip);
  193. }
  194. static void xonar_ds_handle_hp_jack(struct oxygen *chip)
  195. {
  196. struct xonar_wm87x6 *data = chip->model_data;
  197. bool hp_plugged;
  198. unsigned int reg;
  199. mutex_lock(&chip->mutex);
  200. hp_plugged = !(oxygen_read16(chip, OXYGEN_GPIO_DATA) &
  201. GPIO_DS_HP_DETECT);
  202. oxygen_write16_masked(chip, OXYGEN_GPIO_DATA,
  203. hp_plugged ? 0 : GPIO_DS_OUTPUT_FRONTLR,
  204. GPIO_DS_OUTPUT_FRONTLR);
  205. reg = data->wm8766_regs[WM8766_DAC_CTRL] & ~WM8766_MUTEALL;
  206. if (hp_plugged)
  207. reg |= WM8766_MUTEALL;
  208. wm8766_write_cached(chip, WM8766_DAC_CTRL, reg);
  209. snd_jack_report(data->hp_jack, hp_plugged ? SND_JACK_HEADPHONE : 0);
  210. mutex_unlock(&chip->mutex);
  211. }
  212. static void xonar_ds_init(struct oxygen *chip)
  213. {
  214. struct xonar_wm87x6 *data = chip->model_data;
  215. data->generic.anti_pop_delay = 300;
  216. data->generic.output_enable_bit = GPIO_DS_OUTPUT_ENABLE;
  217. wm8776_init(chip);
  218. wm8766_init(chip);
  219. oxygen_set_bits16(chip, OXYGEN_GPIO_CONTROL,
  220. GPIO_DS_INPUT_ROUTE | GPIO_DS_OUTPUT_FRONTLR);
  221. oxygen_clear_bits16(chip, OXYGEN_GPIO_CONTROL,
  222. GPIO_DS_HP_DETECT);
  223. oxygen_set_bits16(chip, OXYGEN_GPIO_DATA, GPIO_DS_INPUT_ROUTE);
  224. oxygen_set_bits16(chip, OXYGEN_GPIO_INTERRUPT_MASK, GPIO_DS_HP_DETECT);
  225. chip->interrupt_mask |= OXYGEN_INT_GPIO;
  226. xonar_enable_output(chip);
  227. snd_jack_new(chip->card, "Headphone",
  228. SND_JACK_HEADPHONE, &data->hp_jack);
  229. xonar_ds_handle_hp_jack(chip);
  230. snd_component_add(chip->card, "WM8776");
  231. snd_component_add(chip->card, "WM8766");
  232. }
  233. static void xonar_ds_cleanup(struct oxygen *chip)
  234. {
  235. xonar_disable_output(chip);
  236. wm8776_write(chip, WM8776_RESET, 0);
  237. }
  238. static void xonar_ds_suspend(struct oxygen *chip)
  239. {
  240. xonar_ds_cleanup(chip);
  241. }
  242. static void xonar_ds_resume(struct oxygen *chip)
  243. {
  244. wm8776_registers_init(chip);
  245. wm8766_registers_init(chip);
  246. xonar_enable_output(chip);
  247. xonar_ds_handle_hp_jack(chip);
  248. }
  249. static void wm8776_adc_hardware_filter(unsigned int channel,
  250. struct snd_pcm_hardware *hardware)
  251. {
  252. if (channel == PCM_A) {
  253. hardware->rates = SNDRV_PCM_RATE_32000 |
  254. SNDRV_PCM_RATE_44100 |
  255. SNDRV_PCM_RATE_48000 |
  256. SNDRV_PCM_RATE_64000 |
  257. SNDRV_PCM_RATE_88200 |
  258. SNDRV_PCM_RATE_96000;
  259. hardware->rate_max = 96000;
  260. }
  261. }
  262. static void set_wm87x6_dac_params(struct oxygen *chip,
  263. struct snd_pcm_hw_params *params)
  264. {
  265. }
  266. static void set_wm8776_adc_params(struct oxygen *chip,
  267. struct snd_pcm_hw_params *params)
  268. {
  269. u16 reg;
  270. reg = WM8776_ADCRATE_256 | WM8776_DACRATE_256;
  271. if (params_rate(params) > 48000)
  272. reg |= WM8776_ADCOSR;
  273. wm8776_write_cached(chip, WM8776_MSTRCTRL, reg);
  274. }
  275. static void update_wm8776_volume(struct oxygen *chip)
  276. {
  277. struct xonar_wm87x6 *data = chip->model_data;
  278. u8 to_change;
  279. if (chip->dac_volume[0] == chip->dac_volume[1]) {
  280. if (chip->dac_volume[0] != data->wm8776_regs[WM8776_DACLVOL] ||
  281. chip->dac_volume[1] != data->wm8776_regs[WM8776_DACRVOL]) {
  282. wm8776_write(chip, WM8776_DACMASTER,
  283. chip->dac_volume[0] | WM8776_UPDATE);
  284. data->wm8776_regs[WM8776_DACLVOL] = chip->dac_volume[0];
  285. data->wm8776_regs[WM8776_DACRVOL] = chip->dac_volume[0];
  286. }
  287. } else {
  288. to_change = (chip->dac_volume[0] !=
  289. data->wm8776_regs[WM8776_DACLVOL]) << 0;
  290. to_change |= (chip->dac_volume[1] !=
  291. data->wm8776_regs[WM8776_DACLVOL]) << 1;
  292. if (to_change & 1)
  293. wm8776_write(chip, WM8776_DACLVOL, chip->dac_volume[0] |
  294. ((to_change & 2) ? 0 : WM8776_UPDATE));
  295. if (to_change & 2)
  296. wm8776_write(chip, WM8776_DACRVOL,
  297. chip->dac_volume[1] | WM8776_UPDATE);
  298. }
  299. }
  300. static void update_wm87x6_volume(struct oxygen *chip)
  301. {
  302. static const u8 wm8766_regs[6] = {
  303. WM8766_LDA1, WM8766_RDA1,
  304. WM8766_LDA2, WM8766_RDA2,
  305. WM8766_LDA3, WM8766_RDA3,
  306. };
  307. struct xonar_wm87x6 *data = chip->model_data;
  308. unsigned int i;
  309. u8 to_change;
  310. update_wm8776_volume(chip);
  311. if (chip->dac_volume[2] == chip->dac_volume[3] &&
  312. chip->dac_volume[2] == chip->dac_volume[4] &&
  313. chip->dac_volume[2] == chip->dac_volume[5] &&
  314. chip->dac_volume[2] == chip->dac_volume[6] &&
  315. chip->dac_volume[2] == chip->dac_volume[7]) {
  316. to_change = 0;
  317. for (i = 0; i < 6; ++i)
  318. if (chip->dac_volume[2] !=
  319. data->wm8766_regs[wm8766_regs[i]])
  320. to_change = 1;
  321. if (to_change) {
  322. wm8766_write(chip, WM8766_MASTDA,
  323. chip->dac_volume[2] | WM8766_UPDATE);
  324. for (i = 0; i < 6; ++i)
  325. data->wm8766_regs[wm8766_regs[i]] =
  326. chip->dac_volume[2];
  327. }
  328. } else {
  329. to_change = 0;
  330. for (i = 0; i < 6; ++i)
  331. to_change |= (chip->dac_volume[2 + i] !=
  332. data->wm8766_regs[wm8766_regs[i]]) << i;
  333. for (i = 0; i < 6; ++i)
  334. if (to_change & (1 << i))
  335. wm8766_write(chip, wm8766_regs[i],
  336. chip->dac_volume[2 + i] |
  337. ((to_change & (0x3e << i))
  338. ? 0 : WM8766_UPDATE));
  339. }
  340. }
  341. static void update_wm8776_mute(struct oxygen *chip)
  342. {
  343. wm8776_write_cached(chip, WM8776_DACMUTE,
  344. chip->dac_mute ? WM8776_DMUTE : 0);
  345. }
  346. static void update_wm87x6_mute(struct oxygen *chip)
  347. {
  348. update_wm8776_mute(chip);
  349. wm8766_write_cached(chip, WM8766_DAC_CTRL2, WM8766_ZCD |
  350. (chip->dac_mute ? WM8766_DMUTE_MASK : 0));
  351. }
  352. static void update_wm8766_center_lfe_mix(struct oxygen *chip, bool mixed)
  353. {
  354. struct xonar_wm87x6 *data = chip->model_data;
  355. unsigned int reg;
  356. /*
  357. * The WM8766 can mix left and right channels, but this setting
  358. * applies to all three stereo pairs.
  359. */
  360. reg = data->wm8766_regs[WM8766_DAC_CTRL] &
  361. ~(WM8766_PL_LEFT_MASK | WM8766_PL_RIGHT_MASK);
  362. if (mixed)
  363. reg |= WM8766_PL_LEFT_LRMIX | WM8766_PL_RIGHT_LRMIX;
  364. else
  365. reg |= WM8766_PL_LEFT_LEFT | WM8766_PL_RIGHT_RIGHT;
  366. wm8766_write_cached(chip, WM8766_DAC_CTRL, reg);
  367. }
  368. static void xonar_ds_gpio_changed(struct oxygen *chip)
  369. {
  370. xonar_ds_handle_hp_jack(chip);
  371. }
  372. static int wm8776_bit_switch_get(struct snd_kcontrol *ctl,
  373. struct snd_ctl_elem_value *value)
  374. {
  375. struct oxygen *chip = ctl->private_data;
  376. struct xonar_wm87x6 *data = chip->model_data;
  377. u16 bit = ctl->private_value & 0xffff;
  378. unsigned int reg_index = (ctl->private_value >> 16) & 0xff;
  379. bool invert = (ctl->private_value >> 24) & 1;
  380. value->value.integer.value[0] =
  381. ((data->wm8776_regs[reg_index] & bit) != 0) ^ invert;
  382. return 0;
  383. }
  384. static int wm8776_bit_switch_put(struct snd_kcontrol *ctl,
  385. struct snd_ctl_elem_value *value)
  386. {
  387. struct oxygen *chip = ctl->private_data;
  388. struct xonar_wm87x6 *data = chip->model_data;
  389. u16 bit = ctl->private_value & 0xffff;
  390. u16 reg_value;
  391. unsigned int reg_index = (ctl->private_value >> 16) & 0xff;
  392. bool invert = (ctl->private_value >> 24) & 1;
  393. int changed;
  394. mutex_lock(&chip->mutex);
  395. reg_value = data->wm8776_regs[reg_index] & ~bit;
  396. if (value->value.integer.value[0] ^ invert)
  397. reg_value |= bit;
  398. changed = reg_value != data->wm8776_regs[reg_index];
  399. if (changed)
  400. wm8776_write(chip, reg_index, reg_value);
  401. mutex_unlock(&chip->mutex);
  402. return changed;
  403. }
  404. static int wm8776_field_enum_info(struct snd_kcontrol *ctl,
  405. struct snd_ctl_elem_info *info)
  406. {
  407. static const char *const hld[16] = {
  408. "0 ms", "2.67 ms", "5.33 ms", "10.6 ms",
  409. "21.3 ms", "42.7 ms", "85.3 ms", "171 ms",
  410. "341 ms", "683 ms", "1.37 s", "2.73 s",
  411. "5.46 s", "10.9 s", "21.8 s", "43.7 s",
  412. };
  413. static const char *const atk_lim[11] = {
  414. "0.25 ms", "0.5 ms", "1 ms", "2 ms",
  415. "4 ms", "8 ms", "16 ms", "32 ms",
  416. "64 ms", "128 ms", "256 ms",
  417. };
  418. static const char *const atk_alc[11] = {
  419. "8.40 ms", "16.8 ms", "33.6 ms", "67.2 ms",
  420. "134 ms", "269 ms", "538 ms", "1.08 s",
  421. "2.15 s", "4.3 s", "8.6 s",
  422. };
  423. static const char *const dcy_lim[11] = {
  424. "1.2 ms", "2.4 ms", "4.8 ms", "9.6 ms",
  425. "19.2 ms", "38.4 ms", "76.8 ms", "154 ms",
  426. "307 ms", "614 ms", "1.23 s",
  427. };
  428. static const char *const dcy_alc[11] = {
  429. "33.5 ms", "67.0 ms", "134 ms", "268 ms",
  430. "536 ms", "1.07 s", "2.14 s", "4.29 s",
  431. "8.58 s", "17.2 s", "34.3 s",
  432. };
  433. static const char *const tranwin[8] = {
  434. "0 us", "62.5 us", "125 us", "250 us",
  435. "500 us", "1 ms", "2 ms", "4 ms",
  436. };
  437. u8 max;
  438. const char *const *names;
  439. max = (ctl->private_value >> 12) & 0xf;
  440. info->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
  441. info->count = 1;
  442. info->value.enumerated.items = max + 1;
  443. if (info->value.enumerated.item > max)
  444. info->value.enumerated.item = max;
  445. switch ((ctl->private_value >> 24) & 0x1f) {
  446. case WM8776_ALCCTRL2:
  447. names = hld;
  448. break;
  449. case WM8776_ALCCTRL3:
  450. if (((ctl->private_value >> 20) & 0xf) == 0) {
  451. if (ctl->private_value & LC_CONTROL_LIMITER)
  452. names = atk_lim;
  453. else
  454. names = atk_alc;
  455. } else {
  456. if (ctl->private_value & LC_CONTROL_LIMITER)
  457. names = dcy_lim;
  458. else
  459. names = dcy_alc;
  460. }
  461. break;
  462. case WM8776_LIMITER:
  463. names = tranwin;
  464. break;
  465. default:
  466. return -ENXIO;
  467. }
  468. strcpy(info->value.enumerated.name, names[info->value.enumerated.item]);
  469. return 0;
  470. }
  471. static int wm8776_field_volume_info(struct snd_kcontrol *ctl,
  472. struct snd_ctl_elem_info *info)
  473. {
  474. info->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
  475. info->count = 1;
  476. info->value.integer.min = (ctl->private_value >> 8) & 0xf;
  477. info->value.integer.max = (ctl->private_value >> 12) & 0xf;
  478. return 0;
  479. }
  480. static void wm8776_field_set_from_ctl(struct snd_kcontrol *ctl)
  481. {
  482. struct oxygen *chip = ctl->private_data;
  483. struct xonar_wm87x6 *data = chip->model_data;
  484. unsigned int value, reg_index, mode;
  485. u8 min, max, shift;
  486. u16 mask, reg_value;
  487. bool invert;
  488. if ((data->wm8776_regs[WM8776_ALCCTRL1] & WM8776_LCSEL_MASK) ==
  489. WM8776_LCSEL_LIMITER)
  490. mode = LC_CONTROL_LIMITER;
  491. else
  492. mode = LC_CONTROL_ALC;
  493. if (!(ctl->private_value & mode))
  494. return;
  495. value = ctl->private_value & 0xf;
  496. min = (ctl->private_value >> 8) & 0xf;
  497. max = (ctl->private_value >> 12) & 0xf;
  498. mask = (ctl->private_value >> 16) & 0xf;
  499. shift = (ctl->private_value >> 20) & 0xf;
  500. reg_index = (ctl->private_value >> 24) & 0x1f;
  501. invert = (ctl->private_value >> 29) & 0x1;
  502. if (invert)
  503. value = max - (value - min);
  504. reg_value = data->wm8776_regs[reg_index];
  505. reg_value &= ~(mask << shift);
  506. reg_value |= value << shift;
  507. wm8776_write_cached(chip, reg_index, reg_value);
  508. }
  509. static int wm8776_field_set(struct snd_kcontrol *ctl, unsigned int value)
  510. {
  511. struct oxygen *chip = ctl->private_data;
  512. u8 min, max;
  513. int changed;
  514. min = (ctl->private_value >> 8) & 0xf;
  515. max = (ctl->private_value >> 12) & 0xf;
  516. if (value < min || value > max)
  517. return -EINVAL;
  518. mutex_lock(&chip->mutex);
  519. changed = value != (ctl->private_value & 0xf);
  520. if (changed) {
  521. ctl->private_value = (ctl->private_value & ~0xf) | value;
  522. wm8776_field_set_from_ctl(ctl);
  523. }
  524. mutex_unlock(&chip->mutex);
  525. return changed;
  526. }
  527. static int wm8776_field_enum_get(struct snd_kcontrol *ctl,
  528. struct snd_ctl_elem_value *value)
  529. {
  530. value->value.enumerated.item[0] = ctl->private_value & 0xf;
  531. return 0;
  532. }
  533. static int wm8776_field_volume_get(struct snd_kcontrol *ctl,
  534. struct snd_ctl_elem_value *value)
  535. {
  536. value->value.integer.value[0] = ctl->private_value & 0xf;
  537. return 0;
  538. }
  539. static int wm8776_field_enum_put(struct snd_kcontrol *ctl,
  540. struct snd_ctl_elem_value *value)
  541. {
  542. return wm8776_field_set(ctl, value->value.enumerated.item[0]);
  543. }
  544. static int wm8776_field_volume_put(struct snd_kcontrol *ctl,
  545. struct snd_ctl_elem_value *value)
  546. {
  547. return wm8776_field_set(ctl, value->value.integer.value[0]);
  548. }
  549. static int wm8776_hp_vol_info(struct snd_kcontrol *ctl,
  550. struct snd_ctl_elem_info *info)
  551. {
  552. info->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
  553. info->count = 2;
  554. info->value.integer.min = 0x79 - 60;
  555. info->value.integer.max = 0x7f;
  556. return 0;
  557. }
  558. static int wm8776_hp_vol_get(struct snd_kcontrol *ctl,
  559. struct snd_ctl_elem_value *value)
  560. {
  561. struct oxygen *chip = ctl->private_data;
  562. struct xonar_wm87x6 *data = chip->model_data;
  563. mutex_lock(&chip->mutex);
  564. value->value.integer.value[0] =
  565. data->wm8776_regs[WM8776_HPLVOL] & WM8776_HPATT_MASK;
  566. value->value.integer.value[1] =
  567. data->wm8776_regs[WM8776_HPRVOL] & WM8776_HPATT_MASK;
  568. mutex_unlock(&chip->mutex);
  569. return 0;
  570. }
  571. static int wm8776_hp_vol_put(struct snd_kcontrol *ctl,
  572. struct snd_ctl_elem_value *value)
  573. {
  574. struct oxygen *chip = ctl->private_data;
  575. struct xonar_wm87x6 *data = chip->model_data;
  576. u8 to_update;
  577. mutex_lock(&chip->mutex);
  578. to_update = (value->value.integer.value[0] !=
  579. (data->wm8776_regs[WM8776_HPLVOL] & WM8776_HPATT_MASK))
  580. << 0;
  581. to_update |= (value->value.integer.value[1] !=
  582. (data->wm8776_regs[WM8776_HPRVOL] & WM8776_HPATT_MASK))
  583. << 1;
  584. if (value->value.integer.value[0] == value->value.integer.value[1]) {
  585. if (to_update) {
  586. wm8776_write(chip, WM8776_HPMASTER,
  587. value->value.integer.value[0] |
  588. WM8776_HPZCEN | WM8776_UPDATE);
  589. data->wm8776_regs[WM8776_HPLVOL] =
  590. value->value.integer.value[0] | WM8776_HPZCEN;
  591. data->wm8776_regs[WM8776_HPRVOL] =
  592. value->value.integer.value[0] | WM8776_HPZCEN;
  593. }
  594. } else {
  595. if (to_update & 1)
  596. wm8776_write(chip, WM8776_HPLVOL,
  597. value->value.integer.value[0] |
  598. WM8776_HPZCEN |
  599. ((to_update & 2) ? 0 : WM8776_UPDATE));
  600. if (to_update & 2)
  601. wm8776_write(chip, WM8776_HPRVOL,
  602. value->value.integer.value[1] |
  603. WM8776_HPZCEN | WM8776_UPDATE);
  604. }
  605. mutex_unlock(&chip->mutex);
  606. return to_update != 0;
  607. }
  608. static int wm8776_input_mux_get(struct snd_kcontrol *ctl,
  609. struct snd_ctl_elem_value *value)
  610. {
  611. struct oxygen *chip = ctl->private_data;
  612. struct xonar_wm87x6 *data = chip->model_data;
  613. unsigned int mux_bit = ctl->private_value;
  614. value->value.integer.value[0] =
  615. !!(data->wm8776_regs[WM8776_ADCMUX] & mux_bit);
  616. return 0;
  617. }
  618. static int wm8776_input_mux_put(struct snd_kcontrol *ctl,
  619. struct snd_ctl_elem_value *value)
  620. {
  621. struct oxygen *chip = ctl->private_data;
  622. struct xonar_wm87x6 *data = chip->model_data;
  623. struct snd_kcontrol *other_ctl;
  624. unsigned int mux_bit = ctl->private_value;
  625. u16 reg;
  626. int changed;
  627. mutex_lock(&chip->mutex);
  628. reg = data->wm8776_regs[WM8776_ADCMUX];
  629. if (value->value.integer.value[0]) {
  630. reg |= mux_bit;
  631. /* line-in and mic-in are exclusive */
  632. mux_bit ^= 3;
  633. if (reg & mux_bit) {
  634. reg &= ~mux_bit;
  635. if (mux_bit == 1)
  636. other_ctl = data->line_adcmux_control;
  637. else
  638. other_ctl = data->mic_adcmux_control;
  639. snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_VALUE,
  640. &other_ctl->id);
  641. }
  642. } else
  643. reg &= ~mux_bit;
  644. changed = reg != data->wm8776_regs[WM8776_ADCMUX];
  645. if (changed) {
  646. oxygen_write16_masked(chip, OXYGEN_GPIO_DATA,
  647. reg & 1 ? GPIO_DS_INPUT_ROUTE : 0,
  648. GPIO_DS_INPUT_ROUTE);
  649. wm8776_write(chip, WM8776_ADCMUX, reg);
  650. }
  651. mutex_unlock(&chip->mutex);
  652. return changed;
  653. }
  654. static int wm8776_input_vol_info(struct snd_kcontrol *ctl,
  655. struct snd_ctl_elem_info *info)
  656. {
  657. info->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
  658. info->count = 2;
  659. info->value.integer.min = 0xa5;
  660. info->value.integer.max = 0xff;
  661. return 0;
  662. }
  663. static int wm8776_input_vol_get(struct snd_kcontrol *ctl,
  664. struct snd_ctl_elem_value *value)
  665. {
  666. struct oxygen *chip = ctl->private_data;
  667. struct xonar_wm87x6 *data = chip->model_data;
  668. mutex_lock(&chip->mutex);
  669. value->value.integer.value[0] =
  670. data->wm8776_regs[WM8776_ADCLVOL] & WM8776_AGMASK;
  671. value->value.integer.value[1] =
  672. data->wm8776_regs[WM8776_ADCRVOL] & WM8776_AGMASK;
  673. mutex_unlock(&chip->mutex);
  674. return 0;
  675. }
  676. static int wm8776_input_vol_put(struct snd_kcontrol *ctl,
  677. struct snd_ctl_elem_value *value)
  678. {
  679. struct oxygen *chip = ctl->private_data;
  680. struct xonar_wm87x6 *data = chip->model_data;
  681. int changed = 0;
  682. mutex_lock(&chip->mutex);
  683. changed = (value->value.integer.value[0] !=
  684. (data->wm8776_regs[WM8776_ADCLVOL] & WM8776_AGMASK)) ||
  685. (value->value.integer.value[1] !=
  686. (data->wm8776_regs[WM8776_ADCRVOL] & WM8776_AGMASK));
  687. wm8776_write_cached(chip, WM8776_ADCLVOL,
  688. value->value.integer.value[0] | WM8776_ZCA);
  689. wm8776_write_cached(chip, WM8776_ADCRVOL,
  690. value->value.integer.value[1] | WM8776_ZCA);
  691. mutex_unlock(&chip->mutex);
  692. return changed;
  693. }
  694. static int wm8776_level_control_info(struct snd_kcontrol *ctl,
  695. struct snd_ctl_elem_info *info)
  696. {
  697. static const char *const names[3] = {
  698. "None", "Peak Limiter", "Automatic Level Control"
  699. };
  700. info->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
  701. info->count = 1;
  702. info->value.enumerated.items = 3;
  703. if (info->value.enumerated.item >= 3)
  704. info->value.enumerated.item = 2;
  705. strcpy(info->value.enumerated.name, names[info->value.enumerated.item]);
  706. return 0;
  707. }
  708. static int wm8776_level_control_get(struct snd_kcontrol *ctl,
  709. struct snd_ctl_elem_value *value)
  710. {
  711. struct oxygen *chip = ctl->private_data;
  712. struct xonar_wm87x6 *data = chip->model_data;
  713. if (!(data->wm8776_regs[WM8776_ALCCTRL2] & WM8776_LCEN))
  714. value->value.enumerated.item[0] = 0;
  715. else if ((data->wm8776_regs[WM8776_ALCCTRL1] & WM8776_LCSEL_MASK) ==
  716. WM8776_LCSEL_LIMITER)
  717. value->value.enumerated.item[0] = 1;
  718. else
  719. value->value.enumerated.item[0] = 2;
  720. return 0;
  721. }
  722. static void activate_control(struct oxygen *chip,
  723. struct snd_kcontrol *ctl, unsigned int mode)
  724. {
  725. unsigned int access;
  726. if (ctl->private_value & mode)
  727. access = 0;
  728. else
  729. access = SNDRV_CTL_ELEM_ACCESS_INACTIVE;
  730. if ((ctl->vd[0].access & SNDRV_CTL_ELEM_ACCESS_INACTIVE) != access) {
  731. ctl->vd[0].access ^= SNDRV_CTL_ELEM_ACCESS_INACTIVE;
  732. snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_INFO, &ctl->id);
  733. }
  734. }
  735. static int wm8776_level_control_put(struct snd_kcontrol *ctl,
  736. struct snd_ctl_elem_value *value)
  737. {
  738. struct oxygen *chip = ctl->private_data;
  739. struct xonar_wm87x6 *data = chip->model_data;
  740. unsigned int mode = 0, i;
  741. u16 ctrl1, ctrl2;
  742. int changed;
  743. if (value->value.enumerated.item[0] >= 3)
  744. return -EINVAL;
  745. mutex_lock(&chip->mutex);
  746. changed = value->value.enumerated.item[0] != ctl->private_value;
  747. if (changed) {
  748. ctl->private_value = value->value.enumerated.item[0];
  749. ctrl1 = data->wm8776_regs[WM8776_ALCCTRL1];
  750. ctrl2 = data->wm8776_regs[WM8776_ALCCTRL2];
  751. switch (value->value.enumerated.item[0]) {
  752. default:
  753. wm8776_write_cached(chip, WM8776_ALCCTRL2,
  754. ctrl2 & ~WM8776_LCEN);
  755. break;
  756. case 1:
  757. wm8776_write_cached(chip, WM8776_ALCCTRL1,
  758. (ctrl1 & ~WM8776_LCSEL_MASK) |
  759. WM8776_LCSEL_LIMITER);
  760. wm8776_write_cached(chip, WM8776_ALCCTRL2,
  761. ctrl2 | WM8776_LCEN);
  762. mode = LC_CONTROL_LIMITER;
  763. break;
  764. case 2:
  765. wm8776_write_cached(chip, WM8776_ALCCTRL1,
  766. (ctrl1 & ~WM8776_LCSEL_MASK) |
  767. WM8776_LCSEL_ALC_STEREO);
  768. wm8776_write_cached(chip, WM8776_ALCCTRL2,
  769. ctrl2 | WM8776_LCEN);
  770. mode = LC_CONTROL_ALC;
  771. break;
  772. }
  773. for (i = 0; i < ARRAY_SIZE(data->lc_controls); ++i)
  774. activate_control(chip, data->lc_controls[i], mode);
  775. }
  776. mutex_unlock(&chip->mutex);
  777. return changed;
  778. }
  779. static int hpf_info(struct snd_kcontrol *ctl, struct snd_ctl_elem_info *info)
  780. {
  781. static const char *const names[2] = {
  782. "None", "High-pass Filter"
  783. };
  784. info->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
  785. info->count = 1;
  786. info->value.enumerated.items = 2;
  787. if (info->value.enumerated.item >= 2)
  788. info->value.enumerated.item = 1;
  789. strcpy(info->value.enumerated.name, names[info->value.enumerated.item]);
  790. return 0;
  791. }
  792. static int hpf_get(struct snd_kcontrol *ctl, struct snd_ctl_elem_value *value)
  793. {
  794. struct oxygen *chip = ctl->private_data;
  795. struct xonar_wm87x6 *data = chip->model_data;
  796. value->value.enumerated.item[0] =
  797. !(data->wm8776_regs[WM8776_ADCIFCTRL] & WM8776_ADCHPD);
  798. return 0;
  799. }
  800. static int hpf_put(struct snd_kcontrol *ctl, struct snd_ctl_elem_value *value)
  801. {
  802. struct oxygen *chip = ctl->private_data;
  803. struct xonar_wm87x6 *data = chip->model_data;
  804. unsigned int reg;
  805. int changed;
  806. mutex_lock(&chip->mutex);
  807. reg = data->wm8776_regs[WM8776_ADCIFCTRL] & ~WM8776_ADCHPD;
  808. if (!value->value.enumerated.item[0])
  809. reg |= WM8776_ADCHPD;
  810. changed = reg != data->wm8776_regs[WM8776_ADCIFCTRL];
  811. if (changed)
  812. wm8776_write(chip, WM8776_ADCIFCTRL, reg);
  813. mutex_unlock(&chip->mutex);
  814. return changed;
  815. }
  816. #define WM8776_BIT_SWITCH(xname, reg, bit, invert, flags) { \
  817. .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
  818. .name = xname, \
  819. .info = snd_ctl_boolean_mono_info, \
  820. .get = wm8776_bit_switch_get, \
  821. .put = wm8776_bit_switch_put, \
  822. .private_value = ((reg) << 16) | (bit) | ((invert) << 24) | (flags), \
  823. }
  824. #define _WM8776_FIELD_CTL(xname, reg, shift, initval, min, max, mask, flags) \
  825. .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
  826. .name = xname, \
  827. .private_value = (initval) | ((min) << 8) | ((max) << 12) | \
  828. ((mask) << 16) | ((shift) << 20) | ((reg) << 24) | (flags)
  829. #define WM8776_FIELD_CTL_ENUM(xname, reg, shift, init, min, max, mask, flags) {\
  830. _WM8776_FIELD_CTL(xname " Capture Enum", \
  831. reg, shift, init, min, max, mask, flags), \
  832. .access = SNDRV_CTL_ELEM_ACCESS_READWRITE | \
  833. SNDRV_CTL_ELEM_ACCESS_INACTIVE, \
  834. .info = wm8776_field_enum_info, \
  835. .get = wm8776_field_enum_get, \
  836. .put = wm8776_field_enum_put, \
  837. }
  838. #define WM8776_FIELD_CTL_VOLUME(a, b, c, d, e, f, g, h, tlv_p) { \
  839. _WM8776_FIELD_CTL(a " Capture Volume", b, c, d, e, f, g, h), \
  840. .access = SNDRV_CTL_ELEM_ACCESS_READWRITE | \
  841. SNDRV_CTL_ELEM_ACCESS_INACTIVE | \
  842. SNDRV_CTL_ELEM_ACCESS_TLV_READ, \
  843. .info = wm8776_field_volume_info, \
  844. .get = wm8776_field_volume_get, \
  845. .put = wm8776_field_volume_put, \
  846. .tlv = { .p = tlv_p }, \
  847. }
  848. static const DECLARE_TLV_DB_SCALE(wm87x6_dac_db_scale, -6000, 50, 0);
  849. static const DECLARE_TLV_DB_SCALE(wm8776_adc_db_scale, -2100, 50, 0);
  850. static const DECLARE_TLV_DB_SCALE(wm8776_hp_db_scale, -6000, 100, 0);
  851. static const DECLARE_TLV_DB_SCALE(wm8776_lct_db_scale, -1600, 100, 0);
  852. static const DECLARE_TLV_DB_SCALE(wm8776_maxgain_db_scale, 0, 400, 0);
  853. static const DECLARE_TLV_DB_SCALE(wm8776_ngth_db_scale, -7800, 600, 0);
  854. static const DECLARE_TLV_DB_SCALE(wm8776_maxatten_lim_db_scale, -1200, 100, 0);
  855. static const DECLARE_TLV_DB_SCALE(wm8776_maxatten_alc_db_scale, -2100, 400, 0);
  856. static const struct snd_kcontrol_new ds_controls[] = {
  857. {
  858. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  859. .name = "Headphone Playback Volume",
  860. .info = wm8776_hp_vol_info,
  861. .get = wm8776_hp_vol_get,
  862. .put = wm8776_hp_vol_put,
  863. .tlv = { .p = wm8776_hp_db_scale },
  864. },
  865. WM8776_BIT_SWITCH("Headphone Playback Switch",
  866. WM8776_PWRDOWN, WM8776_HPPD, 1, 0),
  867. {
  868. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  869. .name = "Input Capture Volume",
  870. .info = wm8776_input_vol_info,
  871. .get = wm8776_input_vol_get,
  872. .put = wm8776_input_vol_put,
  873. .tlv = { .p = wm8776_adc_db_scale },
  874. },
  875. {
  876. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  877. .name = "Line Capture Switch",
  878. .info = snd_ctl_boolean_mono_info,
  879. .get = wm8776_input_mux_get,
  880. .put = wm8776_input_mux_put,
  881. .private_value = 1 << 0,
  882. },
  883. {
  884. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  885. .name = "Mic Capture Switch",
  886. .info = snd_ctl_boolean_mono_info,
  887. .get = wm8776_input_mux_get,
  888. .put = wm8776_input_mux_put,
  889. .private_value = 1 << 1,
  890. },
  891. WM8776_BIT_SWITCH("Front Mic Capture Switch",
  892. WM8776_ADCMUX, 1 << 2, 0, 0),
  893. WM8776_BIT_SWITCH("Aux Capture Switch",
  894. WM8776_ADCMUX, 1 << 3, 0, 0),
  895. {
  896. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  897. .name = "ADC Filter Capture Enum",
  898. .info = hpf_info,
  899. .get = hpf_get,
  900. .put = hpf_put,
  901. },
  902. {
  903. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  904. .name = "Level Control Capture Enum",
  905. .info = wm8776_level_control_info,
  906. .get = wm8776_level_control_get,
  907. .put = wm8776_level_control_put,
  908. .private_value = 0,
  909. },
  910. };
  911. static const struct snd_kcontrol_new lc_controls[] = {
  912. WM8776_FIELD_CTL_VOLUME("Limiter Threshold",
  913. WM8776_ALCCTRL1, 0, 11, 0, 15, 0xf,
  914. LC_CONTROL_LIMITER, wm8776_lct_db_scale),
  915. WM8776_FIELD_CTL_ENUM("Limiter Attack Time",
  916. WM8776_ALCCTRL3, 0, 2, 0, 10, 0xf,
  917. LC_CONTROL_LIMITER),
  918. WM8776_FIELD_CTL_ENUM("Limiter Decay Time",
  919. WM8776_ALCCTRL3, 4, 3, 0, 10, 0xf,
  920. LC_CONTROL_LIMITER),
  921. WM8776_FIELD_CTL_ENUM("Limiter Transient Window",
  922. WM8776_LIMITER, 4, 2, 0, 7, 0x7,
  923. LC_CONTROL_LIMITER),
  924. WM8776_FIELD_CTL_VOLUME("Limiter Maximum Attenuation",
  925. WM8776_LIMITER, 0, 6, 3, 12, 0xf,
  926. LC_CONTROL_LIMITER,
  927. wm8776_maxatten_lim_db_scale),
  928. WM8776_FIELD_CTL_VOLUME("ALC Target Level",
  929. WM8776_ALCCTRL1, 0, 11, 0, 15, 0xf,
  930. LC_CONTROL_ALC, wm8776_lct_db_scale),
  931. WM8776_FIELD_CTL_ENUM("ALC Attack Time",
  932. WM8776_ALCCTRL3, 0, 2, 0, 10, 0xf,
  933. LC_CONTROL_ALC),
  934. WM8776_FIELD_CTL_ENUM("ALC Decay Time",
  935. WM8776_ALCCTRL3, 4, 3, 0, 10, 0xf,
  936. LC_CONTROL_ALC),
  937. WM8776_FIELD_CTL_VOLUME("ALC Maximum Gain",
  938. WM8776_ALCCTRL1, 4, 7, 1, 7, 0x7,
  939. LC_CONTROL_ALC, wm8776_maxgain_db_scale),
  940. WM8776_FIELD_CTL_VOLUME("ALC Maximum Attenuation",
  941. WM8776_LIMITER, 0, 10, 10, 15, 0xf,
  942. LC_CONTROL_ALC, wm8776_maxatten_alc_db_scale),
  943. WM8776_FIELD_CTL_ENUM("ALC Hold Time",
  944. WM8776_ALCCTRL2, 0, 0, 0, 15, 0xf,
  945. LC_CONTROL_ALC),
  946. WM8776_BIT_SWITCH("Noise Gate Capture Switch",
  947. WM8776_NOISEGATE, WM8776_NGAT, 0,
  948. LC_CONTROL_ALC),
  949. WM8776_FIELD_CTL_VOLUME("Noise Gate Threshold",
  950. WM8776_NOISEGATE, 2, 0, 0, 7, 0x7,
  951. LC_CONTROL_ALC, wm8776_ngth_db_scale),
  952. };
  953. static int xonar_ds_mixer_init(struct oxygen *chip)
  954. {
  955. struct xonar_wm87x6 *data = chip->model_data;
  956. unsigned int i;
  957. struct snd_kcontrol *ctl;
  958. int err;
  959. for (i = 0; i < ARRAY_SIZE(ds_controls); ++i) {
  960. ctl = snd_ctl_new1(&ds_controls[i], chip);
  961. if (!ctl)
  962. return -ENOMEM;
  963. err = snd_ctl_add(chip->card, ctl);
  964. if (err < 0)
  965. return err;
  966. if (!strcmp(ctl->id.name, "Line Capture Switch"))
  967. data->line_adcmux_control = ctl;
  968. else if (!strcmp(ctl->id.name, "Mic Capture Switch"))
  969. data->mic_adcmux_control = ctl;
  970. }
  971. if (!data->line_adcmux_control || !data->mic_adcmux_control)
  972. return -ENXIO;
  973. BUILD_BUG_ON(ARRAY_SIZE(lc_controls) != ARRAY_SIZE(data->lc_controls));
  974. for (i = 0; i < ARRAY_SIZE(lc_controls); ++i) {
  975. ctl = snd_ctl_new1(&lc_controls[i], chip);
  976. if (!ctl)
  977. return -ENOMEM;
  978. err = snd_ctl_add(chip->card, ctl);
  979. if (err < 0)
  980. return err;
  981. data->lc_controls[i] = ctl;
  982. }
  983. return 0;
  984. }
  985. static void dump_wm8776_registers(struct oxygen *chip,
  986. struct snd_info_buffer *buffer)
  987. {
  988. struct xonar_wm87x6 *data = chip->model_data;
  989. unsigned int i;
  990. snd_iprintf(buffer, "\nWM8776:\n00:");
  991. for (i = 0; i < 0x10; ++i)
  992. snd_iprintf(buffer, " %03x", data->wm8776_regs[i]);
  993. snd_iprintf(buffer, "\n10:");
  994. for (i = 0x10; i < 0x17; ++i)
  995. snd_iprintf(buffer, " %03x", data->wm8776_regs[i]);
  996. snd_iprintf(buffer, "\n");
  997. }
  998. static void dump_wm87x6_registers(struct oxygen *chip,
  999. struct snd_info_buffer *buffer)
  1000. {
  1001. struct xonar_wm87x6 *data = chip->model_data;
  1002. unsigned int i;
  1003. dump_wm8776_registers(chip, buffer);
  1004. snd_iprintf(buffer, "\nWM8766:\n00:");
  1005. for (i = 0; i < 0x10; ++i)
  1006. snd_iprintf(buffer, " %03x", data->wm8766_regs[i]);
  1007. snd_iprintf(buffer, "\n");
  1008. }
  1009. static const struct oxygen_model model_xonar_ds = {
  1010. .shortname = "Xonar DS",
  1011. .longname = "Asus Virtuoso 66",
  1012. .chip = "AV200",
  1013. .init = xonar_ds_init,
  1014. .mixer_init = xonar_ds_mixer_init,
  1015. .cleanup = xonar_ds_cleanup,
  1016. .suspend = xonar_ds_suspend,
  1017. .resume = xonar_ds_resume,
  1018. .pcm_hardware_filter = wm8776_adc_hardware_filter,
  1019. .get_i2s_mclk = oxygen_default_i2s_mclk,
  1020. .set_dac_params = set_wm87x6_dac_params,
  1021. .set_adc_params = set_wm8776_adc_params,
  1022. .update_dac_volume = update_wm87x6_volume,
  1023. .update_dac_mute = update_wm87x6_mute,
  1024. .update_center_lfe_mix = update_wm8766_center_lfe_mix,
  1025. .gpio_changed = xonar_ds_gpio_changed,
  1026. .dump_registers = dump_wm87x6_registers,
  1027. .dac_tlv = wm87x6_dac_db_scale,
  1028. .model_data_size = sizeof(struct xonar_wm87x6),
  1029. .device_config = PLAYBACK_0_TO_I2S |
  1030. PLAYBACK_1_TO_SPDIF |
  1031. CAPTURE_0_FROM_I2S_1,
  1032. .dac_channels_pcm = 8,
  1033. .dac_channels_mixer = 8,
  1034. .dac_volume_min = 255 - 2*60,
  1035. .dac_volume_max = 255,
  1036. .function_flags = OXYGEN_FUNCTION_SPI,
  1037. .dac_i2s_format = OXYGEN_I2S_FORMAT_LJUST,
  1038. .adc_i2s_format = OXYGEN_I2S_FORMAT_LJUST,
  1039. };
  1040. int __devinit get_xonar_wm87x6_model(struct oxygen *chip,
  1041. const struct pci_device_id *id)
  1042. {
  1043. switch (id->subdevice) {
  1044. case 0x838e:
  1045. chip->model = model_xonar_ds;
  1046. break;
  1047. default:
  1048. return -EINVAL;
  1049. }
  1050. return 0;
  1051. }