ohci-pci.c 6.2 KB

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  1. /*
  2. * OHCI HCD (Host Controller Driver) for USB.
  3. *
  4. * (C) Copyright 1999 Roman Weissgaerber <weissg@vienna.at>
  5. * (C) Copyright 2000-2002 David Brownell <dbrownell@users.sourceforge.net>
  6. *
  7. * [ Initialisation is based on Linus' ]
  8. * [ uhci code and gregs ohci fragments ]
  9. * [ (C) Copyright 1999 Linus Torvalds ]
  10. * [ (C) Copyright 1999 Gregory P. Smith]
  11. *
  12. * PCI Bus Glue
  13. *
  14. * This file is licenced under the GPL.
  15. */
  16. #ifdef CONFIG_PPC_PMAC
  17. #include <asm/machdep.h>
  18. #include <asm/pmac_feature.h>
  19. #include <asm/pci-bridge.h>
  20. #include <asm/prom.h>
  21. #endif
  22. #ifndef CONFIG_PCI
  23. #error "This file is PCI bus glue. CONFIG_PCI must be defined."
  24. #endif
  25. /*-------------------------------------------------------------------------*/
  26. static int
  27. ohci_pci_reset (struct usb_hcd *hcd)
  28. {
  29. struct ohci_hcd *ohci = hcd_to_ohci (hcd);
  30. ohci_hcd_init (ohci);
  31. return ohci_init (ohci);
  32. }
  33. static int __devinit
  34. ohci_pci_start (struct usb_hcd *hcd)
  35. {
  36. struct ohci_hcd *ohci = hcd_to_ohci (hcd);
  37. int ret;
  38. if(hcd->self.controller && hcd->self.controller->bus == &pci_bus_type) {
  39. struct pci_dev *pdev = to_pci_dev(hcd->self.controller);
  40. /* AMD 756, for most chips (early revs), corrupts register
  41. * values on read ... so enable the vendor workaround.
  42. */
  43. if (pdev->vendor == PCI_VENDOR_ID_AMD
  44. && pdev->device == 0x740c) {
  45. ohci->flags = OHCI_QUIRK_AMD756;
  46. ohci_dbg (ohci, "AMD756 erratum 4 workaround\n");
  47. // also somewhat erratum 10 (suspend/resume issues)
  48. }
  49. /* FIXME for some of the early AMD 760 southbridges, OHCI
  50. * won't work at all. blacklist them.
  51. */
  52. /* Apple's OHCI driver has a lot of bizarre workarounds
  53. * for this chip. Evidently control and bulk lists
  54. * can get confused. (B&W G3 models, and ...)
  55. */
  56. else if (pdev->vendor == PCI_VENDOR_ID_OPTI
  57. && pdev->device == 0xc861) {
  58. ohci_dbg (ohci,
  59. "WARNING: OPTi workarounds unavailable\n");
  60. }
  61. /* Check for NSC87560. We have to look at the bridge (fn1) to
  62. * identify the USB (fn2). This quirk might apply to more or
  63. * even all NSC stuff.
  64. */
  65. else if (pdev->vendor == PCI_VENDOR_ID_NS) {
  66. struct pci_dev *b;
  67. b = pci_find_slot (pdev->bus->number,
  68. PCI_DEVFN (PCI_SLOT (pdev->devfn), 1));
  69. if (b && b->device == PCI_DEVICE_ID_NS_87560_LIO
  70. && b->vendor == PCI_VENDOR_ID_NS) {
  71. ohci->flags |= OHCI_QUIRK_SUPERIO;
  72. ohci_dbg (ohci, "Using NSC SuperIO setup\n");
  73. }
  74. }
  75. /* Check for Compaq's ZFMicro chipset, which needs short
  76. * delays before control or bulk queues get re-activated
  77. * in finish_unlinks()
  78. */
  79. else if (pdev->vendor == PCI_VENDOR_ID_COMPAQ
  80. && pdev->device == 0xa0f8) {
  81. ohci->flags |= OHCI_QUIRK_ZFMICRO;
  82. ohci_dbg (ohci,
  83. "enabled Compaq ZFMicro chipset quirk\n");
  84. }
  85. }
  86. /* NOTE: there may have already been a first reset, to
  87. * keep bios/smm irqs from making trouble
  88. */
  89. if ((ret = ohci_run (ohci)) < 0) {
  90. ohci_err (ohci, "can't start\n");
  91. ohci_stop (hcd);
  92. return ret;
  93. }
  94. return 0;
  95. }
  96. #ifdef CONFIG_PM
  97. static int ohci_pci_suspend (struct usb_hcd *hcd, pm_message_t message)
  98. {
  99. /* root hub was already suspended */
  100. /* FIXME these PMAC things get called in the wrong places. ASIC
  101. * clocks should be turned off AFTER entering D3, and on BEFORE
  102. * trying to enter D0. Evidently the PCI layer doesn't currently
  103. * provide the right sort of platform hooks for this ...
  104. */
  105. #ifdef CONFIG_PPC_PMAC
  106. if (_machine == _MACH_Pmac) {
  107. struct device_node *of_node;
  108. /* Disable USB PAD & cell clock */
  109. of_node = pci_device_to_OF_node (to_pci_dev(hcd->self.controller));
  110. if (of_node)
  111. pmac_call_feature(PMAC_FTR_USB_ENABLE, of_node, 0, 0);
  112. }
  113. #endif /* CONFIG_PPC_PMAC */
  114. return 0;
  115. }
  116. static int ohci_pci_resume (struct usb_hcd *hcd)
  117. {
  118. #ifdef CONFIG_PPC_PMAC
  119. if (_machine == _MACH_Pmac) {
  120. struct device_node *of_node;
  121. /* Re-enable USB PAD & cell clock */
  122. of_node = pci_device_to_OF_node (to_pci_dev(hcd->self.controller));
  123. if (of_node)
  124. pmac_call_feature (PMAC_FTR_USB_ENABLE, of_node, 0, 1);
  125. }
  126. #endif /* CONFIG_PPC_PMAC */
  127. usb_hcd_resume_root_hub(hcd);
  128. return 0;
  129. }
  130. #endif /* CONFIG_PM */
  131. /*-------------------------------------------------------------------------*/
  132. static const struct hc_driver ohci_pci_hc_driver = {
  133. .description = hcd_name,
  134. .product_desc = "OHCI Host Controller",
  135. .hcd_priv_size = sizeof(struct ohci_hcd),
  136. /*
  137. * generic hardware linkage
  138. */
  139. .irq = ohci_irq,
  140. .flags = HCD_MEMORY | HCD_USB11,
  141. /*
  142. * basic lifecycle operations
  143. */
  144. .reset = ohci_pci_reset,
  145. .start = ohci_pci_start,
  146. #ifdef CONFIG_PM
  147. .suspend = ohci_pci_suspend,
  148. .resume = ohci_pci_resume,
  149. #endif
  150. .stop = ohci_stop,
  151. /*
  152. * managing i/o requests and associated device resources
  153. */
  154. .urb_enqueue = ohci_urb_enqueue,
  155. .urb_dequeue = ohci_urb_dequeue,
  156. .endpoint_disable = ohci_endpoint_disable,
  157. /*
  158. * scheduling support
  159. */
  160. .get_frame_number = ohci_get_frame,
  161. /*
  162. * root hub support
  163. */
  164. .hub_status_data = ohci_hub_status_data,
  165. .hub_control = ohci_hub_control,
  166. #ifdef CONFIG_PM
  167. .bus_suspend = ohci_bus_suspend,
  168. .bus_resume = ohci_bus_resume,
  169. #endif
  170. .start_port_reset = ohci_start_port_reset,
  171. };
  172. /*-------------------------------------------------------------------------*/
  173. static const struct pci_device_id pci_ids [] = { {
  174. /* handle any USB OHCI controller */
  175. PCI_DEVICE_CLASS((PCI_CLASS_SERIAL_USB << 8) | 0x10, ~0),
  176. .driver_data = (unsigned long) &ohci_pci_hc_driver,
  177. }, { /* end: all zeroes */ }
  178. };
  179. MODULE_DEVICE_TABLE (pci, pci_ids);
  180. /* pci driver glue; this is a "new style" PCI driver module */
  181. static struct pci_driver ohci_pci_driver = {
  182. .name = (char *) hcd_name,
  183. .id_table = pci_ids,
  184. .owner = THIS_MODULE,
  185. .probe = usb_hcd_pci_probe,
  186. .remove = usb_hcd_pci_remove,
  187. #ifdef CONFIG_PM
  188. .suspend = usb_hcd_pci_suspend,
  189. .resume = usb_hcd_pci_resume,
  190. #endif
  191. };
  192. static int __init ohci_hcd_pci_init (void)
  193. {
  194. printk (KERN_DEBUG "%s: " DRIVER_INFO " (PCI)\n", hcd_name);
  195. if (usb_disabled())
  196. return -ENODEV;
  197. pr_debug ("%s: block sizes: ed %Zd td %Zd\n", hcd_name,
  198. sizeof (struct ed), sizeof (struct td));
  199. return pci_register_driver (&ohci_pci_driver);
  200. }
  201. module_init (ohci_hcd_pci_init);
  202. /*-------------------------------------------------------------------------*/
  203. static void __exit ohci_hcd_pci_cleanup (void)
  204. {
  205. pci_unregister_driver (&ohci_pci_driver);
  206. }
  207. module_exit (ohci_hcd_pci_cleanup);