68360serial.c 76 KB

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  1. /*
  2. * UART driver for 68360 CPM SCC or SMC
  3. * Copyright (c) 2000 D. Jeff Dionne <jeff@uclinux.org>,
  4. * Copyright (c) 2000 Michael Leslie <mleslie@lineo.ca>
  5. * Copyright (c) 1997 Dan Malek <dmalek@jlc.net>
  6. *
  7. * I used the serial.c driver as the framework for this driver.
  8. * Give credit to those guys.
  9. * The original code was written for the MBX860 board. I tried to make
  10. * it generic, but there may be some assumptions in the structures that
  11. * have to be fixed later.
  12. * To save porting time, I did not bother to change any object names
  13. * that are not accessed outside of this file.
  14. * It still needs lots of work........When it was easy, I included code
  15. * to support the SCCs, but this has never been tested, nor is it complete.
  16. * Only the SCCs support modem control, so that is not complete either.
  17. *
  18. * This module exports the following rs232 io functions:
  19. *
  20. * int rs_360_init(void);
  21. */
  22. #include <linux/config.h>
  23. #include <linux/module.h>
  24. #include <linux/errno.h>
  25. #include <linux/signal.h>
  26. #include <linux/sched.h>
  27. #include <linux/timer.h>
  28. #include <linux/interrupt.h>
  29. #include <linux/tty.h>
  30. #include <linux/tty_flip.h>
  31. #include <linux/serial.h>
  32. #include <linux/serialP.h>
  33. #include <linux/major.h>
  34. #include <linux/string.h>
  35. #include <linux/fcntl.h>
  36. #include <linux/ptrace.h>
  37. #include <linux/mm.h>
  38. #include <linux/init.h>
  39. #include <linux/delay.h>
  40. #include <asm/irq.h>
  41. #include <asm/m68360.h>
  42. #include <asm/commproc.h>
  43. #ifdef CONFIG_KGDB
  44. extern void breakpoint(void);
  45. extern void set_debug_traps(void);
  46. extern int kgdb_output_string (const char* s, unsigned int count);
  47. #endif
  48. /* #ifdef CONFIG_SERIAL_CONSOLE */ /* This seems to be a post 2.0 thing - mles */
  49. #include <linux/console.h>
  50. /* this defines the index into rs_table for the port to use
  51. */
  52. #ifndef CONFIG_SERIAL_CONSOLE_PORT
  53. #define CONFIG_SERIAL_CONSOLE_PORT 1 /* ie SMC2 - note USE_SMC2 must be defined */
  54. #endif
  55. /* #endif */
  56. #if 0
  57. /* SCC2 for console
  58. */
  59. #undef CONFIG_SERIAL_CONSOLE_PORT
  60. #define CONFIG_SERIAL_CONSOLE_PORT 2
  61. #endif
  62. #define TX_WAKEUP ASYNC_SHARE_IRQ
  63. static char *serial_name = "CPM UART driver";
  64. static char *serial_version = "0.03";
  65. static struct tty_driver *serial_driver;
  66. int serial_console_setup(struct console *co, char *options);
  67. /*
  68. * Serial driver configuration section. Here are the various options:
  69. */
  70. #define SERIAL_PARANOIA_CHECK
  71. #define CONFIG_SERIAL_NOPAUSE_IO
  72. #define SERIAL_DO_RESTART
  73. /* Set of debugging defines */
  74. #undef SERIAL_DEBUG_INTR
  75. #undef SERIAL_DEBUG_OPEN
  76. #undef SERIAL_DEBUG_FLOW
  77. #undef SERIAL_DEBUG_RS_WAIT_UNTIL_SENT
  78. #define _INLINE_ inline
  79. #define DBG_CNT(s)
  80. /* We overload some of the items in the data structure to meet our
  81. * needs. For example, the port address is the CPM parameter ram
  82. * offset for the SCC or SMC. The maximum number of ports is 4 SCCs and
  83. * 2 SMCs. The "hub6" field is used to indicate the channel number, with
  84. * a flag indicating SCC or SMC, and the number is used as an index into
  85. * the CPM parameter area for this device.
  86. * The "type" field is currently set to 0, for PORT_UNKNOWN. It is
  87. * not currently used. I should probably use it to indicate the port
  88. * type of SMC or SCC.
  89. * The SMCs do not support any modem control signals.
  90. */
  91. #define smc_scc_num hub6
  92. #define NUM_IS_SCC ((int)0x00010000)
  93. #define PORT_NUM(P) ((P) & 0x0000ffff)
  94. #if defined (CONFIG_UCQUICC)
  95. volatile extern void *_periph_base;
  96. /* sipex transceiver
  97. * mode bits for are on pins
  98. *
  99. * SCC2 d16..19
  100. * SCC3 d20..23
  101. * SCC4 d24..27
  102. */
  103. #define SIPEX_MODE(n,m) ((m & 0x0f)<<(16+4*(n-1)))
  104. static uint sipex_mode_bits = 0x00000000;
  105. #endif
  106. /* There is no `serial_state' defined back here in 2.0.
  107. * Try to get by with serial_struct
  108. */
  109. /* #define serial_state serial_struct */
  110. /* 2.4 -> 2.0 portability problem: async_icount in 2.4 has a few
  111. * extras: */
  112. #if 0
  113. struct async_icount_24 {
  114. __u32 cts, dsr, rng, dcd, tx, rx;
  115. __u32 frame, parity, overrun, brk;
  116. __u32 buf_overrun;
  117. } icount;
  118. #endif
  119. #if 0
  120. struct serial_state {
  121. int magic;
  122. int baud_base;
  123. unsigned long port;
  124. int irq;
  125. int flags;
  126. int hub6;
  127. int type;
  128. int line;
  129. int revision; /* Chip revision (950) */
  130. int xmit_fifo_size;
  131. int custom_divisor;
  132. int count;
  133. u8 *iomem_base;
  134. u16 iomem_reg_shift;
  135. unsigned short close_delay;
  136. unsigned short closing_wait; /* time to wait before closing */
  137. struct async_icount_24 icount;
  138. int io_type;
  139. struct async_struct *info;
  140. };
  141. #endif
  142. #define SSTATE_MAGIC 0x5302
  143. /* SMC2 is sometimes used for low performance TDM interfaces. Define
  144. * this as 1 if you want SMC2 as a serial port UART managed by this driver.
  145. * Define this as 0 if you wish to use SMC2 for something else.
  146. */
  147. #define USE_SMC2 1
  148. #if 0
  149. /* Define SCC to ttySx mapping. */
  150. #define SCC_NUM_BASE (USE_SMC2 + 1) /* SCC base tty "number" */
  151. /* Define which SCC is the first one to use for a serial port. These
  152. * are 0-based numbers, i.e. this assumes the first SCC (SCC1) is used
  153. * for Ethernet, and the first available SCC for serial UART is SCC2.
  154. * NOTE: IF YOU CHANGE THIS, you have to change the PROFF_xxx and
  155. * interrupt vectors in the table below to match.
  156. */
  157. #define SCC_IDX_BASE 1 /* table index */
  158. #endif
  159. /* Processors other than the 860 only get SMCs configured by default.
  160. * Either they don't have SCCs or they are allocated somewhere else.
  161. * Of course, there are now 860s without some SCCs, so we will need to
  162. * address that someday.
  163. * The Embedded Planet Multimedia I/O cards use TDM interfaces to the
  164. * stereo codec parts, and we use SMC2 to help support that.
  165. */
  166. static struct serial_state rs_table[] = {
  167. /* type line PORT IRQ FLAGS smc_scc_num (F.K.A. hub6) */
  168. { 0, 0, PRSLOT_SMC1, CPMVEC_SMC1, 0, 0 } /* SMC1 ttyS0 */
  169. #if USE_SMC2
  170. ,{ 0, 0, PRSLOT_SMC2, CPMVEC_SMC2, 0, 1 } /* SMC2 ttyS1 */
  171. #endif
  172. #if defined(CONFIG_SERIAL_68360_SCC)
  173. ,{ 0, 0, PRSLOT_SCC2, CPMVEC_SCC2, 0, (NUM_IS_SCC | 1) } /* SCC2 ttyS2 */
  174. ,{ 0, 0, PRSLOT_SCC3, CPMVEC_SCC3, 0, (NUM_IS_SCC | 2) } /* SCC3 ttyS3 */
  175. ,{ 0, 0, PRSLOT_SCC4, CPMVEC_SCC4, 0, (NUM_IS_SCC | 3) } /* SCC4 ttyS4 */
  176. #endif
  177. };
  178. #define NR_PORTS (sizeof(rs_table)/sizeof(struct serial_state))
  179. /* The number of buffer descriptors and their sizes.
  180. */
  181. #define RX_NUM_FIFO 4
  182. #define RX_BUF_SIZE 32
  183. #define TX_NUM_FIFO 4
  184. #define TX_BUF_SIZE 32
  185. #define CONSOLE_NUM_FIFO 2
  186. #define CONSOLE_BUF_SIZE 4
  187. char *console_fifos[CONSOLE_NUM_FIFO * CONSOLE_BUF_SIZE];
  188. /* The async_struct in serial.h does not really give us what we
  189. * need, so define our own here.
  190. */
  191. typedef struct serial_info {
  192. int magic;
  193. int flags;
  194. struct serial_state *state;
  195. /* struct serial_struct *state; */
  196. /* struct async_struct *state; */
  197. struct tty_struct *tty;
  198. int read_status_mask;
  199. int ignore_status_mask;
  200. int timeout;
  201. int line;
  202. int x_char; /* xon/xoff character */
  203. int close_delay;
  204. unsigned short closing_wait;
  205. unsigned short closing_wait2;
  206. unsigned long event;
  207. unsigned long last_active;
  208. int blocked_open; /* # of blocked opens */
  209. struct work_struct tqueue;
  210. struct work_struct tqueue_hangup;
  211. wait_queue_head_t open_wait;
  212. wait_queue_head_t close_wait;
  213. /* CPM Buffer Descriptor pointers.
  214. */
  215. QUICC_BD *rx_bd_base;
  216. QUICC_BD *rx_cur;
  217. QUICC_BD *tx_bd_base;
  218. QUICC_BD *tx_cur;
  219. } ser_info_t;
  220. /* since kmalloc_init() does not get called until much after this initialization: */
  221. static ser_info_t quicc_ser_info[NR_PORTS];
  222. static char rx_buf_pool[NR_PORTS * RX_NUM_FIFO * RX_BUF_SIZE];
  223. static char tx_buf_pool[NR_PORTS * TX_NUM_FIFO * TX_BUF_SIZE];
  224. static void change_speed(ser_info_t *info);
  225. static void rs_360_wait_until_sent(struct tty_struct *tty, int timeout);
  226. static inline int serial_paranoia_check(ser_info_t *info,
  227. char *name, const char *routine)
  228. {
  229. #ifdef SERIAL_PARANOIA_CHECK
  230. static const char *badmagic =
  231. "Warning: bad magic number for serial struct (%s) in %s\n";
  232. static const char *badinfo =
  233. "Warning: null async_struct for (%s) in %s\n";
  234. if (!info) {
  235. printk(badinfo, name, routine);
  236. return 1;
  237. }
  238. if (info->magic != SERIAL_MAGIC) {
  239. printk(badmagic, name, routine);
  240. return 1;
  241. }
  242. #endif
  243. return 0;
  244. }
  245. /*
  246. * This is used to figure out the divisor speeds and the timeouts,
  247. * indexed by the termio value. The generic CPM functions are responsible
  248. * for setting and assigning baud rate generators for us.
  249. */
  250. static int baud_table[] = {
  251. 0, 50, 75, 110, 134, 150, 200, 300, 600, 1200, 1800, 2400, 4800,
  252. 9600, 19200, 38400, 57600, 115200, 230400, 460800, 0 };
  253. /* This sucks. There is a better way: */
  254. #if defined(CONFIG_CONSOLE_9600)
  255. #define CONSOLE_BAUDRATE 9600
  256. #elif defined(CONFIG_CONSOLE_19200)
  257. #define CONSOLE_BAUDRATE 19200
  258. #elif defined(CONFIG_CONSOLE_115200)
  259. #define CONSOLE_BAUDRATE 115200
  260. #else
  261. #warning "console baud rate undefined"
  262. #define CONSOLE_BAUDRATE 9600
  263. #endif
  264. /*
  265. * ------------------------------------------------------------
  266. * rs_stop() and rs_start()
  267. *
  268. * This routines are called before setting or resetting tty->stopped.
  269. * They enable or disable transmitter interrupts, as necessary.
  270. * ------------------------------------------------------------
  271. */
  272. static void rs_360_stop(struct tty_struct *tty)
  273. {
  274. ser_info_t *info = (ser_info_t *)tty->driver_data;
  275. int idx;
  276. unsigned long flags;
  277. volatile struct scc_regs *sccp;
  278. volatile struct smc_regs *smcp;
  279. if (serial_paranoia_check(info, tty->name, "rs_stop"))
  280. return;
  281. local_irq_save(flags);
  282. idx = PORT_NUM(info->state->smc_scc_num);
  283. if (info->state->smc_scc_num & NUM_IS_SCC) {
  284. sccp = &pquicc->scc_regs[idx];
  285. sccp->scc_sccm &= ~UART_SCCM_TX;
  286. } else {
  287. /* smcp = &cpmp->cp_smc[idx]; */
  288. smcp = &pquicc->smc_regs[idx];
  289. smcp->smc_smcm &= ~SMCM_TX;
  290. }
  291. local_irq_restore(flags);
  292. }
  293. static void rs_360_start(struct tty_struct *tty)
  294. {
  295. ser_info_t *info = (ser_info_t *)tty->driver_data;
  296. int idx;
  297. unsigned long flags;
  298. volatile struct scc_regs *sccp;
  299. volatile struct smc_regs *smcp;
  300. if (serial_paranoia_check(info, tty->name, "rs_stop"))
  301. return;
  302. local_irq_save(flags);
  303. idx = PORT_NUM(info->state->smc_scc_num);
  304. if (info->state->smc_scc_num & NUM_IS_SCC) {
  305. sccp = &pquicc->scc_regs[idx];
  306. sccp->scc_sccm |= UART_SCCM_TX;
  307. } else {
  308. smcp = &pquicc->smc_regs[idx];
  309. smcp->smc_smcm |= SMCM_TX;
  310. }
  311. local_irq_restore(flags);
  312. }
  313. /*
  314. * ----------------------------------------------------------------------
  315. *
  316. * Here starts the interrupt handling routines. All of the following
  317. * subroutines are declared as inline and are folded into
  318. * rs_interrupt(). They were separated out for readability's sake.
  319. *
  320. * Note: rs_interrupt() is a "fast" interrupt, which means that it
  321. * runs with interrupts turned off. People who may want to modify
  322. * rs_interrupt() should try to keep the interrupt handler as fast as
  323. * possible. After you are done making modifications, it is not a bad
  324. * idea to do:
  325. *
  326. * gcc -S -DKERNEL -Wall -Wstrict-prototypes -O6 -fomit-frame-pointer serial.c
  327. *
  328. * and look at the resulting assemble code in serial.s.
  329. *
  330. * - Ted Ts'o (tytso@mit.edu), 7-Mar-93
  331. * -----------------------------------------------------------------------
  332. */
  333. static _INLINE_ void receive_chars(ser_info_t *info)
  334. {
  335. struct tty_struct *tty = info->tty;
  336. unsigned char ch, *cp;
  337. /*int ignored = 0;*/
  338. int i;
  339. ushort status;
  340. struct async_icount *icount;
  341. /* struct async_icount_24 *icount; */
  342. volatile QUICC_BD *bdp;
  343. icount = &info->state->icount;
  344. /* Just loop through the closed BDs and copy the characters into
  345. * the buffer.
  346. */
  347. bdp = info->rx_cur;
  348. for (;;) {
  349. if (bdp->status & BD_SC_EMPTY) /* If this one is empty */
  350. break; /* we are all done */
  351. /* The read status mask tell us what we should do with
  352. * incoming characters, especially if errors occur.
  353. * One special case is the use of BD_SC_EMPTY. If
  354. * this is not set, we are supposed to be ignoring
  355. * inputs. In this case, just mark the buffer empty and
  356. * continue.
  357. */
  358. if (!(info->read_status_mask & BD_SC_EMPTY)) {
  359. bdp->status |= BD_SC_EMPTY;
  360. bdp->status &=
  361. ~(BD_SC_BR | BD_SC_FR | BD_SC_PR | BD_SC_OV);
  362. if (bdp->status & BD_SC_WRAP)
  363. bdp = info->rx_bd_base;
  364. else
  365. bdp++;
  366. continue;
  367. }
  368. /* Get the number of characters and the buffer pointer.
  369. */
  370. i = bdp->length;
  371. /* cp = (unsigned char *)__va(bdp->buf); */
  372. cp = (char *)bdp->buf;
  373. status = bdp->status;
  374. /* Check to see if there is room in the tty buffer for
  375. * the characters in our BD buffer. If not, we exit
  376. * now, leaving the BD with the characters. We'll pick
  377. * them up again on the next receive interrupt (which could
  378. * be a timeout).
  379. */
  380. if ((tty->flip.count + i) >= TTY_FLIPBUF_SIZE)
  381. break;
  382. while (i-- > 0) {
  383. ch = *cp++;
  384. *tty->flip.char_buf_ptr = ch;
  385. icount->rx++;
  386. #ifdef SERIAL_DEBUG_INTR
  387. printk("DR%02x:%02x...", ch, status);
  388. #endif
  389. *tty->flip.flag_buf_ptr = 0;
  390. if (status & (BD_SC_BR | BD_SC_FR |
  391. BD_SC_PR | BD_SC_OV)) {
  392. /*
  393. * For statistics only
  394. */
  395. if (status & BD_SC_BR)
  396. icount->brk++;
  397. else if (status & BD_SC_PR)
  398. icount->parity++;
  399. else if (status & BD_SC_FR)
  400. icount->frame++;
  401. if (status & BD_SC_OV)
  402. icount->overrun++;
  403. /*
  404. * Now check to see if character should be
  405. * ignored, and mask off conditions which
  406. * should be ignored.
  407. if (status & info->ignore_status_mask) {
  408. if (++ignored > 100)
  409. break;
  410. continue;
  411. }
  412. */
  413. status &= info->read_status_mask;
  414. if (status & (BD_SC_BR)) {
  415. #ifdef SERIAL_DEBUG_INTR
  416. printk("handling break....");
  417. #endif
  418. *tty->flip.flag_buf_ptr = TTY_BREAK;
  419. if (info->flags & ASYNC_SAK)
  420. do_SAK(tty);
  421. } else if (status & BD_SC_PR)
  422. *tty->flip.flag_buf_ptr = TTY_PARITY;
  423. else if (status & BD_SC_FR)
  424. *tty->flip.flag_buf_ptr = TTY_FRAME;
  425. if (status & BD_SC_OV) {
  426. /*
  427. * Overrun is special, since it's
  428. * reported immediately, and doesn't
  429. * affect the current character
  430. */
  431. if (tty->flip.count < TTY_FLIPBUF_SIZE) {
  432. tty->flip.count++;
  433. tty->flip.flag_buf_ptr++;
  434. tty->flip.char_buf_ptr++;
  435. *tty->flip.flag_buf_ptr =
  436. TTY_OVERRUN;
  437. }
  438. }
  439. }
  440. if (tty->flip.count >= TTY_FLIPBUF_SIZE)
  441. break;
  442. tty->flip.flag_buf_ptr++;
  443. tty->flip.char_buf_ptr++;
  444. tty->flip.count++;
  445. }
  446. /* This BD is ready to be used again. Clear status.
  447. * Get next BD.
  448. */
  449. bdp->status |= BD_SC_EMPTY;
  450. bdp->status &= ~(BD_SC_BR | BD_SC_FR | BD_SC_PR | BD_SC_OV);
  451. if (bdp->status & BD_SC_WRAP)
  452. bdp = info->rx_bd_base;
  453. else
  454. bdp++;
  455. }
  456. info->rx_cur = (QUICC_BD *)bdp;
  457. schedule_work(&tty->flip.work);
  458. }
  459. static _INLINE_ void receive_break(ser_info_t *info)
  460. {
  461. struct tty_struct *tty = info->tty;
  462. info->state->icount.brk++;
  463. /* Check to see if there is room in the tty buffer for
  464. * the break. If not, we exit now, losing the break. FIXME
  465. */
  466. if ((tty->flip.count + 1) >= TTY_FLIPBUF_SIZE)
  467. return;
  468. *(tty->flip.flag_buf_ptr++) = TTY_BREAK;
  469. *(tty->flip.char_buf_ptr++) = 0;
  470. tty->flip.count++;
  471. schedule_work(&tty->flip.work);
  472. }
  473. static _INLINE_ void transmit_chars(ser_info_t *info)
  474. {
  475. if ((info->flags & TX_WAKEUP) ||
  476. (info->tty->flags & (1 << TTY_DO_WRITE_WAKEUP))) {
  477. schedule_work(&info->tqueue);
  478. }
  479. #ifdef SERIAL_DEBUG_INTR
  480. printk("THRE...");
  481. #endif
  482. }
  483. #ifdef notdef
  484. /* I need to do this for the SCCs, so it is left as a reminder.
  485. */
  486. static _INLINE_ void check_modem_status(struct async_struct *info)
  487. {
  488. int status;
  489. /* struct async_icount *icount; */
  490. struct async_icount_24 *icount;
  491. status = serial_in(info, UART_MSR);
  492. if (status & UART_MSR_ANY_DELTA) {
  493. icount = &info->state->icount;
  494. /* update input line counters */
  495. if (status & UART_MSR_TERI)
  496. icount->rng++;
  497. if (status & UART_MSR_DDSR)
  498. icount->dsr++;
  499. if (status & UART_MSR_DDCD) {
  500. icount->dcd++;
  501. #ifdef CONFIG_HARD_PPS
  502. if ((info->flags & ASYNC_HARDPPS_CD) &&
  503. (status & UART_MSR_DCD))
  504. hardpps();
  505. #endif
  506. }
  507. if (status & UART_MSR_DCTS)
  508. icount->cts++;
  509. wake_up_interruptible(&info->delta_msr_wait);
  510. }
  511. if ((info->flags & ASYNC_CHECK_CD) && (status & UART_MSR_DDCD)) {
  512. #if (defined(SERIAL_DEBUG_OPEN) || defined(SERIAL_DEBUG_INTR))
  513. printk("ttys%d CD now %s...", info->line,
  514. (status & UART_MSR_DCD) ? "on" : "off");
  515. #endif
  516. if (status & UART_MSR_DCD)
  517. wake_up_interruptible(&info->open_wait);
  518. else {
  519. #ifdef SERIAL_DEBUG_OPEN
  520. printk("scheduling hangup...");
  521. #endif
  522. queue_task(&info->tqueue_hangup,
  523. &tq_scheduler);
  524. }
  525. }
  526. if (info->flags & ASYNC_CTS_FLOW) {
  527. if (info->tty->hw_stopped) {
  528. if (status & UART_MSR_CTS) {
  529. #if (defined(SERIAL_DEBUG_INTR) || defined(SERIAL_DEBUG_FLOW))
  530. printk("CTS tx start...");
  531. #endif
  532. info->tty->hw_stopped = 0;
  533. info->IER |= UART_IER_THRI;
  534. serial_out(info, UART_IER, info->IER);
  535. rs_sched_event(info, RS_EVENT_WRITE_WAKEUP);
  536. return;
  537. }
  538. } else {
  539. if (!(status & UART_MSR_CTS)) {
  540. #if (defined(SERIAL_DEBUG_INTR) || defined(SERIAL_DEBUG_FLOW))
  541. printk("CTS tx stop...");
  542. #endif
  543. info->tty->hw_stopped = 1;
  544. info->IER &= ~UART_IER_THRI;
  545. serial_out(info, UART_IER, info->IER);
  546. }
  547. }
  548. }
  549. }
  550. #endif
  551. /*
  552. * This is the serial driver's interrupt routine for a single port
  553. */
  554. /* static void rs_360_interrupt(void *dev_id) */ /* until and if we start servicing irqs here */
  555. static void rs_360_interrupt(int vec, void *dev_id, struct pt_regs *fp)
  556. {
  557. u_char events;
  558. int idx;
  559. ser_info_t *info;
  560. volatile struct smc_regs *smcp;
  561. volatile struct scc_regs *sccp;
  562. info = (ser_info_t *)dev_id;
  563. idx = PORT_NUM(info->state->smc_scc_num);
  564. if (info->state->smc_scc_num & NUM_IS_SCC) {
  565. sccp = &pquicc->scc_regs[idx];
  566. events = sccp->scc_scce;
  567. if (events & SCCM_RX)
  568. receive_chars(info);
  569. if (events & SCCM_TX)
  570. transmit_chars(info);
  571. sccp->scc_scce = events;
  572. } else {
  573. smcp = &pquicc->smc_regs[idx];
  574. events = smcp->smc_smce;
  575. if (events & SMCM_BRKE)
  576. receive_break(info);
  577. if (events & SMCM_RX)
  578. receive_chars(info);
  579. if (events & SMCM_TX)
  580. transmit_chars(info);
  581. smcp->smc_smce = events;
  582. }
  583. #ifdef SERIAL_DEBUG_INTR
  584. printk("rs_interrupt_single(%d, %x)...",
  585. info->state->smc_scc_num, events);
  586. #endif
  587. #ifdef modem_control
  588. check_modem_status(info);
  589. #endif
  590. info->last_active = jiffies;
  591. #ifdef SERIAL_DEBUG_INTR
  592. printk("end.\n");
  593. #endif
  594. }
  595. /*
  596. * -------------------------------------------------------------------
  597. * Here ends the serial interrupt routines.
  598. * -------------------------------------------------------------------
  599. */
  600. static void do_softint(void *private_)
  601. {
  602. ser_info_t *info = (ser_info_t *) private_;
  603. struct tty_struct *tty;
  604. tty = info->tty;
  605. if (!tty)
  606. return;
  607. if (test_and_clear_bit(RS_EVENT_WRITE_WAKEUP, &info->event))
  608. tty_wakeup(tty);
  609. }
  610. /*
  611. * This routine is called from the scheduler tqueue when the interrupt
  612. * routine has signalled that a hangup has occurred. The path of
  613. * hangup processing is:
  614. *
  615. * serial interrupt routine -> (scheduler tqueue) ->
  616. * do_serial_hangup() -> tty->hangup() -> rs_hangup()
  617. *
  618. */
  619. static void do_serial_hangup(void *private_)
  620. {
  621. struct async_struct *info = (struct async_struct *) private_;
  622. struct tty_struct *tty;
  623. tty = info->tty;
  624. if (!tty)
  625. return;
  626. tty_hangup(tty);
  627. }
  628. static int startup(ser_info_t *info)
  629. {
  630. unsigned long flags;
  631. int retval=0;
  632. int idx;
  633. /*struct serial_state *state = info->state;*/
  634. volatile struct smc_regs *smcp;
  635. volatile struct scc_regs *sccp;
  636. volatile struct smc_uart_pram *up;
  637. volatile struct uart_pram *scup;
  638. local_irq_save(flags);
  639. if (info->flags & ASYNC_INITIALIZED) {
  640. goto errout;
  641. }
  642. #ifdef maybe
  643. if (!state->port || !state->type) {
  644. if (info->tty)
  645. set_bit(TTY_IO_ERROR, &info->tty->flags);
  646. goto errout;
  647. }
  648. #endif
  649. #ifdef SERIAL_DEBUG_OPEN
  650. printk("starting up ttys%d (irq %d)...", info->line, state->irq);
  651. #endif
  652. #ifdef modem_control
  653. info->MCR = 0;
  654. if (info->tty->termios->c_cflag & CBAUD)
  655. info->MCR = UART_MCR_DTR | UART_MCR_RTS;
  656. #endif
  657. if (info->tty)
  658. clear_bit(TTY_IO_ERROR, &info->tty->flags);
  659. /*
  660. * and set the speed of the serial port
  661. */
  662. change_speed(info);
  663. idx = PORT_NUM(info->state->smc_scc_num);
  664. if (info->state->smc_scc_num & NUM_IS_SCC) {
  665. sccp = &pquicc->scc_regs[idx];
  666. scup = &pquicc->pram[info->state->port].scc.pscc.u;
  667. scup->mrblr = RX_BUF_SIZE;
  668. scup->max_idl = RX_BUF_SIZE;
  669. sccp->scc_sccm |= (UART_SCCM_TX | UART_SCCM_RX);
  670. sccp->scc_gsmr.w.low |= (SCC_GSMRL_ENR | SCC_GSMRL_ENT);
  671. } else {
  672. smcp = &pquicc->smc_regs[idx];
  673. /* Enable interrupts and I/O.
  674. */
  675. smcp->smc_smcm |= (SMCM_RX | SMCM_TX);
  676. smcp->smc_smcmr |= (SMCMR_REN | SMCMR_TEN);
  677. /* We can tune the buffer length and idle characters
  678. * to take advantage of the entire incoming buffer size.
  679. * If mrblr is something other than 1, maxidl has to be
  680. * non-zero or we never get an interrupt. The maxidl
  681. * is the number of character times we wait after reception
  682. * of the last character before we decide no more characters
  683. * are coming.
  684. */
  685. /* up = (smc_uart_t *)&pquicc->cp_dparam[state->port]; */
  686. /* holy unionized structures, Batman: */
  687. up = &pquicc->pram[info->state->port].scc.pothers.idma_smc.psmc.u;
  688. up->mrblr = RX_BUF_SIZE;
  689. up->max_idl = RX_BUF_SIZE;
  690. up->brkcr = 1; /* number of break chars */
  691. }
  692. info->flags |= ASYNC_INITIALIZED;
  693. local_irq_restore(flags);
  694. return 0;
  695. errout:
  696. local_irq_restore(flags);
  697. return retval;
  698. }
  699. /*
  700. * This routine will shutdown a serial port; interrupts are disabled, and
  701. * DTR is dropped if the hangup on close termio flag is on.
  702. */
  703. static void shutdown(ser_info_t *info)
  704. {
  705. unsigned long flags;
  706. struct serial_state *state;
  707. int idx;
  708. volatile struct smc_regs *smcp;
  709. volatile struct scc_regs *sccp;
  710. if (!(info->flags & ASYNC_INITIALIZED))
  711. return;
  712. state = info->state;
  713. #ifdef SERIAL_DEBUG_OPEN
  714. printk("Shutting down serial port %d (irq %d)....", info->line,
  715. state->irq);
  716. #endif
  717. local_irq_save(flags);
  718. idx = PORT_NUM(state->smc_scc_num);
  719. if (state->smc_scc_num & NUM_IS_SCC) {
  720. sccp = &pquicc->scc_regs[idx];
  721. sccp->scc_gsmr.w.low &= ~(SCC_GSMRL_ENR | SCC_GSMRL_ENT);
  722. #ifdef CONFIG_SERIAL_CONSOLE
  723. /* We can't disable the transmitter if this is the
  724. * system console.
  725. */
  726. if ((state - rs_table) != CONFIG_SERIAL_CONSOLE_PORT)
  727. #endif
  728. sccp->scc_sccm &= ~(UART_SCCM_TX | UART_SCCM_RX);
  729. } else {
  730. smcp = &pquicc->smc_regs[idx];
  731. /* Disable interrupts and I/O.
  732. */
  733. smcp->smc_smcm &= ~(SMCM_RX | SMCM_TX);
  734. #ifdef CONFIG_SERIAL_CONSOLE
  735. /* We can't disable the transmitter if this is the
  736. * system console.
  737. */
  738. if ((state - rs_table) != CONFIG_SERIAL_CONSOLE_PORT)
  739. #endif
  740. smcp->smc_smcmr &= ~(SMCMR_REN | SMCMR_TEN);
  741. }
  742. if (info->tty)
  743. set_bit(TTY_IO_ERROR, &info->tty->flags);
  744. info->flags &= ~ASYNC_INITIALIZED;
  745. local_irq_restore(flags);
  746. }
  747. /*
  748. * This routine is called to set the UART divisor registers to match
  749. * the specified baud rate for a serial port.
  750. */
  751. static void change_speed(ser_info_t *info)
  752. {
  753. int baud_rate;
  754. unsigned cflag, cval, scval, prev_mode;
  755. int i, bits, sbits, idx;
  756. unsigned long flags;
  757. struct serial_state *state;
  758. volatile struct smc_regs *smcp;
  759. volatile struct scc_regs *sccp;
  760. if (!info->tty || !info->tty->termios)
  761. return;
  762. cflag = info->tty->termios->c_cflag;
  763. state = info->state;
  764. /* Character length programmed into the mode register is the
  765. * sum of: 1 start bit, number of data bits, 0 or 1 parity bit,
  766. * 1 or 2 stop bits, minus 1.
  767. * The value 'bits' counts this for us.
  768. */
  769. cval = 0;
  770. scval = 0;
  771. /* byte size and parity */
  772. switch (cflag & CSIZE) {
  773. case CS5: bits = 5; break;
  774. case CS6: bits = 6; break;
  775. case CS7: bits = 7; break;
  776. case CS8: bits = 8; break;
  777. /* Never happens, but GCC is too dumb to figure it out */
  778. default: bits = 8; break;
  779. }
  780. sbits = bits - 5;
  781. if (cflag & CSTOPB) {
  782. cval |= SMCMR_SL; /* Two stops */
  783. scval |= SCU_PMSR_SL;
  784. bits++;
  785. }
  786. if (cflag & PARENB) {
  787. cval |= SMCMR_PEN;
  788. scval |= SCU_PMSR_PEN;
  789. bits++;
  790. }
  791. if (!(cflag & PARODD)) {
  792. cval |= SMCMR_PM_EVEN;
  793. scval |= (SCU_PMSR_REVP | SCU_PMSR_TEVP);
  794. }
  795. /* Determine divisor based on baud rate */
  796. i = cflag & CBAUD;
  797. if (i >= (sizeof(baud_table)/sizeof(int)))
  798. baud_rate = 9600;
  799. else
  800. baud_rate = baud_table[i];
  801. info->timeout = (TX_BUF_SIZE*HZ*bits);
  802. info->timeout += HZ/50; /* Add .02 seconds of slop */
  803. #ifdef modem_control
  804. /* CTS flow control flag and modem status interrupts */
  805. info->IER &= ~UART_IER_MSI;
  806. if (info->flags & ASYNC_HARDPPS_CD)
  807. info->IER |= UART_IER_MSI;
  808. if (cflag & CRTSCTS) {
  809. info->flags |= ASYNC_CTS_FLOW;
  810. info->IER |= UART_IER_MSI;
  811. } else
  812. info->flags &= ~ASYNC_CTS_FLOW;
  813. if (cflag & CLOCAL)
  814. info->flags &= ~ASYNC_CHECK_CD;
  815. else {
  816. info->flags |= ASYNC_CHECK_CD;
  817. info->IER |= UART_IER_MSI;
  818. }
  819. serial_out(info, UART_IER, info->IER);
  820. #endif
  821. /*
  822. * Set up parity check flag
  823. */
  824. #define RELEVANT_IFLAG(iflag) (iflag & (IGNBRK|BRKINT|IGNPAR|PARMRK|INPCK))
  825. info->read_status_mask = (BD_SC_EMPTY | BD_SC_OV);
  826. if (I_INPCK(info->tty))
  827. info->read_status_mask |= BD_SC_FR | BD_SC_PR;
  828. if (I_BRKINT(info->tty) || I_PARMRK(info->tty))
  829. info->read_status_mask |= BD_SC_BR;
  830. /*
  831. * Characters to ignore
  832. */
  833. info->ignore_status_mask = 0;
  834. if (I_IGNPAR(info->tty))
  835. info->ignore_status_mask |= BD_SC_PR | BD_SC_FR;
  836. if (I_IGNBRK(info->tty)) {
  837. info->ignore_status_mask |= BD_SC_BR;
  838. /*
  839. * If we're ignore parity and break indicators, ignore
  840. * overruns too. (For real raw support).
  841. */
  842. if (I_IGNPAR(info->tty))
  843. info->ignore_status_mask |= BD_SC_OV;
  844. }
  845. /*
  846. * !!! ignore all characters if CREAD is not set
  847. */
  848. if ((cflag & CREAD) == 0)
  849. info->read_status_mask &= ~BD_SC_EMPTY;
  850. local_irq_save(flags);
  851. /* Start bit has not been added (so don't, because we would just
  852. * subtract it later), and we need to add one for the number of
  853. * stops bits (there is always at least one).
  854. */
  855. bits++;
  856. idx = PORT_NUM(state->smc_scc_num);
  857. if (state->smc_scc_num & NUM_IS_SCC) {
  858. sccp = &pquicc->scc_regs[idx];
  859. sccp->scc_psmr = (sbits << 12) | scval;
  860. } else {
  861. smcp = &pquicc->smc_regs[idx];
  862. /* Set the mode register. We want to keep a copy of the
  863. * enables, because we want to put them back if they were
  864. * present.
  865. */
  866. prev_mode = smcp->smc_smcmr;
  867. smcp->smc_smcmr = smcr_mk_clen(bits) | cval | SMCMR_SM_UART;
  868. smcp->smc_smcmr |= (prev_mode & (SMCMR_REN | SMCMR_TEN));
  869. }
  870. m360_cpm_setbrg((state - rs_table), baud_rate);
  871. local_irq_restore(flags);
  872. }
  873. static void rs_360_put_char(struct tty_struct *tty, unsigned char ch)
  874. {
  875. ser_info_t *info = (ser_info_t *)tty->driver_data;
  876. volatile QUICC_BD *bdp;
  877. if (serial_paranoia_check(info, tty->name, "rs_put_char"))
  878. return;
  879. if (!tty)
  880. return;
  881. bdp = info->tx_cur;
  882. while (bdp->status & BD_SC_READY);
  883. /* *((char *)__va(bdp->buf)) = ch; */
  884. *((char *)bdp->buf) = ch;
  885. bdp->length = 1;
  886. bdp->status |= BD_SC_READY;
  887. /* Get next BD.
  888. */
  889. if (bdp->status & BD_SC_WRAP)
  890. bdp = info->tx_bd_base;
  891. else
  892. bdp++;
  893. info->tx_cur = (QUICC_BD *)bdp;
  894. }
  895. static int rs_360_write(struct tty_struct * tty,
  896. const unsigned char *buf, int count)
  897. {
  898. int c, ret = 0;
  899. ser_info_t *info = (ser_info_t *)tty->driver_data;
  900. volatile QUICC_BD *bdp;
  901. #ifdef CONFIG_KGDB
  902. /* Try to let stub handle output. Returns true if it did. */
  903. if (kgdb_output_string(buf, count))
  904. return ret;
  905. #endif
  906. if (serial_paranoia_check(info, tty->name, "rs_write"))
  907. return 0;
  908. if (!tty)
  909. return 0;
  910. bdp = info->tx_cur;
  911. while (1) {
  912. c = min(count, TX_BUF_SIZE);
  913. if (c <= 0)
  914. break;
  915. if (bdp->status & BD_SC_READY) {
  916. info->flags |= TX_WAKEUP;
  917. break;
  918. }
  919. /* memcpy(__va(bdp->buf), buf, c); */
  920. memcpy((void *)bdp->buf, buf, c);
  921. bdp->length = c;
  922. bdp->status |= BD_SC_READY;
  923. buf += c;
  924. count -= c;
  925. ret += c;
  926. /* Get next BD.
  927. */
  928. if (bdp->status & BD_SC_WRAP)
  929. bdp = info->tx_bd_base;
  930. else
  931. bdp++;
  932. info->tx_cur = (QUICC_BD *)bdp;
  933. }
  934. return ret;
  935. }
  936. static int rs_360_write_room(struct tty_struct *tty)
  937. {
  938. ser_info_t *info = (ser_info_t *)tty->driver_data;
  939. int ret;
  940. if (serial_paranoia_check(info, tty->name, "rs_write_room"))
  941. return 0;
  942. if ((info->tx_cur->status & BD_SC_READY) == 0) {
  943. info->flags &= ~TX_WAKEUP;
  944. ret = TX_BUF_SIZE;
  945. }
  946. else {
  947. info->flags |= TX_WAKEUP;
  948. ret = 0;
  949. }
  950. return ret;
  951. }
  952. /* I could track this with transmit counters....maybe later.
  953. */
  954. static int rs_360_chars_in_buffer(struct tty_struct *tty)
  955. {
  956. ser_info_t *info = (ser_info_t *)tty->driver_data;
  957. if (serial_paranoia_check(info, tty->name, "rs_chars_in_buffer"))
  958. return 0;
  959. return 0;
  960. }
  961. static void rs_360_flush_buffer(struct tty_struct *tty)
  962. {
  963. ser_info_t *info = (ser_info_t *)tty->driver_data;
  964. if (serial_paranoia_check(info, tty->name, "rs_flush_buffer"))
  965. return;
  966. /* There is nothing to "flush", whatever we gave the CPM
  967. * is on its way out.
  968. */
  969. tty_wakeup(tty);
  970. info->flags &= ~TX_WAKEUP;
  971. }
  972. /*
  973. * This function is used to send a high-priority XON/XOFF character to
  974. * the device
  975. */
  976. static void rs_360_send_xchar(struct tty_struct *tty, char ch)
  977. {
  978. volatile QUICC_BD *bdp;
  979. ser_info_t *info = (ser_info_t *)tty->driver_data;
  980. if (serial_paranoia_check(info, tty->name, "rs_send_char"))
  981. return;
  982. bdp = info->tx_cur;
  983. while (bdp->status & BD_SC_READY);
  984. /* *((char *)__va(bdp->buf)) = ch; */
  985. *((char *)bdp->buf) = ch;
  986. bdp->length = 1;
  987. bdp->status |= BD_SC_READY;
  988. /* Get next BD.
  989. */
  990. if (bdp->status & BD_SC_WRAP)
  991. bdp = info->tx_bd_base;
  992. else
  993. bdp++;
  994. info->tx_cur = (QUICC_BD *)bdp;
  995. }
  996. /*
  997. * ------------------------------------------------------------
  998. * rs_throttle()
  999. *
  1000. * This routine is called by the upper-layer tty layer to signal that
  1001. * incoming characters should be throttled.
  1002. * ------------------------------------------------------------
  1003. */
  1004. static void rs_360_throttle(struct tty_struct * tty)
  1005. {
  1006. ser_info_t *info = (ser_info_t *)tty->driver_data;
  1007. #ifdef SERIAL_DEBUG_THROTTLE
  1008. char buf[64];
  1009. printk("throttle %s: %d....\n", _tty_name(tty, buf),
  1010. tty->ldisc.chars_in_buffer(tty));
  1011. #endif
  1012. if (serial_paranoia_check(info, tty->name, "rs_throttle"))
  1013. return;
  1014. if (I_IXOFF(tty))
  1015. rs_360_send_xchar(tty, STOP_CHAR(tty));
  1016. #ifdef modem_control
  1017. if (tty->termios->c_cflag & CRTSCTS)
  1018. info->MCR &= ~UART_MCR_RTS;
  1019. local_irq_disable();
  1020. serial_out(info, UART_MCR, info->MCR);
  1021. local_irq_enable();
  1022. #endif
  1023. }
  1024. static void rs_360_unthrottle(struct tty_struct * tty)
  1025. {
  1026. ser_info_t *info = (ser_info_t *)tty->driver_data;
  1027. #ifdef SERIAL_DEBUG_THROTTLE
  1028. char buf[64];
  1029. printk("unthrottle %s: %d....\n", _tty_name(tty, buf),
  1030. tty->ldisc.chars_in_buffer(tty));
  1031. #endif
  1032. if (serial_paranoia_check(info, tty->name, "rs_unthrottle"))
  1033. return;
  1034. if (I_IXOFF(tty)) {
  1035. if (info->x_char)
  1036. info->x_char = 0;
  1037. else
  1038. rs_360_send_xchar(tty, START_CHAR(tty));
  1039. }
  1040. #ifdef modem_control
  1041. if (tty->termios->c_cflag & CRTSCTS)
  1042. info->MCR |= UART_MCR_RTS;
  1043. local_irq_disable();
  1044. serial_out(info, UART_MCR, info->MCR);
  1045. local_irq_enable();
  1046. #endif
  1047. }
  1048. /*
  1049. * ------------------------------------------------------------
  1050. * rs_ioctl() and friends
  1051. * ------------------------------------------------------------
  1052. */
  1053. #ifdef maybe
  1054. /*
  1055. * get_lsr_info - get line status register info
  1056. *
  1057. * Purpose: Let user call ioctl() to get info when the UART physically
  1058. * is emptied. On bus types like RS485, the transmitter must
  1059. * release the bus after transmitting. This must be done when
  1060. * the transmit shift register is empty, not be done when the
  1061. * transmit holding register is empty. This functionality
  1062. * allows an RS485 driver to be written in user space.
  1063. */
  1064. static int get_lsr_info(struct async_struct * info, unsigned int *value)
  1065. {
  1066. unsigned char status;
  1067. unsigned int result;
  1068. local_irq_disable();
  1069. status = serial_in(info, UART_LSR);
  1070. local_irq_enable();
  1071. result = ((status & UART_LSR_TEMT) ? TIOCSER_TEMT : 0);
  1072. return put_user(result,value);
  1073. }
  1074. #endif
  1075. static int rs_360_tiocmget(struct tty_struct *tty, struct file *file)
  1076. {
  1077. ser_info_t *info = (ser_info_t *)tty->driver_data;
  1078. unsigned int result = 0;
  1079. #ifdef modem_control
  1080. unsigned char control, status;
  1081. if (serial_paranoia_check(info, tty->name, __FUNCTION__))
  1082. return -ENODEV;
  1083. if (tty->flags & (1 << TTY_IO_ERROR))
  1084. return -EIO;
  1085. control = info->MCR;
  1086. local_irq_disable();
  1087. status = serial_in(info, UART_MSR);
  1088. local_irq_enable();
  1089. result = ((control & UART_MCR_RTS) ? TIOCM_RTS : 0)
  1090. | ((control & UART_MCR_DTR) ? TIOCM_DTR : 0)
  1091. #ifdef TIOCM_OUT1
  1092. | ((control & UART_MCR_OUT1) ? TIOCM_OUT1 : 0)
  1093. | ((control & UART_MCR_OUT2) ? TIOCM_OUT2 : 0)
  1094. #endif
  1095. | ((status & UART_MSR_DCD) ? TIOCM_CAR : 0)
  1096. | ((status & UART_MSR_RI) ? TIOCM_RNG : 0)
  1097. | ((status & UART_MSR_DSR) ? TIOCM_DSR : 0)
  1098. | ((status & UART_MSR_CTS) ? TIOCM_CTS : 0);
  1099. #endif
  1100. return result;
  1101. }
  1102. static int rs_360_tiocmset(struct tty_struct *tty, struct file *file,
  1103. unsigned int set, unsigned int clear)
  1104. {
  1105. #ifdef modem_control
  1106. ser_info_t *info = (ser_info_t *)tty->driver_data;
  1107. unsigned int arg;
  1108. if (serial_paranoia_check(info, tty->name, __FUNCTION__))
  1109. return -ENODEV;
  1110. if (tty->flags & (1 << TTY_IO_ERROR))
  1111. return -EIO;
  1112. if (set & TIOCM_RTS)
  1113. info->mcr |= UART_MCR_RTS;
  1114. if (set & TIOCM_DTR)
  1115. info->mcr |= UART_MCR_DTR;
  1116. if (clear & TIOCM_RTS)
  1117. info->MCR &= ~UART_MCR_RTS;
  1118. if (clear & TIOCM_DTR)
  1119. info->MCR &= ~UART_MCR_DTR;
  1120. #ifdef TIOCM_OUT1
  1121. if (set & TIOCM_OUT1)
  1122. info->MCR |= UART_MCR_OUT1;
  1123. if (set & TIOCM_OUT2)
  1124. info->MCR |= UART_MCR_OUT2;
  1125. if (clear & TIOCM_OUT1)
  1126. info->MCR &= ~UART_MCR_OUT1;
  1127. if (clear & TIOCM_OUT2)
  1128. info->MCR &= ~UART_MCR_OUT2;
  1129. #endif
  1130. local_irq_disable();
  1131. serial_out(info, UART_MCR, info->MCR);
  1132. local_irq_enable();
  1133. #endif
  1134. return 0;
  1135. }
  1136. /* Sending a break is a two step process on the SMC/SCC. It is accomplished
  1137. * by sending a STOP TRANSMIT command followed by a RESTART TRANSMIT
  1138. * command. We take advantage of the begin/end functions to make this
  1139. * happen.
  1140. */
  1141. static ushort smc_chan_map[] = {
  1142. CPM_CR_CH_SMC1,
  1143. CPM_CR_CH_SMC2
  1144. };
  1145. static ushort scc_chan_map[] = {
  1146. CPM_CR_CH_SCC1,
  1147. CPM_CR_CH_SCC2,
  1148. CPM_CR_CH_SCC3,
  1149. CPM_CR_CH_SCC4
  1150. };
  1151. static void begin_break(ser_info_t *info)
  1152. {
  1153. volatile QUICC *cp;
  1154. ushort chan;
  1155. int idx;
  1156. cp = pquicc;
  1157. idx = PORT_NUM(info->state->smc_scc_num);
  1158. if (info->state->smc_scc_num & NUM_IS_SCC)
  1159. chan = scc_chan_map[idx];
  1160. else
  1161. chan = smc_chan_map[idx];
  1162. cp->cp_cr = mk_cr_cmd(chan, CPM_CR_STOP_TX) | CPM_CR_FLG;
  1163. while (cp->cp_cr & CPM_CR_FLG);
  1164. }
  1165. static void end_break(ser_info_t *info)
  1166. {
  1167. volatile QUICC *cp;
  1168. ushort chan;
  1169. int idx;
  1170. cp = pquicc;
  1171. idx = PORT_NUM(info->state->smc_scc_num);
  1172. if (info->state->smc_scc_num & NUM_IS_SCC)
  1173. chan = scc_chan_map[idx];
  1174. else
  1175. chan = smc_chan_map[idx];
  1176. cp->cp_cr = mk_cr_cmd(chan, CPM_CR_RESTART_TX) | CPM_CR_FLG;
  1177. while (cp->cp_cr & CPM_CR_FLG);
  1178. }
  1179. /*
  1180. * This routine sends a break character out the serial port.
  1181. */
  1182. static void send_break(ser_info_t *info, int duration)
  1183. {
  1184. set_current_state(TASK_INTERRUPTIBLE);
  1185. #ifdef SERIAL_DEBUG_SEND_BREAK
  1186. printk("rs_send_break(%d) jiff=%lu...", duration, jiffies);
  1187. #endif
  1188. begin_break(info);
  1189. schedule_timeout(duration);
  1190. end_break(info);
  1191. #ifdef SERIAL_DEBUG_SEND_BREAK
  1192. printk("done jiffies=%lu\n", jiffies);
  1193. #endif
  1194. }
  1195. static int rs_360_ioctl(struct tty_struct *tty, struct file * file,
  1196. unsigned int cmd, unsigned long arg)
  1197. {
  1198. int error;
  1199. ser_info_t *info = (ser_info_t *)tty->driver_data;
  1200. int retval;
  1201. struct async_icount cnow;
  1202. /* struct async_icount_24 cnow;*/ /* kernel counter temps */
  1203. struct serial_icounter_struct *p_cuser; /* user space */
  1204. if (serial_paranoia_check(info, tty->name, "rs_ioctl"))
  1205. return -ENODEV;
  1206. if ((cmd != TIOCMIWAIT) && (cmd != TIOCGICOUNT)) {
  1207. if (tty->flags & (1 << TTY_IO_ERROR))
  1208. return -EIO;
  1209. }
  1210. switch (cmd) {
  1211. case TCSBRK: /* SVID version: non-zero arg --> no break */
  1212. retval = tty_check_change(tty);
  1213. if (retval)
  1214. return retval;
  1215. tty_wait_until_sent(tty, 0);
  1216. if (signal_pending(current))
  1217. return -EINTR;
  1218. if (!arg) {
  1219. send_break(info, HZ/4); /* 1/4 second */
  1220. if (signal_pending(current))
  1221. return -EINTR;
  1222. }
  1223. return 0;
  1224. case TCSBRKP: /* support for POSIX tcsendbreak() */
  1225. retval = tty_check_change(tty);
  1226. if (retval)
  1227. return retval;
  1228. tty_wait_until_sent(tty, 0);
  1229. if (signal_pending(current))
  1230. return -EINTR;
  1231. send_break(info, arg ? arg*(HZ/10) : HZ/4);
  1232. if (signal_pending(current))
  1233. return -EINTR;
  1234. return 0;
  1235. case TIOCSBRK:
  1236. retval = tty_check_change(tty);
  1237. if (retval)
  1238. return retval;
  1239. tty_wait_until_sent(tty, 0);
  1240. begin_break(info);
  1241. return 0;
  1242. case TIOCCBRK:
  1243. retval = tty_check_change(tty);
  1244. if (retval)
  1245. return retval;
  1246. end_break(info);
  1247. return 0;
  1248. case TIOCGSOFTCAR:
  1249. /* return put_user(C_CLOCAL(tty) ? 1 : 0, (int *) arg); */
  1250. put_user(C_CLOCAL(tty) ? 1 : 0, (int *) arg);
  1251. return 0;
  1252. case TIOCSSOFTCAR:
  1253. error = get_user(arg, (unsigned int *) arg);
  1254. if (error)
  1255. return error;
  1256. tty->termios->c_cflag =
  1257. ((tty->termios->c_cflag & ~CLOCAL) |
  1258. (arg ? CLOCAL : 0));
  1259. return 0;
  1260. #ifdef maybe
  1261. case TIOCSERGETLSR: /* Get line status register */
  1262. return get_lsr_info(info, (unsigned int *) arg);
  1263. #endif
  1264. /*
  1265. * Wait for any of the 4 modem inputs (DCD,RI,DSR,CTS) to change
  1266. * - mask passed in arg for lines of interest
  1267. * (use |'ed TIOCM_RNG/DSR/CD/CTS for masking)
  1268. * Caller should use TIOCGICOUNT to see which one it was
  1269. */
  1270. case TIOCMIWAIT:
  1271. #ifdef modem_control
  1272. local_irq_disable();
  1273. /* note the counters on entry */
  1274. cprev = info->state->icount;
  1275. local_irq_enable();
  1276. while (1) {
  1277. interruptible_sleep_on(&info->delta_msr_wait);
  1278. /* see if a signal did it */
  1279. if (signal_pending(current))
  1280. return -ERESTARTSYS;
  1281. local_irq_disable();
  1282. cnow = info->state->icount; /* atomic copy */
  1283. local_irq_enable();
  1284. if (cnow.rng == cprev.rng && cnow.dsr == cprev.dsr &&
  1285. cnow.dcd == cprev.dcd && cnow.cts == cprev.cts)
  1286. return -EIO; /* no change => error */
  1287. if ( ((arg & TIOCM_RNG) && (cnow.rng != cprev.rng)) ||
  1288. ((arg & TIOCM_DSR) && (cnow.dsr != cprev.dsr)) ||
  1289. ((arg & TIOCM_CD) && (cnow.dcd != cprev.dcd)) ||
  1290. ((arg & TIOCM_CTS) && (cnow.cts != cprev.cts)) ) {
  1291. return 0;
  1292. }
  1293. cprev = cnow;
  1294. }
  1295. /* NOTREACHED */
  1296. #else
  1297. return 0;
  1298. #endif
  1299. /*
  1300. * Get counter of input serial line interrupts (DCD,RI,DSR,CTS)
  1301. * Return: write counters to the user passed counter struct
  1302. * NB: both 1->0 and 0->1 transitions are counted except for
  1303. * RI where only 0->1 is counted.
  1304. */
  1305. case TIOCGICOUNT:
  1306. local_irq_disable();
  1307. cnow = info->state->icount;
  1308. local_irq_enable();
  1309. p_cuser = (struct serial_icounter_struct *) arg;
  1310. /* error = put_user(cnow.cts, &p_cuser->cts); */
  1311. /* if (error) return error; */
  1312. /* error = put_user(cnow.dsr, &p_cuser->dsr); */
  1313. /* if (error) return error; */
  1314. /* error = put_user(cnow.rng, &p_cuser->rng); */
  1315. /* if (error) return error; */
  1316. /* error = put_user(cnow.dcd, &p_cuser->dcd); */
  1317. /* if (error) return error; */
  1318. put_user(cnow.cts, &p_cuser->cts);
  1319. put_user(cnow.dsr, &p_cuser->dsr);
  1320. put_user(cnow.rng, &p_cuser->rng);
  1321. put_user(cnow.dcd, &p_cuser->dcd);
  1322. return 0;
  1323. default:
  1324. return -ENOIOCTLCMD;
  1325. }
  1326. return 0;
  1327. }
  1328. /* FIX UP modem control here someday......
  1329. */
  1330. static void rs_360_set_termios(struct tty_struct *tty, struct termios *old_termios)
  1331. {
  1332. ser_info_t *info = (ser_info_t *)tty->driver_data;
  1333. if ( (tty->termios->c_cflag == old_termios->c_cflag)
  1334. && ( RELEVANT_IFLAG(tty->termios->c_iflag)
  1335. == RELEVANT_IFLAG(old_termios->c_iflag)))
  1336. return;
  1337. change_speed(info);
  1338. #ifdef modem_control
  1339. /* Handle transition to B0 status */
  1340. if ((old_termios->c_cflag & CBAUD) &&
  1341. !(tty->termios->c_cflag & CBAUD)) {
  1342. info->MCR &= ~(UART_MCR_DTR|UART_MCR_RTS);
  1343. local_irq_disable();
  1344. serial_out(info, UART_MCR, info->MCR);
  1345. local_irq_enable();
  1346. }
  1347. /* Handle transition away from B0 status */
  1348. if (!(old_termios->c_cflag & CBAUD) &&
  1349. (tty->termios->c_cflag & CBAUD)) {
  1350. info->MCR |= UART_MCR_DTR;
  1351. if (!tty->hw_stopped ||
  1352. !(tty->termios->c_cflag & CRTSCTS)) {
  1353. info->MCR |= UART_MCR_RTS;
  1354. }
  1355. local_irq_disable();
  1356. serial_out(info, UART_MCR, info->MCR);
  1357. local_irq_enable();
  1358. }
  1359. /* Handle turning off CRTSCTS */
  1360. if ((old_termios->c_cflag & CRTSCTS) &&
  1361. !(tty->termios->c_cflag & CRTSCTS)) {
  1362. tty->hw_stopped = 0;
  1363. rs_360_start(tty);
  1364. }
  1365. #endif
  1366. #if 0
  1367. /*
  1368. * No need to wake up processes in open wait, since they
  1369. * sample the CLOCAL flag once, and don't recheck it.
  1370. * XXX It's not clear whether the current behavior is correct
  1371. * or not. Hence, this may change.....
  1372. */
  1373. if (!(old_termios->c_cflag & CLOCAL) &&
  1374. (tty->termios->c_cflag & CLOCAL))
  1375. wake_up_interruptible(&info->open_wait);
  1376. #endif
  1377. }
  1378. /*
  1379. * ------------------------------------------------------------
  1380. * rs_close()
  1381. *
  1382. * This routine is called when the serial port gets closed. First, we
  1383. * wait for the last remaining data to be sent. Then, we unlink its
  1384. * async structure from the interrupt chain if necessary, and we free
  1385. * that IRQ if nothing is left in the chain.
  1386. * ------------------------------------------------------------
  1387. */
  1388. static void rs_360_close(struct tty_struct *tty, struct file * filp)
  1389. {
  1390. ser_info_t *info = (ser_info_t *)tty->driver_data;
  1391. /* struct async_state *state; */
  1392. struct serial_state *state;
  1393. unsigned long flags;
  1394. int idx;
  1395. volatile struct smc_regs *smcp;
  1396. volatile struct scc_regs *sccp;
  1397. if (!info || serial_paranoia_check(info, tty->name, "rs_close"))
  1398. return;
  1399. state = info->state;
  1400. local_irq_save(flags);
  1401. if (tty_hung_up_p(filp)) {
  1402. DBG_CNT("before DEC-hung");
  1403. local_irq_restore(flags);
  1404. return;
  1405. }
  1406. #ifdef SERIAL_DEBUG_OPEN
  1407. printk("rs_close ttys%d, count = %d\n", info->line, state->count);
  1408. #endif
  1409. if ((tty->count == 1) && (state->count != 1)) {
  1410. /*
  1411. * Uh, oh. tty->count is 1, which means that the tty
  1412. * structure will be freed. state->count should always
  1413. * be one in these conditions. If it's greater than
  1414. * one, we've got real problems, since it means the
  1415. * serial port won't be shutdown.
  1416. */
  1417. printk("rs_close: bad serial port count; tty->count is 1, "
  1418. "state->count is %d\n", state->count);
  1419. state->count = 1;
  1420. }
  1421. if (--state->count < 0) {
  1422. printk("rs_close: bad serial port count for ttys%d: %d\n",
  1423. info->line, state->count);
  1424. state->count = 0;
  1425. }
  1426. if (state->count) {
  1427. DBG_CNT("before DEC-2");
  1428. local_irq_restore(flags);
  1429. return;
  1430. }
  1431. info->flags |= ASYNC_CLOSING;
  1432. /*
  1433. * Now we wait for the transmit buffer to clear; and we notify
  1434. * the line discipline to only process XON/XOFF characters.
  1435. */
  1436. tty->closing = 1;
  1437. if (info->closing_wait != ASYNC_CLOSING_WAIT_NONE)
  1438. tty_wait_until_sent(tty, info->closing_wait);
  1439. /*
  1440. * At this point we stop accepting input. To do this, we
  1441. * disable the receive line status interrupts, and tell the
  1442. * interrupt driver to stop checking the data ready bit in the
  1443. * line status register.
  1444. */
  1445. info->read_status_mask &= ~BD_SC_EMPTY;
  1446. if (info->flags & ASYNC_INITIALIZED) {
  1447. idx = PORT_NUM(info->state->smc_scc_num);
  1448. if (info->state->smc_scc_num & NUM_IS_SCC) {
  1449. sccp = &pquicc->scc_regs[idx];
  1450. sccp->scc_sccm &= ~UART_SCCM_RX;
  1451. sccp->scc_gsmr.w.low &= ~SCC_GSMRL_ENR;
  1452. } else {
  1453. smcp = &pquicc->smc_regs[idx];
  1454. smcp->smc_smcm &= ~SMCM_RX;
  1455. smcp->smc_smcmr &= ~SMCMR_REN;
  1456. }
  1457. /*
  1458. * Before we drop DTR, make sure the UART transmitter
  1459. * has completely drained; this is especially
  1460. * important if there is a transmit FIFO!
  1461. */
  1462. rs_360_wait_until_sent(tty, info->timeout);
  1463. }
  1464. shutdown(info);
  1465. if (tty->driver->flush_buffer)
  1466. tty->driver->flush_buffer(tty);
  1467. tty_ldisc_flush(tty);
  1468. tty->closing = 0;
  1469. info->event = 0;
  1470. info->tty = 0;
  1471. if (info->blocked_open) {
  1472. if (info->close_delay) {
  1473. msleep_interruptible(jiffies_to_msecs(info->close_delay));
  1474. }
  1475. wake_up_interruptible(&info->open_wait);
  1476. }
  1477. info->flags &= ~(ASYNC_NORMAL_ACTIVE|ASYNC_CLOSING);
  1478. wake_up_interruptible(&info->close_wait);
  1479. local_irq_restore(flags);
  1480. }
  1481. /*
  1482. * rs_wait_until_sent() --- wait until the transmitter is empty
  1483. */
  1484. static void rs_360_wait_until_sent(struct tty_struct *tty, int timeout)
  1485. {
  1486. ser_info_t *info = (ser_info_t *)tty->driver_data;
  1487. unsigned long orig_jiffies, char_time;
  1488. /*int lsr;*/
  1489. volatile QUICC_BD *bdp;
  1490. if (serial_paranoia_check(info, tty->name, "rs_wait_until_sent"))
  1491. return;
  1492. #ifdef maybe
  1493. if (info->state->type == PORT_UNKNOWN)
  1494. return;
  1495. #endif
  1496. orig_jiffies = jiffies;
  1497. /*
  1498. * Set the check interval to be 1/5 of the estimated time to
  1499. * send a single character, and make it at least 1. The check
  1500. * interval should also be less than the timeout.
  1501. *
  1502. * Note: we have to use pretty tight timings here to satisfy
  1503. * the NIST-PCTS.
  1504. */
  1505. char_time = 1;
  1506. if (timeout)
  1507. char_time = min(char_time, (unsigned long)timeout);
  1508. #ifdef SERIAL_DEBUG_RS_WAIT_UNTIL_SENT
  1509. printk("In rs_wait_until_sent(%d) check=%lu...", timeout, char_time);
  1510. printk("jiff=%lu...", jiffies);
  1511. #endif
  1512. /* We go through the loop at least once because we can't tell
  1513. * exactly when the last character exits the shifter. There can
  1514. * be at least two characters waiting to be sent after the buffers
  1515. * are empty.
  1516. */
  1517. do {
  1518. #ifdef SERIAL_DEBUG_RS_WAIT_UNTIL_SENT
  1519. printk("lsr = %d (jiff=%lu)...", lsr, jiffies);
  1520. #endif
  1521. /* current->counter = 0; make us low-priority */
  1522. msleep_interruptible(jiffies_to_msecs(char_time));
  1523. if (signal_pending(current))
  1524. break;
  1525. if (timeout && ((orig_jiffies + timeout) < jiffies))
  1526. break;
  1527. /* The 'tx_cur' is really the next buffer to send. We
  1528. * have to back up to the previous BD and wait for it
  1529. * to go. This isn't perfect, because all this indicates
  1530. * is the buffer is available. There are still characters
  1531. * in the CPM FIFO.
  1532. */
  1533. bdp = info->tx_cur;
  1534. if (bdp == info->tx_bd_base)
  1535. bdp += (TX_NUM_FIFO-1);
  1536. else
  1537. bdp--;
  1538. } while (bdp->status & BD_SC_READY);
  1539. current->state = TASK_RUNNING;
  1540. #ifdef SERIAL_DEBUG_RS_WAIT_UNTIL_SENT
  1541. printk("lsr = %d (jiff=%lu)...done\n", lsr, jiffies);
  1542. #endif
  1543. }
  1544. /*
  1545. * rs_hangup() --- called by tty_hangup() when a hangup is signaled.
  1546. */
  1547. static void rs_360_hangup(struct tty_struct *tty)
  1548. {
  1549. ser_info_t *info = (ser_info_t *)tty->driver_data;
  1550. struct serial_state *state = info->state;
  1551. if (serial_paranoia_check(info, tty->name, "rs_hangup"))
  1552. return;
  1553. state = info->state;
  1554. rs_360_flush_buffer(tty);
  1555. shutdown(info);
  1556. info->event = 0;
  1557. state->count = 0;
  1558. info->flags &= ~ASYNC_NORMAL_ACTIVE;
  1559. info->tty = 0;
  1560. wake_up_interruptible(&info->open_wait);
  1561. }
  1562. /*
  1563. * ------------------------------------------------------------
  1564. * rs_open() and friends
  1565. * ------------------------------------------------------------
  1566. */
  1567. static int block_til_ready(struct tty_struct *tty, struct file * filp,
  1568. ser_info_t *info)
  1569. {
  1570. #ifdef DO_THIS_LATER
  1571. DECLARE_WAITQUEUE(wait, current);
  1572. #endif
  1573. struct serial_state *state = info->state;
  1574. int retval;
  1575. int do_clocal = 0;
  1576. /*
  1577. * If the device is in the middle of being closed, then block
  1578. * until it's done, and then try again.
  1579. */
  1580. if (tty_hung_up_p(filp) ||
  1581. (info->flags & ASYNC_CLOSING)) {
  1582. if (info->flags & ASYNC_CLOSING)
  1583. interruptible_sleep_on(&info->close_wait);
  1584. #ifdef SERIAL_DO_RESTART
  1585. if (info->flags & ASYNC_HUP_NOTIFY)
  1586. return -EAGAIN;
  1587. else
  1588. return -ERESTARTSYS;
  1589. #else
  1590. return -EAGAIN;
  1591. #endif
  1592. }
  1593. /*
  1594. * If non-blocking mode is set, or the port is not enabled,
  1595. * then make the check up front and then exit.
  1596. * If this is an SMC port, we don't have modem control to wait
  1597. * for, so just get out here.
  1598. */
  1599. if ((filp->f_flags & O_NONBLOCK) ||
  1600. (tty->flags & (1 << TTY_IO_ERROR)) ||
  1601. !(info->state->smc_scc_num & NUM_IS_SCC)) {
  1602. info->flags |= ASYNC_NORMAL_ACTIVE;
  1603. return 0;
  1604. }
  1605. if (tty->termios->c_cflag & CLOCAL)
  1606. do_clocal = 1;
  1607. /*
  1608. * Block waiting for the carrier detect and the line to become
  1609. * free (i.e., not in use by the callout). While we are in
  1610. * this loop, state->count is dropped by one, so that
  1611. * rs_close() knows when to free things. We restore it upon
  1612. * exit, either normal or abnormal.
  1613. */
  1614. retval = 0;
  1615. #ifdef DO_THIS_LATER
  1616. add_wait_queue(&info->open_wait, &wait);
  1617. #ifdef SERIAL_DEBUG_OPEN
  1618. printk("block_til_ready before block: ttys%d, count = %d\n",
  1619. state->line, state->count);
  1620. #endif
  1621. local_irq_disable();
  1622. if (!tty_hung_up_p(filp))
  1623. state->count--;
  1624. local_irq_enable();
  1625. info->blocked_open++;
  1626. while (1) {
  1627. local_irq_disable();
  1628. if (tty->termios->c_cflag & CBAUD)
  1629. serial_out(info, UART_MCR,
  1630. serial_inp(info, UART_MCR) |
  1631. (UART_MCR_DTR | UART_MCR_RTS));
  1632. local_irq_enable();
  1633. set_current_state(TASK_INTERRUPTIBLE);
  1634. if (tty_hung_up_p(filp) ||
  1635. !(info->flags & ASYNC_INITIALIZED)) {
  1636. #ifdef SERIAL_DO_RESTART
  1637. if (info->flags & ASYNC_HUP_NOTIFY)
  1638. retval = -EAGAIN;
  1639. else
  1640. retval = -ERESTARTSYS;
  1641. #else
  1642. retval = -EAGAIN;
  1643. #endif
  1644. break;
  1645. }
  1646. if (!(info->flags & ASYNC_CLOSING) &&
  1647. (do_clocal || (serial_in(info, UART_MSR) &
  1648. UART_MSR_DCD)))
  1649. break;
  1650. if (signal_pending(current)) {
  1651. retval = -ERESTARTSYS;
  1652. break;
  1653. }
  1654. #ifdef SERIAL_DEBUG_OPEN
  1655. printk("block_til_ready blocking: ttys%d, count = %d\n",
  1656. info->line, state->count);
  1657. #endif
  1658. schedule();
  1659. }
  1660. current->state = TASK_RUNNING;
  1661. remove_wait_queue(&info->open_wait, &wait);
  1662. if (!tty_hung_up_p(filp))
  1663. state->count++;
  1664. info->blocked_open--;
  1665. #ifdef SERIAL_DEBUG_OPEN
  1666. printk("block_til_ready after blocking: ttys%d, count = %d\n",
  1667. info->line, state->count);
  1668. #endif
  1669. #endif /* DO_THIS_LATER */
  1670. if (retval)
  1671. return retval;
  1672. info->flags |= ASYNC_NORMAL_ACTIVE;
  1673. return 0;
  1674. }
  1675. static int get_async_struct(int line, ser_info_t **ret_info)
  1676. {
  1677. struct serial_state *sstate;
  1678. sstate = rs_table + line;
  1679. if (sstate->info) {
  1680. sstate->count++;
  1681. *ret_info = (ser_info_t *)sstate->info;
  1682. return 0;
  1683. }
  1684. else {
  1685. return -ENOMEM;
  1686. }
  1687. }
  1688. /*
  1689. * This routine is called whenever a serial port is opened. It
  1690. * enables interrupts for a serial port, linking in its async structure into
  1691. * the IRQ chain. It also performs the serial-specific
  1692. * initialization for the tty structure.
  1693. */
  1694. static int rs_360_open(struct tty_struct *tty, struct file * filp)
  1695. {
  1696. ser_info_t *info;
  1697. int retval, line;
  1698. line = tty->index;
  1699. if ((line < 0) || (line >= NR_PORTS))
  1700. return -ENODEV;
  1701. retval = get_async_struct(line, &info);
  1702. if (retval)
  1703. return retval;
  1704. if (serial_paranoia_check(info, tty->name, "rs_open"))
  1705. return -ENODEV;
  1706. #ifdef SERIAL_DEBUG_OPEN
  1707. printk("rs_open %s, count = %d\n", tty->name, info->state->count);
  1708. #endif
  1709. tty->driver_data = info;
  1710. info->tty = tty;
  1711. /*
  1712. * Start up serial port
  1713. */
  1714. retval = startup(info);
  1715. if (retval)
  1716. return retval;
  1717. retval = block_til_ready(tty, filp, info);
  1718. if (retval) {
  1719. #ifdef SERIAL_DEBUG_OPEN
  1720. printk("rs_open returning after block_til_ready with %d\n",
  1721. retval);
  1722. #endif
  1723. return retval;
  1724. }
  1725. #ifdef SERIAL_DEBUG_OPEN
  1726. printk("rs_open %s successful...", tty->name);
  1727. #endif
  1728. return 0;
  1729. }
  1730. /*
  1731. * /proc fs routines....
  1732. */
  1733. static inline int line_info(char *buf, struct serial_state *state)
  1734. {
  1735. #ifdef notdef
  1736. struct async_struct *info = state->info, scr_info;
  1737. char stat_buf[30], control, status;
  1738. #endif
  1739. int ret;
  1740. ret = sprintf(buf, "%d: uart:%s port:%X irq:%d",
  1741. state->line,
  1742. (state->smc_scc_num & NUM_IS_SCC) ? "SCC" : "SMC",
  1743. (unsigned int)(state->port), state->irq);
  1744. if (!state->port || (state->type == PORT_UNKNOWN)) {
  1745. ret += sprintf(buf+ret, "\n");
  1746. return ret;
  1747. }
  1748. #ifdef notdef
  1749. /*
  1750. * Figure out the current RS-232 lines
  1751. */
  1752. if (!info) {
  1753. info = &scr_info; /* This is just for serial_{in,out} */
  1754. info->magic = SERIAL_MAGIC;
  1755. info->port = state->port;
  1756. info->flags = state->flags;
  1757. info->quot = 0;
  1758. info->tty = 0;
  1759. }
  1760. local_irq_disable();
  1761. status = serial_in(info, UART_MSR);
  1762. control = info ? info->MCR : serial_in(info, UART_MCR);
  1763. local_irq_enable();
  1764. stat_buf[0] = 0;
  1765. stat_buf[1] = 0;
  1766. if (control & UART_MCR_RTS)
  1767. strcat(stat_buf, "|RTS");
  1768. if (status & UART_MSR_CTS)
  1769. strcat(stat_buf, "|CTS");
  1770. if (control & UART_MCR_DTR)
  1771. strcat(stat_buf, "|DTR");
  1772. if (status & UART_MSR_DSR)
  1773. strcat(stat_buf, "|DSR");
  1774. if (status & UART_MSR_DCD)
  1775. strcat(stat_buf, "|CD");
  1776. if (status & UART_MSR_RI)
  1777. strcat(stat_buf, "|RI");
  1778. if (info->quot) {
  1779. ret += sprintf(buf+ret, " baud:%d",
  1780. state->baud_base / info->quot);
  1781. }
  1782. ret += sprintf(buf+ret, " tx:%d rx:%d",
  1783. state->icount.tx, state->icount.rx);
  1784. if (state->icount.frame)
  1785. ret += sprintf(buf+ret, " fe:%d", state->icount.frame);
  1786. if (state->icount.parity)
  1787. ret += sprintf(buf+ret, " pe:%d", state->icount.parity);
  1788. if (state->icount.brk)
  1789. ret += sprintf(buf+ret, " brk:%d", state->icount.brk);
  1790. if (state->icount.overrun)
  1791. ret += sprintf(buf+ret, " oe:%d", state->icount.overrun);
  1792. /*
  1793. * Last thing is the RS-232 status lines
  1794. */
  1795. ret += sprintf(buf+ret, " %s\n", stat_buf+1);
  1796. #endif
  1797. return ret;
  1798. }
  1799. int rs_360_read_proc(char *page, char **start, off_t off, int count,
  1800. int *eof, void *data)
  1801. {
  1802. int i, len = 0;
  1803. off_t begin = 0;
  1804. len += sprintf(page, "serinfo:1.0 driver:%s\n", serial_version);
  1805. for (i = 0; i < NR_PORTS && len < 4000; i++) {
  1806. len += line_info(page + len, &rs_table[i]);
  1807. if (len+begin > off+count)
  1808. goto done;
  1809. if (len+begin < off) {
  1810. begin += len;
  1811. len = 0;
  1812. }
  1813. }
  1814. *eof = 1;
  1815. done:
  1816. if (off >= len+begin)
  1817. return 0;
  1818. *start = page + (begin-off);
  1819. return ((count < begin+len-off) ? count : begin+len-off);
  1820. }
  1821. /*
  1822. * ---------------------------------------------------------------------
  1823. * rs_init() and friends
  1824. *
  1825. * rs_init() is called at boot-time to initialize the serial driver.
  1826. * ---------------------------------------------------------------------
  1827. */
  1828. /*
  1829. * This routine prints out the appropriate serial driver version
  1830. * number, and identifies which options were configured into this
  1831. * driver.
  1832. */
  1833. static _INLINE_ void show_serial_version(void)
  1834. {
  1835. printk(KERN_INFO "%s version %s\n", serial_name, serial_version);
  1836. }
  1837. /*
  1838. * The serial console driver used during boot. Note that these names
  1839. * clash with those found in "serial.c", so we currently can't support
  1840. * the 16xxx uarts and these at the same time. I will fix this to become
  1841. * an indirect function call from tty_io.c (or something).
  1842. */
  1843. #ifdef CONFIG_SERIAL_CONSOLE
  1844. /*
  1845. * Print a string to the serial port trying not to disturb any possible
  1846. * real use of the port...
  1847. */
  1848. static void my_console_write(int idx, const char *s,
  1849. unsigned count)
  1850. {
  1851. struct serial_state *ser;
  1852. ser_info_t *info;
  1853. unsigned i;
  1854. QUICC_BD *bdp, *bdbase;
  1855. volatile struct smc_uart_pram *up;
  1856. volatile u_char *cp;
  1857. ser = rs_table + idx;
  1858. /* If the port has been initialized for general use, we have
  1859. * to use the buffer descriptors allocated there. Otherwise,
  1860. * we simply use the single buffer allocated.
  1861. */
  1862. if ((info = (ser_info_t *)ser->info) != NULL) {
  1863. bdp = info->tx_cur;
  1864. bdbase = info->tx_bd_base;
  1865. }
  1866. else {
  1867. /* Pointer to UART in parameter ram.
  1868. */
  1869. /* up = (smc_uart_t *)&cpmp->cp_dparam[ser->port]; */
  1870. up = &pquicc->pram[ser->port].scc.pothers.idma_smc.psmc.u;
  1871. /* Get the address of the host memory buffer.
  1872. */
  1873. bdp = bdbase = (QUICC_BD *)((uint)pquicc + (uint)up->tbase);
  1874. }
  1875. /*
  1876. * We need to gracefully shut down the transmitter, disable
  1877. * interrupts, then send our bytes out.
  1878. */
  1879. /*
  1880. * Now, do each character. This is not as bad as it looks
  1881. * since this is a holding FIFO and not a transmitting FIFO.
  1882. * We could add the complexity of filling the entire transmit
  1883. * buffer, but we would just wait longer between accesses......
  1884. */
  1885. for (i = 0; i < count; i++, s++) {
  1886. /* Wait for transmitter fifo to empty.
  1887. * Ready indicates output is ready, and xmt is doing
  1888. * that, not that it is ready for us to send.
  1889. */
  1890. while (bdp->status & BD_SC_READY);
  1891. /* Send the character out.
  1892. */
  1893. cp = bdp->buf;
  1894. *cp = *s;
  1895. bdp->length = 1;
  1896. bdp->status |= BD_SC_READY;
  1897. if (bdp->status & BD_SC_WRAP)
  1898. bdp = bdbase;
  1899. else
  1900. bdp++;
  1901. /* if a LF, also do CR... */
  1902. if (*s == 10) {
  1903. while (bdp->status & BD_SC_READY);
  1904. /* cp = __va(bdp->buf); */
  1905. cp = bdp->buf;
  1906. *cp = 13;
  1907. bdp->length = 1;
  1908. bdp->status |= BD_SC_READY;
  1909. if (bdp->status & BD_SC_WRAP) {
  1910. bdp = bdbase;
  1911. }
  1912. else {
  1913. bdp++;
  1914. }
  1915. }
  1916. }
  1917. /*
  1918. * Finally, Wait for transmitter & holding register to empty
  1919. * and restore the IER
  1920. */
  1921. while (bdp->status & BD_SC_READY);
  1922. if (info)
  1923. info->tx_cur = (QUICC_BD *)bdp;
  1924. }
  1925. static void serial_console_write(struct console *c, const char *s,
  1926. unsigned count)
  1927. {
  1928. #ifdef CONFIG_KGDB
  1929. /* Try to let stub handle output. Returns true if it did. */
  1930. if (kgdb_output_string(s, count))
  1931. return;
  1932. #endif
  1933. my_console_write(c->index, s, count);
  1934. }
  1935. /*void console_print_68360(const char *p)
  1936. {
  1937. const char *cp = p;
  1938. int i;
  1939. for (i=0;cp[i]!=0;i++);
  1940. serial_console_write (p, i);
  1941. //Comment this if you want to have a strict interrupt-driven output
  1942. //rs_fair_output();
  1943. return;
  1944. }*/
  1945. #ifdef CONFIG_XMON
  1946. int
  1947. xmon_360_write(const char *s, unsigned count)
  1948. {
  1949. my_console_write(0, s, count);
  1950. return(count);
  1951. }
  1952. #endif
  1953. #ifdef CONFIG_KGDB
  1954. void
  1955. putDebugChar(char ch)
  1956. {
  1957. my_console_write(0, &ch, 1);
  1958. }
  1959. #endif
  1960. /*
  1961. * Receive character from the serial port. This only works well
  1962. * before the port is initialized for real use.
  1963. */
  1964. static int my_console_wait_key(int idx, int xmon, char *obuf)
  1965. {
  1966. struct serial_state *ser;
  1967. u_char c, *cp;
  1968. ser_info_t *info;
  1969. QUICC_BD *bdp;
  1970. volatile struct smc_uart_pram *up;
  1971. int i;
  1972. ser = rs_table + idx;
  1973. /* Get the address of the host memory buffer.
  1974. * If the port has been initialized for general use, we must
  1975. * use information from the port structure.
  1976. */
  1977. if ((info = (ser_info_t *)ser->info))
  1978. bdp = info->rx_cur;
  1979. else
  1980. /* bdp = (QUICC_BD *)&cpmp->cp_dpmem[up->smc_rbase]; */
  1981. bdp = (QUICC_BD *)((uint)pquicc + (uint)up->tbase);
  1982. /* Pointer to UART in parameter ram.
  1983. */
  1984. /* up = (smc_uart_t *)&cpmp->cp_dparam[ser->port]; */
  1985. up = &pquicc->pram[info->state->port].scc.pothers.idma_smc.psmc.u;
  1986. /*
  1987. * We need to gracefully shut down the receiver, disable
  1988. * interrupts, then read the input.
  1989. * XMON just wants a poll. If no character, return -1, else
  1990. * return the character.
  1991. */
  1992. if (!xmon) {
  1993. while (bdp->status & BD_SC_EMPTY);
  1994. }
  1995. else {
  1996. if (bdp->status & BD_SC_EMPTY)
  1997. return -1;
  1998. }
  1999. cp = (char *)bdp->buf;
  2000. if (obuf) {
  2001. i = c = bdp->length;
  2002. while (i-- > 0)
  2003. *obuf++ = *cp++;
  2004. }
  2005. else {
  2006. c = *cp;
  2007. }
  2008. bdp->status |= BD_SC_EMPTY;
  2009. if (info) {
  2010. if (bdp->status & BD_SC_WRAP) {
  2011. bdp = info->rx_bd_base;
  2012. }
  2013. else {
  2014. bdp++;
  2015. }
  2016. info->rx_cur = (QUICC_BD *)bdp;
  2017. }
  2018. return((int)c);
  2019. }
  2020. static int serial_console_wait_key(struct console *co)
  2021. {
  2022. return(my_console_wait_key(co->index, 0, NULL));
  2023. }
  2024. #ifdef CONFIG_XMON
  2025. int
  2026. xmon_360_read_poll(void)
  2027. {
  2028. return(my_console_wait_key(0, 1, NULL));
  2029. }
  2030. int
  2031. xmon_360_read_char(void)
  2032. {
  2033. return(my_console_wait_key(0, 0, NULL));
  2034. }
  2035. #endif
  2036. #ifdef CONFIG_KGDB
  2037. static char kgdb_buf[RX_BUF_SIZE], *kgdp;
  2038. static int kgdb_chars;
  2039. unsigned char
  2040. getDebugChar(void)
  2041. {
  2042. if (kgdb_chars <= 0) {
  2043. kgdb_chars = my_console_wait_key(0, 0, kgdb_buf);
  2044. kgdp = kgdb_buf;
  2045. }
  2046. kgdb_chars--;
  2047. return(*kgdp++);
  2048. }
  2049. void kgdb_interruptible(int state)
  2050. {
  2051. }
  2052. void kgdb_map_scc(void)
  2053. {
  2054. struct serial_state *ser;
  2055. uint mem_addr;
  2056. volatile QUICC_BD *bdp;
  2057. volatile smc_uart_t *up;
  2058. cpmp = (cpm360_t *)&(((immap_t *)IMAP_ADDR)->im_cpm);
  2059. /* To avoid data cache CPM DMA coherency problems, allocate a
  2060. * buffer in the CPM DPRAM. This will work until the CPM and
  2061. * serial ports are initialized. At that time a memory buffer
  2062. * will be allocated.
  2063. * The port is already initialized from the boot procedure, all
  2064. * we do here is give it a different buffer and make it a FIFO.
  2065. */
  2066. ser = rs_table;
  2067. /* Right now, assume we are using SMCs.
  2068. */
  2069. up = (smc_uart_t *)&cpmp->cp_dparam[ser->port];
  2070. /* Allocate space for an input FIFO, plus a few bytes for output.
  2071. * Allocate bytes to maintain word alignment.
  2072. */
  2073. mem_addr = (uint)(&cpmp->cp_dpmem[0x1000]);
  2074. /* Set the physical address of the host memory buffers in
  2075. * the buffer descriptors.
  2076. */
  2077. bdp = (QUICC_BD *)&cpmp->cp_dpmem[up->smc_rbase];
  2078. bdp->buf = mem_addr;
  2079. bdp = (QUICC_BD *)&cpmp->cp_dpmem[up->smc_tbase];
  2080. bdp->buf = mem_addr+RX_BUF_SIZE;
  2081. up->smc_mrblr = RX_BUF_SIZE; /* receive buffer length */
  2082. up->smc_maxidl = RX_BUF_SIZE;
  2083. }
  2084. #endif
  2085. static struct tty_struct *serial_console_device(struct console *c, int *index)
  2086. {
  2087. *index = c->index;
  2088. return serial_driver;
  2089. }
  2090. struct console sercons = {
  2091. .name = "ttyS",
  2092. .write = serial_console_write,
  2093. .device = serial_console_device,
  2094. .wait_key = serial_console_wait_key,
  2095. .setup = serial_console_setup,
  2096. .flags = CON_PRINTBUFFER,
  2097. .index = CONFIG_SERIAL_CONSOLE_PORT,
  2098. };
  2099. /*
  2100. * Register console.
  2101. */
  2102. long console_360_init(long kmem_start, long kmem_end)
  2103. {
  2104. register_console(&sercons);
  2105. /*register_console (console_print_68360); - 2.0.38 only required a write
  2106. function pointer. */
  2107. return kmem_start;
  2108. }
  2109. #endif
  2110. /* Index in baud rate table of the default console baud rate.
  2111. */
  2112. static int baud_idx;
  2113. static struct tty_operations rs_360_ops = {
  2114. .owner = THIS_MODULE,
  2115. .open = rs_360_open,
  2116. .close = rs_360_close,
  2117. .write = rs_360_write,
  2118. .put_char = rs_360_put_char,
  2119. .write_room = rs_360_write_room,
  2120. .chars_in_buffer = rs_360_chars_in_buffer,
  2121. .flush_buffer = rs_360_flush_buffer,
  2122. .ioctl = rs_360_ioctl,
  2123. .throttle = rs_360_throttle,
  2124. .unthrottle = rs_360_unthrottle,
  2125. /* .send_xchar = rs_360_send_xchar, */
  2126. .set_termios = rs_360_set_termios,
  2127. .stop = rs_360_stop,
  2128. .start = rs_360_start,
  2129. .hangup = rs_360_hangup,
  2130. /* .wait_until_sent = rs_360_wait_until_sent, */
  2131. /* .read_proc = rs_360_read_proc, */
  2132. .tiocmget = rs_360_tiocmget,
  2133. .tiocmset = rs_360_tiocmset,
  2134. };
  2135. /* int __init rs_360_init(void) */
  2136. int rs_360_init(void)
  2137. {
  2138. struct serial_state * state;
  2139. ser_info_t *info;
  2140. void *mem_addr;
  2141. uint dp_addr, iobits;
  2142. int i, j, idx;
  2143. ushort chan;
  2144. QUICC_BD *bdp;
  2145. volatile QUICC *cp;
  2146. volatile struct smc_regs *sp;
  2147. volatile struct smc_uart_pram *up;
  2148. volatile struct scc_regs *scp;
  2149. volatile struct uart_pram *sup;
  2150. /* volatile immap_t *immap; */
  2151. serial_driver = alloc_tty_driver(NR_PORTS);
  2152. if (!serial_driver)
  2153. return -1;
  2154. show_serial_version();
  2155. serial_driver->name = "ttyS";
  2156. serial_driver->major = TTY_MAJOR;
  2157. serial_driver->minor_start = 64;
  2158. serial_driver->type = TTY_DRIVER_TYPE_SERIAL;
  2159. serial_driver->subtype = SERIAL_TYPE_NORMAL;
  2160. serial_driver->init_termios = tty_std_termios;
  2161. serial_driver->init_termios.c_cflag =
  2162. baud_idx | CS8 | CREAD | HUPCL | CLOCAL;
  2163. serial_driver->flags = TTY_DRIVER_REAL_RAW;
  2164. tty_set_operations(serial_driver, &rs_360_ops);
  2165. if (tty_register_driver(serial_driver))
  2166. panic("Couldn't register serial driver\n");
  2167. cp = pquicc; /* Get pointer to Communication Processor */
  2168. /* immap = (immap_t *)IMAP_ADDR; */ /* and to internal registers */
  2169. /* Configure SCC2, SCC3, and SCC4 instead of port A parallel I/O.
  2170. */
  2171. /* The "standard" configuration through the 860.
  2172. */
  2173. /* immap->im_ioport.iop_papar |= 0x00fc; */
  2174. /* immap->im_ioport.iop_padir &= ~0x00fc; */
  2175. /* immap->im_ioport.iop_paodr &= ~0x00fc; */
  2176. cp->pio_papar |= 0x00fc;
  2177. cp->pio_padir &= ~0x00fc;
  2178. /* cp->pio_paodr &= ~0x00fc; */
  2179. /* Since we don't yet do modem control, connect the port C pins
  2180. * as general purpose I/O. This will assert CTS and CD for the
  2181. * SCC ports.
  2182. */
  2183. /* FIXME: see 360um p.7-365 and 860um p.34-12
  2184. * I can't make sense of these bits - mleslie*/
  2185. /* immap->im_ioport.iop_pcdir |= 0x03c6; */
  2186. /* immap->im_ioport.iop_pcpar &= ~0x03c6; */
  2187. /* cp->pio_pcdir |= 0x03c6; */
  2188. /* cp->pio_pcpar &= ~0x03c6; */
  2189. /* Connect SCC2 and SCC3 to NMSI. Connect BRG3 to SCC2 and
  2190. * BRG4 to SCC3.
  2191. */
  2192. cp->si_sicr &= ~0x00ffff00;
  2193. cp->si_sicr |= 0x001b1200;
  2194. #ifdef CONFIG_PP04
  2195. /* Frequentis PP04 forced to RS-232 until we know better.
  2196. * Port C 12 and 13 low enables RS-232 on SCC3 and SCC4.
  2197. */
  2198. immap->im_ioport.iop_pcdir |= 0x000c;
  2199. immap->im_ioport.iop_pcpar &= ~0x000c;
  2200. immap->im_ioport.iop_pcdat &= ~0x000c;
  2201. /* This enables the TX driver.
  2202. */
  2203. cp->cp_pbpar &= ~0x6000;
  2204. cp->cp_pbdat &= ~0x6000;
  2205. #endif
  2206. for (i = 0, state = rs_table; i < NR_PORTS; i++,state++) {
  2207. state->magic = SSTATE_MAGIC;
  2208. state->line = i;
  2209. state->type = PORT_UNKNOWN;
  2210. state->custom_divisor = 0;
  2211. state->close_delay = 5*HZ/10;
  2212. state->closing_wait = 30*HZ;
  2213. state->icount.cts = state->icount.dsr =
  2214. state->icount.rng = state->icount.dcd = 0;
  2215. state->icount.rx = state->icount.tx = 0;
  2216. state->icount.frame = state->icount.parity = 0;
  2217. state->icount.overrun = state->icount.brk = 0;
  2218. printk(KERN_INFO "ttyS%d at irq 0x%02x is an %s\n",
  2219. i, (unsigned int)(state->irq),
  2220. (state->smc_scc_num & NUM_IS_SCC) ? "SCC" : "SMC");
  2221. #ifdef CONFIG_SERIAL_CONSOLE
  2222. /* If we just printed the message on the console port, and
  2223. * we are about to initialize it for general use, we have
  2224. * to wait a couple of character times for the CR/NL to
  2225. * make it out of the transmit buffer.
  2226. */
  2227. if (i == CONFIG_SERIAL_CONSOLE_PORT)
  2228. mdelay(8);
  2229. /* idx = PORT_NUM(info->state->smc_scc_num); */
  2230. /* if (info->state->smc_scc_num & NUM_IS_SCC) */
  2231. /* chan = scc_chan_map[idx]; */
  2232. /* else */
  2233. /* chan = smc_chan_map[idx]; */
  2234. /* cp->cp_cr = mk_cr_cmd(chan, CPM_CR_STOP_TX) | CPM_CR_FLG; */
  2235. /* while (cp->cp_cr & CPM_CR_FLG); */
  2236. #endif
  2237. /* info = kmalloc(sizeof(ser_info_t), GFP_KERNEL); */
  2238. info = &quicc_ser_info[i];
  2239. if (info) {
  2240. memset (info, 0, sizeof(ser_info_t));
  2241. info->magic = SERIAL_MAGIC;
  2242. info->line = i;
  2243. info->flags = state->flags;
  2244. INIT_WORK(&info->tqueue, do_softint, info);
  2245. INIT_WORK(&info->tqueue_hangup, do_serial_hangup, info);
  2246. init_waitqueue_head(&info->open_wait);
  2247. init_waitqueue_head(&info->close_wait);
  2248. info->state = state;
  2249. state->info = (struct async_struct *)info;
  2250. /* We need to allocate a transmit and receive buffer
  2251. * descriptors from dual port ram, and a character
  2252. * buffer area from host mem.
  2253. */
  2254. dp_addr = m360_cpm_dpalloc(sizeof(QUICC_BD) * RX_NUM_FIFO);
  2255. /* Allocate space for FIFOs in the host memory.
  2256. * (for now this is from a static array of buffers :(
  2257. */
  2258. /* mem_addr = m360_cpm_hostalloc(RX_NUM_FIFO * RX_BUF_SIZE); */
  2259. /* mem_addr = kmalloc (RX_NUM_FIFO * RX_BUF_SIZE, GFP_BUFFER); */
  2260. mem_addr = &rx_buf_pool[i * RX_NUM_FIFO * RX_BUF_SIZE];
  2261. /* Set the physical address of the host memory
  2262. * buffers in the buffer descriptors, and the
  2263. * virtual address for us to work with.
  2264. */
  2265. bdp = (QUICC_BD *)((uint)pquicc + dp_addr);
  2266. info->rx_cur = info->rx_bd_base = bdp;
  2267. /* initialize rx buffer descriptors */
  2268. for (j=0; j<(RX_NUM_FIFO-1); j++) {
  2269. bdp->buf = &rx_buf_pool[(i * RX_NUM_FIFO + j ) * RX_BUF_SIZE];
  2270. bdp->status = BD_SC_EMPTY | BD_SC_INTRPT;
  2271. mem_addr += RX_BUF_SIZE;
  2272. bdp++;
  2273. }
  2274. bdp->buf = &rx_buf_pool[(i * RX_NUM_FIFO + j ) * RX_BUF_SIZE];
  2275. bdp->status = BD_SC_WRAP | BD_SC_EMPTY | BD_SC_INTRPT;
  2276. idx = PORT_NUM(info->state->smc_scc_num);
  2277. if (info->state->smc_scc_num & NUM_IS_SCC) {
  2278. #if defined (CONFIG_UCQUICC) && 1
  2279. /* set the transceiver mode to RS232 */
  2280. sipex_mode_bits &= ~(uint)SIPEX_MODE(idx,0x0f); /* clear current mode */
  2281. sipex_mode_bits |= (uint)SIPEX_MODE(idx,0x02);
  2282. *(uint *)_periph_base = sipex_mode_bits;
  2283. /* printk ("sipex bits = 0x%08x\n", sipex_mode_bits); */
  2284. #endif
  2285. }
  2286. dp_addr = m360_cpm_dpalloc(sizeof(QUICC_BD) * TX_NUM_FIFO);
  2287. /* Allocate space for FIFOs in the host memory.
  2288. */
  2289. /* mem_addr = m360_cpm_hostalloc(TX_NUM_FIFO * TX_BUF_SIZE); */
  2290. /* mem_addr = kmalloc (TX_NUM_FIFO * TX_BUF_SIZE, GFP_BUFFER); */
  2291. mem_addr = &tx_buf_pool[i * TX_NUM_FIFO * TX_BUF_SIZE];
  2292. /* Set the physical address of the host memory
  2293. * buffers in the buffer descriptors, and the
  2294. * virtual address for us to work with.
  2295. */
  2296. /* bdp = (QUICC_BD *)&cp->cp_dpmem[dp_addr]; */
  2297. bdp = (QUICC_BD *)((uint)pquicc + dp_addr);
  2298. info->tx_cur = info->tx_bd_base = (QUICC_BD *)bdp;
  2299. /* initialize tx buffer descriptors */
  2300. for (j=0; j<(TX_NUM_FIFO-1); j++) {
  2301. bdp->buf = &tx_buf_pool[(i * TX_NUM_FIFO + j ) * TX_BUF_SIZE];
  2302. bdp->status = BD_SC_INTRPT;
  2303. mem_addr += TX_BUF_SIZE;
  2304. bdp++;
  2305. }
  2306. bdp->buf = &tx_buf_pool[(i * TX_NUM_FIFO + j ) * TX_BUF_SIZE];
  2307. bdp->status = (BD_SC_WRAP | BD_SC_INTRPT);
  2308. if (info->state->smc_scc_num & NUM_IS_SCC) {
  2309. scp = &pquicc->scc_regs[idx];
  2310. sup = &pquicc->pram[info->state->port].scc.pscc.u;
  2311. sup->rbase = dp_addr;
  2312. sup->tbase = dp_addr;
  2313. /* Set up the uart parameters in the
  2314. * parameter ram.
  2315. */
  2316. sup->rfcr = SMC_EB;
  2317. sup->tfcr = SMC_EB;
  2318. /* Set this to 1 for now, so we get single
  2319. * character interrupts. Using idle charater
  2320. * time requires some additional tuning.
  2321. */
  2322. sup->mrblr = 1;
  2323. sup->max_idl = 0;
  2324. sup->brkcr = 1;
  2325. sup->parec = 0;
  2326. sup->frmer = 0;
  2327. sup->nosec = 0;
  2328. sup->brkec = 0;
  2329. sup->uaddr1 = 0;
  2330. sup->uaddr2 = 0;
  2331. sup->toseq = 0;
  2332. {
  2333. int i;
  2334. for (i=0;i<8;i++)
  2335. sup->cc[i] = 0x8000;
  2336. }
  2337. sup->rccm = 0xc0ff;
  2338. /* Send the CPM an initialize command.
  2339. */
  2340. chan = scc_chan_map[idx];
  2341. /* execute the INIT RX & TX PARAMS command for this channel. */
  2342. cp->cp_cr = mk_cr_cmd(chan, CPM_CR_INIT_TRX) | CPM_CR_FLG;
  2343. while (cp->cp_cr & CPM_CR_FLG);
  2344. /* Set UART mode, 8 bit, no parity, one stop.
  2345. * Enable receive and transmit.
  2346. */
  2347. scp->scc_gsmr.w.high = 0;
  2348. scp->scc_gsmr.w.low =
  2349. (SCC_GSMRL_MODE_UART | SCC_GSMRL_TDCR_16 | SCC_GSMRL_RDCR_16);
  2350. /* Disable all interrupts and clear all pending
  2351. * events.
  2352. */
  2353. scp->scc_sccm = 0;
  2354. scp->scc_scce = 0xffff;
  2355. scp->scc_dsr = 0x7e7e;
  2356. scp->scc_psmr = 0x3000;
  2357. /* If the port is the console, enable Rx and Tx.
  2358. */
  2359. #ifdef CONFIG_SERIAL_CONSOLE
  2360. if (i == CONFIG_SERIAL_CONSOLE_PORT)
  2361. scp->scc_gsmr.w.low |= (SCC_GSMRL_ENR | SCC_GSMRL_ENT);
  2362. #endif
  2363. }
  2364. else {
  2365. /* Configure SMCs Tx/Rx instead of port B
  2366. * parallel I/O.
  2367. */
  2368. up = &pquicc->pram[info->state->port].scc.pothers.idma_smc.psmc.u;
  2369. up->rbase = dp_addr;
  2370. iobits = 0xc0 << (idx * 4);
  2371. cp->pip_pbpar |= iobits;
  2372. cp->pip_pbdir &= ~iobits;
  2373. cp->pip_pbodr &= ~iobits;
  2374. /* Connect the baud rate generator to the
  2375. * SMC based upon index in rs_table. Also
  2376. * make sure it is connected to NMSI.
  2377. */
  2378. cp->si_simode &= ~(0xffff << (idx * 16));
  2379. cp->si_simode |= (i << ((idx * 16) + 12));
  2380. up->tbase = dp_addr;
  2381. /* Set up the uart parameters in the
  2382. * parameter ram.
  2383. */
  2384. up->rfcr = SMC_EB;
  2385. up->tfcr = SMC_EB;
  2386. /* Set this to 1 for now, so we get single
  2387. * character interrupts. Using idle charater
  2388. * time requires some additional tuning.
  2389. */
  2390. up->mrblr = 1;
  2391. up->max_idl = 0;
  2392. up->brkcr = 1;
  2393. /* Send the CPM an initialize command.
  2394. */
  2395. chan = smc_chan_map[idx];
  2396. cp->cp_cr = mk_cr_cmd(chan,
  2397. CPM_CR_INIT_TRX) | CPM_CR_FLG;
  2398. #ifdef CONFIG_SERIAL_CONSOLE
  2399. if (i == CONFIG_SERIAL_CONSOLE_PORT)
  2400. printk("");
  2401. #endif
  2402. while (cp->cp_cr & CPM_CR_FLG);
  2403. /* Set UART mode, 8 bit, no parity, one stop.
  2404. * Enable receive and transmit.
  2405. */
  2406. sp = &cp->smc_regs[idx];
  2407. sp->smc_smcmr = smcr_mk_clen(9) | SMCMR_SM_UART;
  2408. /* Disable all interrupts and clear all pending
  2409. * events.
  2410. */
  2411. sp->smc_smcm = 0;
  2412. sp->smc_smce = 0xff;
  2413. /* If the port is the console, enable Rx and Tx.
  2414. */
  2415. #ifdef CONFIG_SERIAL_CONSOLE
  2416. if (i == CONFIG_SERIAL_CONSOLE_PORT)
  2417. sp->smc_smcmr |= SMCMR_REN | SMCMR_TEN;
  2418. #endif
  2419. }
  2420. /* Install interrupt handler.
  2421. */
  2422. /* cpm_install_handler(IRQ_MACHSPEC | state->irq, rs_360_interrupt, info); */
  2423. /*request_irq(IRQ_MACHSPEC | state->irq, rs_360_interrupt, */
  2424. request_irq(state->irq, rs_360_interrupt,
  2425. IRQ_FLG_LOCK, "ttyS", (void *)info);
  2426. /* Set up the baud rate generator.
  2427. */
  2428. m360_cpm_setbrg(i, baud_table[baud_idx]);
  2429. }
  2430. }
  2431. return 0;
  2432. }
  2433. /* This must always be called before the rs_360_init() function, otherwise
  2434. * it blows away the port control information.
  2435. */
  2436. //static int __init serial_console_setup( struct console *co, char *options)
  2437. int serial_console_setup( struct console *co, char *options)
  2438. {
  2439. struct serial_state *ser;
  2440. uint mem_addr, dp_addr, bidx, idx, iobits;
  2441. ushort chan;
  2442. QUICC_BD *bdp;
  2443. volatile QUICC *cp;
  2444. volatile struct smc_regs *sp;
  2445. volatile struct scc_regs *scp;
  2446. volatile struct smc_uart_pram *up;
  2447. volatile struct uart_pram *sup;
  2448. /* mleslie TODO:
  2449. * add something to the 68k bootloader to store a desired initial console baud rate */
  2450. /* bd_t *bd; */ /* a board info struct used by EPPC-bug */
  2451. /* bd = (bd_t *)__res; */
  2452. for (bidx = 0; bidx < (sizeof(baud_table) / sizeof(int)); bidx++)
  2453. /* if (bd->bi_baudrate == baud_table[bidx]) */
  2454. if (CONSOLE_BAUDRATE == baud_table[bidx])
  2455. break;
  2456. /* co->cflag = CREAD|CLOCAL|bidx|CS8; */
  2457. baud_idx = bidx;
  2458. ser = rs_table + CONFIG_SERIAL_CONSOLE_PORT;
  2459. cp = pquicc; /* Get pointer to Communication Processor */
  2460. idx = PORT_NUM(ser->smc_scc_num);
  2461. if (ser->smc_scc_num & NUM_IS_SCC) {
  2462. /* TODO: need to set up SCC pin assignment etc. here */
  2463. }
  2464. else {
  2465. iobits = 0xc0 << (idx * 4);
  2466. cp->pip_pbpar |= iobits;
  2467. cp->pip_pbdir &= ~iobits;
  2468. cp->pip_pbodr &= ~iobits;
  2469. /* Connect the baud rate generator to the
  2470. * SMC based upon index in rs_table. Also
  2471. * make sure it is connected to NMSI.
  2472. */
  2473. cp->si_simode &= ~(0xffff << (idx * 16));
  2474. cp->si_simode |= (idx << ((idx * 16) + 12));
  2475. }
  2476. /* When we get here, the CPM has been reset, so we need
  2477. * to configure the port.
  2478. * We need to allocate a transmit and receive buffer descriptor
  2479. * from dual port ram, and a character buffer area from host mem.
  2480. */
  2481. /* Allocate space for two buffer descriptors in the DP ram.
  2482. */
  2483. dp_addr = m360_cpm_dpalloc(sizeof(QUICC_BD) * CONSOLE_NUM_FIFO);
  2484. /* Allocate space for two 2 byte FIFOs in the host memory.
  2485. */
  2486. /* mem_addr = m360_cpm_hostalloc(8); */
  2487. mem_addr = (uint)console_fifos;
  2488. /* Set the physical address of the host memory buffers in
  2489. * the buffer descriptors.
  2490. */
  2491. /* bdp = (QUICC_BD *)&cp->cp_dpmem[dp_addr]; */
  2492. bdp = (QUICC_BD *)((uint)pquicc + dp_addr);
  2493. bdp->buf = (char *)mem_addr;
  2494. (bdp+1)->buf = (char *)(mem_addr+4);
  2495. /* For the receive, set empty and wrap.
  2496. * For transmit, set wrap.
  2497. */
  2498. bdp->status = BD_SC_EMPTY | BD_SC_WRAP;
  2499. (bdp+1)->status = BD_SC_WRAP;
  2500. /* Set up the uart parameters in the parameter ram.
  2501. */
  2502. if (ser->smc_scc_num & NUM_IS_SCC) {
  2503. scp = &cp->scc_regs[idx];
  2504. /* sup = (scc_uart_t *)&cp->cp_dparam[ser->port]; */
  2505. sup = &pquicc->pram[ser->port].scc.pscc.u;
  2506. sup->rbase = dp_addr;
  2507. sup->tbase = dp_addr + sizeof(QUICC_BD);
  2508. /* Set up the uart parameters in the
  2509. * parameter ram.
  2510. */
  2511. sup->rfcr = SMC_EB;
  2512. sup->tfcr = SMC_EB;
  2513. /* Set this to 1 for now, so we get single
  2514. * character interrupts. Using idle charater
  2515. * time requires some additional tuning.
  2516. */
  2517. sup->mrblr = 1;
  2518. sup->max_idl = 0;
  2519. sup->brkcr = 1;
  2520. sup->parec = 0;
  2521. sup->frmer = 0;
  2522. sup->nosec = 0;
  2523. sup->brkec = 0;
  2524. sup->uaddr1 = 0;
  2525. sup->uaddr2 = 0;
  2526. sup->toseq = 0;
  2527. {
  2528. int i;
  2529. for (i=0;i<8;i++)
  2530. sup->cc[i] = 0x8000;
  2531. }
  2532. sup->rccm = 0xc0ff;
  2533. /* Send the CPM an initialize command.
  2534. */
  2535. chan = scc_chan_map[idx];
  2536. cp->cp_cr = mk_cr_cmd(chan, CPM_CR_INIT_TRX) | CPM_CR_FLG;
  2537. while (cp->cp_cr & CPM_CR_FLG);
  2538. /* Set UART mode, 8 bit, no parity, one stop.
  2539. * Enable receive and transmit.
  2540. */
  2541. scp->scc_gsmr.w.high = 0;
  2542. scp->scc_gsmr.w.low =
  2543. (SCC_GSMRL_MODE_UART | SCC_GSMRL_TDCR_16 | SCC_GSMRL_RDCR_16);
  2544. /* Disable all interrupts and clear all pending
  2545. * events.
  2546. */
  2547. scp->scc_sccm = 0;
  2548. scp->scc_scce = 0xffff;
  2549. scp->scc_dsr = 0x7e7e;
  2550. scp->scc_psmr = 0x3000;
  2551. scp->scc_gsmr.w.low |= (SCC_GSMRL_ENR | SCC_GSMRL_ENT);
  2552. }
  2553. else {
  2554. /* up = (smc_uart_t *)&cp->cp_dparam[ser->port]; */
  2555. up = &pquicc->pram[ser->port].scc.pothers.idma_smc.psmc.u;
  2556. up->rbase = dp_addr; /* Base of receive buffer desc. */
  2557. up->tbase = dp_addr+sizeof(QUICC_BD); /* Base of xmt buffer desc. */
  2558. up->rfcr = SMC_EB;
  2559. up->tfcr = SMC_EB;
  2560. /* Set this to 1 for now, so we get single character interrupts.
  2561. */
  2562. up->mrblr = 1; /* receive buffer length */
  2563. up->max_idl = 0; /* wait forever for next char */
  2564. /* Send the CPM an initialize command.
  2565. */
  2566. chan = smc_chan_map[idx];
  2567. cp->cp_cr = mk_cr_cmd(chan, CPM_CR_INIT_TRX) | CPM_CR_FLG;
  2568. while (cp->cp_cr & CPM_CR_FLG);
  2569. /* Set UART mode, 8 bit, no parity, one stop.
  2570. * Enable receive and transmit.
  2571. */
  2572. sp = &cp->smc_regs[idx];
  2573. sp->smc_smcmr = smcr_mk_clen(9) | SMCMR_SM_UART;
  2574. /* And finally, enable Rx and Tx.
  2575. */
  2576. sp->smc_smcmr |= SMCMR_REN | SMCMR_TEN;
  2577. }
  2578. /* Set up the baud rate generator.
  2579. */
  2580. /* m360_cpm_setbrg((ser - rs_table), bd->bi_baudrate); */
  2581. m360_cpm_setbrg((ser - rs_table), CONSOLE_BAUDRATE);
  2582. return 0;
  2583. }
  2584. /*
  2585. * Local variables:
  2586. * c-indent-level: 4
  2587. * c-basic-offset: 4
  2588. * tab-width: 4
  2589. * End:
  2590. */