21285.c 12 KB

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  1. /*
  2. * linux/drivers/char/21285.c
  3. *
  4. * Driver for the serial port on the 21285 StrongArm-110 core logic chip.
  5. *
  6. * Based on drivers/char/serial.c
  7. *
  8. * $Id: 21285.c,v 1.37 2002/07/28 10:03:27 rmk Exp $
  9. */
  10. #include <linux/config.h>
  11. #include <linux/module.h>
  12. #include <linux/tty.h>
  13. #include <linux/ioport.h>
  14. #include <linux/init.h>
  15. #include <linux/console.h>
  16. #include <linux/device.h>
  17. #include <linux/tty_flip.h>
  18. #include <linux/serial_core.h>
  19. #include <linux/serial.h>
  20. #include <asm/io.h>
  21. #include <asm/irq.h>
  22. #include <asm/mach-types.h>
  23. #include <asm/hardware/dec21285.h>
  24. #include <asm/hardware.h>
  25. #define BAUD_BASE (mem_fclk_21285/64)
  26. #define SERIAL_21285_NAME "ttyFB"
  27. #define SERIAL_21285_MAJOR 204
  28. #define SERIAL_21285_MINOR 4
  29. #define RXSTAT_DUMMY_READ 0x80000000
  30. #define RXSTAT_FRAME (1 << 0)
  31. #define RXSTAT_PARITY (1 << 1)
  32. #define RXSTAT_OVERRUN (1 << 2)
  33. #define RXSTAT_ANYERR (RXSTAT_FRAME|RXSTAT_PARITY|RXSTAT_OVERRUN)
  34. #define H_UBRLCR_BREAK (1 << 0)
  35. #define H_UBRLCR_PARENB (1 << 1)
  36. #define H_UBRLCR_PAREVN (1 << 2)
  37. #define H_UBRLCR_STOPB (1 << 3)
  38. #define H_UBRLCR_FIFO (1 << 4)
  39. static const char serial21285_name[] = "Footbridge UART";
  40. #define tx_enabled(port) ((port)->unused[0])
  41. #define rx_enabled(port) ((port)->unused[1])
  42. /*
  43. * The documented expression for selecting the divisor is:
  44. * BAUD_BASE / baud - 1
  45. * However, typically BAUD_BASE is not divisible by baud, so
  46. * we want to select the divisor that gives us the minimum
  47. * error. Therefore, we want:
  48. * int(BAUD_BASE / baud - 0.5) ->
  49. * int(BAUD_BASE / baud - (baud >> 1) / baud) ->
  50. * int((BAUD_BASE - (baud >> 1)) / baud)
  51. */
  52. static void
  53. serial21285_stop_tx(struct uart_port *port, unsigned int tty_stop)
  54. {
  55. if (tx_enabled(port)) {
  56. disable_irq(IRQ_CONTX);
  57. tx_enabled(port) = 0;
  58. }
  59. }
  60. static void
  61. serial21285_start_tx(struct uart_port *port, unsigned int tty_start)
  62. {
  63. if (!tx_enabled(port)) {
  64. enable_irq(IRQ_CONTX);
  65. tx_enabled(port) = 1;
  66. }
  67. }
  68. static void serial21285_stop_rx(struct uart_port *port)
  69. {
  70. if (rx_enabled(port)) {
  71. disable_irq(IRQ_CONRX);
  72. rx_enabled(port) = 0;
  73. }
  74. }
  75. static void serial21285_enable_ms(struct uart_port *port)
  76. {
  77. }
  78. static irqreturn_t serial21285_rx_chars(int irq, void *dev_id, struct pt_regs *regs)
  79. {
  80. struct uart_port *port = dev_id;
  81. struct tty_struct *tty = port->info->tty;
  82. unsigned int status, ch, flag, rxs, max_count = 256;
  83. status = *CSR_UARTFLG;
  84. while (!(status & 0x10) && max_count--) {
  85. if (tty->flip.count >= TTY_FLIPBUF_SIZE) {
  86. if (tty->low_latency)
  87. tty_flip_buffer_push(tty);
  88. /*
  89. * If this failed then we will throw away the
  90. * bytes but must do so to clear interrupts
  91. */
  92. }
  93. ch = *CSR_UARTDR;
  94. flag = TTY_NORMAL;
  95. port->icount.rx++;
  96. rxs = *CSR_RXSTAT | RXSTAT_DUMMY_READ;
  97. if (unlikely(rxs & RXSTAT_ANYERR)) {
  98. if (rxs & RXSTAT_PARITY)
  99. port->icount.parity++;
  100. else if (rxs & RXSTAT_FRAME)
  101. port->icount.frame++;
  102. if (rxs & RXSTAT_OVERRUN)
  103. port->icount.overrun++;
  104. rxs &= port->read_status_mask;
  105. if (rxs & RXSTAT_PARITY)
  106. flag = TTY_PARITY;
  107. else if (rxs & RXSTAT_FRAME)
  108. flag = TTY_FRAME;
  109. }
  110. if ((rxs & port->ignore_status_mask) == 0) {
  111. tty_insert_flip_char(tty, ch, flag);
  112. }
  113. if ((rxs & RXSTAT_OVERRUN) &&
  114. tty->flip.count < TTY_FLIPBUF_SIZE) {
  115. /*
  116. * Overrun is special, since it's reported
  117. * immediately, and doesn't affect the current
  118. * character.
  119. */
  120. tty_insert_flip_char(tty, 0, TTY_OVERRUN);
  121. }
  122. status = *CSR_UARTFLG;
  123. }
  124. tty_flip_buffer_push(tty);
  125. return IRQ_HANDLED;
  126. }
  127. static irqreturn_t serial21285_tx_chars(int irq, void *dev_id, struct pt_regs *regs)
  128. {
  129. struct uart_port *port = dev_id;
  130. struct circ_buf *xmit = &port->info->xmit;
  131. int count = 256;
  132. if (port->x_char) {
  133. *CSR_UARTDR = port->x_char;
  134. port->icount.tx++;
  135. port->x_char = 0;
  136. goto out;
  137. }
  138. if (uart_circ_empty(xmit) || uart_tx_stopped(port)) {
  139. serial21285_stop_tx(port, 0);
  140. goto out;
  141. }
  142. do {
  143. *CSR_UARTDR = xmit->buf[xmit->tail];
  144. xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
  145. port->icount.tx++;
  146. if (uart_circ_empty(xmit))
  147. break;
  148. } while (--count > 0 && !(*CSR_UARTFLG & 0x20));
  149. if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
  150. uart_write_wakeup(port);
  151. if (uart_circ_empty(xmit))
  152. serial21285_stop_tx(port, 0);
  153. out:
  154. return IRQ_HANDLED;
  155. }
  156. static unsigned int serial21285_tx_empty(struct uart_port *port)
  157. {
  158. return (*CSR_UARTFLG & 8) ? 0 : TIOCSER_TEMT;
  159. }
  160. /* no modem control lines */
  161. static unsigned int serial21285_get_mctrl(struct uart_port *port)
  162. {
  163. return TIOCM_CAR | TIOCM_DSR | TIOCM_CTS;
  164. }
  165. static void serial21285_set_mctrl(struct uart_port *port, unsigned int mctrl)
  166. {
  167. }
  168. static void serial21285_break_ctl(struct uart_port *port, int break_state)
  169. {
  170. unsigned long flags;
  171. unsigned int h_lcr;
  172. spin_lock_irqsave(&port->lock, flags);
  173. h_lcr = *CSR_H_UBRLCR;
  174. if (break_state)
  175. h_lcr |= H_UBRLCR_BREAK;
  176. else
  177. h_lcr &= ~H_UBRLCR_BREAK;
  178. *CSR_H_UBRLCR = h_lcr;
  179. spin_unlock_irqrestore(&port->lock, flags);
  180. }
  181. static int serial21285_startup(struct uart_port *port)
  182. {
  183. int ret;
  184. tx_enabled(port) = 1;
  185. rx_enabled(port) = 1;
  186. ret = request_irq(IRQ_CONRX, serial21285_rx_chars, 0,
  187. serial21285_name, port);
  188. if (ret == 0) {
  189. ret = request_irq(IRQ_CONTX, serial21285_tx_chars, 0,
  190. serial21285_name, port);
  191. if (ret)
  192. free_irq(IRQ_CONRX, port);
  193. }
  194. return ret;
  195. }
  196. static void serial21285_shutdown(struct uart_port *port)
  197. {
  198. free_irq(IRQ_CONTX, port);
  199. free_irq(IRQ_CONRX, port);
  200. }
  201. static void
  202. serial21285_set_termios(struct uart_port *port, struct termios *termios,
  203. struct termios *old)
  204. {
  205. unsigned long flags;
  206. unsigned int baud, quot, h_lcr;
  207. /*
  208. * We don't support modem control lines.
  209. */
  210. termios->c_cflag &= ~(HUPCL | CRTSCTS | CMSPAR);
  211. termios->c_cflag |= CLOCAL;
  212. /*
  213. * We don't support BREAK character recognition.
  214. */
  215. termios->c_iflag &= ~(IGNBRK | BRKINT);
  216. /*
  217. * Ask the core to calculate the divisor for us.
  218. */
  219. baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16);
  220. quot = uart_get_divisor(port, baud);
  221. switch (termios->c_cflag & CSIZE) {
  222. case CS5:
  223. h_lcr = 0x00;
  224. break;
  225. case CS6:
  226. h_lcr = 0x20;
  227. break;
  228. case CS7:
  229. h_lcr = 0x40;
  230. break;
  231. default: /* CS8 */
  232. h_lcr = 0x60;
  233. break;
  234. }
  235. if (termios->c_cflag & CSTOPB)
  236. h_lcr |= H_UBRLCR_STOPB;
  237. if (termios->c_cflag & PARENB) {
  238. h_lcr |= H_UBRLCR_PARENB;
  239. if (!(termios->c_cflag & PARODD))
  240. h_lcr |= H_UBRLCR_PAREVN;
  241. }
  242. if (port->fifosize)
  243. h_lcr |= H_UBRLCR_FIFO;
  244. spin_lock_irqsave(&port->lock, flags);
  245. /*
  246. * Update the per-port timeout.
  247. */
  248. uart_update_timeout(port, termios->c_cflag, baud);
  249. /*
  250. * Which character status flags are we interested in?
  251. */
  252. port->read_status_mask = RXSTAT_OVERRUN;
  253. if (termios->c_iflag & INPCK)
  254. port->read_status_mask |= RXSTAT_FRAME | RXSTAT_PARITY;
  255. /*
  256. * Which character status flags should we ignore?
  257. */
  258. port->ignore_status_mask = 0;
  259. if (termios->c_iflag & IGNPAR)
  260. port->ignore_status_mask |= RXSTAT_FRAME | RXSTAT_PARITY;
  261. if (termios->c_iflag & IGNBRK && termios->c_iflag & IGNPAR)
  262. port->ignore_status_mask |= RXSTAT_OVERRUN;
  263. /*
  264. * Ignore all characters if CREAD is not set.
  265. */
  266. if ((termios->c_cflag & CREAD) == 0)
  267. port->ignore_status_mask |= RXSTAT_DUMMY_READ;
  268. quot -= 1;
  269. *CSR_UARTCON = 0;
  270. *CSR_L_UBRLCR = quot & 0xff;
  271. *CSR_M_UBRLCR = (quot >> 8) & 0x0f;
  272. *CSR_H_UBRLCR = h_lcr;
  273. *CSR_UARTCON = 1;
  274. spin_unlock_irqrestore(&port->lock, flags);
  275. }
  276. static const char *serial21285_type(struct uart_port *port)
  277. {
  278. return port->type == PORT_21285 ? "DC21285" : NULL;
  279. }
  280. static void serial21285_release_port(struct uart_port *port)
  281. {
  282. release_mem_region(port->mapbase, 32);
  283. }
  284. static int serial21285_request_port(struct uart_port *port)
  285. {
  286. return request_mem_region(port->mapbase, 32, serial21285_name)
  287. != NULL ? 0 : -EBUSY;
  288. }
  289. static void serial21285_config_port(struct uart_port *port, int flags)
  290. {
  291. if (flags & UART_CONFIG_TYPE && serial21285_request_port(port) == 0)
  292. port->type = PORT_21285;
  293. }
  294. /*
  295. * verify the new serial_struct (for TIOCSSERIAL).
  296. */
  297. static int serial21285_verify_port(struct uart_port *port, struct serial_struct *ser)
  298. {
  299. int ret = 0;
  300. if (ser->type != PORT_UNKNOWN && ser->type != PORT_21285)
  301. ret = -EINVAL;
  302. if (ser->irq != NO_IRQ)
  303. ret = -EINVAL;
  304. if (ser->baud_base != port->uartclk / 16)
  305. ret = -EINVAL;
  306. return ret;
  307. }
  308. static struct uart_ops serial21285_ops = {
  309. .tx_empty = serial21285_tx_empty,
  310. .get_mctrl = serial21285_get_mctrl,
  311. .set_mctrl = serial21285_set_mctrl,
  312. .stop_tx = serial21285_stop_tx,
  313. .start_tx = serial21285_start_tx,
  314. .stop_rx = serial21285_stop_rx,
  315. .enable_ms = serial21285_enable_ms,
  316. .break_ctl = serial21285_break_ctl,
  317. .startup = serial21285_startup,
  318. .shutdown = serial21285_shutdown,
  319. .set_termios = serial21285_set_termios,
  320. .type = serial21285_type,
  321. .release_port = serial21285_release_port,
  322. .request_port = serial21285_request_port,
  323. .config_port = serial21285_config_port,
  324. .verify_port = serial21285_verify_port,
  325. };
  326. static struct uart_port serial21285_port = {
  327. .mapbase = 0x42000160,
  328. .iotype = SERIAL_IO_MEM,
  329. .irq = NO_IRQ,
  330. .fifosize = 16,
  331. .ops = &serial21285_ops,
  332. .flags = ASYNC_BOOT_AUTOCONF,
  333. };
  334. static void serial21285_setup_ports(void)
  335. {
  336. serial21285_port.uartclk = mem_fclk_21285 / 4;
  337. }
  338. #ifdef CONFIG_SERIAL_21285_CONSOLE
  339. static void
  340. serial21285_console_write(struct console *co, const char *s,
  341. unsigned int count)
  342. {
  343. int i;
  344. for (i = 0; i < count; i++) {
  345. while (*CSR_UARTFLG & 0x20)
  346. barrier();
  347. *CSR_UARTDR = s[i];
  348. if (s[i] == '\n') {
  349. while (*CSR_UARTFLG & 0x20)
  350. barrier();
  351. *CSR_UARTDR = '\r';
  352. }
  353. }
  354. }
  355. static void __init
  356. serial21285_get_options(struct uart_port *port, int *baud,
  357. int *parity, int *bits)
  358. {
  359. if (*CSR_UARTCON == 1) {
  360. unsigned int tmp;
  361. tmp = *CSR_H_UBRLCR;
  362. switch (tmp & 0x60) {
  363. case 0x00:
  364. *bits = 5;
  365. break;
  366. case 0x20:
  367. *bits = 6;
  368. break;
  369. case 0x40:
  370. *bits = 7;
  371. break;
  372. default:
  373. case 0x60:
  374. *bits = 8;
  375. break;
  376. }
  377. if (tmp & H_UBRLCR_PARENB) {
  378. *parity = 'o';
  379. if (tmp & H_UBRLCR_PAREVN)
  380. *parity = 'e';
  381. }
  382. tmp = *CSR_L_UBRLCR | (*CSR_M_UBRLCR << 8);
  383. *baud = port->uartclk / (16 * (tmp + 1));
  384. }
  385. }
  386. static int __init serial21285_console_setup(struct console *co, char *options)
  387. {
  388. struct uart_port *port = &serial21285_port;
  389. int baud = 9600;
  390. int bits = 8;
  391. int parity = 'n';
  392. int flow = 'n';
  393. if (machine_is_personal_server())
  394. baud = 57600;
  395. /*
  396. * Check whether an invalid uart number has been specified, and
  397. * if so, search for the first available port that does have
  398. * console support.
  399. */
  400. if (options)
  401. uart_parse_options(options, &baud, &parity, &bits, &flow);
  402. else
  403. serial21285_get_options(port, &baud, &parity, &bits);
  404. return uart_set_options(port, co, baud, parity, bits, flow);
  405. }
  406. extern struct uart_driver serial21285_reg;
  407. static struct console serial21285_console =
  408. {
  409. .name = SERIAL_21285_NAME,
  410. .write = serial21285_console_write,
  411. .device = uart_console_device,
  412. .setup = serial21285_console_setup,
  413. .flags = CON_PRINTBUFFER,
  414. .index = -1,
  415. .data = &serial21285_reg,
  416. };
  417. static int __init rs285_console_init(void)
  418. {
  419. serial21285_setup_ports();
  420. register_console(&serial21285_console);
  421. return 0;
  422. }
  423. console_initcall(rs285_console_init);
  424. #define SERIAL_21285_CONSOLE &serial21285_console
  425. #else
  426. #define SERIAL_21285_CONSOLE NULL
  427. #endif
  428. static struct uart_driver serial21285_reg = {
  429. .owner = THIS_MODULE,
  430. .driver_name = "ttyFB",
  431. .dev_name = "ttyFB",
  432. .devfs_name = "ttyFB",
  433. .major = SERIAL_21285_MAJOR,
  434. .minor = SERIAL_21285_MINOR,
  435. .nr = 1,
  436. .cons = SERIAL_21285_CONSOLE,
  437. };
  438. static int __init serial21285_init(void)
  439. {
  440. int ret;
  441. printk(KERN_INFO "Serial: 21285 driver $Revision: 1.37 $\n");
  442. serial21285_setup_ports();
  443. ret = uart_register_driver(&serial21285_reg);
  444. if (ret == 0)
  445. uart_add_one_port(&serial21285_reg, &serial21285_port);
  446. return ret;
  447. }
  448. static void __exit serial21285_exit(void)
  449. {
  450. uart_remove_one_port(&serial21285_reg, &serial21285_port);
  451. uart_unregister_driver(&serial21285_reg);
  452. }
  453. module_init(serial21285_init);
  454. module_exit(serial21285_exit);
  455. MODULE_LICENSE("GPL");
  456. MODULE_DESCRIPTION("Intel Footbridge (21285) serial driver $Revision: 1.37 $");
  457. MODULE_ALIAS_CHARDEV(SERIAL_21285_MAJOR, SERIAL_21285_MINOR);