FlashPoint.c 308 KB

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  1. /*
  2. FlashPoint.c -- FlashPoint SCCB Manager for Linux
  3. This file contains the FlashPoint SCCB Manager from BusLogic's FlashPoint
  4. Driver Developer's Kit, with minor modifications by Leonard N. Zubkoff for
  5. Linux compatibility. It was provided by BusLogic in the form of 16 separate
  6. source files, which would have unnecessarily cluttered the scsi directory, so
  7. the individual files have been combined into this single file.
  8. Copyright 1995-1996 by Mylex Corporation. All Rights Reserved
  9. This file is available under both the GNU General Public License
  10. and a BSD-style copyright; see LICENSE.FlashPoint for details.
  11. */
  12. #include <linux/config.h>
  13. #ifndef CONFIG_SCSI_OMIT_FLASHPOINT
  14. #define UNIX
  15. #define FW_TYPE _SCCB_MGR_
  16. #define MAX_CARDS 8
  17. #undef BUSTYPE_PCI
  18. #define OS_InPortByte(port) inb(port)
  19. #define OS_InPortWord(port) inw(port)
  20. #define OS_InPortLong(port) inl(port)
  21. #define OS_OutPortByte(port, value) outb(value, port)
  22. #define OS_OutPortWord(port, value) outw(value, port)
  23. #define OS_OutPortLong(port, value) outl(value, port)
  24. #define OS_Lock(x)
  25. #define OS_UnLock(x)
  26. /*
  27. Define name replacements for compatibility with the Linux BusLogic Driver.
  28. */
  29. #define SccbMgr_sense_adapter FlashPoint_ProbeHostAdapter
  30. #define SccbMgr_config_adapter FlashPoint_HardwareResetHostAdapter
  31. #define SccbMgr_unload_card FlashPoint_ReleaseHostAdapter
  32. #define SccbMgr_start_sccb FlashPoint_StartCCB
  33. #define SccbMgr_abort_sccb FlashPoint_AbortCCB
  34. #define SccbMgr_my_int FlashPoint_InterruptPending
  35. #define SccbMgr_isr FlashPoint_HandleInterrupt
  36. /*
  37. Define name replacements to avoid kernel namespace pollution.
  38. */
  39. #define BL_Card FPT_BL_Card
  40. #define BusMasterInit FPT_BusMasterInit
  41. #define CalcCrc16 FPT_CalcCrc16
  42. #define CalcLrc FPT_CalcLrc
  43. #define ChkIfChipInitialized FPT_ChkIfChipInitialized
  44. #define DiagBusMaster FPT_DiagBusMaster
  45. #define DiagEEPROM FPT_DiagEEPROM
  46. #define DiagXbow FPT_DiagXbow
  47. #define GetTarLun FPT_GetTarLun
  48. #define RNVRamData FPT_RNVRamData
  49. #define RdStack FPT_RdStack
  50. #define SccbMgrTableInitAll FPT_SccbMgrTableInitAll
  51. #define SccbMgrTableInitCard FPT_SccbMgrTableInitCard
  52. #define SccbMgrTableInitTarget FPT_SccbMgrTableInitTarget
  53. #define SccbMgr_bad_isr FPT_SccbMgr_bad_isr
  54. #define SccbMgr_scsi_reset FPT_SccbMgr_scsi_reset
  55. #define SccbMgr_timer_expired FPT_SccbMgr_timer_expired
  56. #define SendMsg FPT_SendMsg
  57. #define Wait FPT_Wait
  58. #define Wait1Second FPT_Wait1Second
  59. #define WrStack FPT_WrStack
  60. #define XbowInit FPT_XbowInit
  61. #define autoCmdCmplt FPT_autoCmdCmplt
  62. #define autoLoadDefaultMap FPT_autoLoadDefaultMap
  63. #define busMstrDataXferStart FPT_busMstrDataXferStart
  64. #define busMstrSGDataXferStart FPT_busMstrSGDataXferStart
  65. #define busMstrTimeOut FPT_busMstrTimeOut
  66. #define dataXferProcessor FPT_dataXferProcessor
  67. #define default_intena FPT_default_intena
  68. #define hostDataXferAbort FPT_hostDataXferAbort
  69. #define hostDataXferRestart FPT_hostDataXferRestart
  70. #define inisci FPT_inisci
  71. #define mbCards FPT_mbCards
  72. #define nvRamInfo FPT_nvRamInfo
  73. #define phaseBusFree FPT_phaseBusFree
  74. #define phaseChkFifo FPT_phaseChkFifo
  75. #define phaseCommand FPT_phaseCommand
  76. #define phaseDataIn FPT_phaseDataIn
  77. #define phaseDataOut FPT_phaseDataOut
  78. #define phaseDecode FPT_phaseDecode
  79. #define phaseIllegal FPT_phaseIllegal
  80. #define phaseMsgIn FPT_phaseMsgIn
  81. #define phaseMsgOut FPT_phaseMsgOut
  82. #define phaseStatus FPT_phaseStatus
  83. #define queueAddSccb FPT_queueAddSccb
  84. #define queueCmdComplete FPT_queueCmdComplete
  85. #define queueDisconnect FPT_queueDisconnect
  86. #define queueFindSccb FPT_queueFindSccb
  87. #define queueFlushSccb FPT_queueFlushSccb
  88. #define queueFlushTargSccb FPT_queueFlushTargSccb
  89. #define queueSearchSelect FPT_queueSearchSelect
  90. #define queueSelectFail FPT_queueSelectFail
  91. #define s_PhaseTbl FPT_s_PhaseTbl
  92. #define scamHAString FPT_scamHAString
  93. #define scamInfo FPT_scamInfo
  94. #define scarb FPT_scarb
  95. #define scasid FPT_scasid
  96. #define scbusf FPT_scbusf
  97. #define sccbMgrTbl FPT_sccbMgrTbl
  98. #define schkdd FPT_schkdd
  99. #define scini FPT_scini
  100. #define sciso FPT_sciso
  101. #define scmachid FPT_scmachid
  102. #define scsavdi FPT_scsavdi
  103. #define scsel FPT_scsel
  104. #define scsell FPT_scsell
  105. #define scsendi FPT_scsendi
  106. #define scvalq FPT_scvalq
  107. #define scwirod FPT_scwirod
  108. #define scwiros FPT_scwiros
  109. #define scwtsel FPT_scwtsel
  110. #define scxferc FPT_scxferc
  111. #define sdecm FPT_sdecm
  112. #define sfm FPT_sfm
  113. #define shandem FPT_shandem
  114. #define sinits FPT_sinits
  115. #define sisyncn FPT_sisyncn
  116. #define sisyncr FPT_sisyncr
  117. #define siwidn FPT_siwidn
  118. #define siwidr FPT_siwidr
  119. #define sres FPT_sres
  120. #define sresb FPT_sresb
  121. #define ssel FPT_ssel
  122. #define ssenss FPT_ssenss
  123. #define sssyncv FPT_sssyncv
  124. #define stsyncn FPT_stsyncn
  125. #define stwidn FPT_stwidn
  126. #define sxfrp FPT_sxfrp
  127. #define utilEERead FPT_utilEERead
  128. #define utilEEReadOrg FPT_utilEEReadOrg
  129. #define utilEESendCmdAddr FPT_utilEESendCmdAddr
  130. #define utilEEWrite FPT_utilEEWrite
  131. #define utilEEWriteOnOff FPT_utilEEWriteOnOff
  132. #define utilUpdateResidual FPT_utilUpdateResidual
  133. /*----------------------------------------------------------------------
  134. *
  135. *
  136. * Copyright 1995-1996 by Mylex Corporation. All Rights Reserved
  137. *
  138. * This file is available under both the GNU General Public License
  139. * and a BSD-style copyright; see LICENSE.FlashPoint for details.
  140. *
  141. * $Workfile: globals.h $
  142. *
  143. * Description: Common shared global defines.
  144. *
  145. * $Date: 1996/09/04 01:26:13 $
  146. *
  147. * $Revision: 1.11 $
  148. *
  149. *----------------------------------------------------------------------*/
  150. #ifndef __GLOBALS_H__
  151. #define __GLOBALS_H__
  152. #define _UCB_MGR_ 1
  153. #define _SCCB_MGR_ 2
  154. /*#include <osflags.h>*/
  155. #define MAX_CDBLEN 12
  156. #define SCAM_LEV_2 1
  157. #define CRCMASK 0xA001
  158. /* In your osflags.h file, please ENSURE that only ONE OS FLAG
  159. is on at a time !!! Also, please make sure you turn set the
  160. variable FW_TYPE to either _UCB_MGR_ or _SCCB_MGR_ !!! */
  161. #if defined(DOS) || defined(WIN95_16) || defined(OS2) || defined(OTHER_16)
  162. #define COMPILER_16_BIT 1
  163. #elif defined(NETWARE) || defined(NT) || defined(WIN95_32) || defined(UNIX) || defined(OTHER_32) || defined(SOLARIS_REAL_MODE)
  164. #define COMPILER_32_BIT 1
  165. #endif
  166. #define BL_VENDOR_ID 0x104B
  167. #define FP_DEVICE_ID 0x8130
  168. #define MM_DEVICE_ID 0x1040
  169. #ifndef FALSE
  170. #define FALSE 0
  171. #endif
  172. #ifndef TRUE
  173. #define TRUE (!(FALSE))
  174. #endif
  175. #ifndef NULL
  176. #define NULL 0
  177. #endif
  178. #define FAILURE 0xFFFFFFFFL
  179. typedef unsigned char UCHAR;
  180. typedef unsigned short USHORT;
  181. typedef unsigned int UINT;
  182. typedef unsigned long ULONG;
  183. typedef unsigned char * PUCHAR;
  184. typedef unsigned short* PUSHORT;
  185. typedef unsigned long * PULONG;
  186. typedef void * PVOID;
  187. #if defined(COMPILER_16_BIT)
  188. typedef unsigned char far * uchar_ptr;
  189. typedef unsigned short far * ushort_ptr;
  190. typedef unsigned long far * ulong_ptr;
  191. #endif /* 16_BIT_COMPILER */
  192. #if defined(COMPILER_32_BIT)
  193. typedef unsigned char * uchar_ptr;
  194. typedef unsigned short * ushort_ptr;
  195. typedef unsigned long * ulong_ptr;
  196. #endif /* 32_BIT_COMPILER */
  197. /* NEW TYPE DEFINITIONS (shared with Mylex North)
  198. ** Use following type defines to avoid confusion in 16 and 32-bit
  199. ** environments. Avoid using 'int' as it denotes 16 bits in 16-bit
  200. ** environment and 32 in 32-bit environments.
  201. */
  202. #define s08bits char
  203. #define s16bits short
  204. #define s32bits long
  205. #define u08bits unsigned s08bits
  206. #define u16bits unsigned s16bits
  207. #define u32bits unsigned s32bits
  208. #if defined(COMPILER_16_BIT)
  209. typedef u08bits far * pu08bits;
  210. typedef u16bits far * pu16bits;
  211. typedef u32bits far * pu32bits;
  212. #endif /* COMPILER_16_BIT */
  213. #if defined(COMPILER_32_BIT)
  214. typedef u08bits * pu08bits;
  215. typedef u16bits * pu16bits;
  216. typedef u32bits * pu32bits;
  217. #endif /* COMPILER_32_BIT */
  218. #define BIT(x) ((UCHAR)(1<<(x))) /* single-bit mask in bit position x */
  219. #define BITW(x) ((USHORT)(1<<(x))) /* single-bit mask in bit position x */
  220. #if defined(DOS)
  221. /*#include <dos.h>*/
  222. #undef inportb /* undefine for Borland Lib */
  223. #undef inport /* they may have define I/O function in LIB */
  224. #undef outportb
  225. #undef outport
  226. #define OS_InPortByte(ioport) inportb(ioport)
  227. #define OS_InPortWord(ioport) inport(ioport)
  228. #define OS_InPortLong(ioport) inportq(ioport, val)
  229. #define OS_OutPortByte(ioport, val) outportb(ioport, val)
  230. #define OS_OutPortWord(ioport, val) outport(ioport, val)
  231. #define OS_OutPortLong(ioport) outportq(ioport, val)
  232. #endif /* DOS */
  233. #if defined(NETWARE) || defined(OTHER_32) || defined(OTHER_16)
  234. extern u08bits OS_InPortByte(u32bits ioport);
  235. extern u16bits OS_InPortWord(u32bits ioport);
  236. extern u32bits OS_InPortLong(u32bits ioport);
  237. extern OS_InPortByteBuffer(u32bits ioport, pu08bits buffer, u32bits count);
  238. extern OS_InPortWordBuffer(u32bits ioport, pu16bits buffer, u32bits count);
  239. extern OS_OutPortByte(u32bits ioport, u08bits val);
  240. extern OS_OutPortWord(u32bits ioport, u16bits val);
  241. extern OS_OutPortLong(u32bits ioport, u32bits val);
  242. extern OS_OutPortByteBuffer(u32bits ioport, pu08bits buffer, u32bits count);
  243. extern OS_OutPortWordBuffer(u32bits ioport, pu16bits buffer, u32bits count);
  244. #endif /* NETWARE || OTHER_32 || OTHER_16 */
  245. #if defined (NT) || defined(WIN95_32) || defined(WIN95_16)
  246. #if defined(NT)
  247. extern __declspec(dllimport) u08bits ScsiPortReadPortUchar(pu08bits ioport);
  248. extern __declspec(dllimport) u16bits ScsiPortReadPortUshort(pu16bits ioport);
  249. extern __declspec(dllimport) u32bits ScsiPortReadPortUlong(pu32bits ioport);
  250. extern __declspec(dllimport) void ScsiPortWritePortUchar(pu08bits ioport, u08bits val);
  251. extern __declspec(dllimport) void ScsiPortWritePortUshort(pu16bits port, u16bits val);
  252. extern __declspec(dllimport) void ScsiPortWritePortUlong(pu32bits port, u32bits val);
  253. #else
  254. extern u08bits ScsiPortReadPortUchar(pu08bits ioport);
  255. extern u16bits ScsiPortReadPortUshort(pu16bits ioport);
  256. extern u32bits ScsiPortReadPortUlong(pu32bits ioport);
  257. extern void ScsiPortWritePortUchar(pu08bits ioport, u08bits val);
  258. extern void ScsiPortWritePortUshort(pu16bits port, u16bits val);
  259. extern void ScsiPortWritePortUlong(pu32bits port, u32bits val);
  260. #endif
  261. #define OS_InPortByte(ioport) ScsiPortReadPortUchar((pu08bits) ioport)
  262. #define OS_InPortWord(ioport) ScsiPortReadPortUshort((pu16bits) ioport)
  263. #define OS_InPortLong(ioport) ScsiPortReadPortUlong((pu32bits) ioport)
  264. #define OS_OutPortByte(ioport, val) ScsiPortWritePortUchar((pu08bits) ioport, (u08bits) val)
  265. #define OS_OutPortWord(ioport, val) ScsiPortWritePortUshort((pu16bits) ioport, (u16bits) val)
  266. #define OS_OutPortLong(ioport, val) ScsiPortWritePortUlong((pu32bits) ioport, (u32bits) val)
  267. #define OS_OutPortByteBuffer(ioport, buffer, count) \
  268. ScsiPortWritePortBufferUchar((pu08bits)&port, (pu08bits) buffer, (u32bits) count)
  269. #define OS_OutPortWordBuffer(ioport, buffer, count) \
  270. ScsiPortWritePortBufferUshort((pu16bits)&port, (pu16bits) buffer, (u32bits) count)
  271. #define OS_Lock(x)
  272. #define OS_UnLock(x)
  273. #endif /* NT || WIN95_32 || WIN95_16 */
  274. #if defined (UNIX) && !defined(OS_InPortByte)
  275. #define OS_InPortByte(ioport) inb((u16bits)ioport)
  276. #define OS_InPortWord(ioport) inw((u16bits)ioport)
  277. #define OS_InPortLong(ioport) inl((u16bits)ioport)
  278. #define OS_OutPortByte(ioport,val) outb((u16bits)ioport, (u08bits)val)
  279. #define OS_OutPortWord(ioport,val) outw((u16bits)ioport, (u16bits)val)
  280. #define OS_OutPortLong(ioport,val) outl((u16bits)ioport, (u32bits)val)
  281. #define OS_Lock(x)
  282. #define OS_UnLock(x)
  283. #endif /* UNIX */
  284. #if defined(OS2)
  285. extern u08bits inb(u32bits ioport);
  286. extern u16bits inw(u32bits ioport);
  287. extern void outb(u32bits ioport, u08bits val);
  288. extern void outw(u32bits ioport, u16bits val);
  289. #define OS_InPortByte(ioport) inb(ioport)
  290. #define OS_InPortWord(ioport) inw(ioport)
  291. #define OS_OutPortByte(ioport, val) outb(ioport, val)
  292. #define OS_OutPortWord(ioport, val) outw(ioport, val)
  293. extern u32bits OS_InPortLong(u32bits ioport);
  294. extern void OS_OutPortLong(u32bits ioport, u32bits val);
  295. #define OS_Lock(x)
  296. #define OS_UnLock(x)
  297. #endif /* OS2 */
  298. #if defined(SOLARIS_REAL_MODE)
  299. extern unsigned char inb(unsigned long ioport);
  300. extern unsigned short inw(unsigned long ioport);
  301. #define OS_InPortByte(ioport) inb(ioport)
  302. #define OS_InPortWord(ioport) inw(ioport)
  303. extern void OS_OutPortByte(unsigned long ioport, unsigned char val);
  304. extern void OS_OutPortWord(unsigned long ioport, unsigned short val);
  305. extern unsigned long OS_InPortLong(unsigned long ioport);
  306. extern void OS_OutPortLong(unsigned long ioport, unsigned long val);
  307. #define OS_Lock(x)
  308. #define OS_UnLock(x)
  309. #endif /* SOLARIS_REAL_MODE */
  310. #endif /* __GLOBALS_H__ */
  311. /*----------------------------------------------------------------------
  312. *
  313. *
  314. * Copyright 1995-1996 by Mylex Corporation. All Rights Reserved
  315. *
  316. * This file is available under both the GNU General Public License
  317. * and a BSD-style copyright; see LICENSE.FlashPoint for details.
  318. *
  319. * $Workfile: sccbmgr.h $
  320. *
  321. * Description: Common shared SCCB Interface defines and SCCB
  322. * Manager specifics defines.
  323. *
  324. * $Date: 1996/10/24 23:09:33 $
  325. *
  326. * $Revision: 1.14 $
  327. *
  328. *----------------------------------------------------------------------*/
  329. #ifndef __SCCB_H__
  330. #define __SCCB_H__
  331. /*#include <osflags.h>*/
  332. /*#include <globals.h>*/
  333. #if defined(BUGBUG)
  334. #define debug_size 32
  335. #endif
  336. #if defined(DOS)
  337. typedef struct _SCCB near *PSCCB;
  338. #if (FW_TYPE == _SCCB_MGR_)
  339. typedef void (*CALL_BK_FN)(PSCCB);
  340. #endif
  341. #elif defined(OS2)
  342. typedef struct _SCCB far *PSCCB;
  343. #if (FW_TYPE == _SCCB_MGR_)
  344. typedef void (far *CALL_BK_FN)(PSCCB);
  345. #endif
  346. #else
  347. typedef struct _SCCB *PSCCB;
  348. #if (FW_TYPE == _SCCB_MGR_)
  349. typedef void (*CALL_BK_FN)(PSCCB);
  350. #endif
  351. #endif
  352. typedef struct SCCBMgr_info {
  353. ULONG si_baseaddr;
  354. UCHAR si_present;
  355. UCHAR si_intvect;
  356. UCHAR si_id;
  357. UCHAR si_lun;
  358. USHORT si_fw_revision;
  359. USHORT si_per_targ_init_sync;
  360. USHORT si_per_targ_fast_nego;
  361. USHORT si_per_targ_ultra_nego;
  362. USHORT si_per_targ_no_disc;
  363. USHORT si_per_targ_wide_nego;
  364. USHORT si_flags;
  365. UCHAR si_card_family;
  366. UCHAR si_bustype;
  367. UCHAR si_card_model[3];
  368. UCHAR si_relative_cardnum;
  369. UCHAR si_reserved[4];
  370. ULONG si_OS_reserved;
  371. UCHAR si_XlatInfo[4];
  372. ULONG si_reserved2[5];
  373. ULONG si_secondary_range;
  374. } SCCBMGR_INFO;
  375. #if defined(DOS)
  376. typedef SCCBMGR_INFO * PSCCBMGR_INFO;
  377. #else
  378. #if defined (COMPILER_16_BIT)
  379. typedef SCCBMGR_INFO far * PSCCBMGR_INFO;
  380. #else
  381. typedef SCCBMGR_INFO * PSCCBMGR_INFO;
  382. #endif
  383. #endif // defined(DOS)
  384. #if (FW_TYPE==_SCCB_MGR_)
  385. #define SCSI_PARITY_ENA 0x0001
  386. #define LOW_BYTE_TERM 0x0010
  387. #define HIGH_BYTE_TERM 0x0020
  388. #define BUSTYPE_PCI 0x3
  389. #endif
  390. #define SUPPORT_16TAR_32LUN 0x0002
  391. #define SOFT_RESET 0x0004
  392. #define EXTENDED_TRANSLATION 0x0008
  393. #define POST_ALL_UNDERRRUNS 0x0040
  394. #define FLAG_SCAM_ENABLED 0x0080
  395. #define FLAG_SCAM_LEVEL2 0x0100
  396. #define HARPOON_FAMILY 0x02
  397. #define ISA_BUS_CARD 0x01
  398. #define EISA_BUS_CARD 0x02
  399. #define PCI_BUS_CARD 0x03
  400. #define VESA_BUS_CARD 0x04
  401. /* SCCB struc used for both SCCB and UCB manager compiles!
  402. * The UCB Manager treats the SCCB as it's 'native hardware structure'
  403. */
  404. #pragma pack(1)
  405. typedef struct _SCCB {
  406. UCHAR OperationCode;
  407. UCHAR ControlByte;
  408. UCHAR CdbLength;
  409. UCHAR RequestSenseLength;
  410. ULONG DataLength;
  411. ULONG DataPointer;
  412. UCHAR CcbRes[2];
  413. UCHAR HostStatus;
  414. UCHAR TargetStatus;
  415. UCHAR TargID;
  416. UCHAR Lun;
  417. UCHAR Cdb[12];
  418. UCHAR CcbRes1;
  419. UCHAR Reserved1;
  420. ULONG Reserved2;
  421. ULONG SensePointer;
  422. CALL_BK_FN SccbCallback; /* VOID (*SccbCallback)(); */
  423. ULONG SccbIOPort; /* Identifies board base port */
  424. UCHAR SccbStatus;
  425. UCHAR SCCBRes2;
  426. USHORT SccbOSFlags;
  427. ULONG Sccb_XferCnt; /* actual transfer count */
  428. ULONG Sccb_ATC;
  429. ULONG SccbVirtDataPtr; /* virtual addr for OS/2 */
  430. ULONG Sccb_res1;
  431. USHORT Sccb_MGRFlags;
  432. USHORT Sccb_sgseg;
  433. UCHAR Sccb_scsimsg; /* identify msg for selection */
  434. UCHAR Sccb_tag;
  435. UCHAR Sccb_scsistat;
  436. UCHAR Sccb_idmsg; /* image of last msg in */
  437. PSCCB Sccb_forwardlink;
  438. PSCCB Sccb_backlink;
  439. ULONG Sccb_savedATC;
  440. UCHAR Save_Cdb[6];
  441. UCHAR Save_CdbLen;
  442. UCHAR Sccb_XferState;
  443. ULONG Sccb_SGoffset;
  444. #if (FW_TYPE == _UCB_MGR_)
  445. PUCB Sccb_ucb_ptr;
  446. #endif
  447. } SCCB;
  448. #define SCCB_SIZE sizeof(SCCB)
  449. #pragma pack()
  450. #define SCSI_INITIATOR_COMMAND 0x00
  451. #define TARGET_MODE_COMMAND 0x01
  452. #define SCATTER_GATHER_COMMAND 0x02
  453. #define RESIDUAL_COMMAND 0x03
  454. #define RESIDUAL_SG_COMMAND 0x04
  455. #define RESET_COMMAND 0x81
  456. #define F_USE_CMD_Q 0x20 /*Inidcates TAGGED command. */
  457. #define TAG_TYPE_MASK 0xC0 /*Type of tag msg to send. */
  458. #define TAG_Q_MASK 0xE0
  459. #define SCCB_DATA_XFER_OUT 0x10 /* Write */
  460. #define SCCB_DATA_XFER_IN 0x08 /* Read */
  461. #define FOURTEEN_BYTES 0x00 /* Request Sense Buffer size */
  462. #define NO_AUTO_REQUEST_SENSE 0x01 /* No Request Sense Buffer */
  463. #define BUS_FREE_ST 0
  464. #define SELECT_ST 1
  465. #define SELECT_BDR_ST 2 /* Select w\ Bus Device Reset */
  466. #define SELECT_SN_ST 3 /* Select w\ Sync Nego */
  467. #define SELECT_WN_ST 4 /* Select w\ Wide Data Nego */
  468. #define SELECT_Q_ST 5 /* Select w\ Tagged Q'ing */
  469. #define COMMAND_ST 6
  470. #define DATA_OUT_ST 7
  471. #define DATA_IN_ST 8
  472. #define DISCONNECT_ST 9
  473. #define STATUS_ST 10
  474. #define ABORT_ST 11
  475. #define MESSAGE_ST 12
  476. #define F_HOST_XFER_DIR 0x01
  477. #define F_ALL_XFERRED 0x02
  478. #define F_SG_XFER 0x04
  479. #define F_AUTO_SENSE 0x08
  480. #define F_ODD_BALL_CNT 0x10
  481. #define F_NO_DATA_YET 0x80
  482. #define F_STATUSLOADED 0x01
  483. #define F_MSGLOADED 0x02
  484. #define F_DEV_SELECTED 0x04
  485. #define SCCB_COMPLETE 0x00 /* SCCB completed without error */
  486. #define SCCB_DATA_UNDER_RUN 0x0C
  487. #define SCCB_SELECTION_TIMEOUT 0x11 /* Set SCSI selection timed out */
  488. #define SCCB_DATA_OVER_RUN 0x12
  489. #define SCCB_UNEXPECTED_BUS_FREE 0x13 /* Target dropped SCSI BSY */
  490. #define SCCB_PHASE_SEQUENCE_FAIL 0x14 /* Target bus phase sequence failure */
  491. #define SCCB_INVALID_OP_CODE 0x16 /* SCCB invalid operation code */
  492. #define SCCB_INVALID_SCCB 0x1A /* Invalid SCCB - bad parameter */
  493. #define SCCB_GROSS_FW_ERR 0x27 /* Major problem! */
  494. #define SCCB_BM_ERR 0x30 /* BusMaster error. */
  495. #define SCCB_PARITY_ERR 0x34 /* SCSI parity error */
  496. #if (FW_TYPE==_UCB_MGR_)
  497. #define HBA_AUTO_SENSE_FAIL 0x1B
  498. #define HBA_TQ_REJECTED 0x1C
  499. #define HBA_UNSUPPORTED_MSG 0x1D
  500. #define HBA_HW_ERROR 0x20
  501. #define HBA_ATN_NOT_RESPONDED 0x21
  502. #define HBA_SCSI_RESET_BY_ADAPTER 0x22
  503. #define HBA_SCSI_RESET_BY_TARGET 0x23
  504. #define HBA_WRONG_CONNECTION 0x24
  505. #define HBA_BUS_DEVICE_RESET 0x25
  506. #define HBA_ABORT_QUEUE 0x26
  507. #else // these are not defined in BUDI/UCB
  508. #define SCCB_INVALID_DIRECTION 0x18 /* Invalid target direction */
  509. #define SCCB_DUPLICATE_SCCB 0x19 /* Duplicate SCCB */
  510. #define SCCB_SCSI_RST 0x35 /* SCSI RESET detected. */
  511. #endif // (FW_TYPE==_UCB_MGR_)
  512. #define SCCB_IN_PROCESS 0x00
  513. #define SCCB_SUCCESS 0x01
  514. #define SCCB_ABORT 0x02
  515. #define SCCB_NOT_FOUND 0x03
  516. #define SCCB_ERROR 0x04
  517. #define SCCB_INVALID 0x05
  518. #define SCCB_SIZE sizeof(SCCB)
  519. #if (FW_TYPE == _UCB_MGR_)
  520. void SccbMgr_start_sccb(CARD_HANDLE pCurrCard, PUCB p_ucb);
  521. s32bits SccbMgr_abort_sccb(CARD_HANDLE pCurrCard, PUCB p_ucb);
  522. u08bits SccbMgr_my_int(CARD_HANDLE pCurrCard);
  523. s32bits SccbMgr_isr(CARD_HANDLE pCurrCard);
  524. void SccbMgr_scsi_reset(CARD_HANDLE pCurrCard);
  525. void SccbMgr_timer_expired(CARD_HANDLE pCurrCard);
  526. void SccbMgr_unload_card(CARD_HANDLE pCurrCard);
  527. void SccbMgr_restore_foreign_state(CARD_HANDLE pCurrCard);
  528. void SccbMgr_restore_native_state(CARD_HANDLE pCurrCard);
  529. void SccbMgr_save_foreign_state(PADAPTER_INFO pAdapterInfo);
  530. #endif
  531. #if (FW_TYPE == _SCCB_MGR_)
  532. #if defined (DOS)
  533. int SccbMgr_sense_adapter(PSCCBMGR_INFO pCardInfo);
  534. USHORT SccbMgr_config_adapter(PSCCBMGR_INFO pCardInfo);
  535. void SccbMgr_start_sccb(USHORT pCurrCard, PSCCB p_SCCB);
  536. int SccbMgr_abort_sccb(USHORT pCurrCard, PSCCB p_SCCB);
  537. UCHAR SccbMgr_my_int(USHORT pCurrCard);
  538. int SccbMgr_isr(USHORT pCurrCard);
  539. void SccbMgr_scsi_reset(USHORT pCurrCard);
  540. void SccbMgr_timer_expired(USHORT pCurrCard);
  541. USHORT SccbMgr_status(USHORT pCurrCard);
  542. void SccbMgr_unload_card(USHORT pCurrCard);
  543. #else //non-DOS
  544. int SccbMgr_sense_adapter(PSCCBMGR_INFO pCardInfo);
  545. ULONG SccbMgr_config_adapter(PSCCBMGR_INFO pCardInfo);
  546. void SccbMgr_start_sccb(ULONG pCurrCard, PSCCB p_SCCB);
  547. int SccbMgr_abort_sccb(ULONG pCurrCard, PSCCB p_SCCB);
  548. UCHAR SccbMgr_my_int(ULONG pCurrCard);
  549. int SccbMgr_isr(ULONG pCurrCard);
  550. void SccbMgr_scsi_reset(ULONG pCurrCard);
  551. void SccbMgr_enable_int(ULONG pCurrCard);
  552. void SccbMgr_disable_int(ULONG pCurrCard);
  553. void SccbMgr_timer_expired(ULONG pCurrCard);
  554. void SccbMgr_unload_card(ULONG pCurrCard);
  555. #endif
  556. #endif // (FW_TYPE == _SCCB_MGR_)
  557. #endif /* __SCCB_H__ */
  558. /*----------------------------------------------------------------------
  559. *
  560. *
  561. * Copyright 1995-1996 by Mylex Corporation. All Rights Reserved
  562. *
  563. * This file is available under both the GNU General Public License
  564. * and a BSD-style copyright; see LICENSE.FlashPoint for details.
  565. *
  566. * $Workfile: blx30.h $
  567. *
  568. * Description: This module contains SCCB/UCB Manager implementation
  569. * specific stuff.
  570. *
  571. * $Date: 1996/11/13 18:34:22 $
  572. *
  573. * $Revision: 1.10 $
  574. *
  575. *----------------------------------------------------------------------*/
  576. #ifndef __blx30_H__
  577. #define __blx30_H__
  578. /*#include <globals.h>*/
  579. #define ORION_FW_REV 3110
  580. #define HARP_REVD 1
  581. #if defined(DOS)
  582. #define QUEUE_DEPTH 8+1 /*1 for Normal disconnect 0 for Q'ing. */
  583. #else
  584. #define QUEUE_DEPTH 254+1 /*1 for Normal disconnect 32 for Q'ing. */
  585. #endif // defined(DOS)
  586. #define MAX_MB_CARDS 4 /* Max. no of cards suppoerted on Mother Board */
  587. #define WIDE_SCSI 1
  588. #if defined(WIDE_SCSI)
  589. #if defined(DOS)
  590. #define MAX_SCSI_TAR 16
  591. #define MAX_LUN 8
  592. #define LUN_MASK 0x07
  593. #else
  594. #define MAX_SCSI_TAR 16
  595. #define MAX_LUN 32
  596. #define LUN_MASK 0x1f
  597. #endif
  598. #else
  599. #define MAX_SCSI_TAR 8
  600. #define MAX_LUN 8
  601. #define LUN_MASK 0x07
  602. #endif
  603. #if defined(HARP_REVA)
  604. #define SG_BUF_CNT 15 /*Number of prefetched elements. */
  605. #else
  606. #define SG_BUF_CNT 16 /*Number of prefetched elements. */
  607. #endif
  608. #define SG_ELEMENT_SIZE 8 /*Eight byte per element. */
  609. #define SG_LOCAL_MASK 0x00000000L
  610. #define SG_ELEMENT_MASK 0xFFFFFFFFL
  611. #if (FW_TYPE == _UCB_MGR_)
  612. #define OPC_DECODE_NORMAL 0x0f7f
  613. #endif // _UCB_MGR_
  614. #if defined(DOS)
  615. /*#include <dos.h>*/
  616. #define RD_HARPOON(ioport) (OS_InPortByte(ioport))
  617. #define RDW_HARPOON(ioport) (OS_InPortWord(ioport))
  618. #define WR_HARPOON(ioport,val) (OS_OutPortByte(ioport,val))
  619. #define WRW_HARPOON(ioport,val) (OS_OutPortWord(ioport,val))
  620. #define RD_HARP32(port,offset,data) asm{db 66h; \
  621. push ax; \
  622. mov dx,port; \
  623. add dx, offset; \
  624. db 66h; \
  625. in ax,dx; \
  626. db 66h; \
  627. mov word ptr data,ax;\
  628. db 66h; \
  629. pop ax}
  630. #define WR_HARP32(port,offset,data) asm{db 66h; \
  631. push ax; \
  632. mov dx,port; \
  633. add dx, offset; \
  634. db 66h; \
  635. mov ax,word ptr data;\
  636. db 66h; \
  637. out dx,ax; \
  638. db 66h; \
  639. pop ax}
  640. #endif /* DOS */
  641. #if defined(NETWARE) || defined(OTHER_32) || defined(OTHER_16)
  642. #define RD_HARPOON(ioport) OS_InPortByte((unsigned long)ioport)
  643. #define RDW_HARPOON(ioport) OS_InPortWord((unsigned long)ioport)
  644. #define RD_HARP32(ioport,offset,data) (data = OS_InPortLong(ioport + offset))
  645. #define WR_HARPOON(ioport,val) OS_OutPortByte((ULONG)ioport,(UCHAR) val)
  646. #define WRW_HARPOON(ioport,val) OS_OutPortWord((ULONG)ioport,(USHORT)val)
  647. #define WR_HARP32(ioport,offset,data) OS_OutPortLong((ioport + offset), data)
  648. #endif /* NETWARE || OTHER_32 || OTHER_16 */
  649. #if defined(NT) || defined(WIN95_32) || defined(WIN95_16)
  650. #define RD_HARPOON(ioport) OS_InPortByte((ULONG)ioport)
  651. #define RDW_HARPOON(ioport) OS_InPortWord((ULONG)ioport)
  652. #define RD_HARP32(ioport,offset,data) (data = OS_InPortLong((ULONG)(ioport + offset)))
  653. #define WR_HARPOON(ioport,val) OS_OutPortByte((ULONG)ioport,(UCHAR) val)
  654. #define WRW_HARPOON(ioport,val) OS_OutPortWord((ULONG)ioport,(USHORT)val)
  655. #define WR_HARP32(ioport,offset,data) OS_OutPortLong((ULONG)(ioport + offset), data)
  656. #endif /* NT || WIN95_32 || WIN95_16 */
  657. #if defined (UNIX)
  658. #define RD_HARPOON(ioport) OS_InPortByte((u32bits)ioport)
  659. #define RDW_HARPOON(ioport) OS_InPortWord((u32bits)ioport)
  660. #define RD_HARP32(ioport,offset,data) (data = OS_InPortLong((u32bits)(ioport + offset)))
  661. #define WR_HARPOON(ioport,val) OS_OutPortByte((u32bits)ioport,(u08bits) val)
  662. #define WRW_HARPOON(ioport,val) OS_OutPortWord((u32bits)ioport,(u16bits)val)
  663. #define WR_HARP32(ioport,offset,data) OS_OutPortLong((u32bits)(ioport + offset), data)
  664. #endif /* UNIX */
  665. #if defined(OS2)
  666. #define RD_HARPOON(ioport) OS_InPortByte((unsigned long)ioport)
  667. #define RDW_HARPOON(ioport) OS_InPortWord((unsigned long)ioport)
  668. #define RD_HARP32(ioport,offset,data) (data = OS_InPortLong((ULONG)(ioport + offset)))
  669. #define WR_HARPOON(ioport,val) OS_OutPortByte((ULONG)ioport,(UCHAR) val)
  670. #define WRW_HARPOON(ioport,val) OS_OutPortWord((ULONG)ioport,(USHORT)val)
  671. #define WR_HARP32(ioport,offset,data) OS_OutPortLong(((ULONG)(ioport + offset)), data)
  672. #endif /* OS2 */
  673. #if defined(SOLARIS_REAL_MODE)
  674. #define RD_HARPOON(ioport) OS_InPortByte((unsigned long)ioport)
  675. #define RDW_HARPOON(ioport) OS_InPortWord((unsigned long)ioport)
  676. #define RD_HARP32(ioport,offset,data) (data = OS_InPortLong((ULONG)(ioport + offset)))
  677. #define WR_HARPOON(ioport,val) OS_OutPortByte((ULONG)ioport,(UCHAR) val)
  678. #define WRW_HARPOON(ioport,val) OS_OutPortWord((ULONG)ioport,(USHORT)val)
  679. #define WR_HARP32(ioport,offset,data) OS_OutPortLong((ULONG)(ioport + offset), (ULONG)data)
  680. #endif /* SOLARIS_REAL_MODE */
  681. #endif /* __BLX30_H__ */
  682. /*----------------------------------------------------------------------
  683. *
  684. *
  685. * Copyright 1995-1996 by Mylex Corporation. All Rights Reserved
  686. *
  687. * This file is available under both the GNU General Public License
  688. * and a BSD-style copyright; see LICENSE.FlashPoint for details.
  689. *
  690. * $Workfile: target.h $
  691. *
  692. * Description: Definitions for Target related structures
  693. *
  694. * $Date: 1996/12/11 22:06:20 $
  695. *
  696. * $Revision: 1.9 $
  697. *
  698. *----------------------------------------------------------------------*/
  699. #ifndef __TARGET__
  700. #define __TARGET__
  701. /*#include <globals.h>*/
  702. /*#include <blx30.h>*/
  703. #define TAR_SYNC_MASK (BIT(7)+BIT(6))
  704. #define SYNC_UNKNOWN 0x00
  705. #define SYNC_TRYING BIT(6)
  706. #define SYNC_SUPPORTED (BIT(7)+BIT(6))
  707. #define TAR_WIDE_MASK (BIT(5)+BIT(4))
  708. #define WIDE_DISABLED 0x00
  709. #define WIDE_ENABLED BIT(4)
  710. #define WIDE_NEGOCIATED BIT(5)
  711. #define TAR_TAG_Q_MASK (BIT(3)+BIT(2))
  712. #define TAG_Q_UNKNOWN 0x00
  713. #define TAG_Q_TRYING BIT(2)
  714. #define TAG_Q_REJECT BIT(3)
  715. #define TAG_Q_SUPPORTED (BIT(3)+BIT(2))
  716. #define TAR_ALLOW_DISC BIT(0)
  717. #define EE_SYNC_MASK (BIT(0)+BIT(1))
  718. #define EE_SYNC_ASYNC 0x00
  719. #define EE_SYNC_5MB BIT(0)
  720. #define EE_SYNC_10MB BIT(1)
  721. #define EE_SYNC_20MB (BIT(0)+BIT(1))
  722. #define EE_ALLOW_DISC BIT(6)
  723. #define EE_WIDE_SCSI BIT(7)
  724. #if defined(DOS)
  725. typedef struct SCCBMgr_tar_info near *PSCCBMgr_tar_info;
  726. #elif defined(OS2)
  727. typedef struct SCCBMgr_tar_info far *PSCCBMgr_tar_info;
  728. #else
  729. typedef struct SCCBMgr_tar_info *PSCCBMgr_tar_info;
  730. #endif
  731. typedef struct SCCBMgr_tar_info {
  732. PSCCB TarSelQ_Head;
  733. PSCCB TarSelQ_Tail;
  734. UCHAR TarLUN_CA; /*Contingent Allgiance */
  735. UCHAR TarTagQ_Cnt;
  736. UCHAR TarSelQ_Cnt;
  737. UCHAR TarStatus;
  738. UCHAR TarEEValue;
  739. UCHAR TarSyncCtrl;
  740. UCHAR TarReserved[2]; /* for alignment */
  741. UCHAR LunDiscQ_Idx[MAX_LUN];
  742. UCHAR TarLUNBusy[MAX_LUN];
  743. } SCCBMGR_TAR_INFO;
  744. typedef struct NVRAMInfo {
  745. UCHAR niModel; /* Model No. of card */
  746. UCHAR niCardNo; /* Card no. */
  747. #if defined(DOS)
  748. USHORT niBaseAddr; /* Port Address of card */
  749. #else
  750. ULONG niBaseAddr; /* Port Address of card */
  751. #endif
  752. UCHAR niSysConf; /* Adapter Configuration byte - Byte 16 of eeprom map */
  753. UCHAR niScsiConf; /* SCSI Configuration byte - Byte 17 of eeprom map */
  754. UCHAR niScamConf; /* SCAM Configuration byte - Byte 20 of eeprom map */
  755. UCHAR niAdapId; /* Host Adapter ID - Byte 24 of eerpom map */
  756. UCHAR niSyncTbl[MAX_SCSI_TAR / 2]; /* Sync/Wide byte of targets */
  757. UCHAR niScamTbl[MAX_SCSI_TAR][4]; /* Compressed Scam name string of Targets */
  758. }NVRAMINFO;
  759. #if defined(DOS)
  760. typedef NVRAMINFO near *PNVRamInfo;
  761. #elif defined (OS2)
  762. typedef NVRAMINFO far *PNVRamInfo;
  763. #else
  764. typedef NVRAMINFO *PNVRamInfo;
  765. #endif
  766. #define MODEL_LT 1
  767. #define MODEL_DL 2
  768. #define MODEL_LW 3
  769. #define MODEL_DW 4
  770. typedef struct SCCBcard {
  771. PSCCB currentSCCB;
  772. #if (FW_TYPE==_SCCB_MGR_)
  773. PSCCBMGR_INFO cardInfo;
  774. #else
  775. PADAPTER_INFO cardInfo;
  776. #endif
  777. #if defined(DOS)
  778. USHORT ioPort;
  779. #else
  780. ULONG ioPort;
  781. #endif
  782. USHORT cmdCounter;
  783. UCHAR discQCount;
  784. UCHAR tagQ_Lst;
  785. UCHAR cardIndex;
  786. UCHAR scanIndex;
  787. UCHAR globalFlags;
  788. UCHAR ourId;
  789. PNVRamInfo pNvRamInfo;
  790. PSCCB discQ_Tbl[QUEUE_DEPTH];
  791. }SCCBCARD;
  792. #if defined(DOS)
  793. typedef struct SCCBcard near *PSCCBcard;
  794. #elif defined (OS2)
  795. typedef struct SCCBcard far *PSCCBcard;
  796. #else
  797. typedef struct SCCBcard *PSCCBcard;
  798. #endif
  799. #define F_TAG_STARTED 0x01
  800. #define F_CONLUN_IO 0x02
  801. #define F_DO_RENEGO 0x04
  802. #define F_NO_FILTER 0x08
  803. #define F_GREEN_PC 0x10
  804. #define F_HOST_XFER_ACT 0x20
  805. #define F_NEW_SCCB_CMD 0x40
  806. #define F_UPDATE_EEPROM 0x80
  807. #define ID_STRING_LENGTH 32
  808. #define TYPE_CODE0 0x63 /*Level2 Mstr (bits 7-6), */
  809. #define TYPE_CODE1 00 /*No ID yet */
  810. #define SLV_TYPE_CODE0 0xA3 /*Priority Bit set (bits 7-6), */
  811. #define ASSIGN_ID 0x00
  812. #define SET_P_FLAG 0x01
  813. #define CFG_CMPLT 0x03
  814. #define DOM_MSTR 0x0F
  815. #define SYNC_PTRN 0x1F
  816. #define ID_0_7 0x18
  817. #define ID_8_F 0x11
  818. #define ID_10_17 0x12
  819. #define ID_18_1F 0x0B
  820. #define MISC_CODE 0x14
  821. #define CLR_P_FLAG 0x18
  822. #define LOCATE_ON 0x12
  823. #define LOCATE_OFF 0x0B
  824. #define LVL_1_MST 0x00
  825. #define LVL_2_MST 0x40
  826. #define DOM_LVL_2 0xC0
  827. #define INIT_SELTD 0x01
  828. #define LEVEL2_TAR 0x02
  829. enum scam_id_st { ID0,ID1,ID2,ID3,ID4,ID5,ID6,ID7,ID8,ID9,ID10,ID11,ID12,
  830. ID13,ID14,ID15,ID_UNUSED,ID_UNASSIGNED,ID_ASSIGNED,LEGACY,
  831. CLR_PRIORITY,NO_ID_AVAIL };
  832. typedef struct SCCBscam_info {
  833. UCHAR id_string[ID_STRING_LENGTH];
  834. enum scam_id_st state;
  835. } SCCBSCAM_INFO, *PSCCBSCAM_INFO;
  836. #endif
  837. /*----------------------------------------------------------------------
  838. *
  839. *
  840. * Copyright 1995-1996 by Mylex Corporation. All Rights Reserved
  841. *
  842. * This file is available under both the GNU General Public License
  843. * and a BSD-style copyright; see LICENSE.FlashPoint for details.
  844. *
  845. * $Workfile: scsi2.h $
  846. *
  847. * Description: Register definitions for HARPOON ASIC.
  848. *
  849. * $Date: 1996/11/13 18:32:57 $
  850. *
  851. * $Revision: 1.4 $
  852. *
  853. *----------------------------------------------------------------------*/
  854. #ifndef __SCSI_H__
  855. #define __SCSI_H__
  856. #define SCSI_TEST_UNIT_READY 0x00
  857. #define SCSI_REZERO_UNIT 0x01
  858. #define SCSI_REQUEST_SENSE 0x03
  859. #define SCSI_FORMAT_UNIT 0x04
  860. #define SCSI_REASSIGN 0x07
  861. #define SCSI_READ 0x08
  862. #define SCSI_WRITE 0x0A
  863. #define SCSI_SEEK 0x0B
  864. #define SCSI_INQUIRY 0x12
  865. #define SCSI_MODE_SELECT 0x15
  866. #define SCSI_RESERVE_UNIT 0x16
  867. #define SCSI_RELEASE_UNIT 0x17
  868. #define SCSI_MODE_SENSE 0x1A
  869. #define SCSI_START_STOP_UNIT 0x1B
  870. #define SCSI_SEND_DIAGNOSTIC 0x1D
  871. #define SCSI_READ_CAPACITY 0x25
  872. #define SCSI_READ_EXTENDED 0x28
  873. #define SCSI_WRITE_EXTENDED 0x2A
  874. #define SCSI_SEEK_EXTENDED 0x2B
  875. #define SCSI_WRITE_AND_VERIFY 0x2E
  876. #define SCSI_VERIFY 0x2F
  877. #define SCSI_READ_DEFECT_DATA 0x37
  878. #define SCSI_WRITE_BUFFER 0x3B
  879. #define SCSI_READ_BUFFER 0x3C
  880. #define SCSI_RECV_DIAGNOSTIC 0x1C
  881. #define SCSI_READ_LONG 0x3E
  882. #define SCSI_WRITE_LONG 0x3F
  883. #define SCSI_LAST_SCSI_CMND SCSI_WRITE_LONG
  884. #define SCSI_INVALID_CMND 0xFF
  885. #define SSGOOD 0x00
  886. #define SSCHECK 0x02
  887. #define SSCOND_MET 0x04
  888. #define SSBUSY 0x08
  889. #define SSRESERVATION_CONFLICT 0x18
  890. #define SSCMD_TERM 0x22
  891. #define SSQ_FULL 0x28
  892. #define SKNO_SEN 0x00
  893. #define SKRECOV_ERR 0x01
  894. #define SKNOT_RDY 0x02
  895. #define SKMED_ERR 0x03
  896. #define SKHW_ERR 0x04
  897. #define SKILL_REQ 0x05
  898. #define SKUNIT_ATTN 0x06
  899. #define SKDATA_PROTECT 0x07
  900. #define SKBLNK_CHK 0x08
  901. #define SKCPY_ABORT 0x0A
  902. #define SKABORT_CMD 0x0B
  903. #define SKEQUAL 0x0C
  904. #define SKVOL_OVF 0x0D
  905. #define SKMIS_CMP 0x0E
  906. #define SMCMD_COMP 0x00
  907. #define SMEXT 0x01
  908. #define SMSAVE_DATA_PTR 0x02
  909. #define SMREST_DATA_PTR 0x03
  910. #define SMDISC 0x04
  911. #define SMINIT_DETEC_ERR 0x05
  912. #define SMABORT 0x06
  913. #define SMREJECT 0x07
  914. #define SMNO_OP 0x08
  915. #define SMPARITY 0x09
  916. #define SMDEV_RESET 0x0C
  917. #define SMABORT_TAG 0x0D
  918. #define SMINIT_RECOVERY 0x0F
  919. #define SMREL_RECOVERY 0x10
  920. #define SMIDENT 0x80
  921. #define DISC_PRIV 0x40
  922. #define SMSYNC 0x01
  923. #define SM10MBS 0x19 /* 100ns */
  924. #define SM5MBS 0x32 /* 200ns */
  925. #define SMOFFSET 0x0F /* Maxoffset value */
  926. #define SMWDTR 0x03
  927. #define SM8BIT 0x00
  928. #define SM16BIT 0x01
  929. #define SM32BIT 0x02
  930. #define SMIGNORWR 0x23 /* Ignore Wide Residue */
  931. #define ARBITRATION_DELAY 0x01 /* 2.4us using a 40Mhz clock */
  932. #define BUS_SETTLE_DELAY 0x01 /* 400ns */
  933. #define BUS_CLEAR_DELAY 0x01 /* 800ns */
  934. #define SPHASE_TO 0x0A /* 10 second timeout waiting for */
  935. #define SCMD_TO 0x0F /* Overall command timeout */
  936. #define SIX_BYTE_CMD 0x06
  937. #define TEN_BYTE_CMD 0x0A
  938. #define TWELVE_BYTE_CMD 0x0C
  939. #define ASYNC 0x00
  940. #define PERI25NS 0x06 /* 25/4ns to next clock for xbow. */
  941. #define SYNC10MBS 0x19
  942. #define SYNC5MBS 0x32
  943. #define MAX_OFFSET 0x0F /* Maxbyteoffset for Sync Xfers */
  944. #endif
  945. /*----------------------------------------------------------------------
  946. *
  947. *
  948. * Copyright 1995-1996 by Mylex Corporation. All Rights Reserved
  949. *
  950. * This file is available under both the GNU General Public License
  951. * and a BSD-style copyright; see LICENSE.FlashPoint for details.
  952. *
  953. * $Workfile: eeprom.h $
  954. *
  955. * Description: Definitions for EEPROM related structures
  956. *
  957. * $Date: 1996/11/13 18:28:39 $
  958. *
  959. * $Revision: 1.4 $
  960. *
  961. *----------------------------------------------------------------------*/
  962. #ifndef __EEPROM__
  963. #define __EEPROM__
  964. /*#include <globals.h>*/
  965. #define EEPROM_WD_CNT 256
  966. #define EEPROM_CHECK_SUM 0
  967. #define FW_SIGNATURE 2
  968. #define MODEL_NUMB_0 4
  969. #define MODEL_NUMB_1 5
  970. #define MODEL_NUMB_2 6
  971. #define MODEL_NUMB_3 7
  972. #define MODEL_NUMB_4 8
  973. #define MODEL_NUMB_5 9
  974. #define IO_BASE_ADDR 10
  975. #define IRQ_NUMBER 12
  976. #define PCI_INT_PIN 13
  977. #define BUS_DELAY 14 /*On time in byte 14 off delay in 15 */
  978. #define SYSTEM_CONFIG 16
  979. #define SCSI_CONFIG 17
  980. #define BIOS_CONFIG 18
  981. #define SPIN_UP_DELAY 19
  982. #define SCAM_CONFIG 20
  983. #define ADAPTER_SCSI_ID 24
  984. #define IGNORE_B_SCAN 32
  985. #define SEND_START_ENA 34
  986. #define DEVICE_ENABLE 36
  987. #define SYNC_RATE_TBL 38
  988. #define SYNC_RATE_TBL01 38
  989. #define SYNC_RATE_TBL23 40
  990. #define SYNC_RATE_TBL45 42
  991. #define SYNC_RATE_TBL67 44
  992. #define SYNC_RATE_TBL89 46
  993. #define SYNC_RATE_TBLab 48
  994. #define SYNC_RATE_TBLcd 50
  995. #define SYNC_RATE_TBLef 52
  996. #define EE_SCAMBASE 256
  997. #define DOM_MASTER (BIT(0) + BIT(1))
  998. #define SCAM_ENABLED BIT(2)
  999. #define SCAM_LEVEL2 BIT(3)
  1000. #define RENEGO_ENA BITW(10)
  1001. #define CONNIO_ENA BITW(11)
  1002. #define GREEN_PC_ENA BITW(12)
  1003. #define AUTO_RATE_00 00
  1004. #define AUTO_RATE_05 01
  1005. #define AUTO_RATE_10 02
  1006. #define AUTO_RATE_20 03
  1007. #define WIDE_NEGO_BIT BIT(7)
  1008. #define DISC_ENABLE_BIT BIT(6)
  1009. #endif
  1010. /*----------------------------------------------------------------------
  1011. *
  1012. *
  1013. * Copyright 1995-1996 by Mylex Corporation. All Rights Reserved
  1014. *
  1015. * This file is available under both the GNU General Public License
  1016. * and a BSD-style copyright; see LICENSE.FlashPoint for details.
  1017. *
  1018. * $Workfile: harpoon.h $
  1019. *
  1020. * Description: Register definitions for HARPOON ASIC.
  1021. *
  1022. * $Date: 1997/07/09 21:44:36 $
  1023. *
  1024. * $Revision: 1.9 $
  1025. *
  1026. *----------------------------------------------------------------------*/
  1027. /*#include <globals.h>*/
  1028. #ifndef __HARPOON__
  1029. #define __HARPOON__
  1030. #define hp_vendor_id_0 0x00 /* LSB */
  1031. #define ORION_VEND_0 0x4B
  1032. #define hp_vendor_id_1 0x01 /* MSB */
  1033. #define ORION_VEND_1 0x10
  1034. #define hp_device_id_0 0x02 /* LSB */
  1035. #define ORION_DEV_0 0x30
  1036. #define hp_device_id_1 0x03 /* MSB */
  1037. #define ORION_DEV_1 0x81
  1038. /* Sub Vendor ID and Sub Device ID only available in
  1039. Harpoon Version 2 and higher */
  1040. #define hp_sub_vendor_id_0 0x04 /* LSB */
  1041. #define hp_sub_vendor_id_1 0x05 /* MSB */
  1042. #define hp_sub_device_id_0 0x06 /* LSB */
  1043. #define hp_sub_device_id_1 0x07 /* MSB */
  1044. #define hp_dual_addr_lo 0x08
  1045. #define hp_dual_addr_lmi 0x09
  1046. #define hp_dual_addr_hmi 0x0A
  1047. #define hp_dual_addr_hi 0x0B
  1048. #define hp_semaphore 0x0C
  1049. #define SCCB_MGR_ACTIVE BIT(0)
  1050. #define TICKLE_ME BIT(1)
  1051. #define SCCB_MGR_PRESENT BIT(3)
  1052. #define BIOS_IN_USE BIT(4)
  1053. #define hp_user_defined_D 0x0D
  1054. #define hp_reserved_E 0x0E
  1055. #define hp_sys_ctrl 0x0F
  1056. #define STOP_CLK BIT(0) /*Turn off BusMaster Clock */
  1057. #define DRVR_RST BIT(1) /*Firmware Reset to 80C15 chip */
  1058. #define HALT_MACH BIT(3) /*Halt State Machine */
  1059. #define HARD_ABORT BIT(4) /*Hard Abort */
  1060. #define DIAG_MODE BIT(5) /*Diagnostic Mode */
  1061. #define BM_ABORT_TMOUT 0x50 /*Halt State machine time out */
  1062. #define hp_sys_cfg 0x10
  1063. #define DONT_RST_FIFO BIT(7) /*Don't reset FIFO */
  1064. #define hp_host_ctrl0 0x11
  1065. #define DUAL_ADDR_MODE BIT(0) /*Enable 64-bit addresses */
  1066. #define IO_MEM_SPACE BIT(1) /*I/O Memory Space */
  1067. #define RESOURCE_LOCK BIT(2) /*Enable Resource Lock */
  1068. #define IGNOR_ACCESS_ERR BIT(3) /*Ignore Access Error */
  1069. #define HOST_INT_EDGE BIT(4) /*Host interrupt level/edge mode sel */
  1070. #define SIX_CLOCKS BIT(5) /*6 Clocks between Strobe */
  1071. #define DMA_EVEN_PARITY BIT(6) /*Enable DMA Enen Parity */
  1072. /*
  1073. #define BURST_MODE BIT(0)
  1074. */
  1075. #define hp_reserved_12 0x12
  1076. #define hp_host_blk_cnt 0x13
  1077. #define XFER_BLK1 0x00 /* 0 0 0 1 byte per block*/
  1078. #define XFER_BLK2 0x01 /* 0 0 1 2 byte per block*/
  1079. #define XFER_BLK4 0x02 /* 0 1 0 4 byte per block*/
  1080. #define XFER_BLK8 0x03 /* 0 1 1 8 byte per block*/
  1081. #define XFER_BLK16 0x04 /* 1 0 0 16 byte per block*/
  1082. #define XFER_BLK32 0x05 /* 1 0 1 32 byte per block*/
  1083. #define XFER_BLK64 0x06 /* 1 1 0 64 byte per block*/
  1084. #define BM_THRESHOLD 0x40 /* PCI mode can only xfer 16 bytes*/
  1085. #define hp_reserved_14 0x14
  1086. #define hp_reserved_15 0x15
  1087. #define hp_reserved_16 0x16
  1088. #define hp_int_mask 0x17
  1089. #define INT_CMD_COMPL BIT(0) /* DMA command complete */
  1090. #define INT_EXT_STATUS BIT(1) /* Extended Status Set */
  1091. #define INT_SCSI BIT(2) /* Scsi block interrupt */
  1092. #define INT_FIFO_RDY BIT(4) /* FIFO data ready */
  1093. #define hp_xfer_cnt_lo 0x18
  1094. #define hp_xfer_cnt_mi 0x19
  1095. #define hp_xfer_cnt_hi 0x1A
  1096. #define hp_xfer_cmd 0x1B
  1097. #define XFER_HOST_DMA 0x00 /* 0 0 0 Transfer Host -> DMA */
  1098. #define XFER_DMA_HOST 0x01 /* 0 0 1 Transfer DMA -> Host */
  1099. #define XFER_HOST_MPU 0x02 /* 0 1 0 Transfer Host -> MPU */
  1100. #define XFER_MPU_HOST 0x03 /* 0 1 1 Transfer MPU -> Host */
  1101. #define XFER_DMA_MPU 0x04 /* 1 0 0 Transfer DMA -> MPU */
  1102. #define XFER_MPU_DMA 0x05 /* 1 0 1 Transfer MPU -> DMA */
  1103. #define SET_SEMAPHORE 0x06 /* 1 1 0 Set Semaphore */
  1104. #define XFER_NOP 0x07 /* 1 1 1 Transfer NOP */
  1105. #define XFER_MB_MPU 0x06 /* 1 1 0 Transfer MB -> MPU */
  1106. #define XFER_MB_DMA 0x07 /* 1 1 1 Transfer MB -> DMA */
  1107. #define XFER_HOST_AUTO 0x00 /* 0 0 Auto Transfer Size */
  1108. #define XFER_HOST_8BIT 0x08 /* 0 1 8 BIT Transfer Size */
  1109. #define XFER_HOST_16BIT 0x10 /* 1 0 16 BIT Transfer Size */
  1110. #define XFER_HOST_32BIT 0x18 /* 1 1 32 BIT Transfer Size */
  1111. #define XFER_DMA_8BIT 0x20 /* 0 1 8 BIT Transfer Size */
  1112. #define XFER_DMA_16BIT 0x40 /* 1 0 16 BIT Transfer Size */
  1113. #define DISABLE_INT BIT(7) /*Do not interrupt at end of cmd. */
  1114. #define HOST_WRT_CMD ((DISABLE_INT + XFER_HOST_DMA + XFER_HOST_AUTO + XFER_DMA_8BIT))
  1115. #define HOST_RD_CMD ((DISABLE_INT + XFER_DMA_HOST + XFER_HOST_AUTO + XFER_DMA_8BIT))
  1116. #define WIDE_HOST_WRT_CMD ((DISABLE_INT + XFER_HOST_DMA + XFER_HOST_AUTO + XFER_DMA_16BIT))
  1117. #define WIDE_HOST_RD_CMD ((DISABLE_INT + XFER_DMA_HOST + XFER_HOST_AUTO + XFER_DMA_16BIT))
  1118. #define hp_host_addr_lo 0x1C
  1119. #define hp_host_addr_lmi 0x1D
  1120. #define hp_host_addr_hmi 0x1E
  1121. #define hp_host_addr_hi 0x1F
  1122. #define hp_pio_data 0x20
  1123. #define hp_reserved_21 0x21
  1124. #define hp_ee_ctrl 0x22
  1125. #define EXT_ARB_ACK BIT(7)
  1126. #define SCSI_TERM_ENA_H BIT(6) /* SCSI high byte terminator */
  1127. #define SEE_MS BIT(5)
  1128. #define SEE_CS BIT(3)
  1129. #define SEE_CLK BIT(2)
  1130. #define SEE_DO BIT(1)
  1131. #define SEE_DI BIT(0)
  1132. #define EE_READ 0x06
  1133. #define EE_WRITE 0x05
  1134. #define EWEN 0x04
  1135. #define EWEN_ADDR 0x03C0
  1136. #define EWDS 0x04
  1137. #define EWDS_ADDR 0x0000
  1138. #define hp_brdctl 0x23
  1139. #define DAT_7 BIT(7)
  1140. #define DAT_6 BIT(6)
  1141. #define DAT_5 BIT(5)
  1142. #define BRD_STB BIT(4)
  1143. #define BRD_CS BIT(3)
  1144. #define BRD_WR BIT(2)
  1145. #define hp_reserved_24 0x24
  1146. #define hp_reserved_25 0x25
  1147. #define hp_bm_ctrl 0x26
  1148. #define SCSI_TERM_ENA_L BIT(0) /*Enable/Disable external terminators */
  1149. #define FLUSH_XFER_CNTR BIT(1) /*Flush transfer counter */
  1150. #define BM_XFER_MIN_8 BIT(2) /*Enable bus master transfer of 9 */
  1151. #define BIOS_ENA BIT(3) /*Enable BIOS/FLASH Enable */
  1152. #define FORCE1_XFER BIT(5) /*Always xfer one byte in byte mode */
  1153. #define FAST_SINGLE BIT(6) /*?? */
  1154. #define BMCTRL_DEFAULT (FORCE1_XFER|FAST_SINGLE|SCSI_TERM_ENA_L)
  1155. #define hp_reserved_27 0x27
  1156. #define hp_sg_addr 0x28
  1157. #define hp_page_ctrl 0x29
  1158. #define SCATTER_EN BIT(0)
  1159. #define SGRAM_ARAM BIT(1)
  1160. #define BIOS_SHADOW BIT(2)
  1161. #define G_INT_DISABLE BIT(3) /* Enable/Disable all Interrupts */
  1162. #define NARROW_SCSI_CARD BIT(4) /* NARROW/WIDE SCSI config pin */
  1163. #define hp_reserved_2A 0x2A
  1164. #define hp_pci_cmd_cfg 0x2B
  1165. #define IO_SPACE_ENA BIT(0) /*enable I/O space */
  1166. #define MEM_SPACE_ENA BIT(1) /*enable memory space */
  1167. #define BUS_MSTR_ENA BIT(2) /*enable bus master operation */
  1168. #define MEM_WI_ENA BIT(4) /*enable Write and Invalidate */
  1169. #define PAR_ERR_RESP BIT(6) /*enable parity error responce. */
  1170. #define hp_reserved_2C 0x2C
  1171. #define hp_pci_stat_cfg 0x2D
  1172. #define DATA_PARITY_ERR BIT(0)
  1173. #define REC_TARGET_ABORT BIT(4) /*received Target abort */
  1174. #define REC_MASTER_ABORT BIT(5) /*received Master abort */
  1175. #define SIG_SYSTEM_ERR BIT(6)
  1176. #define DETECTED_PAR_ERR BIT(7)
  1177. #define hp_reserved_2E 0x2E
  1178. #define hp_sys_status 0x2F
  1179. #define SLV_DATA_RDY BIT(0) /*Slave data ready */
  1180. #define XFER_CNT_ZERO BIT(1) /*Transfer counter = 0 */
  1181. #define BM_FIFO_EMPTY BIT(2) /*FIFO empty */
  1182. #define BM_FIFO_FULL BIT(3) /*FIFO full */
  1183. #define HOST_OP_DONE BIT(4) /*host operation done */
  1184. #define DMA_OP_DONE BIT(5) /*DMA operation done */
  1185. #define SLV_OP_DONE BIT(6) /*Slave operation done */
  1186. #define PWR_ON_FLAG BIT(7) /*Power on flag */
  1187. #define hp_reserved_30 0x30
  1188. #define hp_host_status0 0x31
  1189. #define HOST_TERM BIT(5) /*Host Terminal Count */
  1190. #define HOST_TRSHLD BIT(6) /*Host Threshold */
  1191. #define CONNECTED_2_HOST BIT(7) /*Connected to Host */
  1192. #define hp_reserved_32 0x32
  1193. #define hp_rev_num 0x33
  1194. #define REV_A_CONST 0x0E
  1195. #define REV_B_CONST 0x0E
  1196. #define hp_stack_data 0x34
  1197. #define hp_stack_addr 0x35
  1198. #define hp_ext_status 0x36
  1199. #define BM_FORCE_OFF BIT(0) /*Bus Master is forced to get off */
  1200. #define PCI_TGT_ABORT BIT(0) /*PCI bus master transaction aborted */
  1201. #define PCI_DEV_TMOUT BIT(1) /*PCI Device Time out */
  1202. #define FIFO_TC_NOT_ZERO BIT(2) /*FIFO or transfer counter not zero */
  1203. #define CHIP_RST_OCCUR BIT(3) /*Chip reset occurs */
  1204. #define CMD_ABORTED BIT(4) /*Command aborted */
  1205. #define BM_PARITY_ERR BIT(5) /*parity error on data received */
  1206. #define PIO_OVERRUN BIT(6) /*Slave data overrun */
  1207. #define BM_CMD_BUSY BIT(7) /*Bus master transfer command busy */
  1208. #define BAD_EXT_STATUS (BM_FORCE_OFF | PCI_DEV_TMOUT | CMD_ABORTED | \
  1209. BM_PARITY_ERR | PIO_OVERRUN)
  1210. #define hp_int_status 0x37
  1211. #define BM_CMD_CMPL BIT(0) /*Bus Master command complete */
  1212. #define EXT_STATUS_ON BIT(1) /*Extended status is valid */
  1213. #define SCSI_INTERRUPT BIT(2) /*Global indication of a SCSI int. */
  1214. #define BM_FIFO_RDY BIT(4)
  1215. #define INT_ASSERTED BIT(5) /* */
  1216. #define SRAM_BUSY BIT(6) /*Scatter/Gather RAM busy */
  1217. #define CMD_REG_BUSY BIT(7)
  1218. #define hp_fifo_cnt 0x38
  1219. #define hp_curr_host_cnt 0x39
  1220. #define hp_reserved_3A 0x3A
  1221. #define hp_fifo_in_addr 0x3B
  1222. #define hp_fifo_out_addr 0x3C
  1223. #define hp_reserved_3D 0x3D
  1224. #define hp_reserved_3E 0x3E
  1225. #define hp_reserved_3F 0x3F
  1226. extern USHORT default_intena;
  1227. #define hp_intena 0x40
  1228. #define RESET BITW(7)
  1229. #define PROG_HLT BITW(6)
  1230. #define PARITY BITW(5)
  1231. #define FIFO BITW(4)
  1232. #define SEL BITW(3)
  1233. #define SCAM_SEL BITW(2)
  1234. #define RSEL BITW(1)
  1235. #define TIMEOUT BITW(0)
  1236. #define BUS_FREE BITW(15)
  1237. #define XFER_CNT_0 BITW(14)
  1238. #define PHASE BITW(13)
  1239. #define IUNKWN BITW(12)
  1240. #define ICMD_COMP BITW(11)
  1241. #define ITICKLE BITW(10)
  1242. #define IDO_STRT BITW(9)
  1243. #define ITAR_DISC BITW(8)
  1244. #define AUTO_INT (BITW(12)+BITW(11)+BITW(10)+BITW(9)+BITW(8))
  1245. #define CLR_ALL_INT 0xFFFF
  1246. #define CLR_ALL_INT_1 0xFF00
  1247. #define hp_intstat 0x42
  1248. #define hp_scsisig 0x44
  1249. #define SCSI_SEL BIT(7)
  1250. #define SCSI_BSY BIT(6)
  1251. #define SCSI_REQ BIT(5)
  1252. #define SCSI_ACK BIT(4)
  1253. #define SCSI_ATN BIT(3)
  1254. #define SCSI_CD BIT(2)
  1255. #define SCSI_MSG BIT(1)
  1256. #define SCSI_IOBIT BIT(0)
  1257. #define S_SCSI_PHZ (BIT(2)+BIT(1)+BIT(0))
  1258. #define S_CMD_PH (BIT(2) )
  1259. #define S_MSGO_PH (BIT(2)+BIT(1) )
  1260. #define S_STAT_PH (BIT(2) +BIT(0))
  1261. #define S_MSGI_PH (BIT(2)+BIT(1)+BIT(0))
  1262. #define S_DATAI_PH ( BIT(0))
  1263. #define S_DATAO_PH 0x00
  1264. #define S_ILL_PH ( BIT(1) )
  1265. #define hp_scsictrl_0 0x45
  1266. #define NO_ARB BIT(7)
  1267. #define SEL_TAR BIT(6)
  1268. #define ENA_ATN BIT(4)
  1269. #define ENA_RESEL BIT(2)
  1270. #define SCSI_RST BIT(1)
  1271. #define ENA_SCAM_SEL BIT(0)
  1272. #define hp_portctrl_0 0x46
  1273. #define SCSI_PORT BIT(7)
  1274. #define SCSI_INBIT BIT(6)
  1275. #define DMA_PORT BIT(5)
  1276. #define DMA_RD BIT(4)
  1277. #define HOST_PORT BIT(3)
  1278. #define HOST_WRT BIT(2)
  1279. #define SCSI_BUS_EN BIT(1)
  1280. #define START_TO BIT(0)
  1281. #define hp_scsireset 0x47
  1282. #define SCSI_TAR BIT(7)
  1283. #define SCSI_INI BIT(6)
  1284. #define SCAM_EN BIT(5)
  1285. #define ACK_HOLD BIT(4)
  1286. #define DMA_RESET BIT(3)
  1287. #define HPSCSI_RESET BIT(2)
  1288. #define PROG_RESET BIT(1)
  1289. #define FIFO_CLR BIT(0)
  1290. #define hp_xfercnt_0 0x48
  1291. #define hp_xfercnt_1 0x49
  1292. #define hp_xfercnt_2 0x4A
  1293. #define hp_xfercnt_3 0x4B
  1294. #define hp_fifodata_0 0x4C
  1295. #define hp_fifodata_1 0x4D
  1296. #define hp_addstat 0x4E
  1297. #define SCAM_TIMER BIT(7)
  1298. #define AUTO_RUNNING BIT(6)
  1299. #define FAST_SYNC BIT(5)
  1300. #define SCSI_MODE8 BIT(3)
  1301. #define SCSI_PAR_ERR BIT(0)
  1302. #define hp_prgmcnt_0 0x4F
  1303. #define AUTO_PC_MASK 0x3F
  1304. #define hp_selfid_0 0x50
  1305. #define hp_selfid_1 0x51
  1306. #define hp_arb_id 0x52
  1307. #define ARB_ID (BIT(3) + BIT(2) + BIT(1) + BIT(0))
  1308. #define hp_select_id 0x53
  1309. #define RESEL_ID (BIT(7) + BIT(6) + BIT(5) + BIT(4))
  1310. #define SELECT_ID (BIT(3) + BIT(2) + BIT(1) + BIT(0))
  1311. #define hp_synctarg_base 0x54
  1312. #define hp_synctarg_12 0x54
  1313. #define hp_synctarg_13 0x55
  1314. #define hp_synctarg_14 0x56
  1315. #define hp_synctarg_15 0x57
  1316. #define hp_synctarg_8 0x58
  1317. #define hp_synctarg_9 0x59
  1318. #define hp_synctarg_10 0x5A
  1319. #define hp_synctarg_11 0x5B
  1320. #define hp_synctarg_4 0x5C
  1321. #define hp_synctarg_5 0x5D
  1322. #define hp_synctarg_6 0x5E
  1323. #define hp_synctarg_7 0x5F
  1324. #define hp_synctarg_0 0x60
  1325. #define hp_synctarg_1 0x61
  1326. #define hp_synctarg_2 0x62
  1327. #define hp_synctarg_3 0x63
  1328. #define RATE_20MB 0x00
  1329. #define RATE_10MB ( BIT(5))
  1330. #define RATE_6_6MB ( BIT(6) )
  1331. #define RATE_5MB ( BIT(6)+BIT(5))
  1332. #define RATE_4MB (BIT(7) )
  1333. #define RATE_3_33MB (BIT(7) +BIT(5))
  1334. #define RATE_2_85MB (BIT(7)+BIT(6) )
  1335. #define RATE_2_5MB (BIT(7)+BIT(5)+BIT(6))
  1336. #define NEXT_CLK BIT(5)
  1337. #define SLOWEST_SYNC (BIT(7)+BIT(6)+BIT(5))
  1338. #define NARROW_SCSI BIT(4)
  1339. #define SYNC_OFFSET (BIT(3) + BIT(2) + BIT(1) + BIT(0))
  1340. #define DEFAULT_ASYNC 0x00
  1341. #define DEFAULT_OFFSET 0x0F
  1342. #define hp_autostart_0 0x64
  1343. #define hp_autostart_1 0x65
  1344. #define hp_autostart_2 0x66
  1345. #define hp_autostart_3 0x67
  1346. #define DISABLE 0x00
  1347. #define AUTO_IMMED BIT(5)
  1348. #define SELECT BIT(6)
  1349. #define RESELECT (BIT(6)+BIT(5))
  1350. #define BUSFREE BIT(7)
  1351. #define XFER_0 (BIT(7)+BIT(5))
  1352. #define END_DATA (BIT(7)+BIT(6))
  1353. #define MSG_PHZ (BIT(7)+BIT(6)+BIT(5))
  1354. #define hp_gp_reg_0 0x68
  1355. #define hp_gp_reg_1 0x69
  1356. #define hp_gp_reg_2 0x6A
  1357. #define hp_gp_reg_3 0x6B
  1358. #define hp_seltimeout 0x6C
  1359. #define TO_2ms 0x54 /* 2.0503ms */
  1360. #define TO_4ms 0x67 /* 3.9959ms */
  1361. #define TO_5ms 0x03 /* 4.9152ms */
  1362. #define TO_10ms 0x07 /* 11.xxxms */
  1363. #define TO_250ms 0x99 /* 250.68ms */
  1364. #define TO_290ms 0xB1 /* 289.99ms */
  1365. #define TO_350ms 0xD6 /* 350.62ms */
  1366. #define TO_417ms 0xFF /* 417.79ms */
  1367. #define hp_clkctrl_0 0x6D
  1368. #define PWR_DWN BIT(6)
  1369. #define ACTdeassert BIT(4)
  1370. #define ATNonErr BIT(3)
  1371. #define CLK_30MHZ BIT(1)
  1372. #define CLK_40MHZ (BIT(1) + BIT(0))
  1373. #define CLK_50MHZ BIT(2)
  1374. #define CLKCTRL_DEFAULT (ACTdeassert | CLK_40MHZ)
  1375. #define hp_fiforead 0x6E
  1376. #define hp_fifowrite 0x6F
  1377. #define hp_offsetctr 0x70
  1378. #define hp_xferstat 0x71
  1379. #define FIFO_FULL BIT(7)
  1380. #define FIFO_EMPTY BIT(6)
  1381. #define FIFO_MASK 0x3F /* Mask for the FIFO count value. */
  1382. #define FIFO_LEN 0x20
  1383. #define hp_portctrl_1 0x72
  1384. #define EVEN_HOST_P BIT(5)
  1385. #define INVT_SCSI BIT(4)
  1386. #define CHK_SCSI_P BIT(3)
  1387. #define HOST_MODE8 BIT(0)
  1388. #define HOST_MODE16 0x00
  1389. #define hp_xfer_pad 0x73
  1390. #define ID_UNLOCK BIT(3)
  1391. #define XFER_PAD BIT(2)
  1392. #define hp_scsidata_0 0x74
  1393. #define hp_scsidata_1 0x75
  1394. #define hp_timer_0 0x76
  1395. #define hp_timer_1 0x77
  1396. #define hp_reserved_78 0x78
  1397. #define hp_reserved_79 0x79
  1398. #define hp_reserved_7A 0x7A
  1399. #define hp_reserved_7B 0x7B
  1400. #define hp_reserved_7C 0x7C
  1401. #define hp_reserved_7D 0x7D
  1402. #define hp_reserved_7E 0x7E
  1403. #define hp_reserved_7F 0x7F
  1404. #define hp_aramBase 0x80
  1405. #define BIOS_DATA_OFFSET 0x60
  1406. #define BIOS_RELATIVE_CARD 0x64
  1407. #define AUTO_LEN 0x80
  1408. #define AR0 0x00
  1409. #define AR1 BITW(8)
  1410. #define AR2 BITW(9)
  1411. #define AR3 (BITW(9) + BITW(8))
  1412. #define SDATA BITW(10)
  1413. #define NOP_OP 0x00 /* Nop command */
  1414. #define CRD_OP BITW(11) /* Cmp Reg. w/ Data */
  1415. #define CRR_OP BITW(12) /* Cmp Reg. w. Reg. */
  1416. #define CBE_OP (BITW(14)+BITW(12)+BITW(11)) /* Cmp SCSI cmd class & Branch EQ */
  1417. #define CBN_OP (BITW(14)+BITW(13)) /* Cmp SCSI cmd class & Branch NOT EQ */
  1418. #define CPE_OP (BITW(14)+BITW(11)) /* Cmp SCSI phs & Branch EQ */
  1419. #define CPN_OP (BITW(14)+BITW(12)) /* Cmp SCSI phs & Branch NOT EQ */
  1420. #define ADATA_OUT 0x00
  1421. #define ADATA_IN BITW(8)
  1422. #define ACOMMAND BITW(10)
  1423. #define ASTATUS (BITW(10)+BITW(8))
  1424. #define AMSG_OUT (BITW(10)+BITW(9))
  1425. #define AMSG_IN (BITW(10)+BITW(9)+BITW(8))
  1426. #define AILLEGAL (BITW(9)+BITW(8))
  1427. #define BRH_OP BITW(13) /* Branch */
  1428. #define ALWAYS 0x00
  1429. #define EQUAL BITW(8)
  1430. #define NOT_EQ BITW(9)
  1431. #define TCB_OP (BITW(13)+BITW(11)) /* Test condition & branch */
  1432. #define ATN_SET BITW(8)
  1433. #define ATN_RESET BITW(9)
  1434. #define XFER_CNT (BITW(9)+BITW(8))
  1435. #define FIFO_0 BITW(10)
  1436. #define FIFO_NOT0 (BITW(10)+BITW(8))
  1437. #define T_USE_SYNC0 (BITW(10)+BITW(9))
  1438. #define MPM_OP BITW(15) /* Match phase and move data */
  1439. #define MDR_OP (BITW(12)+BITW(11)) /* Move data to Reg. */
  1440. #define MRR_OP BITW(14) /* Move DReg. to Reg. */
  1441. #define S_IDREG (BIT(2)+BIT(1)+BIT(0))
  1442. #define D_AR0 0x00
  1443. #define D_AR1 BIT(0)
  1444. #define D_AR2 BIT(1)
  1445. #define D_AR3 (BIT(1) + BIT(0))
  1446. #define D_SDATA BIT(2)
  1447. #define D_BUCKET (BIT(2) + BIT(1) + BIT(0))
  1448. #define ADR_OP (BITW(13)+BITW(12)) /* Logical AND Reg. w. Data */
  1449. #define ADS_OP (BITW(14)+BITW(13)+BITW(12))
  1450. #define ODR_OP (BITW(13)+BITW(12)+BITW(11))
  1451. #define ODS_OP (BITW(14)+BITW(13)+BITW(12)+BITW(11))
  1452. #define STR_OP (BITW(15)+BITW(14)) /* Store to A_Reg. */
  1453. #define AINT_ENA1 0x00
  1454. #define AINT_STAT1 BITW(8)
  1455. #define ASCSI_SIG BITW(9)
  1456. #define ASCSI_CNTL (BITW(9)+BITW(8))
  1457. #define APORT_CNTL BITW(10)
  1458. #define ARST_CNTL (BITW(10)+BITW(8))
  1459. #define AXFERCNT0 (BITW(10)+BITW(9))
  1460. #define AXFERCNT1 (BITW(10)+BITW(9)+BITW(8))
  1461. #define AXFERCNT2 BITW(11)
  1462. #define AFIFO_DATA (BITW(11)+BITW(8))
  1463. #define ASCSISELID (BITW(11)+BITW(9))
  1464. #define ASCSISYNC0 (BITW(11)+BITW(9)+BITW(8))
  1465. #define RAT_OP (BITW(14)+BITW(13)+BITW(11))
  1466. #define SSI_OP (BITW(15)+BITW(11))
  1467. #define SSI_ITAR_DISC (ITAR_DISC >> 8)
  1468. #define SSI_IDO_STRT (IDO_STRT >> 8)
  1469. #define SSI_IDI_STRT (IDO_STRT >> 8)
  1470. #define SSI_ICMD_COMP (ICMD_COMP >> 8)
  1471. #define SSI_ITICKLE (ITICKLE >> 8)
  1472. #define SSI_IUNKWN (IUNKWN >> 8)
  1473. #define SSI_INO_CC (IUNKWN >> 8)
  1474. #define SSI_IRFAIL (IUNKWN >> 8)
  1475. #define NP 0x10 /*Next Phase */
  1476. #define NTCMD 0x02 /*Non- Tagged Command start */
  1477. #define CMDPZ 0x04 /*Command phase */
  1478. #define DINT 0x12 /*Data Out/In interrupt */
  1479. #define DI 0x13 /*Data Out */
  1480. #define MI 0x14 /*Message In */
  1481. #define DC 0x19 /*Disconnect Message */
  1482. #define ST 0x1D /*Status Phase */
  1483. #define UNKNWN 0x24 /*Unknown bus action */
  1484. #define CC 0x25 /*Command Completion failure */
  1485. #define TICK 0x26 /*New target reselected us. */
  1486. #define RFAIL 0x27 /*Reselection failed */
  1487. #define SELCHK 0x28 /*Select & Check SCSI ID latch reg */
  1488. #define ID_MSG_STRT hp_aramBase + 0x00
  1489. #define NON_TAG_ID_MSG hp_aramBase + 0x06
  1490. #define CMD_STRT hp_aramBase + 0x08
  1491. #define SYNC_MSGS hp_aramBase + 0x08
  1492. #define TAG_STRT 0x00
  1493. #define SELECTION_START 0x00
  1494. #define DISCONNECT_START 0x10/2
  1495. #define END_DATA_START 0x14/2
  1496. #define NONTAG_STRT 0x02/2
  1497. #define CMD_ONLY_STRT CMDPZ/2
  1498. #define TICKLE_STRT TICK/2
  1499. #define SELCHK_STRT SELCHK/2
  1500. #define mEEPROM_CLK_DELAY(port) (RD_HARPOON(port+hp_intstat_1))
  1501. #define mWAIT_10MS(port) (RD_HARPOON(port+hp_intstat_1))
  1502. #define CLR_XFER_CNT(port) (WR_HARPOON(port+hp_xfercnt_0, 0x00))
  1503. #define SET_XFER_CNT(port, data) (WR_HARP32(port,hp_xfercnt_0,data))
  1504. #define GET_XFER_CNT(port, xfercnt) {RD_HARP32(port,hp_xfercnt_0,xfercnt); xfercnt &= 0xFFFFFF;}
  1505. /* #define GET_XFER_CNT(port, xfercnt) (xfercnt = RD_HARPOON(port+hp_xfercnt_2), \
  1506. xfercnt <<= 16,\
  1507. xfercnt |= RDW_HARPOON((USHORT)(port+hp_xfercnt_0)))
  1508. */
  1509. #if defined(DOS)
  1510. #define HP_SETUP_ADDR_CNT(port,addr,count) (WRW_HARPOON((USHORT)(port+hp_host_addr_lo), (USHORT)(addr & 0x0000FFFFL)),\
  1511. addr >>= 16,\
  1512. WRW_HARPOON((USHORT)(port+hp_host_addr_hmi), (USHORT)(addr & 0x0000FFFFL)),\
  1513. WR_HARP32(port,hp_xfercnt_0,count),\
  1514. WRW_HARPOON((USHORT)(port+hp_xfer_cnt_lo), (USHORT)(count & 0x0000FFFFL)),\
  1515. count >>= 16,\
  1516. WR_HARPOON(port+hp_xfer_cnt_hi, (count & 0xFF)))
  1517. #else
  1518. #define HP_SETUP_ADDR_CNT(port,addr,count) (WRW_HARPOON((port+hp_host_addr_lo), (USHORT)(addr & 0x0000FFFFL)),\
  1519. addr >>= 16,\
  1520. WRW_HARPOON((port+hp_host_addr_hmi), (USHORT)(addr & 0x0000FFFFL)),\
  1521. WR_HARP32(port,hp_xfercnt_0,count),\
  1522. WRW_HARPOON((port+hp_xfer_cnt_lo), (USHORT)(count & 0x0000FFFFL)),\
  1523. count >>= 16,\
  1524. WR_HARPOON(port+hp_xfer_cnt_hi, (count & 0xFF)))
  1525. #endif
  1526. #define ACCEPT_MSG(port) {while(RD_HARPOON(port+hp_scsisig) & SCSI_REQ){}\
  1527. WR_HARPOON(port+hp_scsisig, S_ILL_PH);}
  1528. #define ACCEPT_MSG_ATN(port) {while(RD_HARPOON(port+hp_scsisig) & SCSI_REQ){}\
  1529. WR_HARPOON(port+hp_scsisig, (S_ILL_PH|SCSI_ATN));}
  1530. #define ACCEPT_STAT(port) {while(RD_HARPOON(port+hp_scsisig) & SCSI_REQ){}\
  1531. WR_HARPOON(port+hp_scsisig, S_ILL_PH);}
  1532. #define ACCEPT_STAT_ATN(port) {while(RD_HARPOON(port+hp_scsisig) & SCSI_REQ){}\
  1533. WR_HARPOON(port+hp_scsisig, (S_ILL_PH|SCSI_ATN));}
  1534. #define DISABLE_AUTO(port) (WR_HARPOON(port+hp_scsireset, PROG_RESET),\
  1535. WR_HARPOON(port+hp_scsireset, 0x00))
  1536. #define ARAM_ACCESS(p_port) (WR_HARPOON(p_port+hp_page_ctrl, \
  1537. (RD_HARPOON(p_port+hp_page_ctrl) | SGRAM_ARAM)))
  1538. #define SGRAM_ACCESS(p_port) (WR_HARPOON(p_port+hp_page_ctrl, \
  1539. (RD_HARPOON(p_port+hp_page_ctrl) & ~SGRAM_ARAM)))
  1540. #define MDISABLE_INT(p_port) (WR_HARPOON(p_port+hp_page_ctrl, \
  1541. (RD_HARPOON(p_port+hp_page_ctrl) | G_INT_DISABLE)))
  1542. #define MENABLE_INT(p_port) (WR_HARPOON(p_port+hp_page_ctrl, \
  1543. (RD_HARPOON(p_port+hp_page_ctrl) & ~G_INT_DISABLE)))
  1544. #endif
  1545. #if (FW_TYPE==_UCB_MGR_)
  1546. void ReadNVRam(PSCCBcard pCurrCard,PUCB p_ucb);
  1547. void WriteNVRam(PSCCBcard pCurrCard,PUCB p_ucb);
  1548. void UpdateCheckSum(u32bits baseport);
  1549. #endif // (FW_TYPE==_UCB_MGR_)
  1550. #if defined(DOS)
  1551. UCHAR sfm(USHORT port, PSCCB pcurrSCCB);
  1552. void scsiStartAuto(USHORT port);
  1553. UCHAR sisyncn(USHORT port, UCHAR p_card, UCHAR syncFlag);
  1554. void ssel(USHORT port, UCHAR p_card);
  1555. void sres(USHORT port, UCHAR p_card, PSCCBcard pCurrCard);
  1556. void sdecm(UCHAR message, USHORT port, UCHAR p_card);
  1557. void shandem(USHORT port, UCHAR p_card,PSCCB pCurrSCCB);
  1558. void stsyncn(USHORT port, UCHAR p_card);
  1559. void sisyncr(USHORT port,UCHAR sync_pulse, UCHAR offset);
  1560. void sssyncv(USHORT p_port, UCHAR p_id, UCHAR p_sync_value, PSCCBMgr_tar_info currTar_Info);
  1561. void sresb(USHORT port, UCHAR p_card);
  1562. void sxfrp(USHORT p_port, UCHAR p_card);
  1563. void schkdd(USHORT port, UCHAR p_card);
  1564. UCHAR RdStack(USHORT port, UCHAR index);
  1565. void WrStack(USHORT portBase, UCHAR index, UCHAR data);
  1566. UCHAR ChkIfChipInitialized(USHORT ioPort);
  1567. #if defined(V302)
  1568. UCHAR GetTarLun(USHORT port, UCHAR p_card, UCHAR our_target, PSCCBcard pCurrCard, PUCHAR tag, PUCHAR lun);
  1569. #endif
  1570. void SendMsg(USHORT port, UCHAR message);
  1571. void queueFlushTargSccb(UCHAR p_card, UCHAR thisTarg, UCHAR error_code);
  1572. UCHAR scsellDOS(USHORT p_port, UCHAR targ_id);
  1573. #else
  1574. UCHAR sfm(ULONG port, PSCCB pcurrSCCB);
  1575. void scsiStartAuto(ULONG port);
  1576. UCHAR sisyncn(ULONG port, UCHAR p_card, UCHAR syncFlag);
  1577. void ssel(ULONG port, UCHAR p_card);
  1578. void sres(ULONG port, UCHAR p_card, PSCCBcard pCurrCard);
  1579. void sdecm(UCHAR message, ULONG port, UCHAR p_card);
  1580. void shandem(ULONG port, UCHAR p_card,PSCCB pCurrSCCB);
  1581. void stsyncn(ULONG port, UCHAR p_card);
  1582. void sisyncr(ULONG port,UCHAR sync_pulse, UCHAR offset);
  1583. void sssyncv(ULONG p_port, UCHAR p_id, UCHAR p_sync_value, PSCCBMgr_tar_info currTar_Info);
  1584. void sresb(ULONG port, UCHAR p_card);
  1585. void sxfrp(ULONG p_port, UCHAR p_card);
  1586. void schkdd(ULONG port, UCHAR p_card);
  1587. UCHAR RdStack(ULONG port, UCHAR index);
  1588. void WrStack(ULONG portBase, UCHAR index, UCHAR data);
  1589. UCHAR ChkIfChipInitialized(ULONG ioPort);
  1590. #if defined(V302)
  1591. UCHAR GetTarLun(ULONG port, UCHAR p_card, UCHAR our_target, PSCCBcard pCurrCard, PUCHAR tar, PUCHAR lun);
  1592. #endif
  1593. void SendMsg(ULONG port, UCHAR message);
  1594. void queueFlushTargSccb(UCHAR p_card, UCHAR thisTarg, UCHAR error_code);
  1595. #endif
  1596. void ssenss(PSCCBcard pCurrCard);
  1597. void sinits(PSCCB p_sccb, UCHAR p_card);
  1598. void RNVRamData(PNVRamInfo pNvRamInfo);
  1599. #if defined(WIDE_SCSI)
  1600. #if defined(DOS)
  1601. UCHAR siwidn(USHORT port, UCHAR p_card);
  1602. void stwidn(USHORT port, UCHAR p_card);
  1603. void siwidr(USHORT port, UCHAR width);
  1604. #else
  1605. UCHAR siwidn(ULONG port, UCHAR p_card);
  1606. void stwidn(ULONG port, UCHAR p_card);
  1607. void siwidr(ULONG port, UCHAR width);
  1608. #endif
  1609. #endif
  1610. void queueSelectFail(PSCCBcard pCurrCard, UCHAR p_card);
  1611. void queueDisconnect(PSCCB p_SCCB, UCHAR p_card);
  1612. void queueCmdComplete(PSCCBcard pCurrCard, PSCCB p_SCCB, UCHAR p_card);
  1613. void queueSearchSelect(PSCCBcard pCurrCard, UCHAR p_card);
  1614. void queueFlushSccb(UCHAR p_card, UCHAR error_code);
  1615. void queueAddSccb(PSCCB p_SCCB, UCHAR card);
  1616. UCHAR queueFindSccb(PSCCB p_SCCB, UCHAR p_card);
  1617. void utilUpdateResidual(PSCCB p_SCCB);
  1618. USHORT CalcCrc16(UCHAR buffer[]);
  1619. UCHAR CalcLrc(UCHAR buffer[]);
  1620. #if defined(DOS)
  1621. void Wait1Second(USHORT p_port);
  1622. void Wait(USHORT p_port, UCHAR p_delay);
  1623. void utilEEWriteOnOff(USHORT p_port,UCHAR p_mode);
  1624. void utilEEWrite(USHORT p_port, USHORT ee_data, USHORT ee_addr);
  1625. USHORT utilEERead(USHORT p_port, USHORT ee_addr);
  1626. USHORT utilEEReadOrg(USHORT p_port, USHORT ee_addr);
  1627. void utilEESendCmdAddr(USHORT p_port, UCHAR ee_cmd, USHORT ee_addr);
  1628. #else
  1629. void Wait1Second(ULONG p_port);
  1630. void Wait(ULONG p_port, UCHAR p_delay);
  1631. void utilEEWriteOnOff(ULONG p_port,UCHAR p_mode);
  1632. void utilEEWrite(ULONG p_port, USHORT ee_data, USHORT ee_addr);
  1633. USHORT utilEERead(ULONG p_port, USHORT ee_addr);
  1634. USHORT utilEEReadOrg(ULONG p_port, USHORT ee_addr);
  1635. void utilEESendCmdAddr(ULONG p_port, UCHAR ee_cmd, USHORT ee_addr);
  1636. #endif
  1637. #if defined(OS2)
  1638. void far phaseDataOut(ULONG port, UCHAR p_card);
  1639. void far phaseDataIn(ULONG port, UCHAR p_card);
  1640. void far phaseCommand(ULONG port, UCHAR p_card);
  1641. void far phaseStatus(ULONG port, UCHAR p_card);
  1642. void far phaseMsgOut(ULONG port, UCHAR p_card);
  1643. void far phaseMsgIn(ULONG port, UCHAR p_card);
  1644. void far phaseIllegal(ULONG port, UCHAR p_card);
  1645. #else
  1646. #if defined(DOS)
  1647. void phaseDataOut(USHORT port, UCHAR p_card);
  1648. void phaseDataIn(USHORT port, UCHAR p_card);
  1649. void phaseCommand(USHORT port, UCHAR p_card);
  1650. void phaseStatus(USHORT port, UCHAR p_card);
  1651. void phaseMsgOut(USHORT port, UCHAR p_card);
  1652. void phaseMsgIn(USHORT port, UCHAR p_card);
  1653. void phaseIllegal(USHORT port, UCHAR p_card);
  1654. #else
  1655. void phaseDataOut(ULONG port, UCHAR p_card);
  1656. void phaseDataIn(ULONG port, UCHAR p_card);
  1657. void phaseCommand(ULONG port, UCHAR p_card);
  1658. void phaseStatus(ULONG port, UCHAR p_card);
  1659. void phaseMsgOut(ULONG port, UCHAR p_card);
  1660. void phaseMsgIn(ULONG port, UCHAR p_card);
  1661. void phaseIllegal(ULONG port, UCHAR p_card);
  1662. #endif
  1663. #endif
  1664. #if defined(DOS)
  1665. void phaseDecode(USHORT port, UCHAR p_card);
  1666. void phaseChkFifo(USHORT port, UCHAR p_card);
  1667. void phaseBusFree(USHORT p_port, UCHAR p_card);
  1668. #else
  1669. void phaseDecode(ULONG port, UCHAR p_card);
  1670. void phaseChkFifo(ULONG port, UCHAR p_card);
  1671. void phaseBusFree(ULONG p_port, UCHAR p_card);
  1672. #endif
  1673. #if defined(DOS)
  1674. void XbowInit(USHORT port, UCHAR scamFlg);
  1675. void BusMasterInit(USHORT p_port);
  1676. int DiagXbow(USHORT port);
  1677. int DiagBusMaster(USHORT port);
  1678. void DiagEEPROM(USHORT p_port);
  1679. #else
  1680. void XbowInit(ULONG port, UCHAR scamFlg);
  1681. void BusMasterInit(ULONG p_port);
  1682. int DiagXbow(ULONG port);
  1683. int DiagBusMaster(ULONG port);
  1684. void DiagEEPROM(ULONG p_port);
  1685. #endif
  1686. #if defined(DOS)
  1687. void busMstrAbort(USHORT port);
  1688. UCHAR busMstrTimeOut(USHORT port);
  1689. void dataXferProcessor(USHORT port, PSCCBcard pCurrCard);
  1690. void busMstrSGDataXferStart(USHORT port, PSCCB pCurrSCCB);
  1691. void busMstrDataXferStart(USHORT port, PSCCB pCurrSCCB);
  1692. void hostDataXferAbort(USHORT port, UCHAR p_card, PSCCB pCurrSCCB);
  1693. #else
  1694. void busMstrAbort(ULONG port);
  1695. UCHAR busMstrTimeOut(ULONG port);
  1696. void dataXferProcessor(ULONG port, PSCCBcard pCurrCard);
  1697. void busMstrSGDataXferStart(ULONG port, PSCCB pCurrSCCB);
  1698. void busMstrDataXferStart(ULONG port, PSCCB pCurrSCCB);
  1699. void hostDataXferAbort(ULONG port, UCHAR p_card, PSCCB pCurrSCCB);
  1700. #endif
  1701. void hostDataXferRestart(PSCCB currSCCB);
  1702. #if defined (DOS)
  1703. UCHAR SccbMgr_bad_isr(USHORT p_port, UCHAR p_card, PSCCBcard pCurrCard, USHORT p_int);
  1704. #else
  1705. UCHAR SccbMgr_bad_isr(ULONG p_port, UCHAR p_card, PSCCBcard pCurrCard, USHORT p_int);
  1706. #endif
  1707. void SccbMgrTableInitAll(void);
  1708. void SccbMgrTableInitCard(PSCCBcard pCurrCard, UCHAR p_card);
  1709. void SccbMgrTableInitTarget(UCHAR p_card, UCHAR target);
  1710. void scini(UCHAR p_card, UCHAR p_our_id, UCHAR p_power_up);
  1711. #if defined(DOS)
  1712. int scarb(USHORT p_port, UCHAR p_sel_type);
  1713. void scbusf(USHORT p_port);
  1714. void scsel(USHORT p_port);
  1715. void scasid(UCHAR p_card, USHORT p_port);
  1716. UCHAR scxferc(USHORT p_port, UCHAR p_data);
  1717. UCHAR scsendi(USHORT p_port, UCHAR p_id_string[]);
  1718. UCHAR sciso(USHORT p_port, UCHAR p_id_string[]);
  1719. void scwirod(USHORT p_port, UCHAR p_data_bit);
  1720. void scwiros(USHORT p_port, UCHAR p_data_bit);
  1721. UCHAR scvalq(UCHAR p_quintet);
  1722. UCHAR scsell(USHORT p_port, UCHAR targ_id);
  1723. void scwtsel(USHORT p_port);
  1724. void inisci(UCHAR p_card, USHORT p_port, UCHAR p_our_id);
  1725. void scsavdi(UCHAR p_card, USHORT p_port);
  1726. #else
  1727. int scarb(ULONG p_port, UCHAR p_sel_type);
  1728. void scbusf(ULONG p_port);
  1729. void scsel(ULONG p_port);
  1730. void scasid(UCHAR p_card, ULONG p_port);
  1731. UCHAR scxferc(ULONG p_port, UCHAR p_data);
  1732. UCHAR scsendi(ULONG p_port, UCHAR p_id_string[]);
  1733. UCHAR sciso(ULONG p_port, UCHAR p_id_string[]);
  1734. void scwirod(ULONG p_port, UCHAR p_data_bit);
  1735. void scwiros(ULONG p_port, UCHAR p_data_bit);
  1736. UCHAR scvalq(UCHAR p_quintet);
  1737. UCHAR scsell(ULONG p_port, UCHAR targ_id);
  1738. void scwtsel(ULONG p_port);
  1739. void inisci(UCHAR p_card, ULONG p_port, UCHAR p_our_id);
  1740. void scsavdi(UCHAR p_card, ULONG p_port);
  1741. #endif
  1742. UCHAR scmachid(UCHAR p_card, UCHAR p_id_string[]);
  1743. #if defined(DOS)
  1744. void autoCmdCmplt(USHORT p_port, UCHAR p_card);
  1745. void autoLoadDefaultMap(USHORT p_port);
  1746. #else
  1747. void autoCmdCmplt(ULONG p_port, UCHAR p_card);
  1748. void autoLoadDefaultMap(ULONG p_port);
  1749. #endif
  1750. #if (FW_TYPE==_SCCB_MGR_)
  1751. void OS_start_timer(unsigned long ioport, unsigned long timeout);
  1752. void OS_stop_timer(unsigned long ioport, unsigned long timeout);
  1753. void OS_disable_int(unsigned char intvec);
  1754. void OS_enable_int(unsigned char intvec);
  1755. void OS_delay(unsigned long count);
  1756. int OS_VirtToPhys(u32bits CardHandle, u32bits *physaddr, u32bits *virtaddr);
  1757. #if !(defined(UNIX) || defined(OS2) || defined(SOLARIS_REAL_MODE))
  1758. void OS_Lock(PSCCBMGR_INFO pCardInfo);
  1759. void OS_UnLock(PSCCBMGR_INFO pCardInfo);
  1760. #endif // if FW_TYPE == ...
  1761. #endif
  1762. extern SCCBCARD BL_Card[MAX_CARDS];
  1763. extern SCCBMGR_TAR_INFO sccbMgrTbl[MAX_CARDS][MAX_SCSI_TAR];
  1764. #if defined(OS2)
  1765. extern void (far *s_PhaseTbl[8]) (ULONG, UCHAR);
  1766. #else
  1767. #if defined(DOS)
  1768. extern void (*s_PhaseTbl[8]) (USHORT, UCHAR);
  1769. #else
  1770. extern void (*s_PhaseTbl[8]) (ULONG, UCHAR);
  1771. #endif
  1772. #endif
  1773. extern SCCBSCAM_INFO scamInfo[MAX_SCSI_TAR];
  1774. extern NVRAMINFO nvRamInfo[MAX_MB_CARDS];
  1775. #if defined(DOS) || defined(OS2)
  1776. extern UCHAR temp_id_string[ID_STRING_LENGTH];
  1777. #endif
  1778. extern UCHAR scamHAString[];
  1779. extern UCHAR mbCards;
  1780. #if defined(BUGBUG)
  1781. extern UCHAR debug_int[MAX_CARDS][debug_size];
  1782. extern UCHAR debug_index[MAX_CARDS];
  1783. void Debug_Load(UCHAR p_card, UCHAR p_bug_data);
  1784. #endif
  1785. #if (FW_TYPE==_SCCB_MGR_)
  1786. #if defined(DOS)
  1787. extern UCHAR first_time;
  1788. #endif
  1789. #endif /* (FW_TYPE==_SCCB_MGR_) */
  1790. #if (FW_TYPE==_UCB_MGR_)
  1791. #if defined(DOS)
  1792. extern u08bits first_time;
  1793. #endif
  1794. #endif /* (FW_TYPE==_UCB_MGR_) */
  1795. #if defined(BUGBUG)
  1796. void Debug_Load(UCHAR p_card, UCHAR p_bug_data);
  1797. #endif
  1798. extern unsigned int SccbGlobalFlags;
  1799. #ident "$Id: sccb.c 1.18 1997/06/10 16:47:04 mohan Exp $"
  1800. /*----------------------------------------------------------------------
  1801. *
  1802. *
  1803. * Copyright 1995-1996 by Mylex Corporation. All Rights Reserved
  1804. *
  1805. * This file is available under both the GNU General Public License
  1806. * and a BSD-style copyright; see LICENSE.FlashPoint for details.
  1807. *
  1808. * $Workfile: sccb.c $
  1809. *
  1810. * Description: Functions relating to handling of the SCCB interface
  1811. * between the device driver and the HARPOON.
  1812. *
  1813. * $Date: 1997/06/10 16:47:04 $
  1814. *
  1815. * $Revision: 1.18 $
  1816. *
  1817. *----------------------------------------------------------------------*/
  1818. /*#include <globals.h>*/
  1819. #if (FW_TYPE==_UCB_MGR_)
  1820. /*#include <budi.h>*/
  1821. /*#include <budioctl.h>*/
  1822. #endif
  1823. /*#include <sccbmgr.h>*/
  1824. /*#include <blx30.h>*/
  1825. /*#include <target.h>*/
  1826. /*#include <eeprom.h>*/
  1827. /*#include <scsi2.h>*/
  1828. /*#include <harpoon.h>*/
  1829. #if (FW_TYPE==_SCCB_MGR_)
  1830. #define mOS_Lock(card) OS_Lock((PSCCBMGR_INFO)(((PSCCBcard)card)->cardInfo))
  1831. #define mOS_UnLock(card) OS_UnLock((PSCCBMGR_INFO)(((PSCCBcard)card)->cardInfo))
  1832. #else /* FW_TYPE==_UCB_MGR_ */
  1833. #define mOS_Lock(card) OS_Lock((u32bits)(((PSCCBcard)card)->ioPort))
  1834. #define mOS_UnLock(card) OS_UnLock((u32bits)(((PSCCBcard)card)->ioPort))
  1835. #endif
  1836. /*
  1837. extern SCCBMGR_TAR_INFO sccbMgrTbl[MAX_CARDS][MAX_SCSI_TAR];
  1838. extern SCCBCARD BL_Card[MAX_CARDS];
  1839. extern NVRAMINFO nvRamInfo[MAX_MB_CARDS];
  1840. extern UCHAR mbCards;
  1841. #if defined (OS2)
  1842. extern void (far *s_PhaseTbl[8]) (ULONG, UCHAR);
  1843. #else
  1844. #if defined(DOS)
  1845. extern void (*s_PhaseTbl[8]) (USHORT, UCHAR);
  1846. #else
  1847. extern void (*s_PhaseTbl[8]) (ULONG, UCHAR);
  1848. #endif
  1849. #endif
  1850. #if defined(BUGBUG)
  1851. extern UCHAR debug_int[MAX_CARDS][debug_size];
  1852. extern UCHAR debug_index[MAX_CARDS];
  1853. void Debug_Load(UCHAR p_card, UCHAR p_bug_data);
  1854. #endif
  1855. */
  1856. #if (FW_TYPE==_SCCB_MGR_)
  1857. /*---------------------------------------------------------------------
  1858. *
  1859. * Function: SccbMgr_sense_adapter
  1860. *
  1861. * Description: Setup and/or Search for cards and return info to caller.
  1862. *
  1863. *---------------------------------------------------------------------*/
  1864. int SccbMgr_sense_adapter(PSCCBMGR_INFO pCardInfo)
  1865. {
  1866. #if defined(DOS)
  1867. #else
  1868. static UCHAR first_time = 1;
  1869. #endif
  1870. UCHAR i,j,id,ScamFlg;
  1871. USHORT temp,temp2,temp3,temp4,temp5,temp6;
  1872. #if defined(DOS)
  1873. USHORT ioport;
  1874. #else
  1875. ULONG ioport;
  1876. #endif
  1877. PNVRamInfo pCurrNvRam;
  1878. #if defined(DOS)
  1879. ioport = (USHORT)pCardInfo->si_baseaddr;
  1880. #else
  1881. ioport = pCardInfo->si_baseaddr;
  1882. #endif
  1883. if (RD_HARPOON(ioport+hp_vendor_id_0) != ORION_VEND_0)
  1884. return((int)FAILURE);
  1885. if ((RD_HARPOON(ioport+hp_vendor_id_1) != ORION_VEND_1))
  1886. return((int)FAILURE);
  1887. if ((RD_HARPOON(ioport+hp_device_id_0) != ORION_DEV_0))
  1888. return((int)FAILURE);
  1889. if ((RD_HARPOON(ioport+hp_device_id_1) != ORION_DEV_1))
  1890. return((int)FAILURE);
  1891. if (RD_HARPOON(ioport+hp_rev_num) != 0x0f){
  1892. /* For new Harpoon then check for sub_device ID LSB
  1893. the bits(0-3) must be all ZERO for compatible with
  1894. current version of SCCBMgr, else skip this Harpoon
  1895. device. */
  1896. if (RD_HARPOON(ioport+hp_sub_device_id_0) & 0x0f)
  1897. return((int)FAILURE);
  1898. }
  1899. if (first_time)
  1900. {
  1901. SccbMgrTableInitAll();
  1902. first_time = 0;
  1903. mbCards = 0;
  1904. }
  1905. if(RdStack(ioport, 0) != 0x00) {
  1906. if(ChkIfChipInitialized(ioport) == FALSE)
  1907. {
  1908. pCurrNvRam = NULL;
  1909. WR_HARPOON(ioport+hp_semaphore, 0x00);
  1910. XbowInit(ioport, 0); /*Must Init the SCSI before attempting */
  1911. DiagEEPROM(ioport);
  1912. }
  1913. else
  1914. {
  1915. if(mbCards < MAX_MB_CARDS) {
  1916. pCurrNvRam = &nvRamInfo[mbCards];
  1917. mbCards++;
  1918. pCurrNvRam->niBaseAddr = ioport;
  1919. RNVRamData(pCurrNvRam);
  1920. }else
  1921. return((int) FAILURE);
  1922. }
  1923. }else
  1924. pCurrNvRam = NULL;
  1925. #if defined (NO_BIOS_OPTION)
  1926. pCurrNvRam = NULL;
  1927. XbowInit(ioport, 0); /*Must Init the SCSI before attempting */
  1928. DiagEEPROM(ioport);
  1929. #endif /* No BIOS Option */
  1930. WR_HARPOON(ioport+hp_clkctrl_0, CLKCTRL_DEFAULT);
  1931. WR_HARPOON(ioport+hp_sys_ctrl, 0x00);
  1932. if(pCurrNvRam)
  1933. pCardInfo->si_id = pCurrNvRam->niAdapId;
  1934. else
  1935. pCardInfo->si_id = (UCHAR)(utilEERead(ioport, (ADAPTER_SCSI_ID/2)) &
  1936. (UCHAR)0x0FF);
  1937. pCardInfo->si_lun = 0x00;
  1938. pCardInfo->si_fw_revision = ORION_FW_REV;
  1939. temp2 = 0x0000;
  1940. temp3 = 0x0000;
  1941. temp4 = 0x0000;
  1942. temp5 = 0x0000;
  1943. temp6 = 0x0000;
  1944. for (id = 0; id < (16/2); id++) {
  1945. if(pCurrNvRam){
  1946. temp = (USHORT) pCurrNvRam->niSyncTbl[id];
  1947. temp = ((temp & 0x03) + ((temp << 4) & 0xc0)) +
  1948. (((temp << 4) & 0x0300) + ((temp << 8) & 0xc000));
  1949. }else
  1950. temp = utilEERead(ioport, (USHORT)((SYNC_RATE_TBL/2)+id));
  1951. for (i = 0; i < 2; temp >>=8,i++) {
  1952. temp2 >>= 1;
  1953. temp3 >>= 1;
  1954. temp4 >>= 1;
  1955. temp5 >>= 1;
  1956. temp6 >>= 1;
  1957. switch (temp & 0x3)
  1958. {
  1959. case AUTO_RATE_20: /* Synchronous, 20 mega-transfers/second */
  1960. temp6 |= 0x8000; /* Fall through */
  1961. case AUTO_RATE_10: /* Synchronous, 10 mega-transfers/second */
  1962. temp5 |= 0x8000; /* Fall through */
  1963. case AUTO_RATE_05: /* Synchronous, 5 mega-transfers/second */
  1964. temp2 |= 0x8000; /* Fall through */
  1965. case AUTO_RATE_00: /* Asynchronous */
  1966. break;
  1967. }
  1968. if (temp & DISC_ENABLE_BIT)
  1969. temp3 |= 0x8000;
  1970. if (temp & WIDE_NEGO_BIT)
  1971. temp4 |= 0x8000;
  1972. }
  1973. }
  1974. pCardInfo->si_per_targ_init_sync = temp2;
  1975. pCardInfo->si_per_targ_no_disc = temp3;
  1976. pCardInfo->si_per_targ_wide_nego = temp4;
  1977. pCardInfo->si_per_targ_fast_nego = temp5;
  1978. pCardInfo->si_per_targ_ultra_nego = temp6;
  1979. if(pCurrNvRam)
  1980. i = pCurrNvRam->niSysConf;
  1981. else
  1982. i = (UCHAR)(utilEERead(ioport, (SYSTEM_CONFIG/2)));
  1983. if(pCurrNvRam)
  1984. ScamFlg = pCurrNvRam->niScamConf;
  1985. else
  1986. ScamFlg = (UCHAR) utilEERead(ioport, SCAM_CONFIG/2);
  1987. pCardInfo->si_flags = 0x0000;
  1988. if (i & 0x01)
  1989. pCardInfo->si_flags |= SCSI_PARITY_ENA;
  1990. if (!(i & 0x02))
  1991. pCardInfo->si_flags |= SOFT_RESET;
  1992. if (i & 0x10)
  1993. pCardInfo->si_flags |= EXTENDED_TRANSLATION;
  1994. if (ScamFlg & SCAM_ENABLED)
  1995. pCardInfo->si_flags |= FLAG_SCAM_ENABLED;
  1996. if (ScamFlg & SCAM_LEVEL2)
  1997. pCardInfo->si_flags |= FLAG_SCAM_LEVEL2;
  1998. j = (RD_HARPOON(ioport+hp_bm_ctrl) & ~SCSI_TERM_ENA_L);
  1999. if (i & 0x04) {
  2000. j |= SCSI_TERM_ENA_L;
  2001. }
  2002. WR_HARPOON(ioport+hp_bm_ctrl, j );
  2003. j = (RD_HARPOON(ioport+hp_ee_ctrl) & ~SCSI_TERM_ENA_H);
  2004. if (i & 0x08) {
  2005. j |= SCSI_TERM_ENA_H;
  2006. }
  2007. WR_HARPOON(ioport+hp_ee_ctrl, j );
  2008. if (!(RD_HARPOON(ioport+hp_page_ctrl) & NARROW_SCSI_CARD))
  2009. pCardInfo->si_flags |= SUPPORT_16TAR_32LUN;
  2010. pCardInfo->si_card_family = HARPOON_FAMILY;
  2011. pCardInfo->si_bustype = BUSTYPE_PCI;
  2012. if(pCurrNvRam){
  2013. pCardInfo->si_card_model[0] = '9';
  2014. switch(pCurrNvRam->niModel & 0x0f){
  2015. case MODEL_LT:
  2016. pCardInfo->si_card_model[1] = '3';
  2017. pCardInfo->si_card_model[2] = '0';
  2018. break;
  2019. case MODEL_LW:
  2020. pCardInfo->si_card_model[1] = '5';
  2021. pCardInfo->si_card_model[2] = '0';
  2022. break;
  2023. case MODEL_DL:
  2024. pCardInfo->si_card_model[1] = '3';
  2025. pCardInfo->si_card_model[2] = '2';
  2026. break;
  2027. case MODEL_DW:
  2028. pCardInfo->si_card_model[1] = '5';
  2029. pCardInfo->si_card_model[2] = '2';
  2030. break;
  2031. }
  2032. }else{
  2033. temp = utilEERead(ioport, (MODEL_NUMB_0/2));
  2034. pCardInfo->si_card_model[0] = (UCHAR)(temp >> 8);
  2035. temp = utilEERead(ioport, (MODEL_NUMB_2/2));
  2036. pCardInfo->si_card_model[1] = (UCHAR)(temp & 0x00FF);
  2037. pCardInfo->si_card_model[2] = (UCHAR)(temp >> 8);
  2038. }
  2039. if (pCardInfo->si_card_model[1] == '3')
  2040. {
  2041. if (RD_HARPOON(ioport+hp_ee_ctrl) & BIT(7))
  2042. pCardInfo->si_flags |= LOW_BYTE_TERM;
  2043. }
  2044. else if (pCardInfo->si_card_model[2] == '0')
  2045. {
  2046. temp = RD_HARPOON(ioport+hp_xfer_pad);
  2047. WR_HARPOON(ioport+hp_xfer_pad, (temp & ~BIT(4)));
  2048. if (RD_HARPOON(ioport+hp_ee_ctrl) & BIT(7))
  2049. pCardInfo->si_flags |= LOW_BYTE_TERM;
  2050. WR_HARPOON(ioport+hp_xfer_pad, (temp | BIT(4)));
  2051. if (RD_HARPOON(ioport+hp_ee_ctrl) & BIT(7))
  2052. pCardInfo->si_flags |= HIGH_BYTE_TERM;
  2053. WR_HARPOON(ioport+hp_xfer_pad, temp);
  2054. }
  2055. else
  2056. {
  2057. temp = RD_HARPOON(ioport+hp_ee_ctrl);
  2058. temp2 = RD_HARPOON(ioport+hp_xfer_pad);
  2059. WR_HARPOON(ioport+hp_ee_ctrl, (temp | SEE_CS));
  2060. WR_HARPOON(ioport+hp_xfer_pad, (temp2 | BIT(4)));
  2061. temp3 = 0;
  2062. for (i = 0; i < 8; i++)
  2063. {
  2064. temp3 <<= 1;
  2065. if (!(RD_HARPOON(ioport+hp_ee_ctrl) & BIT(7)))
  2066. temp3 |= 1;
  2067. WR_HARPOON(ioport+hp_xfer_pad, (temp2 & ~BIT(4)));
  2068. WR_HARPOON(ioport+hp_xfer_pad, (temp2 | BIT(4)));
  2069. }
  2070. WR_HARPOON(ioport+hp_ee_ctrl, temp);
  2071. WR_HARPOON(ioport+hp_xfer_pad, temp2);
  2072. if (!(temp3 & BIT(7)))
  2073. pCardInfo->si_flags |= LOW_BYTE_TERM;
  2074. if (!(temp3 & BIT(6)))
  2075. pCardInfo->si_flags |= HIGH_BYTE_TERM;
  2076. }
  2077. ARAM_ACCESS(ioport);
  2078. for ( i = 0; i < 4; i++ ) {
  2079. pCardInfo->si_XlatInfo[i] =
  2080. RD_HARPOON(ioport+hp_aramBase+BIOS_DATA_OFFSET+i);
  2081. }
  2082. /* return with -1 if no sort, else return with
  2083. logical card number sorted by BIOS (zero-based) */
  2084. pCardInfo->si_relative_cardnum =
  2085. (UCHAR)(RD_HARPOON(ioport+hp_aramBase+BIOS_RELATIVE_CARD)-1);
  2086. SGRAM_ACCESS(ioport);
  2087. s_PhaseTbl[0] = phaseDataOut;
  2088. s_PhaseTbl[1] = phaseDataIn;
  2089. s_PhaseTbl[2] = phaseIllegal;
  2090. s_PhaseTbl[3] = phaseIllegal;
  2091. s_PhaseTbl[4] = phaseCommand;
  2092. s_PhaseTbl[5] = phaseStatus;
  2093. s_PhaseTbl[6] = phaseMsgOut;
  2094. s_PhaseTbl[7] = phaseMsgIn;
  2095. pCardInfo->si_present = 0x01;
  2096. #if defined(BUGBUG)
  2097. for (i = 0; i < MAX_CARDS; i++) {
  2098. for (id=0; id<debug_size; id++)
  2099. debug_int[i][id] = (UCHAR)0x00;
  2100. debug_index[i] = 0;
  2101. }
  2102. #endif
  2103. return(0);
  2104. }
  2105. /*---------------------------------------------------------------------
  2106. *
  2107. * Function: SccbMgr_config_adapter
  2108. *
  2109. * Description: Setup adapter for normal operation (hard reset).
  2110. *
  2111. *---------------------------------------------------------------------*/
  2112. #if defined(DOS)
  2113. USHORT SccbMgr_config_adapter(PSCCBMGR_INFO pCardInfo)
  2114. #else
  2115. ULONG SccbMgr_config_adapter(PSCCBMGR_INFO pCardInfo)
  2116. #endif
  2117. {
  2118. PSCCBcard CurrCard = NULL;
  2119. PNVRamInfo pCurrNvRam;
  2120. UCHAR i,j,thisCard, ScamFlg;
  2121. USHORT temp,sync_bit_map,id;
  2122. #if defined(DOS)
  2123. USHORT ioport;
  2124. #else
  2125. ULONG ioport;
  2126. #endif
  2127. #if defined(DOS)
  2128. ioport = (USHORT)pCardInfo->si_baseaddr;
  2129. #else
  2130. ioport = pCardInfo->si_baseaddr;
  2131. #endif
  2132. for(thisCard =0; thisCard <= MAX_CARDS; thisCard++) {
  2133. if (thisCard == MAX_CARDS) {
  2134. return(FAILURE);
  2135. }
  2136. if (BL_Card[thisCard].ioPort == ioport) {
  2137. CurrCard = &BL_Card[thisCard];
  2138. SccbMgrTableInitCard(CurrCard,thisCard);
  2139. break;
  2140. }
  2141. else if (BL_Card[thisCard].ioPort == 0x00) {
  2142. BL_Card[thisCard].ioPort = ioport;
  2143. CurrCard = &BL_Card[thisCard];
  2144. if(mbCards)
  2145. for(i = 0; i < mbCards; i++){
  2146. if(CurrCard->ioPort == nvRamInfo[i].niBaseAddr)
  2147. CurrCard->pNvRamInfo = &nvRamInfo[i];
  2148. }
  2149. SccbMgrTableInitCard(CurrCard,thisCard);
  2150. CurrCard->cardIndex = thisCard;
  2151. CurrCard->cardInfo = pCardInfo;
  2152. break;
  2153. }
  2154. }
  2155. pCurrNvRam = CurrCard->pNvRamInfo;
  2156. if(pCurrNvRam){
  2157. ScamFlg = pCurrNvRam->niScamConf;
  2158. }
  2159. else{
  2160. ScamFlg = (UCHAR) utilEERead(ioport, SCAM_CONFIG/2);
  2161. }
  2162. BusMasterInit(ioport);
  2163. XbowInit(ioport, ScamFlg);
  2164. #if defined (NO_BIOS_OPTION)
  2165. if (DiagXbow(ioport)) return(FAILURE);
  2166. if (DiagBusMaster(ioport)) return(FAILURE);
  2167. #endif /* No BIOS Option */
  2168. autoLoadDefaultMap(ioport);
  2169. for (i = 0,id = 0x01; i != pCardInfo->si_id; i++,id <<= 1){}
  2170. WR_HARPOON(ioport+hp_selfid_0, id);
  2171. WR_HARPOON(ioport+hp_selfid_1, 0x00);
  2172. WR_HARPOON(ioport+hp_arb_id, pCardInfo->si_id);
  2173. CurrCard->ourId = pCardInfo->si_id;
  2174. i = (UCHAR) pCardInfo->si_flags;
  2175. if (i & SCSI_PARITY_ENA)
  2176. WR_HARPOON(ioport+hp_portctrl_1,(HOST_MODE8 | CHK_SCSI_P));
  2177. j = (RD_HARPOON(ioport+hp_bm_ctrl) & ~SCSI_TERM_ENA_L);
  2178. if (i & LOW_BYTE_TERM)
  2179. j |= SCSI_TERM_ENA_L;
  2180. WR_HARPOON(ioport+hp_bm_ctrl, j);
  2181. j = (RD_HARPOON(ioport+hp_ee_ctrl) & ~SCSI_TERM_ENA_H);
  2182. if (i & HIGH_BYTE_TERM)
  2183. j |= SCSI_TERM_ENA_H;
  2184. WR_HARPOON(ioport+hp_ee_ctrl, j );
  2185. if (!(pCardInfo->si_flags & SOFT_RESET)) {
  2186. sresb(ioport,thisCard);
  2187. scini(thisCard, pCardInfo->si_id, 0);
  2188. }
  2189. if (pCardInfo->si_flags & POST_ALL_UNDERRRUNS)
  2190. CurrCard->globalFlags |= F_NO_FILTER;
  2191. if(pCurrNvRam){
  2192. if(pCurrNvRam->niSysConf & 0x10)
  2193. CurrCard->globalFlags |= F_GREEN_PC;
  2194. }
  2195. else{
  2196. if (utilEERead(ioport, (SYSTEM_CONFIG/2)) & GREEN_PC_ENA)
  2197. CurrCard->globalFlags |= F_GREEN_PC;
  2198. }
  2199. /* Set global flag to indicate Re-Negotiation to be done on all
  2200. ckeck condition */
  2201. if(pCurrNvRam){
  2202. if(pCurrNvRam->niScsiConf & 0x04)
  2203. CurrCard->globalFlags |= F_DO_RENEGO;
  2204. }
  2205. else{
  2206. if (utilEERead(ioport, (SCSI_CONFIG/2)) & RENEGO_ENA)
  2207. CurrCard->globalFlags |= F_DO_RENEGO;
  2208. }
  2209. if(pCurrNvRam){
  2210. if(pCurrNvRam->niScsiConf & 0x08)
  2211. CurrCard->globalFlags |= F_CONLUN_IO;
  2212. }
  2213. else{
  2214. if (utilEERead(ioport, (SCSI_CONFIG/2)) & CONNIO_ENA)
  2215. CurrCard->globalFlags |= F_CONLUN_IO;
  2216. }
  2217. temp = pCardInfo->si_per_targ_no_disc;
  2218. for (i = 0,id = 1; i < MAX_SCSI_TAR; i++, id <<= 1) {
  2219. if (temp & id)
  2220. sccbMgrTbl[thisCard][i].TarStatus |= TAR_ALLOW_DISC;
  2221. }
  2222. sync_bit_map = 0x0001;
  2223. for (id = 0; id < (MAX_SCSI_TAR/2); id++) {
  2224. if(pCurrNvRam){
  2225. temp = (USHORT) pCurrNvRam->niSyncTbl[id];
  2226. temp = ((temp & 0x03) + ((temp << 4) & 0xc0)) +
  2227. (((temp << 4) & 0x0300) + ((temp << 8) & 0xc000));
  2228. }else
  2229. temp = utilEERead(ioport, (USHORT)((SYNC_RATE_TBL/2)+id));
  2230. for (i = 0; i < 2; temp >>=8,i++) {
  2231. if (pCardInfo->si_per_targ_init_sync & sync_bit_map) {
  2232. sccbMgrTbl[thisCard][id*2+i].TarEEValue = (UCHAR)temp;
  2233. }
  2234. else {
  2235. sccbMgrTbl[thisCard][id*2+i].TarStatus |= SYNC_SUPPORTED;
  2236. sccbMgrTbl[thisCard][id*2+i].TarEEValue =
  2237. (UCHAR)(temp & ~EE_SYNC_MASK);
  2238. }
  2239. #if defined(WIDE_SCSI)
  2240. /* if ((pCardInfo->si_per_targ_wide_nego & sync_bit_map) ||
  2241. (id*2+i >= 8)){
  2242. */
  2243. if (pCardInfo->si_per_targ_wide_nego & sync_bit_map){
  2244. sccbMgrTbl[thisCard][id*2+i].TarEEValue |= EE_WIDE_SCSI;
  2245. }
  2246. else { /* NARROW SCSI */
  2247. sccbMgrTbl[thisCard][id*2+i].TarStatus |= WIDE_NEGOCIATED;
  2248. }
  2249. #else
  2250. sccbMgrTbl[thisCard][id*2+i].TarStatus |= WIDE_NEGOCIATED;
  2251. #endif
  2252. sync_bit_map <<= 1;
  2253. }
  2254. }
  2255. WR_HARPOON((ioport+hp_semaphore),
  2256. (UCHAR)(RD_HARPOON((ioport+hp_semaphore)) | SCCB_MGR_PRESENT));
  2257. #if defined(DOS)
  2258. return((USHORT)CurrCard);
  2259. #else
  2260. return((ULONG)CurrCard);
  2261. #endif
  2262. }
  2263. #else /* end (FW_TYPE==_SCCB_MGR_) */
  2264. STATIC s16bits FP_PresenceCheck(PMGR_INFO pMgrInfo)
  2265. {
  2266. PMGR_ENTRYPNTS pMgr_EntryPnts = &pMgrInfo->mi_Functions;
  2267. pMgr_EntryPnts->UCBMgr_probe_adapter = probe_adapter;
  2268. pMgr_EntryPnts->UCBMgr_init_adapter = init_adapter;
  2269. pMgr_EntryPnts->UCBMgr_start_UCB = SccbMgr_start_sccb;
  2270. pMgr_EntryPnts->UCBMgr_build_UCB = build_UCB;
  2271. pMgr_EntryPnts->UCBMgr_abort_UCB = SccbMgr_abort_sccb;
  2272. pMgr_EntryPnts->UCBMgr_my_int = SccbMgr_my_int;
  2273. pMgr_EntryPnts->UCBMgr_isr = SccbMgr_isr;
  2274. pMgr_EntryPnts->UCBMgr_scsi_reset = SccbMgr_scsi_reset;
  2275. pMgr_EntryPnts->UCBMgr_timer_expired = SccbMgr_timer_expired;
  2276. #ifndef NO_IOCTLS
  2277. pMgr_EntryPnts->UCBMgr_unload_card = SccbMgr_unload_card;
  2278. pMgr_EntryPnts->UCBMgr_save_foreign_state =
  2279. SccbMgr_save_foreign_state;
  2280. pMgr_EntryPnts->UCBMgr_restore_foreign_state =
  2281. SccbMgr_restore_foreign_state;
  2282. pMgr_EntryPnts->UCBMgr_restore_native_state =
  2283. SccbMgr_restore_native_state;
  2284. #endif /*NO_IOCTLS*/
  2285. pMgrInfo->mi_SGListFormat=0x01;
  2286. pMgrInfo->mi_DataPtrFormat=0x01;
  2287. pMgrInfo->mi_MaxSGElements= (u16bits) 0xffffffff;
  2288. pMgrInfo->mi_MgrPrivateLen=sizeof(SCCB);
  2289. pMgrInfo->mi_PCIVendorID=BL_VENDOR_ID;
  2290. pMgrInfo->mi_PCIDeviceID=FP_DEVICE_ID;
  2291. pMgrInfo->mi_MgrAttributes= ATTR_IO_MAPPED +
  2292. ATTR_PHYSICAL_ADDRESS +
  2293. ATTR_VIRTUAL_ADDRESS +
  2294. ATTR_OVERLAPPED_IO_IOCTLS_OK;
  2295. pMgrInfo->mi_IoRangeLen = 256;
  2296. return(0);
  2297. }
  2298. /*---------------------------------------------------------------------
  2299. *
  2300. * Function: probe_adapter
  2301. *
  2302. * Description: Setup and/or Search for cards and return info to caller.
  2303. *
  2304. *---------------------------------------------------------------------*/
  2305. STATIC s32bits probe_adapter(PADAPTER_INFO pAdapterInfo)
  2306. {
  2307. u16bits temp,temp2,temp3,temp4;
  2308. u08bits i,j,id;
  2309. #if defined(DOS)
  2310. #else
  2311. static u08bits first_time = 1;
  2312. #endif
  2313. BASE_PORT ioport;
  2314. PNVRamInfo pCurrNvRam;
  2315. ioport = (BASE_PORT)pAdapterInfo->ai_baseaddr;
  2316. if (RD_HARPOON(ioport+hp_vendor_id_0) != ORION_VEND_0)
  2317. return(1);
  2318. if ((RD_HARPOON(ioport+hp_vendor_id_1) != ORION_VEND_1))
  2319. return(2);
  2320. if ((RD_HARPOON(ioport+hp_device_id_0) != ORION_DEV_0))
  2321. return(3);
  2322. if ((RD_HARPOON(ioport+hp_device_id_1) != ORION_DEV_1))
  2323. return(4);
  2324. if (RD_HARPOON(ioport+hp_rev_num) != 0x0f){
  2325. /* For new Harpoon then check for sub_device ID LSB
  2326. the bits(0-3) must be all ZERO for compatible with
  2327. current version of SCCBMgr, else skip this Harpoon
  2328. device. */
  2329. if (RD_HARPOON(ioport+hp_sub_device_id_0) & 0x0f)
  2330. return(5);
  2331. }
  2332. if (first_time) {
  2333. SccbMgrTableInitAll();
  2334. first_time = 0;
  2335. mbCards = 0;
  2336. }
  2337. if(RdStack(ioport, 0) != 0x00) {
  2338. if(ChkIfChipInitialized(ioport) == FALSE)
  2339. {
  2340. pCurrNvRam = NULL;
  2341. WR_HARPOON(ioport+hp_semaphore, 0x00);
  2342. XbowInit(ioport, 0); /*Must Init the SCSI before attempting */
  2343. DiagEEPROM(ioport);
  2344. }
  2345. else
  2346. {
  2347. if(mbCards < MAX_MB_CARDS) {
  2348. pCurrNvRam = &nvRamInfo[mbCards];
  2349. mbCards++;
  2350. pCurrNvRam->niBaseAddr = ioport;
  2351. RNVRamData(pCurrNvRam);
  2352. }else
  2353. return((int) FAILURE);
  2354. }
  2355. }else
  2356. pCurrNvRam = NULL;
  2357. #if defined (NO_BIOS_OPTION)
  2358. pCurrNvRam = NULL;
  2359. XbowInit(ioport, 0); /*Must Init the SCSI before attempting */
  2360. DiagEEPROM(ioport);
  2361. #endif /* No BIOS Option */
  2362. WR_HARPOON(ioport+hp_clkctrl_0, CLKCTRL_DEFAULT);
  2363. WR_HARPOON(ioport+hp_sys_ctrl, 0x00);
  2364. if(pCurrNvRam)
  2365. pAdapterInfo->ai_id = pCurrNvRam->niAdapId;
  2366. else
  2367. pAdapterInfo->ai_id = (u08bits)(utilEERead(ioport, (ADAPTER_SCSI_ID/2)) &
  2368. (u08bits)0x0FF);
  2369. pAdapterInfo->ai_lun = 0x00;
  2370. pAdapterInfo->ai_fw_revision[0] = '3';
  2371. pAdapterInfo->ai_fw_revision[1] = '1';
  2372. pAdapterInfo->ai_fw_revision[2] = '1';
  2373. pAdapterInfo->ai_fw_revision[3] = ' ';
  2374. pAdapterInfo->ai_NumChannels = 1;
  2375. temp2 = 0x0000;
  2376. temp3 = 0x0000;
  2377. temp4 = 0x0000;
  2378. for (id = 0; id < (16/2); id++) {
  2379. if(pCurrNvRam){
  2380. temp = (USHORT) pCurrNvRam->niSyncTbl[id];
  2381. temp = ((temp & 0x03) + ((temp << 4) & 0xc0)) +
  2382. (((temp << 4) & 0x0300) + ((temp << 8) & 0xc000));
  2383. }else
  2384. temp = utilEERead(ioport, (u16bits)((SYNC_RATE_TBL/2)+id));
  2385. for (i = 0; i < 2; temp >>=8,i++) {
  2386. if ((temp & 0x03) != AUTO_RATE_00) {
  2387. temp2 >>= 0x01;
  2388. temp2 |= 0x8000;
  2389. }
  2390. else {
  2391. temp2 >>= 0x01;
  2392. }
  2393. if (temp & DISC_ENABLE_BIT) {
  2394. temp3 >>= 0x01;
  2395. temp3 |= 0x8000;
  2396. }
  2397. else {
  2398. temp3 >>= 0x01;
  2399. }
  2400. if (temp & WIDE_NEGO_BIT) {
  2401. temp4 >>= 0x01;
  2402. temp4 |= 0x8000;
  2403. }
  2404. else {
  2405. temp4 >>= 0x01;
  2406. }
  2407. }
  2408. }
  2409. pAdapterInfo->ai_per_targ_init_sync = temp2;
  2410. pAdapterInfo->ai_per_targ_no_disc = temp3;
  2411. pAdapterInfo->ai_per_targ_wide_nego = temp4;
  2412. if(pCurrNvRam)
  2413. i = pCurrNvRam->niSysConf;
  2414. else
  2415. i = (u08bits)(utilEERead(ioport, (SYSTEM_CONFIG/2)));
  2416. /*
  2417. ** interrupts always level-triggered for FlashPoint
  2418. */
  2419. pAdapterInfo->ai_stateinfo |= LEVEL_TRIG;
  2420. if (i & 0x01)
  2421. pAdapterInfo->ai_stateinfo |= SCSI_PARITY_ENA;
  2422. if (i & 0x02) /* SCSI Bus reset in AutoSCSI Set ? */
  2423. {
  2424. if(pCurrNvRam)
  2425. {
  2426. j = pCurrNvRam->niScamConf;
  2427. }
  2428. else
  2429. {
  2430. j = (u08bits) utilEERead(ioport, SCAM_CONFIG/2);
  2431. }
  2432. if(j & SCAM_ENABLED)
  2433. {
  2434. if(j & SCAM_LEVEL2)
  2435. {
  2436. pAdapterInfo->ai_stateinfo |= SCAM2_ENA;
  2437. }
  2438. else
  2439. {
  2440. pAdapterInfo->ai_stateinfo |= SCAM1_ENA;
  2441. }
  2442. }
  2443. }
  2444. j = (RD_HARPOON(ioport+hp_bm_ctrl) & ~SCSI_TERM_ENA_L);
  2445. if (i & 0x04) {
  2446. j |= SCSI_TERM_ENA_L;
  2447. pAdapterInfo->ai_stateinfo |= LOW_BYTE_TERM_ENA;
  2448. }
  2449. WR_HARPOON(ioport+hp_bm_ctrl, j );
  2450. j = (RD_HARPOON(ioport+hp_ee_ctrl) & ~SCSI_TERM_ENA_H);
  2451. if (i & 0x08) {
  2452. j |= SCSI_TERM_ENA_H;
  2453. pAdapterInfo->ai_stateinfo |= HIGH_BYTE_TERM_ENA;
  2454. }
  2455. WR_HARPOON(ioport+hp_ee_ctrl, j );
  2456. if(RD_HARPOON(ioport + hp_page_ctrl) & BIOS_SHADOW)
  2457. {
  2458. pAdapterInfo->ai_FlashRomSize = 64 * 1024; /* 64k ROM */
  2459. }
  2460. else
  2461. {
  2462. pAdapterInfo->ai_FlashRomSize = 32 * 1024; /* 32k ROM */
  2463. }
  2464. pAdapterInfo->ai_stateinfo |= (FAST20_ENA | TAG_QUEUE_ENA);
  2465. if (!(RD_HARPOON(ioport+hp_page_ctrl) & NARROW_SCSI_CARD))
  2466. {
  2467. pAdapterInfo->ai_attributes |= (WIDE_CAPABLE | FAST20_CAPABLE
  2468. | SCAM2_CAPABLE
  2469. | TAG_QUEUE_CAPABLE
  2470. | SUPRESS_UNDERRRUNS_CAPABLE
  2471. | SCSI_PARITY_CAPABLE);
  2472. pAdapterInfo->ai_MaxTarg = 16;
  2473. pAdapterInfo->ai_MaxLun = 32;
  2474. }
  2475. else
  2476. {
  2477. pAdapterInfo->ai_attributes |= (FAST20_CAPABLE | SCAM2_CAPABLE
  2478. | TAG_QUEUE_CAPABLE
  2479. | SUPRESS_UNDERRRUNS_CAPABLE
  2480. | SCSI_PARITY_CAPABLE);
  2481. pAdapterInfo->ai_MaxTarg = 8;
  2482. pAdapterInfo->ai_MaxLun = 8;
  2483. }
  2484. pAdapterInfo->ai_product_family = HARPOON_FAMILY;
  2485. pAdapterInfo->ai_HBAbustype = BUSTYPE_PCI;
  2486. for (i=0;i<CARD_MODEL_NAMELEN;i++)
  2487. {
  2488. pAdapterInfo->ai_card_model[i]=' '; /* initialize the ai_card_model */
  2489. }
  2490. if(pCurrNvRam){
  2491. pAdapterInfo->ai_card_model[0] = '9';
  2492. switch(pCurrNvRam->niModel & 0x0f){
  2493. case MODEL_LT:
  2494. pAdapterInfo->ai_card_model[1] = '3';
  2495. pAdapterInfo->ai_card_model[2] = '0';
  2496. break;
  2497. case MODEL_LW:
  2498. pAdapterInfo->ai_card_model[1] = '5';
  2499. pAdapterInfo->ai_card_model[2] = '0';
  2500. break;
  2501. case MODEL_DL:
  2502. pAdapterInfo->ai_card_model[1] = '3';
  2503. pAdapterInfo->ai_card_model[2] = '2';
  2504. break;
  2505. case MODEL_DW:
  2506. pAdapterInfo->ai_card_model[1] = '5';
  2507. pAdapterInfo->ai_card_model[2] = '2';
  2508. break;
  2509. }
  2510. }else{
  2511. temp = utilEERead(ioport, (MODEL_NUMB_0/2));
  2512. pAdapterInfo->ai_card_model[0] = (u08bits)(temp >> 8);
  2513. temp = utilEERead(ioport, (MODEL_NUMB_2/2));
  2514. pAdapterInfo->ai_card_model[1] = (u08bits)(temp & 0x00FF);
  2515. pAdapterInfo->ai_card_model[2] = (u08bits)(temp >> 8);
  2516. }
  2517. pAdapterInfo->ai_FiberProductType = 0;
  2518. pAdapterInfo->ai_secondary_range = 0;
  2519. for (i=0;i<WORLD_WIDE_NAMELEN;i++)
  2520. {
  2521. pAdapterInfo->ai_worldwidename[i]='\0';
  2522. }
  2523. for (i=0;i<VENDOR_NAMELEN;i++)
  2524. {
  2525. pAdapterInfo->ai_vendorstring[i]='\0';
  2526. }
  2527. pAdapterInfo->ai_vendorstring[0]='B';
  2528. pAdapterInfo->ai_vendorstring[1]='U';
  2529. pAdapterInfo->ai_vendorstring[2]='S';
  2530. pAdapterInfo->ai_vendorstring[3]='L';
  2531. pAdapterInfo->ai_vendorstring[4]='O';
  2532. pAdapterInfo->ai_vendorstring[5]='G';
  2533. pAdapterInfo->ai_vendorstring[6]='I';
  2534. pAdapterInfo->ai_vendorstring[7]='C';
  2535. for (i=0;i<FAMILY_NAMELEN;i++)
  2536. {
  2537. pAdapterInfo->ai_AdapterFamilyString[i]='\0';
  2538. }
  2539. pAdapterInfo->ai_AdapterFamilyString[0]='F';
  2540. pAdapterInfo->ai_AdapterFamilyString[1]='L';
  2541. pAdapterInfo->ai_AdapterFamilyString[2]='A';
  2542. pAdapterInfo->ai_AdapterFamilyString[3]='S';
  2543. pAdapterInfo->ai_AdapterFamilyString[4]='H';
  2544. pAdapterInfo->ai_AdapterFamilyString[5]='P';
  2545. pAdapterInfo->ai_AdapterFamilyString[6]='O';
  2546. pAdapterInfo->ai_AdapterFamilyString[7]='I';
  2547. pAdapterInfo->ai_AdapterFamilyString[8]='N';
  2548. pAdapterInfo->ai_AdapterFamilyString[9]='T';
  2549. ARAM_ACCESS(ioport);
  2550. for ( i = 0; i < 4; i++ ) {
  2551. pAdapterInfo->ai_XlatInfo[i] =
  2552. RD_HARPOON(ioport+hp_aramBase+BIOS_DATA_OFFSET+i);
  2553. }
  2554. /* return with -1 if no sort, else return with
  2555. logical card number sorted by BIOS (zero-based) */
  2556. pAdapterInfo->ai_relative_cardnum =
  2557. (u08bits)(RD_HARPOON(ioport+hp_aramBase+BIOS_RELATIVE_CARD)-1);
  2558. SGRAM_ACCESS(ioport);
  2559. s_PhaseTbl[0] = phaseDataOut;
  2560. s_PhaseTbl[1] = phaseDataIn;
  2561. s_PhaseTbl[2] = phaseIllegal;
  2562. s_PhaseTbl[3] = phaseIllegal;
  2563. s_PhaseTbl[4] = phaseCommand;
  2564. s_PhaseTbl[5] = phaseStatus;
  2565. s_PhaseTbl[6] = phaseMsgOut;
  2566. s_PhaseTbl[7] = phaseMsgIn;
  2567. pAdapterInfo->ai_present = 0x01;
  2568. #if defined(BUGBUG)
  2569. for (i = 0; i < MAX_CARDS; i++) {
  2570. for (id=0; id<debug_size; id++)
  2571. debug_int[i][id] = (u08bits)0x00;
  2572. debug_index[i] = 0;
  2573. }
  2574. #endif
  2575. return(0);
  2576. }
  2577. /*---------------------------------------------------------------------
  2578. *
  2579. * Function: init_adapter, exported to BUDI via UCBMgr_init_adapter entry
  2580. *
  2581. *
  2582. * Description: Setup adapter for normal operation (hard reset).
  2583. *
  2584. *---------------------------------------------------------------------*/
  2585. STATIC CARD_HANDLE init_adapter(PADAPTER_INFO pCardInfo)
  2586. {
  2587. PSCCBcard CurrCard;
  2588. PNVRamInfo pCurrNvRam;
  2589. u08bits i,j,thisCard, ScamFlg;
  2590. u16bits temp,sync_bit_map,id;
  2591. BASE_PORT ioport;
  2592. ioport = (BASE_PORT)pCardInfo->ai_baseaddr;
  2593. for(thisCard =0; thisCard <= MAX_CARDS; thisCard++) {
  2594. if (thisCard == MAX_CARDS) {
  2595. return(FAILURE);
  2596. }
  2597. if (BL_Card[thisCard].ioPort == ioport) {
  2598. CurrCard = &BL_Card[thisCard];
  2599. SccbMgrTableInitCard(CurrCard,thisCard);
  2600. break;
  2601. }
  2602. else if (BL_Card[thisCard].ioPort == 0x00) {
  2603. BL_Card[thisCard].ioPort = ioport;
  2604. CurrCard = &BL_Card[thisCard];
  2605. if(mbCards)
  2606. for(i = 0; i < mbCards; i++){
  2607. if(CurrCard->ioPort == nvRamInfo[i].niBaseAddr)
  2608. CurrCard->pNvRamInfo = &nvRamInfo[i];
  2609. }
  2610. SccbMgrTableInitCard(CurrCard,thisCard);
  2611. CurrCard->cardIndex = thisCard;
  2612. CurrCard->cardInfo = pCardInfo;
  2613. break;
  2614. }
  2615. }
  2616. pCurrNvRam = CurrCard->pNvRamInfo;
  2617. if(pCurrNvRam){
  2618. ScamFlg = pCurrNvRam->niScamConf;
  2619. }
  2620. else{
  2621. ScamFlg = (UCHAR) utilEERead(ioport, SCAM_CONFIG/2);
  2622. }
  2623. BusMasterInit(ioport);
  2624. XbowInit(ioport, ScamFlg);
  2625. #if defined (NO_BIOS_OPTION)
  2626. if (DiagXbow(ioport)) return(FAILURE);
  2627. if (DiagBusMaster(ioport)) return(FAILURE);
  2628. #endif /* No BIOS Option */
  2629. autoLoadDefaultMap(ioport);
  2630. for (i = 0,id = 0x01; i != pCardInfo->ai_id; i++,id <<= 1){}
  2631. WR_HARPOON(ioport+hp_selfid_0, id);
  2632. WR_HARPOON(ioport+hp_selfid_1, 0x00);
  2633. WR_HARPOON(ioport+hp_arb_id, pCardInfo->ai_id);
  2634. CurrCard->ourId = (unsigned char) pCardInfo->ai_id;
  2635. i = (u08bits) pCardInfo->ai_stateinfo;
  2636. if (i & SCSI_PARITY_ENA)
  2637. WR_HARPOON(ioport+hp_portctrl_1,(HOST_MODE8 | CHK_SCSI_P));
  2638. j = (RD_HARPOON(ioport+hp_bm_ctrl) & ~SCSI_TERM_ENA_L);
  2639. if (i & LOW_BYTE_TERM_ENA)
  2640. j |= SCSI_TERM_ENA_L;
  2641. WR_HARPOON(ioport+hp_bm_ctrl, j);
  2642. j = (RD_HARPOON(ioport+hp_ee_ctrl) & ~SCSI_TERM_ENA_H);
  2643. if (i & HIGH_BYTE_TERM_ENA)
  2644. j |= SCSI_TERM_ENA_H;
  2645. WR_HARPOON(ioport+hp_ee_ctrl, j );
  2646. if (!(pCardInfo->ai_stateinfo & NO_RESET_IN_INIT)) {
  2647. sresb(ioport,thisCard);
  2648. scini(thisCard, (u08bits) pCardInfo->ai_id, 0);
  2649. }
  2650. if (pCardInfo->ai_stateinfo & SUPRESS_UNDERRRUNS_ENA)
  2651. CurrCard->globalFlags |= F_NO_FILTER;
  2652. if(pCurrNvRam){
  2653. if(pCurrNvRam->niSysConf & 0x10)
  2654. CurrCard->globalFlags |= F_GREEN_PC;
  2655. }
  2656. else{
  2657. if (utilEERead(ioport, (SYSTEM_CONFIG/2)) & GREEN_PC_ENA)
  2658. CurrCard->globalFlags |= F_GREEN_PC;
  2659. }
  2660. /* Set global flag to indicate Re-Negotiation to be done on all
  2661. ckeck condition */
  2662. if(pCurrNvRam){
  2663. if(pCurrNvRam->niScsiConf & 0x04)
  2664. CurrCard->globalFlags |= F_DO_RENEGO;
  2665. }
  2666. else{
  2667. if (utilEERead(ioport, (SCSI_CONFIG/2)) & RENEGO_ENA)
  2668. CurrCard->globalFlags |= F_DO_RENEGO;
  2669. }
  2670. if(pCurrNvRam){
  2671. if(pCurrNvRam->niScsiConf & 0x08)
  2672. CurrCard->globalFlags |= F_CONLUN_IO;
  2673. }
  2674. else{
  2675. if (utilEERead(ioport, (SCSI_CONFIG/2)) & CONNIO_ENA)
  2676. CurrCard->globalFlags |= F_CONLUN_IO;
  2677. }
  2678. temp = pCardInfo->ai_per_targ_no_disc;
  2679. for (i = 0,id = 1; i < MAX_SCSI_TAR; i++, id <<= 1) {
  2680. if (temp & id)
  2681. sccbMgrTbl[thisCard][i].TarStatus |= TAR_ALLOW_DISC;
  2682. }
  2683. sync_bit_map = 0x0001;
  2684. for (id = 0; id < (MAX_SCSI_TAR/2); id++){
  2685. if(pCurrNvRam){
  2686. temp = (USHORT) pCurrNvRam->niSyncTbl[id];
  2687. temp = ((temp & 0x03) + ((temp << 4) & 0xc0)) +
  2688. (((temp << 4) & 0x0300) + ((temp << 8) & 0xc000));
  2689. }else
  2690. temp = utilEERead(ioport, (u16bits)((SYNC_RATE_TBL/2)+id));
  2691. for (i = 0; i < 2; temp >>=8,i++){
  2692. if (pCardInfo->ai_per_targ_init_sync & sync_bit_map){
  2693. sccbMgrTbl[thisCard][id*2+i].TarEEValue = (u08bits)temp;
  2694. }
  2695. else {
  2696. sccbMgrTbl[thisCard][id*2+i].TarStatus |= SYNC_SUPPORTED;
  2697. sccbMgrTbl[thisCard][id*2+i].TarEEValue =
  2698. (u08bits)(temp & ~EE_SYNC_MASK);
  2699. }
  2700. #if defined(WIDE_SCSI)
  2701. /* if ((pCardInfo->ai_per_targ_wide_nego & sync_bit_map) ||
  2702. (id*2+i >= 8)){
  2703. */
  2704. if (pCardInfo->ai_per_targ_wide_nego & sync_bit_map){
  2705. sccbMgrTbl[thisCard][id*2+i].TarEEValue |= EE_WIDE_SCSI;
  2706. }
  2707. else { /* NARROW SCSI */
  2708. sccbMgrTbl[thisCard][id*2+i].TarStatus |= WIDE_NEGOCIATED;
  2709. }
  2710. #else
  2711. sccbMgrTbl[thisCard][id*2+i].TarStatus |= WIDE_NEGOCIATED;
  2712. #endif
  2713. sync_bit_map <<= 1;
  2714. }
  2715. }
  2716. pCardInfo->ai_SGListFormat=0x01;
  2717. pCardInfo->ai_DataPtrFormat=0x01;
  2718. pCardInfo->ai_AEN_mask &= SCSI_RESET_COMPLETE;
  2719. WR_HARPOON((ioport+hp_semaphore),
  2720. (u08bits)(RD_HARPOON((ioport+hp_semaphore)) | SCCB_MGR_PRESENT));
  2721. return((u32bits)CurrCard);
  2722. }
  2723. /*---------------------------------------------------------------------
  2724. *
  2725. * Function: build_ucb, exported to BUDI via UCBMgr_build_ucb entry
  2726. *
  2727. * Description: prepare fw portion of ucb. do not start, resource not guaranteed
  2728. * so don't manipulate anything that's derived from states which
  2729. * may change
  2730. *
  2731. *---------------------------------------------------------------------*/
  2732. void build_UCB(CARD_HANDLE pCurrCard, PUCB p_ucb)
  2733. {
  2734. u08bits thisCard;
  2735. u08bits i,j;
  2736. PSCCB p_sccb;
  2737. thisCard = ((PSCCBcard) pCurrCard)->cardIndex;
  2738. p_sccb=(PSCCB)p_ucb->UCB_MgrPrivatePtr;
  2739. p_sccb->Sccb_ucb_ptr=p_ucb;
  2740. switch (p_ucb->UCB_opcode & (OPC_DEVICE_RESET+OPC_XFER_SG+OPC_CHK_RESIDUAL))
  2741. {
  2742. case OPC_DEVICE_RESET:
  2743. p_sccb->OperationCode=RESET_COMMAND;
  2744. break;
  2745. case OPC_XFER_SG:
  2746. p_sccb->OperationCode=SCATTER_GATHER_COMMAND;
  2747. break;
  2748. case OPC_XFER_SG+OPC_CHK_RESIDUAL:
  2749. p_sccb->OperationCode=RESIDUAL_SG_COMMAND;
  2750. break;
  2751. case OPC_CHK_RESIDUAL:
  2752. p_sccb->OperationCode=RESIDUAL_COMMAND;
  2753. break;
  2754. default:
  2755. p_sccb->OperationCode=SCSI_INITIATOR_COMMAND;
  2756. break;
  2757. }
  2758. if (p_ucb->UCB_opcode & OPC_TQ_ENABLE)
  2759. {
  2760. p_sccb->ControlByte = (u08bits)((p_ucb->UCB_opcode & OPC_TQ_MASK)>>2) | F_USE_CMD_Q;
  2761. }
  2762. else
  2763. {
  2764. p_sccb->ControlByte = 0;
  2765. }
  2766. p_sccb->CdbLength = (u08bits)p_ucb->UCB_cdblen;
  2767. if (p_ucb->UCB_opcode & OPC_NO_AUTO_SENSE)
  2768. {
  2769. p_sccb->RequestSenseLength = 0;
  2770. }
  2771. else
  2772. {
  2773. p_sccb->RequestSenseLength = (unsigned char) p_ucb->UCB_senselen;
  2774. }
  2775. if (p_ucb->UCB_opcode & OPC_XFER_SG)
  2776. {
  2777. p_sccb->DataPointer=p_ucb->UCB_virt_dataptr;
  2778. p_sccb->DataLength = (((u32bits)p_ucb->UCB_NumSgElements)<<3);
  2779. }
  2780. else
  2781. {
  2782. p_sccb->DataPointer=p_ucb->UCB_phys_dataptr;
  2783. p_sccb->DataLength=p_ucb->UCB_datalen;
  2784. };
  2785. p_sccb->HostStatus=0;
  2786. p_sccb->TargetStatus=0;
  2787. p_sccb->TargID=(unsigned char)p_ucb->UCB_targid;
  2788. p_sccb->Lun=(unsigned char) p_ucb->UCB_lun;
  2789. p_sccb->SccbIOPort=((PSCCBcard)pCurrCard)->ioPort;
  2790. j=p_ucb->UCB_cdblen;
  2791. for (i=0;i<j;i++)
  2792. {
  2793. p_sccb->Cdb[i] = p_ucb->UCB_cdb[i];
  2794. }
  2795. p_sccb->SensePointer=p_ucb->UCB_phys_senseptr;
  2796. sinits(p_sccb,thisCard);
  2797. }
  2798. #ifndef NO_IOCTLS
  2799. /*---------------------------------------------------------------------
  2800. *
  2801. * Function: GetDevSyncRate
  2802. *
  2803. *---------------------------------------------------------------------*/
  2804. STATIC int GetDevSyncRate(PSCCBcard pCurrCard,PUCB p_ucb)
  2805. {
  2806. struct _SYNC_RATE_INFO * pSyncStr;
  2807. PSCCBMgr_tar_info currTar_Info;
  2808. BASE_PORT ioport;
  2809. u08bits scsiID, j;
  2810. #if (FW_TYPE != _SCCB_MGR_)
  2811. if( p_ucb->UCB_targid >= pCurrCard->cardInfo->ai_MaxTarg )
  2812. {
  2813. return(1);
  2814. }
  2815. #endif
  2816. ioport = pCurrCard->ioPort;
  2817. pSyncStr = (struct _SYNC_RATE_INFO *) p_ucb->UCB_virt_dataptr;
  2818. scsiID = (u08bits) p_ucb->UCB_targid;
  2819. currTar_Info = &sccbMgrTbl[pCurrCard->cardIndex][scsiID];
  2820. j = currTar_Info->TarSyncCtrl;
  2821. switch (currTar_Info->TarEEValue & EE_SYNC_MASK)
  2822. {
  2823. case EE_SYNC_ASYNC:
  2824. pSyncStr->RequestMegaXferRate = 0x00;
  2825. break;
  2826. case EE_SYNC_5MB:
  2827. pSyncStr->RequestMegaXferRate = (j & NARROW_SCSI) ? 50 : 100;
  2828. break;
  2829. case EE_SYNC_10MB:
  2830. pSyncStr->RequestMegaXferRate = (j & NARROW_SCSI) ? 100 : 200;
  2831. break;
  2832. case EE_SYNC_20MB:
  2833. pSyncStr->RequestMegaXferRate = (j & NARROW_SCSI) ? 200 : 400;
  2834. break;
  2835. }
  2836. switch ((j >> 5) & 0x07)
  2837. {
  2838. case 0x00:
  2839. if((j & 0x07) == 0x00)
  2840. {
  2841. pSyncStr->ActualMegaXferRate = 0x00; /* Async Mode */
  2842. }
  2843. else
  2844. {
  2845. pSyncStr->ActualMegaXferRate = (j & NARROW_SCSI) ? 200 : 400;
  2846. }
  2847. break;
  2848. case 0x01:
  2849. pSyncStr->ActualMegaXferRate = (j & NARROW_SCSI) ? 100 : 200;
  2850. break;
  2851. case 0x02:
  2852. pSyncStr->ActualMegaXferRate = (j & NARROW_SCSI) ? 66 : 122;
  2853. break;
  2854. case 0x03:
  2855. pSyncStr->ActualMegaXferRate = (j & NARROW_SCSI) ? 50 : 100;
  2856. break;
  2857. case 0x04:
  2858. pSyncStr->ActualMegaXferRate = (j & NARROW_SCSI) ? 40 : 80;
  2859. break;
  2860. case 0x05:
  2861. pSyncStr->ActualMegaXferRate = (j & NARROW_SCSI) ? 33 : 66;
  2862. break;
  2863. case 0x06:
  2864. pSyncStr->ActualMegaXferRate = (j & NARROW_SCSI) ? 28 : 56;
  2865. break;
  2866. case 0x07:
  2867. pSyncStr->ActualMegaXferRate = (j & NARROW_SCSI) ? 25 : 50;
  2868. break;
  2869. }
  2870. pSyncStr->NegotiatedOffset = j & 0x0f;
  2871. return(0);
  2872. }
  2873. /*---------------------------------------------------------------------
  2874. *
  2875. * Function: SetDevSyncRate
  2876. *
  2877. *---------------------------------------------------------------------*/
  2878. STATIC int SetDevSyncRate(PSCCBcard pCurrCard, PUCB p_ucb)
  2879. {
  2880. struct _SYNC_RATE_INFO * pSyncStr;
  2881. PSCCBMgr_tar_info currTar_Info;
  2882. BASE_PORT ioPort;
  2883. u08bits scsiID, i, j, syncVal;
  2884. u16bits syncOffset, actualXferRate;
  2885. union {
  2886. u08bits tempb[2];
  2887. u16bits tempw;
  2888. }temp2;
  2889. #if (FW_TYPE != _SCCB_MGR_)
  2890. if( p_ucb->UCB_targid >= pCurrCard->cardInfo->ai_MaxTarg )
  2891. {
  2892. return(1);
  2893. }
  2894. #endif
  2895. ioPort = pCurrCard->ioPort;
  2896. pSyncStr = (struct _SYNC_RATE_INFO *) p_ucb->UCB_virt_dataptr;
  2897. scsiID = (u08bits) p_ucb->UCB_targid;
  2898. currTar_Info = &sccbMgrTbl[pCurrCard->cardIndex][scsiID];
  2899. i = RD_HARPOON(ioPort+hp_xfer_pad); /* Save current value */
  2900. WR_HARPOON(ioPort+hp_xfer_pad, (i | ID_UNLOCK));
  2901. WR_HARPOON(ioPort+hp_select_id, ((scsiID << 4) | scsiID));
  2902. j = RD_HARPOON(ioPort+hp_synctarg_0);
  2903. WR_HARPOON(ioPort+hp_xfer_pad, i); /* restore value */
  2904. actualXferRate = pSyncStr->ActualMegaXferRate;
  2905. if(!(j & NARROW_SCSI))
  2906. {
  2907. actualXferRate <<= 1;
  2908. }
  2909. if(actualXferRate == 0x00)
  2910. {
  2911. syncVal = EE_SYNC_ASYNC; /* Async Mode */
  2912. }
  2913. if(actualXferRate == 0x0200)
  2914. {
  2915. syncVal = EE_SYNC_20MB; /* 20/40 MB Mode */
  2916. }
  2917. if(actualXferRate > 0x0050 && actualXferRate < 0x0200 )
  2918. {
  2919. syncVal = EE_SYNC_10MB; /* 10/20 MB Mode */
  2920. }
  2921. else
  2922. {
  2923. syncVal = EE_SYNC_5MB; /* 5/10 MB Mode */
  2924. }
  2925. if(currTar_Info->TarEEValue && EE_SYNC_MASK == syncVal)
  2926. return(0);
  2927. currTar_Info->TarEEValue = (currTar_Info->TarEEValue & !EE_SYNC_MASK)
  2928. | syncVal;
  2929. syncOffset = (SYNC_RATE_TBL + scsiID) / 2;
  2930. temp2.tempw = utilEERead(ioPort, syncOffset);
  2931. if(scsiID & 0x01)
  2932. {
  2933. temp2.tempb[0] = (temp2.tempb[0] & !EE_SYNC_MASK) | syncVal;
  2934. }
  2935. else
  2936. {
  2937. temp2.tempb[1] = (temp2.tempb[1] & !EE_SYNC_MASK) | syncVal;
  2938. }
  2939. utilEEWriteOnOff(ioPort, 1);
  2940. utilEEWrite(ioPort, temp2.tempw, syncOffset);
  2941. utilEEWriteOnOff(ioPort, 0);
  2942. UpdateCheckSum(ioPort);
  2943. return(0);
  2944. }
  2945. /*---------------------------------------------------------------------
  2946. *
  2947. * Function: GetDevWideMode
  2948. *
  2949. *---------------------------------------------------------------------*/
  2950. int GetDevWideMode(PSCCBcard pCurrCard,PUCB p_ucb)
  2951. {
  2952. u08bits *pData;
  2953. pData = (u08bits *)p_ucb->UCB_virt_dataptr;
  2954. if(sccbMgrTbl[pCurrCard->cardIndex][p_ucb->UCB_targid].TarEEValue
  2955. & EE_WIDE_SCSI)
  2956. {
  2957. *pData = 1;
  2958. }
  2959. else
  2960. {
  2961. *pData = 0;
  2962. }
  2963. return(0);
  2964. }
  2965. /*---------------------------------------------------------------------
  2966. *
  2967. * Function: SetDevWideMode
  2968. *
  2969. *---------------------------------------------------------------------*/
  2970. int SetDevWideMode(PSCCBcard pCurrCard,PUCB p_ucb)
  2971. {
  2972. u08bits *pData;
  2973. PSCCBMgr_tar_info currTar_Info;
  2974. BASE_PORT ioPort;
  2975. u08bits scsiID, scsiWideMode;
  2976. u16bits syncOffset;
  2977. union {
  2978. u08bits tempb[2];
  2979. u16bits tempw;
  2980. }temp2;
  2981. #if (FW_TYPE != _SCCB_MGR_)
  2982. if( !(pCurrCard->cardInfo->ai_attributes & WIDE_CAPABLE) )
  2983. {
  2984. return(1);
  2985. }
  2986. if( p_ucb->UCB_targid >= pCurrCard->cardInfo->ai_MaxTarg )
  2987. {
  2988. return(1);
  2989. }
  2990. #endif
  2991. ioPort = pCurrCard->ioPort;
  2992. pData = (u08bits *)p_ucb->UCB_virt_dataptr;
  2993. scsiID = (u08bits) p_ucb->UCB_targid;
  2994. currTar_Info = &sccbMgrTbl[pCurrCard->cardIndex][scsiID];
  2995. if(*pData)
  2996. {
  2997. if(currTar_Info->TarEEValue & EE_WIDE_SCSI)
  2998. {
  2999. return(0);
  3000. }
  3001. else
  3002. {
  3003. scsiWideMode = EE_WIDE_SCSI;
  3004. }
  3005. }
  3006. else
  3007. {
  3008. if(!(currTar_Info->TarEEValue & EE_WIDE_SCSI))
  3009. {
  3010. return(0);
  3011. }
  3012. else
  3013. {
  3014. scsiWideMode = 0;
  3015. }
  3016. }
  3017. currTar_Info->TarEEValue = (currTar_Info->TarEEValue & !EE_WIDE_SCSI)
  3018. | scsiWideMode;
  3019. syncOffset = (SYNC_RATE_TBL + scsiID) / 2;
  3020. temp2.tempw = utilEERead(ioPort, syncOffset);
  3021. if(scsiID & 0x01)
  3022. {
  3023. temp2.tempb[0] = (temp2.tempb[0] & !EE_WIDE_SCSI) | scsiWideMode;
  3024. }
  3025. else
  3026. {
  3027. temp2.tempb[1] = (temp2.tempb[1] & !EE_WIDE_SCSI) | scsiWideMode;
  3028. }
  3029. utilEEWriteOnOff(ioPort, 1);
  3030. utilEEWrite(ioPort, temp2.tempw, syncOffset);
  3031. utilEEWriteOnOff(ioPort, 0);
  3032. UpdateCheckSum(ioPort);
  3033. return(0);
  3034. }
  3035. /*---------------------------------------------------------------------
  3036. *
  3037. * Function: ReadNVRam
  3038. *
  3039. *---------------------------------------------------------------------*/
  3040. void ReadNVRam(PSCCBcard pCurrCard,PUCB p_ucb)
  3041. {
  3042. u08bits *pdata;
  3043. u16bits i,numwrds,numbytes,offset,temp;
  3044. u08bits OneMore = FALSE;
  3045. #if defined(DOS)
  3046. u16bits ioport;
  3047. #else
  3048. u32bits ioport;
  3049. #endif
  3050. numbytes = (u16bits) p_ucb->UCB_datalen;
  3051. ioport = pCurrCard->ioPort;
  3052. pdata = (u08bits *) p_ucb->UCB_virt_dataptr;
  3053. offset = (u16bits) (p_ucb->UCB_IOCTLParams[0]);
  3054. if (offset & 0x1)
  3055. {
  3056. *((u16bits*) pdata) = utilEERead(ioport,(u16bits)((offset - 1) / 2)); /* 16 bit read */
  3057. *pdata = *(pdata + 1);
  3058. ++offset;
  3059. ++pdata;
  3060. --numbytes;
  3061. }
  3062. numwrds = numbytes / 2;
  3063. if (numbytes & 1)
  3064. OneMore = TRUE;
  3065. for (i = 0; i < numwrds; i++)
  3066. {
  3067. *((u16bits*) pdata) = utilEERead(ioport,(u16bits)(offset / 2));
  3068. pdata += 2;
  3069. offset += 2;
  3070. }
  3071. if (OneMore)
  3072. {
  3073. --pdata;
  3074. -- offset;
  3075. temp = utilEERead(ioport,(u16bits)(offset / 2));
  3076. *pdata = (u08bits) (temp);
  3077. }
  3078. } /* end proc ReadNVRam */
  3079. /*---------------------------------------------------------------------
  3080. *
  3081. * Function: WriteNVRam
  3082. *
  3083. *---------------------------------------------------------------------*/
  3084. void WriteNVRam(PSCCBcard pCurrCard,PUCB p_ucb)
  3085. {
  3086. u08bits *pdata;
  3087. u16bits i,numwrds,numbytes,offset, eeprom_end;
  3088. u08bits OneMore = FALSE;
  3089. union {
  3090. u08bits tempb[2];
  3091. u16bits tempw;
  3092. } temp2;
  3093. #if defined(DOS)
  3094. u16bits ioport;
  3095. #else
  3096. u32bits ioport;
  3097. #endif
  3098. numbytes = (u16bits) p_ucb->UCB_datalen;
  3099. ioport = pCurrCard->ioPort;
  3100. pdata = (u08bits *) p_ucb->UCB_virt_dataptr;
  3101. offset = (u16bits) (p_ucb->UCB_IOCTLParams[0]);
  3102. if (RD_HARPOON(ioport+hp_page_ctrl) & NARROW_SCSI_CARD)
  3103. eeprom_end = 512;
  3104. else
  3105. eeprom_end = 768;
  3106. if(offset > eeprom_end)
  3107. return;
  3108. if((offset + numbytes) > eeprom_end)
  3109. numbytes = eeprom_end - offset;
  3110. utilEEWriteOnOff(ioport,1); /* Enable write access to the EEPROM */
  3111. if (offset & 0x1)
  3112. {
  3113. temp2.tempw = utilEERead(ioport,(u16bits)((offset - 1) / 2)); /* 16 bit read */
  3114. temp2.tempb[1] = *pdata;
  3115. utilEEWrite(ioport, temp2.tempw, (u16bits)((offset -1) / 2));
  3116. *pdata = *(pdata + 1);
  3117. ++offset;
  3118. ++pdata;
  3119. --numbytes;
  3120. }
  3121. numwrds = numbytes / 2;
  3122. if (numbytes & 1)
  3123. OneMore = TRUE;
  3124. for (i = 0; i < numwrds; i++)
  3125. {
  3126. utilEEWrite(ioport, *((pu16bits)pdata),(u16bits)(offset / 2));
  3127. pdata += 2;
  3128. offset += 2;
  3129. }
  3130. if (OneMore)
  3131. {
  3132. temp2.tempw = utilEERead(ioport,(u16bits)(offset / 2));
  3133. temp2.tempb[0] = *pdata;
  3134. utilEEWrite(ioport, temp2.tempw, (u16bits)(offset / 2));
  3135. }
  3136. utilEEWriteOnOff(ioport,0); /* Turn off write access */
  3137. UpdateCheckSum((u32bits)ioport);
  3138. } /* end proc WriteNVRam */
  3139. /*---------------------------------------------------------------------
  3140. *
  3141. * Function: UpdateCheckSum
  3142. *
  3143. * Description: Update Check Sum in EEPROM
  3144. *
  3145. *---------------------------------------------------------------------*/
  3146. void UpdateCheckSum(u32bits baseport)
  3147. {
  3148. USHORT i,sum_data, eeprom_end;
  3149. sum_data = 0x0000;
  3150. if (RD_HARPOON(baseport+hp_page_ctrl) & NARROW_SCSI_CARD)
  3151. eeprom_end = 512;
  3152. else
  3153. eeprom_end = 768;
  3154. for (i = 1; i < eeprom_end/2; i++)
  3155. {
  3156. sum_data += utilEERead(baseport, i);
  3157. }
  3158. utilEEWriteOnOff(baseport,1); /* Enable write access to the EEPROM */
  3159. utilEEWrite(baseport, sum_data, EEPROM_CHECK_SUM/2);
  3160. utilEEWriteOnOff(baseport,0); /* Turn off write access */
  3161. }
  3162. void SccbMgr_save_foreign_state(PADAPTER_INFO pAdapterInfo)
  3163. {
  3164. }
  3165. void SccbMgr_restore_foreign_state(CARD_HANDLE pCurrCard)
  3166. {
  3167. }
  3168. void SccbMgr_restore_native_state(CARD_HANDLE pCurrCard)
  3169. {
  3170. }
  3171. #endif /* NO_IOCTLS */
  3172. #endif /* (FW_TYPE==_UCB_MGR_) */
  3173. #ifndef NO_IOCTLS
  3174. #if (FW_TYPE==_UCB_MGR_)
  3175. void SccbMgr_unload_card(CARD_HANDLE pCurrCard)
  3176. #else
  3177. #if defined(DOS)
  3178. void SccbMgr_unload_card(USHORT pCurrCard)
  3179. #else
  3180. void SccbMgr_unload_card(ULONG pCurrCard)
  3181. #endif
  3182. #endif
  3183. {
  3184. UCHAR i;
  3185. #if defined(DOS)
  3186. USHORT portBase;
  3187. USHORT regOffset;
  3188. #else
  3189. ULONG portBase;
  3190. ULONG regOffset;
  3191. #endif
  3192. ULONG scamData;
  3193. #if defined(OS2)
  3194. ULONG far *pScamTbl;
  3195. #else
  3196. ULONG *pScamTbl;
  3197. #endif
  3198. PNVRamInfo pCurrNvRam;
  3199. pCurrNvRam = ((PSCCBcard)pCurrCard)->pNvRamInfo;
  3200. if(pCurrNvRam){
  3201. WrStack(pCurrNvRam->niBaseAddr, 0, pCurrNvRam->niModel);
  3202. WrStack(pCurrNvRam->niBaseAddr, 1, pCurrNvRam->niSysConf);
  3203. WrStack(pCurrNvRam->niBaseAddr, 2, pCurrNvRam->niScsiConf);
  3204. WrStack(pCurrNvRam->niBaseAddr, 3, pCurrNvRam->niScamConf);
  3205. WrStack(pCurrNvRam->niBaseAddr, 4, pCurrNvRam->niAdapId);
  3206. for(i = 0; i < MAX_SCSI_TAR / 2; i++)
  3207. WrStack(pCurrNvRam->niBaseAddr, (UCHAR)(i+5), pCurrNvRam->niSyncTbl[i]);
  3208. portBase = pCurrNvRam->niBaseAddr;
  3209. for(i = 0; i < MAX_SCSI_TAR; i++){
  3210. regOffset = hp_aramBase + 64 + i*4;
  3211. #if defined(OS2)
  3212. pScamTbl = (ULONG far *) &pCurrNvRam->niScamTbl[i];
  3213. #else
  3214. pScamTbl = (ULONG *) &pCurrNvRam->niScamTbl[i];
  3215. #endif
  3216. scamData = *pScamTbl;
  3217. WR_HARP32(portBase, regOffset, scamData);
  3218. }
  3219. }else{
  3220. WrStack(((PSCCBcard)pCurrCard)->ioPort, 0, 0);
  3221. }
  3222. }
  3223. #endif /* NO_IOCTLS */
  3224. void RNVRamData(PNVRamInfo pNvRamInfo)
  3225. {
  3226. UCHAR i;
  3227. #if defined(DOS)
  3228. USHORT portBase;
  3229. USHORT regOffset;
  3230. #else
  3231. ULONG portBase;
  3232. ULONG regOffset;
  3233. #endif
  3234. ULONG scamData;
  3235. #if defined (OS2)
  3236. ULONG far *pScamTbl;
  3237. #else
  3238. ULONG *pScamTbl;
  3239. #endif
  3240. pNvRamInfo->niModel = RdStack(pNvRamInfo->niBaseAddr, 0);
  3241. pNvRamInfo->niSysConf = RdStack(pNvRamInfo->niBaseAddr, 1);
  3242. pNvRamInfo->niScsiConf = RdStack(pNvRamInfo->niBaseAddr, 2);
  3243. pNvRamInfo->niScamConf = RdStack(pNvRamInfo->niBaseAddr, 3);
  3244. pNvRamInfo->niAdapId = RdStack(pNvRamInfo->niBaseAddr, 4);
  3245. for(i = 0; i < MAX_SCSI_TAR / 2; i++)
  3246. pNvRamInfo->niSyncTbl[i] = RdStack(pNvRamInfo->niBaseAddr, (UCHAR)(i+5));
  3247. portBase = pNvRamInfo->niBaseAddr;
  3248. for(i = 0; i < MAX_SCSI_TAR; i++){
  3249. regOffset = hp_aramBase + 64 + i*4;
  3250. RD_HARP32(portBase, regOffset, scamData);
  3251. #if defined(OS2)
  3252. pScamTbl = (ULONG far *) &pNvRamInfo->niScamTbl[i];
  3253. #else
  3254. pScamTbl = (ULONG *) &pNvRamInfo->niScamTbl[i];
  3255. #endif
  3256. *pScamTbl = scamData;
  3257. }
  3258. }
  3259. #if defined(DOS)
  3260. UCHAR RdStack(USHORT portBase, UCHAR index)
  3261. #else
  3262. UCHAR RdStack(ULONG portBase, UCHAR index)
  3263. #endif
  3264. {
  3265. WR_HARPOON(portBase + hp_stack_addr, index);
  3266. return(RD_HARPOON(portBase + hp_stack_data));
  3267. }
  3268. #if defined(DOS)
  3269. void WrStack(USHORT portBase, UCHAR index, UCHAR data)
  3270. #else
  3271. void WrStack(ULONG portBase, UCHAR index, UCHAR data)
  3272. #endif
  3273. {
  3274. WR_HARPOON(portBase + hp_stack_addr, index);
  3275. WR_HARPOON(portBase + hp_stack_data, data);
  3276. }
  3277. #if (FW_TYPE==_UCB_MGR_)
  3278. u08bits ChkIfChipInitialized(BASE_PORT ioPort)
  3279. #else
  3280. #if defined(DOS)
  3281. UCHAR ChkIfChipInitialized(USHORT ioPort)
  3282. #else
  3283. UCHAR ChkIfChipInitialized(ULONG ioPort)
  3284. #endif
  3285. #endif
  3286. {
  3287. if((RD_HARPOON(ioPort + hp_arb_id) & 0x0f) != RdStack(ioPort, 4))
  3288. return(FALSE);
  3289. if((RD_HARPOON(ioPort + hp_clkctrl_0) & CLKCTRL_DEFAULT)
  3290. != CLKCTRL_DEFAULT)
  3291. return(FALSE);
  3292. if((RD_HARPOON(ioPort + hp_seltimeout) == TO_250ms) ||
  3293. (RD_HARPOON(ioPort + hp_seltimeout) == TO_290ms))
  3294. return(TRUE);
  3295. return(FALSE);
  3296. }
  3297. /*---------------------------------------------------------------------
  3298. *
  3299. * Function: SccbMgr_start_sccb
  3300. *
  3301. * Description: Start a command pointed to by p_Sccb. When the
  3302. * command is completed it will be returned via the
  3303. * callback function.
  3304. *
  3305. *---------------------------------------------------------------------*/
  3306. #if (FW_TYPE==_UCB_MGR_)
  3307. void SccbMgr_start_sccb(CARD_HANDLE pCurrCard, PUCB p_ucb)
  3308. #else
  3309. #if defined(DOS)
  3310. void SccbMgr_start_sccb(USHORT pCurrCard, PSCCB p_Sccb)
  3311. #else
  3312. void SccbMgr_start_sccb(ULONG pCurrCard, PSCCB p_Sccb)
  3313. #endif
  3314. #endif
  3315. {
  3316. #if defined(DOS)
  3317. USHORT ioport;
  3318. #else
  3319. ULONG ioport;
  3320. #endif
  3321. UCHAR thisCard, lun;
  3322. PSCCB pSaveSccb;
  3323. CALL_BK_FN callback;
  3324. #if (FW_TYPE==_UCB_MGR_)
  3325. PSCCB p_Sccb;
  3326. #endif
  3327. mOS_Lock((PSCCBcard)pCurrCard);
  3328. thisCard = ((PSCCBcard) pCurrCard)->cardIndex;
  3329. ioport = ((PSCCBcard) pCurrCard)->ioPort;
  3330. #if (FW_TYPE==_UCB_MGR_)
  3331. p_Sccb = (PSCCB)p_ucb->UCB_MgrPrivatePtr;
  3332. #endif
  3333. if((p_Sccb->TargID > MAX_SCSI_TAR) || (p_Sccb->Lun > MAX_LUN))
  3334. {
  3335. #if (FW_TYPE==_UCB_MGR_)
  3336. p_ucb->UCB_hbastat = SCCB_COMPLETE;
  3337. p_ucb->UCB_status=SCCB_ERROR;
  3338. callback = (CALL_BK_FN)p_ucb->UCB_callback;
  3339. if (callback)
  3340. callback(p_ucb);
  3341. #endif
  3342. #if (FW_TYPE==_SCCB_MGR_)
  3343. p_Sccb->HostStatus = SCCB_COMPLETE;
  3344. p_Sccb->SccbStatus = SCCB_ERROR;
  3345. callback = (CALL_BK_FN)p_Sccb->SccbCallback;
  3346. if (callback)
  3347. callback(p_Sccb);
  3348. #endif
  3349. mOS_UnLock((PSCCBcard)pCurrCard);
  3350. return;
  3351. }
  3352. #if (FW_TYPE==_SCCB_MGR_)
  3353. sinits(p_Sccb,thisCard);
  3354. #endif
  3355. #if (FW_TYPE==_UCB_MGR_)
  3356. #ifndef NO_IOCTLS
  3357. if (p_ucb->UCB_opcode & OPC_IOCTL)
  3358. {
  3359. switch (p_ucb->UCB_IOCTLCommand)
  3360. {
  3361. case READ_NVRAM:
  3362. ReadNVRam((PSCCBcard)pCurrCard,p_ucb);
  3363. p_ucb->UCB_status=UCB_SUCCESS;
  3364. callback = (CALL_BK_FN)p_ucb->UCB_callback;
  3365. if (callback)
  3366. callback(p_ucb);
  3367. mOS_UnLock((PSCCBcard)pCurrCard);
  3368. return;
  3369. case WRITE_NVRAM:
  3370. WriteNVRam((PSCCBcard)pCurrCard,p_ucb);
  3371. p_ucb->UCB_status=UCB_SUCCESS;
  3372. callback = (CALL_BK_FN)p_ucb->UCB_callback;
  3373. if (callback)
  3374. callback(p_ucb);
  3375. mOS_UnLock((PSCCBcard)pCurrCard);
  3376. return;
  3377. case SEND_SCSI_PASSTHRU:
  3378. #if (FW_TYPE != _SCCB_MGR_)
  3379. if( p_ucb->UCB_targid >=
  3380. ((PSCCBcard)pCurrCard)->cardInfo->ai_MaxTarg )
  3381. {
  3382. p_ucb->UCB_status = UCB_ERROR;
  3383. p_ucb->UCB_hbastat = HASTAT_HW_ERROR;
  3384. callback = (CALL_BK_FN)p_ucb->UCB_callback;
  3385. if (callback)
  3386. callback(p_ucb);
  3387. mOS_UnLock((PSCCBcard)pCurrCard);
  3388. return;
  3389. }
  3390. #endif
  3391. break;
  3392. case HARD_RESET:
  3393. p_ucb->UCB_status = UCB_INVALID;
  3394. callback = (CALL_BK_FN)p_ucb->UCB_callback;
  3395. if (callback)
  3396. callback(p_ucb);
  3397. mOS_UnLock((PSCCBcard)pCurrCard);
  3398. return;
  3399. case GET_DEVICE_SYNCRATE:
  3400. if( !GetDevSyncRate((PSCCBcard)pCurrCard,p_ucb) )
  3401. {
  3402. p_ucb->UCB_status = UCB_SUCCESS;
  3403. }
  3404. else
  3405. {
  3406. p_ucb->UCB_status = UCB_ERROR;
  3407. p_ucb->UCB_hbastat = HASTAT_HW_ERROR;
  3408. }
  3409. callback = (CALL_BK_FN)p_ucb->UCB_callback;
  3410. if (callback)
  3411. callback(p_ucb);
  3412. mOS_UnLock((PSCCBcard)pCurrCard);
  3413. return;
  3414. case SET_DEVICE_SYNCRATE:
  3415. if( !SetDevSyncRate((PSCCBcard)pCurrCard,p_ucb) )
  3416. {
  3417. p_ucb->UCB_status = UCB_SUCCESS;
  3418. }
  3419. else
  3420. {
  3421. p_ucb->UCB_status = UCB_ERROR;
  3422. p_ucb->UCB_hbastat = HASTAT_HW_ERROR;
  3423. }
  3424. callback = (CALL_BK_FN)p_ucb->UCB_callback;
  3425. if (callback)
  3426. callback(p_ucb);
  3427. mOS_UnLock((PSCCBcard)pCurrCard);
  3428. return;
  3429. case GET_WIDE_MODE:
  3430. if( !GetDevWideMode((PSCCBcard)pCurrCard,p_ucb) )
  3431. {
  3432. p_ucb->UCB_status = UCB_SUCCESS;
  3433. }
  3434. else
  3435. {
  3436. p_ucb->UCB_status = UCB_ERROR;
  3437. p_ucb->UCB_hbastat = HASTAT_HW_ERROR;
  3438. }
  3439. callback = (CALL_BK_FN)p_ucb->UCB_callback;
  3440. if (callback)
  3441. callback(p_ucb);
  3442. mOS_UnLock((PSCCBcard)pCurrCard);
  3443. return;
  3444. case SET_WIDE_MODE:
  3445. if( !SetDevWideMode((PSCCBcard)pCurrCard,p_ucb) )
  3446. {
  3447. p_ucb->UCB_status = UCB_SUCCESS;
  3448. }
  3449. else
  3450. {
  3451. p_ucb->UCB_status = UCB_ERROR;
  3452. p_ucb->UCB_hbastat = HASTAT_HW_ERROR;
  3453. }
  3454. callback = (CALL_BK_FN)p_ucb->UCB_callback;
  3455. if (callback)
  3456. callback(p_ucb);
  3457. mOS_UnLock((PSCCBcard)pCurrCard);
  3458. return;
  3459. default:
  3460. p_ucb->UCB_status=UCB_INVALID;
  3461. callback = (CALL_BK_FN)p_ucb->UCB_callback;
  3462. if (callback)
  3463. callback(p_ucb);
  3464. mOS_UnLock((PSCCBcard)pCurrCard);
  3465. return;
  3466. }
  3467. }
  3468. #endif /* NO_IOCTLS */
  3469. #endif /* (FW_TYPE==_UCB_MGR_) */
  3470. if (!((PSCCBcard) pCurrCard)->cmdCounter)
  3471. {
  3472. WR_HARPOON(ioport+hp_semaphore, (RD_HARPOON(ioport+hp_semaphore)
  3473. | SCCB_MGR_ACTIVE));
  3474. if (((PSCCBcard) pCurrCard)->globalFlags & F_GREEN_PC)
  3475. {
  3476. WR_HARPOON(ioport+hp_clkctrl_0, CLKCTRL_DEFAULT);
  3477. WR_HARPOON(ioport+hp_sys_ctrl, 0x00);
  3478. }
  3479. }
  3480. ((PSCCBcard)pCurrCard)->cmdCounter++;
  3481. if (RD_HARPOON(ioport+hp_semaphore) & BIOS_IN_USE) {
  3482. WR_HARPOON(ioport+hp_semaphore, (RD_HARPOON(ioport+hp_semaphore)
  3483. | TICKLE_ME));
  3484. if(p_Sccb->OperationCode == RESET_COMMAND)
  3485. {
  3486. pSaveSccb = ((PSCCBcard) pCurrCard)->currentSCCB;
  3487. ((PSCCBcard) pCurrCard)->currentSCCB = p_Sccb;
  3488. queueSelectFail(&BL_Card[thisCard], thisCard);
  3489. ((PSCCBcard) pCurrCard)->currentSCCB = pSaveSccb;
  3490. }
  3491. else
  3492. {
  3493. queueAddSccb(p_Sccb,thisCard);
  3494. }
  3495. }
  3496. else if ((RD_HARPOON(ioport+hp_page_ctrl) & G_INT_DISABLE)) {
  3497. if(p_Sccb->OperationCode == RESET_COMMAND)
  3498. {
  3499. pSaveSccb = ((PSCCBcard) pCurrCard)->currentSCCB;
  3500. ((PSCCBcard) pCurrCard)->currentSCCB = p_Sccb;
  3501. queueSelectFail(&BL_Card[thisCard], thisCard);
  3502. ((PSCCBcard) pCurrCard)->currentSCCB = pSaveSccb;
  3503. }
  3504. else
  3505. {
  3506. queueAddSccb(p_Sccb,thisCard);
  3507. }
  3508. }
  3509. else {
  3510. MDISABLE_INT(ioport);
  3511. if((((PSCCBcard) pCurrCard)->globalFlags & F_CONLUN_IO) &&
  3512. ((sccbMgrTbl[thisCard][p_Sccb->TargID].TarStatus & TAR_TAG_Q_MASK) != TAG_Q_TRYING))
  3513. lun = p_Sccb->Lun;
  3514. else
  3515. lun = 0;
  3516. if ((((PSCCBcard) pCurrCard)->currentSCCB == NULL) &&
  3517. (sccbMgrTbl[thisCard][p_Sccb->TargID].TarSelQ_Cnt == 0) &&
  3518. (sccbMgrTbl[thisCard][p_Sccb->TargID].TarLUNBusy[lun]
  3519. == FALSE)) {
  3520. ((PSCCBcard) pCurrCard)->currentSCCB = p_Sccb;
  3521. mOS_UnLock((PSCCBcard)pCurrCard);
  3522. #if defined(DOS)
  3523. ssel((USHORT)p_Sccb->SccbIOPort,thisCard);
  3524. #else
  3525. ssel(p_Sccb->SccbIOPort,thisCard);
  3526. #endif
  3527. mOS_Lock((PSCCBcard)pCurrCard);
  3528. }
  3529. else {
  3530. if(p_Sccb->OperationCode == RESET_COMMAND)
  3531. {
  3532. pSaveSccb = ((PSCCBcard) pCurrCard)->currentSCCB;
  3533. ((PSCCBcard) pCurrCard)->currentSCCB = p_Sccb;
  3534. queueSelectFail(&BL_Card[thisCard], thisCard);
  3535. ((PSCCBcard) pCurrCard)->currentSCCB = pSaveSccb;
  3536. }
  3537. else
  3538. {
  3539. queueAddSccb(p_Sccb,thisCard);
  3540. }
  3541. }
  3542. MENABLE_INT(ioport);
  3543. }
  3544. mOS_UnLock((PSCCBcard)pCurrCard);
  3545. }
  3546. /*---------------------------------------------------------------------
  3547. *
  3548. * Function: SccbMgr_abort_sccb
  3549. *
  3550. * Description: Abort the command pointed to by p_Sccb. When the
  3551. * command is completed it will be returned via the
  3552. * callback function.
  3553. *
  3554. *---------------------------------------------------------------------*/
  3555. #if (FW_TYPE==_UCB_MGR_)
  3556. s32bits SccbMgr_abort_sccb(CARD_HANDLE pCurrCard, PUCB p_ucb)
  3557. #else
  3558. #if defined(DOS)
  3559. int SccbMgr_abort_sccb(USHORT pCurrCard, PSCCB p_Sccb)
  3560. #else
  3561. int SccbMgr_abort_sccb(ULONG pCurrCard, PSCCB p_Sccb)
  3562. #endif
  3563. #endif
  3564. {
  3565. #if defined(DOS)
  3566. USHORT ioport;
  3567. #else
  3568. ULONG ioport;
  3569. #endif
  3570. UCHAR thisCard;
  3571. CALL_BK_FN callback;
  3572. UCHAR TID;
  3573. PSCCB pSaveSCCB;
  3574. PSCCBMgr_tar_info currTar_Info;
  3575. #if (FW_TYPE==_UCB_MGR_)
  3576. PSCCB p_Sccb;
  3577. p_Sccb=(PSCCB)p_ucb->UCB_MgrPrivatePtr;
  3578. #endif
  3579. ioport = ((PSCCBcard) pCurrCard)->ioPort;
  3580. thisCard = ((PSCCBcard)pCurrCard)->cardIndex;
  3581. mOS_Lock((PSCCBcard)pCurrCard);
  3582. if (RD_HARPOON(ioport+hp_page_ctrl) & G_INT_DISABLE)
  3583. {
  3584. mOS_UnLock((PSCCBcard)pCurrCard);
  3585. }
  3586. else
  3587. {
  3588. if (queueFindSccb(p_Sccb,thisCard))
  3589. {
  3590. mOS_UnLock((PSCCBcard)pCurrCard);
  3591. ((PSCCBcard)pCurrCard)->cmdCounter--;
  3592. if (!((PSCCBcard)pCurrCard)->cmdCounter)
  3593. WR_HARPOON(ioport+hp_semaphore,(RD_HARPOON(ioport+hp_semaphore)
  3594. & (UCHAR)(~(SCCB_MGR_ACTIVE | TICKLE_ME)) ));
  3595. #if (FW_TYPE==_SCCB_MGR_)
  3596. p_Sccb->SccbStatus = SCCB_ABORT;
  3597. callback = p_Sccb->SccbCallback;
  3598. callback(p_Sccb);
  3599. #else
  3600. p_ucb->UCB_status=SCCB_ABORT;
  3601. callback = (CALL_BK_FN)p_ucb->UCB_callback;
  3602. callback(p_ucb);
  3603. #endif
  3604. return(0);
  3605. }
  3606. else
  3607. {
  3608. mOS_UnLock((PSCCBcard)pCurrCard);
  3609. if (((PSCCBcard)pCurrCard)->currentSCCB == p_Sccb)
  3610. {
  3611. p_Sccb->SccbStatus = SCCB_ABORT;
  3612. return(0);
  3613. }
  3614. else
  3615. {
  3616. TID = p_Sccb->TargID;
  3617. if(p_Sccb->Sccb_tag)
  3618. {
  3619. MDISABLE_INT(ioport);
  3620. if (((PSCCBcard) pCurrCard)->discQ_Tbl[p_Sccb->Sccb_tag]==p_Sccb)
  3621. {
  3622. p_Sccb->SccbStatus = SCCB_ABORT;
  3623. p_Sccb->Sccb_scsistat = ABORT_ST;
  3624. #if (FW_TYPE==_UCB_MGR_)
  3625. p_ucb->UCB_status=SCCB_ABORT;
  3626. #endif
  3627. p_Sccb->Sccb_scsimsg = SMABORT_TAG;
  3628. if(((PSCCBcard) pCurrCard)->currentSCCB == NULL)
  3629. {
  3630. ((PSCCBcard) pCurrCard)->currentSCCB = p_Sccb;
  3631. ssel(ioport, thisCard);
  3632. }
  3633. else
  3634. {
  3635. pSaveSCCB = ((PSCCBcard) pCurrCard)->currentSCCB;
  3636. ((PSCCBcard) pCurrCard)->currentSCCB = p_Sccb;
  3637. queueSelectFail((PSCCBcard) pCurrCard, thisCard);
  3638. ((PSCCBcard) pCurrCard)->currentSCCB = pSaveSCCB;
  3639. }
  3640. }
  3641. MENABLE_INT(ioport);
  3642. return(0);
  3643. }
  3644. else
  3645. {
  3646. currTar_Info = &sccbMgrTbl[thisCard][p_Sccb->TargID];
  3647. if(BL_Card[thisCard].discQ_Tbl[currTar_Info->LunDiscQ_Idx[p_Sccb->Lun]]
  3648. == p_Sccb)
  3649. {
  3650. p_Sccb->SccbStatus = SCCB_ABORT;
  3651. return(0);
  3652. }
  3653. }
  3654. }
  3655. }
  3656. }
  3657. return(-1);
  3658. }
  3659. /*---------------------------------------------------------------------
  3660. *
  3661. * Function: SccbMgr_my_int
  3662. *
  3663. * Description: Do a quick check to determine if there is a pending
  3664. * interrupt for this card and disable the IRQ Pin if so.
  3665. *
  3666. *---------------------------------------------------------------------*/
  3667. #if (FW_TYPE==_UCB_MGR_)
  3668. u08bits SccbMgr_my_int(CARD_HANDLE pCurrCard)
  3669. #else
  3670. #if defined(DOS)
  3671. UCHAR SccbMgr_my_int(USHORT pCurrCard)
  3672. #else
  3673. UCHAR SccbMgr_my_int(ULONG pCurrCard)
  3674. #endif
  3675. #endif
  3676. {
  3677. #if defined(DOS)
  3678. USHORT ioport;
  3679. #else
  3680. ULONG ioport;
  3681. #endif
  3682. ioport = ((PSCCBcard)pCurrCard)->ioPort;
  3683. if (RD_HARPOON(ioport+hp_int_status) & INT_ASSERTED)
  3684. {
  3685. #if defined(DOS)
  3686. MDISABLE_INT(ioport);
  3687. #endif
  3688. return(TRUE);
  3689. }
  3690. else
  3691. return(FALSE);
  3692. }
  3693. /*---------------------------------------------------------------------
  3694. *
  3695. * Function: SccbMgr_isr
  3696. *
  3697. * Description: This is our entry point when an interrupt is generated
  3698. * by the card and the upper level driver passes it on to
  3699. * us.
  3700. *
  3701. *---------------------------------------------------------------------*/
  3702. #if (FW_TYPE==_UCB_MGR_)
  3703. s32bits SccbMgr_isr(CARD_HANDLE pCurrCard)
  3704. #else
  3705. #if defined(DOS)
  3706. int SccbMgr_isr(USHORT pCurrCard)
  3707. #else
  3708. int SccbMgr_isr(ULONG pCurrCard)
  3709. #endif
  3710. #endif
  3711. {
  3712. PSCCB currSCCB;
  3713. UCHAR thisCard,result,bm_status, bm_int_st;
  3714. USHORT hp_int;
  3715. UCHAR i, target;
  3716. #if defined(DOS)
  3717. USHORT ioport;
  3718. #else
  3719. ULONG ioport;
  3720. #endif
  3721. mOS_Lock((PSCCBcard)pCurrCard);
  3722. thisCard = ((PSCCBcard)pCurrCard)->cardIndex;
  3723. ioport = ((PSCCBcard)pCurrCard)->ioPort;
  3724. MDISABLE_INT(ioport);
  3725. #if defined(BUGBUG)
  3726. WR_HARPOON(ioport+hp_user_defined_D, RD_HARPOON(ioport+hp_int_status));
  3727. #endif
  3728. if ((bm_int_st=RD_HARPOON(ioport+hp_int_status)) & EXT_STATUS_ON)
  3729. bm_status = RD_HARPOON(ioport+hp_ext_status) & (UCHAR)BAD_EXT_STATUS;
  3730. else
  3731. bm_status = 0;
  3732. WR_HARPOON(ioport+hp_int_mask, (INT_CMD_COMPL | SCSI_INTERRUPT));
  3733. mOS_UnLock((PSCCBcard)pCurrCard);
  3734. while ((hp_int = RDW_HARPOON((ioport+hp_intstat)) & default_intena) |
  3735. bm_status)
  3736. {
  3737. currSCCB = ((PSCCBcard)pCurrCard)->currentSCCB;
  3738. #if defined(BUGBUG)
  3739. Debug_Load(thisCard,(UCHAR) 0XFF);
  3740. Debug_Load(thisCard,bm_int_st);
  3741. Debug_Load(thisCard,hp_int_0);
  3742. Debug_Load(thisCard,hp_int_1);
  3743. #endif
  3744. if (hp_int & (FIFO | TIMEOUT | RESET | SCAM_SEL) || bm_status) {
  3745. result = SccbMgr_bad_isr(ioport,thisCard,((PSCCBcard)pCurrCard),hp_int);
  3746. WRW_HARPOON((ioport+hp_intstat), (FIFO | TIMEOUT | RESET | SCAM_SEL));
  3747. bm_status = 0;
  3748. if (result) {
  3749. mOS_Lock((PSCCBcard)pCurrCard);
  3750. MENABLE_INT(ioport);
  3751. mOS_UnLock((PSCCBcard)pCurrCard);
  3752. return(result);
  3753. }
  3754. }
  3755. else if (hp_int & ICMD_COMP) {
  3756. if ( !(hp_int & BUS_FREE) ) {
  3757. /* Wait for the BusFree before starting a new command. We
  3758. must also check for being reselected since the BusFree
  3759. may not show up if another device reselects us in 1.5us or
  3760. less. SRR Wednesday, 3/8/1995.
  3761. */
  3762. while (!(RDW_HARPOON((ioport+hp_intstat)) & (BUS_FREE | RSEL))) ;
  3763. }
  3764. if (((PSCCBcard)pCurrCard)->globalFlags & F_HOST_XFER_ACT)
  3765. phaseChkFifo(ioport, thisCard);
  3766. /* WRW_HARPOON((ioport+hp_intstat),
  3767. (BUS_FREE | ICMD_COMP | ITAR_DISC | XFER_CNT_0));
  3768. */
  3769. WRW_HARPOON((ioport+hp_intstat), CLR_ALL_INT_1);
  3770. autoCmdCmplt(ioport,thisCard);
  3771. }
  3772. else if (hp_int & ITAR_DISC)
  3773. {
  3774. if (((PSCCBcard)pCurrCard)->globalFlags & F_HOST_XFER_ACT) {
  3775. phaseChkFifo(ioport, thisCard);
  3776. }
  3777. if (RD_HARPOON(ioport+hp_gp_reg_1) == SMSAVE_DATA_PTR) {
  3778. WR_HARPOON(ioport+hp_gp_reg_1, 0x00);
  3779. currSCCB->Sccb_XferState |= F_NO_DATA_YET;
  3780. currSCCB->Sccb_savedATC = currSCCB->Sccb_ATC;
  3781. }
  3782. currSCCB->Sccb_scsistat = DISCONNECT_ST;
  3783. queueDisconnect(currSCCB,thisCard);
  3784. /* Wait for the BusFree before starting a new command. We
  3785. must also check for being reselected since the BusFree
  3786. may not show up if another device reselects us in 1.5us or
  3787. less. SRR Wednesday, 3/8/1995.
  3788. */
  3789. while (!(RDW_HARPOON((ioport+hp_intstat)) & (BUS_FREE | RSEL)) &&
  3790. !((RDW_HARPOON((ioport+hp_intstat)) & PHASE) &&
  3791. RD_HARPOON((ioport+hp_scsisig)) ==
  3792. (SCSI_BSY | SCSI_REQ | SCSI_CD | SCSI_MSG | SCSI_IOBIT))) ;
  3793. /*
  3794. The additional loop exit condition above detects a timing problem
  3795. with the revision D/E harpoon chips. The caller should reset the
  3796. host adapter to recover when 0xFE is returned.
  3797. */
  3798. if (!(RDW_HARPOON((ioport+hp_intstat)) & (BUS_FREE | RSEL)))
  3799. {
  3800. mOS_Lock((PSCCBcard)pCurrCard);
  3801. MENABLE_INT(ioport);
  3802. mOS_UnLock((PSCCBcard)pCurrCard);
  3803. return 0xFE;
  3804. }
  3805. WRW_HARPOON((ioport+hp_intstat), (BUS_FREE | ITAR_DISC));
  3806. ((PSCCBcard)pCurrCard)->globalFlags |= F_NEW_SCCB_CMD;
  3807. }
  3808. else if (hp_int & RSEL) {
  3809. WRW_HARPOON((ioport+hp_intstat), (PROG_HLT | RSEL | PHASE | BUS_FREE));
  3810. if (RDW_HARPOON((ioport+hp_intstat)) & ITAR_DISC)
  3811. {
  3812. if (((PSCCBcard)pCurrCard)->globalFlags & F_HOST_XFER_ACT)
  3813. {
  3814. phaseChkFifo(ioport, thisCard);
  3815. }
  3816. if (RD_HARPOON(ioport+hp_gp_reg_1) == SMSAVE_DATA_PTR)
  3817. {
  3818. WR_HARPOON(ioport+hp_gp_reg_1, 0x00);
  3819. currSCCB->Sccb_XferState |= F_NO_DATA_YET;
  3820. currSCCB->Sccb_savedATC = currSCCB->Sccb_ATC;
  3821. }
  3822. WRW_HARPOON((ioport+hp_intstat), (BUS_FREE | ITAR_DISC));
  3823. currSCCB->Sccb_scsistat = DISCONNECT_ST;
  3824. queueDisconnect(currSCCB,thisCard);
  3825. }
  3826. sres(ioport,thisCard,((PSCCBcard)pCurrCard));
  3827. phaseDecode(ioport,thisCard);
  3828. }
  3829. else if ((hp_int & IDO_STRT) && (!(hp_int & BUS_FREE)))
  3830. {
  3831. WRW_HARPOON((ioport+hp_intstat), (IDO_STRT | XFER_CNT_0));
  3832. phaseDecode(ioport,thisCard);
  3833. }
  3834. else if ( (hp_int & IUNKWN) || (hp_int & PROG_HLT) )
  3835. {
  3836. WRW_HARPOON((ioport+hp_intstat), (PHASE | IUNKWN | PROG_HLT));
  3837. if ((RD_HARPOON(ioport+hp_prgmcnt_0) & (UCHAR)0x3f)< (UCHAR)SELCHK)
  3838. {
  3839. phaseDecode(ioport,thisCard);
  3840. }
  3841. else
  3842. {
  3843. /* Harpoon problem some SCSI target device respond to selection
  3844. with short BUSY pulse (<400ns) this will make the Harpoon is not able
  3845. to latch the correct Target ID into reg. x53.
  3846. The work around require to correct this reg. But when write to this
  3847. reg. (0x53) also increment the FIFO write addr reg (0x6f), thus we
  3848. need to read this reg first then restore it later. After update to 0x53 */
  3849. i = (UCHAR)(RD_HARPOON(ioport+hp_fifowrite));
  3850. target = (UCHAR)(RD_HARPOON(ioport+hp_gp_reg_3));
  3851. WR_HARPOON(ioport+hp_xfer_pad, (UCHAR) ID_UNLOCK);
  3852. WR_HARPOON(ioport+hp_select_id, (UCHAR)(target | target<<4));
  3853. WR_HARPOON(ioport+hp_xfer_pad, (UCHAR) 0x00);
  3854. WR_HARPOON(ioport+hp_fifowrite, i);
  3855. WR_HARPOON(ioport+hp_autostart_3, (AUTO_IMMED+TAG_STRT));
  3856. }
  3857. }
  3858. else if (hp_int & XFER_CNT_0) {
  3859. WRW_HARPOON((ioport+hp_intstat), XFER_CNT_0);
  3860. schkdd(ioport,thisCard);
  3861. }
  3862. else if (hp_int & BUS_FREE) {
  3863. WRW_HARPOON((ioport+hp_intstat), BUS_FREE);
  3864. if (((PSCCBcard)pCurrCard)->globalFlags & F_HOST_XFER_ACT) {
  3865. hostDataXferAbort(ioport,thisCard,currSCCB);
  3866. }
  3867. phaseBusFree(ioport,thisCard);
  3868. }
  3869. else if (hp_int & ITICKLE) {
  3870. WRW_HARPOON((ioport+hp_intstat), ITICKLE);
  3871. ((PSCCBcard)pCurrCard)->globalFlags |= F_NEW_SCCB_CMD;
  3872. }
  3873. if (((PSCCBcard)pCurrCard)->globalFlags & F_NEW_SCCB_CMD) {
  3874. ((PSCCBcard)pCurrCard)->globalFlags &= ~F_NEW_SCCB_CMD;
  3875. if (((PSCCBcard)pCurrCard)->currentSCCB == NULL) {
  3876. queueSearchSelect(((PSCCBcard)pCurrCard),thisCard);
  3877. }
  3878. if (((PSCCBcard)pCurrCard)->currentSCCB != NULL) {
  3879. ((PSCCBcard)pCurrCard)->globalFlags &= ~F_NEW_SCCB_CMD;
  3880. ssel(ioport,thisCard);
  3881. }
  3882. break;
  3883. }
  3884. } /*end while */
  3885. mOS_Lock((PSCCBcard)pCurrCard);
  3886. MENABLE_INT(ioport);
  3887. mOS_UnLock((PSCCBcard)pCurrCard);
  3888. return(0);
  3889. }
  3890. /*---------------------------------------------------------------------
  3891. *
  3892. * Function: Sccb_bad_isr
  3893. *
  3894. * Description: Some type of interrupt has occurred which is slightly
  3895. * out of the ordinary. We will now decode it fully, in
  3896. * this routine. This is broken up in an attempt to save
  3897. * processing time.
  3898. *
  3899. *---------------------------------------------------------------------*/
  3900. #if defined(DOS)
  3901. UCHAR SccbMgr_bad_isr(USHORT p_port, UCHAR p_card, PSCCBcard pCurrCard, USHORT p_int)
  3902. #else
  3903. UCHAR SccbMgr_bad_isr(ULONG p_port, UCHAR p_card, PSCCBcard pCurrCard, USHORT p_int)
  3904. #endif
  3905. {
  3906. #if defined(HARP_REVX)
  3907. ULONG timer;
  3908. #endif
  3909. UCHAR temp, ScamFlg;
  3910. PSCCBMgr_tar_info currTar_Info;
  3911. PNVRamInfo pCurrNvRam;
  3912. if (RD_HARPOON(p_port+hp_ext_status) &
  3913. (BM_FORCE_OFF | PCI_DEV_TMOUT | BM_PARITY_ERR | PIO_OVERRUN) )
  3914. {
  3915. if (pCurrCard->globalFlags & F_HOST_XFER_ACT)
  3916. {
  3917. hostDataXferAbort(p_port,p_card, pCurrCard->currentSCCB);
  3918. }
  3919. if (RD_HARPOON(p_port+hp_pci_stat_cfg) & REC_MASTER_ABORT)
  3920. {
  3921. WR_HARPOON(p_port+hp_pci_stat_cfg,
  3922. (RD_HARPOON(p_port+hp_pci_stat_cfg) & ~REC_MASTER_ABORT));
  3923. WR_HARPOON(p_port+hp_host_blk_cnt, 0x00);
  3924. }
  3925. if (pCurrCard->currentSCCB != NULL)
  3926. {
  3927. if (!pCurrCard->currentSCCB->HostStatus)
  3928. pCurrCard->currentSCCB->HostStatus = SCCB_BM_ERR;
  3929. sxfrp(p_port,p_card);
  3930. temp = (UCHAR)(RD_HARPOON(p_port+hp_ee_ctrl) &
  3931. (EXT_ARB_ACK | SCSI_TERM_ENA_H));
  3932. WR_HARPOON(p_port+hp_ee_ctrl, ((UCHAR)temp | SEE_MS | SEE_CS));
  3933. WR_HARPOON(p_port+hp_ee_ctrl, temp);
  3934. if (!(RDW_HARPOON((p_port+hp_intstat)) & (BUS_FREE | RESET)))
  3935. {
  3936. phaseDecode(p_port,p_card);
  3937. }
  3938. }
  3939. }
  3940. else if (p_int & RESET)
  3941. {
  3942. WR_HARPOON(p_port+hp_clkctrl_0, CLKCTRL_DEFAULT);
  3943. WR_HARPOON(p_port+hp_sys_ctrl, 0x00);
  3944. if (pCurrCard->currentSCCB != NULL) {
  3945. if (pCurrCard->globalFlags & F_HOST_XFER_ACT)
  3946. hostDataXferAbort(p_port,p_card, pCurrCard->currentSCCB);
  3947. }
  3948. DISABLE_AUTO(p_port);
  3949. sresb(p_port,p_card);
  3950. while(RD_HARPOON(p_port+hp_scsictrl_0) & SCSI_RST) {}
  3951. pCurrNvRam = pCurrCard->pNvRamInfo;
  3952. if(pCurrNvRam){
  3953. ScamFlg = pCurrNvRam->niScamConf;
  3954. }
  3955. else{
  3956. ScamFlg = (UCHAR) utilEERead(p_port, SCAM_CONFIG/2);
  3957. }
  3958. XbowInit(p_port, ScamFlg);
  3959. scini(p_card, pCurrCard->ourId, 0);
  3960. return(0xFF);
  3961. }
  3962. else if (p_int & FIFO) {
  3963. WRW_HARPOON((p_port+hp_intstat), FIFO);
  3964. #if defined(HARP_REVX)
  3965. for (timer=0x00FFFFFFL; timer != 0x00000000L; timer--) {
  3966. if (RD_HARPOON(p_port+hp_xferstat) & FIFO_EMPTY)
  3967. break;
  3968. if (RDW_HARPOON((p_port+hp_intstat)) & BUS_FREE)
  3969. break;
  3970. }
  3971. if ( (RD_HARPOON(p_port+hp_xferstat) & FIFO_EMPTY) &&
  3972. (RD_HARPOON(p_port+hp_fiforead) !=
  3973. RD_HARPOON(p_port+hp_fifowrite)) &&
  3974. (RD_HARPOON(p_port+hp_xfercnt_0))
  3975. )
  3976. WR_HARPOON((p_port+hp_xferstat), 0x01);
  3977. /* else
  3978. */
  3979. /* sxfrp(p_port,p_card);
  3980. */
  3981. #else
  3982. if (pCurrCard->currentSCCB != NULL)
  3983. sxfrp(p_port,p_card);
  3984. #endif
  3985. }
  3986. else if (p_int & TIMEOUT)
  3987. {
  3988. DISABLE_AUTO(p_port);
  3989. WRW_HARPOON((p_port+hp_intstat),
  3990. (PROG_HLT | TIMEOUT | SEL |BUS_FREE | PHASE | IUNKWN));
  3991. pCurrCard->currentSCCB->HostStatus = SCCB_SELECTION_TIMEOUT;
  3992. currTar_Info = &sccbMgrTbl[p_card][pCurrCard->currentSCCB->TargID];
  3993. if((pCurrCard->globalFlags & F_CONLUN_IO) &&
  3994. ((currTar_Info->TarStatus & TAR_TAG_Q_MASK) != TAG_Q_TRYING))
  3995. currTar_Info->TarLUNBusy[pCurrCard->currentSCCB->Lun] = FALSE;
  3996. else
  3997. currTar_Info->TarLUNBusy[0] = FALSE;
  3998. if (currTar_Info->TarEEValue & EE_SYNC_MASK)
  3999. {
  4000. currTar_Info->TarSyncCtrl = 0;
  4001. currTar_Info->TarStatus &= ~TAR_SYNC_MASK;
  4002. }
  4003. if (currTar_Info->TarEEValue & EE_WIDE_SCSI)
  4004. {
  4005. currTar_Info->TarStatus &= ~TAR_WIDE_MASK;
  4006. }
  4007. sssyncv(p_port, pCurrCard->currentSCCB->TargID, NARROW_SCSI,currTar_Info);
  4008. queueCmdComplete(pCurrCard, pCurrCard->currentSCCB, p_card);
  4009. }
  4010. #if defined(SCAM_LEV_2)
  4011. else if (p_int & SCAM_SEL)
  4012. {
  4013. scarb(p_port,LEVEL2_TAR);
  4014. scsel(p_port);
  4015. scasid(p_card, p_port);
  4016. scbusf(p_port);
  4017. WRW_HARPOON((p_port+hp_intstat), SCAM_SEL);
  4018. }
  4019. #endif
  4020. return(0x00);
  4021. }
  4022. /*---------------------------------------------------------------------
  4023. *
  4024. * Function: SccbMgr_scsi_reset
  4025. *
  4026. * Description: A SCSI bus reset will be generated and all outstanding
  4027. * Sccbs will be returned via the callback.
  4028. *
  4029. *---------------------------------------------------------------------*/
  4030. #if (FW_TYPE==_UCB_MGR_)
  4031. void SccbMgr_scsi_reset(CARD_HANDLE pCurrCard)
  4032. #else
  4033. #if defined(DOS)
  4034. void SccbMgr_scsi_reset(USHORT pCurrCard)
  4035. #else
  4036. void SccbMgr_scsi_reset(ULONG pCurrCard)
  4037. #endif
  4038. #endif
  4039. {
  4040. UCHAR thisCard;
  4041. thisCard = ((PSCCBcard)pCurrCard)->cardIndex;
  4042. mOS_Lock((PSCCBcard)pCurrCard);
  4043. if (((PSCCBcard) pCurrCard)->globalFlags & F_GREEN_PC)
  4044. {
  4045. WR_HARPOON(((PSCCBcard) pCurrCard)->ioPort+hp_clkctrl_0, CLKCTRL_DEFAULT);
  4046. WR_HARPOON(((PSCCBcard) pCurrCard)->ioPort+hp_sys_ctrl, 0x00);
  4047. }
  4048. sresb(((PSCCBcard)pCurrCard)->ioPort,thisCard);
  4049. if (RD_HARPOON(((PSCCBcard)pCurrCard)->ioPort+hp_ext_status) & BM_CMD_BUSY)
  4050. {
  4051. WR_HARPOON(((PSCCBcard) pCurrCard)->ioPort+hp_page_ctrl,
  4052. (RD_HARPOON(((PSCCBcard) pCurrCard)->ioPort+hp_page_ctrl)
  4053. & ~SCATTER_EN));
  4054. WR_HARPOON(((PSCCBcard) pCurrCard)->ioPort+hp_sg_addr,0x00);
  4055. ((PSCCBcard) pCurrCard)->globalFlags &= ~F_HOST_XFER_ACT;
  4056. busMstrTimeOut(((PSCCBcard) pCurrCard)->ioPort);
  4057. WR_HARPOON(((PSCCBcard) pCurrCard)->ioPort+hp_int_mask,
  4058. (INT_CMD_COMPL | SCSI_INTERRUPT));
  4059. }
  4060. /*
  4061. if (utilEERead(((PSCCBcard)pCurrCard)->ioPort, (SCAM_CONFIG/2))
  4062. & SCAM_ENABLED)
  4063. */
  4064. scini(thisCard, ((PSCCBcard)pCurrCard)->ourId, 0);
  4065. #if (FW_TYPE==_UCB_MGR_)
  4066. ((PSCCBcard)pCurrCard)->cardInfo->ai_AEN_routine(0x01,pCurrCard,0,0,0,0);
  4067. #endif
  4068. mOS_UnLock((PSCCBcard)pCurrCard);
  4069. }
  4070. /*---------------------------------------------------------------------
  4071. *
  4072. * Function: SccbMgr_timer_expired
  4073. *
  4074. * Description: This function allow me to kill my own job that has not
  4075. * yet completed, and has cause a timeout to occur. This
  4076. * timeout has caused the upper level driver to call this
  4077. * function.
  4078. *
  4079. *---------------------------------------------------------------------*/
  4080. #if (FW_TYPE==_UCB_MGR_)
  4081. void SccbMgr_timer_expired(CARD_HANDLE pCurrCard)
  4082. #else
  4083. #if defined(DOS)
  4084. void SccbMgr_timer_expired(USHORT pCurrCard)
  4085. #else
  4086. void SccbMgr_timer_expired(ULONG pCurrCard)
  4087. #endif
  4088. #endif
  4089. {
  4090. }
  4091. #if defined(DOS)
  4092. /*---------------------------------------------------------------------
  4093. *
  4094. * Function: SccbMgr_status
  4095. *
  4096. * Description: This function returns the number of outstanding SCCB's.
  4097. * This is specific to the DOS enviroment, which needs this
  4098. * to help them keep protected and real mode commands staight.
  4099. *
  4100. *---------------------------------------------------------------------*/
  4101. USHORT SccbMgr_status(USHORT pCurrCard)
  4102. {
  4103. return(BL_Card[pCurrCard].cmdCounter);
  4104. }
  4105. #endif
  4106. /*---------------------------------------------------------------------
  4107. *
  4108. * Function: SccbMgrTableInit
  4109. *
  4110. * Description: Initialize all Sccb manager data structures.
  4111. *
  4112. *---------------------------------------------------------------------*/
  4113. void SccbMgrTableInitAll()
  4114. {
  4115. UCHAR thisCard;
  4116. for (thisCard = 0; thisCard < MAX_CARDS; thisCard++)
  4117. {
  4118. SccbMgrTableInitCard(&BL_Card[thisCard],thisCard);
  4119. BL_Card[thisCard].ioPort = 0x00;
  4120. BL_Card[thisCard].cardInfo = NULL;
  4121. BL_Card[thisCard].cardIndex = 0xFF;
  4122. BL_Card[thisCard].ourId = 0x00;
  4123. BL_Card[thisCard].pNvRamInfo = NULL;
  4124. }
  4125. }
  4126. /*---------------------------------------------------------------------
  4127. *
  4128. * Function: SccbMgrTableInit
  4129. *
  4130. * Description: Initialize all Sccb manager data structures.
  4131. *
  4132. *---------------------------------------------------------------------*/
  4133. void SccbMgrTableInitCard(PSCCBcard pCurrCard, UCHAR p_card)
  4134. {
  4135. UCHAR scsiID, qtag;
  4136. for (qtag = 0; qtag < QUEUE_DEPTH; qtag++)
  4137. {
  4138. BL_Card[p_card].discQ_Tbl[qtag] = NULL;
  4139. }
  4140. for (scsiID = 0; scsiID < MAX_SCSI_TAR; scsiID++)
  4141. {
  4142. sccbMgrTbl[p_card][scsiID].TarStatus = 0;
  4143. sccbMgrTbl[p_card][scsiID].TarEEValue = 0;
  4144. SccbMgrTableInitTarget(p_card, scsiID);
  4145. }
  4146. pCurrCard->scanIndex = 0x00;
  4147. pCurrCard->currentSCCB = NULL;
  4148. pCurrCard->globalFlags = 0x00;
  4149. pCurrCard->cmdCounter = 0x00;
  4150. pCurrCard->tagQ_Lst = 0x01;
  4151. pCurrCard->discQCount = 0;
  4152. }
  4153. /*---------------------------------------------------------------------
  4154. *
  4155. * Function: SccbMgrTableInit
  4156. *
  4157. * Description: Initialize all Sccb manager data structures.
  4158. *
  4159. *---------------------------------------------------------------------*/
  4160. void SccbMgrTableInitTarget(UCHAR p_card, UCHAR target)
  4161. {
  4162. UCHAR lun, qtag;
  4163. PSCCBMgr_tar_info currTar_Info;
  4164. currTar_Info = &sccbMgrTbl[p_card][target];
  4165. currTar_Info->TarSelQ_Cnt = 0;
  4166. currTar_Info->TarSyncCtrl = 0;
  4167. currTar_Info->TarSelQ_Head = NULL;
  4168. currTar_Info->TarSelQ_Tail = NULL;
  4169. currTar_Info->TarTagQ_Cnt = 0;
  4170. currTar_Info->TarLUN_CA = FALSE;
  4171. for (lun = 0; lun < MAX_LUN; lun++)
  4172. {
  4173. currTar_Info->TarLUNBusy[lun] = FALSE;
  4174. currTar_Info->LunDiscQ_Idx[lun] = 0;
  4175. }
  4176. for (qtag = 0; qtag < QUEUE_DEPTH; qtag++)
  4177. {
  4178. if(BL_Card[p_card].discQ_Tbl[qtag] != NULL)
  4179. {
  4180. if(BL_Card[p_card].discQ_Tbl[qtag]->TargID == target)
  4181. {
  4182. BL_Card[p_card].discQ_Tbl[qtag] = NULL;
  4183. BL_Card[p_card].discQCount--;
  4184. }
  4185. }
  4186. }
  4187. }
  4188. #if defined(BUGBUG)
  4189. /*****************************************************************
  4190. * Save the current byte in the debug array
  4191. *****************************************************************/
  4192. void Debug_Load(UCHAR p_card, UCHAR p_bug_data)
  4193. {
  4194. debug_int[p_card][debug_index[p_card]] = p_bug_data;
  4195. debug_index[p_card]++;
  4196. if (debug_index[p_card] == debug_size)
  4197. debug_index[p_card] = 0;
  4198. }
  4199. #endif
  4200. #ident "$Id: sccb_dat.c 1.10 1997/02/22 03:16:02 awin Exp $"
  4201. /*----------------------------------------------------------------------
  4202. *
  4203. *
  4204. * Copyright 1995-1996 by Mylex Corporation. All Rights Reserved
  4205. *
  4206. * This file is available under both the GNU General Public License
  4207. * and a BSD-style copyright; see LICENSE.FlashPoint for details.
  4208. *
  4209. * $Workfile: sccb_dat.c $
  4210. *
  4211. * Description: Functions relating to handling of the SCCB interface
  4212. * between the device driver and the HARPOON.
  4213. *
  4214. * $Date: 1997/02/22 03:16:02 $
  4215. *
  4216. * $Revision: 1.10 $
  4217. *
  4218. *----------------------------------------------------------------------*/
  4219. /*#include <globals.h>*/
  4220. #if (FW_TYPE==_UCB_MGR_)
  4221. /*#include <budi.h>*/
  4222. #endif
  4223. /*#include <sccbmgr.h>*/
  4224. /*#include <blx30.h>*/
  4225. /*#include <target.h>*/
  4226. /*#include <harpoon.h>*/
  4227. /*
  4228. ** IMPORTANT NOTE!!!
  4229. **
  4230. ** You MUST preassign all data to a valid value or zero. This is
  4231. ** required due to the MS compiler bug under OS/2 and Solaris Real-Mode
  4232. ** driver environment.
  4233. */
  4234. SCCBMGR_TAR_INFO sccbMgrTbl[MAX_CARDS][MAX_SCSI_TAR] = { { { 0 } } };
  4235. SCCBCARD BL_Card[MAX_CARDS] = { { 0 } };
  4236. SCCBSCAM_INFO scamInfo[MAX_SCSI_TAR] = { { { 0 } } };
  4237. NVRAMINFO nvRamInfo[MAX_MB_CARDS] = { { 0 } };
  4238. #if defined(OS2)
  4239. void (far *s_PhaseTbl[8]) (ULONG, UCHAR) = { 0 };
  4240. UCHAR temp_id_string[ID_STRING_LENGTH] = { 0 };
  4241. #elif defined(SOLARIS_REAL_MODE) || defined(__STDC__)
  4242. void (*s_PhaseTbl[8]) (ULONG, UCHAR) = { 0 };
  4243. #else
  4244. void (*s_PhaseTbl[8]) ();
  4245. #endif
  4246. #if defined(DOS)
  4247. UCHAR first_time = 0;
  4248. #endif
  4249. UCHAR mbCards = 0;
  4250. UCHAR scamHAString[] = {0x63, 0x07, 'B', 'U', 'S', 'L', 'O', 'G', 'I', 'C', \
  4251. ' ', 'B', 'T', '-', '9', '3', '0', \
  4252. 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, \
  4253. 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20};
  4254. USHORT default_intena = 0;
  4255. #if defined(BUGBUG)
  4256. UCHAR debug_int[MAX_CARDS][debug_size] = { 0 };
  4257. UCHAR debug_index[MAX_CARDS] = { 0 };
  4258. UCHAR reserved_1[3] = { 0 };
  4259. #endif
  4260. #ident "$Id: scsi.c 1.23 1997/07/09 21:42:54 mohan Exp $"
  4261. /*----------------------------------------------------------------------
  4262. *
  4263. *
  4264. * Copyright 1995-1996 by Mylex Corporation. All Rights Reserved
  4265. *
  4266. * This file is available under both the GNU General Public License
  4267. * and a BSD-style copyright; see LICENSE.FlashPoint for details.
  4268. *
  4269. * $Workfile: scsi.c $
  4270. *
  4271. * Description: Functions for handling SCSI bus functions such as
  4272. * selection/reselection, sync negotiation, message-in
  4273. * decoding.
  4274. *
  4275. * $Date: 1997/07/09 21:42:54 $
  4276. *
  4277. * $Revision: 1.23 $
  4278. *
  4279. *----------------------------------------------------------------------*/
  4280. /*#include <globals.h>*/
  4281. #if (FW_TYPE==_UCB_MGR_)
  4282. /*#include <budi.h>*/
  4283. #endif
  4284. /*#include <sccbmgr.h>*/
  4285. /*#include <blx30.h>*/
  4286. /*#include <target.h>*/
  4287. /*#include <scsi2.h>*/
  4288. /*#include <eeprom.h>*/
  4289. /*#include <harpoon.h>*/
  4290. /*
  4291. extern SCCBCARD BL_Card[MAX_CARDS];
  4292. extern SCCBMGR_TAR_INFO sccbMgrTbl[MAX_CARDS][MAX_SCSI_TAR];
  4293. #if defined(BUGBUG)
  4294. void Debug_Load(UCHAR p_card, UCHAR p_bug_data);
  4295. #endif
  4296. */
  4297. /*---------------------------------------------------------------------
  4298. *
  4299. * Function: sfetm
  4300. *
  4301. * Description: Read in a message byte from the SCSI bus, and check
  4302. * for a parity error.
  4303. *
  4304. *---------------------------------------------------------------------*/
  4305. #if defined(DOS)
  4306. UCHAR sfm(USHORT port, PSCCB pCurrSCCB)
  4307. #else
  4308. UCHAR sfm(ULONG port, PSCCB pCurrSCCB)
  4309. #endif
  4310. {
  4311. UCHAR message;
  4312. USHORT TimeOutLoop;
  4313. TimeOutLoop = 0;
  4314. while( (!(RD_HARPOON(port+hp_scsisig) & SCSI_REQ)) &&
  4315. (TimeOutLoop++ < 20000) ){}
  4316. WR_HARPOON(port+hp_portctrl_0, SCSI_PORT);
  4317. message = RD_HARPOON(port+hp_scsidata_0);
  4318. WR_HARPOON(port+hp_scsisig, SCSI_ACK + S_MSGI_PH);
  4319. if (TimeOutLoop > 20000)
  4320. message = 0x00; /* force message byte = 0 if Time Out on Req */
  4321. if ((RDW_HARPOON((port+hp_intstat)) & PARITY) &&
  4322. (RD_HARPOON(port+hp_addstat) & SCSI_PAR_ERR))
  4323. {
  4324. WR_HARPOON(port+hp_scsisig, (SCSI_ACK + S_ILL_PH));
  4325. WR_HARPOON(port+hp_xferstat, 0);
  4326. WR_HARPOON(port+hp_fiforead, 0);
  4327. WR_HARPOON(port+hp_fifowrite, 0);
  4328. if (pCurrSCCB != NULL)
  4329. {
  4330. pCurrSCCB->Sccb_scsimsg = SMPARITY;
  4331. }
  4332. message = 0x00;
  4333. do
  4334. {
  4335. ACCEPT_MSG_ATN(port);
  4336. TimeOutLoop = 0;
  4337. while( (!(RD_HARPOON(port+hp_scsisig) & SCSI_REQ)) &&
  4338. (TimeOutLoop++ < 20000) ){}
  4339. if (TimeOutLoop > 20000)
  4340. {
  4341. WRW_HARPOON((port+hp_intstat), PARITY);
  4342. return(message);
  4343. }
  4344. if ((RD_HARPOON(port+hp_scsisig) & S_SCSI_PHZ) != S_MSGI_PH)
  4345. {
  4346. WRW_HARPOON((port+hp_intstat), PARITY);
  4347. return(message);
  4348. }
  4349. WR_HARPOON(port+hp_portctrl_0, SCSI_PORT);
  4350. RD_HARPOON(port+hp_scsidata_0);
  4351. WR_HARPOON(port+hp_scsisig, (SCSI_ACK + S_ILL_PH));
  4352. }while(1);
  4353. }
  4354. WR_HARPOON(port+hp_scsisig, (SCSI_ACK + S_ILL_PH));
  4355. WR_HARPOON(port+hp_xferstat, 0);
  4356. WR_HARPOON(port+hp_fiforead, 0);
  4357. WR_HARPOON(port+hp_fifowrite, 0);
  4358. return(message);
  4359. }
  4360. /*---------------------------------------------------------------------
  4361. *
  4362. * Function: ssel
  4363. *
  4364. * Description: Load up automation and select target device.
  4365. *
  4366. *---------------------------------------------------------------------*/
  4367. #if defined(DOS)
  4368. void ssel(USHORT port, UCHAR p_card)
  4369. #else
  4370. void ssel(ULONG port, UCHAR p_card)
  4371. #endif
  4372. {
  4373. #if defined(DOS)
  4374. UCHAR auto_loaded, i, target, *theCCB;
  4375. #elif defined(OS2)
  4376. UCHAR auto_loaded, i, target;
  4377. UCHAR far *theCCB;
  4378. #else
  4379. UCHAR auto_loaded, i, target, *theCCB;
  4380. #endif
  4381. #if defined(DOS)
  4382. USHORT cdb_reg;
  4383. #else
  4384. ULONG cdb_reg;
  4385. #endif
  4386. PSCCBcard CurrCard;
  4387. PSCCB currSCCB;
  4388. PSCCBMgr_tar_info currTar_Info;
  4389. UCHAR lastTag, lun;
  4390. CurrCard = &BL_Card[p_card];
  4391. currSCCB = CurrCard->currentSCCB;
  4392. target = currSCCB->TargID;
  4393. currTar_Info = &sccbMgrTbl[p_card][target];
  4394. lastTag = CurrCard->tagQ_Lst;
  4395. ARAM_ACCESS(port);
  4396. if ((currTar_Info->TarStatus & TAR_TAG_Q_MASK) == TAG_Q_REJECT)
  4397. currSCCB->ControlByte &= ~F_USE_CMD_Q;
  4398. if(((CurrCard->globalFlags & F_CONLUN_IO) &&
  4399. ((currTar_Info->TarStatus & TAR_TAG_Q_MASK) != TAG_Q_TRYING)))
  4400. lun = currSCCB->Lun;
  4401. else
  4402. lun = 0;
  4403. #if defined(DOS)
  4404. currTar_Info->TarLUNBusy[lun] = TRUE;
  4405. #else
  4406. if (CurrCard->globalFlags & F_TAG_STARTED)
  4407. {
  4408. if (!(currSCCB->ControlByte & F_USE_CMD_Q))
  4409. {
  4410. if ((currTar_Info->TarLUN_CA == FALSE)
  4411. && ((currTar_Info->TarStatus & TAR_TAG_Q_MASK)
  4412. == TAG_Q_TRYING))
  4413. {
  4414. if (currTar_Info->TarTagQ_Cnt !=0)
  4415. {
  4416. currTar_Info->TarLUNBusy[lun] = TRUE;
  4417. queueSelectFail(CurrCard,p_card);
  4418. SGRAM_ACCESS(port);
  4419. return;
  4420. }
  4421. else {
  4422. currTar_Info->TarLUNBusy[lun] = TRUE;
  4423. }
  4424. } /*End non-tagged */
  4425. else {
  4426. currTar_Info->TarLUNBusy[lun] = TRUE;
  4427. }
  4428. } /*!Use cmd Q Tagged */
  4429. else {
  4430. if (currTar_Info->TarLUN_CA == TRUE)
  4431. {
  4432. queueSelectFail(CurrCard,p_card);
  4433. SGRAM_ACCESS(port);
  4434. return;
  4435. }
  4436. currTar_Info->TarLUNBusy[lun] = TRUE;
  4437. } /*else use cmd Q tagged */
  4438. } /*if glob tagged started */
  4439. else {
  4440. currTar_Info->TarLUNBusy[lun] = TRUE;
  4441. }
  4442. #endif /* DOS */
  4443. if((((CurrCard->globalFlags & F_CONLUN_IO) &&
  4444. ((currTar_Info->TarStatus & TAR_TAG_Q_MASK) != TAG_Q_TRYING))
  4445. || (!(currSCCB->ControlByte & F_USE_CMD_Q))))
  4446. {
  4447. if(CurrCard->discQCount >= QUEUE_DEPTH)
  4448. {
  4449. currTar_Info->TarLUNBusy[lun] = TRUE;
  4450. queueSelectFail(CurrCard,p_card);
  4451. SGRAM_ACCESS(port);
  4452. return;
  4453. }
  4454. for (i = 1; i < QUEUE_DEPTH; i++)
  4455. {
  4456. if (++lastTag >= QUEUE_DEPTH) lastTag = 1;
  4457. if (CurrCard->discQ_Tbl[lastTag] == NULL)
  4458. {
  4459. CurrCard->tagQ_Lst = lastTag;
  4460. currTar_Info->LunDiscQ_Idx[lun] = lastTag;
  4461. CurrCard->discQ_Tbl[lastTag] = currSCCB;
  4462. CurrCard->discQCount++;
  4463. break;
  4464. }
  4465. }
  4466. if(i == QUEUE_DEPTH)
  4467. {
  4468. currTar_Info->TarLUNBusy[lun] = TRUE;
  4469. queueSelectFail(CurrCard,p_card);
  4470. SGRAM_ACCESS(port);
  4471. return;
  4472. }
  4473. }
  4474. auto_loaded = FALSE;
  4475. WR_HARPOON(port+hp_select_id, target);
  4476. WR_HARPOON(port+hp_gp_reg_3, target); /* Use by new automation logic */
  4477. if (currSCCB->OperationCode == RESET_COMMAND) {
  4478. WRW_HARPOON((port+ID_MSG_STRT), (MPM_OP+AMSG_OUT+
  4479. (currSCCB->Sccb_idmsg & ~DISC_PRIV)));
  4480. WRW_HARPOON((port+ID_MSG_STRT+2),BRH_OP+ALWAYS+NP);
  4481. currSCCB->Sccb_scsimsg = SMDEV_RESET;
  4482. WR_HARPOON(port+hp_autostart_3, (SELECT+SELCHK_STRT));
  4483. auto_loaded = TRUE;
  4484. currSCCB->Sccb_scsistat = SELECT_BDR_ST;
  4485. if (currTar_Info->TarEEValue & EE_SYNC_MASK)
  4486. {
  4487. currTar_Info->TarSyncCtrl = 0;
  4488. currTar_Info->TarStatus &= ~TAR_SYNC_MASK;
  4489. }
  4490. #if defined(WIDE_SCSI)
  4491. if (currTar_Info->TarEEValue & EE_WIDE_SCSI)
  4492. {
  4493. currTar_Info->TarStatus &= ~TAR_WIDE_MASK;
  4494. }
  4495. #endif
  4496. sssyncv(port, target, NARROW_SCSI,currTar_Info);
  4497. SccbMgrTableInitTarget(p_card, target);
  4498. }
  4499. else if(currSCCB->Sccb_scsistat == ABORT_ST)
  4500. {
  4501. WRW_HARPOON((port+ID_MSG_STRT), (MPM_OP+AMSG_OUT+
  4502. (currSCCB->Sccb_idmsg & ~DISC_PRIV)));
  4503. WRW_HARPOON((port+ID_MSG_STRT+2),BRH_OP+ALWAYS+CMDPZ);
  4504. WRW_HARPOON((port+SYNC_MSGS+0), (MPM_OP+AMSG_OUT+
  4505. (((UCHAR)(currSCCB->ControlByte & TAG_TYPE_MASK)
  4506. >> 6) | (UCHAR)0x20)));
  4507. WRW_HARPOON((port+SYNC_MSGS+2),
  4508. (MPM_OP+AMSG_OUT+currSCCB->Sccb_tag));
  4509. WRW_HARPOON((port+SYNC_MSGS+4), (BRH_OP+ALWAYS+NP ));
  4510. WR_HARPOON(port+hp_autostart_3, (SELECT+SELCHK_STRT));
  4511. auto_loaded = TRUE;
  4512. }
  4513. #if defined(WIDE_SCSI)
  4514. else if (!(currTar_Info->TarStatus & WIDE_NEGOCIATED)) {
  4515. auto_loaded = siwidn(port,p_card);
  4516. currSCCB->Sccb_scsistat = SELECT_WN_ST;
  4517. }
  4518. #endif
  4519. else if (!((currTar_Info->TarStatus & TAR_SYNC_MASK)
  4520. == SYNC_SUPPORTED)) {
  4521. auto_loaded = sisyncn(port,p_card, FALSE);
  4522. currSCCB->Sccb_scsistat = SELECT_SN_ST;
  4523. }
  4524. if (!auto_loaded)
  4525. {
  4526. #if !defined(DOS)
  4527. if (currSCCB->ControlByte & F_USE_CMD_Q)
  4528. {
  4529. CurrCard->globalFlags |= F_TAG_STARTED;
  4530. if ((currTar_Info->TarStatus & TAR_TAG_Q_MASK)
  4531. == TAG_Q_REJECT)
  4532. {
  4533. currSCCB->ControlByte &= ~F_USE_CMD_Q;
  4534. /* Fix up the start instruction with a jump to
  4535. Non-Tag-CMD handling */
  4536. WRW_HARPOON((port+ID_MSG_STRT),BRH_OP+ALWAYS+NTCMD);
  4537. WRW_HARPOON((port+NON_TAG_ID_MSG),
  4538. (MPM_OP+AMSG_OUT+currSCCB->Sccb_idmsg));
  4539. WR_HARPOON(port+hp_autostart_3, (SELECT+SELCHK_STRT));
  4540. /* Setup our STATE so we know what happend when
  4541. the wheels fall off. */
  4542. currSCCB->Sccb_scsistat = SELECT_ST;
  4543. currTar_Info->TarLUNBusy[lun] = TRUE;
  4544. }
  4545. else
  4546. {
  4547. WRW_HARPOON((port+ID_MSG_STRT), (MPM_OP+AMSG_OUT+currSCCB->Sccb_idmsg));
  4548. WRW_HARPOON((port+ID_MSG_STRT+2), (MPM_OP+AMSG_OUT+
  4549. (((UCHAR)(currSCCB->ControlByte & TAG_TYPE_MASK)
  4550. >> 6) | (UCHAR)0x20)));
  4551. for (i = 1; i < QUEUE_DEPTH; i++)
  4552. {
  4553. if (++lastTag >= QUEUE_DEPTH) lastTag = 1;
  4554. if (CurrCard->discQ_Tbl[lastTag] == NULL)
  4555. {
  4556. WRW_HARPOON((port+ID_MSG_STRT+6),
  4557. (MPM_OP+AMSG_OUT+lastTag));
  4558. CurrCard->tagQ_Lst = lastTag;
  4559. currSCCB->Sccb_tag = lastTag;
  4560. CurrCard->discQ_Tbl[lastTag] = currSCCB;
  4561. CurrCard->discQCount++;
  4562. break;
  4563. }
  4564. }
  4565. if ( i == QUEUE_DEPTH )
  4566. {
  4567. currTar_Info->TarLUNBusy[lun] = TRUE;
  4568. queueSelectFail(CurrCard,p_card);
  4569. SGRAM_ACCESS(port);
  4570. return;
  4571. }
  4572. currSCCB->Sccb_scsistat = SELECT_Q_ST;
  4573. WR_HARPOON(port+hp_autostart_3, (SELECT+SELCHK_STRT));
  4574. }
  4575. }
  4576. else
  4577. {
  4578. #endif /* !DOS */
  4579. WRW_HARPOON((port+ID_MSG_STRT),BRH_OP+ALWAYS+NTCMD);
  4580. WRW_HARPOON((port+NON_TAG_ID_MSG),
  4581. (MPM_OP+AMSG_OUT+currSCCB->Sccb_idmsg));
  4582. currSCCB->Sccb_scsistat = SELECT_ST;
  4583. WR_HARPOON(port+hp_autostart_3, (SELECT+SELCHK_STRT));
  4584. #if !defined(DOS)
  4585. }
  4586. #endif
  4587. #if defined(OS2)
  4588. theCCB = (UCHAR far *)&currSCCB->Cdb[0];
  4589. #else
  4590. theCCB = (UCHAR *)&currSCCB->Cdb[0];
  4591. #endif
  4592. cdb_reg = port + CMD_STRT;
  4593. for (i=0; i < currSCCB->CdbLength; i++)
  4594. {
  4595. WRW_HARPOON(cdb_reg, (MPM_OP + ACOMMAND + *theCCB));
  4596. cdb_reg +=2;
  4597. theCCB++;
  4598. }
  4599. if (currSCCB->CdbLength != TWELVE_BYTE_CMD)
  4600. WRW_HARPOON(cdb_reg, (BRH_OP+ALWAYS+ NP));
  4601. } /* auto_loaded */
  4602. #if defined(WIDE_SCSI)
  4603. WRW_HARPOON((port+hp_fiforead), (USHORT) 0x00);
  4604. WR_HARPOON(port+hp_xferstat, 0x00);
  4605. #endif
  4606. WRW_HARPOON((port+hp_intstat), (PROG_HLT | TIMEOUT | SEL | BUS_FREE));
  4607. WR_HARPOON(port+hp_portctrl_0,(SCSI_PORT));
  4608. if (!(currSCCB->Sccb_MGRFlags & F_DEV_SELECTED))
  4609. {
  4610. WR_HARPOON(port+hp_scsictrl_0, (SEL_TAR | ENA_ATN | ENA_RESEL | ENA_SCAM_SEL));
  4611. }
  4612. else
  4613. {
  4614. /* auto_loaded = (RD_HARPOON(port+hp_autostart_3) & (UCHAR)0x1F);
  4615. auto_loaded |= AUTO_IMMED; */
  4616. auto_loaded = AUTO_IMMED;
  4617. DISABLE_AUTO(port);
  4618. WR_HARPOON(port+hp_autostart_3, auto_loaded);
  4619. }
  4620. SGRAM_ACCESS(port);
  4621. }
  4622. /*---------------------------------------------------------------------
  4623. *
  4624. * Function: sres
  4625. *
  4626. * Description: Hookup the correct CCB and handle the incoming messages.
  4627. *
  4628. *---------------------------------------------------------------------*/
  4629. #if defined(DOS)
  4630. void sres(USHORT port, UCHAR p_card, PSCCBcard pCurrCard)
  4631. #else
  4632. void sres(ULONG port, UCHAR p_card, PSCCBcard pCurrCard)
  4633. #endif
  4634. {
  4635. #if defined(V302)
  4636. #ifdef DOS
  4637. UCHAR our_target,message, msgRetryCount;
  4638. extern UCHAR lun, tag;
  4639. #else
  4640. UCHAR our_target,message,lun,tag, msgRetryCount;
  4641. #endif
  4642. #else /* V302 */
  4643. UCHAR our_target, message, lun = 0, tag, msgRetryCount;
  4644. #endif /* V302 */
  4645. PSCCBMgr_tar_info currTar_Info;
  4646. PSCCB currSCCB;
  4647. if(pCurrCard->currentSCCB != NULL)
  4648. {
  4649. currTar_Info = &sccbMgrTbl[p_card][pCurrCard->currentSCCB->TargID];
  4650. DISABLE_AUTO(port);
  4651. WR_HARPOON((port+hp_scsictrl_0),(ENA_RESEL | ENA_SCAM_SEL));
  4652. currSCCB = pCurrCard->currentSCCB;
  4653. if(currSCCB->Sccb_scsistat == SELECT_WN_ST)
  4654. {
  4655. currTar_Info->TarStatus &= ~TAR_WIDE_MASK;
  4656. currSCCB->Sccb_scsistat = BUS_FREE_ST;
  4657. }
  4658. if(currSCCB->Sccb_scsistat == SELECT_SN_ST)
  4659. {
  4660. currTar_Info->TarStatus &= ~TAR_SYNC_MASK;
  4661. currSCCB->Sccb_scsistat = BUS_FREE_ST;
  4662. }
  4663. if(((pCurrCard->globalFlags & F_CONLUN_IO) &&
  4664. ((currTar_Info->TarStatus & TAR_TAG_Q_MASK) != TAG_Q_TRYING)))
  4665. {
  4666. currTar_Info->TarLUNBusy[currSCCB->Lun] = FALSE;
  4667. if(currSCCB->Sccb_scsistat != ABORT_ST)
  4668. {
  4669. pCurrCard->discQCount--;
  4670. pCurrCard->discQ_Tbl[currTar_Info->LunDiscQ_Idx[currSCCB->Lun]]
  4671. = NULL;
  4672. }
  4673. }
  4674. else
  4675. {
  4676. currTar_Info->TarLUNBusy[0] = FALSE;
  4677. if(currSCCB->Sccb_tag)
  4678. {
  4679. if(currSCCB->Sccb_scsistat != ABORT_ST)
  4680. {
  4681. pCurrCard->discQCount--;
  4682. pCurrCard->discQ_Tbl[currSCCB->Sccb_tag] = NULL;
  4683. }
  4684. }else
  4685. {
  4686. if(currSCCB->Sccb_scsistat != ABORT_ST)
  4687. {
  4688. pCurrCard->discQCount--;
  4689. pCurrCard->discQ_Tbl[currTar_Info->LunDiscQ_Idx[0]] = NULL;
  4690. }
  4691. }
  4692. }
  4693. queueSelectFail(&BL_Card[p_card],p_card);
  4694. }
  4695. #if defined(WIDE_SCSI)
  4696. WRW_HARPOON((port+hp_fiforead), (USHORT) 0x00);
  4697. #endif
  4698. our_target = (UCHAR)(RD_HARPOON(port+hp_select_id) >> 4);
  4699. currTar_Info = &sccbMgrTbl[p_card][our_target];
  4700. msgRetryCount = 0;
  4701. do
  4702. {
  4703. #if defined(V302)
  4704. message = GetTarLun(port, p_card, our_target, pCurrCard, &tag, &lun);
  4705. #else /* V302 */
  4706. currTar_Info = &sccbMgrTbl[p_card][our_target];
  4707. tag = 0;
  4708. while(!(RD_HARPOON(port+hp_scsisig) & SCSI_REQ))
  4709. {
  4710. if (! (RD_HARPOON(port+hp_scsisig) & SCSI_BSY))
  4711. {
  4712. WRW_HARPOON((port+hp_intstat), PHASE);
  4713. return;
  4714. }
  4715. }
  4716. WRW_HARPOON((port+hp_intstat), PHASE);
  4717. if ((RD_HARPOON(port+hp_scsisig) & S_SCSI_PHZ) == S_MSGI_PH)
  4718. {
  4719. message = sfm(port,pCurrCard->currentSCCB);
  4720. if (message)
  4721. {
  4722. if (message <= (0x80 | LUN_MASK))
  4723. {
  4724. lun = message & (UCHAR)LUN_MASK;
  4725. #if !defined(DOS)
  4726. if ((currTar_Info->TarStatus & TAR_TAG_Q_MASK) == TAG_Q_TRYING)
  4727. {
  4728. if (currTar_Info->TarTagQ_Cnt != 0)
  4729. {
  4730. if (!(currTar_Info->TarLUN_CA))
  4731. {
  4732. ACCEPT_MSG(port); /*Release the ACK for ID msg. */
  4733. message = sfm(port,pCurrCard->currentSCCB);
  4734. if (message)
  4735. {
  4736. ACCEPT_MSG(port);
  4737. }
  4738. else
  4739. message = FALSE;
  4740. if(message != FALSE)
  4741. {
  4742. tag = sfm(port,pCurrCard->currentSCCB);
  4743. if (!(tag))
  4744. message = FALSE;
  4745. }
  4746. } /*C.A. exists! */
  4747. } /*End Q cnt != 0 */
  4748. } /*End Tag cmds supported! */
  4749. #endif /* !DOS */
  4750. } /*End valid ID message. */
  4751. else
  4752. {
  4753. ACCEPT_MSG_ATN(port);
  4754. }
  4755. } /* End good id message. */
  4756. else
  4757. {
  4758. message = FALSE;
  4759. }
  4760. }
  4761. else
  4762. {
  4763. ACCEPT_MSG_ATN(port);
  4764. while (!(RDW_HARPOON((port+hp_intstat)) & (PHASE | RESET)) &&
  4765. !(RD_HARPOON(port+hp_scsisig) & SCSI_REQ) &&
  4766. (RD_HARPOON(port+hp_scsisig) & SCSI_BSY)) ;
  4767. return;
  4768. }
  4769. #endif /* V302 */
  4770. if(message == FALSE)
  4771. {
  4772. msgRetryCount++;
  4773. if(msgRetryCount == 1)
  4774. {
  4775. SendMsg(port, SMPARITY);
  4776. }
  4777. else
  4778. {
  4779. SendMsg(port, SMDEV_RESET);
  4780. sssyncv(port, our_target, NARROW_SCSI,currTar_Info);
  4781. if (sccbMgrTbl[p_card][our_target].TarEEValue & EE_SYNC_MASK)
  4782. {
  4783. sccbMgrTbl[p_card][our_target].TarStatus &= ~TAR_SYNC_MASK;
  4784. }
  4785. if (sccbMgrTbl[p_card][our_target].TarEEValue & EE_WIDE_SCSI)
  4786. {
  4787. sccbMgrTbl[p_card][our_target].TarStatus &= ~TAR_WIDE_MASK;
  4788. }
  4789. queueFlushTargSccb(p_card, our_target, SCCB_COMPLETE);
  4790. SccbMgrTableInitTarget(p_card,our_target);
  4791. return;
  4792. }
  4793. }
  4794. }while(message == FALSE);
  4795. if(((pCurrCard->globalFlags & F_CONLUN_IO) &&
  4796. ((currTar_Info->TarStatus & TAR_TAG_Q_MASK) != TAG_Q_TRYING)))
  4797. {
  4798. currTar_Info->TarLUNBusy[lun] = TRUE;
  4799. pCurrCard->currentSCCB = pCurrCard->discQ_Tbl[currTar_Info->LunDiscQ_Idx[lun]];
  4800. if(pCurrCard->currentSCCB != NULL)
  4801. {
  4802. ACCEPT_MSG(port);
  4803. }
  4804. else
  4805. {
  4806. ACCEPT_MSG_ATN(port);
  4807. }
  4808. }
  4809. else
  4810. {
  4811. currTar_Info->TarLUNBusy[0] = TRUE;
  4812. if (tag)
  4813. {
  4814. if (pCurrCard->discQ_Tbl[tag] != NULL)
  4815. {
  4816. pCurrCard->currentSCCB = pCurrCard->discQ_Tbl[tag];
  4817. currTar_Info->TarTagQ_Cnt--;
  4818. ACCEPT_MSG(port);
  4819. }
  4820. else
  4821. {
  4822. ACCEPT_MSG_ATN(port);
  4823. }
  4824. }else
  4825. {
  4826. pCurrCard->currentSCCB = pCurrCard->discQ_Tbl[currTar_Info->LunDiscQ_Idx[0]];
  4827. if(pCurrCard->currentSCCB != NULL)
  4828. {
  4829. ACCEPT_MSG(port);
  4830. }
  4831. else
  4832. {
  4833. ACCEPT_MSG_ATN(port);
  4834. }
  4835. }
  4836. }
  4837. if(pCurrCard->currentSCCB != NULL)
  4838. {
  4839. if(pCurrCard->currentSCCB->Sccb_scsistat == ABORT_ST)
  4840. {
  4841. /* During Abort Tag command, the target could have got re-selected
  4842. and completed the command. Check the select Q and remove the CCB
  4843. if it is in the Select Q */
  4844. queueFindSccb(pCurrCard->currentSCCB, p_card);
  4845. }
  4846. }
  4847. while (!(RDW_HARPOON((port+hp_intstat)) & (PHASE | RESET)) &&
  4848. !(RD_HARPOON(port+hp_scsisig) & SCSI_REQ) &&
  4849. (RD_HARPOON(port+hp_scsisig) & SCSI_BSY)) ;
  4850. }
  4851. #if defined(V302)
  4852. #if defined(DOS)
  4853. UCHAR GetTarLun(USHORT port, UCHAR p_card, UCHAR our_target, PSCCBcard pCurrCard, PUCHAR tag, PUCHAR lun)
  4854. #else
  4855. UCHAR GetTarLun(ULONG port, UCHAR p_card, UCHAR our_target, PSCCBcard pCurrCard, PUCHAR tag, PUCHAR lun)
  4856. #endif
  4857. {
  4858. UCHAR message;
  4859. PSCCBMgr_tar_info currTar_Info;
  4860. currTar_Info = &sccbMgrTbl[p_card][our_target];
  4861. *tag = 0;
  4862. while(!(RD_HARPOON(port+hp_scsisig) & SCSI_REQ))
  4863. {
  4864. if (! (RD_HARPOON(port+hp_scsisig) & SCSI_BSY))
  4865. {
  4866. WRW_HARPOON((port+hp_intstat), PHASE);
  4867. return(TRUE);
  4868. }
  4869. }
  4870. WRW_HARPOON((port+hp_intstat), PHASE);
  4871. if ((RD_HARPOON(port+hp_scsisig) & S_SCSI_PHZ) == S_MSGI_PH)
  4872. {
  4873. message = sfm(port,pCurrCard->currentSCCB);
  4874. if (message)
  4875. {
  4876. if (message <= (0x80 | LUN_MASK))
  4877. {
  4878. *lun = message & (UCHAR)LUN_MASK;
  4879. #if !defined(DOS)
  4880. if ((currTar_Info->TarStatus & TAR_TAG_Q_MASK) == TAG_Q_TRYING)
  4881. {
  4882. if (currTar_Info->TarTagQ_Cnt != 0)
  4883. {
  4884. if (!(currTar_Info->TarLUN_CA))
  4885. {
  4886. ACCEPT_MSG(port); /*Release the ACK for ID msg. */
  4887. message = sfm(port,pCurrCard->currentSCCB);
  4888. if (message)
  4889. {
  4890. ACCEPT_MSG(port);
  4891. }
  4892. else
  4893. return(FALSE);
  4894. *tag = sfm(port,pCurrCard->currentSCCB);
  4895. if (!(*tag)) return(FALSE);
  4896. } /*C.A. exists! */
  4897. } /*End Q cnt != 0 */
  4898. } /*End Tag cmds supported! */
  4899. #endif /* !DOS */
  4900. } /*End valid ID message. */
  4901. else
  4902. {
  4903. ACCEPT_MSG_ATN(port);
  4904. }
  4905. } /* End good id message. */
  4906. else
  4907. {
  4908. return(FALSE);
  4909. }
  4910. }
  4911. else
  4912. {
  4913. ACCEPT_MSG_ATN(port);
  4914. return(TRUE);
  4915. }
  4916. return(TRUE);
  4917. }
  4918. #endif /* V302 */
  4919. #if defined(DOS)
  4920. void SendMsg(USHORT port, UCHAR message)
  4921. #else
  4922. void SendMsg(ULONG port, UCHAR message)
  4923. #endif
  4924. {
  4925. while(!(RD_HARPOON(port+hp_scsisig) & SCSI_REQ))
  4926. {
  4927. if (! (RD_HARPOON(port+hp_scsisig) & SCSI_BSY))
  4928. {
  4929. WRW_HARPOON((port+hp_intstat), PHASE);
  4930. return;
  4931. }
  4932. }
  4933. WRW_HARPOON((port+hp_intstat), PHASE);
  4934. if ((RD_HARPOON(port+hp_scsisig) & S_SCSI_PHZ) == S_MSGO_PH)
  4935. {
  4936. WRW_HARPOON((port+hp_intstat), (BUS_FREE | PHASE | XFER_CNT_0));
  4937. WR_HARPOON(port+hp_portctrl_0, SCSI_BUS_EN);
  4938. WR_HARPOON(port+hp_scsidata_0,message);
  4939. WR_HARPOON(port+hp_scsisig, (SCSI_ACK + S_ILL_PH));
  4940. ACCEPT_MSG(port);
  4941. WR_HARPOON(port+hp_portctrl_0, 0x00);
  4942. if ((message == SMABORT) || (message == SMDEV_RESET) ||
  4943. (message == SMABORT_TAG) )
  4944. {
  4945. while(!(RDW_HARPOON((port+hp_intstat)) & (BUS_FREE | PHASE))) {}
  4946. if (RDW_HARPOON((port+hp_intstat)) & BUS_FREE)
  4947. {
  4948. WRW_HARPOON((port+hp_intstat), BUS_FREE);
  4949. }
  4950. }
  4951. }
  4952. }
  4953. /*---------------------------------------------------------------------
  4954. *
  4955. * Function: sdecm
  4956. *
  4957. * Description: Determine the proper responce to the message from the
  4958. * target device.
  4959. *
  4960. *---------------------------------------------------------------------*/
  4961. #if defined(DOS)
  4962. void sdecm(UCHAR message, USHORT port, UCHAR p_card)
  4963. #else
  4964. void sdecm(UCHAR message, ULONG port, UCHAR p_card)
  4965. #endif
  4966. {
  4967. PSCCB currSCCB;
  4968. PSCCBcard CurrCard;
  4969. PSCCBMgr_tar_info currTar_Info;
  4970. CurrCard = &BL_Card[p_card];
  4971. currSCCB = CurrCard->currentSCCB;
  4972. currTar_Info = &sccbMgrTbl[p_card][currSCCB->TargID];
  4973. if (message == SMREST_DATA_PTR)
  4974. {
  4975. if (!(currSCCB->Sccb_XferState & F_NO_DATA_YET))
  4976. {
  4977. currSCCB->Sccb_ATC = currSCCB->Sccb_savedATC;
  4978. hostDataXferRestart(currSCCB);
  4979. }
  4980. ACCEPT_MSG(port);
  4981. WR_HARPOON(port+hp_autostart_1, (AUTO_IMMED+DISCONNECT_START));
  4982. }
  4983. else if (message == SMCMD_COMP)
  4984. {
  4985. if (currSCCB->Sccb_scsistat == SELECT_Q_ST)
  4986. {
  4987. currTar_Info->TarStatus &= ~(UCHAR)TAR_TAG_Q_MASK;
  4988. currTar_Info->TarStatus |= (UCHAR)TAG_Q_REJECT;
  4989. }
  4990. ACCEPT_MSG(port);
  4991. }
  4992. else if ((message == SMNO_OP) || (message >= SMIDENT)
  4993. || (message == SMINIT_RECOVERY) || (message == SMREL_RECOVERY))
  4994. {
  4995. ACCEPT_MSG(port);
  4996. WR_HARPOON(port+hp_autostart_1, (AUTO_IMMED+DISCONNECT_START));
  4997. }
  4998. else if (message == SMREJECT)
  4999. {
  5000. if ((currSCCB->Sccb_scsistat == SELECT_SN_ST) ||
  5001. (currSCCB->Sccb_scsistat == SELECT_WN_ST) ||
  5002. ((currTar_Info->TarStatus & TAR_SYNC_MASK) == SYNC_TRYING ) ||
  5003. ((currTar_Info->TarStatus & TAR_TAG_Q_MASK) == TAG_Q_TRYING ) )
  5004. {
  5005. WRW_HARPOON((port+hp_intstat), BUS_FREE);
  5006. ACCEPT_MSG(port);
  5007. while ((!(RD_HARPOON(port+hp_scsisig) & SCSI_REQ)) &&
  5008. (!(RDW_HARPOON((port+hp_intstat)) & BUS_FREE))) {}
  5009. if(currSCCB->Lun == 0x00)
  5010. {
  5011. if ((currSCCB->Sccb_scsistat == SELECT_SN_ST))
  5012. {
  5013. currTar_Info->TarStatus |= (UCHAR)SYNC_SUPPORTED;
  5014. currTar_Info->TarEEValue &= ~EE_SYNC_MASK;
  5015. }
  5016. #if defined(WIDE_SCSI)
  5017. else if ((currSCCB->Sccb_scsistat == SELECT_WN_ST))
  5018. {
  5019. currTar_Info->TarStatus = (currTar_Info->TarStatus &
  5020. ~WIDE_ENABLED) | WIDE_NEGOCIATED;
  5021. currTar_Info->TarEEValue &= ~EE_WIDE_SCSI;
  5022. }
  5023. #endif
  5024. else if ((currTar_Info->TarStatus & TAR_TAG_Q_MASK) == TAG_Q_TRYING )
  5025. {
  5026. currTar_Info->TarStatus = (currTar_Info->TarStatus &
  5027. ~(UCHAR)TAR_TAG_Q_MASK) | TAG_Q_REJECT;
  5028. currSCCB->ControlByte &= ~F_USE_CMD_Q;
  5029. CurrCard->discQCount--;
  5030. CurrCard->discQ_Tbl[currSCCB->Sccb_tag] = NULL;
  5031. currSCCB->Sccb_tag = 0x00;
  5032. }
  5033. }
  5034. if (RDW_HARPOON((port+hp_intstat)) & BUS_FREE)
  5035. {
  5036. if(currSCCB->Lun == 0x00)
  5037. {
  5038. WRW_HARPOON((port+hp_intstat), BUS_FREE);
  5039. CurrCard->globalFlags |= F_NEW_SCCB_CMD;
  5040. }
  5041. }
  5042. else
  5043. {
  5044. if((CurrCard->globalFlags & F_CONLUN_IO) &&
  5045. ((currTar_Info->TarStatus & TAR_TAG_Q_MASK) != TAG_Q_TRYING))
  5046. currTar_Info->TarLUNBusy[currSCCB->Lun] = TRUE;
  5047. else
  5048. currTar_Info->TarLUNBusy[0] = TRUE;
  5049. currSCCB->ControlByte &= ~(UCHAR)F_USE_CMD_Q;
  5050. WR_HARPOON(port+hp_autostart_1, (AUTO_IMMED+DISCONNECT_START));
  5051. }
  5052. }
  5053. else
  5054. {
  5055. ACCEPT_MSG(port);
  5056. while ((!(RD_HARPOON(port+hp_scsisig) & SCSI_REQ)) &&
  5057. (!(RDW_HARPOON((port+hp_intstat)) & BUS_FREE))) {}
  5058. if (!(RDW_HARPOON((port+hp_intstat)) & BUS_FREE))
  5059. {
  5060. WR_HARPOON(port+hp_autostart_1, (AUTO_IMMED+DISCONNECT_START));
  5061. }
  5062. }
  5063. }
  5064. else if (message == SMEXT)
  5065. {
  5066. ACCEPT_MSG(port);
  5067. shandem(port,p_card,currSCCB);
  5068. }
  5069. else if (message == SMIGNORWR)
  5070. {
  5071. ACCEPT_MSG(port); /* ACK the RESIDUE MSG */
  5072. message = sfm(port,currSCCB);
  5073. if(currSCCB->Sccb_scsimsg != SMPARITY)
  5074. ACCEPT_MSG(port);
  5075. WR_HARPOON(port+hp_autostart_1, (AUTO_IMMED+DISCONNECT_START));
  5076. }
  5077. else
  5078. {
  5079. currSCCB->HostStatus = SCCB_PHASE_SEQUENCE_FAIL;
  5080. currSCCB->Sccb_scsimsg = SMREJECT;
  5081. ACCEPT_MSG_ATN(port);
  5082. WR_HARPOON(port+hp_autostart_1, (AUTO_IMMED+DISCONNECT_START));
  5083. }
  5084. }
  5085. /*---------------------------------------------------------------------
  5086. *
  5087. * Function: shandem
  5088. *
  5089. * Description: Decide what to do with the extended message.
  5090. *
  5091. *---------------------------------------------------------------------*/
  5092. #if defined(DOS)
  5093. void shandem(USHORT port, UCHAR p_card, PSCCB pCurrSCCB)
  5094. #else
  5095. void shandem(ULONG port, UCHAR p_card, PSCCB pCurrSCCB)
  5096. #endif
  5097. {
  5098. UCHAR length,message;
  5099. length = sfm(port,pCurrSCCB);
  5100. if (length)
  5101. {
  5102. ACCEPT_MSG(port);
  5103. message = sfm(port,pCurrSCCB);
  5104. if (message)
  5105. {
  5106. if (message == SMSYNC)
  5107. {
  5108. if (length == 0x03)
  5109. {
  5110. ACCEPT_MSG(port);
  5111. stsyncn(port,p_card);
  5112. }
  5113. else
  5114. {
  5115. pCurrSCCB->Sccb_scsimsg = SMREJECT;
  5116. ACCEPT_MSG_ATN(port);
  5117. }
  5118. }
  5119. #if defined(WIDE_SCSI)
  5120. else if (message == SMWDTR)
  5121. {
  5122. if (length == 0x02)
  5123. {
  5124. ACCEPT_MSG(port);
  5125. stwidn(port,p_card);
  5126. }
  5127. else
  5128. {
  5129. pCurrSCCB->Sccb_scsimsg = SMREJECT;
  5130. ACCEPT_MSG_ATN(port);
  5131. WR_HARPOON(port+hp_autostart_1, (AUTO_IMMED+DISCONNECT_START));
  5132. }
  5133. }
  5134. #endif
  5135. else
  5136. {
  5137. pCurrSCCB->Sccb_scsimsg = SMREJECT;
  5138. ACCEPT_MSG_ATN(port);
  5139. WR_HARPOON(port+hp_autostart_1, (AUTO_IMMED+DISCONNECT_START));
  5140. }
  5141. }
  5142. else
  5143. {
  5144. if(pCurrSCCB->Sccb_scsimsg != SMPARITY)
  5145. ACCEPT_MSG(port);
  5146. WR_HARPOON(port+hp_autostart_1, (AUTO_IMMED+DISCONNECT_START));
  5147. }
  5148. }else
  5149. {
  5150. if(pCurrSCCB->Sccb_scsimsg == SMPARITY)
  5151. WR_HARPOON(port+hp_autostart_1, (AUTO_IMMED+DISCONNECT_START));
  5152. }
  5153. }
  5154. /*---------------------------------------------------------------------
  5155. *
  5156. * Function: sisyncn
  5157. *
  5158. * Description: Read in a message byte from the SCSI bus, and check
  5159. * for a parity error.
  5160. *
  5161. *---------------------------------------------------------------------*/
  5162. #if defined(DOS)
  5163. UCHAR sisyncn(USHORT port, UCHAR p_card, UCHAR syncFlag)
  5164. #else
  5165. UCHAR sisyncn(ULONG port, UCHAR p_card, UCHAR syncFlag)
  5166. #endif
  5167. {
  5168. PSCCB currSCCB;
  5169. PSCCBMgr_tar_info currTar_Info;
  5170. currSCCB = BL_Card[p_card].currentSCCB;
  5171. currTar_Info = &sccbMgrTbl[p_card][currSCCB->TargID];
  5172. if (!((currTar_Info->TarStatus & TAR_SYNC_MASK) == SYNC_TRYING)) {
  5173. WRW_HARPOON((port+ID_MSG_STRT),
  5174. (MPM_OP+AMSG_OUT+(currSCCB->Sccb_idmsg & ~(UCHAR)DISC_PRIV)));
  5175. WRW_HARPOON((port+ID_MSG_STRT+2),BRH_OP+ALWAYS+CMDPZ);
  5176. WRW_HARPOON((port+SYNC_MSGS+0), (MPM_OP+AMSG_OUT+SMEXT ));
  5177. WRW_HARPOON((port+SYNC_MSGS+2), (MPM_OP+AMSG_OUT+0x03 ));
  5178. WRW_HARPOON((port+SYNC_MSGS+4), (MPM_OP+AMSG_OUT+SMSYNC));
  5179. if ((currTar_Info->TarEEValue & EE_SYNC_MASK) == EE_SYNC_20MB)
  5180. WRW_HARPOON((port+SYNC_MSGS+6), (MPM_OP+AMSG_OUT+ 12));
  5181. else if ((currTar_Info->TarEEValue & EE_SYNC_MASK) == EE_SYNC_10MB)
  5182. WRW_HARPOON((port+SYNC_MSGS+6), (MPM_OP+AMSG_OUT+ 25));
  5183. else if ((currTar_Info->TarEEValue & EE_SYNC_MASK) == EE_SYNC_5MB)
  5184. WRW_HARPOON((port+SYNC_MSGS+6), (MPM_OP+AMSG_OUT+ 50));
  5185. else
  5186. WRW_HARPOON((port+SYNC_MSGS+6), (MPM_OP+AMSG_OUT+ 00));
  5187. WRW_HARPOON((port+SYNC_MSGS+8), (RAT_OP ));
  5188. WRW_HARPOON((port+SYNC_MSGS+10),(MPM_OP+AMSG_OUT+DEFAULT_OFFSET));
  5189. WRW_HARPOON((port+SYNC_MSGS+12),(BRH_OP+ALWAYS+NP ));
  5190. if(syncFlag == FALSE)
  5191. {
  5192. WR_HARPOON(port+hp_autostart_3, (SELECT+SELCHK_STRT));
  5193. currTar_Info->TarStatus = ((currTar_Info->TarStatus &
  5194. ~(UCHAR)TAR_SYNC_MASK) | (UCHAR)SYNC_TRYING);
  5195. }
  5196. else
  5197. {
  5198. WR_HARPOON(port+hp_autostart_3, (AUTO_IMMED + CMD_ONLY_STRT));
  5199. }
  5200. return(TRUE);
  5201. }
  5202. else {
  5203. currTar_Info->TarStatus |= (UCHAR)SYNC_SUPPORTED;
  5204. currTar_Info->TarEEValue &= ~EE_SYNC_MASK;
  5205. return(FALSE);
  5206. }
  5207. }
  5208. /*---------------------------------------------------------------------
  5209. *
  5210. * Function: stsyncn
  5211. *
  5212. * Description: The has sent us a Sync Nego message so handle it as
  5213. * necessary.
  5214. *
  5215. *---------------------------------------------------------------------*/
  5216. #if defined(DOS)
  5217. void stsyncn(USHORT port, UCHAR p_card)
  5218. #else
  5219. void stsyncn(ULONG port, UCHAR p_card)
  5220. #endif
  5221. {
  5222. UCHAR sync_msg,offset,sync_reg,our_sync_msg;
  5223. PSCCB currSCCB;
  5224. PSCCBMgr_tar_info currTar_Info;
  5225. currSCCB = BL_Card[p_card].currentSCCB;
  5226. currTar_Info = &sccbMgrTbl[p_card][currSCCB->TargID];
  5227. sync_msg = sfm(port,currSCCB);
  5228. if((sync_msg == 0x00) && (currSCCB->Sccb_scsimsg == SMPARITY))
  5229. {
  5230. WR_HARPOON(port+hp_autostart_1, (AUTO_IMMED+DISCONNECT_START));
  5231. return;
  5232. }
  5233. ACCEPT_MSG(port);
  5234. offset = sfm(port,currSCCB);
  5235. if((offset == 0x00) && (currSCCB->Sccb_scsimsg == SMPARITY))
  5236. {
  5237. WR_HARPOON(port+hp_autostart_1, (AUTO_IMMED+DISCONNECT_START));
  5238. return;
  5239. }
  5240. if ((currTar_Info->TarEEValue & EE_SYNC_MASK) == EE_SYNC_20MB)
  5241. our_sync_msg = 12; /* Setup our Message to 20mb/s */
  5242. else if ((currTar_Info->TarEEValue & EE_SYNC_MASK) == EE_SYNC_10MB)
  5243. our_sync_msg = 25; /* Setup our Message to 10mb/s */
  5244. else if ((currTar_Info->TarEEValue & EE_SYNC_MASK) == EE_SYNC_5MB)
  5245. our_sync_msg = 50; /* Setup our Message to 5mb/s */
  5246. else
  5247. our_sync_msg = 0; /* Message = Async */
  5248. if (sync_msg < our_sync_msg) {
  5249. sync_msg = our_sync_msg; /*if faster, then set to max. */
  5250. }
  5251. if (offset == ASYNC)
  5252. sync_msg = ASYNC;
  5253. if (offset > MAX_OFFSET)
  5254. offset = MAX_OFFSET;
  5255. sync_reg = 0x00;
  5256. if (sync_msg > 12)
  5257. sync_reg = 0x20; /* Use 10MB/s */
  5258. if (sync_msg > 25)
  5259. sync_reg = 0x40; /* Use 6.6MB/s */
  5260. if (sync_msg > 38)
  5261. sync_reg = 0x60; /* Use 5MB/s */
  5262. if (sync_msg > 50)
  5263. sync_reg = 0x80; /* Use 4MB/s */
  5264. if (sync_msg > 62)
  5265. sync_reg = 0xA0; /* Use 3.33MB/s */
  5266. if (sync_msg > 75)
  5267. sync_reg = 0xC0; /* Use 2.85MB/s */
  5268. if (sync_msg > 87)
  5269. sync_reg = 0xE0; /* Use 2.5MB/s */
  5270. if (sync_msg > 100) {
  5271. sync_reg = 0x00; /* Use ASYNC */
  5272. offset = 0x00;
  5273. }
  5274. #if defined(WIDE_SCSI)
  5275. if (currTar_Info->TarStatus & WIDE_ENABLED)
  5276. sync_reg |= offset;
  5277. else
  5278. sync_reg |= (offset | NARROW_SCSI);
  5279. #else
  5280. sync_reg |= (offset | NARROW_SCSI);
  5281. #endif
  5282. sssyncv(port,currSCCB->TargID,sync_reg,currTar_Info);
  5283. if (currSCCB->Sccb_scsistat == SELECT_SN_ST) {
  5284. ACCEPT_MSG(port);
  5285. currTar_Info->TarStatus = ((currTar_Info->TarStatus &
  5286. ~(UCHAR)TAR_SYNC_MASK) | (UCHAR)SYNC_SUPPORTED);
  5287. WR_HARPOON(port+hp_autostart_1, (AUTO_IMMED+DISCONNECT_START));
  5288. }
  5289. else {
  5290. ACCEPT_MSG_ATN(port);
  5291. sisyncr(port,sync_msg,offset);
  5292. currTar_Info->TarStatus = ((currTar_Info->TarStatus &
  5293. ~(UCHAR)TAR_SYNC_MASK) | (UCHAR)SYNC_SUPPORTED);
  5294. }
  5295. }
  5296. /*---------------------------------------------------------------------
  5297. *
  5298. * Function: sisyncr
  5299. *
  5300. * Description: Answer the targets sync message.
  5301. *
  5302. *---------------------------------------------------------------------*/
  5303. #if defined(DOS)
  5304. void sisyncr(USHORT port,UCHAR sync_pulse, UCHAR offset)
  5305. #else
  5306. void sisyncr(ULONG port,UCHAR sync_pulse, UCHAR offset)
  5307. #endif
  5308. {
  5309. ARAM_ACCESS(port);
  5310. WRW_HARPOON((port+SYNC_MSGS+0), (MPM_OP+AMSG_OUT+SMEXT ));
  5311. WRW_HARPOON((port+SYNC_MSGS+2), (MPM_OP+AMSG_OUT+0x03 ));
  5312. WRW_HARPOON((port+SYNC_MSGS+4), (MPM_OP+AMSG_OUT+SMSYNC));
  5313. WRW_HARPOON((port+SYNC_MSGS+6), (MPM_OP+AMSG_OUT+sync_pulse));
  5314. WRW_HARPOON((port+SYNC_MSGS+8), (RAT_OP ));
  5315. WRW_HARPOON((port+SYNC_MSGS+10),(MPM_OP+AMSG_OUT+offset));
  5316. WRW_HARPOON((port+SYNC_MSGS+12),(BRH_OP+ALWAYS+NP ));
  5317. SGRAM_ACCESS(port);
  5318. WR_HARPOON(port+hp_portctrl_0, SCSI_PORT);
  5319. WRW_HARPOON((port+hp_intstat), CLR_ALL_INT_1);
  5320. WR_HARPOON(port+hp_autostart_3, (AUTO_IMMED+CMD_ONLY_STRT));
  5321. while (!(RDW_HARPOON((port+hp_intstat)) & (BUS_FREE | AUTO_INT))) {}
  5322. }
  5323. #if defined(WIDE_SCSI)
  5324. /*---------------------------------------------------------------------
  5325. *
  5326. * Function: siwidn
  5327. *
  5328. * Description: Read in a message byte from the SCSI bus, and check
  5329. * for a parity error.
  5330. *
  5331. *---------------------------------------------------------------------*/
  5332. #if defined(DOS)
  5333. UCHAR siwidn(USHORT port, UCHAR p_card)
  5334. #else
  5335. UCHAR siwidn(ULONG port, UCHAR p_card)
  5336. #endif
  5337. {
  5338. PSCCB currSCCB;
  5339. PSCCBMgr_tar_info currTar_Info;
  5340. currSCCB = BL_Card[p_card].currentSCCB;
  5341. currTar_Info = &sccbMgrTbl[p_card][currSCCB->TargID];
  5342. if (!((currTar_Info->TarStatus & TAR_WIDE_MASK) == WIDE_NEGOCIATED)) {
  5343. WRW_HARPOON((port+ID_MSG_STRT),
  5344. (MPM_OP+AMSG_OUT+(currSCCB->Sccb_idmsg & ~(UCHAR)DISC_PRIV)));
  5345. WRW_HARPOON((port+ID_MSG_STRT+2),BRH_OP+ALWAYS+CMDPZ);
  5346. WRW_HARPOON((port+SYNC_MSGS+0), (MPM_OP+AMSG_OUT+SMEXT ));
  5347. WRW_HARPOON((port+SYNC_MSGS+2), (MPM_OP+AMSG_OUT+0x02 ));
  5348. WRW_HARPOON((port+SYNC_MSGS+4), (MPM_OP+AMSG_OUT+SMWDTR));
  5349. WRW_HARPOON((port+SYNC_MSGS+6), (RAT_OP ));
  5350. WRW_HARPOON((port+SYNC_MSGS+8), (MPM_OP+AMSG_OUT+ SM16BIT));
  5351. WRW_HARPOON((port+SYNC_MSGS+10),(BRH_OP+ALWAYS+NP ));
  5352. WR_HARPOON(port+hp_autostart_3, (SELECT+SELCHK_STRT));
  5353. currTar_Info->TarStatus = ((currTar_Info->TarStatus &
  5354. ~(UCHAR)TAR_WIDE_MASK) | (UCHAR)WIDE_ENABLED);
  5355. return(TRUE);
  5356. }
  5357. else {
  5358. currTar_Info->TarStatus = ((currTar_Info->TarStatus &
  5359. ~(UCHAR)TAR_WIDE_MASK) | WIDE_NEGOCIATED);
  5360. currTar_Info->TarEEValue &= ~EE_WIDE_SCSI;
  5361. return(FALSE);
  5362. }
  5363. }
  5364. /*---------------------------------------------------------------------
  5365. *
  5366. * Function: stwidn
  5367. *
  5368. * Description: The has sent us a Wide Nego message so handle it as
  5369. * necessary.
  5370. *
  5371. *---------------------------------------------------------------------*/
  5372. #if defined(DOS)
  5373. void stwidn(USHORT port, UCHAR p_card)
  5374. #else
  5375. void stwidn(ULONG port, UCHAR p_card)
  5376. #endif
  5377. {
  5378. UCHAR width;
  5379. PSCCB currSCCB;
  5380. PSCCBMgr_tar_info currTar_Info;
  5381. currSCCB = BL_Card[p_card].currentSCCB;
  5382. currTar_Info = &sccbMgrTbl[p_card][currSCCB->TargID];
  5383. width = sfm(port,currSCCB);
  5384. if((width == 0x00) && (currSCCB->Sccb_scsimsg == SMPARITY))
  5385. {
  5386. WR_HARPOON(port+hp_autostart_1, (AUTO_IMMED+DISCONNECT_START));
  5387. return;
  5388. }
  5389. if (!(currTar_Info->TarEEValue & EE_WIDE_SCSI))
  5390. width = 0;
  5391. if (width) {
  5392. currTar_Info->TarStatus |= WIDE_ENABLED;
  5393. width = 0;
  5394. }
  5395. else {
  5396. width = NARROW_SCSI;
  5397. currTar_Info->TarStatus &= ~WIDE_ENABLED;
  5398. }
  5399. sssyncv(port,currSCCB->TargID,width,currTar_Info);
  5400. if (currSCCB->Sccb_scsistat == SELECT_WN_ST)
  5401. {
  5402. currTar_Info->TarStatus |= WIDE_NEGOCIATED;
  5403. if (!((currTar_Info->TarStatus & TAR_SYNC_MASK) == SYNC_SUPPORTED))
  5404. {
  5405. ACCEPT_MSG_ATN(port);
  5406. ARAM_ACCESS(port);
  5407. sisyncn(port,p_card, TRUE);
  5408. currSCCB->Sccb_scsistat = SELECT_SN_ST;
  5409. SGRAM_ACCESS(port);
  5410. }
  5411. else
  5412. {
  5413. ACCEPT_MSG(port);
  5414. WR_HARPOON(port+hp_autostart_1, (AUTO_IMMED+DISCONNECT_START));
  5415. }
  5416. }
  5417. else {
  5418. ACCEPT_MSG_ATN(port);
  5419. if (currTar_Info->TarEEValue & EE_WIDE_SCSI)
  5420. width = SM16BIT;
  5421. else
  5422. width = SM8BIT;
  5423. siwidr(port,width);
  5424. currTar_Info->TarStatus |= (WIDE_NEGOCIATED | WIDE_ENABLED);
  5425. }
  5426. }
  5427. /*---------------------------------------------------------------------
  5428. *
  5429. * Function: siwidr
  5430. *
  5431. * Description: Answer the targets Wide nego message.
  5432. *
  5433. *---------------------------------------------------------------------*/
  5434. #if defined(DOS)
  5435. void siwidr(USHORT port, UCHAR width)
  5436. #else
  5437. void siwidr(ULONG port, UCHAR width)
  5438. #endif
  5439. {
  5440. ARAM_ACCESS(port);
  5441. WRW_HARPOON((port+SYNC_MSGS+0), (MPM_OP+AMSG_OUT+SMEXT ));
  5442. WRW_HARPOON((port+SYNC_MSGS+2), (MPM_OP+AMSG_OUT+0x02 ));
  5443. WRW_HARPOON((port+SYNC_MSGS+4), (MPM_OP+AMSG_OUT+SMWDTR));
  5444. WRW_HARPOON((port+SYNC_MSGS+6), (RAT_OP ));
  5445. WRW_HARPOON((port+SYNC_MSGS+8),(MPM_OP+AMSG_OUT+width));
  5446. WRW_HARPOON((port+SYNC_MSGS+10),(BRH_OP+ALWAYS+NP ));
  5447. SGRAM_ACCESS(port);
  5448. WR_HARPOON(port+hp_portctrl_0, SCSI_PORT);
  5449. WRW_HARPOON((port+hp_intstat), CLR_ALL_INT_1);
  5450. WR_HARPOON(port+hp_autostart_3, (AUTO_IMMED+CMD_ONLY_STRT));
  5451. while (!(RDW_HARPOON((port+hp_intstat)) & (BUS_FREE | AUTO_INT))) {}
  5452. }
  5453. #endif
  5454. /*---------------------------------------------------------------------
  5455. *
  5456. * Function: sssyncv
  5457. *
  5458. * Description: Write the desired value to the Sync Register for the
  5459. * ID specified.
  5460. *
  5461. *---------------------------------------------------------------------*/
  5462. #if defined(DOS)
  5463. void sssyncv(USHORT p_port, UCHAR p_id, UCHAR p_sync_value,PSCCBMgr_tar_info currTar_Info)
  5464. #else
  5465. void sssyncv(ULONG p_port, UCHAR p_id, UCHAR p_sync_value,PSCCBMgr_tar_info currTar_Info)
  5466. #endif
  5467. {
  5468. UCHAR index;
  5469. index = p_id;
  5470. switch (index) {
  5471. case 0:
  5472. index = 12; /* hp_synctarg_0 */
  5473. break;
  5474. case 1:
  5475. index = 13; /* hp_synctarg_1 */
  5476. break;
  5477. case 2:
  5478. index = 14; /* hp_synctarg_2 */
  5479. break;
  5480. case 3:
  5481. index = 15; /* hp_synctarg_3 */
  5482. break;
  5483. case 4:
  5484. index = 8; /* hp_synctarg_4 */
  5485. break;
  5486. case 5:
  5487. index = 9; /* hp_synctarg_5 */
  5488. break;
  5489. case 6:
  5490. index = 10; /* hp_synctarg_6 */
  5491. break;
  5492. case 7:
  5493. index = 11; /* hp_synctarg_7 */
  5494. break;
  5495. case 8:
  5496. index = 4; /* hp_synctarg_8 */
  5497. break;
  5498. case 9:
  5499. index = 5; /* hp_synctarg_9 */
  5500. break;
  5501. case 10:
  5502. index = 6; /* hp_synctarg_10 */
  5503. break;
  5504. case 11:
  5505. index = 7; /* hp_synctarg_11 */
  5506. break;
  5507. case 12:
  5508. index = 0; /* hp_synctarg_12 */
  5509. break;
  5510. case 13:
  5511. index = 1; /* hp_synctarg_13 */
  5512. break;
  5513. case 14:
  5514. index = 2; /* hp_synctarg_14 */
  5515. break;
  5516. case 15:
  5517. index = 3; /* hp_synctarg_15 */
  5518. }
  5519. WR_HARPOON(p_port+hp_synctarg_base+index, p_sync_value);
  5520. currTar_Info->TarSyncCtrl = p_sync_value;
  5521. }
  5522. /*---------------------------------------------------------------------
  5523. *
  5524. * Function: sresb
  5525. *
  5526. * Description: Reset the desired card's SCSI bus.
  5527. *
  5528. *---------------------------------------------------------------------*/
  5529. #if defined(DOS)
  5530. void sresb(USHORT port, UCHAR p_card)
  5531. #else
  5532. void sresb(ULONG port, UCHAR p_card)
  5533. #endif
  5534. {
  5535. UCHAR scsiID, i;
  5536. PSCCBMgr_tar_info currTar_Info;
  5537. WR_HARPOON(port+hp_page_ctrl,
  5538. (RD_HARPOON(port+hp_page_ctrl) | G_INT_DISABLE));
  5539. WRW_HARPOON((port+hp_intstat), CLR_ALL_INT);
  5540. WR_HARPOON(port+hp_scsictrl_0, SCSI_RST);
  5541. scsiID = RD_HARPOON(port+hp_seltimeout);
  5542. WR_HARPOON(port+hp_seltimeout,TO_5ms);
  5543. WRW_HARPOON((port+hp_intstat), TIMEOUT);
  5544. WR_HARPOON(port+hp_portctrl_0,(SCSI_PORT | START_TO));
  5545. while (!(RDW_HARPOON((port+hp_intstat)) & TIMEOUT)) {}
  5546. WR_HARPOON(port+hp_seltimeout,scsiID);
  5547. WR_HARPOON(port+hp_scsictrl_0, ENA_SCAM_SEL);
  5548. Wait(port, TO_5ms);
  5549. WRW_HARPOON((port+hp_intstat), CLR_ALL_INT);
  5550. WR_HARPOON(port+hp_int_mask, (RD_HARPOON(port+hp_int_mask) | 0x00));
  5551. for (scsiID = 0; scsiID < MAX_SCSI_TAR; scsiID++)
  5552. {
  5553. currTar_Info = &sccbMgrTbl[p_card][scsiID];
  5554. if (currTar_Info->TarEEValue & EE_SYNC_MASK)
  5555. {
  5556. currTar_Info->TarSyncCtrl = 0;
  5557. currTar_Info->TarStatus &= ~TAR_SYNC_MASK;
  5558. }
  5559. if (currTar_Info->TarEEValue & EE_WIDE_SCSI)
  5560. {
  5561. currTar_Info->TarStatus &= ~TAR_WIDE_MASK;
  5562. }
  5563. sssyncv(port, scsiID, NARROW_SCSI,currTar_Info);
  5564. SccbMgrTableInitTarget(p_card, scsiID);
  5565. }
  5566. BL_Card[p_card].scanIndex = 0x00;
  5567. BL_Card[p_card].currentSCCB = NULL;
  5568. BL_Card[p_card].globalFlags &= ~(F_TAG_STARTED | F_HOST_XFER_ACT
  5569. | F_NEW_SCCB_CMD);
  5570. BL_Card[p_card].cmdCounter = 0x00;
  5571. BL_Card[p_card].discQCount = 0x00;
  5572. BL_Card[p_card].tagQ_Lst = 0x01;
  5573. for(i = 0; i < QUEUE_DEPTH; i++)
  5574. BL_Card[p_card].discQ_Tbl[i] = NULL;
  5575. WR_HARPOON(port+hp_page_ctrl,
  5576. (RD_HARPOON(port+hp_page_ctrl) & ~G_INT_DISABLE));
  5577. }
  5578. /*---------------------------------------------------------------------
  5579. *
  5580. * Function: ssenss
  5581. *
  5582. * Description: Setup for the Auto Sense command.
  5583. *
  5584. *---------------------------------------------------------------------*/
  5585. void ssenss(PSCCBcard pCurrCard)
  5586. {
  5587. UCHAR i;
  5588. PSCCB currSCCB;
  5589. currSCCB = pCurrCard->currentSCCB;
  5590. currSCCB->Save_CdbLen = currSCCB->CdbLength;
  5591. for (i = 0; i < 6; i++) {
  5592. currSCCB->Save_Cdb[i] = currSCCB->Cdb[i];
  5593. }
  5594. currSCCB->CdbLength = SIX_BYTE_CMD;
  5595. currSCCB->Cdb[0] = SCSI_REQUEST_SENSE;
  5596. currSCCB->Cdb[1] = currSCCB->Cdb[1] & (UCHAR)0xE0; /*Keep LUN. */
  5597. currSCCB->Cdb[2] = 0x00;
  5598. currSCCB->Cdb[3] = 0x00;
  5599. currSCCB->Cdb[4] = currSCCB->RequestSenseLength;
  5600. currSCCB->Cdb[5] = 0x00;
  5601. currSCCB->Sccb_XferCnt = (unsigned long)currSCCB->RequestSenseLength;
  5602. currSCCB->Sccb_ATC = 0x00;
  5603. currSCCB->Sccb_XferState |= F_AUTO_SENSE;
  5604. currSCCB->Sccb_XferState &= ~F_SG_XFER;
  5605. currSCCB->Sccb_idmsg = currSCCB->Sccb_idmsg & ~(UCHAR)DISC_PRIV;
  5606. currSCCB->ControlByte = 0x00;
  5607. currSCCB->Sccb_MGRFlags &= F_STATUSLOADED;
  5608. }
  5609. /*---------------------------------------------------------------------
  5610. *
  5611. * Function: sxfrp
  5612. *
  5613. * Description: Transfer data into the bit bucket until the device
  5614. * decides to switch phase.
  5615. *
  5616. *---------------------------------------------------------------------*/
  5617. #if defined(DOS)
  5618. void sxfrp(USHORT p_port, UCHAR p_card)
  5619. #else
  5620. void sxfrp(ULONG p_port, UCHAR p_card)
  5621. #endif
  5622. {
  5623. UCHAR curr_phz;
  5624. DISABLE_AUTO(p_port);
  5625. if (BL_Card[p_card].globalFlags & F_HOST_XFER_ACT) {
  5626. hostDataXferAbort(p_port,p_card,BL_Card[p_card].currentSCCB);
  5627. }
  5628. /* If the Automation handled the end of the transfer then do not
  5629. match the phase or we will get out of sync with the ISR. */
  5630. if (RDW_HARPOON((p_port+hp_intstat)) & (BUS_FREE | XFER_CNT_0 | AUTO_INT))
  5631. return;
  5632. WR_HARPOON(p_port+hp_xfercnt_0, 0x00);
  5633. curr_phz = RD_HARPOON(p_port+hp_scsisig) & (UCHAR)S_SCSI_PHZ;
  5634. WRW_HARPOON((p_port+hp_intstat), XFER_CNT_0);
  5635. WR_HARPOON(p_port+hp_scsisig, curr_phz);
  5636. while ( !(RDW_HARPOON((p_port+hp_intstat)) & (BUS_FREE | RESET)) &&
  5637. (curr_phz == (RD_HARPOON(p_port+hp_scsisig) & (UCHAR)S_SCSI_PHZ)) )
  5638. {
  5639. if (curr_phz & (UCHAR)SCSI_IOBIT)
  5640. {
  5641. WR_HARPOON(p_port+hp_portctrl_0, (SCSI_PORT | HOST_PORT | SCSI_INBIT));
  5642. if (!(RD_HARPOON(p_port+hp_xferstat) & FIFO_EMPTY))
  5643. {
  5644. RD_HARPOON(p_port+hp_fifodata_0);
  5645. }
  5646. }
  5647. else
  5648. {
  5649. WR_HARPOON(p_port+hp_portctrl_0, (SCSI_PORT | HOST_PORT | HOST_WRT));
  5650. if (RD_HARPOON(p_port+hp_xferstat) & FIFO_EMPTY)
  5651. {
  5652. WR_HARPOON(p_port+hp_fifodata_0,0xFA);
  5653. }
  5654. }
  5655. } /* End of While loop for padding data I/O phase */
  5656. while ( !(RDW_HARPOON((p_port+hp_intstat)) & (BUS_FREE | RESET)))
  5657. {
  5658. if (RD_HARPOON(p_port+hp_scsisig) & SCSI_REQ)
  5659. break;
  5660. }
  5661. WR_HARPOON(p_port+hp_portctrl_0, (SCSI_PORT | HOST_PORT | SCSI_INBIT));
  5662. while (!(RD_HARPOON(p_port+hp_xferstat) & FIFO_EMPTY))
  5663. {
  5664. RD_HARPOON(p_port+hp_fifodata_0);
  5665. }
  5666. if ( !(RDW_HARPOON((p_port+hp_intstat)) & (BUS_FREE | RESET)))
  5667. {
  5668. WR_HARPOON(p_port+hp_autostart_0, (AUTO_IMMED+DISCONNECT_START));
  5669. while (!(RDW_HARPOON((p_port+hp_intstat)) & AUTO_INT)) {}
  5670. if (RDW_HARPOON((p_port+hp_intstat)) & (ICMD_COMP | ITAR_DISC))
  5671. while (!(RDW_HARPOON((p_port+hp_intstat)) & (BUS_FREE | RSEL))) ;
  5672. }
  5673. }
  5674. /*---------------------------------------------------------------------
  5675. *
  5676. * Function: schkdd
  5677. *
  5678. * Description: Make sure data has been flushed from both FIFOs and abort
  5679. * the operations if necessary.
  5680. *
  5681. *---------------------------------------------------------------------*/
  5682. #if defined(DOS)
  5683. void schkdd(USHORT port, UCHAR p_card)
  5684. #else
  5685. void schkdd(ULONG port, UCHAR p_card)
  5686. #endif
  5687. {
  5688. USHORT TimeOutLoop;
  5689. UCHAR sPhase;
  5690. PSCCB currSCCB;
  5691. currSCCB = BL_Card[p_card].currentSCCB;
  5692. if ((currSCCB->Sccb_scsistat != DATA_OUT_ST) &&
  5693. (currSCCB->Sccb_scsistat != DATA_IN_ST)) {
  5694. return;
  5695. }
  5696. if (currSCCB->Sccb_XferState & F_ODD_BALL_CNT)
  5697. {
  5698. currSCCB->Sccb_ATC += (currSCCB->Sccb_XferCnt-1);
  5699. currSCCB->Sccb_XferCnt = 1;
  5700. currSCCB->Sccb_XferState &= ~F_ODD_BALL_CNT;
  5701. WRW_HARPOON((port+hp_fiforead), (USHORT) 0x00);
  5702. WR_HARPOON(port+hp_xferstat, 0x00);
  5703. }
  5704. else
  5705. {
  5706. currSCCB->Sccb_ATC += currSCCB->Sccb_XferCnt;
  5707. currSCCB->Sccb_XferCnt = 0;
  5708. }
  5709. if ((RDW_HARPOON((port+hp_intstat)) & PARITY) &&
  5710. (currSCCB->HostStatus == SCCB_COMPLETE)) {
  5711. currSCCB->HostStatus = SCCB_PARITY_ERR;
  5712. WRW_HARPOON((port+hp_intstat), PARITY);
  5713. }
  5714. hostDataXferAbort(port,p_card,currSCCB);
  5715. while (RD_HARPOON(port+hp_scsisig) & SCSI_ACK) {}
  5716. TimeOutLoop = 0;
  5717. while(RD_HARPOON(port+hp_xferstat) & FIFO_EMPTY)
  5718. {
  5719. if (RDW_HARPOON((port+hp_intstat)) & BUS_FREE) {
  5720. return;
  5721. }
  5722. if (RD_HARPOON(port+hp_offsetctr) & (UCHAR)0x1F) {
  5723. break;
  5724. }
  5725. if (RDW_HARPOON((port+hp_intstat)) & RESET) {
  5726. return;
  5727. }
  5728. if ((RD_HARPOON(port+hp_scsisig) & SCSI_REQ) || (TimeOutLoop++>0x3000) )
  5729. break;
  5730. }
  5731. sPhase = RD_HARPOON(port+hp_scsisig) & (SCSI_BSY | S_SCSI_PHZ);
  5732. if ((!(RD_HARPOON(port+hp_xferstat) & FIFO_EMPTY)) ||
  5733. (RD_HARPOON(port+hp_offsetctr) & (UCHAR)0x1F) ||
  5734. (sPhase == (SCSI_BSY | S_DATAO_PH)) ||
  5735. (sPhase == (SCSI_BSY | S_DATAI_PH)))
  5736. {
  5737. WR_HARPOON(port+hp_portctrl_0, SCSI_PORT);
  5738. if (!(currSCCB->Sccb_XferState & F_ALL_XFERRED))
  5739. {
  5740. if (currSCCB->Sccb_XferState & F_HOST_XFER_DIR) {
  5741. phaseDataIn(port,p_card);
  5742. }
  5743. else {
  5744. phaseDataOut(port,p_card);
  5745. }
  5746. }
  5747. else
  5748. {
  5749. sxfrp(port,p_card);
  5750. if (!(RDW_HARPOON((port+hp_intstat)) &
  5751. (BUS_FREE | ICMD_COMP | ITAR_DISC | RESET)))
  5752. {
  5753. WRW_HARPOON((port+hp_intstat), AUTO_INT);
  5754. phaseDecode(port,p_card);
  5755. }
  5756. }
  5757. }
  5758. else {
  5759. WR_HARPOON(port+hp_portctrl_0, 0x00);
  5760. }
  5761. }
  5762. /*---------------------------------------------------------------------
  5763. *
  5764. * Function: sinits
  5765. *
  5766. * Description: Setup SCCB manager fields in this SCCB.
  5767. *
  5768. *---------------------------------------------------------------------*/
  5769. void sinits(PSCCB p_sccb, UCHAR p_card)
  5770. {
  5771. PSCCBMgr_tar_info currTar_Info;
  5772. if((p_sccb->TargID > MAX_SCSI_TAR) || (p_sccb->Lun > MAX_LUN))
  5773. {
  5774. return;
  5775. }
  5776. currTar_Info = &sccbMgrTbl[p_card][p_sccb->TargID];
  5777. p_sccb->Sccb_XferState = 0x00;
  5778. p_sccb->Sccb_XferCnt = p_sccb->DataLength;
  5779. if ((p_sccb->OperationCode == SCATTER_GATHER_COMMAND) ||
  5780. (p_sccb->OperationCode == RESIDUAL_SG_COMMAND)) {
  5781. p_sccb->Sccb_SGoffset = 0;
  5782. p_sccb->Sccb_XferState = F_SG_XFER;
  5783. p_sccb->Sccb_XferCnt = 0x00;
  5784. }
  5785. if (p_sccb->DataLength == 0x00)
  5786. p_sccb->Sccb_XferState |= F_ALL_XFERRED;
  5787. if (p_sccb->ControlByte & F_USE_CMD_Q)
  5788. {
  5789. if ((currTar_Info->TarStatus & TAR_TAG_Q_MASK) == TAG_Q_REJECT)
  5790. p_sccb->ControlByte &= ~F_USE_CMD_Q;
  5791. else
  5792. currTar_Info->TarStatus |= TAG_Q_TRYING;
  5793. }
  5794. /* For !single SCSI device in system & device allow Disconnect
  5795. or command is tag_q type then send Cmd with Disconnect Enable
  5796. else send Cmd with Disconnect Disable */
  5797. /*
  5798. if (((!(BL_Card[p_card].globalFlags & F_SINGLE_DEVICE)) &&
  5799. (currTar_Info->TarStatus & TAR_ALLOW_DISC)) ||
  5800. (currTar_Info->TarStatus & TAG_Q_TRYING)) {
  5801. */
  5802. if ((currTar_Info->TarStatus & TAR_ALLOW_DISC) ||
  5803. (currTar_Info->TarStatus & TAG_Q_TRYING)) {
  5804. p_sccb->Sccb_idmsg = (UCHAR)(SMIDENT | DISC_PRIV) | p_sccb->Lun;
  5805. }
  5806. else {
  5807. p_sccb->Sccb_idmsg = (UCHAR)SMIDENT | p_sccb->Lun;
  5808. }
  5809. p_sccb->HostStatus = 0x00;
  5810. p_sccb->TargetStatus = 0x00;
  5811. p_sccb->Sccb_tag = 0x00;
  5812. p_sccb->Sccb_MGRFlags = 0x00;
  5813. p_sccb->Sccb_sgseg = 0x00;
  5814. p_sccb->Sccb_ATC = 0x00;
  5815. p_sccb->Sccb_savedATC = 0x00;
  5816. /*
  5817. p_sccb->SccbVirtDataPtr = 0x00;
  5818. p_sccb->Sccb_forwardlink = NULL;
  5819. p_sccb->Sccb_backlink = NULL;
  5820. */
  5821. p_sccb->Sccb_scsistat = BUS_FREE_ST;
  5822. p_sccb->SccbStatus = SCCB_IN_PROCESS;
  5823. p_sccb->Sccb_scsimsg = SMNO_OP;
  5824. }
  5825. #ident "$Id: phase.c 1.11 1997/01/31 02:08:49 mohan Exp $"
  5826. /*----------------------------------------------------------------------
  5827. *
  5828. *
  5829. * Copyright 1995-1996 by Mylex Corporation. All Rights Reserved
  5830. *
  5831. * This file is available under both the GNU General Public License
  5832. * and a BSD-style copyright; see LICENSE.FlashPoint for details.
  5833. *
  5834. * $Workfile: phase.c $
  5835. *
  5836. * Description: Functions to initially handle the SCSI bus phase when
  5837. * the target asserts request (and the automation is not
  5838. * enabled to handle the situation).
  5839. *
  5840. * $Date: 1997/01/31 02:08:49 $
  5841. *
  5842. * $Revision: 1.11 $
  5843. *
  5844. *----------------------------------------------------------------------*/
  5845. /*#include <globals.h>*/
  5846. #if (FW_TYPE==_UCB_MGR_)
  5847. /*#include <budi.h>*/
  5848. #endif
  5849. /*#include <sccbmgr.h>*/
  5850. /*#include <blx30.h>*/
  5851. /*#include <target.h>*/
  5852. /*#include <scsi2.h>*/
  5853. /*#include <harpoon.h>*/
  5854. /*
  5855. extern SCCBCARD BL_Card[MAX_CARDS];
  5856. extern SCCBMGR_TAR_INFO sccbMgrTbl[MAX_CARDS][MAX_SCSI_TAR];
  5857. #if defined(OS2)
  5858. extern void (far *s_PhaseTbl[8]) (ULONG, UCHAR);
  5859. #else
  5860. #if defined(DOS)
  5861. extern void (*s_PhaseTbl[8]) (USHORT, UCHAR);
  5862. #else
  5863. extern void (*s_PhaseTbl[8]) (ULONG, UCHAR);
  5864. #endif
  5865. #endif
  5866. */
  5867. /*---------------------------------------------------------------------
  5868. *
  5869. * Function: Phase Decode
  5870. *
  5871. * Description: Determine the phase and call the appropriate function.
  5872. *
  5873. *---------------------------------------------------------------------*/
  5874. #if defined(DOS)
  5875. void phaseDecode(USHORT p_port, UCHAR p_card)
  5876. #else
  5877. void phaseDecode(ULONG p_port, UCHAR p_card)
  5878. #endif
  5879. {
  5880. unsigned char phase_ref;
  5881. #if defined(OS2)
  5882. void (far *phase) (ULONG, UCHAR);
  5883. #else
  5884. #if defined(DOS)
  5885. void (*phase) (USHORT, UCHAR);
  5886. #else
  5887. void (*phase) (ULONG, UCHAR);
  5888. #endif
  5889. #endif
  5890. DISABLE_AUTO(p_port);
  5891. phase_ref = (UCHAR) (RD_HARPOON(p_port+hp_scsisig) & S_SCSI_PHZ);
  5892. phase = s_PhaseTbl[phase_ref];
  5893. (*phase)(p_port, p_card); /* Call the correct phase func */
  5894. }
  5895. /*---------------------------------------------------------------------
  5896. *
  5897. * Function: Data Out Phase
  5898. *
  5899. * Description: Start up both the BusMaster and Xbow.
  5900. *
  5901. *---------------------------------------------------------------------*/
  5902. #if defined(OS2)
  5903. void far phaseDataOut(ULONG port, UCHAR p_card)
  5904. #else
  5905. #if defined(DOS)
  5906. void phaseDataOut(USHORT port, UCHAR p_card)
  5907. #else
  5908. void phaseDataOut(ULONG port, UCHAR p_card)
  5909. #endif
  5910. #endif
  5911. {
  5912. PSCCB currSCCB;
  5913. currSCCB = BL_Card[p_card].currentSCCB;
  5914. if (currSCCB == NULL)
  5915. {
  5916. return; /* Exit if No SCCB record */
  5917. }
  5918. currSCCB->Sccb_scsistat = DATA_OUT_ST;
  5919. currSCCB->Sccb_XferState &= ~(F_HOST_XFER_DIR | F_NO_DATA_YET);
  5920. WR_HARPOON(port+hp_portctrl_0, SCSI_PORT);
  5921. WRW_HARPOON((port+hp_intstat), XFER_CNT_0);
  5922. WR_HARPOON(port+hp_autostart_0, (END_DATA+END_DATA_START));
  5923. dataXferProcessor(port, &BL_Card[p_card]);
  5924. #if defined(NOBUGBUG)
  5925. if (RDW_HARPOON((port+hp_intstat)) & XFER_CNT_0)
  5926. WRW_HARPOON((port+hp_intstat), XFER_CNT_0);
  5927. #endif
  5928. if (currSCCB->Sccb_XferCnt == 0) {
  5929. if ((currSCCB->ControlByte & SCCB_DATA_XFER_OUT) &&
  5930. (currSCCB->HostStatus == SCCB_COMPLETE))
  5931. currSCCB->HostStatus = SCCB_DATA_OVER_RUN;
  5932. sxfrp(port,p_card);
  5933. if (!(RDW_HARPOON((port+hp_intstat)) & (BUS_FREE | RESET)))
  5934. phaseDecode(port,p_card);
  5935. }
  5936. }
  5937. /*---------------------------------------------------------------------
  5938. *
  5939. * Function: Data In Phase
  5940. *
  5941. * Description: Startup the BusMaster and the XBOW.
  5942. *
  5943. *---------------------------------------------------------------------*/
  5944. #if defined(OS2)
  5945. void far phaseDataIn(ULONG port, UCHAR p_card)
  5946. #else
  5947. #if defined(DOS)
  5948. void phaseDataIn(USHORT port, UCHAR p_card)
  5949. #else
  5950. void phaseDataIn(ULONG port, UCHAR p_card)
  5951. #endif
  5952. #endif
  5953. {
  5954. PSCCB currSCCB;
  5955. currSCCB = BL_Card[p_card].currentSCCB;
  5956. if (currSCCB == NULL)
  5957. {
  5958. return; /* Exit if No SCCB record */
  5959. }
  5960. currSCCB->Sccb_scsistat = DATA_IN_ST;
  5961. currSCCB->Sccb_XferState |= F_HOST_XFER_DIR;
  5962. currSCCB->Sccb_XferState &= ~F_NO_DATA_YET;
  5963. WR_HARPOON(port+hp_portctrl_0, SCSI_PORT);
  5964. WRW_HARPOON((port+hp_intstat), XFER_CNT_0);
  5965. WR_HARPOON(port+hp_autostart_0, (END_DATA+END_DATA_START));
  5966. dataXferProcessor(port, &BL_Card[p_card]);
  5967. if (currSCCB->Sccb_XferCnt == 0) {
  5968. if ((currSCCB->ControlByte & SCCB_DATA_XFER_IN) &&
  5969. (currSCCB->HostStatus == SCCB_COMPLETE))
  5970. currSCCB->HostStatus = SCCB_DATA_OVER_RUN;
  5971. sxfrp(port,p_card);
  5972. if (!(RDW_HARPOON((port+hp_intstat)) & (BUS_FREE | RESET)))
  5973. phaseDecode(port,p_card);
  5974. }
  5975. }
  5976. /*---------------------------------------------------------------------
  5977. *
  5978. * Function: Command Phase
  5979. *
  5980. * Description: Load the CDB into the automation and start it up.
  5981. *
  5982. *---------------------------------------------------------------------*/
  5983. #if defined(OS2)
  5984. void far phaseCommand(ULONG p_port, UCHAR p_card)
  5985. #else
  5986. #if defined(DOS)
  5987. void phaseCommand(USHORT p_port, UCHAR p_card)
  5988. #else
  5989. void phaseCommand(ULONG p_port, UCHAR p_card)
  5990. #endif
  5991. #endif
  5992. {
  5993. PSCCB currSCCB;
  5994. #if defined(DOS)
  5995. USHORT cdb_reg;
  5996. #else
  5997. ULONG cdb_reg;
  5998. #endif
  5999. UCHAR i;
  6000. currSCCB = BL_Card[p_card].currentSCCB;
  6001. if (currSCCB->OperationCode == RESET_COMMAND) {
  6002. currSCCB->HostStatus = SCCB_PHASE_SEQUENCE_FAIL;
  6003. currSCCB->CdbLength = SIX_BYTE_CMD;
  6004. }
  6005. WR_HARPOON(p_port+hp_scsisig, 0x00);
  6006. ARAM_ACCESS(p_port);
  6007. cdb_reg = p_port + CMD_STRT;
  6008. for (i=0; i < currSCCB->CdbLength; i++) {
  6009. if (currSCCB->OperationCode == RESET_COMMAND)
  6010. WRW_HARPOON(cdb_reg, (MPM_OP + ACOMMAND + 0x00));
  6011. else
  6012. WRW_HARPOON(cdb_reg, (MPM_OP + ACOMMAND + currSCCB->Cdb[i]));
  6013. cdb_reg +=2;
  6014. }
  6015. if (currSCCB->CdbLength != TWELVE_BYTE_CMD)
  6016. WRW_HARPOON(cdb_reg, (BRH_OP+ALWAYS+ NP));
  6017. WR_HARPOON(p_port+hp_portctrl_0,(SCSI_PORT));
  6018. currSCCB->Sccb_scsistat = COMMAND_ST;
  6019. WR_HARPOON(p_port+hp_autostart_3, (AUTO_IMMED | CMD_ONLY_STRT));
  6020. SGRAM_ACCESS(p_port);
  6021. }
  6022. /*---------------------------------------------------------------------
  6023. *
  6024. * Function: Status phase
  6025. *
  6026. * Description: Bring in the status and command complete message bytes
  6027. *
  6028. *---------------------------------------------------------------------*/
  6029. #if defined(OS2)
  6030. void far phaseStatus(ULONG port, UCHAR p_card)
  6031. #else
  6032. #if defined(DOS)
  6033. void phaseStatus(USHORT port, UCHAR p_card)
  6034. #else
  6035. void phaseStatus(ULONG port, UCHAR p_card)
  6036. #endif
  6037. #endif
  6038. {
  6039. /* Start-up the automation to finish off this command and let the
  6040. isr handle the interrupt for command complete when it comes in.
  6041. We could wait here for the interrupt to be generated?
  6042. */
  6043. WR_HARPOON(port+hp_scsisig, 0x00);
  6044. WR_HARPOON(port+hp_autostart_0, (AUTO_IMMED+END_DATA_START));
  6045. }
  6046. /*---------------------------------------------------------------------
  6047. *
  6048. * Function: Phase Message Out
  6049. *
  6050. * Description: Send out our message (if we have one) and handle whatever
  6051. * else is involed.
  6052. *
  6053. *---------------------------------------------------------------------*/
  6054. #if defined(OS2)
  6055. void far phaseMsgOut(ULONG port, UCHAR p_card)
  6056. #else
  6057. #if defined(DOS)
  6058. void phaseMsgOut(USHORT port, UCHAR p_card)
  6059. #else
  6060. void phaseMsgOut(ULONG port, UCHAR p_card)
  6061. #endif
  6062. #endif
  6063. {
  6064. UCHAR message,scsiID;
  6065. PSCCB currSCCB;
  6066. PSCCBMgr_tar_info currTar_Info;
  6067. currSCCB = BL_Card[p_card].currentSCCB;
  6068. if (currSCCB != NULL) {
  6069. message = currSCCB->Sccb_scsimsg;
  6070. scsiID = currSCCB->TargID;
  6071. if (message == SMDEV_RESET)
  6072. {
  6073. currTar_Info = &sccbMgrTbl[p_card][scsiID];
  6074. currTar_Info->TarSyncCtrl = 0;
  6075. sssyncv(port, scsiID, NARROW_SCSI,currTar_Info);
  6076. if (sccbMgrTbl[p_card][scsiID].TarEEValue & EE_SYNC_MASK)
  6077. {
  6078. sccbMgrTbl[p_card][scsiID].TarStatus &= ~TAR_SYNC_MASK;
  6079. }
  6080. if (sccbMgrTbl[p_card][scsiID].TarEEValue & EE_WIDE_SCSI)
  6081. {
  6082. sccbMgrTbl[p_card][scsiID].TarStatus &= ~TAR_WIDE_MASK;
  6083. }
  6084. queueFlushSccb(p_card,SCCB_COMPLETE);
  6085. SccbMgrTableInitTarget(p_card,scsiID);
  6086. }
  6087. else if (currSCCB->Sccb_scsistat == ABORT_ST)
  6088. {
  6089. currSCCB->HostStatus = SCCB_COMPLETE;
  6090. if(BL_Card[p_card].discQ_Tbl[currSCCB->Sccb_tag] != NULL)
  6091. {
  6092. BL_Card[p_card].discQ_Tbl[currSCCB->Sccb_tag] = NULL;
  6093. sccbMgrTbl[p_card][scsiID].TarTagQ_Cnt--;
  6094. }
  6095. }
  6096. else if (currSCCB->Sccb_scsistat < COMMAND_ST)
  6097. {
  6098. if(message == SMNO_OP)
  6099. {
  6100. currSCCB->Sccb_MGRFlags |= F_DEV_SELECTED;
  6101. ssel(port,p_card);
  6102. return;
  6103. }
  6104. }
  6105. else
  6106. {
  6107. if (message == SMABORT)
  6108. queueFlushSccb(p_card,SCCB_COMPLETE);
  6109. }
  6110. }
  6111. else
  6112. {
  6113. message = SMABORT;
  6114. }
  6115. WRW_HARPOON((port+hp_intstat), (BUS_FREE | PHASE | XFER_CNT_0));
  6116. WR_HARPOON(port+hp_portctrl_0, SCSI_BUS_EN);
  6117. WR_HARPOON(port+hp_scsidata_0,message);
  6118. WR_HARPOON(port+hp_scsisig, (SCSI_ACK + S_ILL_PH));
  6119. ACCEPT_MSG(port);
  6120. WR_HARPOON(port+hp_portctrl_0, 0x00);
  6121. if ((message == SMABORT) || (message == SMDEV_RESET) ||
  6122. (message == SMABORT_TAG) )
  6123. {
  6124. while(!(RDW_HARPOON((port+hp_intstat)) & (BUS_FREE | PHASE))) {}
  6125. if (RDW_HARPOON((port+hp_intstat)) & BUS_FREE)
  6126. {
  6127. WRW_HARPOON((port+hp_intstat), BUS_FREE);
  6128. if (currSCCB != NULL)
  6129. {
  6130. if((BL_Card[p_card].globalFlags & F_CONLUN_IO) &&
  6131. ((sccbMgrTbl[p_card][currSCCB->TargID].TarStatus & TAR_TAG_Q_MASK) != TAG_Q_TRYING))
  6132. sccbMgrTbl[p_card][currSCCB->TargID].TarLUNBusy[currSCCB->Lun] = FALSE;
  6133. else
  6134. sccbMgrTbl[p_card][currSCCB->TargID].TarLUNBusy[0] = FALSE;
  6135. queueCmdComplete(&BL_Card[p_card],currSCCB, p_card);
  6136. }
  6137. else
  6138. {
  6139. BL_Card[p_card].globalFlags |= F_NEW_SCCB_CMD;
  6140. }
  6141. }
  6142. else
  6143. {
  6144. sxfrp(port,p_card);
  6145. }
  6146. }
  6147. else
  6148. {
  6149. if(message == SMPARITY)
  6150. {
  6151. currSCCB->Sccb_scsimsg = SMNO_OP;
  6152. WR_HARPOON(port+hp_autostart_1, (AUTO_IMMED+DISCONNECT_START));
  6153. }
  6154. else
  6155. {
  6156. sxfrp(port,p_card);
  6157. }
  6158. }
  6159. }
  6160. /*---------------------------------------------------------------------
  6161. *
  6162. * Function: Message In phase
  6163. *
  6164. * Description: Bring in the message and determine what to do with it.
  6165. *
  6166. *---------------------------------------------------------------------*/
  6167. #if defined(OS2)
  6168. void far phaseMsgIn(ULONG port, UCHAR p_card)
  6169. #else
  6170. #if defined(DOS)
  6171. void phaseMsgIn(USHORT port, UCHAR p_card)
  6172. #else
  6173. void phaseMsgIn(ULONG port, UCHAR p_card)
  6174. #endif
  6175. #endif
  6176. {
  6177. UCHAR message;
  6178. PSCCB currSCCB;
  6179. currSCCB = BL_Card[p_card].currentSCCB;
  6180. if (BL_Card[p_card].globalFlags & F_HOST_XFER_ACT)
  6181. {
  6182. phaseChkFifo(port, p_card);
  6183. }
  6184. message = RD_HARPOON(port+hp_scsidata_0);
  6185. if ((message == SMDISC) || (message == SMSAVE_DATA_PTR))
  6186. {
  6187. WR_HARPOON(port+hp_autostart_1, (AUTO_IMMED+END_DATA_START));
  6188. }
  6189. else
  6190. {
  6191. message = sfm(port,currSCCB);
  6192. if (message)
  6193. {
  6194. sdecm(message,port,p_card);
  6195. }
  6196. else
  6197. {
  6198. if(currSCCB->Sccb_scsimsg != SMPARITY)
  6199. ACCEPT_MSG(port);
  6200. WR_HARPOON(port+hp_autostart_1, (AUTO_IMMED+DISCONNECT_START));
  6201. }
  6202. }
  6203. }
  6204. /*---------------------------------------------------------------------
  6205. *
  6206. * Function: Illegal phase
  6207. *
  6208. * Description: Target switched to some illegal phase, so all we can do
  6209. * is report an error back to the host (if that is possible)
  6210. * and send an ABORT message to the misbehaving target.
  6211. *
  6212. *---------------------------------------------------------------------*/
  6213. #if defined(OS2)
  6214. void far phaseIllegal(ULONG port, UCHAR p_card)
  6215. #else
  6216. #if defined(DOS)
  6217. void phaseIllegal(USHORT port, UCHAR p_card)
  6218. #else
  6219. void phaseIllegal(ULONG port, UCHAR p_card)
  6220. #endif
  6221. #endif
  6222. {
  6223. PSCCB currSCCB;
  6224. currSCCB = BL_Card[p_card].currentSCCB;
  6225. WR_HARPOON(port+hp_scsisig, RD_HARPOON(port+hp_scsisig));
  6226. if (currSCCB != NULL) {
  6227. currSCCB->HostStatus = SCCB_PHASE_SEQUENCE_FAIL;
  6228. currSCCB->Sccb_scsistat = ABORT_ST;
  6229. currSCCB->Sccb_scsimsg = SMABORT;
  6230. }
  6231. ACCEPT_MSG_ATN(port);
  6232. }
  6233. /*---------------------------------------------------------------------
  6234. *
  6235. * Function: Phase Check FIFO
  6236. *
  6237. * Description: Make sure data has been flushed from both FIFOs and abort
  6238. * the operations if necessary.
  6239. *
  6240. *---------------------------------------------------------------------*/
  6241. #if defined(DOS)
  6242. void phaseChkFifo(USHORT port, UCHAR p_card)
  6243. #else
  6244. void phaseChkFifo(ULONG port, UCHAR p_card)
  6245. #endif
  6246. {
  6247. ULONG xfercnt;
  6248. PSCCB currSCCB;
  6249. currSCCB = BL_Card[p_card].currentSCCB;
  6250. if (currSCCB->Sccb_scsistat == DATA_IN_ST)
  6251. {
  6252. while((!(RD_HARPOON(port+hp_xferstat) & FIFO_EMPTY)) &&
  6253. (RD_HARPOON(port+hp_ext_status) & BM_CMD_BUSY)) {}
  6254. if (!(RD_HARPOON(port+hp_xferstat) & FIFO_EMPTY))
  6255. {
  6256. currSCCB->Sccb_ATC += currSCCB->Sccb_XferCnt;
  6257. currSCCB->Sccb_XferCnt = 0;
  6258. if ((RDW_HARPOON((port+hp_intstat)) & PARITY) &&
  6259. (currSCCB->HostStatus == SCCB_COMPLETE))
  6260. {
  6261. currSCCB->HostStatus = SCCB_PARITY_ERR;
  6262. WRW_HARPOON((port+hp_intstat), PARITY);
  6263. }
  6264. hostDataXferAbort(port,p_card,currSCCB);
  6265. dataXferProcessor(port, &BL_Card[p_card]);
  6266. while((!(RD_HARPOON(port+hp_xferstat) & FIFO_EMPTY)) &&
  6267. (RD_HARPOON(port+hp_ext_status) & BM_CMD_BUSY)) {}
  6268. }
  6269. } /*End Data In specific code. */
  6270. #if defined(DOS)
  6271. asm { mov dx,port;
  6272. add dx,hp_xfercnt_2;
  6273. in al,dx;
  6274. dec dx;
  6275. xor ah,ah;
  6276. mov word ptr xfercnt+2,ax;
  6277. in al,dx;
  6278. dec dx;
  6279. mov ah,al;
  6280. in al,dx;
  6281. mov word ptr xfercnt,ax;
  6282. }
  6283. #else
  6284. GET_XFER_CNT(port,xfercnt);
  6285. #endif
  6286. WR_HARPOON(port+hp_xfercnt_0, 0x00);
  6287. WR_HARPOON(port+hp_portctrl_0, 0x00);
  6288. currSCCB->Sccb_ATC += (currSCCB->Sccb_XferCnt - xfercnt);
  6289. currSCCB->Sccb_XferCnt = xfercnt;
  6290. if ((RDW_HARPOON((port+hp_intstat)) & PARITY) &&
  6291. (currSCCB->HostStatus == SCCB_COMPLETE)) {
  6292. currSCCB->HostStatus = SCCB_PARITY_ERR;
  6293. WRW_HARPOON((port+hp_intstat), PARITY);
  6294. }
  6295. hostDataXferAbort(port,p_card,currSCCB);
  6296. WR_HARPOON(port+hp_fifowrite, 0x00);
  6297. WR_HARPOON(port+hp_fiforead, 0x00);
  6298. WR_HARPOON(port+hp_xferstat, 0x00);
  6299. WRW_HARPOON((port+hp_intstat), XFER_CNT_0);
  6300. }
  6301. /*---------------------------------------------------------------------
  6302. *
  6303. * Function: Phase Bus Free
  6304. *
  6305. * Description: We just went bus free so figure out if it was
  6306. * because of command complete or from a disconnect.
  6307. *
  6308. *---------------------------------------------------------------------*/
  6309. #if defined(DOS)
  6310. void phaseBusFree(USHORT port, UCHAR p_card)
  6311. #else
  6312. void phaseBusFree(ULONG port, UCHAR p_card)
  6313. #endif
  6314. {
  6315. PSCCB currSCCB;
  6316. currSCCB = BL_Card[p_card].currentSCCB;
  6317. if (currSCCB != NULL)
  6318. {
  6319. DISABLE_AUTO(port);
  6320. if (currSCCB->OperationCode == RESET_COMMAND)
  6321. {
  6322. if((BL_Card[p_card].globalFlags & F_CONLUN_IO) &&
  6323. ((sccbMgrTbl[p_card][currSCCB->TargID].TarStatus & TAR_TAG_Q_MASK) != TAG_Q_TRYING))
  6324. sccbMgrTbl[p_card][currSCCB->TargID].TarLUNBusy[currSCCB->Lun] = FALSE;
  6325. else
  6326. sccbMgrTbl[p_card][currSCCB->TargID].TarLUNBusy[0] = FALSE;
  6327. queueCmdComplete(&BL_Card[p_card], currSCCB, p_card);
  6328. queueSearchSelect(&BL_Card[p_card],p_card);
  6329. }
  6330. else if(currSCCB->Sccb_scsistat == SELECT_SN_ST)
  6331. {
  6332. sccbMgrTbl[p_card][currSCCB->TargID].TarStatus |=
  6333. (UCHAR)SYNC_SUPPORTED;
  6334. sccbMgrTbl[p_card][currSCCB->TargID].TarEEValue &= ~EE_SYNC_MASK;
  6335. }
  6336. else if(currSCCB->Sccb_scsistat == SELECT_WN_ST)
  6337. {
  6338. sccbMgrTbl[p_card][currSCCB->TargID].TarStatus =
  6339. (sccbMgrTbl[p_card][currSCCB->TargID].
  6340. TarStatus & ~WIDE_ENABLED) | WIDE_NEGOCIATED;
  6341. sccbMgrTbl[p_card][currSCCB->TargID].TarEEValue &= ~EE_WIDE_SCSI;
  6342. }
  6343. #if !defined(DOS)
  6344. else if(currSCCB->Sccb_scsistat == SELECT_Q_ST)
  6345. {
  6346. /* Make sure this is not a phony BUS_FREE. If we were
  6347. reselected or if BUSY is NOT on then this is a
  6348. valid BUS FREE. SRR Wednesday, 5/10/1995. */
  6349. if ((!(RD_HARPOON(port+hp_scsisig) & SCSI_BSY)) ||
  6350. (RDW_HARPOON((port+hp_intstat)) & RSEL))
  6351. {
  6352. sccbMgrTbl[p_card][currSCCB->TargID].TarStatus &= ~TAR_TAG_Q_MASK;
  6353. sccbMgrTbl[p_card][currSCCB->TargID].TarStatus |= TAG_Q_REJECT;
  6354. }
  6355. else
  6356. {
  6357. return;
  6358. }
  6359. }
  6360. #endif
  6361. else
  6362. {
  6363. currSCCB->Sccb_scsistat = BUS_FREE_ST;
  6364. if (!currSCCB->HostStatus)
  6365. {
  6366. currSCCB->HostStatus = SCCB_PHASE_SEQUENCE_FAIL;
  6367. }
  6368. if((BL_Card[p_card].globalFlags & F_CONLUN_IO) &&
  6369. ((sccbMgrTbl[p_card][currSCCB->TargID].TarStatus & TAR_TAG_Q_MASK) != TAG_Q_TRYING))
  6370. sccbMgrTbl[p_card][currSCCB->TargID].TarLUNBusy[currSCCB->Lun] = FALSE;
  6371. else
  6372. sccbMgrTbl[p_card][currSCCB->TargID].TarLUNBusy[0] = FALSE;
  6373. queueCmdComplete(&BL_Card[p_card], currSCCB, p_card);
  6374. return;
  6375. }
  6376. BL_Card[p_card].globalFlags |= F_NEW_SCCB_CMD;
  6377. } /*end if !=null */
  6378. }
  6379. #ident "$Id: automate.c 1.14 1997/01/31 02:11:46 mohan Exp $"
  6380. /*----------------------------------------------------------------------
  6381. *
  6382. *
  6383. * Copyright 1995-1996 by Mylex Corporation. All Rights Reserved
  6384. *
  6385. * This file is available under both the GNU General Public License
  6386. * and a BSD-style copyright; see LICENSE.FlashPoint for details.
  6387. *
  6388. * $Workfile: automate.c $
  6389. *
  6390. * Description: Functions relating to programming the automation of
  6391. * the HARPOON.
  6392. *
  6393. * $Date: 1997/01/31 02:11:46 $
  6394. *
  6395. * $Revision: 1.14 $
  6396. *
  6397. *----------------------------------------------------------------------*/
  6398. /*#include <globals.h>*/
  6399. #if (FW_TYPE==_UCB_MGR_)
  6400. /*#include <budi.h>*/
  6401. #endif
  6402. /*#include <sccbmgr.h>*/
  6403. /*#include <blx30.h>*/
  6404. /*#include <target.h>*/
  6405. /*#include <scsi2.h>*/
  6406. /*#include <harpoon.h>*/
  6407. /*
  6408. extern SCCBCARD BL_Card[MAX_CARDS];
  6409. extern SCCBMGR_TAR_INFO sccbMgrTbl[MAX_CARDS][MAX_SCSI_TAR];
  6410. extern SCCBCARD BL_Card[MAX_CARDS];
  6411. */
  6412. /*---------------------------------------------------------------------
  6413. *
  6414. * Function: Auto Load Default Map
  6415. *
  6416. * Description: Load the Automation RAM with the defualt map values.
  6417. *
  6418. *---------------------------------------------------------------------*/
  6419. #if defined(DOS)
  6420. void autoLoadDefaultMap(USHORT p_port)
  6421. #else
  6422. void autoLoadDefaultMap(ULONG p_port)
  6423. #endif
  6424. {
  6425. #if defined(DOS)
  6426. USHORT map_addr;
  6427. #else
  6428. ULONG map_addr;
  6429. #endif
  6430. ARAM_ACCESS(p_port);
  6431. map_addr = p_port + hp_aramBase;
  6432. WRW_HARPOON(map_addr, (MPM_OP+AMSG_OUT+ 0xC0)); /*ID MESSAGE */
  6433. map_addr +=2;
  6434. WRW_HARPOON(map_addr, (MPM_OP+AMSG_OUT+ 0x20)); /*SIMPLE TAG QUEUEING MSG */
  6435. map_addr +=2;
  6436. WRW_HARPOON(map_addr, RAT_OP); /*RESET ATTENTION */
  6437. map_addr +=2;
  6438. WRW_HARPOON(map_addr, (MPM_OP+AMSG_OUT+ 0x00)); /*TAG ID MSG */
  6439. map_addr +=2;
  6440. WRW_HARPOON(map_addr, (MPM_OP+ACOMMAND+ 0x00)); /*CDB BYTE 0 */
  6441. map_addr +=2;
  6442. WRW_HARPOON(map_addr, (MPM_OP+ACOMMAND+ 0x00)); /*CDB BYTE 1 */
  6443. map_addr +=2;
  6444. WRW_HARPOON(map_addr, (MPM_OP+ACOMMAND+ 0x00)); /*CDB BYTE 2 */
  6445. map_addr +=2;
  6446. WRW_HARPOON(map_addr, (MPM_OP+ACOMMAND+ 0x00)); /*CDB BYTE 3 */
  6447. map_addr +=2;
  6448. WRW_HARPOON(map_addr, (MPM_OP+ACOMMAND+ 0x00)); /*CDB BYTE 4 */
  6449. map_addr +=2;
  6450. WRW_HARPOON(map_addr, (MPM_OP+ACOMMAND+ 0x00)); /*CDB BYTE 5 */
  6451. map_addr +=2;
  6452. WRW_HARPOON(map_addr, (MPM_OP+ACOMMAND+ 0x00)); /*CDB BYTE 6 */
  6453. map_addr +=2;
  6454. WRW_HARPOON(map_addr, (MPM_OP+ACOMMAND+ 0x00)); /*CDB BYTE 7 */
  6455. map_addr +=2;
  6456. WRW_HARPOON(map_addr, (MPM_OP+ACOMMAND+ 0x00)); /*CDB BYTE 8 */
  6457. map_addr +=2;
  6458. WRW_HARPOON(map_addr, (MPM_OP+ACOMMAND+ 0x00)); /*CDB BYTE 9 */
  6459. map_addr +=2;
  6460. WRW_HARPOON(map_addr, (MPM_OP+ACOMMAND+ 0x00)); /*CDB BYTE 10 */
  6461. map_addr +=2;
  6462. WRW_HARPOON(map_addr, (MPM_OP+ACOMMAND+ 0x00)); /*CDB BYTE 11 */
  6463. map_addr +=2;
  6464. WRW_HARPOON(map_addr, (CPE_OP+ADATA_OUT+ DINT)); /*JUMP IF DATA OUT */
  6465. map_addr +=2;
  6466. WRW_HARPOON(map_addr, (TCB_OP+FIFO_0+ DI)); /*JUMP IF NO DATA IN FIFO */
  6467. map_addr +=2; /*This means AYNC DATA IN */
  6468. WRW_HARPOON(map_addr, (SSI_OP+ SSI_IDO_STRT)); /*STOP AND INTERRUPT */
  6469. map_addr +=2;
  6470. WRW_HARPOON(map_addr, (CPE_OP+ADATA_IN+DINT)); /*JUMP IF NOT DATA IN PHZ */
  6471. map_addr +=2;
  6472. WRW_HARPOON(map_addr, (CPN_OP+AMSG_IN+ ST)); /*IF NOT MSG IN CHECK 4 DATA IN */
  6473. map_addr +=2;
  6474. WRW_HARPOON(map_addr, (CRD_OP+SDATA+ 0x02)); /*SAVE DATA PTR MSG? */
  6475. map_addr +=2;
  6476. WRW_HARPOON(map_addr, (BRH_OP+NOT_EQ+ DC)); /*GO CHECK FOR DISCONNECT MSG */
  6477. map_addr +=2;
  6478. WRW_HARPOON(map_addr, (MRR_OP+SDATA+ D_AR1)); /*SAVE DATA PTRS MSG */
  6479. map_addr +=2;
  6480. WRW_HARPOON(map_addr, (CPN_OP+AMSG_IN+ ST)); /*IF NOT MSG IN CHECK DATA IN */
  6481. map_addr +=2;
  6482. WRW_HARPOON(map_addr, (CRD_OP+SDATA+ 0x04)); /*DISCONNECT MSG? */
  6483. map_addr +=2;
  6484. WRW_HARPOON(map_addr, (BRH_OP+NOT_EQ+ UNKNWN));/*UKNKNOWN MSG */
  6485. map_addr +=2;
  6486. WRW_HARPOON(map_addr, (MRR_OP+SDATA+ D_BUCKET));/*XFER DISCONNECT MSG */
  6487. map_addr +=2;
  6488. WRW_HARPOON(map_addr, (SSI_OP+ SSI_ITAR_DISC));/*STOP AND INTERRUPT */
  6489. map_addr +=2;
  6490. WRW_HARPOON(map_addr, (CPN_OP+ASTATUS+ UNKNWN));/*JUMP IF NOT STATUS PHZ. */
  6491. map_addr +=2;
  6492. WRW_HARPOON(map_addr, (MRR_OP+SDATA+ D_AR0)); /*GET STATUS BYTE */
  6493. map_addr +=2;
  6494. WRW_HARPOON(map_addr, (CPN_OP+AMSG_IN+ CC)); /*ERROR IF NOT MSG IN PHZ */
  6495. map_addr +=2;
  6496. WRW_HARPOON(map_addr, (CRD_OP+SDATA+ 0x00)); /*CHECK FOR CMD COMPLETE MSG. */
  6497. map_addr +=2;
  6498. WRW_HARPOON(map_addr, (BRH_OP+NOT_EQ+ CC)); /*ERROR IF NOT CMD COMPLETE MSG. */
  6499. map_addr +=2;
  6500. WRW_HARPOON(map_addr, (MRR_OP+SDATA+ D_BUCKET));/*GET CMD COMPLETE MSG */
  6501. map_addr +=2;
  6502. WRW_HARPOON(map_addr, (SSI_OP+ SSI_ICMD_COMP));/*END OF COMMAND */
  6503. map_addr +=2;
  6504. WRW_HARPOON(map_addr, (SSI_OP+ SSI_IUNKWN)); /*RECEIVED UNKNOWN MSG BYTE */
  6505. map_addr +=2;
  6506. WRW_HARPOON(map_addr, (SSI_OP+ SSI_INO_CC)); /*NO COMMAND COMPLETE AFTER STATUS */
  6507. map_addr +=2;
  6508. WRW_HARPOON(map_addr, (SSI_OP+ SSI_ITICKLE)); /*BIOS Tickled the Mgr */
  6509. map_addr +=2;
  6510. WRW_HARPOON(map_addr, (SSI_OP+ SSI_IRFAIL)); /*EXPECTED ID/TAG MESSAGES AND */
  6511. map_addr +=2; /* DIDN'T GET ONE */
  6512. WRW_HARPOON(map_addr, (CRR_OP+AR3+ S_IDREG)); /* comp SCSI SEL ID & AR3*/
  6513. map_addr +=2;
  6514. WRW_HARPOON(map_addr, (BRH_OP+EQUAL+ 0x00)); /*SEL ID OK then Conti. */
  6515. map_addr +=2;
  6516. WRW_HARPOON(map_addr, (SSI_OP+ SSI_INO_CC)); /*NO COMMAND COMPLETE AFTER STATUS */
  6517. SGRAM_ACCESS(p_port);
  6518. }
  6519. /*---------------------------------------------------------------------
  6520. *
  6521. * Function: Auto Command Complete
  6522. *
  6523. * Description: Post command back to host and find another command
  6524. * to execute.
  6525. *
  6526. *---------------------------------------------------------------------*/
  6527. #if defined(DOS)
  6528. void autoCmdCmplt(USHORT p_port, UCHAR p_card)
  6529. #else
  6530. void autoCmdCmplt(ULONG p_port, UCHAR p_card)
  6531. #endif
  6532. {
  6533. PSCCB currSCCB;
  6534. UCHAR status_byte;
  6535. currSCCB = BL_Card[p_card].currentSCCB;
  6536. status_byte = RD_HARPOON(p_port+hp_gp_reg_0);
  6537. sccbMgrTbl[p_card][currSCCB->TargID].TarLUN_CA = FALSE;
  6538. if (status_byte != SSGOOD) {
  6539. if (status_byte == SSQ_FULL) {
  6540. if(((BL_Card[p_card].globalFlags & F_CONLUN_IO) &&
  6541. ((sccbMgrTbl[p_card][currSCCB->TargID].TarStatus & TAR_TAG_Q_MASK) != TAG_Q_TRYING)))
  6542. {
  6543. sccbMgrTbl[p_card][currSCCB->TargID].TarLUNBusy[currSCCB->Lun] = TRUE;
  6544. if(BL_Card[p_card].discQCount != 0)
  6545. BL_Card[p_card].discQCount--;
  6546. BL_Card[p_card].discQ_Tbl[sccbMgrTbl[p_card][currSCCB->TargID].LunDiscQ_Idx[currSCCB->Lun]] = NULL;
  6547. }
  6548. else
  6549. {
  6550. sccbMgrTbl[p_card][currSCCB->TargID].TarLUNBusy[0] = TRUE;
  6551. if(currSCCB->Sccb_tag)
  6552. {
  6553. if(BL_Card[p_card].discQCount != 0)
  6554. BL_Card[p_card].discQCount--;
  6555. BL_Card[p_card].discQ_Tbl[currSCCB->Sccb_tag] = NULL;
  6556. }else
  6557. {
  6558. if(BL_Card[p_card].discQCount != 0)
  6559. BL_Card[p_card].discQCount--;
  6560. BL_Card[p_card].discQ_Tbl[sccbMgrTbl[p_card][currSCCB->TargID].LunDiscQ_Idx[0]] = NULL;
  6561. }
  6562. }
  6563. currSCCB->Sccb_MGRFlags |= F_STATUSLOADED;
  6564. queueSelectFail(&BL_Card[p_card],p_card);
  6565. return;
  6566. }
  6567. if(currSCCB->Sccb_scsistat == SELECT_SN_ST)
  6568. {
  6569. sccbMgrTbl[p_card][currSCCB->TargID].TarStatus |=
  6570. (UCHAR)SYNC_SUPPORTED;
  6571. sccbMgrTbl[p_card][currSCCB->TargID].TarEEValue &= ~EE_SYNC_MASK;
  6572. BL_Card[p_card].globalFlags |= F_NEW_SCCB_CMD;
  6573. if(((BL_Card[p_card].globalFlags & F_CONLUN_IO) &&
  6574. ((sccbMgrTbl[p_card][currSCCB->TargID].TarStatus & TAR_TAG_Q_MASK) != TAG_Q_TRYING)))
  6575. {
  6576. sccbMgrTbl[p_card][currSCCB->TargID].TarLUNBusy[currSCCB->Lun] = TRUE;
  6577. if(BL_Card[p_card].discQCount != 0)
  6578. BL_Card[p_card].discQCount--;
  6579. BL_Card[p_card].discQ_Tbl[sccbMgrTbl[p_card][currSCCB->TargID].LunDiscQ_Idx[currSCCB->Lun]] = NULL;
  6580. }
  6581. else
  6582. {
  6583. sccbMgrTbl[p_card][currSCCB->TargID].TarLUNBusy[0] = TRUE;
  6584. if(currSCCB->Sccb_tag)
  6585. {
  6586. if(BL_Card[p_card].discQCount != 0)
  6587. BL_Card[p_card].discQCount--;
  6588. BL_Card[p_card].discQ_Tbl[currSCCB->Sccb_tag] = NULL;
  6589. }else
  6590. {
  6591. if(BL_Card[p_card].discQCount != 0)
  6592. BL_Card[p_card].discQCount--;
  6593. BL_Card[p_card].discQ_Tbl[sccbMgrTbl[p_card][currSCCB->TargID].LunDiscQ_Idx[0]] = NULL;
  6594. }
  6595. }
  6596. return;
  6597. }
  6598. if(currSCCB->Sccb_scsistat == SELECT_WN_ST)
  6599. {
  6600. sccbMgrTbl[p_card][currSCCB->TargID].TarStatus =
  6601. (sccbMgrTbl[p_card][currSCCB->TargID].
  6602. TarStatus & ~WIDE_ENABLED) | WIDE_NEGOCIATED;
  6603. sccbMgrTbl[p_card][currSCCB->TargID].TarEEValue &= ~EE_WIDE_SCSI;
  6604. BL_Card[p_card].globalFlags |= F_NEW_SCCB_CMD;
  6605. if(((BL_Card[p_card].globalFlags & F_CONLUN_IO) &&
  6606. ((sccbMgrTbl[p_card][currSCCB->TargID].TarStatus & TAR_TAG_Q_MASK) != TAG_Q_TRYING)))
  6607. {
  6608. sccbMgrTbl[p_card][currSCCB->TargID].TarLUNBusy[currSCCB->Lun] = TRUE;
  6609. if(BL_Card[p_card].discQCount != 0)
  6610. BL_Card[p_card].discQCount--;
  6611. BL_Card[p_card].discQ_Tbl[sccbMgrTbl[p_card][currSCCB->TargID].LunDiscQ_Idx[currSCCB->Lun]] = NULL;
  6612. }
  6613. else
  6614. {
  6615. sccbMgrTbl[p_card][currSCCB->TargID].TarLUNBusy[0] = TRUE;
  6616. if(currSCCB->Sccb_tag)
  6617. {
  6618. if(BL_Card[p_card].discQCount != 0)
  6619. BL_Card[p_card].discQCount--;
  6620. BL_Card[p_card].discQ_Tbl[currSCCB->Sccb_tag] = NULL;
  6621. }else
  6622. {
  6623. if(BL_Card[p_card].discQCount != 0)
  6624. BL_Card[p_card].discQCount--;
  6625. BL_Card[p_card].discQ_Tbl[sccbMgrTbl[p_card][currSCCB->TargID].LunDiscQ_Idx[0]] = NULL;
  6626. }
  6627. }
  6628. return;
  6629. }
  6630. if (status_byte == SSCHECK)
  6631. {
  6632. if(BL_Card[p_card].globalFlags & F_DO_RENEGO)
  6633. {
  6634. if (sccbMgrTbl[p_card][currSCCB->TargID].TarEEValue & EE_SYNC_MASK)
  6635. {
  6636. sccbMgrTbl[p_card][currSCCB->TargID].TarStatus &= ~TAR_SYNC_MASK;
  6637. }
  6638. if (sccbMgrTbl[p_card][currSCCB->TargID].TarEEValue & EE_WIDE_SCSI)
  6639. {
  6640. sccbMgrTbl[p_card][currSCCB->TargID].TarStatus &= ~TAR_WIDE_MASK;
  6641. }
  6642. }
  6643. }
  6644. if (!(currSCCB->Sccb_XferState & F_AUTO_SENSE)) {
  6645. currSCCB->SccbStatus = SCCB_ERROR;
  6646. currSCCB->TargetStatus = status_byte;
  6647. if (status_byte == SSCHECK) {
  6648. sccbMgrTbl[p_card][currSCCB->TargID].TarLUN_CA
  6649. = TRUE;
  6650. #if (FW_TYPE==_SCCB_MGR_)
  6651. if (currSCCB->RequestSenseLength != NO_AUTO_REQUEST_SENSE) {
  6652. if (currSCCB->RequestSenseLength == 0)
  6653. currSCCB->RequestSenseLength = 14;
  6654. ssenss(&BL_Card[p_card]);
  6655. BL_Card[p_card].globalFlags |= F_NEW_SCCB_CMD;
  6656. if(((BL_Card[p_card].globalFlags & F_CONLUN_IO) &&
  6657. ((sccbMgrTbl[p_card][currSCCB->TargID].TarStatus & TAR_TAG_Q_MASK) != TAG_Q_TRYING)))
  6658. {
  6659. sccbMgrTbl[p_card][currSCCB->TargID].TarLUNBusy[currSCCB->Lun] = TRUE;
  6660. if(BL_Card[p_card].discQCount != 0)
  6661. BL_Card[p_card].discQCount--;
  6662. BL_Card[p_card].discQ_Tbl[sccbMgrTbl[p_card][currSCCB->TargID].LunDiscQ_Idx[currSCCB->Lun]] = NULL;
  6663. }
  6664. else
  6665. {
  6666. sccbMgrTbl[p_card][currSCCB->TargID].TarLUNBusy[0] = TRUE;
  6667. if(currSCCB->Sccb_tag)
  6668. {
  6669. if(BL_Card[p_card].discQCount != 0)
  6670. BL_Card[p_card].discQCount--;
  6671. BL_Card[p_card].discQ_Tbl[currSCCB->Sccb_tag] = NULL;
  6672. }else
  6673. {
  6674. if(BL_Card[p_card].discQCount != 0)
  6675. BL_Card[p_card].discQCount--;
  6676. BL_Card[p_card].discQ_Tbl[sccbMgrTbl[p_card][currSCCB->TargID].LunDiscQ_Idx[0]] = NULL;
  6677. }
  6678. }
  6679. return;
  6680. }
  6681. #else
  6682. if ((!(currSCCB->Sccb_ucb_ptr->UCB_opcode & OPC_NO_AUTO_SENSE)) &&
  6683. (currSCCB->RequestSenseLength))
  6684. {
  6685. ssenss(&BL_Card[p_card]);
  6686. BL_Card[p_card].globalFlags |= F_NEW_SCCB_CMD;
  6687. if(((BL_Card[p_card].globalFlags & F_CONLUN_IO) &&
  6688. ((sccbMgrTbl[p_card][currSCCB->TargID].TarStatus & TAR_TAG_Q_MASK) != TAG_Q_TRYING)))
  6689. {
  6690. sccbMgrTbl[p_card][currSCCB->TargID].TarLUNBusy[currSCCB->Lun] = TRUE;
  6691. if(BL_Card[p_card].discQCount != 0)
  6692. BL_Card[p_card].discQCount--;
  6693. BL_Card[p_card].discQ_Tbl[sccbMgrTbl[p_card][currSCCB->TargID].LunDiscQ_Idx[currSCCB->Lun]] = NULL;
  6694. }
  6695. else
  6696. {
  6697. sccbMgrTbl[p_card][currSCCB->TargID].TarLUNBusy[0] = TRUE;
  6698. if(currSCCB->Sccb_tag)
  6699. {
  6700. if(BL_Card[p_card].discQCount != 0)
  6701. BL_Card[p_card].discQCount--;
  6702. BL_Card[p_card].discQ_Tbl[currSCCB->Sccb_tag] = NULL;
  6703. }else
  6704. {
  6705. if(BL_Card[p_card].discQCount != 0)
  6706. BL_Card[p_card].discQCount--;
  6707. BL_Card[p_card].discQ_Tbl[sccbMgrTbl[p_card][currSCCB->TargID].LunDiscQ_Idx[0]] = NULL;
  6708. }
  6709. }
  6710. return;
  6711. }
  6712. #endif
  6713. }
  6714. }
  6715. }
  6716. if((BL_Card[p_card].globalFlags & F_CONLUN_IO) &&
  6717. ((sccbMgrTbl[p_card][currSCCB->TargID].TarStatus & TAR_TAG_Q_MASK) != TAG_Q_TRYING))
  6718. sccbMgrTbl[p_card][currSCCB->TargID].TarLUNBusy[currSCCB->Lun] = FALSE;
  6719. else
  6720. sccbMgrTbl[p_card][currSCCB->TargID].TarLUNBusy[0] = FALSE;
  6721. queueCmdComplete(&BL_Card[p_card], currSCCB, p_card);
  6722. }
  6723. #ident "$Id: busmstr.c 1.8 1997/01/31 02:10:27 mohan Exp $"
  6724. /*----------------------------------------------------------------------
  6725. *
  6726. *
  6727. * Copyright 1995-1996 by Mylex Corporation. All Rights Reserved
  6728. *
  6729. * This file is available under both the GNU General Public License
  6730. * and a BSD-style copyright; see LICENSE.FlashPoint for details.
  6731. *
  6732. * $Workfile: busmstr.c $
  6733. *
  6734. * Description: Functions to start, stop, and abort BusMaster operations.
  6735. *
  6736. * $Date: 1997/01/31 02:10:27 $
  6737. *
  6738. * $Revision: 1.8 $
  6739. *
  6740. *----------------------------------------------------------------------*/
  6741. /*#include <globals.h>*/
  6742. #if (FW_TYPE==_UCB_MGR_)
  6743. /*#include <budi.h>*/
  6744. #endif
  6745. /*#include <sccbmgr.h>*/
  6746. /*#include <blx30.h>*/
  6747. /*#include <target.h>*/
  6748. /*#include <scsi2.h>*/
  6749. /*#include <harpoon.h>*/
  6750. /*
  6751. extern SCCBCARD BL_Card[MAX_CARDS];
  6752. extern SCCBMGR_TAR_INFO sccbMgrTbl[MAX_CARDS][MAX_SCSI_TAR];
  6753. */
  6754. #define SHORT_WAIT 0x0000000F
  6755. #define LONG_WAIT 0x0000FFFFL
  6756. #if defined(BUGBUG)
  6757. void Debug_Load(UCHAR p_card, UCHAR p_bug_data);
  6758. #endif
  6759. /*---------------------------------------------------------------------
  6760. *
  6761. * Function: Data Transfer Processor
  6762. *
  6763. * Description: This routine performs two tasks.
  6764. * (1) Start data transfer by calling HOST_DATA_XFER_START
  6765. * function. Once data transfer is started, (2) Depends
  6766. * on the type of data transfer mode Scatter/Gather mode
  6767. * or NON Scatter/Gather mode. In NON Scatter/Gather mode,
  6768. * this routine checks Sccb_MGRFlag (F_HOST_XFER_ACT bit) for
  6769. * data transfer done. In Scatter/Gather mode, this routine
  6770. * checks bus master command complete and dual rank busy
  6771. * bit to keep chaining SC transfer command. Similarly,
  6772. * in Scatter/Gather mode, it checks Sccb_MGRFlag
  6773. * (F_HOST_XFER_ACT bit) for data transfer done.
  6774. *
  6775. *---------------------------------------------------------------------*/
  6776. #if defined(DOS)
  6777. void dataXferProcessor(USHORT port, PSCCBcard pCurrCard)
  6778. #else
  6779. void dataXferProcessor(ULONG port, PSCCBcard pCurrCard)
  6780. #endif
  6781. {
  6782. PSCCB currSCCB;
  6783. currSCCB = pCurrCard->currentSCCB;
  6784. if (currSCCB->Sccb_XferState & F_SG_XFER)
  6785. {
  6786. if (pCurrCard->globalFlags & F_HOST_XFER_ACT)
  6787. {
  6788. currSCCB->Sccb_sgseg += (UCHAR)SG_BUF_CNT;
  6789. currSCCB->Sccb_SGoffset = 0x00;
  6790. }
  6791. pCurrCard->globalFlags |= F_HOST_XFER_ACT;
  6792. busMstrSGDataXferStart(port, currSCCB);
  6793. }
  6794. else
  6795. {
  6796. if (!(pCurrCard->globalFlags & F_HOST_XFER_ACT))
  6797. {
  6798. pCurrCard->globalFlags |= F_HOST_XFER_ACT;
  6799. busMstrDataXferStart(port, currSCCB);
  6800. }
  6801. }
  6802. }
  6803. /*---------------------------------------------------------------------
  6804. *
  6805. * Function: BusMaster Scatter Gather Data Transfer Start
  6806. *
  6807. * Description:
  6808. *
  6809. *---------------------------------------------------------------------*/
  6810. #if defined(DOS)
  6811. void busMstrSGDataXferStart(USHORT p_port, PSCCB pcurrSCCB)
  6812. #else
  6813. void busMstrSGDataXferStart(ULONG p_port, PSCCB pcurrSCCB)
  6814. #endif
  6815. {
  6816. ULONG count,addr,tmpSGCnt;
  6817. UINT sg_index;
  6818. UCHAR sg_count, i;
  6819. #if defined(DOS)
  6820. USHORT reg_offset;
  6821. #else
  6822. ULONG reg_offset;
  6823. #endif
  6824. if (pcurrSCCB->Sccb_XferState & F_HOST_XFER_DIR) {
  6825. count = ((ULONG) HOST_RD_CMD)<<24;
  6826. }
  6827. else {
  6828. count = ((ULONG) HOST_WRT_CMD)<<24;
  6829. }
  6830. sg_count = 0;
  6831. tmpSGCnt = 0;
  6832. sg_index = pcurrSCCB->Sccb_sgseg;
  6833. reg_offset = hp_aramBase;
  6834. i = (UCHAR) (RD_HARPOON(p_port+hp_page_ctrl) & ~(SGRAM_ARAM|SCATTER_EN));
  6835. WR_HARPOON(p_port+hp_page_ctrl, i);
  6836. while ((sg_count < (UCHAR)SG_BUF_CNT) &&
  6837. ((ULONG)(sg_index * (UINT)SG_ELEMENT_SIZE) < pcurrSCCB->DataLength) ) {
  6838. #if defined(COMPILER_16_BIT) && !defined(DOS)
  6839. tmpSGCnt += *(((ULONG far *)pcurrSCCB->DataPointer)+
  6840. (sg_index * 2));
  6841. count |= *(((ULONG far *)pcurrSCCB->DataPointer)+
  6842. (sg_index * 2));
  6843. addr = *(((ULONG far *)pcurrSCCB->DataPointer)+
  6844. ((sg_index * 2) + 1));
  6845. #else
  6846. tmpSGCnt += *(((ULONG *)pcurrSCCB->DataPointer)+
  6847. (sg_index * 2));
  6848. count |= *(((ULONG *)pcurrSCCB->DataPointer)+
  6849. (sg_index * 2));
  6850. addr = *(((ULONG *)pcurrSCCB->DataPointer)+
  6851. ((sg_index * 2) + 1));
  6852. #endif
  6853. if ((!sg_count) && (pcurrSCCB->Sccb_SGoffset)) {
  6854. addr += ((count & 0x00FFFFFFL) - pcurrSCCB->Sccb_SGoffset);
  6855. count = (count & 0xFF000000L) | pcurrSCCB->Sccb_SGoffset;
  6856. tmpSGCnt = count & 0x00FFFFFFL;
  6857. }
  6858. WR_HARP32(p_port,reg_offset,addr);
  6859. reg_offset +=4;
  6860. WR_HARP32(p_port,reg_offset,count);
  6861. reg_offset +=4;
  6862. count &= 0xFF000000L;
  6863. sg_index++;
  6864. sg_count++;
  6865. } /*End While */
  6866. pcurrSCCB->Sccb_XferCnt = tmpSGCnt;
  6867. WR_HARPOON(p_port+hp_sg_addr,(sg_count<<4));
  6868. if (pcurrSCCB->Sccb_XferState & F_HOST_XFER_DIR) {
  6869. WR_HARP32(p_port,hp_xfercnt_0,tmpSGCnt);
  6870. WR_HARPOON(p_port+hp_portctrl_0,(DMA_PORT | SCSI_PORT | SCSI_INBIT));
  6871. WR_HARPOON(p_port+hp_scsisig, S_DATAI_PH);
  6872. }
  6873. else {
  6874. if ((!(RD_HARPOON(p_port+hp_synctarg_0) & NARROW_SCSI)) &&
  6875. (tmpSGCnt & 0x000000001))
  6876. {
  6877. pcurrSCCB->Sccb_XferState |= F_ODD_BALL_CNT;
  6878. tmpSGCnt--;
  6879. }
  6880. WR_HARP32(p_port,hp_xfercnt_0,tmpSGCnt);
  6881. WR_HARPOON(p_port+hp_portctrl_0,(SCSI_PORT | DMA_PORT | DMA_RD));
  6882. WR_HARPOON(p_port+hp_scsisig, S_DATAO_PH);
  6883. }
  6884. WR_HARPOON(p_port+hp_page_ctrl, (UCHAR) (i | SCATTER_EN));
  6885. }
  6886. /*---------------------------------------------------------------------
  6887. *
  6888. * Function: BusMaster Data Transfer Start
  6889. *
  6890. * Description:
  6891. *
  6892. *---------------------------------------------------------------------*/
  6893. #if defined(DOS)
  6894. void busMstrDataXferStart(USHORT p_port, PSCCB pcurrSCCB)
  6895. #else
  6896. void busMstrDataXferStart(ULONG p_port, PSCCB pcurrSCCB)
  6897. #endif
  6898. {
  6899. ULONG addr,count;
  6900. if (!(pcurrSCCB->Sccb_XferState & F_AUTO_SENSE)) {
  6901. count = pcurrSCCB->Sccb_XferCnt;
  6902. addr = (ULONG) pcurrSCCB->DataPointer + pcurrSCCB->Sccb_ATC;
  6903. }
  6904. else {
  6905. addr = pcurrSCCB->SensePointer;
  6906. count = pcurrSCCB->RequestSenseLength;
  6907. }
  6908. #if defined(DOS)
  6909. asm { mov dx,p_port;
  6910. mov ax,word ptr count;
  6911. add dx,hp_xfer_cnt_lo;
  6912. out dx,al;
  6913. inc dx;
  6914. xchg ah,al
  6915. out dx,al;
  6916. inc dx;
  6917. mov ax,word ptr count+2;
  6918. out dx,al;
  6919. inc dx;
  6920. inc dx;
  6921. mov ax,word ptr addr;
  6922. out dx,al;
  6923. inc dx;
  6924. xchg ah,al
  6925. out dx,al;
  6926. inc dx;
  6927. mov ax,word ptr addr+2;
  6928. out dx,al;
  6929. inc dx;
  6930. xchg ah,al
  6931. out dx,al;
  6932. }
  6933. WR_HARP32(p_port,hp_xfercnt_0,count);
  6934. #else
  6935. HP_SETUP_ADDR_CNT(p_port,addr,count);
  6936. #endif
  6937. if (pcurrSCCB->Sccb_XferState & F_HOST_XFER_DIR) {
  6938. WR_HARPOON(p_port+hp_portctrl_0,(DMA_PORT | SCSI_PORT | SCSI_INBIT));
  6939. WR_HARPOON(p_port+hp_scsisig, S_DATAI_PH);
  6940. WR_HARPOON(p_port+hp_xfer_cmd,
  6941. (XFER_DMA_HOST | XFER_HOST_AUTO | XFER_DMA_8BIT));
  6942. }
  6943. else {
  6944. WR_HARPOON(p_port+hp_portctrl_0,(SCSI_PORT | DMA_PORT | DMA_RD));
  6945. WR_HARPOON(p_port+hp_scsisig, S_DATAO_PH);
  6946. WR_HARPOON(p_port+hp_xfer_cmd,
  6947. (XFER_HOST_DMA | XFER_HOST_AUTO | XFER_DMA_8BIT));
  6948. }
  6949. }
  6950. /*---------------------------------------------------------------------
  6951. *
  6952. * Function: BusMaster Timeout Handler
  6953. *
  6954. * Description: This function is called after a bus master command busy time
  6955. * out is detected. This routines issue halt state machine
  6956. * with a software time out for command busy. If command busy
  6957. * is still asserted at the end of the time out, it issues
  6958. * hard abort with another software time out. It hard abort
  6959. * command busy is also time out, it'll just give up.
  6960. *
  6961. *---------------------------------------------------------------------*/
  6962. #if defined(DOS)
  6963. UCHAR busMstrTimeOut(USHORT p_port)
  6964. #else
  6965. UCHAR busMstrTimeOut(ULONG p_port)
  6966. #endif
  6967. {
  6968. ULONG timeout;
  6969. timeout = LONG_WAIT;
  6970. WR_HARPOON(p_port+hp_sys_ctrl, HALT_MACH);
  6971. while ((!(RD_HARPOON(p_port+hp_ext_status) & CMD_ABORTED)) && timeout--) {}
  6972. if (RD_HARPOON(p_port+hp_ext_status) & BM_CMD_BUSY) {
  6973. WR_HARPOON(p_port+hp_sys_ctrl, HARD_ABORT);
  6974. timeout = LONG_WAIT;
  6975. while ((RD_HARPOON(p_port+hp_ext_status) & BM_CMD_BUSY) && timeout--) {}
  6976. }
  6977. RD_HARPOON(p_port+hp_int_status); /*Clear command complete */
  6978. if (RD_HARPOON(p_port+hp_ext_status) & BM_CMD_BUSY) {
  6979. return(TRUE);
  6980. }
  6981. else {
  6982. return(FALSE);
  6983. }
  6984. }
  6985. /*---------------------------------------------------------------------
  6986. *
  6987. * Function: Host Data Transfer Abort
  6988. *
  6989. * Description: Abort any in progress transfer.
  6990. *
  6991. *---------------------------------------------------------------------*/
  6992. #if defined(DOS)
  6993. void hostDataXferAbort(USHORT port, UCHAR p_card, PSCCB pCurrSCCB)
  6994. #else
  6995. void hostDataXferAbort(ULONG port, UCHAR p_card, PSCCB pCurrSCCB)
  6996. #endif
  6997. {
  6998. ULONG timeout;
  6999. ULONG remain_cnt;
  7000. UINT sg_ptr;
  7001. BL_Card[p_card].globalFlags &= ~F_HOST_XFER_ACT;
  7002. if (pCurrSCCB->Sccb_XferState & F_AUTO_SENSE) {
  7003. if (!(RD_HARPOON(port+hp_int_status) & INT_CMD_COMPL)) {
  7004. WR_HARPOON(port+hp_bm_ctrl, (RD_HARPOON(port+hp_bm_ctrl) | FLUSH_XFER_CNTR));
  7005. timeout = LONG_WAIT;
  7006. while ((RD_HARPOON(port+hp_ext_status) & BM_CMD_BUSY) && timeout--) {}
  7007. WR_HARPOON(port+hp_bm_ctrl, (RD_HARPOON(port+hp_bm_ctrl) & ~FLUSH_XFER_CNTR));
  7008. if (RD_HARPOON(port+hp_ext_status) & BM_CMD_BUSY) {
  7009. if (busMstrTimeOut(port)) {
  7010. if (pCurrSCCB->HostStatus == 0x00)
  7011. pCurrSCCB->HostStatus = SCCB_BM_ERR;
  7012. }
  7013. if (RD_HARPOON(port+hp_int_status) & INT_EXT_STATUS)
  7014. if (RD_HARPOON(port+hp_ext_status) & BAD_EXT_STATUS)
  7015. if (pCurrSCCB->HostStatus == 0x00)
  7016. {
  7017. pCurrSCCB->HostStatus = SCCB_BM_ERR;
  7018. #if defined(BUGBUG)
  7019. WR_HARPOON(port+hp_dual_addr_lo,
  7020. RD_HARPOON(port+hp_ext_status));
  7021. #endif
  7022. }
  7023. }
  7024. }
  7025. }
  7026. else if (pCurrSCCB->Sccb_XferCnt) {
  7027. if (pCurrSCCB->Sccb_XferState & F_SG_XFER) {
  7028. WR_HARPOON(port+hp_page_ctrl, (RD_HARPOON(port+hp_page_ctrl) &
  7029. ~SCATTER_EN));
  7030. WR_HARPOON(port+hp_sg_addr,0x00);
  7031. sg_ptr = pCurrSCCB->Sccb_sgseg + SG_BUF_CNT;
  7032. if (sg_ptr > (UINT)(pCurrSCCB->DataLength / SG_ELEMENT_SIZE)) {
  7033. sg_ptr = (UINT)(pCurrSCCB->DataLength / SG_ELEMENT_SIZE);
  7034. }
  7035. remain_cnt = pCurrSCCB->Sccb_XferCnt;
  7036. while (remain_cnt < 0x01000000L) {
  7037. sg_ptr--;
  7038. #if defined(COMPILER_16_BIT) && !defined(DOS)
  7039. if (remain_cnt > (ULONG)(*(((ULONG far *)pCurrSCCB->
  7040. DataPointer) + (sg_ptr * 2)))) {
  7041. remain_cnt -= (ULONG)(*(((ULONG far *)pCurrSCCB->
  7042. DataPointer) + (sg_ptr * 2)));
  7043. }
  7044. #else
  7045. if (remain_cnt > (ULONG)(*(((ULONG *)pCurrSCCB->
  7046. DataPointer) + (sg_ptr * 2)))) {
  7047. remain_cnt -= (ULONG)(*(((ULONG *)pCurrSCCB->
  7048. DataPointer) + (sg_ptr * 2)));
  7049. }
  7050. #endif
  7051. else {
  7052. break;
  7053. }
  7054. }
  7055. if (remain_cnt < 0x01000000L) {
  7056. pCurrSCCB->Sccb_SGoffset = remain_cnt;
  7057. pCurrSCCB->Sccb_sgseg = (USHORT)sg_ptr;
  7058. if ((ULONG)(sg_ptr * SG_ELEMENT_SIZE) == pCurrSCCB->DataLength
  7059. && (remain_cnt == 0))
  7060. pCurrSCCB->Sccb_XferState |= F_ALL_XFERRED;
  7061. }
  7062. else {
  7063. if (pCurrSCCB->HostStatus == 0x00) {
  7064. pCurrSCCB->HostStatus = SCCB_GROSS_FW_ERR;
  7065. }
  7066. }
  7067. }
  7068. if (!(pCurrSCCB->Sccb_XferState & F_HOST_XFER_DIR)) {
  7069. if (RD_HARPOON(port+hp_ext_status) & BM_CMD_BUSY) {
  7070. busMstrTimeOut(port);
  7071. }
  7072. else {
  7073. if (RD_HARPOON(port+hp_int_status) & INT_EXT_STATUS) {
  7074. if (RD_HARPOON(port+hp_ext_status) & BAD_EXT_STATUS) {
  7075. if (pCurrSCCB->HostStatus == 0x00) {
  7076. pCurrSCCB->HostStatus = SCCB_BM_ERR;
  7077. #if defined(BUGBUG)
  7078. WR_HARPOON(port+hp_dual_addr_lo,
  7079. RD_HARPOON(port+hp_ext_status));
  7080. #endif
  7081. }
  7082. }
  7083. }
  7084. }
  7085. }
  7086. else {
  7087. if ((RD_HARPOON(port+hp_fifo_cnt)) >= BM_THRESHOLD) {
  7088. timeout = SHORT_WAIT;
  7089. while ((RD_HARPOON(port+hp_ext_status) & BM_CMD_BUSY) &&
  7090. ((RD_HARPOON(port+hp_fifo_cnt)) >= BM_THRESHOLD) &&
  7091. timeout--) {}
  7092. }
  7093. if (RD_HARPOON(port+hp_ext_status) & BM_CMD_BUSY) {
  7094. WR_HARPOON(port+hp_bm_ctrl, (RD_HARPOON(port+hp_bm_ctrl) |
  7095. FLUSH_XFER_CNTR));
  7096. timeout = LONG_WAIT;
  7097. while ((RD_HARPOON(port+hp_ext_status) & BM_CMD_BUSY) &&
  7098. timeout--) {}
  7099. WR_HARPOON(port+hp_bm_ctrl, (RD_HARPOON(port+hp_bm_ctrl) &
  7100. ~FLUSH_XFER_CNTR));
  7101. if (RD_HARPOON(port+hp_ext_status) & BM_CMD_BUSY) {
  7102. if (pCurrSCCB->HostStatus == 0x00) {
  7103. pCurrSCCB->HostStatus = SCCB_BM_ERR;
  7104. }
  7105. busMstrTimeOut(port);
  7106. }
  7107. }
  7108. if (RD_HARPOON(port+hp_int_status) & INT_EXT_STATUS) {
  7109. if (RD_HARPOON(port+hp_ext_status) & BAD_EXT_STATUS) {
  7110. if (pCurrSCCB->HostStatus == 0x00) {
  7111. pCurrSCCB->HostStatus = SCCB_BM_ERR;
  7112. #if defined(BUGBUG)
  7113. WR_HARPOON(port+hp_dual_addr_lo,
  7114. RD_HARPOON(port+hp_ext_status));
  7115. #endif
  7116. }
  7117. }
  7118. }
  7119. }
  7120. }
  7121. else {
  7122. if (RD_HARPOON(port+hp_ext_status) & BM_CMD_BUSY) {
  7123. timeout = LONG_WAIT;
  7124. while ((RD_HARPOON(port+hp_ext_status) & BM_CMD_BUSY) && timeout--) {}
  7125. if (RD_HARPOON(port+hp_ext_status) & BM_CMD_BUSY) {
  7126. if (pCurrSCCB->HostStatus == 0x00) {
  7127. pCurrSCCB->HostStatus = SCCB_BM_ERR;
  7128. }
  7129. busMstrTimeOut(port);
  7130. }
  7131. }
  7132. if (RD_HARPOON(port+hp_int_status) & INT_EXT_STATUS) {
  7133. if (RD_HARPOON(port+hp_ext_status) & BAD_EXT_STATUS) {
  7134. if (pCurrSCCB->HostStatus == 0x00) {
  7135. pCurrSCCB->HostStatus = SCCB_BM_ERR;
  7136. #if defined(BUGBUG)
  7137. WR_HARPOON(port+hp_dual_addr_lo,
  7138. RD_HARPOON(port+hp_ext_status));
  7139. #endif
  7140. }
  7141. }
  7142. }
  7143. if (pCurrSCCB->Sccb_XferState & F_SG_XFER) {
  7144. WR_HARPOON(port+hp_page_ctrl, (RD_HARPOON(port+hp_page_ctrl) &
  7145. ~SCATTER_EN));
  7146. WR_HARPOON(port+hp_sg_addr,0x00);
  7147. pCurrSCCB->Sccb_sgseg += SG_BUF_CNT;
  7148. pCurrSCCB->Sccb_SGoffset = 0x00;
  7149. if ((ULONG)(pCurrSCCB->Sccb_sgseg * SG_ELEMENT_SIZE) >=
  7150. pCurrSCCB->DataLength) {
  7151. pCurrSCCB->Sccb_XferState |= F_ALL_XFERRED;
  7152. pCurrSCCB->Sccb_sgseg = (USHORT)(pCurrSCCB->DataLength / SG_ELEMENT_SIZE);
  7153. }
  7154. }
  7155. else {
  7156. if (!(pCurrSCCB->Sccb_XferState & F_AUTO_SENSE))
  7157. pCurrSCCB->Sccb_XferState |= F_ALL_XFERRED;
  7158. }
  7159. }
  7160. WR_HARPOON(port+hp_int_mask,(INT_CMD_COMPL | SCSI_INTERRUPT));
  7161. }
  7162. /*---------------------------------------------------------------------
  7163. *
  7164. * Function: Host Data Transfer Restart
  7165. *
  7166. * Description: Reset the available count due to a restore data
  7167. * pointers message.
  7168. *
  7169. *---------------------------------------------------------------------*/
  7170. void hostDataXferRestart(PSCCB currSCCB)
  7171. {
  7172. ULONG data_count;
  7173. UINT sg_index;
  7174. #if defined(COMPILER_16_BIT) && !defined(DOS)
  7175. ULONG far *sg_ptr;
  7176. #else
  7177. ULONG *sg_ptr;
  7178. #endif
  7179. if (currSCCB->Sccb_XferState & F_SG_XFER) {
  7180. currSCCB->Sccb_XferCnt = 0;
  7181. sg_index = 0xffff; /*Index by long words into sg list. */
  7182. data_count = 0; /*Running count of SG xfer counts. */
  7183. #if defined(COMPILER_16_BIT) && !defined(DOS)
  7184. sg_ptr = (ULONG far *)currSCCB->DataPointer;
  7185. #else
  7186. sg_ptr = (ULONG *)currSCCB->DataPointer;
  7187. #endif
  7188. while (data_count < currSCCB->Sccb_ATC) {
  7189. sg_index++;
  7190. data_count += *(sg_ptr+(sg_index * 2));
  7191. }
  7192. if (data_count == currSCCB->Sccb_ATC) {
  7193. currSCCB->Sccb_SGoffset = 0;
  7194. sg_index++;
  7195. }
  7196. else {
  7197. currSCCB->Sccb_SGoffset = data_count - currSCCB->Sccb_ATC;
  7198. }
  7199. currSCCB->Sccb_sgseg = (USHORT)sg_index;
  7200. }
  7201. else {
  7202. currSCCB->Sccb_XferCnt = currSCCB->DataLength - currSCCB->Sccb_ATC;
  7203. }
  7204. }
  7205. #ident "$Id: scam.c 1.17 1997/03/20 23:49:37 mohan Exp $"
  7206. /*----------------------------------------------------------------------
  7207. *
  7208. *
  7209. * Copyright 1995-1996 by Mylex Corporation. All Rights Reserved
  7210. *
  7211. * This file is available under both the GNU General Public License
  7212. * and a BSD-style copyright; see LICENSE.FlashPoint for details.
  7213. *
  7214. * $Workfile: scam.c $
  7215. *
  7216. * Description: Functions relating to handling of the SCAM selection
  7217. * and the determination of the SCSI IDs to be assigned
  7218. * to all perspective SCSI targets.
  7219. *
  7220. * $Date: 1997/03/20 23:49:37 $
  7221. *
  7222. * $Revision: 1.17 $
  7223. *
  7224. *----------------------------------------------------------------------*/
  7225. /*#include <globals.h>*/
  7226. #if (FW_TYPE==_UCB_MGR_)
  7227. /*#include <budi.h>*/
  7228. #endif
  7229. /*#include <sccbmgr.h>*/
  7230. /*#include <blx30.h>*/
  7231. /*#include <target.h>*/
  7232. /*#include <scsi2.h>*/
  7233. /*#include <eeprom.h>*/
  7234. /*#include <harpoon.h>*/
  7235. /*
  7236. extern SCCBMGR_TAR_INFO sccbMgrTbl[MAX_CARDS][MAX_SCSI_TAR];
  7237. extern SCCBCARD BL_Card[MAX_CARDS];
  7238. extern SCCBSCAM_INFO scamInfo[MAX_SCSI_TAR];
  7239. extern NVRAMINFO nvRamInfo[MAX_MB_CARDS];
  7240. #if defined(DOS) || defined(OS2)
  7241. extern UCHAR temp_id_string[ID_STRING_LENGTH];
  7242. #endif
  7243. extern UCHAR scamHAString[];
  7244. */
  7245. /*---------------------------------------------------------------------
  7246. *
  7247. * Function: scini
  7248. *
  7249. * Description: Setup all data structures necessary for SCAM selection.
  7250. *
  7251. *---------------------------------------------------------------------*/
  7252. void scini(UCHAR p_card, UCHAR p_our_id, UCHAR p_power_up)
  7253. {
  7254. #if defined(SCAM_LEV_2)
  7255. UCHAR loser,assigned_id;
  7256. #endif
  7257. #if defined(DOS)
  7258. USHORT p_port;
  7259. #else
  7260. ULONG p_port;
  7261. #endif
  7262. UCHAR i,k,ScamFlg ;
  7263. PSCCBcard currCard;
  7264. PNVRamInfo pCurrNvRam;
  7265. currCard = &BL_Card[p_card];
  7266. p_port = currCard->ioPort;
  7267. pCurrNvRam = currCard->pNvRamInfo;
  7268. if(pCurrNvRam){
  7269. ScamFlg = pCurrNvRam->niScamConf;
  7270. i = pCurrNvRam->niSysConf;
  7271. }
  7272. else{
  7273. ScamFlg = (UCHAR) utilEERead(p_port, SCAM_CONFIG/2);
  7274. i = (UCHAR)(utilEERead(p_port, (SYSTEM_CONFIG/2)));
  7275. }
  7276. if(!(i & 0x02)) /* check if reset bus in AutoSCSI parameter set */
  7277. return;
  7278. inisci(p_card,p_port, p_our_id);
  7279. /* Force to wait 1 sec after SCSI bus reset. Some SCAM device FW
  7280. too slow to return to SCAM selection */
  7281. /* if (p_power_up)
  7282. Wait1Second(p_port);
  7283. else
  7284. Wait(p_port, TO_250ms); */
  7285. Wait1Second(p_port);
  7286. #if defined(SCAM_LEV_2)
  7287. if ((ScamFlg & SCAM_ENABLED) && (ScamFlg & SCAM_LEVEL2))
  7288. {
  7289. while (!(scarb(p_port,INIT_SELTD))) {}
  7290. scsel(p_port);
  7291. do {
  7292. scxferc(p_port,SYNC_PTRN);
  7293. scxferc(p_port,DOM_MSTR);
  7294. loser = scsendi(p_port,&scamInfo[p_our_id].id_string[0]);
  7295. } while ( loser == 0xFF );
  7296. scbusf(p_port);
  7297. if ((p_power_up) && (!loser))
  7298. {
  7299. sresb(p_port,p_card);
  7300. Wait(p_port, TO_250ms);
  7301. while (!(scarb(p_port,INIT_SELTD))) {}
  7302. scsel(p_port);
  7303. do {
  7304. scxferc(p_port, SYNC_PTRN);
  7305. scxferc(p_port, DOM_MSTR);
  7306. loser = scsendi(p_port,&scamInfo[p_our_id].
  7307. id_string[0]);
  7308. } while ( loser == 0xFF );
  7309. scbusf(p_port);
  7310. }
  7311. }
  7312. else
  7313. {
  7314. loser = FALSE;
  7315. }
  7316. if (!loser)
  7317. {
  7318. #endif /* SCAM_LEV_2 */
  7319. scamInfo[p_our_id].state = ID_ASSIGNED;
  7320. if (ScamFlg & SCAM_ENABLED)
  7321. {
  7322. for (i=0; i < MAX_SCSI_TAR; i++)
  7323. {
  7324. if ((scamInfo[i].state == ID_UNASSIGNED) ||
  7325. (scamInfo[i].state == ID_UNUSED))
  7326. {
  7327. if (scsell(p_port,i))
  7328. {
  7329. scamInfo[i].state = LEGACY;
  7330. if ((scamInfo[i].id_string[0] != 0xFF) ||
  7331. (scamInfo[i].id_string[1] != 0xFA))
  7332. {
  7333. scamInfo[i].id_string[0] = 0xFF;
  7334. scamInfo[i].id_string[1] = 0xFA;
  7335. if(pCurrNvRam == NULL)
  7336. currCard->globalFlags |= F_UPDATE_EEPROM;
  7337. }
  7338. }
  7339. }
  7340. }
  7341. sresb(p_port,p_card);
  7342. Wait1Second(p_port);
  7343. while (!(scarb(p_port,INIT_SELTD))) {}
  7344. scsel(p_port);
  7345. scasid(p_card, p_port);
  7346. }
  7347. #if defined(SCAM_LEV_2)
  7348. }
  7349. else if ((loser) && (ScamFlg & SCAM_ENABLED))
  7350. {
  7351. scamInfo[p_our_id].id_string[0] = SLV_TYPE_CODE0;
  7352. assigned_id = FALSE;
  7353. scwtsel(p_port);
  7354. do {
  7355. while (scxferc(p_port,0x00) != SYNC_PTRN) {}
  7356. i = scxferc(p_port,0x00);
  7357. if (i == ASSIGN_ID)
  7358. {
  7359. if (!(scsendi(p_port,&scamInfo[p_our_id].id_string[0])))
  7360. {
  7361. i = scxferc(p_port,0x00);
  7362. if (scvalq(i))
  7363. {
  7364. k = scxferc(p_port,0x00);
  7365. if (scvalq(k))
  7366. {
  7367. currCard->ourId =
  7368. ((UCHAR)(i<<3)+(k & (UCHAR)7)) & (UCHAR) 0x3F;
  7369. inisci(p_card, p_port, p_our_id);
  7370. scamInfo[currCard->ourId].state = ID_ASSIGNED;
  7371. scamInfo[currCard->ourId].id_string[0]
  7372. = SLV_TYPE_CODE0;
  7373. assigned_id = TRUE;
  7374. }
  7375. }
  7376. }
  7377. }
  7378. else if (i == SET_P_FLAG)
  7379. {
  7380. if (!(scsendi(p_port,
  7381. &scamInfo[p_our_id].id_string[0])))
  7382. scamInfo[p_our_id].id_string[0] |= 0x80;
  7383. }
  7384. }while (!assigned_id);
  7385. while (scxferc(p_port,0x00) != CFG_CMPLT) {}
  7386. }
  7387. #endif /* SCAM_LEV_2 */
  7388. if (ScamFlg & SCAM_ENABLED)
  7389. {
  7390. scbusf(p_port);
  7391. if (currCard->globalFlags & F_UPDATE_EEPROM)
  7392. {
  7393. scsavdi(p_card, p_port);
  7394. currCard->globalFlags &= ~F_UPDATE_EEPROM;
  7395. }
  7396. }
  7397. #if defined(DOS)
  7398. for (i=0; i < MAX_SCSI_TAR; i++)
  7399. {
  7400. if (((ScamFlg & SCAM_ENABLED) && (scamInfo[i].state == LEGACY))
  7401. || (i != p_our_id))
  7402. {
  7403. scsellDOS(p_port,i);
  7404. }
  7405. }
  7406. #endif
  7407. /*
  7408. for (i=0,k=0; i < MAX_SCSI_TAR; i++)
  7409. {
  7410. if ((scamInfo[i].state == ID_ASSIGNED) ||
  7411. (scamInfo[i].state == LEGACY))
  7412. k++;
  7413. }
  7414. if (k==2)
  7415. currCard->globalFlags |= F_SINGLE_DEVICE;
  7416. else
  7417. currCard->globalFlags &= ~F_SINGLE_DEVICE;
  7418. */
  7419. }
  7420. /*---------------------------------------------------------------------
  7421. *
  7422. * Function: scarb
  7423. *
  7424. * Description: Gain control of the bus and wait SCAM select time (250ms)
  7425. *
  7426. *---------------------------------------------------------------------*/
  7427. #if defined(DOS)
  7428. int scarb(USHORT p_port, UCHAR p_sel_type)
  7429. #else
  7430. int scarb(ULONG p_port, UCHAR p_sel_type)
  7431. #endif
  7432. {
  7433. if (p_sel_type == INIT_SELTD)
  7434. {
  7435. while (RD_HARPOON(p_port+hp_scsisig) & (SCSI_SEL | SCSI_BSY)) {}
  7436. if (RD_HARPOON(p_port+hp_scsisig) & SCSI_SEL)
  7437. return(FALSE);
  7438. if (RD_HARPOON(p_port+hp_scsidata_0) != 00)
  7439. return(FALSE);
  7440. WR_HARPOON(p_port+hp_scsisig, (RD_HARPOON(p_port+hp_scsisig) | SCSI_BSY));
  7441. if (RD_HARPOON(p_port+hp_scsisig) & SCSI_SEL) {
  7442. WR_HARPOON(p_port+hp_scsisig, (RD_HARPOON(p_port+hp_scsisig) &
  7443. ~SCSI_BSY));
  7444. return(FALSE);
  7445. }
  7446. WR_HARPOON(p_port+hp_scsisig, (RD_HARPOON(p_port+hp_scsisig) | SCSI_SEL));
  7447. if (RD_HARPOON(p_port+hp_scsidata_0) != 00) {
  7448. WR_HARPOON(p_port+hp_scsisig, (RD_HARPOON(p_port+hp_scsisig) &
  7449. ~(SCSI_BSY | SCSI_SEL)));
  7450. return(FALSE);
  7451. }
  7452. }
  7453. WR_HARPOON(p_port+hp_clkctrl_0, (RD_HARPOON(p_port+hp_clkctrl_0)
  7454. & ~ACTdeassert));
  7455. WR_HARPOON(p_port+hp_scsireset, SCAM_EN);
  7456. WR_HARPOON(p_port+hp_scsidata_0, 0x00);
  7457. #if defined(WIDE_SCSI)
  7458. WR_HARPOON(p_port+hp_scsidata_1, 0x00);
  7459. #endif
  7460. WR_HARPOON(p_port+hp_portctrl_0, SCSI_BUS_EN);
  7461. WR_HARPOON(p_port+hp_scsisig, (RD_HARPOON(p_port+hp_scsisig) | SCSI_MSG));
  7462. WR_HARPOON(p_port+hp_scsisig, (RD_HARPOON(p_port+hp_scsisig)
  7463. & ~SCSI_BSY));
  7464. Wait(p_port,TO_250ms);
  7465. return(TRUE);
  7466. }
  7467. /*---------------------------------------------------------------------
  7468. *
  7469. * Function: scbusf
  7470. *
  7471. * Description: Release the SCSI bus and disable SCAM selection.
  7472. *
  7473. *---------------------------------------------------------------------*/
  7474. #if defined(DOS)
  7475. void scbusf(USHORT p_port)
  7476. #else
  7477. void scbusf(ULONG p_port)
  7478. #endif
  7479. {
  7480. WR_HARPOON(p_port+hp_page_ctrl,
  7481. (RD_HARPOON(p_port+hp_page_ctrl) | G_INT_DISABLE));
  7482. WR_HARPOON(p_port+hp_scsidata_0, 0x00);
  7483. WR_HARPOON(p_port+hp_portctrl_0, (RD_HARPOON(p_port+hp_portctrl_0)
  7484. & ~SCSI_BUS_EN));
  7485. WR_HARPOON(p_port+hp_scsisig, 0x00);
  7486. WR_HARPOON(p_port+hp_scsireset, (RD_HARPOON(p_port+hp_scsireset)
  7487. & ~SCAM_EN));
  7488. WR_HARPOON(p_port+hp_clkctrl_0, (RD_HARPOON(p_port+hp_clkctrl_0)
  7489. | ACTdeassert));
  7490. #if defined(SCAM_LEV_2)
  7491. WRW_HARPOON((p_port+hp_intstat), (BUS_FREE | AUTO_INT | SCAM_SEL));
  7492. #else
  7493. WRW_HARPOON((p_port+hp_intstat), (BUS_FREE | AUTO_INT));
  7494. #endif
  7495. WR_HARPOON(p_port+hp_page_ctrl,
  7496. (RD_HARPOON(p_port+hp_page_ctrl) & ~G_INT_DISABLE));
  7497. }
  7498. /*---------------------------------------------------------------------
  7499. *
  7500. * Function: scasid
  7501. *
  7502. * Description: Assign an ID to all the SCAM devices.
  7503. *
  7504. *---------------------------------------------------------------------*/
  7505. #if defined(DOS)
  7506. void scasid(UCHAR p_card, USHORT p_port)
  7507. #else
  7508. void scasid(UCHAR p_card, ULONG p_port)
  7509. #endif
  7510. {
  7511. #if defined(DOS) || defined(OS2)
  7512. /* Use external defined in global space area, instead of Stack
  7513. space. WIN/95 DOS doesnot work TINY mode. The OS doesnot intialize
  7514. SS equal to DS. Thus the array allocated on stack doesnot get
  7515. access correctly */
  7516. #else
  7517. UCHAR temp_id_string[ID_STRING_LENGTH];
  7518. #endif
  7519. UCHAR i,k,scam_id;
  7520. UCHAR crcBytes[3];
  7521. PNVRamInfo pCurrNvRam;
  7522. ushort_ptr pCrcBytes;
  7523. pCurrNvRam = BL_Card[p_card].pNvRamInfo;
  7524. i=FALSE;
  7525. while (!i)
  7526. {
  7527. for (k=0; k < ID_STRING_LENGTH; k++)
  7528. {
  7529. temp_id_string[k] = (UCHAR) 0x00;
  7530. }
  7531. scxferc(p_port,SYNC_PTRN);
  7532. scxferc(p_port,ASSIGN_ID);
  7533. if (!(sciso(p_port,&temp_id_string[0])))
  7534. {
  7535. if(pCurrNvRam){
  7536. pCrcBytes = (ushort_ptr)&crcBytes[0];
  7537. *pCrcBytes = CalcCrc16(&temp_id_string[0]);
  7538. crcBytes[2] = CalcLrc(&temp_id_string[0]);
  7539. temp_id_string[1] = crcBytes[2];
  7540. temp_id_string[2] = crcBytes[0];
  7541. temp_id_string[3] = crcBytes[1];
  7542. for(k = 4; k < ID_STRING_LENGTH; k++)
  7543. temp_id_string[k] = (UCHAR) 0x00;
  7544. }
  7545. i = scmachid(p_card,temp_id_string);
  7546. if (i == CLR_PRIORITY)
  7547. {
  7548. scxferc(p_port,MISC_CODE);
  7549. scxferc(p_port,CLR_P_FLAG);
  7550. i = FALSE; /*Not the last ID yet. */
  7551. }
  7552. else if (i != NO_ID_AVAIL)
  7553. {
  7554. if (i < 8 )
  7555. scxferc(p_port,ID_0_7);
  7556. else
  7557. scxferc(p_port,ID_8_F);
  7558. scam_id = (i & (UCHAR) 0x07);
  7559. for (k=1; k < 0x08; k <<= 1)
  7560. if (!( k & i ))
  7561. scam_id += 0x08; /*Count number of zeros in DB0-3. */
  7562. scxferc(p_port,scam_id);
  7563. i = FALSE; /*Not the last ID yet. */
  7564. }
  7565. }
  7566. else
  7567. {
  7568. i = TRUE;
  7569. }
  7570. } /*End while */
  7571. scxferc(p_port,SYNC_PTRN);
  7572. scxferc(p_port,CFG_CMPLT);
  7573. }
  7574. /*---------------------------------------------------------------------
  7575. *
  7576. * Function: scsel
  7577. *
  7578. * Description: Select all the SCAM devices.
  7579. *
  7580. *---------------------------------------------------------------------*/
  7581. #if defined(DOS)
  7582. void scsel(USHORT p_port)
  7583. #else
  7584. void scsel(ULONG p_port)
  7585. #endif
  7586. {
  7587. WR_HARPOON(p_port+hp_scsisig, SCSI_SEL);
  7588. scwiros(p_port, SCSI_MSG);
  7589. WR_HARPOON(p_port+hp_scsisig, (SCSI_SEL | SCSI_BSY));
  7590. WR_HARPOON(p_port+hp_scsisig, (SCSI_SEL | SCSI_BSY | SCSI_IOBIT | SCSI_CD));
  7591. WR_HARPOON(p_port+hp_scsidata_0, (UCHAR)(RD_HARPOON(p_port+hp_scsidata_0) |
  7592. (UCHAR)(BIT(7)+BIT(6))));
  7593. WR_HARPOON(p_port+hp_scsisig, (SCSI_BSY | SCSI_IOBIT | SCSI_CD));
  7594. scwiros(p_port, SCSI_SEL);
  7595. WR_HARPOON(p_port+hp_scsidata_0, (UCHAR)(RD_HARPOON(p_port+hp_scsidata_0) &
  7596. ~(UCHAR)BIT(6)));
  7597. scwirod(p_port, BIT(6));
  7598. WR_HARPOON(p_port+hp_scsisig, (SCSI_SEL | SCSI_BSY | SCSI_IOBIT | SCSI_CD));
  7599. }
  7600. /*---------------------------------------------------------------------
  7601. *
  7602. * Function: scxferc
  7603. *
  7604. * Description: Handshake the p_data (DB4-0) across the bus.
  7605. *
  7606. *---------------------------------------------------------------------*/
  7607. #if defined(DOS)
  7608. UCHAR scxferc(USHORT p_port, UCHAR p_data)
  7609. #else
  7610. UCHAR scxferc(ULONG p_port, UCHAR p_data)
  7611. #endif
  7612. {
  7613. UCHAR curr_data, ret_data;
  7614. curr_data = p_data | BIT(7) | BIT(5); /*Start with DB7 & DB5 asserted. */
  7615. WR_HARPOON(p_port+hp_scsidata_0, curr_data);
  7616. curr_data &= ~BIT(7);
  7617. WR_HARPOON(p_port+hp_scsidata_0, curr_data);
  7618. scwirod(p_port,BIT(7)); /*Wait for DB7 to be released. */
  7619. while (!(RD_HARPOON(p_port+hp_scsidata_0) & BIT(5)));
  7620. ret_data = (RD_HARPOON(p_port+hp_scsidata_0) & (UCHAR) 0x1F);
  7621. curr_data |= BIT(6);
  7622. WR_HARPOON(p_port+hp_scsidata_0, curr_data);
  7623. curr_data &= ~BIT(5);
  7624. WR_HARPOON(p_port+hp_scsidata_0, curr_data);
  7625. scwirod(p_port,BIT(5)); /*Wait for DB5 to be released. */
  7626. curr_data &= ~(BIT(4)|BIT(3)|BIT(2)|BIT(1)|BIT(0)); /*Release data bits */
  7627. curr_data |= BIT(7);
  7628. WR_HARPOON(p_port+hp_scsidata_0, curr_data);
  7629. curr_data &= ~BIT(6);
  7630. WR_HARPOON(p_port+hp_scsidata_0, curr_data);
  7631. scwirod(p_port,BIT(6)); /*Wait for DB6 to be released. */
  7632. return(ret_data);
  7633. }
  7634. /*---------------------------------------------------------------------
  7635. *
  7636. * Function: scsendi
  7637. *
  7638. * Description: Transfer our Identification string to determine if we
  7639. * will be the dominant master.
  7640. *
  7641. *---------------------------------------------------------------------*/
  7642. #if defined(DOS)
  7643. UCHAR scsendi(USHORT p_port, UCHAR p_id_string[])
  7644. #else
  7645. UCHAR scsendi(ULONG p_port, UCHAR p_id_string[])
  7646. #endif
  7647. {
  7648. UCHAR ret_data,byte_cnt,bit_cnt,defer;
  7649. defer = FALSE;
  7650. for (byte_cnt = 0; byte_cnt < ID_STRING_LENGTH; byte_cnt++) {
  7651. for (bit_cnt = 0x80; bit_cnt != 0 ; bit_cnt >>= 1) {
  7652. if (defer)
  7653. ret_data = scxferc(p_port,00);
  7654. else if (p_id_string[byte_cnt] & bit_cnt)
  7655. ret_data = scxferc(p_port,02);
  7656. else {
  7657. ret_data = scxferc(p_port,01);
  7658. if (ret_data & 02)
  7659. defer = TRUE;
  7660. }
  7661. if ((ret_data & 0x1C) == 0x10)
  7662. return(0x00); /*End of isolation stage, we won! */
  7663. if (ret_data & 0x1C)
  7664. return(0xFF);
  7665. if ((defer) && (!(ret_data & 0x1F)))
  7666. return(0x01); /*End of isolation stage, we lost. */
  7667. } /*bit loop */
  7668. } /*byte loop */
  7669. if (defer)
  7670. return(0x01); /*We lost */
  7671. else
  7672. return(0); /*We WON! Yeeessss! */
  7673. }
  7674. /*---------------------------------------------------------------------
  7675. *
  7676. * Function: sciso
  7677. *
  7678. * Description: Transfer the Identification string.
  7679. *
  7680. *---------------------------------------------------------------------*/
  7681. #if defined(DOS)
  7682. UCHAR sciso(USHORT p_port, UCHAR p_id_string[])
  7683. #else
  7684. UCHAR sciso(ULONG p_port, UCHAR p_id_string[])
  7685. #endif
  7686. {
  7687. UCHAR ret_data,the_data,byte_cnt,bit_cnt;
  7688. the_data = 0;
  7689. for (byte_cnt = 0; byte_cnt < ID_STRING_LENGTH; byte_cnt++) {
  7690. for (bit_cnt = 0; bit_cnt < 8; bit_cnt++) {
  7691. ret_data = scxferc(p_port,0);
  7692. if (ret_data & 0xFC)
  7693. return(0xFF);
  7694. else {
  7695. the_data <<= 1;
  7696. if (ret_data & BIT(1)) {
  7697. the_data |= 1;
  7698. }
  7699. }
  7700. if ((ret_data & 0x1F) == 0)
  7701. {
  7702. /*
  7703. if(bit_cnt != 0 || bit_cnt != 8)
  7704. {
  7705. byte_cnt = 0;
  7706. bit_cnt = 0;
  7707. scxferc(p_port, SYNC_PTRN);
  7708. scxferc(p_port, ASSIGN_ID);
  7709. continue;
  7710. }
  7711. */
  7712. if (byte_cnt)
  7713. return(0x00);
  7714. else
  7715. return(0xFF);
  7716. }
  7717. } /*bit loop */
  7718. p_id_string[byte_cnt] = the_data;
  7719. } /*byte loop */
  7720. return(0);
  7721. }
  7722. /*---------------------------------------------------------------------
  7723. *
  7724. * Function: scwirod
  7725. *
  7726. * Description: Sample the SCSI data bus making sure the signal has been
  7727. * deasserted for the correct number of consecutive samples.
  7728. *
  7729. *---------------------------------------------------------------------*/
  7730. #if defined(DOS)
  7731. void scwirod(USHORT p_port, UCHAR p_data_bit)
  7732. #else
  7733. void scwirod(ULONG p_port, UCHAR p_data_bit)
  7734. #endif
  7735. {
  7736. UCHAR i;
  7737. i = 0;
  7738. while ( i < MAX_SCSI_TAR ) {
  7739. if (RD_HARPOON(p_port+hp_scsidata_0) & p_data_bit)
  7740. i = 0;
  7741. else
  7742. i++;
  7743. }
  7744. }
  7745. /*---------------------------------------------------------------------
  7746. *
  7747. * Function: scwiros
  7748. *
  7749. * Description: Sample the SCSI Signal lines making sure the signal has been
  7750. * deasserted for the correct number of consecutive samples.
  7751. *
  7752. *---------------------------------------------------------------------*/
  7753. #if defined(DOS)
  7754. void scwiros(USHORT p_port, UCHAR p_data_bit)
  7755. #else
  7756. void scwiros(ULONG p_port, UCHAR p_data_bit)
  7757. #endif
  7758. {
  7759. UCHAR i;
  7760. i = 0;
  7761. while ( i < MAX_SCSI_TAR ) {
  7762. if (RD_HARPOON(p_port+hp_scsisig) & p_data_bit)
  7763. i = 0;
  7764. else
  7765. i++;
  7766. }
  7767. }
  7768. /*---------------------------------------------------------------------
  7769. *
  7770. * Function: scvalq
  7771. *
  7772. * Description: Make sure we received a valid data byte.
  7773. *
  7774. *---------------------------------------------------------------------*/
  7775. UCHAR scvalq(UCHAR p_quintet)
  7776. {
  7777. UCHAR count;
  7778. for (count=1; count < 0x08; count<<=1) {
  7779. if (!(p_quintet & count))
  7780. p_quintet -= 0x80;
  7781. }
  7782. if (p_quintet & 0x18)
  7783. return(FALSE);
  7784. else
  7785. return(TRUE);
  7786. }
  7787. /*---------------------------------------------------------------------
  7788. *
  7789. * Function: scsell
  7790. *
  7791. * Description: Select the specified device ID using a selection timeout
  7792. * less than 4ms. If somebody responds then it is a legacy
  7793. * drive and this ID must be marked as such.
  7794. *
  7795. *---------------------------------------------------------------------*/
  7796. #if defined(DOS)
  7797. UCHAR scsell(USHORT p_port, UCHAR targ_id)
  7798. #else
  7799. UCHAR scsell(ULONG p_port, UCHAR targ_id)
  7800. #endif
  7801. {
  7802. #if defined(DOS)
  7803. USHORT i;
  7804. #else
  7805. ULONG i;
  7806. #endif
  7807. WR_HARPOON(p_port+hp_page_ctrl,
  7808. (RD_HARPOON(p_port+hp_page_ctrl) | G_INT_DISABLE));
  7809. ARAM_ACCESS(p_port);
  7810. WR_HARPOON(p_port+hp_addstat,(RD_HARPOON(p_port+hp_addstat) | SCAM_TIMER));
  7811. WR_HARPOON(p_port+hp_seltimeout,TO_4ms);
  7812. for (i = p_port+CMD_STRT; i < p_port+CMD_STRT+12; i+=2) {
  7813. WRW_HARPOON(i, (MPM_OP+ACOMMAND));
  7814. }
  7815. WRW_HARPOON(i, (BRH_OP+ALWAYS+ NP));
  7816. WRW_HARPOON((p_port+hp_intstat),
  7817. (RESET | TIMEOUT | SEL | BUS_FREE | AUTO_INT));
  7818. WR_HARPOON(p_port+hp_select_id, targ_id);
  7819. WR_HARPOON(p_port+hp_portctrl_0, SCSI_PORT);
  7820. WR_HARPOON(p_port+hp_autostart_3, (SELECT | CMD_ONLY_STRT));
  7821. WR_HARPOON(p_port+hp_scsictrl_0, (SEL_TAR | ENA_RESEL));
  7822. while (!(RDW_HARPOON((p_port+hp_intstat)) &
  7823. (RESET | PROG_HLT | TIMEOUT | AUTO_INT))) {}
  7824. if (RDW_HARPOON((p_port+hp_intstat)) & RESET)
  7825. Wait(p_port, TO_250ms);
  7826. DISABLE_AUTO(p_port);
  7827. WR_HARPOON(p_port+hp_addstat,(RD_HARPOON(p_port+hp_addstat) & ~SCAM_TIMER));
  7828. WR_HARPOON(p_port+hp_seltimeout,TO_290ms);
  7829. SGRAM_ACCESS(p_port);
  7830. if (RDW_HARPOON((p_port+hp_intstat)) & (RESET | TIMEOUT) ) {
  7831. WRW_HARPOON((p_port+hp_intstat),
  7832. (RESET | TIMEOUT | SEL | BUS_FREE | PHASE));
  7833. WR_HARPOON(p_port+hp_page_ctrl,
  7834. (RD_HARPOON(p_port+hp_page_ctrl) & ~G_INT_DISABLE));
  7835. return(FALSE); /*No legacy device */
  7836. }
  7837. else {
  7838. while(!(RDW_HARPOON((p_port+hp_intstat)) & BUS_FREE)) {
  7839. if (RD_HARPOON(p_port+hp_scsisig) & SCSI_REQ)
  7840. {
  7841. WR_HARPOON(p_port+hp_scsisig, (SCSI_ACK + S_ILL_PH));
  7842. ACCEPT_MSG(p_port);
  7843. }
  7844. }
  7845. WRW_HARPOON((p_port+hp_intstat), CLR_ALL_INT_1);
  7846. WR_HARPOON(p_port+hp_page_ctrl,
  7847. (RD_HARPOON(p_port+hp_page_ctrl) & ~G_INT_DISABLE));
  7848. return(TRUE); /*Found one of them oldies! */
  7849. }
  7850. }
  7851. #if defined(DOS)
  7852. /*---------------------------------------------------------------------
  7853. *
  7854. * Function: scsell for DOS
  7855. *
  7856. * Description: Select the specified device ID using a selection timeout
  7857. * less than 2ms. This was specially required to solve
  7858. * the problem with Plextor 12X CD-ROM drive. This drive
  7859. * was responding the Selection at the end of 4ms and
  7860. * hanging the system.
  7861. *
  7862. *---------------------------------------------------------------------*/
  7863. UCHAR scsellDOS(USHORT p_port, UCHAR targ_id)
  7864. {
  7865. USHORT i;
  7866. WR_HARPOON(p_port+hp_page_ctrl,
  7867. (RD_HARPOON(p_port+hp_page_ctrl) | G_INT_DISABLE));
  7868. ARAM_ACCESS(p_port);
  7869. WR_HARPOON(p_port+hp_addstat,(RD_HARPOON(p_port+hp_addstat) | SCAM_TIMER));
  7870. WR_HARPOON(p_port+hp_seltimeout,TO_2ms);
  7871. for (i = p_port+CMD_STRT; i < p_port+CMD_STRT+12; i+=2) {
  7872. WRW_HARPOON(i, (MPM_OP+ACOMMAND));
  7873. }
  7874. WRW_HARPOON(i, (BRH_OP+ALWAYS+ NP));
  7875. WRW_HARPOON((p_port+hp_intstat),
  7876. (RESET | TIMEOUT | SEL | BUS_FREE | AUTO_INT));
  7877. WR_HARPOON(p_port+hp_select_id, targ_id);
  7878. WR_HARPOON(p_port+hp_portctrl_0, SCSI_PORT);
  7879. WR_HARPOON(p_port+hp_autostart_3, (SELECT | CMD_ONLY_STRT));
  7880. WR_HARPOON(p_port+hp_scsictrl_0, (SEL_TAR | ENA_RESEL));
  7881. while (!(RDW_HARPOON((p_port+hp_intstat)) &
  7882. (RESET | PROG_HLT | TIMEOUT | AUTO_INT))) {}
  7883. if (RDW_HARPOON((p_port+hp_intstat)) & RESET)
  7884. Wait(p_port, TO_250ms);
  7885. DISABLE_AUTO(p_port);
  7886. WR_HARPOON(p_port+hp_addstat,(RD_HARPOON(p_port+hp_addstat) & ~SCAM_TIMER));
  7887. WR_HARPOON(p_port+hp_seltimeout,TO_290ms);
  7888. SGRAM_ACCESS(p_port);
  7889. if (RDW_HARPOON((p_port+hp_intstat)) & (RESET | TIMEOUT) ) {
  7890. WRW_HARPOON((p_port+hp_intstat),
  7891. (RESET | TIMEOUT | SEL | BUS_FREE | PHASE));
  7892. WR_HARPOON(p_port+hp_page_ctrl,
  7893. (RD_HARPOON(p_port+hp_page_ctrl) & ~G_INT_DISABLE));
  7894. return(FALSE); /*No legacy device */
  7895. }
  7896. else {
  7897. while(!(RDW_HARPOON((p_port+hp_intstat)) & BUS_FREE)) {
  7898. if (RD_HARPOON(p_port+hp_scsisig) & SCSI_REQ)
  7899. {
  7900. WR_HARPOON(p_port+hp_scsisig, (SCSI_ACK + S_ILL_PH));
  7901. ACCEPT_MSG(p_port);
  7902. }
  7903. }
  7904. WRW_HARPOON((p_port+hp_intstat), CLR_ALL_INT_1);
  7905. WR_HARPOON(p_port+hp_page_ctrl,
  7906. (RD_HARPOON(p_port+hp_page_ctrl) & ~G_INT_DISABLE));
  7907. return(TRUE); /*Found one of them oldies! */
  7908. }
  7909. }
  7910. #endif /* DOS */
  7911. /*---------------------------------------------------------------------
  7912. *
  7913. * Function: scwtsel
  7914. *
  7915. * Description: Wait to be selected by another SCAM initiator.
  7916. *
  7917. *---------------------------------------------------------------------*/
  7918. #if defined(DOS)
  7919. void scwtsel(USHORT p_port)
  7920. #else
  7921. void scwtsel(ULONG p_port)
  7922. #endif
  7923. {
  7924. while(!(RDW_HARPOON((p_port+hp_intstat)) & SCAM_SEL)) {}
  7925. }
  7926. /*---------------------------------------------------------------------
  7927. *
  7928. * Function: inisci
  7929. *
  7930. * Description: Setup the data Structure with the info from the EEPROM.
  7931. *
  7932. *---------------------------------------------------------------------*/
  7933. #if defined(DOS)
  7934. void inisci(UCHAR p_card, USHORT p_port, UCHAR p_our_id)
  7935. #else
  7936. void inisci(UCHAR p_card, ULONG p_port, UCHAR p_our_id)
  7937. #endif
  7938. {
  7939. UCHAR i,k,max_id;
  7940. USHORT ee_data;
  7941. PNVRamInfo pCurrNvRam;
  7942. pCurrNvRam = BL_Card[p_card].pNvRamInfo;
  7943. if (RD_HARPOON(p_port+hp_page_ctrl) & NARROW_SCSI_CARD)
  7944. max_id = 0x08;
  7945. else
  7946. max_id = 0x10;
  7947. if(pCurrNvRam){
  7948. for(i = 0; i < max_id; i++){
  7949. for(k = 0; k < 4; k++)
  7950. scamInfo[i].id_string[k] = pCurrNvRam->niScamTbl[i][k];
  7951. for(k = 4; k < ID_STRING_LENGTH; k++)
  7952. scamInfo[i].id_string[k] = (UCHAR) 0x00;
  7953. if(scamInfo[i].id_string[0] == 0x00)
  7954. scamInfo[i].state = ID_UNUSED; /*Default to unused ID. */
  7955. else
  7956. scamInfo[i].state = ID_UNASSIGNED; /*Default to unassigned ID. */
  7957. }
  7958. }else {
  7959. for (i=0; i < max_id; i++)
  7960. {
  7961. for (k=0; k < ID_STRING_LENGTH; k+=2)
  7962. {
  7963. ee_data = utilEERead(p_port, (USHORT)((EE_SCAMBASE/2) +
  7964. (USHORT) (i*((USHORT)ID_STRING_LENGTH/2)) + (USHORT)(k/2)));
  7965. scamInfo[i].id_string[k] = (UCHAR) ee_data;
  7966. ee_data >>= 8;
  7967. scamInfo[i].id_string[k+1] = (UCHAR) ee_data;
  7968. }
  7969. if ((scamInfo[i].id_string[0] == 0x00) ||
  7970. (scamInfo[i].id_string[0] == 0xFF))
  7971. scamInfo[i].state = ID_UNUSED; /*Default to unused ID. */
  7972. else
  7973. scamInfo[i].state = ID_UNASSIGNED; /*Default to unassigned ID. */
  7974. }
  7975. }
  7976. for(k = 0; k < ID_STRING_LENGTH; k++)
  7977. scamInfo[p_our_id].id_string[k] = scamHAString[k];
  7978. }
  7979. /*---------------------------------------------------------------------
  7980. *
  7981. * Function: scmachid
  7982. *
  7983. * Description: Match the Device ID string with our values stored in
  7984. * the EEPROM.
  7985. *
  7986. *---------------------------------------------------------------------*/
  7987. UCHAR scmachid(UCHAR p_card, UCHAR p_id_string[])
  7988. {
  7989. UCHAR i,k,match;
  7990. for (i=0; i < MAX_SCSI_TAR; i++) {
  7991. #if !defined(SCAM_LEV_2)
  7992. if (scamInfo[i].state == ID_UNASSIGNED)
  7993. {
  7994. #endif
  7995. match = TRUE;
  7996. for (k=0; k < ID_STRING_LENGTH; k++)
  7997. {
  7998. if (p_id_string[k] != scamInfo[i].id_string[k])
  7999. match = FALSE;
  8000. }
  8001. if (match)
  8002. {
  8003. scamInfo[i].state = ID_ASSIGNED;
  8004. return(i);
  8005. }
  8006. #if !defined(SCAM_LEV_2)
  8007. }
  8008. #endif
  8009. }
  8010. if (p_id_string[0] & BIT(5))
  8011. i = 8;
  8012. else
  8013. i = MAX_SCSI_TAR;
  8014. if (((p_id_string[0] & 0x06) == 0x02) || ((p_id_string[0] & 0x06) == 0x04))
  8015. match = p_id_string[1] & (UCHAR) 0x1F;
  8016. else
  8017. match = 7;
  8018. while (i > 0)
  8019. {
  8020. i--;
  8021. if (scamInfo[match].state == ID_UNUSED)
  8022. {
  8023. for (k=0; k < ID_STRING_LENGTH; k++)
  8024. {
  8025. scamInfo[match].id_string[k] = p_id_string[k];
  8026. }
  8027. scamInfo[match].state = ID_ASSIGNED;
  8028. if(BL_Card[p_card].pNvRamInfo == NULL)
  8029. BL_Card[p_card].globalFlags |= F_UPDATE_EEPROM;
  8030. return(match);
  8031. }
  8032. match--;
  8033. if (match == 0xFF)
  8034. {
  8035. if (p_id_string[0] & BIT(5))
  8036. match = 7;
  8037. else
  8038. match = MAX_SCSI_TAR-1;
  8039. }
  8040. }
  8041. if (p_id_string[0] & BIT(7))
  8042. {
  8043. return(CLR_PRIORITY);
  8044. }
  8045. if (p_id_string[0] & BIT(5))
  8046. i = 8;
  8047. else
  8048. i = MAX_SCSI_TAR;
  8049. if (((p_id_string[0] & 0x06) == 0x02) || ((p_id_string[0] & 0x06) == 0x04))
  8050. match = p_id_string[1] & (UCHAR) 0x1F;
  8051. else
  8052. match = 7;
  8053. while (i > 0)
  8054. {
  8055. i--;
  8056. if (scamInfo[match].state == ID_UNASSIGNED)
  8057. {
  8058. for (k=0; k < ID_STRING_LENGTH; k++)
  8059. {
  8060. scamInfo[match].id_string[k] = p_id_string[k];
  8061. }
  8062. scamInfo[match].id_string[0] |= BIT(7);
  8063. scamInfo[match].state = ID_ASSIGNED;
  8064. if(BL_Card[p_card].pNvRamInfo == NULL)
  8065. BL_Card[p_card].globalFlags |= F_UPDATE_EEPROM;
  8066. return(match);
  8067. }
  8068. match--;
  8069. if (match == 0xFF)
  8070. {
  8071. if (p_id_string[0] & BIT(5))
  8072. match = 7;
  8073. else
  8074. match = MAX_SCSI_TAR-1;
  8075. }
  8076. }
  8077. return(NO_ID_AVAIL);
  8078. }
  8079. /*---------------------------------------------------------------------
  8080. *
  8081. * Function: scsavdi
  8082. *
  8083. * Description: Save off the device SCAM ID strings.
  8084. *
  8085. *---------------------------------------------------------------------*/
  8086. #if defined(DOS)
  8087. void scsavdi(UCHAR p_card, USHORT p_port)
  8088. #else
  8089. void scsavdi(UCHAR p_card, ULONG p_port)
  8090. #endif
  8091. {
  8092. UCHAR i,k,max_id;
  8093. USHORT ee_data,sum_data;
  8094. sum_data = 0x0000;
  8095. for (i = 1; i < EE_SCAMBASE/2; i++)
  8096. {
  8097. sum_data += utilEERead(p_port, i);
  8098. }
  8099. utilEEWriteOnOff(p_port,1); /* Enable write access to the EEPROM */
  8100. if (RD_HARPOON(p_port+hp_page_ctrl) & NARROW_SCSI_CARD)
  8101. max_id = 0x08;
  8102. else
  8103. max_id = 0x10;
  8104. for (i=0; i < max_id; i++)
  8105. {
  8106. for (k=0; k < ID_STRING_LENGTH; k+=2)
  8107. {
  8108. ee_data = scamInfo[i].id_string[k+1];
  8109. ee_data <<= 8;
  8110. ee_data |= scamInfo[i].id_string[k];
  8111. sum_data += ee_data;
  8112. utilEEWrite(p_port, ee_data, (USHORT)((EE_SCAMBASE/2) +
  8113. (USHORT)(i*((USHORT)ID_STRING_LENGTH/2)) + (USHORT)(k/2)));
  8114. }
  8115. }
  8116. utilEEWrite(p_port, sum_data, EEPROM_CHECK_SUM/2);
  8117. utilEEWriteOnOff(p_port,0); /* Turn off write access */
  8118. }
  8119. #ident "$Id: diagnose.c 1.10 1997/06/10 16:51:47 mohan Exp $"
  8120. /*----------------------------------------------------------------------
  8121. *
  8122. *
  8123. * Copyright 1995-1996 by Mylex Corporation. All Rights Reserved
  8124. *
  8125. * This file is available under both the GNU General Public License
  8126. * and a BSD-style copyright; see LICENSE.FlashPoint for details.
  8127. *
  8128. * $Workfile: diagnose.c $
  8129. *
  8130. * Description: Diagnostic funtions for testing the integrity of
  8131. * the HARPOON.
  8132. *
  8133. * $Date: 1997/06/10 16:51:47 $
  8134. *
  8135. * $Revision: 1.10 $
  8136. *
  8137. *----------------------------------------------------------------------*/
  8138. /*#include <globals.h>*/
  8139. #if (FW_TYPE==_UCB_MGR_)
  8140. /*#include <budi.h>*/
  8141. #endif
  8142. /*#include <sccbmgr.h>*/
  8143. /*#include <blx30.h>*/
  8144. /*#include <target.h>*/
  8145. /*#include <eeprom.h>*/
  8146. /*#include <harpoon.h>*/
  8147. /*---------------------------------------------------------------------
  8148. *
  8149. * Function: XbowInit
  8150. *
  8151. * Description: Setup the Xbow for normal operation.
  8152. *
  8153. *---------------------------------------------------------------------*/
  8154. #if defined(DOS)
  8155. void XbowInit(USHORT port, UCHAR ScamFlg)
  8156. #else
  8157. void XbowInit(ULONG port, UCHAR ScamFlg)
  8158. #endif
  8159. {
  8160. UCHAR i;
  8161. i = RD_HARPOON(port+hp_page_ctrl);
  8162. WR_HARPOON(port+hp_page_ctrl, (UCHAR) (i | G_INT_DISABLE));
  8163. WR_HARPOON(port+hp_scsireset,0x00);
  8164. WR_HARPOON(port+hp_portctrl_1,HOST_MODE8);
  8165. WR_HARPOON(port+hp_scsireset,(DMA_RESET | HPSCSI_RESET | PROG_RESET | \
  8166. FIFO_CLR));
  8167. WR_HARPOON(port+hp_scsireset,SCSI_INI);
  8168. WR_HARPOON(port+hp_clkctrl_0,CLKCTRL_DEFAULT);
  8169. WR_HARPOON(port+hp_scsisig,0x00); /* Clear any signals we might */
  8170. WR_HARPOON(port+hp_scsictrl_0,ENA_SCAM_SEL);
  8171. WRW_HARPOON((port+hp_intstat), CLR_ALL_INT);
  8172. #if defined(SCAM_LEV_2)
  8173. default_intena = RESET | RSEL | PROG_HLT | TIMEOUT |
  8174. BUS_FREE | XFER_CNT_0 | AUTO_INT;
  8175. if ((ScamFlg & SCAM_ENABLED) && (ScamFlg & SCAM_LEVEL2))
  8176. default_intena |= SCAM_SEL;
  8177. #else
  8178. default_intena = RESET | RSEL | PROG_HLT | TIMEOUT |
  8179. BUS_FREE | XFER_CNT_0 | AUTO_INT;
  8180. #endif
  8181. WRW_HARPOON((port+hp_intena), default_intena);
  8182. WR_HARPOON(port+hp_seltimeout,TO_290ms);
  8183. /* Turn on SCSI_MODE8 for narrow cards to fix the
  8184. strapping issue with the DUAL CHANNEL card */
  8185. if (RD_HARPOON(port+hp_page_ctrl) & NARROW_SCSI_CARD)
  8186. WR_HARPOON(port+hp_addstat,SCSI_MODE8);
  8187. #if defined(NO_BIOS_OPTION)
  8188. WR_HARPOON(port+hp_synctarg_0,NARROW_SCSI);
  8189. WR_HARPOON(port+hp_synctarg_1,NARROW_SCSI);
  8190. WR_HARPOON(port+hp_synctarg_2,NARROW_SCSI);
  8191. WR_HARPOON(port+hp_synctarg_3,NARROW_SCSI);
  8192. WR_HARPOON(port+hp_synctarg_4,NARROW_SCSI);
  8193. WR_HARPOON(port+hp_synctarg_5,NARROW_SCSI);
  8194. WR_HARPOON(port+hp_synctarg_6,NARROW_SCSI);
  8195. WR_HARPOON(port+hp_synctarg_7,NARROW_SCSI);
  8196. WR_HARPOON(port+hp_synctarg_8,NARROW_SCSI);
  8197. WR_HARPOON(port+hp_synctarg_9,NARROW_SCSI);
  8198. WR_HARPOON(port+hp_synctarg_10,NARROW_SCSI);
  8199. WR_HARPOON(port+hp_synctarg_11,NARROW_SCSI);
  8200. WR_HARPOON(port+hp_synctarg_12,NARROW_SCSI);
  8201. WR_HARPOON(port+hp_synctarg_13,NARROW_SCSI);
  8202. WR_HARPOON(port+hp_synctarg_14,NARROW_SCSI);
  8203. WR_HARPOON(port+hp_synctarg_15,NARROW_SCSI);
  8204. #endif
  8205. WR_HARPOON(port+hp_page_ctrl, i);
  8206. }
  8207. /*---------------------------------------------------------------------
  8208. *
  8209. * Function: BusMasterInit
  8210. *
  8211. * Description: Initialize the BusMaster for normal operations.
  8212. *
  8213. *---------------------------------------------------------------------*/
  8214. #if defined(DOS)
  8215. void BusMasterInit(USHORT p_port)
  8216. #else
  8217. void BusMasterInit(ULONG p_port)
  8218. #endif
  8219. {
  8220. WR_HARPOON(p_port+hp_sys_ctrl, DRVR_RST);
  8221. WR_HARPOON(p_port+hp_sys_ctrl, 0x00);
  8222. WR_HARPOON(p_port+hp_host_blk_cnt, XFER_BLK64);
  8223. WR_HARPOON(p_port+hp_bm_ctrl, (BMCTRL_DEFAULT));
  8224. WR_HARPOON(p_port+hp_ee_ctrl, (SCSI_TERM_ENA_H));
  8225. #if defined(NT)
  8226. WR_HARPOON(p_port+hp_pci_cmd_cfg, (RD_HARPOON(p_port+hp_pci_cmd_cfg)
  8227. & ~MEM_SPACE_ENA));
  8228. #endif
  8229. RD_HARPOON(p_port+hp_int_status); /*Clear interrupts. */
  8230. WR_HARPOON(p_port+hp_int_mask, (INT_CMD_COMPL | SCSI_INTERRUPT));
  8231. WR_HARPOON(p_port+hp_page_ctrl, (RD_HARPOON(p_port+hp_page_ctrl) &
  8232. ~SCATTER_EN));
  8233. }
  8234. /*---------------------------------------------------------------------
  8235. *
  8236. * Function: DiagXbow
  8237. *
  8238. * Description: Test Xbow integrity. Non-zero return indicates an error.
  8239. *
  8240. *---------------------------------------------------------------------*/
  8241. #if defined(DOS)
  8242. int DiagXbow(USHORT port)
  8243. #else
  8244. int DiagXbow(ULONG port)
  8245. #endif
  8246. {
  8247. unsigned char fifo_cnt,loop_cnt;
  8248. unsigned char fifodata[5];
  8249. fifodata[0] = 0x00;
  8250. fifodata[1] = 0xFF;
  8251. fifodata[2] = 0x55;
  8252. fifodata[3] = 0xAA;
  8253. fifodata[4] = 0x00;
  8254. WRW_HARPOON((port+hp_intstat), CLR_ALL_INT);
  8255. WRW_HARPOON((port+hp_intena), 0x0000);
  8256. WR_HARPOON(port+hp_seltimeout,TO_5ms);
  8257. WR_HARPOON(port+hp_portctrl_0,START_TO);
  8258. for(fifodata[4] = 0x01; fifodata[4] != (UCHAR) 0; fifodata[4] = fifodata[4] << 1) {
  8259. WR_HARPOON(port+hp_selfid_0,fifodata[4]);
  8260. WR_HARPOON(port+hp_selfid_1,fifodata[4]);
  8261. if ((RD_HARPOON(port+hp_selfid_0) != fifodata[4]) ||
  8262. (RD_HARPOON(port+hp_selfid_1) != fifodata[4]))
  8263. return(1);
  8264. }
  8265. for(loop_cnt = 0; loop_cnt < 4; loop_cnt++) {
  8266. WR_HARPOON(port+hp_portctrl_0,(HOST_PORT | HOST_WRT | START_TO));
  8267. for (fifo_cnt = 0; fifo_cnt < FIFO_LEN; fifo_cnt++) {
  8268. WR_HARPOON(port+hp_fifodata_0, fifodata[loop_cnt]);
  8269. }
  8270. if (!(RD_HARPOON(port+hp_xferstat) & FIFO_FULL))
  8271. return(1);
  8272. WR_HARPOON(port+hp_portctrl_0,(HOST_PORT | START_TO));
  8273. for (fifo_cnt = 0; fifo_cnt < FIFO_LEN; fifo_cnt++) {
  8274. if (RD_HARPOON(port+hp_fifodata_0) != fifodata[loop_cnt])
  8275. return(1);
  8276. }
  8277. if (!(RD_HARPOON(port+hp_xferstat) & FIFO_EMPTY))
  8278. return(1);
  8279. }
  8280. while(!(RDW_HARPOON((port+hp_intstat)) & TIMEOUT)) {}
  8281. WR_HARPOON(port+hp_seltimeout,TO_290ms);
  8282. WRW_HARPOON((port+hp_intstat), CLR_ALL_INT);
  8283. WRW_HARPOON((port+hp_intena), default_intena);
  8284. return(0);
  8285. }
  8286. /*---------------------------------------------------------------------
  8287. *
  8288. * Function: DiagBusMaster
  8289. *
  8290. * Description: Test BusMaster integrity. Non-zero return indicates an
  8291. * error.
  8292. *
  8293. *---------------------------------------------------------------------*/
  8294. #if defined(DOS)
  8295. int DiagBusMaster(USHORT port)
  8296. #else
  8297. int DiagBusMaster(ULONG port)
  8298. #endif
  8299. {
  8300. UCHAR testdata;
  8301. for(testdata = (UCHAR) 1; testdata != (UCHAR)0; testdata = testdata << 1) {
  8302. WR_HARPOON(port+hp_xfer_cnt_lo,testdata);
  8303. WR_HARPOON(port+hp_xfer_cnt_mi,testdata);
  8304. WR_HARPOON(port+hp_xfer_cnt_hi,testdata);
  8305. WR_HARPOON(port+hp_host_addr_lo,testdata);
  8306. WR_HARPOON(port+hp_host_addr_lmi,testdata);
  8307. WR_HARPOON(port+hp_host_addr_hmi,testdata);
  8308. WR_HARPOON(port+hp_host_addr_hi,testdata);
  8309. if ((RD_HARPOON(port+hp_xfer_cnt_lo) != testdata) ||
  8310. (RD_HARPOON(port+hp_xfer_cnt_mi) != testdata) ||
  8311. (RD_HARPOON(port+hp_xfer_cnt_hi) != testdata) ||
  8312. (RD_HARPOON(port+hp_host_addr_lo) != testdata) ||
  8313. (RD_HARPOON(port+hp_host_addr_lmi) != testdata) ||
  8314. (RD_HARPOON(port+hp_host_addr_hmi) != testdata) ||
  8315. (RD_HARPOON(port+hp_host_addr_hi) != testdata))
  8316. return(1);
  8317. }
  8318. RD_HARPOON(port+hp_int_status); /*Clear interrupts. */
  8319. return(0);
  8320. }
  8321. /*---------------------------------------------------------------------
  8322. *
  8323. * Function: DiagEEPROM
  8324. *
  8325. * Description: Verfiy checksum and 'Key' and initialize the EEPROM if
  8326. * necessary.
  8327. *
  8328. *---------------------------------------------------------------------*/
  8329. #if defined(DOS)
  8330. void DiagEEPROM(USHORT p_port)
  8331. #else
  8332. void DiagEEPROM(ULONG p_port)
  8333. #endif
  8334. {
  8335. USHORT index,temp,max_wd_cnt;
  8336. if (RD_HARPOON(p_port+hp_page_ctrl) & NARROW_SCSI_CARD)
  8337. max_wd_cnt = EEPROM_WD_CNT;
  8338. else
  8339. max_wd_cnt = EEPROM_WD_CNT * 2;
  8340. temp = utilEERead(p_port, FW_SIGNATURE/2);
  8341. if (temp == 0x4641) {
  8342. for (index = 2; index < max_wd_cnt; index++) {
  8343. temp += utilEERead(p_port, index);
  8344. }
  8345. if (temp == utilEERead(p_port, EEPROM_CHECK_SUM/2)) {
  8346. return; /*EEPROM is Okay so return now! */
  8347. }
  8348. }
  8349. utilEEWriteOnOff(p_port,(UCHAR)1);
  8350. for (index = 0; index < max_wd_cnt; index++) {
  8351. utilEEWrite(p_port, 0x0000, index);
  8352. }
  8353. temp = 0;
  8354. utilEEWrite(p_port, 0x4641, FW_SIGNATURE/2);
  8355. temp += 0x4641;
  8356. utilEEWrite(p_port, 0x3920, MODEL_NUMB_0/2);
  8357. temp += 0x3920;
  8358. utilEEWrite(p_port, 0x3033, MODEL_NUMB_2/2);
  8359. temp += 0x3033;
  8360. utilEEWrite(p_port, 0x2020, MODEL_NUMB_4/2);
  8361. temp += 0x2020;
  8362. utilEEWrite(p_port, 0x70D3, SYSTEM_CONFIG/2);
  8363. temp += 0x70D3;
  8364. utilEEWrite(p_port, 0x0010, BIOS_CONFIG/2);
  8365. temp += 0x0010;
  8366. utilEEWrite(p_port, 0x0003, SCAM_CONFIG/2);
  8367. temp += 0x0003;
  8368. utilEEWrite(p_port, 0x0007, ADAPTER_SCSI_ID/2);
  8369. temp += 0x0007;
  8370. utilEEWrite(p_port, 0x0000, IGNORE_B_SCAN/2);
  8371. temp += 0x0000;
  8372. utilEEWrite(p_port, 0x0000, SEND_START_ENA/2);
  8373. temp += 0x0000;
  8374. utilEEWrite(p_port, 0x0000, DEVICE_ENABLE/2);
  8375. temp += 0x0000;
  8376. utilEEWrite(p_port, 0x4242, SYNC_RATE_TBL01/2);
  8377. temp += 0x4242;
  8378. utilEEWrite(p_port, 0x4242, SYNC_RATE_TBL23/2);
  8379. temp += 0x4242;
  8380. utilEEWrite(p_port, 0x4242, SYNC_RATE_TBL45/2);
  8381. temp += 0x4242;
  8382. utilEEWrite(p_port, 0x4242, SYNC_RATE_TBL67/2);
  8383. temp += 0x4242;
  8384. utilEEWrite(p_port, 0x4242, SYNC_RATE_TBL89/2);
  8385. temp += 0x4242;
  8386. utilEEWrite(p_port, 0x4242, SYNC_RATE_TBLab/2);
  8387. temp += 0x4242;
  8388. utilEEWrite(p_port, 0x4242, SYNC_RATE_TBLcd/2);
  8389. temp += 0x4242;
  8390. utilEEWrite(p_port, 0x4242, SYNC_RATE_TBLef/2);
  8391. temp += 0x4242;
  8392. utilEEWrite(p_port, 0x6C46, 64/2); /*PRODUCT ID */
  8393. temp += 0x6C46;
  8394. utilEEWrite(p_port, 0x7361, 66/2); /* FlashPoint LT */
  8395. temp += 0x7361;
  8396. utilEEWrite(p_port, 0x5068, 68/2);
  8397. temp += 0x5068;
  8398. utilEEWrite(p_port, 0x696F, 70/2);
  8399. temp += 0x696F;
  8400. utilEEWrite(p_port, 0x746E, 72/2);
  8401. temp += 0x746E;
  8402. utilEEWrite(p_port, 0x4C20, 74/2);
  8403. temp += 0x4C20;
  8404. utilEEWrite(p_port, 0x2054, 76/2);
  8405. temp += 0x2054;
  8406. utilEEWrite(p_port, 0x2020, 78/2);
  8407. temp += 0x2020;
  8408. index = ((EE_SCAMBASE/2)+(7*16));
  8409. utilEEWrite(p_port, (0x0700+TYPE_CODE0), index);
  8410. temp += (0x0700+TYPE_CODE0);
  8411. index++;
  8412. utilEEWrite(p_port, 0x5542, index); /*Vendor ID code */
  8413. temp += 0x5542; /* BUSLOGIC */
  8414. index++;
  8415. utilEEWrite(p_port, 0x4C53, index);
  8416. temp += 0x4C53;
  8417. index++;
  8418. utilEEWrite(p_port, 0x474F, index);
  8419. temp += 0x474F;
  8420. index++;
  8421. utilEEWrite(p_port, 0x4349, index);
  8422. temp += 0x4349;
  8423. index++;
  8424. utilEEWrite(p_port, 0x5442, index); /*Vendor unique code */
  8425. temp += 0x5442; /* BT- 930 */
  8426. index++;
  8427. utilEEWrite(p_port, 0x202D, index);
  8428. temp += 0x202D;
  8429. index++;
  8430. utilEEWrite(p_port, 0x3339, index);
  8431. temp += 0x3339;
  8432. index++; /*Serial # */
  8433. utilEEWrite(p_port, 0x2030, index); /* 01234567 */
  8434. temp += 0x2030;
  8435. index++;
  8436. utilEEWrite(p_port, 0x5453, index);
  8437. temp += 0x5453;
  8438. index++;
  8439. utilEEWrite(p_port, 0x5645, index);
  8440. temp += 0x5645;
  8441. index++;
  8442. utilEEWrite(p_port, 0x2045, index);
  8443. temp += 0x2045;
  8444. index++;
  8445. utilEEWrite(p_port, 0x202F, index);
  8446. temp += 0x202F;
  8447. index++;
  8448. utilEEWrite(p_port, 0x4F4A, index);
  8449. temp += 0x4F4A;
  8450. index++;
  8451. utilEEWrite(p_port, 0x204E, index);
  8452. temp += 0x204E;
  8453. index++;
  8454. utilEEWrite(p_port, 0x3539, index);
  8455. temp += 0x3539;
  8456. utilEEWrite(p_port, temp, EEPROM_CHECK_SUM/2);
  8457. utilEEWriteOnOff(p_port,(UCHAR)0);
  8458. }
  8459. #ident "$Id: utility.c 1.23 1997/06/10 16:55:06 mohan Exp $"
  8460. /*----------------------------------------------------------------------
  8461. *
  8462. *
  8463. * Copyright 1995-1996 by Mylex Corporation. All Rights Reserved
  8464. *
  8465. * This file is available under both the GNU General Public License
  8466. * and a BSD-style copyright; see LICENSE.FlashPoint for details.
  8467. *
  8468. * $Workfile: utility.c $
  8469. *
  8470. * Description: Utility functions relating to queueing and EEPROM
  8471. * manipulation and any other garbage functions.
  8472. *
  8473. * $Date: 1997/06/10 16:55:06 $
  8474. *
  8475. * $Revision: 1.23 $
  8476. *
  8477. *----------------------------------------------------------------------*/
  8478. /*#include <globals.h>*/
  8479. #if (FW_TYPE==_UCB_MGR_)
  8480. /*#include <budi.h>*/
  8481. #endif
  8482. /*#include <sccbmgr.h>*/
  8483. /*#include <blx30.h>*/
  8484. /*#include <target.h>*/
  8485. /*#include <scsi2.h>*/
  8486. /*#include <harpoon.h>*/
  8487. /*
  8488. extern SCCBCARD BL_Card[MAX_CARDS];
  8489. extern SCCBMGR_TAR_INFO sccbMgrTbl[MAX_CARDS][MAX_SCSI_TAR];
  8490. extern unsigned int SccbGlobalFlags;
  8491. */
  8492. /*---------------------------------------------------------------------
  8493. *
  8494. * Function: Queue Search Select
  8495. *
  8496. * Description: Try to find a new command to execute.
  8497. *
  8498. *---------------------------------------------------------------------*/
  8499. void queueSearchSelect(PSCCBcard pCurrCard, UCHAR p_card)
  8500. {
  8501. UCHAR scan_ptr, lun;
  8502. PSCCBMgr_tar_info currTar_Info;
  8503. PSCCB pOldSccb;
  8504. scan_ptr = pCurrCard->scanIndex;
  8505. do
  8506. {
  8507. currTar_Info = &sccbMgrTbl[p_card][scan_ptr];
  8508. if((pCurrCard->globalFlags & F_CONLUN_IO) &&
  8509. ((currTar_Info->TarStatus & TAR_TAG_Q_MASK) != TAG_Q_TRYING))
  8510. {
  8511. if (currTar_Info->TarSelQ_Cnt != 0)
  8512. {
  8513. scan_ptr++;
  8514. if (scan_ptr == MAX_SCSI_TAR)
  8515. scan_ptr = 0;
  8516. for(lun=0; lun < MAX_LUN; lun++)
  8517. {
  8518. if(currTar_Info->TarLUNBusy[lun] == FALSE)
  8519. {
  8520. pCurrCard->currentSCCB = currTar_Info->TarSelQ_Head;
  8521. pOldSccb = NULL;
  8522. while((pCurrCard->currentSCCB != NULL) &&
  8523. (lun != pCurrCard->currentSCCB->Lun))
  8524. {
  8525. pOldSccb = pCurrCard->currentSCCB;
  8526. pCurrCard->currentSCCB = (PSCCB)(pCurrCard->currentSCCB)->
  8527. Sccb_forwardlink;
  8528. }
  8529. if(pCurrCard->currentSCCB == NULL)
  8530. continue;
  8531. if(pOldSccb != NULL)
  8532. {
  8533. pOldSccb->Sccb_forwardlink = (PSCCB)(pCurrCard->currentSCCB)->
  8534. Sccb_forwardlink;
  8535. pOldSccb->Sccb_backlink = (PSCCB)(pCurrCard->currentSCCB)->
  8536. Sccb_backlink;
  8537. currTar_Info->TarSelQ_Cnt--;
  8538. }
  8539. else
  8540. {
  8541. currTar_Info->TarSelQ_Head = (PSCCB)(pCurrCard->currentSCCB)->Sccb_forwardlink;
  8542. if (currTar_Info->TarSelQ_Head == NULL)
  8543. {
  8544. currTar_Info->TarSelQ_Tail = NULL;
  8545. currTar_Info->TarSelQ_Cnt = 0;
  8546. }
  8547. else
  8548. {
  8549. currTar_Info->TarSelQ_Cnt--;
  8550. currTar_Info->TarSelQ_Head->Sccb_backlink = (PSCCB)NULL;
  8551. }
  8552. }
  8553. pCurrCard->scanIndex = scan_ptr;
  8554. pCurrCard->globalFlags |= F_NEW_SCCB_CMD;
  8555. break;
  8556. }
  8557. }
  8558. }
  8559. else
  8560. {
  8561. scan_ptr++;
  8562. if (scan_ptr == MAX_SCSI_TAR) {
  8563. scan_ptr = 0;
  8564. }
  8565. }
  8566. }
  8567. else
  8568. {
  8569. if ((currTar_Info->TarSelQ_Cnt != 0) &&
  8570. (currTar_Info->TarLUNBusy[0] == FALSE))
  8571. {
  8572. pCurrCard->currentSCCB = currTar_Info->TarSelQ_Head;
  8573. currTar_Info->TarSelQ_Head = (PSCCB)(pCurrCard->currentSCCB)->Sccb_forwardlink;
  8574. if (currTar_Info->TarSelQ_Head == NULL)
  8575. {
  8576. currTar_Info->TarSelQ_Tail = NULL;
  8577. currTar_Info->TarSelQ_Cnt = 0;
  8578. }
  8579. else
  8580. {
  8581. currTar_Info->TarSelQ_Cnt--;
  8582. currTar_Info->TarSelQ_Head->Sccb_backlink = (PSCCB)NULL;
  8583. }
  8584. scan_ptr++;
  8585. if (scan_ptr == MAX_SCSI_TAR)
  8586. scan_ptr = 0;
  8587. pCurrCard->scanIndex = scan_ptr;
  8588. pCurrCard->globalFlags |= F_NEW_SCCB_CMD;
  8589. break;
  8590. }
  8591. else
  8592. {
  8593. scan_ptr++;
  8594. if (scan_ptr == MAX_SCSI_TAR)
  8595. {
  8596. scan_ptr = 0;
  8597. }
  8598. }
  8599. }
  8600. } while (scan_ptr != pCurrCard->scanIndex);
  8601. }
  8602. /*---------------------------------------------------------------------
  8603. *
  8604. * Function: Queue Select Fail
  8605. *
  8606. * Description: Add the current SCCB to the head of the Queue.
  8607. *
  8608. *---------------------------------------------------------------------*/
  8609. void queueSelectFail(PSCCBcard pCurrCard, UCHAR p_card)
  8610. {
  8611. UCHAR thisTarg;
  8612. PSCCBMgr_tar_info currTar_Info;
  8613. if (pCurrCard->currentSCCB != NULL)
  8614. {
  8615. thisTarg = (UCHAR)(((PSCCB)(pCurrCard->currentSCCB))->TargID);
  8616. currTar_Info = &sccbMgrTbl[p_card][thisTarg];
  8617. pCurrCard->currentSCCB->Sccb_backlink = (PSCCB)NULL;
  8618. pCurrCard->currentSCCB->Sccb_forwardlink = currTar_Info->TarSelQ_Head;
  8619. if (currTar_Info->TarSelQ_Cnt == 0)
  8620. {
  8621. currTar_Info->TarSelQ_Tail = pCurrCard->currentSCCB;
  8622. }
  8623. else
  8624. {
  8625. currTar_Info->TarSelQ_Head->Sccb_backlink = pCurrCard->currentSCCB;
  8626. }
  8627. currTar_Info->TarSelQ_Head = pCurrCard->currentSCCB;
  8628. pCurrCard->currentSCCB = NULL;
  8629. currTar_Info->TarSelQ_Cnt++;
  8630. }
  8631. }
  8632. /*---------------------------------------------------------------------
  8633. *
  8634. * Function: Queue Command Complete
  8635. *
  8636. * Description: Call the callback function with the current SCCB.
  8637. *
  8638. *---------------------------------------------------------------------*/
  8639. void queueCmdComplete(PSCCBcard pCurrCard, PSCCB p_sccb, UCHAR p_card)
  8640. {
  8641. #if (FW_TYPE==_UCB_MGR_)
  8642. u08bits SCSIcmd;
  8643. CALL_BK_FN callback;
  8644. PSCCBMgr_tar_info currTar_Info;
  8645. PUCB p_ucb;
  8646. p_ucb=p_sccb->Sccb_ucb_ptr;
  8647. SCSIcmd = p_sccb->Cdb[0];
  8648. if (!(p_sccb->Sccb_XferState & F_ALL_XFERRED))
  8649. {
  8650. if ((p_ucb->UCB_opcode & OPC_CHK_UNDER_OVER_RUN) &&
  8651. (p_sccb->HostStatus == SCCB_COMPLETE) &&
  8652. (p_sccb->TargetStatus != SSCHECK))
  8653. if ((SCSIcmd == SCSI_READ) ||
  8654. (SCSIcmd == SCSI_WRITE) ||
  8655. (SCSIcmd == SCSI_READ_EXTENDED) ||
  8656. (SCSIcmd == SCSI_WRITE_EXTENDED) ||
  8657. (SCSIcmd == SCSI_WRITE_AND_VERIFY) ||
  8658. (SCSIcmd == SCSI_START_STOP_UNIT) ||
  8659. (pCurrCard->globalFlags & F_NO_FILTER)
  8660. )
  8661. p_sccb->HostStatus = SCCB_DATA_UNDER_RUN;
  8662. }
  8663. p_ucb->UCB_status=SCCB_SUCCESS;
  8664. if ((p_ucb->UCB_hbastat=p_sccb->HostStatus) || (p_ucb->UCB_scsistat=p_sccb->TargetStatus))
  8665. {
  8666. p_ucb->UCB_status=SCCB_ERROR;
  8667. }
  8668. if ((p_sccb->OperationCode == RESIDUAL_SG_COMMAND) ||
  8669. (p_sccb->OperationCode == RESIDUAL_COMMAND))
  8670. {
  8671. utilUpdateResidual(p_sccb);
  8672. p_ucb->UCB_datalen=p_sccb->DataLength;
  8673. }
  8674. pCurrCard->cmdCounter--;
  8675. if (!pCurrCard->cmdCounter)
  8676. {
  8677. if (pCurrCard->globalFlags & F_GREEN_PC)
  8678. {
  8679. WR_HARPOON(pCurrCard->ioPort+hp_clkctrl_0,(PWR_DWN | CLKCTRL_DEFAULT));
  8680. WR_HARPOON(pCurrCard->ioPort+hp_sys_ctrl, STOP_CLK);
  8681. }
  8682. WR_HARPOON(pCurrCard->ioPort+hp_semaphore,
  8683. (RD_HARPOON(pCurrCard->ioPort+hp_semaphore) & ~SCCB_MGR_ACTIVE));
  8684. }
  8685. if(pCurrCard->discQCount != 0)
  8686. {
  8687. currTar_Info = &sccbMgrTbl[p_card][p_sccb->TargID];
  8688. if(((pCurrCard->globalFlags & F_CONLUN_IO) &&
  8689. ((currTar_Info->TarStatus & TAR_TAG_Q_MASK) != TAG_Q_TRYING)))
  8690. {
  8691. pCurrCard->discQCount--;
  8692. pCurrCard->discQ_Tbl[currTar_Info->LunDiscQ_Idx[p_sccb->Lun]] = NULL;
  8693. }
  8694. else
  8695. {
  8696. if(p_sccb->Sccb_tag)
  8697. {
  8698. pCurrCard->discQCount--;
  8699. pCurrCard->discQ_Tbl[p_sccb->Sccb_tag] = NULL;
  8700. }else
  8701. {
  8702. pCurrCard->discQCount--;
  8703. pCurrCard->discQ_Tbl[currTar_Info->LunDiscQ_Idx[0]] = NULL;
  8704. }
  8705. }
  8706. }
  8707. callback = (CALL_BK_FN)p_ucb->UCB_callback;
  8708. callback(p_ucb);
  8709. pCurrCard->globalFlags |= F_NEW_SCCB_CMD;
  8710. pCurrCard->currentSCCB = NULL;
  8711. }
  8712. #else
  8713. UCHAR i, SCSIcmd;
  8714. CALL_BK_FN callback;
  8715. PSCCBMgr_tar_info currTar_Info;
  8716. SCSIcmd = p_sccb->Cdb[0];
  8717. if (!(p_sccb->Sccb_XferState & F_ALL_XFERRED)) {
  8718. if ((p_sccb->ControlByte & (SCCB_DATA_XFER_OUT | SCCB_DATA_XFER_IN)) &&
  8719. (p_sccb->HostStatus == SCCB_COMPLETE) &&
  8720. (p_sccb->TargetStatus != SSCHECK))
  8721. if ((SCSIcmd == SCSI_READ) ||
  8722. (SCSIcmd == SCSI_WRITE) ||
  8723. (SCSIcmd == SCSI_READ_EXTENDED) ||
  8724. (SCSIcmd == SCSI_WRITE_EXTENDED) ||
  8725. (SCSIcmd == SCSI_WRITE_AND_VERIFY) ||
  8726. (SCSIcmd == SCSI_START_STOP_UNIT) ||
  8727. (pCurrCard->globalFlags & F_NO_FILTER)
  8728. )
  8729. p_sccb->HostStatus = SCCB_DATA_UNDER_RUN;
  8730. }
  8731. if(p_sccb->SccbStatus == SCCB_IN_PROCESS)
  8732. {
  8733. if (p_sccb->HostStatus || p_sccb->TargetStatus)
  8734. p_sccb->SccbStatus = SCCB_ERROR;
  8735. else
  8736. p_sccb->SccbStatus = SCCB_SUCCESS;
  8737. }
  8738. if (p_sccb->Sccb_XferState & F_AUTO_SENSE) {
  8739. p_sccb->CdbLength = p_sccb->Save_CdbLen;
  8740. for (i=0; i < 6; i++) {
  8741. p_sccb->Cdb[i] = p_sccb->Save_Cdb[i];
  8742. }
  8743. }
  8744. if ((p_sccb->OperationCode == RESIDUAL_SG_COMMAND) ||
  8745. (p_sccb->OperationCode == RESIDUAL_COMMAND)) {
  8746. utilUpdateResidual(p_sccb);
  8747. }
  8748. pCurrCard->cmdCounter--;
  8749. if (!pCurrCard->cmdCounter) {
  8750. if (pCurrCard->globalFlags & F_GREEN_PC) {
  8751. WR_HARPOON(pCurrCard->ioPort+hp_clkctrl_0,(PWR_DWN | CLKCTRL_DEFAULT));
  8752. WR_HARPOON(pCurrCard->ioPort+hp_sys_ctrl, STOP_CLK);
  8753. }
  8754. WR_HARPOON(pCurrCard->ioPort+hp_semaphore,
  8755. (RD_HARPOON(pCurrCard->ioPort+hp_semaphore) & ~SCCB_MGR_ACTIVE));
  8756. }
  8757. if(pCurrCard->discQCount != 0)
  8758. {
  8759. currTar_Info = &sccbMgrTbl[p_card][p_sccb->TargID];
  8760. if(((pCurrCard->globalFlags & F_CONLUN_IO) &&
  8761. ((currTar_Info->TarStatus & TAR_TAG_Q_MASK) != TAG_Q_TRYING)))
  8762. {
  8763. pCurrCard->discQCount--;
  8764. pCurrCard->discQ_Tbl[currTar_Info->LunDiscQ_Idx[p_sccb->Lun]] = NULL;
  8765. }
  8766. else
  8767. {
  8768. if(p_sccb->Sccb_tag)
  8769. {
  8770. pCurrCard->discQCount--;
  8771. pCurrCard->discQ_Tbl[p_sccb->Sccb_tag] = NULL;
  8772. }else
  8773. {
  8774. pCurrCard->discQCount--;
  8775. pCurrCard->discQ_Tbl[currTar_Info->LunDiscQ_Idx[0]] = NULL;
  8776. }
  8777. }
  8778. }
  8779. callback = (CALL_BK_FN)p_sccb->SccbCallback;
  8780. callback(p_sccb);
  8781. pCurrCard->globalFlags |= F_NEW_SCCB_CMD;
  8782. pCurrCard->currentSCCB = NULL;
  8783. }
  8784. #endif /* ( if FW_TYPE==...) */
  8785. /*---------------------------------------------------------------------
  8786. *
  8787. * Function: Queue Disconnect
  8788. *
  8789. * Description: Add SCCB to our disconnect array.
  8790. *
  8791. *---------------------------------------------------------------------*/
  8792. void queueDisconnect(PSCCB p_sccb, UCHAR p_card)
  8793. {
  8794. PSCCBMgr_tar_info currTar_Info;
  8795. currTar_Info = &sccbMgrTbl[p_card][p_sccb->TargID];
  8796. if(((BL_Card[p_card].globalFlags & F_CONLUN_IO) &&
  8797. ((currTar_Info->TarStatus & TAR_TAG_Q_MASK) != TAG_Q_TRYING)))
  8798. {
  8799. BL_Card[p_card].discQ_Tbl[currTar_Info->LunDiscQ_Idx[p_sccb->Lun]] = p_sccb;
  8800. }
  8801. else
  8802. {
  8803. if (p_sccb->Sccb_tag)
  8804. {
  8805. BL_Card[p_card].discQ_Tbl[p_sccb->Sccb_tag] = p_sccb;
  8806. sccbMgrTbl[p_card][p_sccb->TargID].TarLUNBusy[0] = FALSE;
  8807. sccbMgrTbl[p_card][p_sccb->TargID].TarTagQ_Cnt++;
  8808. }else
  8809. {
  8810. BL_Card[p_card].discQ_Tbl[currTar_Info->LunDiscQ_Idx[0]] = p_sccb;
  8811. }
  8812. }
  8813. BL_Card[p_card].currentSCCB = NULL;
  8814. }
  8815. /*---------------------------------------------------------------------
  8816. *
  8817. * Function: Queue Flush SCCB
  8818. *
  8819. * Description: Flush all SCCB's back to the host driver for this target.
  8820. *
  8821. *---------------------------------------------------------------------*/
  8822. void queueFlushSccb(UCHAR p_card, UCHAR error_code)
  8823. {
  8824. UCHAR qtag,thisTarg;
  8825. PSCCB currSCCB;
  8826. PSCCBMgr_tar_info currTar_Info;
  8827. currSCCB = BL_Card[p_card].currentSCCB;
  8828. if(currSCCB != NULL)
  8829. {
  8830. thisTarg = (UCHAR)currSCCB->TargID;
  8831. currTar_Info = &sccbMgrTbl[p_card][thisTarg];
  8832. for (qtag=0; qtag<QUEUE_DEPTH; qtag++) {
  8833. if (BL_Card[p_card].discQ_Tbl[qtag] &&
  8834. (BL_Card[p_card].discQ_Tbl[qtag]->TargID == thisTarg))
  8835. {
  8836. BL_Card[p_card].discQ_Tbl[qtag]->HostStatus = (UCHAR)error_code;
  8837. queueCmdComplete(&BL_Card[p_card],BL_Card[p_card].discQ_Tbl[qtag], p_card);
  8838. BL_Card[p_card].discQ_Tbl[qtag] = NULL;
  8839. currTar_Info->TarTagQ_Cnt--;
  8840. }
  8841. }
  8842. }
  8843. }
  8844. /*---------------------------------------------------------------------
  8845. *
  8846. * Function: Queue Flush Target SCCB
  8847. *
  8848. * Description: Flush all SCCB's back to the host driver for this target.
  8849. *
  8850. *---------------------------------------------------------------------*/
  8851. void queueFlushTargSccb(UCHAR p_card, UCHAR thisTarg, UCHAR error_code)
  8852. {
  8853. UCHAR qtag;
  8854. PSCCBMgr_tar_info currTar_Info;
  8855. currTar_Info = &sccbMgrTbl[p_card][thisTarg];
  8856. for (qtag=0; qtag<QUEUE_DEPTH; qtag++) {
  8857. if (BL_Card[p_card].discQ_Tbl[qtag] &&
  8858. (BL_Card[p_card].discQ_Tbl[qtag]->TargID == thisTarg))
  8859. {
  8860. BL_Card[p_card].discQ_Tbl[qtag]->HostStatus = (UCHAR)error_code;
  8861. queueCmdComplete(&BL_Card[p_card],BL_Card[p_card].discQ_Tbl[qtag], p_card);
  8862. BL_Card[p_card].discQ_Tbl[qtag] = NULL;
  8863. currTar_Info->TarTagQ_Cnt--;
  8864. }
  8865. }
  8866. }
  8867. void queueAddSccb(PSCCB p_SCCB, UCHAR p_card)
  8868. {
  8869. PSCCBMgr_tar_info currTar_Info;
  8870. currTar_Info = &sccbMgrTbl[p_card][p_SCCB->TargID];
  8871. p_SCCB->Sccb_forwardlink = NULL;
  8872. p_SCCB->Sccb_backlink = currTar_Info->TarSelQ_Tail;
  8873. if (currTar_Info->TarSelQ_Cnt == 0) {
  8874. currTar_Info->TarSelQ_Head = p_SCCB;
  8875. }
  8876. else {
  8877. currTar_Info->TarSelQ_Tail->Sccb_forwardlink = p_SCCB;
  8878. }
  8879. currTar_Info->TarSelQ_Tail = p_SCCB;
  8880. currTar_Info->TarSelQ_Cnt++;
  8881. }
  8882. /*---------------------------------------------------------------------
  8883. *
  8884. * Function: Queue Find SCCB
  8885. *
  8886. * Description: Search the target select Queue for this SCCB, and
  8887. * remove it if found.
  8888. *
  8889. *---------------------------------------------------------------------*/
  8890. UCHAR queueFindSccb(PSCCB p_SCCB, UCHAR p_card)
  8891. {
  8892. PSCCB q_ptr;
  8893. PSCCBMgr_tar_info currTar_Info;
  8894. currTar_Info = &sccbMgrTbl[p_card][p_SCCB->TargID];
  8895. q_ptr = currTar_Info->TarSelQ_Head;
  8896. while(q_ptr != NULL) {
  8897. if (q_ptr == p_SCCB) {
  8898. if (currTar_Info->TarSelQ_Head == q_ptr) {
  8899. currTar_Info->TarSelQ_Head = q_ptr->Sccb_forwardlink;
  8900. }
  8901. if (currTar_Info->TarSelQ_Tail == q_ptr) {
  8902. currTar_Info->TarSelQ_Tail = q_ptr->Sccb_backlink;
  8903. }
  8904. if (q_ptr->Sccb_forwardlink != NULL) {
  8905. q_ptr->Sccb_forwardlink->Sccb_backlink = q_ptr->Sccb_backlink;
  8906. }
  8907. if (q_ptr->Sccb_backlink != NULL) {
  8908. q_ptr->Sccb_backlink->Sccb_forwardlink = q_ptr->Sccb_forwardlink;
  8909. }
  8910. currTar_Info->TarSelQ_Cnt--;
  8911. return(TRUE);
  8912. }
  8913. else {
  8914. q_ptr = q_ptr->Sccb_forwardlink;
  8915. }
  8916. }
  8917. return(FALSE);
  8918. }
  8919. /*---------------------------------------------------------------------
  8920. *
  8921. * Function: Utility Update Residual Count
  8922. *
  8923. * Description: Update the XferCnt to the remaining byte count.
  8924. * If we transferred all the data then just write zero.
  8925. * If Non-SG transfer then report Total Cnt - Actual Transfer
  8926. * Cnt. For SG transfers add the count fields of all
  8927. * remaining SG elements, as well as any partial remaining
  8928. * element.
  8929. *
  8930. *---------------------------------------------------------------------*/
  8931. void utilUpdateResidual(PSCCB p_SCCB)
  8932. {
  8933. ULONG partial_cnt;
  8934. UINT sg_index;
  8935. #if defined(COMPILER_16_BIT) && !defined(DOS)
  8936. ULONG far *sg_ptr;
  8937. #else
  8938. ULONG *sg_ptr;
  8939. #endif
  8940. if (p_SCCB->Sccb_XferState & F_ALL_XFERRED) {
  8941. p_SCCB->DataLength = 0x0000;
  8942. }
  8943. else if (p_SCCB->Sccb_XferState & F_SG_XFER) {
  8944. partial_cnt = 0x0000;
  8945. sg_index = p_SCCB->Sccb_sgseg;
  8946. #if defined(COMPILER_16_BIT) && !defined(DOS)
  8947. sg_ptr = (ULONG far *)p_SCCB->DataPointer;
  8948. #else
  8949. sg_ptr = (ULONG *)p_SCCB->DataPointer;
  8950. #endif
  8951. if (p_SCCB->Sccb_SGoffset) {
  8952. partial_cnt = p_SCCB->Sccb_SGoffset;
  8953. sg_index++;
  8954. }
  8955. while ( ((ULONG)sg_index * (ULONG)SG_ELEMENT_SIZE) <
  8956. p_SCCB->DataLength ) {
  8957. partial_cnt += *(sg_ptr+(sg_index * 2));
  8958. sg_index++;
  8959. }
  8960. p_SCCB->DataLength = partial_cnt;
  8961. }
  8962. else {
  8963. p_SCCB->DataLength -= p_SCCB->Sccb_ATC;
  8964. }
  8965. }
  8966. /*---------------------------------------------------------------------
  8967. *
  8968. * Function: Wait 1 Second
  8969. *
  8970. * Description: Wait for 1 second.
  8971. *
  8972. *---------------------------------------------------------------------*/
  8973. #if defined(DOS)
  8974. void Wait1Second(USHORT p_port)
  8975. #else
  8976. void Wait1Second(ULONG p_port)
  8977. #endif
  8978. {
  8979. UCHAR i;
  8980. for(i=0; i < 4; i++) {
  8981. Wait(p_port, TO_250ms);
  8982. if ((RD_HARPOON(p_port+hp_scsictrl_0) & SCSI_RST))
  8983. break;
  8984. if((RDW_HARPOON((p_port+hp_intstat)) & SCAM_SEL))
  8985. break;
  8986. }
  8987. }
  8988. /*---------------------------------------------------------------------
  8989. *
  8990. * Function: Wait
  8991. *
  8992. * Description: Wait the desired delay.
  8993. *
  8994. *---------------------------------------------------------------------*/
  8995. #if defined(DOS)
  8996. void Wait(USHORT p_port, UCHAR p_delay)
  8997. #else
  8998. void Wait(ULONG p_port, UCHAR p_delay)
  8999. #endif
  9000. {
  9001. UCHAR old_timer;
  9002. UCHAR green_flag;
  9003. old_timer = RD_HARPOON(p_port+hp_seltimeout);
  9004. green_flag=RD_HARPOON(p_port+hp_clkctrl_0);
  9005. WR_HARPOON(p_port+hp_clkctrl_0, CLKCTRL_DEFAULT);
  9006. WR_HARPOON(p_port+hp_seltimeout,p_delay);
  9007. WRW_HARPOON((p_port+hp_intstat), TIMEOUT);
  9008. WRW_HARPOON((p_port+hp_intena), (default_intena & ~TIMEOUT));
  9009. WR_HARPOON(p_port+hp_portctrl_0,
  9010. (RD_HARPOON(p_port+hp_portctrl_0) | START_TO));
  9011. while (!(RDW_HARPOON((p_port+hp_intstat)) & TIMEOUT)) {
  9012. if ((RD_HARPOON(p_port+hp_scsictrl_0) & SCSI_RST))
  9013. break;
  9014. if ((RDW_HARPOON((p_port+hp_intstat)) & SCAM_SEL))
  9015. break;
  9016. }
  9017. WR_HARPOON(p_port+hp_portctrl_0,
  9018. (RD_HARPOON(p_port+hp_portctrl_0) & ~START_TO));
  9019. WRW_HARPOON((p_port+hp_intstat), TIMEOUT);
  9020. WRW_HARPOON((p_port+hp_intena), default_intena);
  9021. WR_HARPOON(p_port+hp_clkctrl_0,green_flag);
  9022. WR_HARPOON(p_port+hp_seltimeout,old_timer);
  9023. }
  9024. /*---------------------------------------------------------------------
  9025. *
  9026. * Function: Enable/Disable Write to EEPROM
  9027. *
  9028. * Description: The EEPROM must first be enabled for writes
  9029. * A total of 9 clocks are needed.
  9030. *
  9031. *---------------------------------------------------------------------*/
  9032. #if defined(DOS)
  9033. void utilEEWriteOnOff(USHORT p_port,UCHAR p_mode)
  9034. #else
  9035. void utilEEWriteOnOff(ULONG p_port,UCHAR p_mode)
  9036. #endif
  9037. {
  9038. UCHAR ee_value;
  9039. ee_value = (UCHAR)(RD_HARPOON(p_port+hp_ee_ctrl) & (EXT_ARB_ACK | SCSI_TERM_ENA_H));
  9040. if (p_mode)
  9041. utilEESendCmdAddr(p_port, EWEN, EWEN_ADDR);
  9042. else
  9043. utilEESendCmdAddr(p_port, EWDS, EWDS_ADDR);
  9044. WR_HARPOON(p_port+hp_ee_ctrl, (ee_value | SEE_MS)); /*Turn off CS */
  9045. WR_HARPOON(p_port+hp_ee_ctrl, ee_value); /*Turn off Master Select */
  9046. }
  9047. /*---------------------------------------------------------------------
  9048. *
  9049. * Function: Write EEPROM
  9050. *
  9051. * Description: Write a word to the EEPROM at the specified
  9052. * address.
  9053. *
  9054. *---------------------------------------------------------------------*/
  9055. #if defined(DOS)
  9056. void utilEEWrite(USHORT p_port, USHORT ee_data, USHORT ee_addr)
  9057. #else
  9058. void utilEEWrite(ULONG p_port, USHORT ee_data, USHORT ee_addr)
  9059. #endif
  9060. {
  9061. UCHAR ee_value;
  9062. USHORT i;
  9063. ee_value = (UCHAR)((RD_HARPOON(p_port+hp_ee_ctrl) & (EXT_ARB_ACK | SCSI_TERM_ENA_H))|
  9064. (SEE_MS | SEE_CS));
  9065. utilEESendCmdAddr(p_port, EE_WRITE, ee_addr);
  9066. ee_value |= (SEE_MS + SEE_CS);
  9067. for(i = 0x8000; i != 0; i>>=1) {
  9068. if (i & ee_data)
  9069. ee_value |= SEE_DO;
  9070. else
  9071. ee_value &= ~SEE_DO;
  9072. WR_HARPOON(p_port+hp_ee_ctrl, ee_value);
  9073. WR_HARPOON(p_port+hp_ee_ctrl, ee_value);
  9074. ee_value |= SEE_CLK; /* Clock data! */
  9075. WR_HARPOON(p_port+hp_ee_ctrl, ee_value);
  9076. WR_HARPOON(p_port+hp_ee_ctrl, ee_value);
  9077. ee_value &= ~SEE_CLK;
  9078. WR_HARPOON(p_port+hp_ee_ctrl, ee_value);
  9079. WR_HARPOON(p_port+hp_ee_ctrl, ee_value);
  9080. }
  9081. ee_value &= (EXT_ARB_ACK | SCSI_TERM_ENA_H);
  9082. WR_HARPOON(p_port+hp_ee_ctrl, (ee_value | SEE_MS));
  9083. Wait(p_port, TO_10ms);
  9084. WR_HARPOON(p_port+hp_ee_ctrl, (ee_value | SEE_MS | SEE_CS)); /* Set CS to EEPROM */
  9085. WR_HARPOON(p_port+hp_ee_ctrl, (ee_value | SEE_MS)); /* Turn off CS */
  9086. WR_HARPOON(p_port+hp_ee_ctrl, ee_value); /* Turn off Master Select */
  9087. }
  9088. /*---------------------------------------------------------------------
  9089. *
  9090. * Function: Read EEPROM
  9091. *
  9092. * Description: Read a word from the EEPROM at the desired
  9093. * address.
  9094. *
  9095. *---------------------------------------------------------------------*/
  9096. #if defined(DOS)
  9097. USHORT utilEERead(USHORT p_port, USHORT ee_addr)
  9098. #else
  9099. USHORT utilEERead(ULONG p_port, USHORT ee_addr)
  9100. #endif
  9101. {
  9102. USHORT i, ee_data1, ee_data2;
  9103. i = 0;
  9104. ee_data1 = utilEEReadOrg(p_port, ee_addr);
  9105. do
  9106. {
  9107. ee_data2 = utilEEReadOrg(p_port, ee_addr);
  9108. if(ee_data1 == ee_data2)
  9109. return(ee_data1);
  9110. ee_data1 = ee_data2;
  9111. i++;
  9112. }while(i < 4);
  9113. return(ee_data1);
  9114. }
  9115. /*---------------------------------------------------------------------
  9116. *
  9117. * Function: Read EEPROM Original
  9118. *
  9119. * Description: Read a word from the EEPROM at the desired
  9120. * address.
  9121. *
  9122. *---------------------------------------------------------------------*/
  9123. #if defined(DOS)
  9124. USHORT utilEEReadOrg(USHORT p_port, USHORT ee_addr)
  9125. #else
  9126. USHORT utilEEReadOrg(ULONG p_port, USHORT ee_addr)
  9127. #endif
  9128. {
  9129. UCHAR ee_value;
  9130. USHORT i, ee_data;
  9131. ee_value = (UCHAR)((RD_HARPOON(p_port+hp_ee_ctrl) & (EXT_ARB_ACK | SCSI_TERM_ENA_H))|
  9132. (SEE_MS | SEE_CS));
  9133. utilEESendCmdAddr(p_port, EE_READ, ee_addr);
  9134. ee_value |= (SEE_MS + SEE_CS);
  9135. ee_data = 0;
  9136. for(i = 1; i <= 16; i++) {
  9137. ee_value |= SEE_CLK; /* Clock data! */
  9138. WR_HARPOON(p_port+hp_ee_ctrl, ee_value);
  9139. WR_HARPOON(p_port+hp_ee_ctrl, ee_value);
  9140. ee_value &= ~SEE_CLK;
  9141. WR_HARPOON(p_port+hp_ee_ctrl, ee_value);
  9142. WR_HARPOON(p_port+hp_ee_ctrl, ee_value);
  9143. ee_data <<= 1;
  9144. if (RD_HARPOON(p_port+hp_ee_ctrl) & SEE_DI)
  9145. ee_data |= 1;
  9146. }
  9147. ee_value &= ~(SEE_MS + SEE_CS);
  9148. WR_HARPOON(p_port+hp_ee_ctrl, (ee_value | SEE_MS)); /*Turn off CS */
  9149. WR_HARPOON(p_port+hp_ee_ctrl, ee_value); /*Turn off Master Select */
  9150. return(ee_data);
  9151. }
  9152. /*---------------------------------------------------------------------
  9153. *
  9154. * Function: Send EE command and Address to the EEPROM
  9155. *
  9156. * Description: Transfers the correct command and sends the address
  9157. * to the eeprom.
  9158. *
  9159. *---------------------------------------------------------------------*/
  9160. #if defined(DOS)
  9161. void utilEESendCmdAddr(USHORT p_port, UCHAR ee_cmd, USHORT ee_addr)
  9162. #else
  9163. void utilEESendCmdAddr(ULONG p_port, UCHAR ee_cmd, USHORT ee_addr)
  9164. #endif
  9165. {
  9166. UCHAR ee_value;
  9167. UCHAR narrow_flg;
  9168. USHORT i;
  9169. narrow_flg= (UCHAR)(RD_HARPOON(p_port+hp_page_ctrl) & NARROW_SCSI_CARD);
  9170. ee_value = SEE_MS;
  9171. WR_HARPOON(p_port+hp_ee_ctrl, ee_value);
  9172. ee_value |= SEE_CS; /* Set CS to EEPROM */
  9173. WR_HARPOON(p_port+hp_ee_ctrl, ee_value);
  9174. for(i = 0x04; i != 0; i>>=1) {
  9175. if (i & ee_cmd)
  9176. ee_value |= SEE_DO;
  9177. else
  9178. ee_value &= ~SEE_DO;
  9179. WR_HARPOON(p_port+hp_ee_ctrl, ee_value);
  9180. WR_HARPOON(p_port+hp_ee_ctrl, ee_value);
  9181. ee_value |= SEE_CLK; /* Clock data! */
  9182. WR_HARPOON(p_port+hp_ee_ctrl, ee_value);
  9183. WR_HARPOON(p_port+hp_ee_ctrl, ee_value);
  9184. ee_value &= ~SEE_CLK;
  9185. WR_HARPOON(p_port+hp_ee_ctrl, ee_value);
  9186. WR_HARPOON(p_port+hp_ee_ctrl, ee_value);
  9187. }
  9188. if (narrow_flg)
  9189. i = 0x0080;
  9190. else
  9191. i = 0x0200;
  9192. while (i != 0) {
  9193. if (i & ee_addr)
  9194. ee_value |= SEE_DO;
  9195. else
  9196. ee_value &= ~SEE_DO;
  9197. WR_HARPOON(p_port+hp_ee_ctrl, ee_value);
  9198. WR_HARPOON(p_port+hp_ee_ctrl, ee_value);
  9199. ee_value |= SEE_CLK; /* Clock data! */
  9200. WR_HARPOON(p_port+hp_ee_ctrl, ee_value);
  9201. WR_HARPOON(p_port+hp_ee_ctrl, ee_value);
  9202. ee_value &= ~SEE_CLK;
  9203. WR_HARPOON(p_port+hp_ee_ctrl, ee_value);
  9204. WR_HARPOON(p_port+hp_ee_ctrl, ee_value);
  9205. i >>= 1;
  9206. }
  9207. }
  9208. USHORT CalcCrc16(UCHAR buffer[])
  9209. {
  9210. USHORT crc=0;
  9211. int i,j;
  9212. USHORT ch;
  9213. for (i=0; i < ID_STRING_LENGTH; i++)
  9214. {
  9215. ch = (USHORT) buffer[i];
  9216. for(j=0; j < 8; j++)
  9217. {
  9218. if ((crc ^ ch) & 1)
  9219. crc = (crc >> 1) ^ CRCMASK;
  9220. else
  9221. crc >>= 1;
  9222. ch >>= 1;
  9223. }
  9224. }
  9225. return(crc);
  9226. }
  9227. UCHAR CalcLrc(UCHAR buffer[])
  9228. {
  9229. int i;
  9230. UCHAR lrc;
  9231. lrc = 0;
  9232. for(i = 0; i < ID_STRING_LENGTH; i++)
  9233. lrc ^= buffer[i];
  9234. return(lrc);
  9235. }
  9236. /*
  9237. The following inline definitions avoid type conflicts.
  9238. */
  9239. static inline unsigned char
  9240. FlashPoint__ProbeHostAdapter(struct FlashPoint_Info *FlashPointInfo)
  9241. {
  9242. return FlashPoint_ProbeHostAdapter((PSCCBMGR_INFO) FlashPointInfo);
  9243. }
  9244. static inline FlashPoint_CardHandle_T
  9245. FlashPoint__HardwareResetHostAdapter(struct FlashPoint_Info *FlashPointInfo)
  9246. {
  9247. return FlashPoint_HardwareResetHostAdapter((PSCCBMGR_INFO) FlashPointInfo);
  9248. }
  9249. static inline void
  9250. FlashPoint__ReleaseHostAdapter(FlashPoint_CardHandle_T CardHandle)
  9251. {
  9252. FlashPoint_ReleaseHostAdapter(CardHandle);
  9253. }
  9254. static inline void
  9255. FlashPoint__StartCCB(FlashPoint_CardHandle_T CardHandle, struct BusLogic_CCB *CCB)
  9256. {
  9257. FlashPoint_StartCCB(CardHandle, (PSCCB) CCB);
  9258. }
  9259. static inline void
  9260. FlashPoint__AbortCCB(FlashPoint_CardHandle_T CardHandle, struct BusLogic_CCB *CCB)
  9261. {
  9262. FlashPoint_AbortCCB(CardHandle, (PSCCB) CCB);
  9263. }
  9264. static inline boolean
  9265. FlashPoint__InterruptPending(FlashPoint_CardHandle_T CardHandle)
  9266. {
  9267. return FlashPoint_InterruptPending(CardHandle);
  9268. }
  9269. static inline int
  9270. FlashPoint__HandleInterrupt(FlashPoint_CardHandle_T CardHandle)
  9271. {
  9272. return FlashPoint_HandleInterrupt(CardHandle);
  9273. }
  9274. #define FlashPoint_ProbeHostAdapter FlashPoint__ProbeHostAdapter
  9275. #define FlashPoint_HardwareResetHostAdapter FlashPoint__HardwareResetHostAdapter
  9276. #define FlashPoint_ReleaseHostAdapter FlashPoint__ReleaseHostAdapter
  9277. #define FlashPoint_StartCCB FlashPoint__StartCCB
  9278. #define FlashPoint_AbortCCB FlashPoint__AbortCCB
  9279. #define FlashPoint_InterruptPending FlashPoint__InterruptPending
  9280. #define FlashPoint_HandleInterrupt FlashPoint__HandleInterrupt
  9281. /*
  9282. FlashPoint_InquireTargetInfo returns the Synchronous Period, Synchronous
  9283. Offset, and Wide Transfers Active information for TargetID on CardHandle.
  9284. */
  9285. void FlashPoint_InquireTargetInfo(FlashPoint_CardHandle_T CardHandle,
  9286. int TargetID,
  9287. unsigned char *SynchronousPeriod,
  9288. unsigned char *SynchronousOffset,
  9289. unsigned char *WideTransfersActive)
  9290. {
  9291. SCCBMGR_TAR_INFO *TargetInfo =
  9292. &sccbMgrTbl[((SCCBCARD *)CardHandle)->cardIndex][TargetID];
  9293. if ((TargetInfo->TarSyncCtrl & SYNC_OFFSET) > 0)
  9294. {
  9295. *SynchronousPeriod = 5 * ((TargetInfo->TarSyncCtrl >> 5) + 1);
  9296. *SynchronousOffset = TargetInfo->TarSyncCtrl & SYNC_OFFSET;
  9297. }
  9298. else
  9299. {
  9300. *SynchronousPeriod = 0;
  9301. *SynchronousOffset = 0;
  9302. }
  9303. *WideTransfersActive = (TargetInfo->TarSyncCtrl & NARROW_SCSI ? 0 : 1);
  9304. }
  9305. #else /* CONFIG_SCSI_OMIT_FLASHPOINT */
  9306. /*
  9307. Define prototypes for the FlashPoint SCCB Manager Functions.
  9308. */
  9309. extern unsigned char FlashPoint_ProbeHostAdapter(struct FlashPoint_Info *);
  9310. extern FlashPoint_CardHandle_T
  9311. FlashPoint_HardwareResetHostAdapter(struct FlashPoint_Info *);
  9312. extern void FlashPoint_StartCCB(FlashPoint_CardHandle_T, struct BusLogic_CCB *);
  9313. extern int FlashPoint_AbortCCB(FlashPoint_CardHandle_T, struct BusLogic_CCB *);
  9314. extern boolean FlashPoint_InterruptPending(FlashPoint_CardHandle_T);
  9315. extern int FlashPoint_HandleInterrupt(FlashPoint_CardHandle_T);
  9316. extern void FlashPoint_ReleaseHostAdapter(FlashPoint_CardHandle_T);
  9317. extern void FlashPoint_InquireTargetInfo(FlashPoint_CardHandle_T,
  9318. int, unsigned char *,
  9319. unsigned char *, unsigned char *);
  9320. #endif /* CONFIG_SCSI_OMIT_FLASHPOINT */