wbsd.c 31 KB

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  1. /*
  2. * linux/drivers/mmc/wbsd.c - Winbond W83L51xD SD/MMC driver
  3. *
  4. * Copyright (C) 2004-2005 Pierre Ossman, All Rights Reserved.
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License version 2 as
  8. * published by the Free Software Foundation.
  9. *
  10. *
  11. * Warning!
  12. *
  13. * Changes to the FIFO system should be done with extreme care since
  14. * the hardware is full of bugs related to the FIFO. Known issues are:
  15. *
  16. * - FIFO size field in FSR is always zero.
  17. *
  18. * - FIFO interrupts tend not to work as they should. Interrupts are
  19. * triggered only for full/empty events, not for threshold values.
  20. *
  21. * - On APIC systems the FIFO empty interrupt is sometimes lost.
  22. */
  23. #include <linux/config.h>
  24. #include <linux/module.h>
  25. #include <linux/moduleparam.h>
  26. #include <linux/init.h>
  27. #include <linux/ioport.h>
  28. #include <linux/device.h>
  29. #include <linux/interrupt.h>
  30. #include <linux/delay.h>
  31. #include <linux/highmem.h>
  32. #include <linux/mmc/host.h>
  33. #include <linux/mmc/protocol.h>
  34. #include <asm/io.h>
  35. #include <asm/dma.h>
  36. #include <asm/scatterlist.h>
  37. #include "wbsd.h"
  38. #define DRIVER_NAME "wbsd"
  39. #define DRIVER_VERSION "1.1"
  40. #ifdef CONFIG_MMC_DEBUG
  41. #define DBG(x...) \
  42. printk(KERN_DEBUG DRIVER_NAME ": " x)
  43. #define DBGF(f, x...) \
  44. printk(KERN_DEBUG DRIVER_NAME " [%s()]: " f, __func__ , ##x)
  45. #else
  46. #define DBG(x...) do { } while (0)
  47. #define DBGF(x...) do { } while (0)
  48. #endif
  49. static unsigned int io = 0x248;
  50. static unsigned int irq = 6;
  51. static int dma = 2;
  52. #ifdef CONFIG_MMC_DEBUG
  53. void DBG_REG(int reg, u8 value)
  54. {
  55. int i;
  56. printk(KERN_DEBUG "wbsd: Register %d: 0x%02X %3d '%c' ",
  57. reg, (int)value, (int)value, (value < 0x20)?'.':value);
  58. for (i = 7;i >= 0;i--)
  59. {
  60. if (value & (1 << i))
  61. printk("x");
  62. else
  63. printk(".");
  64. }
  65. printk("\n");
  66. }
  67. #else
  68. #define DBG_REG(r, v) do {} while (0)
  69. #endif
  70. /*
  71. * Basic functions
  72. */
  73. static inline void wbsd_unlock_config(struct wbsd_host* host)
  74. {
  75. outb(host->unlock_code, host->config);
  76. outb(host->unlock_code, host->config);
  77. }
  78. static inline void wbsd_lock_config(struct wbsd_host* host)
  79. {
  80. outb(LOCK_CODE, host->config);
  81. }
  82. static inline void wbsd_write_config(struct wbsd_host* host, u8 reg, u8 value)
  83. {
  84. outb(reg, host->config);
  85. outb(value, host->config + 1);
  86. }
  87. static inline u8 wbsd_read_config(struct wbsd_host* host, u8 reg)
  88. {
  89. outb(reg, host->config);
  90. return inb(host->config + 1);
  91. }
  92. static inline void wbsd_write_index(struct wbsd_host* host, u8 index, u8 value)
  93. {
  94. outb(index, host->base + WBSD_IDXR);
  95. outb(value, host->base + WBSD_DATAR);
  96. }
  97. static inline u8 wbsd_read_index(struct wbsd_host* host, u8 index)
  98. {
  99. outb(index, host->base + WBSD_IDXR);
  100. return inb(host->base + WBSD_DATAR);
  101. }
  102. /*
  103. * Common routines
  104. */
  105. static void wbsd_init_device(struct wbsd_host* host)
  106. {
  107. u8 setup, ier;
  108. /*
  109. * Reset chip (SD/MMC part) and fifo.
  110. */
  111. setup = wbsd_read_index(host, WBSD_IDX_SETUP);
  112. setup |= WBSD_FIFO_RESET | WBSD_SOFT_RESET;
  113. wbsd_write_index(host, WBSD_IDX_SETUP, setup);
  114. /*
  115. * Read back default clock.
  116. */
  117. host->clk = wbsd_read_index(host, WBSD_IDX_CLK);
  118. /*
  119. * Power down port.
  120. */
  121. outb(WBSD_POWER_N, host->base + WBSD_CSR);
  122. /*
  123. * Set maximum timeout.
  124. */
  125. wbsd_write_index(host, WBSD_IDX_TAAC, 0x7F);
  126. /*
  127. * Enable interesting interrupts.
  128. */
  129. ier = 0;
  130. ier |= WBSD_EINT_CARD;
  131. ier |= WBSD_EINT_FIFO_THRE;
  132. ier |= WBSD_EINT_CCRC;
  133. ier |= WBSD_EINT_TIMEOUT;
  134. ier |= WBSD_EINT_CRC;
  135. ier |= WBSD_EINT_TC;
  136. outb(ier, host->base + WBSD_EIR);
  137. /*
  138. * Clear interrupts.
  139. */
  140. inb(host->base + WBSD_ISR);
  141. }
  142. static void wbsd_reset(struct wbsd_host* host)
  143. {
  144. u8 setup;
  145. printk(KERN_ERR DRIVER_NAME ": Resetting chip\n");
  146. /*
  147. * Soft reset of chip (SD/MMC part).
  148. */
  149. setup = wbsd_read_index(host, WBSD_IDX_SETUP);
  150. setup |= WBSD_SOFT_RESET;
  151. wbsd_write_index(host, WBSD_IDX_SETUP, setup);
  152. }
  153. static void wbsd_request_end(struct wbsd_host* host, struct mmc_request* mrq)
  154. {
  155. unsigned long dmaflags;
  156. DBGF("Ending request, cmd (%x)\n", mrq->cmd->opcode);
  157. if (host->dma >= 0)
  158. {
  159. /*
  160. * Release ISA DMA controller.
  161. */
  162. dmaflags = claim_dma_lock();
  163. disable_dma(host->dma);
  164. clear_dma_ff(host->dma);
  165. release_dma_lock(dmaflags);
  166. /*
  167. * Disable DMA on host.
  168. */
  169. wbsd_write_index(host, WBSD_IDX_DMA, 0);
  170. }
  171. host->mrq = NULL;
  172. /*
  173. * MMC layer might call back into the driver so first unlock.
  174. */
  175. spin_unlock(&host->lock);
  176. mmc_request_done(host->mmc, mrq);
  177. spin_lock(&host->lock);
  178. }
  179. /*
  180. * Scatter/gather functions
  181. */
  182. static inline void wbsd_init_sg(struct wbsd_host* host, struct mmc_data* data)
  183. {
  184. /*
  185. * Get info. about SG list from data structure.
  186. */
  187. host->cur_sg = data->sg;
  188. host->num_sg = data->sg_len;
  189. host->offset = 0;
  190. host->remain = host->cur_sg->length;
  191. }
  192. static inline int wbsd_next_sg(struct wbsd_host* host)
  193. {
  194. /*
  195. * Skip to next SG entry.
  196. */
  197. host->cur_sg++;
  198. host->num_sg--;
  199. /*
  200. * Any entries left?
  201. */
  202. if (host->num_sg > 0)
  203. {
  204. host->offset = 0;
  205. host->remain = host->cur_sg->length;
  206. }
  207. return host->num_sg;
  208. }
  209. static inline char* wbsd_kmap_sg(struct wbsd_host* host)
  210. {
  211. host->mapped_sg = kmap_atomic(host->cur_sg->page, KM_BIO_SRC_IRQ) +
  212. host->cur_sg->offset;
  213. return host->mapped_sg;
  214. }
  215. static inline void wbsd_kunmap_sg(struct wbsd_host* host)
  216. {
  217. kunmap_atomic(host->mapped_sg, KM_BIO_SRC_IRQ);
  218. }
  219. static inline void wbsd_sg_to_dma(struct wbsd_host* host, struct mmc_data* data)
  220. {
  221. unsigned int len, i, size;
  222. struct scatterlist* sg;
  223. char* dmabuf = host->dma_buffer;
  224. char* sgbuf;
  225. size = host->size;
  226. sg = data->sg;
  227. len = data->sg_len;
  228. /*
  229. * Just loop through all entries. Size might not
  230. * be the entire list though so make sure that
  231. * we do not transfer too much.
  232. */
  233. for (i = 0;i < len;i++)
  234. {
  235. sgbuf = kmap_atomic(sg[i].page, KM_BIO_SRC_IRQ) + sg[i].offset;
  236. if (size < sg[i].length)
  237. memcpy(dmabuf, sgbuf, size);
  238. else
  239. memcpy(dmabuf, sgbuf, sg[i].length);
  240. kunmap_atomic(sgbuf, KM_BIO_SRC_IRQ);
  241. dmabuf += sg[i].length;
  242. if (size < sg[i].length)
  243. size = 0;
  244. else
  245. size -= sg[i].length;
  246. if (size == 0)
  247. break;
  248. }
  249. /*
  250. * Check that we didn't get a request to transfer
  251. * more data than can fit into the SG list.
  252. */
  253. BUG_ON(size != 0);
  254. host->size -= size;
  255. }
  256. static inline void wbsd_dma_to_sg(struct wbsd_host* host, struct mmc_data* data)
  257. {
  258. unsigned int len, i, size;
  259. struct scatterlist* sg;
  260. char* dmabuf = host->dma_buffer;
  261. char* sgbuf;
  262. size = host->size;
  263. sg = data->sg;
  264. len = data->sg_len;
  265. /*
  266. * Just loop through all entries. Size might not
  267. * be the entire list though so make sure that
  268. * we do not transfer too much.
  269. */
  270. for (i = 0;i < len;i++)
  271. {
  272. sgbuf = kmap_atomic(sg[i].page, KM_BIO_SRC_IRQ) + sg[i].offset;
  273. if (size < sg[i].length)
  274. memcpy(sgbuf, dmabuf, size);
  275. else
  276. memcpy(sgbuf, dmabuf, sg[i].length);
  277. kunmap_atomic(sgbuf, KM_BIO_SRC_IRQ);
  278. dmabuf += sg[i].length;
  279. if (size < sg[i].length)
  280. size = 0;
  281. else
  282. size -= sg[i].length;
  283. if (size == 0)
  284. break;
  285. }
  286. /*
  287. * Check that we didn't get a request to transfer
  288. * more data than can fit into the SG list.
  289. */
  290. BUG_ON(size != 0);
  291. host->size -= size;
  292. }
  293. /*
  294. * Command handling
  295. */
  296. static inline void wbsd_get_short_reply(struct wbsd_host* host,
  297. struct mmc_command* cmd)
  298. {
  299. /*
  300. * Correct response type?
  301. */
  302. if (wbsd_read_index(host, WBSD_IDX_RSPLEN) != WBSD_RSP_SHORT)
  303. {
  304. cmd->error = MMC_ERR_INVALID;
  305. return;
  306. }
  307. cmd->resp[0] =
  308. wbsd_read_index(host, WBSD_IDX_RESP12) << 24;
  309. cmd->resp[0] |=
  310. wbsd_read_index(host, WBSD_IDX_RESP13) << 16;
  311. cmd->resp[0] |=
  312. wbsd_read_index(host, WBSD_IDX_RESP14) << 8;
  313. cmd->resp[0] |=
  314. wbsd_read_index(host, WBSD_IDX_RESP15) << 0;
  315. cmd->resp[1] =
  316. wbsd_read_index(host, WBSD_IDX_RESP16) << 24;
  317. }
  318. static inline void wbsd_get_long_reply(struct wbsd_host* host,
  319. struct mmc_command* cmd)
  320. {
  321. int i;
  322. /*
  323. * Correct response type?
  324. */
  325. if (wbsd_read_index(host, WBSD_IDX_RSPLEN) != WBSD_RSP_LONG)
  326. {
  327. cmd->error = MMC_ERR_INVALID;
  328. return;
  329. }
  330. for (i = 0;i < 4;i++)
  331. {
  332. cmd->resp[i] =
  333. wbsd_read_index(host, WBSD_IDX_RESP1 + i * 4) << 24;
  334. cmd->resp[i] |=
  335. wbsd_read_index(host, WBSD_IDX_RESP2 + i * 4) << 16;
  336. cmd->resp[i] |=
  337. wbsd_read_index(host, WBSD_IDX_RESP3 + i * 4) << 8;
  338. cmd->resp[i] |=
  339. wbsd_read_index(host, WBSD_IDX_RESP4 + i * 4) << 0;
  340. }
  341. }
  342. static irqreturn_t wbsd_irq(int irq, void *dev_id, struct pt_regs *regs);
  343. static void wbsd_send_command(struct wbsd_host* host, struct mmc_command* cmd)
  344. {
  345. int i;
  346. u8 status, isr;
  347. DBGF("Sending cmd (%x)\n", cmd->opcode);
  348. /*
  349. * Clear accumulated ISR. The interrupt routine
  350. * will fill this one with events that occur during
  351. * transfer.
  352. */
  353. host->isr = 0;
  354. /*
  355. * Send the command (CRC calculated by host).
  356. */
  357. outb(cmd->opcode, host->base + WBSD_CMDR);
  358. for (i = 3;i >= 0;i--)
  359. outb((cmd->arg >> (i * 8)) & 0xff, host->base + WBSD_CMDR);
  360. cmd->error = MMC_ERR_NONE;
  361. /*
  362. * Wait for the request to complete.
  363. */
  364. do {
  365. status = wbsd_read_index(host, WBSD_IDX_STATUS);
  366. } while (status & WBSD_CARDTRAFFIC);
  367. /*
  368. * Do we expect a reply?
  369. */
  370. if ((cmd->flags & MMC_RSP_MASK) != MMC_RSP_NONE)
  371. {
  372. /*
  373. * Read back status.
  374. */
  375. isr = host->isr;
  376. /* Card removed? */
  377. if (isr & WBSD_INT_CARD)
  378. cmd->error = MMC_ERR_TIMEOUT;
  379. /* Timeout? */
  380. else if (isr & WBSD_INT_TIMEOUT)
  381. cmd->error = MMC_ERR_TIMEOUT;
  382. /* CRC? */
  383. else if ((cmd->flags & MMC_RSP_CRC) && (isr & WBSD_INT_CRC))
  384. cmd->error = MMC_ERR_BADCRC;
  385. /* All ok */
  386. else
  387. {
  388. if ((cmd->flags & MMC_RSP_MASK) == MMC_RSP_SHORT)
  389. wbsd_get_short_reply(host, cmd);
  390. else
  391. wbsd_get_long_reply(host, cmd);
  392. }
  393. }
  394. DBGF("Sent cmd (%x), res %d\n", cmd->opcode, cmd->error);
  395. }
  396. /*
  397. * Data functions
  398. */
  399. static void wbsd_empty_fifo(struct wbsd_host* host)
  400. {
  401. struct mmc_data* data = host->mrq->cmd->data;
  402. char* buffer;
  403. int i, fsr, fifo;
  404. /*
  405. * Handle excessive data.
  406. */
  407. if (data->bytes_xfered == host->size)
  408. return;
  409. buffer = wbsd_kmap_sg(host) + host->offset;
  410. /*
  411. * Drain the fifo. This has a tendency to loop longer
  412. * than the FIFO length (usually one block).
  413. */
  414. while (!((fsr = inb(host->base + WBSD_FSR)) & WBSD_FIFO_EMPTY))
  415. {
  416. /*
  417. * The size field in the FSR is broken so we have to
  418. * do some guessing.
  419. */
  420. if (fsr & WBSD_FIFO_FULL)
  421. fifo = 16;
  422. else if (fsr & WBSD_FIFO_FUTHRE)
  423. fifo = 8;
  424. else
  425. fifo = 1;
  426. for (i = 0;i < fifo;i++)
  427. {
  428. *buffer = inb(host->base + WBSD_DFR);
  429. buffer++;
  430. host->offset++;
  431. host->remain--;
  432. data->bytes_xfered++;
  433. /*
  434. * Transfer done?
  435. */
  436. if (data->bytes_xfered == host->size)
  437. {
  438. wbsd_kunmap_sg(host);
  439. return;
  440. }
  441. /*
  442. * End of scatter list entry?
  443. */
  444. if (host->remain == 0)
  445. {
  446. wbsd_kunmap_sg(host);
  447. /*
  448. * Get next entry. Check if last.
  449. */
  450. if (!wbsd_next_sg(host))
  451. {
  452. /*
  453. * We should never reach this point.
  454. * It means that we're trying to
  455. * transfer more blocks than can fit
  456. * into the scatter list.
  457. */
  458. BUG_ON(1);
  459. host->size = data->bytes_xfered;
  460. return;
  461. }
  462. buffer = wbsd_kmap_sg(host);
  463. }
  464. }
  465. }
  466. wbsd_kunmap_sg(host);
  467. /*
  468. * This is a very dirty hack to solve a
  469. * hardware problem. The chip doesn't trigger
  470. * FIFO threshold interrupts properly.
  471. */
  472. if ((host->size - data->bytes_xfered) < 16)
  473. tasklet_schedule(&host->fifo_tasklet);
  474. }
  475. static void wbsd_fill_fifo(struct wbsd_host* host)
  476. {
  477. struct mmc_data* data = host->mrq->cmd->data;
  478. char* buffer;
  479. int i, fsr, fifo;
  480. /*
  481. * Check that we aren't being called after the
  482. * entire buffer has been transfered.
  483. */
  484. if (data->bytes_xfered == host->size)
  485. return;
  486. buffer = wbsd_kmap_sg(host) + host->offset;
  487. /*
  488. * Fill the fifo. This has a tendency to loop longer
  489. * than the FIFO length (usually one block).
  490. */
  491. while (!((fsr = inb(host->base + WBSD_FSR)) & WBSD_FIFO_FULL))
  492. {
  493. /*
  494. * The size field in the FSR is broken so we have to
  495. * do some guessing.
  496. */
  497. if (fsr & WBSD_FIFO_EMPTY)
  498. fifo = 0;
  499. else if (fsr & WBSD_FIFO_EMTHRE)
  500. fifo = 8;
  501. else
  502. fifo = 15;
  503. for (i = 16;i > fifo;i--)
  504. {
  505. outb(*buffer, host->base + WBSD_DFR);
  506. buffer++;
  507. host->offset++;
  508. host->remain--;
  509. data->bytes_xfered++;
  510. /*
  511. * Transfer done?
  512. */
  513. if (data->bytes_xfered == host->size)
  514. {
  515. wbsd_kunmap_sg(host);
  516. return;
  517. }
  518. /*
  519. * End of scatter list entry?
  520. */
  521. if (host->remain == 0)
  522. {
  523. wbsd_kunmap_sg(host);
  524. /*
  525. * Get next entry. Check if last.
  526. */
  527. if (!wbsd_next_sg(host))
  528. {
  529. /*
  530. * We should never reach this point.
  531. * It means that we're trying to
  532. * transfer more blocks than can fit
  533. * into the scatter list.
  534. */
  535. BUG_ON(1);
  536. host->size = data->bytes_xfered;
  537. return;
  538. }
  539. buffer = wbsd_kmap_sg(host);
  540. }
  541. }
  542. }
  543. wbsd_kunmap_sg(host);
  544. }
  545. static void wbsd_prepare_data(struct wbsd_host* host, struct mmc_data* data)
  546. {
  547. u16 blksize;
  548. u8 setup;
  549. unsigned long dmaflags;
  550. DBGF("blksz %04x blks %04x flags %08x\n",
  551. 1 << data->blksz_bits, data->blocks, data->flags);
  552. DBGF("tsac %d ms nsac %d clk\n",
  553. data->timeout_ns / 1000000, data->timeout_clks);
  554. /*
  555. * Calculate size.
  556. */
  557. host->size = data->blocks << data->blksz_bits;
  558. /*
  559. * Check timeout values for overflow.
  560. * (Yes, some cards cause this value to overflow).
  561. */
  562. if (data->timeout_ns > 127000000)
  563. wbsd_write_index(host, WBSD_IDX_TAAC, 127);
  564. else
  565. wbsd_write_index(host, WBSD_IDX_TAAC, data->timeout_ns/1000000);
  566. if (data->timeout_clks > 255)
  567. wbsd_write_index(host, WBSD_IDX_NSAC, 255);
  568. else
  569. wbsd_write_index(host, WBSD_IDX_NSAC, data->timeout_clks);
  570. /*
  571. * Inform the chip of how large blocks will be
  572. * sent. It needs this to determine when to
  573. * calculate CRC.
  574. *
  575. * Space for CRC must be included in the size.
  576. */
  577. blksize = (1 << data->blksz_bits) + 2;
  578. wbsd_write_index(host, WBSD_IDX_PBSMSB, (blksize >> 4) & 0xF0);
  579. wbsd_write_index(host, WBSD_IDX_PBSLSB, blksize & 0xFF);
  580. /*
  581. * Clear the FIFO. This is needed even for DMA
  582. * transfers since the chip still uses the FIFO
  583. * internally.
  584. */
  585. setup = wbsd_read_index(host, WBSD_IDX_SETUP);
  586. setup |= WBSD_FIFO_RESET;
  587. wbsd_write_index(host, WBSD_IDX_SETUP, setup);
  588. /*
  589. * DMA transfer?
  590. */
  591. if (host->dma >= 0)
  592. {
  593. /*
  594. * The buffer for DMA is only 64 kB.
  595. */
  596. BUG_ON(host->size > 0x10000);
  597. if (host->size > 0x10000)
  598. {
  599. data->error = MMC_ERR_INVALID;
  600. return;
  601. }
  602. /*
  603. * Transfer data from the SG list to
  604. * the DMA buffer.
  605. */
  606. if (data->flags & MMC_DATA_WRITE)
  607. wbsd_sg_to_dma(host, data);
  608. /*
  609. * Initialise the ISA DMA controller.
  610. */
  611. dmaflags = claim_dma_lock();
  612. disable_dma(host->dma);
  613. clear_dma_ff(host->dma);
  614. if (data->flags & MMC_DATA_READ)
  615. set_dma_mode(host->dma, DMA_MODE_READ & ~0x40);
  616. else
  617. set_dma_mode(host->dma, DMA_MODE_WRITE & ~0x40);
  618. set_dma_addr(host->dma, host->dma_addr);
  619. set_dma_count(host->dma, host->size);
  620. enable_dma(host->dma);
  621. release_dma_lock(dmaflags);
  622. /*
  623. * Enable DMA on the host.
  624. */
  625. wbsd_write_index(host, WBSD_IDX_DMA, WBSD_DMA_ENABLE);
  626. }
  627. else
  628. {
  629. /*
  630. * This flag is used to keep printk
  631. * output to a minimum.
  632. */
  633. host->firsterr = 1;
  634. /*
  635. * Initialise the SG list.
  636. */
  637. wbsd_init_sg(host, data);
  638. /*
  639. * Turn off DMA.
  640. */
  641. wbsd_write_index(host, WBSD_IDX_DMA, 0);
  642. /*
  643. * Set up FIFO threshold levels (and fill
  644. * buffer if doing a write).
  645. */
  646. if (data->flags & MMC_DATA_READ)
  647. {
  648. wbsd_write_index(host, WBSD_IDX_FIFOEN,
  649. WBSD_FIFOEN_FULL | 8);
  650. }
  651. else
  652. {
  653. wbsd_write_index(host, WBSD_IDX_FIFOEN,
  654. WBSD_FIFOEN_EMPTY | 8);
  655. wbsd_fill_fifo(host);
  656. }
  657. }
  658. data->error = MMC_ERR_NONE;
  659. }
  660. static void wbsd_finish_data(struct wbsd_host* host, struct mmc_data* data)
  661. {
  662. unsigned long dmaflags;
  663. int count;
  664. u8 status;
  665. WARN_ON(host->mrq == NULL);
  666. /*
  667. * Send a stop command if needed.
  668. */
  669. if (data->stop)
  670. wbsd_send_command(host, data->stop);
  671. /*
  672. * Wait for the controller to leave data
  673. * transfer state.
  674. */
  675. do
  676. {
  677. status = wbsd_read_index(host, WBSD_IDX_STATUS);
  678. } while (status & (WBSD_BLOCK_READ | WBSD_BLOCK_WRITE));
  679. /*
  680. * DMA transfer?
  681. */
  682. if (host->dma >= 0)
  683. {
  684. /*
  685. * Disable DMA on the host.
  686. */
  687. wbsd_write_index(host, WBSD_IDX_DMA, 0);
  688. /*
  689. * Turn of ISA DMA controller.
  690. */
  691. dmaflags = claim_dma_lock();
  692. disable_dma(host->dma);
  693. clear_dma_ff(host->dma);
  694. count = get_dma_residue(host->dma);
  695. release_dma_lock(dmaflags);
  696. /*
  697. * Any leftover data?
  698. */
  699. if (count)
  700. {
  701. printk(KERN_ERR DRIVER_NAME ": Incomplete DMA "
  702. "transfer. %d bytes left.\n", count);
  703. data->error = MMC_ERR_FAILED;
  704. }
  705. else
  706. {
  707. /*
  708. * Transfer data from DMA buffer to
  709. * SG list.
  710. */
  711. if (data->flags & MMC_DATA_READ)
  712. wbsd_dma_to_sg(host, data);
  713. data->bytes_xfered = host->size;
  714. }
  715. }
  716. DBGF("Ending data transfer (%d bytes)\n", data->bytes_xfered);
  717. wbsd_request_end(host, host->mrq);
  718. }
  719. /*
  720. * MMC Callbacks
  721. */
  722. static void wbsd_request(struct mmc_host* mmc, struct mmc_request* mrq)
  723. {
  724. struct wbsd_host* host = mmc_priv(mmc);
  725. struct mmc_command* cmd;
  726. /*
  727. * Disable tasklets to avoid a deadlock.
  728. */
  729. spin_lock_bh(&host->lock);
  730. BUG_ON(host->mrq != NULL);
  731. cmd = mrq->cmd;
  732. host->mrq = mrq;
  733. /*
  734. * If there is no card in the slot then
  735. * timeout immediatly.
  736. */
  737. if (!(inb(host->base + WBSD_CSR) & WBSD_CARDPRESENT))
  738. {
  739. cmd->error = MMC_ERR_TIMEOUT;
  740. goto done;
  741. }
  742. /*
  743. * Does the request include data?
  744. */
  745. if (cmd->data)
  746. {
  747. wbsd_prepare_data(host, cmd->data);
  748. if (cmd->data->error != MMC_ERR_NONE)
  749. goto done;
  750. }
  751. wbsd_send_command(host, cmd);
  752. /*
  753. * If this is a data transfer the request
  754. * will be finished after the data has
  755. * transfered.
  756. */
  757. if (cmd->data && (cmd->error == MMC_ERR_NONE))
  758. {
  759. /*
  760. * Dirty fix for hardware bug.
  761. */
  762. if (host->dma == -1)
  763. tasklet_schedule(&host->fifo_tasklet);
  764. spin_unlock_bh(&host->lock);
  765. return;
  766. }
  767. done:
  768. wbsd_request_end(host, mrq);
  769. spin_unlock_bh(&host->lock);
  770. }
  771. static void wbsd_set_ios(struct mmc_host* mmc, struct mmc_ios* ios)
  772. {
  773. struct wbsd_host* host = mmc_priv(mmc);
  774. u8 clk, setup, pwr;
  775. DBGF("clock %uHz busmode %u powermode %u Vdd %u\n",
  776. ios->clock, ios->bus_mode, ios->power_mode, ios->vdd);
  777. spin_lock_bh(&host->lock);
  778. /*
  779. * Reset the chip on each power off.
  780. * Should clear out any weird states.
  781. */
  782. if (ios->power_mode == MMC_POWER_OFF)
  783. wbsd_init_device(host);
  784. if (ios->clock >= 24000000)
  785. clk = WBSD_CLK_24M;
  786. else if (ios->clock >= 16000000)
  787. clk = WBSD_CLK_16M;
  788. else if (ios->clock >= 12000000)
  789. clk = WBSD_CLK_12M;
  790. else
  791. clk = WBSD_CLK_375K;
  792. /*
  793. * Only write to the clock register when
  794. * there is an actual change.
  795. */
  796. if (clk != host->clk)
  797. {
  798. wbsd_write_index(host, WBSD_IDX_CLK, clk);
  799. host->clk = clk;
  800. }
  801. if (ios->power_mode != MMC_POWER_OFF)
  802. {
  803. /*
  804. * Power up card.
  805. */
  806. pwr = inb(host->base + WBSD_CSR);
  807. pwr &= ~WBSD_POWER_N;
  808. outb(pwr, host->base + WBSD_CSR);
  809. /*
  810. * This behaviour is stolen from the
  811. * Windows driver. Don't know why, but
  812. * it is needed.
  813. */
  814. setup = wbsd_read_index(host, WBSD_IDX_SETUP);
  815. if (ios->bus_mode == MMC_BUSMODE_OPENDRAIN)
  816. setup |= WBSD_DAT3_H;
  817. else
  818. setup &= ~WBSD_DAT3_H;
  819. wbsd_write_index(host, WBSD_IDX_SETUP, setup);
  820. mdelay(1);
  821. }
  822. spin_unlock_bh(&host->lock);
  823. }
  824. /*
  825. * Tasklets
  826. */
  827. inline static struct mmc_data* wbsd_get_data(struct wbsd_host* host)
  828. {
  829. WARN_ON(!host->mrq);
  830. if (!host->mrq)
  831. return NULL;
  832. WARN_ON(!host->mrq->cmd);
  833. if (!host->mrq->cmd)
  834. return NULL;
  835. WARN_ON(!host->mrq->cmd->data);
  836. if (!host->mrq->cmd->data)
  837. return NULL;
  838. return host->mrq->cmd->data;
  839. }
  840. static void wbsd_tasklet_card(unsigned long param)
  841. {
  842. struct wbsd_host* host = (struct wbsd_host*)param;
  843. u8 csr;
  844. spin_lock(&host->lock);
  845. csr = inb(host->base + WBSD_CSR);
  846. WARN_ON(csr == 0xff);
  847. if (csr & WBSD_CARDPRESENT)
  848. DBG("Card inserted\n");
  849. else
  850. {
  851. DBG("Card removed\n");
  852. if (host->mrq)
  853. {
  854. printk(KERN_ERR DRIVER_NAME
  855. ": Card removed during transfer!\n");
  856. wbsd_reset(host);
  857. host->mrq->cmd->error = MMC_ERR_FAILED;
  858. tasklet_schedule(&host->finish_tasklet);
  859. }
  860. }
  861. /*
  862. * Unlock first since we might get a call back.
  863. */
  864. spin_unlock(&host->lock);
  865. mmc_detect_change(host->mmc);
  866. }
  867. static void wbsd_tasklet_fifo(unsigned long param)
  868. {
  869. struct wbsd_host* host = (struct wbsd_host*)param;
  870. struct mmc_data* data;
  871. spin_lock(&host->lock);
  872. if (!host->mrq)
  873. goto end;
  874. data = wbsd_get_data(host);
  875. if (!data)
  876. goto end;
  877. if (data->flags & MMC_DATA_WRITE)
  878. wbsd_fill_fifo(host);
  879. else
  880. wbsd_empty_fifo(host);
  881. /*
  882. * Done?
  883. */
  884. if (host->size == data->bytes_xfered)
  885. {
  886. wbsd_write_index(host, WBSD_IDX_FIFOEN, 0);
  887. tasklet_schedule(&host->finish_tasklet);
  888. }
  889. end:
  890. spin_unlock(&host->lock);
  891. }
  892. static void wbsd_tasklet_crc(unsigned long param)
  893. {
  894. struct wbsd_host* host = (struct wbsd_host*)param;
  895. struct mmc_data* data;
  896. spin_lock(&host->lock);
  897. if (!host->mrq)
  898. goto end;
  899. data = wbsd_get_data(host);
  900. if (!data)
  901. goto end;
  902. DBGF("CRC error\n");
  903. data->error = MMC_ERR_BADCRC;
  904. tasklet_schedule(&host->finish_tasklet);
  905. end:
  906. spin_unlock(&host->lock);
  907. }
  908. static void wbsd_tasklet_timeout(unsigned long param)
  909. {
  910. struct wbsd_host* host = (struct wbsd_host*)param;
  911. struct mmc_data* data;
  912. spin_lock(&host->lock);
  913. if (!host->mrq)
  914. goto end;
  915. data = wbsd_get_data(host);
  916. if (!data)
  917. goto end;
  918. DBGF("Timeout\n");
  919. data->error = MMC_ERR_TIMEOUT;
  920. tasklet_schedule(&host->finish_tasklet);
  921. end:
  922. spin_unlock(&host->lock);
  923. }
  924. static void wbsd_tasklet_finish(unsigned long param)
  925. {
  926. struct wbsd_host* host = (struct wbsd_host*)param;
  927. struct mmc_data* data;
  928. spin_lock(&host->lock);
  929. WARN_ON(!host->mrq);
  930. if (!host->mrq)
  931. goto end;
  932. data = wbsd_get_data(host);
  933. if (!data)
  934. goto end;
  935. wbsd_finish_data(host, data);
  936. end:
  937. spin_unlock(&host->lock);
  938. }
  939. static void wbsd_tasklet_block(unsigned long param)
  940. {
  941. struct wbsd_host* host = (struct wbsd_host*)param;
  942. struct mmc_data* data;
  943. spin_lock(&host->lock);
  944. if ((wbsd_read_index(host, WBSD_IDX_CRCSTATUS) & WBSD_CRC_MASK) !=
  945. WBSD_CRC_OK)
  946. {
  947. data = wbsd_get_data(host);
  948. if (!data)
  949. goto end;
  950. DBGF("CRC error\n");
  951. data->error = MMC_ERR_BADCRC;
  952. tasklet_schedule(&host->finish_tasklet);
  953. }
  954. end:
  955. spin_unlock(&host->lock);
  956. }
  957. /*
  958. * Interrupt handling
  959. */
  960. static irqreturn_t wbsd_irq(int irq, void *dev_id, struct pt_regs *regs)
  961. {
  962. struct wbsd_host* host = dev_id;
  963. int isr;
  964. isr = inb(host->base + WBSD_ISR);
  965. /*
  966. * Was it actually our hardware that caused the interrupt?
  967. */
  968. if (isr == 0xff || isr == 0x00)
  969. return IRQ_NONE;
  970. host->isr |= isr;
  971. /*
  972. * Schedule tasklets as needed.
  973. */
  974. if (isr & WBSD_INT_CARD)
  975. tasklet_schedule(&host->card_tasklet);
  976. if (isr & WBSD_INT_FIFO_THRE)
  977. tasklet_schedule(&host->fifo_tasklet);
  978. if (isr & WBSD_INT_CRC)
  979. tasklet_hi_schedule(&host->crc_tasklet);
  980. if (isr & WBSD_INT_TIMEOUT)
  981. tasklet_hi_schedule(&host->timeout_tasklet);
  982. if (isr & WBSD_INT_BUSYEND)
  983. tasklet_hi_schedule(&host->block_tasklet);
  984. if (isr & WBSD_INT_TC)
  985. tasklet_schedule(&host->finish_tasklet);
  986. return IRQ_HANDLED;
  987. }
  988. /*
  989. * Support functions for probe
  990. */
  991. static int wbsd_scan(struct wbsd_host* host)
  992. {
  993. int i, j, k;
  994. int id;
  995. /*
  996. * Iterate through all ports, all codes to
  997. * find hardware that is in our known list.
  998. */
  999. for (i = 0;i < sizeof(config_ports)/sizeof(int);i++)
  1000. {
  1001. if (!request_region(config_ports[i], 2, DRIVER_NAME))
  1002. continue;
  1003. for (j = 0;j < sizeof(unlock_codes)/sizeof(int);j++)
  1004. {
  1005. id = 0xFFFF;
  1006. outb(unlock_codes[j], config_ports[i]);
  1007. outb(unlock_codes[j], config_ports[i]);
  1008. outb(WBSD_CONF_ID_HI, config_ports[i]);
  1009. id = inb(config_ports[i] + 1) << 8;
  1010. outb(WBSD_CONF_ID_LO, config_ports[i]);
  1011. id |= inb(config_ports[i] + 1);
  1012. for (k = 0;k < sizeof(valid_ids)/sizeof(int);k++)
  1013. {
  1014. if (id == valid_ids[k])
  1015. {
  1016. host->chip_id = id;
  1017. host->config = config_ports[i];
  1018. host->unlock_code = unlock_codes[i];
  1019. return 0;
  1020. }
  1021. }
  1022. if (id != 0xFFFF)
  1023. {
  1024. DBG("Unknown hardware (id %x) found at %x\n",
  1025. id, config_ports[i]);
  1026. }
  1027. outb(LOCK_CODE, config_ports[i]);
  1028. }
  1029. release_region(config_ports[i], 2);
  1030. }
  1031. return -ENODEV;
  1032. }
  1033. static int wbsd_request_regions(struct wbsd_host* host)
  1034. {
  1035. if (io & 0x7)
  1036. return -EINVAL;
  1037. if (!request_region(io, 8, DRIVER_NAME))
  1038. return -EIO;
  1039. host->base = io;
  1040. return 0;
  1041. }
  1042. static void wbsd_release_regions(struct wbsd_host* host)
  1043. {
  1044. if (host->base)
  1045. release_region(host->base, 8);
  1046. if (host->config)
  1047. release_region(host->config, 2);
  1048. }
  1049. static void wbsd_init_dma(struct wbsd_host* host)
  1050. {
  1051. host->dma = -1;
  1052. if (dma < 0)
  1053. return;
  1054. if (request_dma(dma, DRIVER_NAME))
  1055. goto err;
  1056. /*
  1057. * We need to allocate a special buffer in
  1058. * order for ISA to be able to DMA to it.
  1059. */
  1060. host->dma_buffer = kmalloc(65536,
  1061. GFP_NOIO | GFP_DMA | __GFP_REPEAT | __GFP_NOWARN);
  1062. if (!host->dma_buffer)
  1063. goto free;
  1064. /*
  1065. * Translate the address to a physical address.
  1066. */
  1067. host->dma_addr = isa_virt_to_bus(host->dma_buffer);
  1068. /*
  1069. * ISA DMA must be aligned on a 64k basis.
  1070. */
  1071. if ((host->dma_addr & 0xffff) != 0)
  1072. goto kfree;
  1073. /*
  1074. * ISA cannot access memory above 16 MB.
  1075. */
  1076. else if (host->dma_addr >= 0x1000000)
  1077. goto kfree;
  1078. host->dma = dma;
  1079. return;
  1080. kfree:
  1081. /*
  1082. * If we've gotten here then there is some kind of alignment bug
  1083. */
  1084. BUG_ON(1);
  1085. kfree(host->dma_buffer);
  1086. host->dma_buffer = NULL;
  1087. free:
  1088. free_dma(dma);
  1089. err:
  1090. printk(KERN_WARNING DRIVER_NAME ": Unable to allocate DMA %d. "
  1091. "Falling back on FIFO.\n", dma);
  1092. }
  1093. static struct mmc_host_ops wbsd_ops = {
  1094. .request = wbsd_request,
  1095. .set_ios = wbsd_set_ios,
  1096. };
  1097. /*
  1098. * Device probe
  1099. */
  1100. static int wbsd_probe(struct device* dev)
  1101. {
  1102. struct wbsd_host* host = NULL;
  1103. struct mmc_host* mmc = NULL;
  1104. int ret;
  1105. /*
  1106. * Allocate MMC structure.
  1107. */
  1108. mmc = mmc_alloc_host(sizeof(struct wbsd_host), dev);
  1109. if (!mmc)
  1110. return -ENOMEM;
  1111. host = mmc_priv(mmc);
  1112. host->mmc = mmc;
  1113. /*
  1114. * Scan for hardware.
  1115. */
  1116. ret = wbsd_scan(host);
  1117. if (ret)
  1118. goto freemmc;
  1119. /*
  1120. * Reset the chip.
  1121. */
  1122. wbsd_write_config(host, WBSD_CONF_SWRST, 1);
  1123. wbsd_write_config(host, WBSD_CONF_SWRST, 0);
  1124. /*
  1125. * Allocate I/O ports.
  1126. */
  1127. ret = wbsd_request_regions(host);
  1128. if (ret)
  1129. goto release;
  1130. /*
  1131. * Set host parameters.
  1132. */
  1133. mmc->ops = &wbsd_ops;
  1134. mmc->f_min = 375000;
  1135. mmc->f_max = 24000000;
  1136. mmc->ocr_avail = MMC_VDD_32_33|MMC_VDD_33_34;
  1137. spin_lock_init(&host->lock);
  1138. /*
  1139. * Select SD/MMC function.
  1140. */
  1141. wbsd_write_config(host, WBSD_CONF_DEVICE, DEVICE_SD);
  1142. /*
  1143. * Set up card detection.
  1144. */
  1145. wbsd_write_config(host, WBSD_CONF_PINS, 0x02);
  1146. /*
  1147. * Configure I/O port.
  1148. */
  1149. wbsd_write_config(host, WBSD_CONF_PORT_HI, host->base >> 8);
  1150. wbsd_write_config(host, WBSD_CONF_PORT_LO, host->base & 0xff);
  1151. /*
  1152. * Allocate interrupt.
  1153. */
  1154. ret = request_irq(irq, wbsd_irq, SA_SHIRQ, DRIVER_NAME, host);
  1155. if (ret)
  1156. goto release;
  1157. host->irq = irq;
  1158. /*
  1159. * Set up tasklets.
  1160. */
  1161. tasklet_init(&host->card_tasklet, wbsd_tasklet_card, (unsigned long)host);
  1162. tasklet_init(&host->fifo_tasklet, wbsd_tasklet_fifo, (unsigned long)host);
  1163. tasklet_init(&host->crc_tasklet, wbsd_tasklet_crc, (unsigned long)host);
  1164. tasklet_init(&host->timeout_tasklet, wbsd_tasklet_timeout, (unsigned long)host);
  1165. tasklet_init(&host->finish_tasklet, wbsd_tasklet_finish, (unsigned long)host);
  1166. tasklet_init(&host->block_tasklet, wbsd_tasklet_block, (unsigned long)host);
  1167. /*
  1168. * Configure interrupt.
  1169. */
  1170. wbsd_write_config(host, WBSD_CONF_IRQ, host->irq);
  1171. /*
  1172. * Allocate DMA.
  1173. */
  1174. wbsd_init_dma(host);
  1175. /*
  1176. * If all went well, then configure DMA.
  1177. */
  1178. if (host->dma >= 0)
  1179. wbsd_write_config(host, WBSD_CONF_DRQ, host->dma);
  1180. /*
  1181. * Maximum number of segments. Worst case is one sector per segment
  1182. * so this will be 64kB/512.
  1183. */
  1184. mmc->max_hw_segs = 128;
  1185. mmc->max_phys_segs = 128;
  1186. /*
  1187. * Maximum number of sectors in one transfer. Also limited by 64kB
  1188. * buffer.
  1189. */
  1190. mmc->max_sectors = 128;
  1191. /*
  1192. * Maximum segment size. Could be one segment with the maximum number
  1193. * of segments.
  1194. */
  1195. mmc->max_seg_size = mmc->max_sectors * 512;
  1196. /*
  1197. * Enable chip.
  1198. */
  1199. wbsd_write_config(host, WBSD_CONF_ENABLE, 1);
  1200. /*
  1201. * Power up chip.
  1202. */
  1203. wbsd_write_config(host, WBSD_CONF_POWER, 0x20);
  1204. /*
  1205. * Power Management stuff. No idea how this works.
  1206. * Not tested.
  1207. */
  1208. #ifdef CONFIG_PM
  1209. wbsd_write_config(host, WBSD_CONF_PME, 0xA0);
  1210. #endif
  1211. /*
  1212. * Reset the chip into a known state.
  1213. */
  1214. wbsd_init_device(host);
  1215. dev_set_drvdata(dev, mmc);
  1216. /*
  1217. * Add host to MMC layer.
  1218. */
  1219. mmc_add_host(mmc);
  1220. printk(KERN_INFO "%s: W83L51xD id %x at 0x%x irq %d dma %d\n",
  1221. mmc->host_name, (int)host->chip_id, (int)host->base,
  1222. (int)host->irq, (int)host->dma);
  1223. return 0;
  1224. release:
  1225. wbsd_release_regions(host);
  1226. freemmc:
  1227. mmc_free_host(mmc);
  1228. return ret;
  1229. }
  1230. /*
  1231. * Device remove
  1232. */
  1233. static int wbsd_remove(struct device* dev)
  1234. {
  1235. struct mmc_host* mmc = dev_get_drvdata(dev);
  1236. struct wbsd_host* host;
  1237. if (!mmc)
  1238. return 0;
  1239. host = mmc_priv(mmc);
  1240. /*
  1241. * Unregister host with MMC layer.
  1242. */
  1243. mmc_remove_host(mmc);
  1244. /*
  1245. * Power down the SD/MMC function.
  1246. */
  1247. wbsd_unlock_config(host);
  1248. wbsd_write_config(host, WBSD_CONF_DEVICE, DEVICE_SD);
  1249. wbsd_write_config(host, WBSD_CONF_ENABLE, 0);
  1250. wbsd_lock_config(host);
  1251. /*
  1252. * Free resources.
  1253. */
  1254. if (host->dma_buffer)
  1255. kfree(host->dma_buffer);
  1256. if (host->dma >= 0)
  1257. free_dma(host->dma);
  1258. free_irq(host->irq, host);
  1259. tasklet_kill(&host->card_tasklet);
  1260. tasklet_kill(&host->fifo_tasklet);
  1261. tasklet_kill(&host->crc_tasklet);
  1262. tasklet_kill(&host->timeout_tasklet);
  1263. tasklet_kill(&host->finish_tasklet);
  1264. tasklet_kill(&host->block_tasklet);
  1265. wbsd_release_regions(host);
  1266. mmc_free_host(mmc);
  1267. return 0;
  1268. }
  1269. /*
  1270. * Power management
  1271. */
  1272. #ifdef CONFIG_PM
  1273. static int wbsd_suspend(struct device *dev, pm_message_t state, u32 level)
  1274. {
  1275. DBGF("Not yet supported\n");
  1276. return 0;
  1277. }
  1278. static int wbsd_resume(struct device *dev, u32 level)
  1279. {
  1280. DBGF("Not yet supported\n");
  1281. return 0;
  1282. }
  1283. #else
  1284. #define wbsd_suspend NULL
  1285. #define wbsd_resume NULL
  1286. #endif
  1287. static void wbsd_release(struct device *dev)
  1288. {
  1289. }
  1290. static struct platform_device wbsd_device = {
  1291. .name = DRIVER_NAME,
  1292. .id = -1,
  1293. .dev = {
  1294. .release = wbsd_release,
  1295. },
  1296. };
  1297. static struct device_driver wbsd_driver = {
  1298. .name = DRIVER_NAME,
  1299. .bus = &platform_bus_type,
  1300. .probe = wbsd_probe,
  1301. .remove = wbsd_remove,
  1302. .suspend = wbsd_suspend,
  1303. .resume = wbsd_resume,
  1304. };
  1305. /*
  1306. * Module loading/unloading
  1307. */
  1308. static int __init wbsd_drv_init(void)
  1309. {
  1310. int result;
  1311. printk(KERN_INFO DRIVER_NAME
  1312. ": Winbond W83L51xD SD/MMC card interface driver, "
  1313. DRIVER_VERSION "\n");
  1314. printk(KERN_INFO DRIVER_NAME ": Copyright(c) Pierre Ossman\n");
  1315. result = driver_register(&wbsd_driver);
  1316. if (result < 0)
  1317. return result;
  1318. result = platform_device_register(&wbsd_device);
  1319. if (result < 0)
  1320. return result;
  1321. return 0;
  1322. }
  1323. static void __exit wbsd_drv_exit(void)
  1324. {
  1325. platform_device_unregister(&wbsd_device);
  1326. driver_unregister(&wbsd_driver);
  1327. DBG("unloaded\n");
  1328. }
  1329. module_init(wbsd_drv_init);
  1330. module_exit(wbsd_drv_exit);
  1331. module_param(io, uint, 0444);
  1332. module_param(irq, uint, 0444);
  1333. module_param(dma, int, 0444);
  1334. MODULE_LICENSE("GPL");
  1335. MODULE_DESCRIPTION("Winbond W83L51xD SD/MMC card interface driver");
  1336. MODULE_VERSION(DRIVER_VERSION);
  1337. MODULE_PARM_DESC(io, "I/O base to allocate. Must be 8 byte aligned. (default 0x248)");
  1338. MODULE_PARM_DESC(irq, "IRQ to allocate. (default 6)");
  1339. MODULE_PARM_DESC(dma, "DMA channel to allocate. -1 for no DMA. (default 2)");