pci.c 13 KB

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  1. /*
  2. * PCI handling of I2O controller
  3. *
  4. * Copyright (C) 1999-2002 Red Hat Software
  5. *
  6. * Written by Alan Cox, Building Number Three Ltd
  7. *
  8. * This program is free software; you can redistribute it and/or modify it
  9. * under the terms of the GNU General Public License as published by the
  10. * Free Software Foundation; either version 2 of the License, or (at your
  11. * option) any later version.
  12. *
  13. * A lot of the I2O message side code from this is taken from the Red
  14. * Creek RCPCI45 adapter driver by Red Creek Communications
  15. *
  16. * Fixes/additions:
  17. * Philipp Rumpf
  18. * Juha Sievänen <Juha.Sievanen@cs.Helsinki.FI>
  19. * Auvo Häkkinen <Auvo.Hakkinen@cs.Helsinki.FI>
  20. * Deepak Saxena <deepak@plexity.net>
  21. * Boji T Kannanthanam <boji.t.kannanthanam@intel.com>
  22. * Alan Cox <alan@redhat.com>:
  23. * Ported to Linux 2.5.
  24. * Markus Lidel <Markus.Lidel@shadowconnect.com>:
  25. * Minor fixes for 2.6.
  26. * Markus Lidel <Markus.Lidel@shadowconnect.com>:
  27. * Support for sysfs included.
  28. */
  29. #include <linux/pci.h>
  30. #include <linux/interrupt.h>
  31. #include <linux/i2o.h>
  32. #ifdef CONFIG_MTRR
  33. #include <asm/mtrr.h>
  34. #endif // CONFIG_MTRR
  35. /* Module internal functions from other sources */
  36. extern struct i2o_controller *i2o_iop_alloc(void);
  37. extern void i2o_iop_free(struct i2o_controller *);
  38. extern int i2o_iop_add(struct i2o_controller *);
  39. extern void i2o_iop_remove(struct i2o_controller *);
  40. extern int i2o_driver_dispatch(struct i2o_controller *, u32,
  41. struct i2o_message *);
  42. /* PCI device id table for all I2O controllers */
  43. static struct pci_device_id __devinitdata i2o_pci_ids[] = {
  44. {PCI_DEVICE_CLASS(PCI_CLASS_INTELLIGENT_I2O << 8, 0xffff00)},
  45. {PCI_DEVICE(PCI_VENDOR_ID_DPT, 0xa511)},
  46. {0}
  47. };
  48. /**
  49. * i2o_dma_realloc - Realloc DMA memory
  50. * @dev: struct device pointer to the PCI device of the I2O controller
  51. * @addr: pointer to a i2o_dma struct DMA buffer
  52. * @len: new length of memory
  53. * @gfp_mask: GFP mask
  54. *
  55. * If there was something allocated in the addr, free it first. If len > 0
  56. * than try to allocate it and write the addresses back to the addr
  57. * structure. If len == 0 set the virtual address to NULL.
  58. *
  59. * Returns the 0 on success or negative error code on failure.
  60. */
  61. int i2o_dma_realloc(struct device *dev, struct i2o_dma *addr, size_t len,
  62. unsigned int gfp_mask)
  63. {
  64. i2o_dma_free(dev, addr);
  65. if (len)
  66. return i2o_dma_alloc(dev, addr, len, gfp_mask);
  67. return 0;
  68. };
  69. /**
  70. * i2o_pci_free - Frees the DMA memory for the I2O controller
  71. * @c: I2O controller to free
  72. *
  73. * Remove all allocated DMA memory and unmap memory IO regions. If MTRR
  74. * is enabled, also remove it again.
  75. */
  76. static void i2o_pci_free(struct i2o_controller *c)
  77. {
  78. struct device *dev;
  79. dev = &c->pdev->dev;
  80. i2o_dma_free(dev, &c->out_queue);
  81. i2o_dma_free(dev, &c->status_block);
  82. if (c->lct)
  83. kfree(c->lct);
  84. i2o_dma_free(dev, &c->dlct);
  85. i2o_dma_free(dev, &c->hrt);
  86. i2o_dma_free(dev, &c->status);
  87. #ifdef CONFIG_MTRR
  88. if (c->mtrr_reg0 >= 0)
  89. mtrr_del(c->mtrr_reg0, 0, 0);
  90. if (c->mtrr_reg1 >= 0)
  91. mtrr_del(c->mtrr_reg1, 0, 0);
  92. #endif
  93. if (c->raptor && c->in_queue.virt)
  94. iounmap(c->in_queue.virt);
  95. if (c->base.virt)
  96. iounmap(c->base.virt);
  97. }
  98. /**
  99. * i2o_pci_alloc - Allocate DMA memory, map IO memory for I2O controller
  100. * @c: I2O controller
  101. *
  102. * Allocate DMA memory for a PCI (or in theory AGP) I2O controller. All
  103. * IO mappings are also done here. If MTRR is enabled, also do add memory
  104. * regions here.
  105. *
  106. * Returns 0 on success or negative error code on failure.
  107. */
  108. static int __devinit i2o_pci_alloc(struct i2o_controller *c)
  109. {
  110. struct pci_dev *pdev = c->pdev;
  111. struct device *dev = &pdev->dev;
  112. int i;
  113. for (i = 0; i < 6; i++) {
  114. /* Skip I/O spaces */
  115. if (!(pci_resource_flags(pdev, i) & IORESOURCE_IO)) {
  116. if (!c->base.phys) {
  117. c->base.phys = pci_resource_start(pdev, i);
  118. c->base.len = pci_resource_len(pdev, i);
  119. /*
  120. * If we know what card it is, set the size
  121. * correctly. Code is taken from dpt_i2o.c
  122. */
  123. if (pdev->device == 0xa501) {
  124. if (pdev->subsystem_device >= 0xc032 &&
  125. pdev->subsystem_device <= 0xc03b) {
  126. if (c->base.len > 0x400000)
  127. c->base.len = 0x400000;
  128. } else {
  129. if (c->base.len > 0x100000)
  130. c->base.len = 0x100000;
  131. }
  132. }
  133. if (!c->raptor)
  134. break;
  135. } else {
  136. c->in_queue.phys = pci_resource_start(pdev, i);
  137. c->in_queue.len = pci_resource_len(pdev, i);
  138. break;
  139. }
  140. }
  141. }
  142. if (i == 6) {
  143. printk(KERN_ERR "%s: I2O controller has no memory regions"
  144. " defined.\n", c->name);
  145. i2o_pci_free(c);
  146. return -EINVAL;
  147. }
  148. /* Map the I2O controller */
  149. if (c->raptor) {
  150. printk(KERN_INFO "%s: PCI I2O controller\n", c->name);
  151. printk(KERN_INFO " BAR0 at 0x%08lX size=%ld\n",
  152. (unsigned long)c->base.phys, (unsigned long)c->base.len);
  153. printk(KERN_INFO " BAR1 at 0x%08lX size=%ld\n",
  154. (unsigned long)c->in_queue.phys,
  155. (unsigned long)c->in_queue.len);
  156. } else
  157. printk(KERN_INFO "%s: PCI I2O controller at %08lX size=%ld\n",
  158. c->name, (unsigned long)c->base.phys,
  159. (unsigned long)c->base.len);
  160. c->base.virt = ioremap(c->base.phys, c->base.len);
  161. if (!c->base.virt) {
  162. printk(KERN_ERR "%s: Unable to map controller.\n", c->name);
  163. return -ENOMEM;
  164. }
  165. if (c->raptor) {
  166. c->in_queue.virt = ioremap(c->in_queue.phys, c->in_queue.len);
  167. if (!c->in_queue.virt) {
  168. printk(KERN_ERR "%s: Unable to map controller.\n",
  169. c->name);
  170. i2o_pci_free(c);
  171. return -ENOMEM;
  172. }
  173. } else
  174. c->in_queue = c->base;
  175. c->irq_mask = c->base.virt + 0x34;
  176. c->post_port = c->base.virt + 0x40;
  177. c->reply_port = c->base.virt + 0x44;
  178. #ifdef CONFIG_MTRR
  179. /* Enable Write Combining MTRR for IOP's memory region */
  180. c->mtrr_reg0 = mtrr_add(c->in_queue.phys, c->in_queue.len,
  181. MTRR_TYPE_WRCOMB, 1);
  182. c->mtrr_reg1 = -1;
  183. if (c->mtrr_reg0 < 0)
  184. printk(KERN_WARNING "%s: could not enable write combining "
  185. "MTRR\n", c->name);
  186. else
  187. printk(KERN_INFO "%s: using write combining MTRR\n", c->name);
  188. /*
  189. * If it is an INTEL i960 I/O processor then set the first 64K to
  190. * Uncacheable since the region contains the messaging unit which
  191. * shouldn't be cached.
  192. */
  193. if ((pdev->vendor == PCI_VENDOR_ID_INTEL ||
  194. pdev->vendor == PCI_VENDOR_ID_DPT) && !c->raptor) {
  195. printk(KERN_INFO "%s: MTRR workaround for Intel i960 processor"
  196. "\n", c->name);
  197. c->mtrr_reg1 = mtrr_add(c->base.phys, 0x10000,
  198. MTRR_TYPE_UNCACHABLE, 1);
  199. if (c->mtrr_reg1 < 0) {
  200. printk(KERN_WARNING "%s: Error in setting "
  201. "MTRR_TYPE_UNCACHABLE\n", c->name);
  202. mtrr_del(c->mtrr_reg0, c->in_queue.phys,
  203. c->in_queue.len);
  204. c->mtrr_reg0 = -1;
  205. }
  206. }
  207. #endif
  208. if (i2o_dma_alloc(dev, &c->status, 8, GFP_KERNEL)) {
  209. i2o_pci_free(c);
  210. return -ENOMEM;
  211. }
  212. if (i2o_dma_alloc(dev, &c->hrt, sizeof(i2o_hrt), GFP_KERNEL)) {
  213. i2o_pci_free(c);
  214. return -ENOMEM;
  215. }
  216. if (i2o_dma_alloc(dev, &c->dlct, 8192, GFP_KERNEL)) {
  217. i2o_pci_free(c);
  218. return -ENOMEM;
  219. }
  220. if (i2o_dma_alloc(dev, &c->status_block, sizeof(i2o_status_block),
  221. GFP_KERNEL)) {
  222. i2o_pci_free(c);
  223. return -ENOMEM;
  224. }
  225. if (i2o_dma_alloc(dev, &c->out_queue, MSG_POOL_SIZE, GFP_KERNEL)) {
  226. i2o_pci_free(c);
  227. return -ENOMEM;
  228. }
  229. pci_set_drvdata(pdev, c);
  230. return 0;
  231. }
  232. /**
  233. * i2o_pci_interrupt - Interrupt handler for I2O controller
  234. * @irq: interrupt line
  235. * @dev_id: pointer to the I2O controller
  236. * @r: pointer to registers
  237. *
  238. * Handle an interrupt from a PCI based I2O controller. This turns out
  239. * to be rather simple. We keep the controller pointer in the cookie.
  240. */
  241. static irqreturn_t i2o_pci_interrupt(int irq, void *dev_id, struct pt_regs *r)
  242. {
  243. struct i2o_controller *c = dev_id;
  244. struct device *dev = &c->pdev->dev;
  245. struct i2o_message *m;
  246. u32 mv;
  247. /*
  248. * Old 960 steppings had a bug in the I2O unit that caused
  249. * the queue to appear empty when it wasn't.
  250. */
  251. mv = I2O_REPLY_READ32(c);
  252. if (mv == I2O_QUEUE_EMPTY) {
  253. mv = I2O_REPLY_READ32(c);
  254. if (unlikely(mv == I2O_QUEUE_EMPTY)) {
  255. return IRQ_NONE;
  256. } else
  257. pr_debug("%s: 960 bug detected\n", c->name);
  258. }
  259. while (mv != I2O_QUEUE_EMPTY) {
  260. /*
  261. * Map the message from the page frame map to kernel virtual.
  262. * Because bus_to_virt is deprecated, we have calculate the
  263. * location by ourself!
  264. */
  265. m = i2o_msg_out_to_virt(c, mv);
  266. /*
  267. * Ensure this message is seen coherently but cachably by
  268. * the processor
  269. */
  270. dma_sync_single_for_cpu(dev, mv, MSG_FRAME_SIZE * 4,
  271. PCI_DMA_FROMDEVICE);
  272. /* dispatch it */
  273. if (i2o_driver_dispatch(c, mv, m))
  274. /* flush it if result != 0 */
  275. i2o_flush_reply(c, mv);
  276. /*
  277. * That 960 bug again...
  278. */
  279. mv = I2O_REPLY_READ32(c);
  280. if (mv == I2O_QUEUE_EMPTY)
  281. mv = I2O_REPLY_READ32(c);
  282. }
  283. return IRQ_HANDLED;
  284. }
  285. /**
  286. * i2o_pci_irq_enable - Allocate interrupt for I2O controller
  287. *
  288. * Allocate an interrupt for the I2O controller, and activate interrupts
  289. * on the I2O controller.
  290. *
  291. * Returns 0 on success or negative error code on failure.
  292. */
  293. static int i2o_pci_irq_enable(struct i2o_controller *c)
  294. {
  295. struct pci_dev *pdev = c->pdev;
  296. int rc;
  297. I2O_IRQ_WRITE32(c, 0xffffffff);
  298. if (pdev->irq) {
  299. rc = request_irq(pdev->irq, i2o_pci_interrupt, SA_SHIRQ,
  300. c->name, c);
  301. if (rc < 0) {
  302. printk(KERN_ERR "%s: unable to allocate interrupt %d."
  303. "\n", c->name, pdev->irq);
  304. return rc;
  305. }
  306. }
  307. I2O_IRQ_WRITE32(c, 0x00000000);
  308. printk(KERN_INFO "%s: Installed at IRQ %d\n", c->name, pdev->irq);
  309. return 0;
  310. }
  311. /**
  312. * i2o_pci_irq_disable - Free interrupt for I2O controller
  313. * @c: I2O controller
  314. *
  315. * Disable interrupts in I2O controller and then free interrupt.
  316. */
  317. static void i2o_pci_irq_disable(struct i2o_controller *c)
  318. {
  319. I2O_IRQ_WRITE32(c, 0xffffffff);
  320. if (c->pdev->irq > 0)
  321. free_irq(c->pdev->irq, c);
  322. }
  323. /**
  324. * i2o_pci_probe - Probe the PCI device for an I2O controller
  325. * @dev: PCI device to test
  326. * @id: id which matched with the PCI device id table
  327. *
  328. * Probe the PCI device for any device which is a memory of the
  329. * Intelligent, I2O class or an Adaptec Zero Channel Controller. We
  330. * attempt to set up each such device and register it with the core.
  331. *
  332. * Returns 0 on success or negative error code on failure.
  333. */
  334. static int __devinit i2o_pci_probe(struct pci_dev *pdev,
  335. const struct pci_device_id *id)
  336. {
  337. struct i2o_controller *c;
  338. int rc;
  339. printk(KERN_INFO "i2o: Checking for PCI I2O controllers...\n");
  340. if ((pdev->class & 0xff) > 1) {
  341. printk(KERN_WARNING "i2o: I2O controller found but does not "
  342. "support I2O 1.5 (skipping).\n");
  343. return -ENODEV;
  344. }
  345. if ((rc = pci_enable_device(pdev))) {
  346. printk(KERN_WARNING "i2o: I2O controller found but could not be"
  347. " enabled.\n");
  348. return rc;
  349. }
  350. printk(KERN_INFO "i2o: I2O controller found on bus %d at %d.\n",
  351. pdev->bus->number, pdev->devfn);
  352. if (pci_set_dma_mask(pdev, DMA_32BIT_MASK)) {
  353. printk(KERN_WARNING "i2o: I2O controller on bus %d at %d: No "
  354. "suitable DMA available!\n", pdev->bus->number,
  355. pdev->devfn);
  356. rc = -ENODEV;
  357. goto disable;
  358. }
  359. pci_set_master(pdev);
  360. c = i2o_iop_alloc();
  361. if (IS_ERR(c)) {
  362. printk(KERN_ERR "i2o: memory for I2O controller could not be "
  363. "allocated\n");
  364. rc = PTR_ERR(c);
  365. goto disable;
  366. }
  367. c->pdev = pdev;
  368. c->device = pdev->dev;
  369. /* Cards that fall apart if you hit them with large I/O loads... */
  370. if (pdev->vendor == PCI_VENDOR_ID_NCR && pdev->device == 0x0630) {
  371. c->short_req = 1;
  372. printk(KERN_INFO "%s: Symbios FC920 workarounds activated.\n",
  373. c->name);
  374. }
  375. if (pdev->subsystem_vendor == PCI_VENDOR_ID_PROMISE) {
  376. c->promise = 1;
  377. printk(KERN_INFO "%s: Promise workarounds activated.\n",
  378. c->name);
  379. }
  380. /* Cards that go bananas if you quiesce them before you reset them. */
  381. if (pdev->vendor == PCI_VENDOR_ID_DPT) {
  382. c->no_quiesce = 1;
  383. if (pdev->device == 0xa511)
  384. c->raptor = 1;
  385. }
  386. if ((rc = i2o_pci_alloc(c))) {
  387. printk(KERN_ERR "%s: DMA / IO allocation for I2O controller "
  388. " failed\n", c->name);
  389. goto free_controller;
  390. }
  391. if (i2o_pci_irq_enable(c)) {
  392. printk(KERN_ERR "%s: unable to enable interrupts for I2O "
  393. "controller\n", c->name);
  394. goto free_pci;
  395. }
  396. if ((rc = i2o_iop_add(c)))
  397. goto uninstall;
  398. return 0;
  399. uninstall:
  400. i2o_pci_irq_disable(c);
  401. free_pci:
  402. i2o_pci_free(c);
  403. free_controller:
  404. i2o_iop_free(c);
  405. disable:
  406. pci_disable_device(pdev);
  407. return rc;
  408. }
  409. /**
  410. * i2o_pci_remove - Removes a I2O controller from the system
  411. * pdev: I2O controller which should be removed
  412. *
  413. * Reset the I2O controller, disable interrupts and remove all allocated
  414. * resources.
  415. */
  416. static void __devexit i2o_pci_remove(struct pci_dev *pdev)
  417. {
  418. struct i2o_controller *c;
  419. c = pci_get_drvdata(pdev);
  420. i2o_iop_remove(c);
  421. i2o_pci_irq_disable(c);
  422. i2o_pci_free(c);
  423. printk(KERN_INFO "%s: Controller removed.\n", c->name);
  424. i2o_iop_free(c);
  425. pci_disable_device(pdev);
  426. };
  427. /* PCI driver for I2O controller */
  428. static struct pci_driver i2o_pci_driver = {
  429. .name = "I2O controller",
  430. .id_table = i2o_pci_ids,
  431. .probe = i2o_pci_probe,
  432. .remove = __devexit_p(i2o_pci_remove),
  433. };
  434. /**
  435. * i2o_pci_init - registers I2O PCI driver in PCI subsystem
  436. *
  437. * Returns > 0 on success or negative error code on failure.
  438. */
  439. int __init i2o_pci_init(void)
  440. {
  441. return pci_register_driver(&i2o_pci_driver);
  442. };
  443. /**
  444. * i2o_pci_exit - unregisters I2O PCI driver from PCI subsystem
  445. */
  446. void __exit i2o_pci_exit(void)
  447. {
  448. pci_unregister_driver(&i2o_pci_driver);
  449. };
  450. EXPORT_SYMBOL(i2o_dma_realloc);
  451. MODULE_DEVICE_TABLE(pci, i2o_pci_ids);