scx200_acb.c 12 KB

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  1. /* linux/drivers/i2c/scx200_acb.c
  2. Copyright (c) 2001,2002 Christer Weinigel <wingel@nano-system.com>
  3. National Semiconductor SCx200 ACCESS.bus support
  4. Based on i2c-keywest.c which is:
  5. Copyright (c) 2001 Benjamin Herrenschmidt <benh@kernel.crashing.org>
  6. Copyright (c) 2000 Philip Edelbrock <phil@stimpy.netroedge.com>
  7. This program is free software; you can redistribute it and/or
  8. modify it under the terms of the GNU General Public License as
  9. published by the Free Software Foundation; either version 2 of the
  10. License, or (at your option) any later version.
  11. This program is distributed in the hope that it will be useful,
  12. but WITHOUT ANY WARRANTY; without even the implied warranty of
  13. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  14. General Public License for more details.
  15. You should have received a copy of the GNU General Public License
  16. along with this program; if not, write to the Free Software
  17. Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  18. */
  19. #include <linux/config.h>
  20. #include <linux/module.h>
  21. #include <linux/errno.h>
  22. #include <linux/kernel.h>
  23. #include <linux/init.h>
  24. #include <linux/i2c.h>
  25. #include <linux/smp_lock.h>
  26. #include <linux/pci.h>
  27. #include <linux/delay.h>
  28. #include <asm/io.h>
  29. #include <linux/scx200.h>
  30. #define NAME "scx200_acb"
  31. MODULE_AUTHOR("Christer Weinigel <wingel@nano-system.com>");
  32. MODULE_DESCRIPTION("NatSemi SCx200 ACCESS.bus Driver");
  33. MODULE_LICENSE("GPL");
  34. #define MAX_DEVICES 4
  35. static int base[MAX_DEVICES] = { 0x820, 0x840 };
  36. module_param_array(base, int, NULL, 0);
  37. MODULE_PARM_DESC(base, "Base addresses for the ACCESS.bus controllers");
  38. #ifdef DEBUG
  39. #define DBG(x...) printk(KERN_DEBUG NAME ": " x)
  40. #else
  41. #define DBG(x...)
  42. #endif
  43. /* The hardware supports interrupt driven mode too, but I haven't
  44. implemented that. */
  45. #define POLLED_MODE 1
  46. #define POLL_TIMEOUT (HZ)
  47. enum scx200_acb_state {
  48. state_idle,
  49. state_address,
  50. state_command,
  51. state_repeat_start,
  52. state_quick,
  53. state_read,
  54. state_write,
  55. };
  56. static const char *scx200_acb_state_name[] = {
  57. "idle",
  58. "address",
  59. "command",
  60. "repeat_start",
  61. "quick",
  62. "read",
  63. "write",
  64. };
  65. /* Physical interface */
  66. struct scx200_acb_iface
  67. {
  68. struct scx200_acb_iface *next;
  69. struct i2c_adapter adapter;
  70. unsigned base;
  71. struct semaphore sem;
  72. /* State machine data */
  73. enum scx200_acb_state state;
  74. int result;
  75. u8 address_byte;
  76. u8 command;
  77. u8 *ptr;
  78. char needs_reset;
  79. unsigned len;
  80. };
  81. /* Register Definitions */
  82. #define ACBSDA (iface->base + 0)
  83. #define ACBST (iface->base + 1)
  84. #define ACBST_SDAST 0x40 /* SDA Status */
  85. #define ACBST_BER 0x20
  86. #define ACBST_NEGACK 0x10 /* Negative Acknowledge */
  87. #define ACBST_STASTR 0x08 /* Stall After Start */
  88. #define ACBST_MASTER 0x02
  89. #define ACBCST (iface->base + 2)
  90. #define ACBCST_BB 0x02
  91. #define ACBCTL1 (iface->base + 3)
  92. #define ACBCTL1_STASTRE 0x80
  93. #define ACBCTL1_NMINTE 0x40
  94. #define ACBCTL1_ACK 0x10
  95. #define ACBCTL1_STOP 0x02
  96. #define ACBCTL1_START 0x01
  97. #define ACBADDR (iface->base + 4)
  98. #define ACBCTL2 (iface->base + 5)
  99. #define ACBCTL2_ENABLE 0x01
  100. /************************************************************************/
  101. static void scx200_acb_machine(struct scx200_acb_iface *iface, u8 status)
  102. {
  103. const char *errmsg;
  104. DBG("state %s, status = 0x%02x\n",
  105. scx200_acb_state_name[iface->state], status);
  106. if (status & ACBST_BER) {
  107. errmsg = "bus error";
  108. goto error;
  109. }
  110. if (!(status & ACBST_MASTER)) {
  111. errmsg = "not master";
  112. goto error;
  113. }
  114. if (status & ACBST_NEGACK)
  115. goto negack;
  116. switch (iface->state) {
  117. case state_idle:
  118. dev_warn(&iface->adapter.dev, "interrupt in idle state\n");
  119. break;
  120. case state_address:
  121. /* Do a pointer write first */
  122. outb(iface->address_byte & ~1, ACBSDA);
  123. iface->state = state_command;
  124. break;
  125. case state_command:
  126. outb(iface->command, ACBSDA);
  127. if (iface->address_byte & 1)
  128. iface->state = state_repeat_start;
  129. else
  130. iface->state = state_write;
  131. break;
  132. case state_repeat_start:
  133. outb(inb(ACBCTL1) | ACBCTL1_START, ACBCTL1);
  134. /* fallthrough */
  135. case state_quick:
  136. if (iface->address_byte & 1) {
  137. if (iface->len == 1)
  138. outb(inb(ACBCTL1) | ACBCTL1_ACK, ACBCTL1);
  139. else
  140. outb(inb(ACBCTL1) & ~ACBCTL1_ACK, ACBCTL1);
  141. outb(iface->address_byte, ACBSDA);
  142. iface->state = state_read;
  143. } else {
  144. outb(iface->address_byte, ACBSDA);
  145. iface->state = state_write;
  146. }
  147. break;
  148. case state_read:
  149. /* Set ACK if receiving the last byte */
  150. if (iface->len == 1)
  151. outb(inb(ACBCTL1) | ACBCTL1_ACK, ACBCTL1);
  152. else
  153. outb(inb(ACBCTL1) & ~ACBCTL1_ACK, ACBCTL1);
  154. *iface->ptr++ = inb(ACBSDA);
  155. --iface->len;
  156. if (iface->len == 0) {
  157. iface->result = 0;
  158. iface->state = state_idle;
  159. outb(inb(ACBCTL1) | ACBCTL1_STOP, ACBCTL1);
  160. }
  161. break;
  162. case state_write:
  163. if (iface->len == 0) {
  164. iface->result = 0;
  165. iface->state = state_idle;
  166. outb(inb(ACBCTL1) | ACBCTL1_STOP, ACBCTL1);
  167. break;
  168. }
  169. outb(*iface->ptr++, ACBSDA);
  170. --iface->len;
  171. break;
  172. }
  173. return;
  174. negack:
  175. DBG("negative acknowledge in state %s\n",
  176. scx200_acb_state_name[iface->state]);
  177. iface->state = state_idle;
  178. iface->result = -ENXIO;
  179. outb(inb(ACBCTL1) | ACBCTL1_STOP, ACBCTL1);
  180. outb(ACBST_STASTR | ACBST_NEGACK, ACBST);
  181. return;
  182. error:
  183. dev_err(&iface->adapter.dev, "%s in state %s\n", errmsg,
  184. scx200_acb_state_name[iface->state]);
  185. iface->state = state_idle;
  186. iface->result = -EIO;
  187. iface->needs_reset = 1;
  188. }
  189. static void scx200_acb_timeout(struct scx200_acb_iface *iface)
  190. {
  191. dev_err(&iface->adapter.dev, "timeout in state %s\n",
  192. scx200_acb_state_name[iface->state]);
  193. iface->state = state_idle;
  194. iface->result = -EIO;
  195. iface->needs_reset = 1;
  196. }
  197. #ifdef POLLED_MODE
  198. static void scx200_acb_poll(struct scx200_acb_iface *iface)
  199. {
  200. u8 status = 0;
  201. unsigned long timeout;
  202. timeout = jiffies + POLL_TIMEOUT;
  203. while (time_before(jiffies, timeout)) {
  204. status = inb(ACBST);
  205. if ((status & (ACBST_SDAST|ACBST_BER|ACBST_NEGACK)) != 0) {
  206. scx200_acb_machine(iface, status);
  207. return;
  208. }
  209. msleep(10);
  210. }
  211. scx200_acb_timeout(iface);
  212. }
  213. #endif /* POLLED_MODE */
  214. static void scx200_acb_reset(struct scx200_acb_iface *iface)
  215. {
  216. /* Disable the ACCESS.bus device and Configure the SCL
  217. frequency: 16 clock cycles */
  218. outb(0x70, ACBCTL2);
  219. /* Polling mode */
  220. outb(0, ACBCTL1);
  221. /* Disable slave address */
  222. outb(0, ACBADDR);
  223. /* Enable the ACCESS.bus device */
  224. outb(inb(ACBCTL2) | ACBCTL2_ENABLE, ACBCTL2);
  225. /* Free STALL after START */
  226. outb(inb(ACBCTL1) & ~(ACBCTL1_STASTRE | ACBCTL1_NMINTE), ACBCTL1);
  227. /* Send a STOP */
  228. outb(inb(ACBCTL1) | ACBCTL1_STOP, ACBCTL1);
  229. /* Clear BER, NEGACK and STASTR bits */
  230. outb(ACBST_BER | ACBST_NEGACK | ACBST_STASTR, ACBST);
  231. /* Clear BB bit */
  232. outb(inb(ACBCST) | ACBCST_BB, ACBCST);
  233. }
  234. static s32 scx200_acb_smbus_xfer(struct i2c_adapter *adapter,
  235. u16 address, unsigned short flags,
  236. char rw, u8 command, int size,
  237. union i2c_smbus_data *data)
  238. {
  239. struct scx200_acb_iface *iface = i2c_get_adapdata(adapter);
  240. int len;
  241. u8 *buffer;
  242. u16 cur_word;
  243. int rc;
  244. switch (size) {
  245. case I2C_SMBUS_QUICK:
  246. len = 0;
  247. buffer = NULL;
  248. break;
  249. case I2C_SMBUS_BYTE:
  250. if (rw == I2C_SMBUS_READ) {
  251. len = 1;
  252. buffer = &data->byte;
  253. } else {
  254. len = 1;
  255. buffer = &command;
  256. }
  257. break;
  258. case I2C_SMBUS_BYTE_DATA:
  259. len = 1;
  260. buffer = &data->byte;
  261. break;
  262. case I2C_SMBUS_WORD_DATA:
  263. len = 2;
  264. cur_word = cpu_to_le16(data->word);
  265. buffer = (u8 *)&cur_word;
  266. break;
  267. case I2C_SMBUS_BLOCK_DATA:
  268. len = data->block[0];
  269. buffer = &data->block[1];
  270. break;
  271. default:
  272. return -EINVAL;
  273. }
  274. DBG("size=%d, address=0x%x, command=0x%x, len=%d, read=%d\n",
  275. size, address, command, len, rw == I2C_SMBUS_READ);
  276. if (!len && rw == I2C_SMBUS_READ) {
  277. dev_warn(&adapter->dev, "zero length read\n");
  278. return -EINVAL;
  279. }
  280. if (len && !buffer) {
  281. dev_warn(&adapter->dev, "nonzero length but no buffer\n");
  282. return -EFAULT;
  283. }
  284. down(&iface->sem);
  285. iface->address_byte = address<<1;
  286. if (rw == I2C_SMBUS_READ)
  287. iface->address_byte |= 1;
  288. iface->command = command;
  289. iface->ptr = buffer;
  290. iface->len = len;
  291. iface->result = -EINVAL;
  292. iface->needs_reset = 0;
  293. outb(inb(ACBCTL1) | ACBCTL1_START, ACBCTL1);
  294. if (size == I2C_SMBUS_QUICK || size == I2C_SMBUS_BYTE)
  295. iface->state = state_quick;
  296. else
  297. iface->state = state_address;
  298. #ifdef POLLED_MODE
  299. while (iface->state != state_idle)
  300. scx200_acb_poll(iface);
  301. #else /* POLLED_MODE */
  302. #error Interrupt driven mode not implemented
  303. #endif /* POLLED_MODE */
  304. if (iface->needs_reset)
  305. scx200_acb_reset(iface);
  306. rc = iface->result;
  307. up(&iface->sem);
  308. if (rc == 0 && size == I2C_SMBUS_WORD_DATA && rw == I2C_SMBUS_READ)
  309. data->word = le16_to_cpu(cur_word);
  310. #ifdef DEBUG
  311. DBG(": transfer done, result: %d", rc);
  312. if (buffer) {
  313. int i;
  314. printk(" data:");
  315. for (i = 0; i < len; ++i)
  316. printk(" %02x", buffer[i]);
  317. }
  318. printk("\n");
  319. #endif
  320. return rc;
  321. }
  322. static u32 scx200_acb_func(struct i2c_adapter *adapter)
  323. {
  324. return I2C_FUNC_SMBUS_QUICK | I2C_FUNC_SMBUS_BYTE |
  325. I2C_FUNC_SMBUS_BYTE_DATA | I2C_FUNC_SMBUS_WORD_DATA |
  326. I2C_FUNC_SMBUS_BLOCK_DATA;
  327. }
  328. /* For now, we only handle combined mode (smbus) */
  329. static struct i2c_algorithm scx200_acb_algorithm = {
  330. .name = "NatSemi SCx200 ACCESS.bus",
  331. .id = I2C_ALGO_SMBUS,
  332. .smbus_xfer = scx200_acb_smbus_xfer,
  333. .functionality = scx200_acb_func,
  334. };
  335. static struct scx200_acb_iface *scx200_acb_list;
  336. static int scx200_acb_probe(struct scx200_acb_iface *iface)
  337. {
  338. u8 val;
  339. /* Disable the ACCESS.bus device and Configure the SCL
  340. frequency: 16 clock cycles */
  341. outb(0x70, ACBCTL2);
  342. if (inb(ACBCTL2) != 0x70) {
  343. DBG("ACBCTL2 readback failed\n");
  344. return -ENXIO;
  345. }
  346. outb(inb(ACBCTL1) | ACBCTL1_NMINTE, ACBCTL1);
  347. val = inb(ACBCTL1);
  348. if (val) {
  349. DBG("disabled, but ACBCTL1=0x%02x\n", val);
  350. return -ENXIO;
  351. }
  352. outb(inb(ACBCTL2) | ACBCTL2_ENABLE, ACBCTL2);
  353. outb(inb(ACBCTL1) | ACBCTL1_NMINTE, ACBCTL1);
  354. val = inb(ACBCTL1);
  355. if ((val & ACBCTL1_NMINTE) != ACBCTL1_NMINTE) {
  356. DBG("enabled, but NMINTE won't be set, ACBCTL1=0x%02x\n", val);
  357. return -ENXIO;
  358. }
  359. return 0;
  360. }
  361. static int __init scx200_acb_create(int base, int index)
  362. {
  363. struct scx200_acb_iface *iface;
  364. struct i2c_adapter *adapter;
  365. int rc = 0;
  366. char description[64];
  367. iface = kmalloc(sizeof(*iface), GFP_KERNEL);
  368. if (!iface) {
  369. printk(KERN_ERR NAME ": can't allocate memory\n");
  370. rc = -ENOMEM;
  371. goto errout;
  372. }
  373. memset(iface, 0, sizeof(*iface));
  374. adapter = &iface->adapter;
  375. i2c_set_adapdata(adapter, iface);
  376. snprintf(adapter->name, I2C_NAME_SIZE, "SCx200 ACB%d", index);
  377. adapter->owner = THIS_MODULE;
  378. adapter->id = I2C_ALGO_SMBUS;
  379. adapter->algo = &scx200_acb_algorithm;
  380. adapter->class = I2C_CLASS_HWMON;
  381. init_MUTEX(&iface->sem);
  382. snprintf(description, sizeof(description), "NatSemi SCx200 ACCESS.bus [%s]", adapter->name);
  383. if (request_region(base, 8, description) == 0) {
  384. dev_err(&adapter->dev, "can't allocate io 0x%x-0x%x\n",
  385. base, base + 8-1);
  386. rc = -EBUSY;
  387. goto errout;
  388. }
  389. iface->base = base;
  390. rc = scx200_acb_probe(iface);
  391. if (rc) {
  392. dev_warn(&adapter->dev, "probe failed\n");
  393. goto errout;
  394. }
  395. scx200_acb_reset(iface);
  396. if (i2c_add_adapter(adapter) < 0) {
  397. dev_err(&adapter->dev, "failed to register\n");
  398. rc = -ENODEV;
  399. goto errout;
  400. }
  401. lock_kernel();
  402. iface->next = scx200_acb_list;
  403. scx200_acb_list = iface;
  404. unlock_kernel();
  405. return 0;
  406. errout:
  407. if (iface) {
  408. if (iface->base)
  409. release_region(iface->base, 8);
  410. kfree(iface);
  411. }
  412. return rc;
  413. }
  414. static struct pci_device_id scx200[] = {
  415. { PCI_DEVICE(PCI_VENDOR_ID_NS, PCI_DEVICE_ID_NS_SCx200_BRIDGE) },
  416. { PCI_DEVICE(PCI_VENDOR_ID_NS, PCI_DEVICE_ID_NS_SC1100_BRIDGE) },
  417. { },
  418. };
  419. static int __init scx200_acb_init(void)
  420. {
  421. int i;
  422. int rc;
  423. pr_debug(NAME ": NatSemi SCx200 ACCESS.bus Driver\n");
  424. /* Verify that this really is a SCx200 processor */
  425. if (pci_dev_present(scx200) == 0)
  426. return -ENODEV;
  427. rc = -ENXIO;
  428. for (i = 0; i < MAX_DEVICES; ++i) {
  429. if (base[i] > 0)
  430. rc = scx200_acb_create(base[i], i);
  431. }
  432. if (scx200_acb_list)
  433. return 0;
  434. return rc;
  435. }
  436. static void __exit scx200_acb_cleanup(void)
  437. {
  438. struct scx200_acb_iface *iface;
  439. lock_kernel();
  440. while ((iface = scx200_acb_list) != NULL) {
  441. scx200_acb_list = iface->next;
  442. unlock_kernel();
  443. i2c_del_adapter(&iface->adapter);
  444. release_region(iface->base, 8);
  445. kfree(iface);
  446. lock_kernel();
  447. }
  448. unlock_kernel();
  449. }
  450. module_init(scx200_acb_init);
  451. module_exit(scx200_acb_cleanup);
  452. /*
  453. Local variables:
  454. compile-command: "make -k -C ../.. SUBDIRS=drivers/i2c modules"
  455. c-basic-offset: 8
  456. End:
  457. */