Makefile.rules 1.1 KB

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  1. # ===========================================================================
  2. # arch/um: Generic definitions
  3. # ===========================================================================
  4. USER_SINGLE_OBJS := \
  5. $(foreach f,$(patsubst %.o,%,$(obj-y) $(obj-m)),$($(f)-objs))
  6. USER_OBJS += $(filter %_user.o,$(obj-y) $(obj-m) $(USER_SINGLE_OBJS))
  7. USER_OBJS := $(foreach file,$(USER_OBJS),$(obj)/$(file))
  8. $(USER_OBJS) : c_flags = -Wp,-MD,$(depfile) $(USER_CFLAGS) \
  9. $(CFLAGS_$(notdir $@))
  10. quiet_cmd_make_link = SYMLINK $@
  11. cmd_make_link = ln -sf $(srctree)/arch/$(SUBARCH)/$($(notdir $@)-dir)/$(notdir $@) $@
  12. # this needs to be before the foreach, because targets does not accept
  13. # complete paths like $(obj)/$(f). To make sure this works, use a := assignment,
  14. # or we will get $(obj)/$(f) in the "targets" value.
  15. # Also, this forces you to use the := syntax when assigning to targets.
  16. # Otherwise the line below will cause an infinite loop (if you don't know why,
  17. # just do it).
  18. targets := $(targets) $(SYMLINKS)
  19. SYMLINKS := $(foreach f,$(SYMLINKS),$(obj)/$(f))
  20. $(SYMLINKS): FORCE
  21. $(call if_changed,make_link)