powernow-k8.c 32 KB

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  1. /*
  2. * (c) 2003, 2004, 2005 Advanced Micro Devices, Inc.
  3. * Your use of this code is subject to the terms and conditions of the
  4. * GNU general public license version 2. See "COPYING" or
  5. * http://www.gnu.org/licenses/gpl.html
  6. *
  7. * Support : mark.langsdorf@amd.com
  8. *
  9. * Based on the powernow-k7.c module written by Dave Jones.
  10. * (C) 2003 Dave Jones <davej@codemonkey.org.uk> on behalf of SuSE Labs
  11. * (C) 2004 Dominik Brodowski <linux@brodo.de>
  12. * (C) 2004 Pavel Machek <pavel@suse.cz>
  13. * Licensed under the terms of the GNU GPL License version 2.
  14. * Based upon datasheets & sample CPUs kindly provided by AMD.
  15. *
  16. * Valuable input gratefully received from Dave Jones, Pavel Machek,
  17. * Dominik Brodowski, and others.
  18. * Originally developed by Paul Devriendt.
  19. * Processor information obtained from Chapter 9 (Power and Thermal Management)
  20. * of the "BIOS and Kernel Developer's Guide for the AMD Athlon 64 and AMD
  21. * Opteron Processors" available for download from www.amd.com
  22. *
  23. * Tables for specific CPUs can be infrerred from
  24. * http://www.amd.com/us-en/assets/content_type/white_papers_and_tech_docs/30430.pdf
  25. */
  26. #include <linux/kernel.h>
  27. #include <linux/smp.h>
  28. #include <linux/module.h>
  29. #include <linux/init.h>
  30. #include <linux/cpufreq.h>
  31. #include <linux/slab.h>
  32. #include <linux/string.h>
  33. #include <linux/cpumask.h>
  34. #include <linux/sched.h> /* for current / set_cpus_allowed() */
  35. #include <asm/msr.h>
  36. #include <asm/io.h>
  37. #include <asm/delay.h>
  38. #ifdef CONFIG_X86_POWERNOW_K8_ACPI
  39. #include <linux/acpi.h>
  40. #include <acpi/processor.h>
  41. #endif
  42. #define PFX "powernow-k8: "
  43. #define BFX PFX "BIOS error: "
  44. #define VERSION "version 1.50.4"
  45. #include "powernow-k8.h"
  46. /* serialize freq changes */
  47. static DECLARE_MUTEX(fidvid_sem);
  48. static struct powernow_k8_data *powernow_data[NR_CPUS];
  49. #ifndef CONFIG_SMP
  50. static cpumask_t cpu_core_map[1];
  51. #endif
  52. /* Return a frequency in MHz, given an input fid */
  53. static u32 find_freq_from_fid(u32 fid)
  54. {
  55. return 800 + (fid * 100);
  56. }
  57. /* Return a frequency in KHz, given an input fid */
  58. static u32 find_khz_freq_from_fid(u32 fid)
  59. {
  60. return 1000 * find_freq_from_fid(fid);
  61. }
  62. /* Return a voltage in miliVolts, given an input vid */
  63. static u32 find_millivolts_from_vid(struct powernow_k8_data *data, u32 vid)
  64. {
  65. return 1550-vid*25;
  66. }
  67. /* Return the vco fid for an input fid
  68. *
  69. * Each "low" fid has corresponding "high" fid, and you can get to "low" fids
  70. * only from corresponding high fids. This returns "high" fid corresponding to
  71. * "low" one.
  72. */
  73. static u32 convert_fid_to_vco_fid(u32 fid)
  74. {
  75. if (fid < HI_FID_TABLE_BOTTOM) {
  76. return 8 + (2 * fid);
  77. } else {
  78. return fid;
  79. }
  80. }
  81. /*
  82. * Return 1 if the pending bit is set. Unless we just instructed the processor
  83. * to transition to a new state, seeing this bit set is really bad news.
  84. */
  85. static int pending_bit_stuck(void)
  86. {
  87. u32 lo, hi;
  88. rdmsr(MSR_FIDVID_STATUS, lo, hi);
  89. return lo & MSR_S_LO_CHANGE_PENDING ? 1 : 0;
  90. }
  91. /*
  92. * Update the global current fid / vid values from the status msr.
  93. * Returns 1 on error.
  94. */
  95. static int query_current_values_with_pending_wait(struct powernow_k8_data *data)
  96. {
  97. u32 lo, hi;
  98. u32 i = 0;
  99. do {
  100. if (i++ > 10000) {
  101. dprintk("detected change pending stuck\n");
  102. return 1;
  103. }
  104. rdmsr(MSR_FIDVID_STATUS, lo, hi);
  105. } while (lo & MSR_S_LO_CHANGE_PENDING);
  106. data->currvid = hi & MSR_S_HI_CURRENT_VID;
  107. data->currfid = lo & MSR_S_LO_CURRENT_FID;
  108. return 0;
  109. }
  110. /* the isochronous relief time */
  111. static void count_off_irt(struct powernow_k8_data *data)
  112. {
  113. udelay((1 << data->irt) * 10);
  114. return;
  115. }
  116. /* the voltage stabalization time */
  117. static void count_off_vst(struct powernow_k8_data *data)
  118. {
  119. udelay(data->vstable * VST_UNITS_20US);
  120. return;
  121. }
  122. /* need to init the control msr to a safe value (for each cpu) */
  123. static void fidvid_msr_init(void)
  124. {
  125. u32 lo, hi;
  126. u8 fid, vid;
  127. rdmsr(MSR_FIDVID_STATUS, lo, hi);
  128. vid = hi & MSR_S_HI_CURRENT_VID;
  129. fid = lo & MSR_S_LO_CURRENT_FID;
  130. lo = fid | (vid << MSR_C_LO_VID_SHIFT);
  131. hi = MSR_C_HI_STP_GNT_BENIGN;
  132. dprintk("cpu%d, init lo 0x%x, hi 0x%x\n", smp_processor_id(), lo, hi);
  133. wrmsr(MSR_FIDVID_CTL, lo, hi);
  134. }
  135. /* write the new fid value along with the other control fields to the msr */
  136. static int write_new_fid(struct powernow_k8_data *data, u32 fid)
  137. {
  138. u32 lo;
  139. u32 savevid = data->currvid;
  140. u32 i = 0;
  141. if ((fid & INVALID_FID_MASK) || (data->currvid & INVALID_VID_MASK)) {
  142. printk(KERN_ERR PFX "internal error - overflow on fid write\n");
  143. return 1;
  144. }
  145. lo = fid | (data->currvid << MSR_C_LO_VID_SHIFT) | MSR_C_LO_INIT_FID_VID;
  146. dprintk("writing fid 0x%x, lo 0x%x, hi 0x%x\n",
  147. fid, lo, data->plllock * PLL_LOCK_CONVERSION);
  148. do {
  149. wrmsr(MSR_FIDVID_CTL, lo, data->plllock * PLL_LOCK_CONVERSION);
  150. if (i++ > 100) {
  151. printk(KERN_ERR PFX "internal error - pending bit very stuck - no further pstate changes possible\n");
  152. return 1;
  153. }
  154. } while (query_current_values_with_pending_wait(data));
  155. count_off_irt(data);
  156. if (savevid != data->currvid) {
  157. printk(KERN_ERR PFX "vid change on fid trans, old 0x%x, new 0x%x\n",
  158. savevid, data->currvid);
  159. return 1;
  160. }
  161. if (fid != data->currfid) {
  162. printk(KERN_ERR PFX "fid trans failed, fid 0x%x, curr 0x%x\n", fid,
  163. data->currfid);
  164. return 1;
  165. }
  166. return 0;
  167. }
  168. /* Write a new vid to the hardware */
  169. static int write_new_vid(struct powernow_k8_data *data, u32 vid)
  170. {
  171. u32 lo;
  172. u32 savefid = data->currfid;
  173. int i = 0;
  174. if ((data->currfid & INVALID_FID_MASK) || (vid & INVALID_VID_MASK)) {
  175. printk(KERN_ERR PFX "internal error - overflow on vid write\n");
  176. return 1;
  177. }
  178. lo = data->currfid | (vid << MSR_C_LO_VID_SHIFT) | MSR_C_LO_INIT_FID_VID;
  179. dprintk("writing vid 0x%x, lo 0x%x, hi 0x%x\n",
  180. vid, lo, STOP_GRANT_5NS);
  181. do {
  182. wrmsr(MSR_FIDVID_CTL, lo, STOP_GRANT_5NS);
  183. if (i++ > 100) {
  184. printk(KERN_ERR PFX "internal error - pending bit very stuck - no further pstate changes possible\n");
  185. return 1;
  186. }
  187. } while (query_current_values_with_pending_wait(data));
  188. if (savefid != data->currfid) {
  189. printk(KERN_ERR PFX "fid changed on vid trans, old 0x%x new 0x%x\n",
  190. savefid, data->currfid);
  191. return 1;
  192. }
  193. if (vid != data->currvid) {
  194. printk(KERN_ERR PFX "vid trans failed, vid 0x%x, curr 0x%x\n", vid,
  195. data->currvid);
  196. return 1;
  197. }
  198. return 0;
  199. }
  200. /*
  201. * Reduce the vid by the max of step or reqvid.
  202. * Decreasing vid codes represent increasing voltages:
  203. * vid of 0 is 1.550V, vid of 0x1e is 0.800V, vid of VID_OFF is off.
  204. */
  205. static int decrease_vid_code_by_step(struct powernow_k8_data *data, u32 reqvid, u32 step)
  206. {
  207. if ((data->currvid - reqvid) > step)
  208. reqvid = data->currvid - step;
  209. if (write_new_vid(data, reqvid))
  210. return 1;
  211. count_off_vst(data);
  212. return 0;
  213. }
  214. /* Change the fid and vid, by the 3 phases. */
  215. static int transition_fid_vid(struct powernow_k8_data *data, u32 reqfid, u32 reqvid)
  216. {
  217. if (core_voltage_pre_transition(data, reqvid))
  218. return 1;
  219. if (core_frequency_transition(data, reqfid))
  220. return 1;
  221. if (core_voltage_post_transition(data, reqvid))
  222. return 1;
  223. if (query_current_values_with_pending_wait(data))
  224. return 1;
  225. if ((reqfid != data->currfid) || (reqvid != data->currvid)) {
  226. printk(KERN_ERR PFX "failed (cpu%d): req 0x%x 0x%x, curr 0x%x 0x%x\n",
  227. smp_processor_id(),
  228. reqfid, reqvid, data->currfid, data->currvid);
  229. return 1;
  230. }
  231. dprintk("transitioned (cpu%d): new fid 0x%x, vid 0x%x\n",
  232. smp_processor_id(), data->currfid, data->currvid);
  233. return 0;
  234. }
  235. /* Phase 1 - core voltage transition ... setup voltage */
  236. static int core_voltage_pre_transition(struct powernow_k8_data *data, u32 reqvid)
  237. {
  238. u32 rvosteps = data->rvo;
  239. u32 savefid = data->currfid;
  240. u32 maxvid, lo;
  241. dprintk("ph1 (cpu%d): start, currfid 0x%x, currvid 0x%x, reqvid 0x%x, rvo 0x%x\n",
  242. smp_processor_id(),
  243. data->currfid, data->currvid, reqvid, data->rvo);
  244. rdmsr(MSR_FIDVID_STATUS, lo, maxvid);
  245. maxvid = 0x1f & (maxvid >> 16);
  246. dprintk("ph1 maxvid=0x%x\n", maxvid);
  247. if (reqvid < maxvid) /* lower numbers are higher voltages */
  248. reqvid = maxvid;
  249. while (data->currvid > reqvid) {
  250. dprintk("ph1: curr 0x%x, req vid 0x%x\n",
  251. data->currvid, reqvid);
  252. if (decrease_vid_code_by_step(data, reqvid, data->vidmvs))
  253. return 1;
  254. }
  255. while ((rvosteps > 0) && ((data->rvo + data->currvid) > reqvid)) {
  256. if (data->currvid == maxvid) {
  257. rvosteps = 0;
  258. } else {
  259. dprintk("ph1: changing vid for rvo, req 0x%x\n",
  260. data->currvid - 1);
  261. if (decrease_vid_code_by_step(data, data->currvid - 1, 1))
  262. return 1;
  263. rvosteps--;
  264. }
  265. }
  266. if (query_current_values_with_pending_wait(data))
  267. return 1;
  268. if (savefid != data->currfid) {
  269. printk(KERN_ERR PFX "ph1 err, currfid changed 0x%x\n", data->currfid);
  270. return 1;
  271. }
  272. dprintk("ph1 complete, currfid 0x%x, currvid 0x%x\n",
  273. data->currfid, data->currvid);
  274. return 0;
  275. }
  276. /* Phase 2 - core frequency transition */
  277. static int core_frequency_transition(struct powernow_k8_data *data, u32 reqfid)
  278. {
  279. u32 vcoreqfid, vcocurrfid, vcofiddiff, savevid = data->currvid;
  280. if ((reqfid < HI_FID_TABLE_BOTTOM) && (data->currfid < HI_FID_TABLE_BOTTOM)) {
  281. printk(KERN_ERR PFX "ph2: illegal lo-lo transition 0x%x 0x%x\n",
  282. reqfid, data->currfid);
  283. return 1;
  284. }
  285. if (data->currfid == reqfid) {
  286. printk(KERN_ERR PFX "ph2 null fid transition 0x%x\n", data->currfid);
  287. return 0;
  288. }
  289. dprintk("ph2 (cpu%d): starting, currfid 0x%x, currvid 0x%x, reqfid 0x%x\n",
  290. smp_processor_id(),
  291. data->currfid, data->currvid, reqfid);
  292. vcoreqfid = convert_fid_to_vco_fid(reqfid);
  293. vcocurrfid = convert_fid_to_vco_fid(data->currfid);
  294. vcofiddiff = vcocurrfid > vcoreqfid ? vcocurrfid - vcoreqfid
  295. : vcoreqfid - vcocurrfid;
  296. while (vcofiddiff > 2) {
  297. if (reqfid > data->currfid) {
  298. if (data->currfid > LO_FID_TABLE_TOP) {
  299. if (write_new_fid(data, data->currfid + 2)) {
  300. return 1;
  301. }
  302. } else {
  303. if (write_new_fid
  304. (data, 2 + convert_fid_to_vco_fid(data->currfid))) {
  305. return 1;
  306. }
  307. }
  308. } else {
  309. if (write_new_fid(data, data->currfid - 2))
  310. return 1;
  311. }
  312. vcocurrfid = convert_fid_to_vco_fid(data->currfid);
  313. vcofiddiff = vcocurrfid > vcoreqfid ? vcocurrfid - vcoreqfid
  314. : vcoreqfid - vcocurrfid;
  315. }
  316. if (write_new_fid(data, reqfid))
  317. return 1;
  318. if (query_current_values_with_pending_wait(data))
  319. return 1;
  320. if (data->currfid != reqfid) {
  321. printk(KERN_ERR PFX
  322. "ph2: mismatch, failed fid transition, curr 0x%x, req 0x%x\n",
  323. data->currfid, reqfid);
  324. return 1;
  325. }
  326. if (savevid != data->currvid) {
  327. printk(KERN_ERR PFX "ph2: vid changed, save 0x%x, curr 0x%x\n",
  328. savevid, data->currvid);
  329. return 1;
  330. }
  331. dprintk("ph2 complete, currfid 0x%x, currvid 0x%x\n",
  332. data->currfid, data->currvid);
  333. return 0;
  334. }
  335. /* Phase 3 - core voltage transition flow ... jump to the final vid. */
  336. static int core_voltage_post_transition(struct powernow_k8_data *data, u32 reqvid)
  337. {
  338. u32 savefid = data->currfid;
  339. u32 savereqvid = reqvid;
  340. dprintk("ph3 (cpu%d): starting, currfid 0x%x, currvid 0x%x\n",
  341. smp_processor_id(),
  342. data->currfid, data->currvid);
  343. if (reqvid != data->currvid) {
  344. if (write_new_vid(data, reqvid))
  345. return 1;
  346. if (savefid != data->currfid) {
  347. printk(KERN_ERR PFX
  348. "ph3: bad fid change, save 0x%x, curr 0x%x\n",
  349. savefid, data->currfid);
  350. return 1;
  351. }
  352. if (data->currvid != reqvid) {
  353. printk(KERN_ERR PFX
  354. "ph3: failed vid transition\n, req 0x%x, curr 0x%x",
  355. reqvid, data->currvid);
  356. return 1;
  357. }
  358. }
  359. if (query_current_values_with_pending_wait(data))
  360. return 1;
  361. if (savereqvid != data->currvid) {
  362. dprintk("ph3 failed, currvid 0x%x\n", data->currvid);
  363. return 1;
  364. }
  365. if (savefid != data->currfid) {
  366. dprintk("ph3 failed, currfid changed 0x%x\n",
  367. data->currfid);
  368. return 1;
  369. }
  370. dprintk("ph3 complete, currfid 0x%x, currvid 0x%x\n",
  371. data->currfid, data->currvid);
  372. return 0;
  373. }
  374. static int check_supported_cpu(unsigned int cpu)
  375. {
  376. cpumask_t oldmask = CPU_MASK_ALL;
  377. u32 eax, ebx, ecx, edx;
  378. unsigned int rc = 0;
  379. oldmask = current->cpus_allowed;
  380. set_cpus_allowed(current, cpumask_of_cpu(cpu));
  381. schedule();
  382. if (smp_processor_id() != cpu) {
  383. printk(KERN_ERR "limiting to cpu %u failed\n", cpu);
  384. goto out;
  385. }
  386. if (current_cpu_data.x86_vendor != X86_VENDOR_AMD)
  387. goto out;
  388. eax = cpuid_eax(CPUID_PROCESSOR_SIGNATURE);
  389. if (((eax & CPUID_USE_XFAM_XMOD) != CPUID_USE_XFAM_XMOD) ||
  390. ((eax & CPUID_XFAM) != CPUID_XFAM_K8) ||
  391. ((eax & CPUID_XMOD) > CPUID_XMOD_REV_F)) {
  392. printk(KERN_INFO PFX "Processor cpuid %x not supported\n", eax);
  393. goto out;
  394. }
  395. eax = cpuid_eax(CPUID_GET_MAX_CAPABILITIES);
  396. if (eax < CPUID_FREQ_VOLT_CAPABILITIES) {
  397. printk(KERN_INFO PFX
  398. "No frequency change capabilities detected\n");
  399. goto out;
  400. }
  401. cpuid(CPUID_FREQ_VOLT_CAPABILITIES, &eax, &ebx, &ecx, &edx);
  402. if ((edx & P_STATE_TRANSITION_CAPABLE) != P_STATE_TRANSITION_CAPABLE) {
  403. printk(KERN_INFO PFX "Power state transitions not supported\n");
  404. goto out;
  405. }
  406. rc = 1;
  407. out:
  408. set_cpus_allowed(current, oldmask);
  409. schedule();
  410. return rc;
  411. }
  412. static int check_pst_table(struct powernow_k8_data *data, struct pst_s *pst, u8 maxvid)
  413. {
  414. unsigned int j;
  415. u8 lastfid = 0xff;
  416. for (j = 0; j < data->numps; j++) {
  417. if (pst[j].vid > LEAST_VID) {
  418. printk(KERN_ERR PFX "vid %d invalid : 0x%x\n", j, pst[j].vid);
  419. return -EINVAL;
  420. }
  421. if (pst[j].vid < data->rvo) { /* vid + rvo >= 0 */
  422. printk(KERN_ERR BFX "0 vid exceeded with pstate %d\n", j);
  423. return -ENODEV;
  424. }
  425. if (pst[j].vid < maxvid + data->rvo) { /* vid + rvo >= maxvid */
  426. printk(KERN_ERR BFX "maxvid exceeded with pstate %d\n", j);
  427. return -ENODEV;
  428. }
  429. if ((pst[j].fid > MAX_FID)
  430. || (pst[j].fid & 1)
  431. || (j && (pst[j].fid < HI_FID_TABLE_BOTTOM))) {
  432. /* Only first fid is allowed to be in "low" range */
  433. printk(KERN_ERR PFX "two low fids - %d : 0x%x\n", j, pst[j].fid);
  434. return -EINVAL;
  435. }
  436. if (pst[j].fid < lastfid)
  437. lastfid = pst[j].fid;
  438. }
  439. if (lastfid & 1) {
  440. printk(KERN_ERR PFX "lastfid invalid\n");
  441. return -EINVAL;
  442. }
  443. if (lastfid > LO_FID_TABLE_TOP)
  444. printk(KERN_INFO PFX "first fid not from lo freq table\n");
  445. return 0;
  446. }
  447. static void print_basics(struct powernow_k8_data *data)
  448. {
  449. int j;
  450. for (j = 0; j < data->numps; j++) {
  451. if (data->powernow_table[j].frequency != CPUFREQ_ENTRY_INVALID)
  452. printk(KERN_INFO PFX " %d : fid 0x%x (%d MHz), vid 0x%x (%d mV)\n", j,
  453. data->powernow_table[j].index & 0xff,
  454. data->powernow_table[j].frequency/1000,
  455. data->powernow_table[j].index >> 8,
  456. find_millivolts_from_vid(data, data->powernow_table[j].index >> 8));
  457. }
  458. if (data->batps)
  459. printk(KERN_INFO PFX "Only %d pstates on battery\n", data->batps);
  460. }
  461. static int fill_powernow_table(struct powernow_k8_data *data, struct pst_s *pst, u8 maxvid)
  462. {
  463. struct cpufreq_frequency_table *powernow_table;
  464. unsigned int j;
  465. if (data->batps) { /* use ACPI support to get full speed on mains power */
  466. printk(KERN_WARNING PFX "Only %d pstates usable (use ACPI driver for full range\n", data->batps);
  467. data->numps = data->batps;
  468. }
  469. for ( j=1; j<data->numps; j++ ) {
  470. if (pst[j-1].fid >= pst[j].fid) {
  471. printk(KERN_ERR PFX "PST out of sequence\n");
  472. return -EINVAL;
  473. }
  474. }
  475. if (data->numps < 2) {
  476. printk(KERN_ERR PFX "no p states to transition\n");
  477. return -ENODEV;
  478. }
  479. if (check_pst_table(data, pst, maxvid))
  480. return -EINVAL;
  481. powernow_table = kmalloc((sizeof(struct cpufreq_frequency_table)
  482. * (data->numps + 1)), GFP_KERNEL);
  483. if (!powernow_table) {
  484. printk(KERN_ERR PFX "powernow_table memory alloc failure\n");
  485. return -ENOMEM;
  486. }
  487. for (j = 0; j < data->numps; j++) {
  488. powernow_table[j].index = pst[j].fid; /* lower 8 bits */
  489. powernow_table[j].index |= (pst[j].vid << 8); /* upper 8 bits */
  490. powernow_table[j].frequency = find_khz_freq_from_fid(pst[j].fid);
  491. }
  492. powernow_table[data->numps].frequency = CPUFREQ_TABLE_END;
  493. powernow_table[data->numps].index = 0;
  494. if (query_current_values_with_pending_wait(data)) {
  495. kfree(powernow_table);
  496. return -EIO;
  497. }
  498. dprintk("cfid 0x%x, cvid 0x%x\n", data->currfid, data->currvid);
  499. data->powernow_table = powernow_table;
  500. print_basics(data);
  501. for (j = 0; j < data->numps; j++)
  502. if ((pst[j].fid==data->currfid) && (pst[j].vid==data->currvid))
  503. return 0;
  504. dprintk("currfid/vid do not match PST, ignoring\n");
  505. return 0;
  506. }
  507. /* Find and validate the PSB/PST table in BIOS. */
  508. static int find_psb_table(struct powernow_k8_data *data)
  509. {
  510. struct psb_s *psb;
  511. unsigned int i;
  512. u32 mvs;
  513. u8 maxvid;
  514. u32 cpst = 0;
  515. u32 thiscpuid;
  516. for (i = 0xc0000; i < 0xffff0; i += 0x10) {
  517. /* Scan BIOS looking for the signature. */
  518. /* It can not be at ffff0 - it is too big. */
  519. psb = phys_to_virt(i);
  520. if (memcmp(psb, PSB_ID_STRING, PSB_ID_STRING_LEN) != 0)
  521. continue;
  522. dprintk("found PSB header at 0x%p\n", psb);
  523. dprintk("table vers: 0x%x\n", psb->tableversion);
  524. if (psb->tableversion != PSB_VERSION_1_4) {
  525. printk(KERN_INFO BFX "PSB table is not v1.4\n");
  526. return -ENODEV;
  527. }
  528. dprintk("flags: 0x%x\n", psb->flags1);
  529. if (psb->flags1) {
  530. printk(KERN_ERR BFX "unknown flags\n");
  531. return -ENODEV;
  532. }
  533. data->vstable = psb->vstable;
  534. dprintk("voltage stabilization time: %d(*20us)\n", data->vstable);
  535. dprintk("flags2: 0x%x\n", psb->flags2);
  536. data->rvo = psb->flags2 & 3;
  537. data->irt = ((psb->flags2) >> 2) & 3;
  538. mvs = ((psb->flags2) >> 4) & 3;
  539. data->vidmvs = 1 << mvs;
  540. data->batps = ((psb->flags2) >> 6) & 3;
  541. dprintk("ramp voltage offset: %d\n", data->rvo);
  542. dprintk("isochronous relief time: %d\n", data->irt);
  543. dprintk("maximum voltage step: %d - 0x%x\n", mvs, data->vidmvs);
  544. dprintk("numpst: 0x%x\n", psb->num_tables);
  545. cpst = psb->num_tables;
  546. if ((psb->cpuid == 0x00000fc0) || (psb->cpuid == 0x00000fe0) ){
  547. thiscpuid = cpuid_eax(CPUID_PROCESSOR_SIGNATURE);
  548. if ((thiscpuid == 0x00000fc0) || (thiscpuid == 0x00000fe0) ) {
  549. cpst = 1;
  550. }
  551. }
  552. if (cpst != 1) {
  553. printk(KERN_ERR BFX "numpst must be 1\n");
  554. return -ENODEV;
  555. }
  556. data->plllock = psb->plllocktime;
  557. dprintk("plllocktime: 0x%x (units 1us)\n", psb->plllocktime);
  558. dprintk("maxfid: 0x%x\n", psb->maxfid);
  559. dprintk("maxvid: 0x%x\n", psb->maxvid);
  560. maxvid = psb->maxvid;
  561. data->numps = psb->numps;
  562. dprintk("numpstates: 0x%x\n", data->numps);
  563. return fill_powernow_table(data, (struct pst_s *)(psb+1), maxvid);
  564. }
  565. /*
  566. * If you see this message, complain to BIOS manufacturer. If
  567. * he tells you "we do not support Linux" or some similar
  568. * nonsense, remember that Windows 2000 uses the same legacy
  569. * mechanism that the old Linux PSB driver uses. Tell them it
  570. * is broken with Windows 2000.
  571. *
  572. * The reference to the AMD documentation is chapter 9 in the
  573. * BIOS and Kernel Developer's Guide, which is available on
  574. * www.amd.com
  575. */
  576. printk(KERN_INFO PFX "BIOS error - no PSB or ACPI _PSS objects\n");
  577. return -ENODEV;
  578. }
  579. #ifdef CONFIG_X86_POWERNOW_K8_ACPI
  580. static void powernow_k8_acpi_pst_values(struct powernow_k8_data *data, unsigned int index)
  581. {
  582. if (!data->acpi_data.state_count)
  583. return;
  584. data->irt = (data->acpi_data.states[index].control >> IRT_SHIFT) & IRT_MASK;
  585. data->rvo = (data->acpi_data.states[index].control >> RVO_SHIFT) & RVO_MASK;
  586. data->exttype = (data->acpi_data.states[index].control >> EXT_TYPE_SHIFT) & EXT_TYPE_MASK;
  587. data->plllock = (data->acpi_data.states[index].control >> PLL_L_SHIFT) & PLL_L_MASK;
  588. data->vidmvs = 1 << ((data->acpi_data.states[index].control >> MVS_SHIFT) & MVS_MASK);
  589. data->vstable = (data->acpi_data.states[index].control >> VST_SHIFT) & VST_MASK;
  590. }
  591. static int powernow_k8_cpu_init_acpi(struct powernow_k8_data *data)
  592. {
  593. int i;
  594. int cntlofreq = 0;
  595. struct cpufreq_frequency_table *powernow_table;
  596. if (acpi_processor_register_performance(&data->acpi_data, data->cpu)) {
  597. dprintk("register performance failed: bad ACPI data\n");
  598. return -EIO;
  599. }
  600. /* verify the data contained in the ACPI structures */
  601. if (data->acpi_data.state_count <= 1) {
  602. dprintk("No ACPI P-States\n");
  603. goto err_out;
  604. }
  605. if ((data->acpi_data.control_register.space_id != ACPI_ADR_SPACE_FIXED_HARDWARE) ||
  606. (data->acpi_data.status_register.space_id != ACPI_ADR_SPACE_FIXED_HARDWARE)) {
  607. dprintk("Invalid control/status registers (%x - %x)\n",
  608. data->acpi_data.control_register.space_id,
  609. data->acpi_data.status_register.space_id);
  610. goto err_out;
  611. }
  612. /* fill in data->powernow_table */
  613. powernow_table = kmalloc((sizeof(struct cpufreq_frequency_table)
  614. * (data->acpi_data.state_count + 1)), GFP_KERNEL);
  615. if (!powernow_table) {
  616. dprintk("powernow_table memory alloc failure\n");
  617. goto err_out;
  618. }
  619. for (i = 0; i < data->acpi_data.state_count; i++) {
  620. u32 fid;
  621. u32 vid;
  622. if (data->exttype) {
  623. fid = data->acpi_data.states[i].status & FID_MASK;
  624. vid = (data->acpi_data.states[i].status >> VID_SHIFT) & VID_MASK;
  625. } else {
  626. fid = data->acpi_data.states[i].control & FID_MASK;
  627. vid = (data->acpi_data.states[i].control >> VID_SHIFT) & VID_MASK;
  628. }
  629. dprintk(" %d : fid 0x%x, vid 0x%x\n", i, fid, vid);
  630. powernow_table[i].index = fid; /* lower 8 bits */
  631. powernow_table[i].index |= (vid << 8); /* upper 8 bits */
  632. powernow_table[i].frequency = find_khz_freq_from_fid(fid);
  633. /* verify frequency is OK */
  634. if ((powernow_table[i].frequency > (MAX_FREQ * 1000)) ||
  635. (powernow_table[i].frequency < (MIN_FREQ * 1000))) {
  636. dprintk("invalid freq %u kHz, ignoring\n", powernow_table[i].frequency);
  637. powernow_table[i].frequency = CPUFREQ_ENTRY_INVALID;
  638. continue;
  639. }
  640. /* verify voltage is OK - BIOSs are using "off" to indicate invalid */
  641. if (vid == VID_OFF) {
  642. dprintk("invalid vid %u, ignoring\n", vid);
  643. powernow_table[i].frequency = CPUFREQ_ENTRY_INVALID;
  644. continue;
  645. }
  646. /* verify only 1 entry from the lo frequency table */
  647. if (fid < HI_FID_TABLE_BOTTOM) {
  648. if (cntlofreq) {
  649. /* if both entries are the same, ignore this
  650. * one...
  651. */
  652. if ((powernow_table[i].frequency != powernow_table[cntlofreq].frequency) ||
  653. (powernow_table[i].index != powernow_table[cntlofreq].index)) {
  654. printk(KERN_ERR PFX "Too many lo freq table entries\n");
  655. goto err_out_mem;
  656. }
  657. dprintk("double low frequency table entry, ignoring it.\n");
  658. powernow_table[i].frequency = CPUFREQ_ENTRY_INVALID;
  659. continue;
  660. } else
  661. cntlofreq = i;
  662. }
  663. if (powernow_table[i].frequency != (data->acpi_data.states[i].core_frequency * 1000)) {
  664. printk(KERN_INFO PFX "invalid freq entries %u kHz vs. %u kHz\n",
  665. powernow_table[i].frequency,
  666. (unsigned int) (data->acpi_data.states[i].core_frequency * 1000));
  667. powernow_table[i].frequency = CPUFREQ_ENTRY_INVALID;
  668. continue;
  669. }
  670. }
  671. powernow_table[data->acpi_data.state_count].frequency = CPUFREQ_TABLE_END;
  672. powernow_table[data->acpi_data.state_count].index = 0;
  673. data->powernow_table = powernow_table;
  674. /* fill in data */
  675. data->numps = data->acpi_data.state_count;
  676. print_basics(data);
  677. powernow_k8_acpi_pst_values(data, 0);
  678. /* notify BIOS that we exist */
  679. acpi_processor_notify_smm(THIS_MODULE);
  680. return 0;
  681. err_out_mem:
  682. kfree(powernow_table);
  683. err_out:
  684. acpi_processor_unregister_performance(&data->acpi_data, data->cpu);
  685. /* data->acpi_data.state_count informs us at ->exit() whether ACPI was used */
  686. data->acpi_data.state_count = 0;
  687. return -ENODEV;
  688. }
  689. static void powernow_k8_cpu_exit_acpi(struct powernow_k8_data *data)
  690. {
  691. if (data->acpi_data.state_count)
  692. acpi_processor_unregister_performance(&data->acpi_data, data->cpu);
  693. }
  694. #else
  695. static int powernow_k8_cpu_init_acpi(struct powernow_k8_data *data) { return -ENODEV; }
  696. static void powernow_k8_cpu_exit_acpi(struct powernow_k8_data *data) { return; }
  697. static void powernow_k8_acpi_pst_values(struct powernow_k8_data *data, unsigned int index) { return; }
  698. #endif /* CONFIG_X86_POWERNOW_K8_ACPI */
  699. /* Take a frequency, and issue the fid/vid transition command */
  700. static int transition_frequency(struct powernow_k8_data *data, unsigned int index)
  701. {
  702. u32 fid;
  703. u32 vid;
  704. int res, i;
  705. struct cpufreq_freqs freqs;
  706. dprintk("cpu %d transition to index %u\n", smp_processor_id(), index);
  707. /* fid are the lower 8 bits of the index we stored into
  708. * the cpufreq frequency table in find_psb_table, vid are
  709. * the upper 8 bits.
  710. */
  711. fid = data->powernow_table[index].index & 0xFF;
  712. vid = (data->powernow_table[index].index & 0xFF00) >> 8;
  713. dprintk("table matched fid 0x%x, giving vid 0x%x\n", fid, vid);
  714. if (query_current_values_with_pending_wait(data))
  715. return 1;
  716. if ((data->currvid == vid) && (data->currfid == fid)) {
  717. dprintk("target matches current values (fid 0x%x, vid 0x%x)\n",
  718. fid, vid);
  719. return 0;
  720. }
  721. if ((fid < HI_FID_TABLE_BOTTOM) && (data->currfid < HI_FID_TABLE_BOTTOM)) {
  722. printk(KERN_ERR PFX
  723. "ignoring illegal change in lo freq table-%x to 0x%x\n",
  724. data->currfid, fid);
  725. return 1;
  726. }
  727. dprintk("cpu %d, changing to fid 0x%x, vid 0x%x\n",
  728. smp_processor_id(), fid, vid);
  729. freqs.cpu = data->cpu;
  730. freqs.old = find_khz_freq_from_fid(data->currfid);
  731. freqs.new = find_khz_freq_from_fid(fid);
  732. for_each_cpu_mask(i, cpu_core_map[data->cpu]) {
  733. freqs.cpu = i;
  734. cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE);
  735. }
  736. res = transition_fid_vid(data, fid, vid);
  737. freqs.new = find_khz_freq_from_fid(data->currfid);
  738. for_each_cpu_mask(i, cpu_core_map[data->cpu]) {
  739. freqs.cpu = i;
  740. cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE);
  741. }
  742. return res;
  743. }
  744. /* Driver entry point to switch to the target frequency */
  745. static int powernowk8_target(struct cpufreq_policy *pol, unsigned targfreq, unsigned relation)
  746. {
  747. cpumask_t oldmask = CPU_MASK_ALL;
  748. struct powernow_k8_data *data = powernow_data[pol->cpu];
  749. u32 checkfid = data->currfid;
  750. u32 checkvid = data->currvid;
  751. unsigned int newstate;
  752. int ret = -EIO;
  753. int i;
  754. /* only run on specific CPU from here on */
  755. oldmask = current->cpus_allowed;
  756. set_cpus_allowed(current, cpumask_of_cpu(pol->cpu));
  757. schedule();
  758. if (smp_processor_id() != pol->cpu) {
  759. printk(KERN_ERR "limiting to cpu %u failed\n", pol->cpu);
  760. goto err_out;
  761. }
  762. if (pending_bit_stuck()) {
  763. printk(KERN_ERR PFX "failing targ, change pending bit set\n");
  764. goto err_out;
  765. }
  766. dprintk("targ: cpu %d, %d kHz, min %d, max %d, relation %d\n",
  767. pol->cpu, targfreq, pol->min, pol->max, relation);
  768. if (query_current_values_with_pending_wait(data)) {
  769. ret = -EIO;
  770. goto err_out;
  771. }
  772. dprintk("targ: curr fid 0x%x, vid 0x%x\n",
  773. data->currfid, data->currvid);
  774. if ((checkvid != data->currvid) || (checkfid != data->currfid)) {
  775. printk(KERN_INFO PFX
  776. "error - out of sync, fix 0x%x 0x%x, vid 0x%x 0x%x\n",
  777. checkfid, data->currfid, checkvid, data->currvid);
  778. }
  779. if (cpufreq_frequency_table_target(pol, data->powernow_table, targfreq, relation, &newstate))
  780. goto err_out;
  781. down(&fidvid_sem);
  782. powernow_k8_acpi_pst_values(data, newstate);
  783. if (transition_frequency(data, newstate)) {
  784. printk(KERN_ERR PFX "transition frequency failed\n");
  785. ret = 1;
  786. up(&fidvid_sem);
  787. goto err_out;
  788. }
  789. /* Update all the fid/vids of our siblings */
  790. for_each_cpu_mask(i, cpu_core_map[pol->cpu]) {
  791. powernow_data[i]->currvid = data->currvid;
  792. powernow_data[i]->currfid = data->currfid;
  793. }
  794. up(&fidvid_sem);
  795. pol->cur = find_khz_freq_from_fid(data->currfid);
  796. ret = 0;
  797. err_out:
  798. set_cpus_allowed(current, oldmask);
  799. schedule();
  800. return ret;
  801. }
  802. /* Driver entry point to verify the policy and range of frequencies */
  803. static int powernowk8_verify(struct cpufreq_policy *pol)
  804. {
  805. struct powernow_k8_data *data = powernow_data[pol->cpu];
  806. return cpufreq_frequency_table_verify(pol, data->powernow_table);
  807. }
  808. /* per CPU init entry point to the driver */
  809. static int __init powernowk8_cpu_init(struct cpufreq_policy *pol)
  810. {
  811. struct powernow_k8_data *data;
  812. cpumask_t oldmask = CPU_MASK_ALL;
  813. int rc, i;
  814. if (!check_supported_cpu(pol->cpu))
  815. return -ENODEV;
  816. data = kmalloc(sizeof(struct powernow_k8_data), GFP_KERNEL);
  817. if (!data) {
  818. printk(KERN_ERR PFX "unable to alloc powernow_k8_data");
  819. return -ENOMEM;
  820. }
  821. memset(data,0,sizeof(struct powernow_k8_data));
  822. data->cpu = pol->cpu;
  823. if (powernow_k8_cpu_init_acpi(data)) {
  824. /*
  825. * Use the PSB BIOS structure. This is only availabe on
  826. * an UP version, and is deprecated by AMD.
  827. */
  828. if ((num_online_cpus() != 1) || (num_possible_cpus() != 1)) {
  829. printk(KERN_ERR PFX "MP systems not supported by PSB BIOS structure\n");
  830. kfree(data);
  831. return -ENODEV;
  832. }
  833. if (pol->cpu != 0) {
  834. printk(KERN_ERR PFX "init not cpu 0\n");
  835. kfree(data);
  836. return -ENODEV;
  837. }
  838. rc = find_psb_table(data);
  839. if (rc) {
  840. kfree(data);
  841. return -ENODEV;
  842. }
  843. }
  844. /* only run on specific CPU from here on */
  845. oldmask = current->cpus_allowed;
  846. set_cpus_allowed(current, cpumask_of_cpu(pol->cpu));
  847. schedule();
  848. if (smp_processor_id() != pol->cpu) {
  849. printk(KERN_ERR "limiting to cpu %u failed\n", pol->cpu);
  850. goto err_out;
  851. }
  852. if (pending_bit_stuck()) {
  853. printk(KERN_ERR PFX "failing init, change pending bit set\n");
  854. goto err_out;
  855. }
  856. if (query_current_values_with_pending_wait(data))
  857. goto err_out;
  858. fidvid_msr_init();
  859. /* run on any CPU again */
  860. set_cpus_allowed(current, oldmask);
  861. schedule();
  862. pol->governor = CPUFREQ_DEFAULT_GOVERNOR;
  863. pol->cpus = cpu_core_map[pol->cpu];
  864. /* Take a crude guess here.
  865. * That guess was in microseconds, so multiply with 1000 */
  866. pol->cpuinfo.transition_latency = (((data->rvo + 8) * data->vstable * VST_UNITS_20US)
  867. + (3 * (1 << data->irt) * 10)) * 1000;
  868. pol->cur = find_khz_freq_from_fid(data->currfid);
  869. dprintk("policy current frequency %d kHz\n", pol->cur);
  870. /* min/max the cpu is capable of */
  871. if (cpufreq_frequency_table_cpuinfo(pol, data->powernow_table)) {
  872. printk(KERN_ERR PFX "invalid powernow_table\n");
  873. powernow_k8_cpu_exit_acpi(data);
  874. kfree(data->powernow_table);
  875. kfree(data);
  876. return -EINVAL;
  877. }
  878. cpufreq_frequency_table_get_attr(data->powernow_table, pol->cpu);
  879. printk("cpu_init done, current fid 0x%x, vid 0x%x\n",
  880. data->currfid, data->currvid);
  881. for_each_cpu_mask(i, cpu_core_map[pol->cpu]) {
  882. powernow_data[i] = data;
  883. }
  884. return 0;
  885. err_out:
  886. set_cpus_allowed(current, oldmask);
  887. schedule();
  888. powernow_k8_cpu_exit_acpi(data);
  889. kfree(data);
  890. return -ENODEV;
  891. }
  892. static int __devexit powernowk8_cpu_exit (struct cpufreq_policy *pol)
  893. {
  894. struct powernow_k8_data *data = powernow_data[pol->cpu];
  895. if (!data)
  896. return -EINVAL;
  897. powernow_k8_cpu_exit_acpi(data);
  898. cpufreq_frequency_table_put_attr(pol->cpu);
  899. kfree(data->powernow_table);
  900. kfree(data);
  901. return 0;
  902. }
  903. static unsigned int powernowk8_get (unsigned int cpu)
  904. {
  905. struct powernow_k8_data *data = powernow_data[cpu];
  906. cpumask_t oldmask = current->cpus_allowed;
  907. unsigned int khz = 0;
  908. set_cpus_allowed(current, cpumask_of_cpu(cpu));
  909. if (smp_processor_id() != cpu) {
  910. printk(KERN_ERR PFX "limiting to CPU %d failed in powernowk8_get\n", cpu);
  911. set_cpus_allowed(current, oldmask);
  912. return 0;
  913. }
  914. preempt_disable();
  915. if (query_current_values_with_pending_wait(data))
  916. goto out;
  917. khz = find_khz_freq_from_fid(data->currfid);
  918. out:
  919. preempt_enable_no_resched();
  920. set_cpus_allowed(current, oldmask);
  921. return khz;
  922. }
  923. static struct freq_attr* powernow_k8_attr[] = {
  924. &cpufreq_freq_attr_scaling_available_freqs,
  925. NULL,
  926. };
  927. static struct cpufreq_driver cpufreq_amd64_driver = {
  928. .verify = powernowk8_verify,
  929. .target = powernowk8_target,
  930. .init = powernowk8_cpu_init,
  931. .exit = __devexit_p(powernowk8_cpu_exit),
  932. .get = powernowk8_get,
  933. .name = "powernow-k8",
  934. .owner = THIS_MODULE,
  935. .attr = powernow_k8_attr,
  936. };
  937. /* driver entry point for init */
  938. static int __init powernowk8_init(void)
  939. {
  940. unsigned int i, supported_cpus = 0;
  941. for (i=0; i<NR_CPUS; i++) {
  942. if (!cpu_online(i))
  943. continue;
  944. if (check_supported_cpu(i))
  945. supported_cpus++;
  946. }
  947. if (supported_cpus == num_online_cpus()) {
  948. printk(KERN_INFO PFX "Found %d AMD Athlon 64 / Opteron processors (" VERSION ")\n",
  949. supported_cpus);
  950. return cpufreq_register_driver(&cpufreq_amd64_driver);
  951. }
  952. return -ENODEV;
  953. }
  954. /* driver entry point for term */
  955. static void __exit powernowk8_exit(void)
  956. {
  957. dprintk("exit\n");
  958. cpufreq_unregister_driver(&cpufreq_amd64_driver);
  959. }
  960. MODULE_AUTHOR("Paul Devriendt <paul.devriendt@amd.com> and Mark Langsdorf <mark.langsdorf@amd.com.");
  961. MODULE_DESCRIPTION("AMD Athlon 64 and Opteron processor frequency driver.");
  962. MODULE_LICENSE("GPL");
  963. late_initcall(powernowk8_init);
  964. module_exit(powernowk8_exit);