board-h3.c 14 KB

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  1. /*
  2. * linux/arch/arm/mach-omap1/board-h3.c
  3. *
  4. * This file contains OMAP1710 H3 specific code.
  5. *
  6. * Copyright (C) 2004 Texas Instruments, Inc.
  7. * Copyright (C) 2002 MontaVista Software, Inc.
  8. * Copyright (C) 2001 RidgeRun, Inc.
  9. * Author: RidgeRun, Inc.
  10. * Greg Lonnon (glonnon@ridgerun.com) or info@ridgerun.com
  11. *
  12. * This program is free software; you can redistribute it and/or modify
  13. * it under the terms of the GNU General Public License version 2 as
  14. * published by the Free Software Foundation.
  15. */
  16. #include <linux/types.h>
  17. #include <linux/init.h>
  18. #include <linux/major.h>
  19. #include <linux/kernel.h>
  20. #include <linux/platform_device.h>
  21. #include <linux/errno.h>
  22. #include <linux/workqueue.h>
  23. #include <linux/i2c.h>
  24. #include <linux/mtd/mtd.h>
  25. #include <linux/mtd/nand.h>
  26. #include <linux/mtd/partitions.h>
  27. #include <linux/input.h>
  28. #include <linux/i2c/tps65010.h>
  29. #include <asm/setup.h>
  30. #include <asm/page.h>
  31. #include <asm/hardware.h>
  32. #include <asm/gpio.h>
  33. #include <asm/mach-types.h>
  34. #include <asm/mach/arch.h>
  35. #include <asm/mach/flash.h>
  36. #include <asm/mach/map.h>
  37. #include <asm/arch/gpioexpander.h>
  38. #include <asm/arch/irqs.h>
  39. #include <asm/arch/mux.h>
  40. #include <asm/arch/tc.h>
  41. #include <asm/arch/nand.h>
  42. #include <asm/arch/irda.h>
  43. #include <asm/arch/usb.h>
  44. #include <asm/arch/keypad.h>
  45. #include <asm/arch/dma.h>
  46. #include <asm/arch/common.h>
  47. #include <asm/arch/mcbsp.h>
  48. #include <asm/arch/omap-alsa.h>
  49. extern int omap_gpio_init(void);
  50. static int h3_keymap[] = {
  51. KEY(0, 0, KEY_LEFT),
  52. KEY(0, 1, KEY_RIGHT),
  53. KEY(0, 2, KEY_3),
  54. KEY(0, 3, KEY_F10),
  55. KEY(0, 4, KEY_F5),
  56. KEY(0, 5, KEY_9),
  57. KEY(1, 0, KEY_DOWN),
  58. KEY(1, 1, KEY_UP),
  59. KEY(1, 2, KEY_2),
  60. KEY(1, 3, KEY_F9),
  61. KEY(1, 4, KEY_F7),
  62. KEY(1, 5, KEY_0),
  63. KEY(2, 0, KEY_ENTER),
  64. KEY(2, 1, KEY_6),
  65. KEY(2, 2, KEY_1),
  66. KEY(2, 3, KEY_F2),
  67. KEY(2, 4, KEY_F6),
  68. KEY(2, 5, KEY_HOME),
  69. KEY(3, 0, KEY_8),
  70. KEY(3, 1, KEY_5),
  71. KEY(3, 2, KEY_F12),
  72. KEY(3, 3, KEY_F3),
  73. KEY(3, 4, KEY_F8),
  74. KEY(3, 5, KEY_END),
  75. KEY(4, 0, KEY_7),
  76. KEY(4, 1, KEY_4),
  77. KEY(4, 2, KEY_F11),
  78. KEY(4, 3, KEY_F1),
  79. KEY(4, 4, KEY_F4),
  80. KEY(4, 5, KEY_ESC),
  81. KEY(5, 0, KEY_F13),
  82. KEY(5, 1, KEY_F14),
  83. KEY(5, 2, KEY_F15),
  84. KEY(5, 3, KEY_F16),
  85. KEY(5, 4, KEY_SLEEP),
  86. 0
  87. };
  88. static struct mtd_partition nor_partitions[] = {
  89. /* bootloader (U-Boot, etc) in first sector */
  90. {
  91. .name = "bootloader",
  92. .offset = 0,
  93. .size = SZ_128K,
  94. .mask_flags = MTD_WRITEABLE, /* force read-only */
  95. },
  96. /* bootloader params in the next sector */
  97. {
  98. .name = "params",
  99. .offset = MTDPART_OFS_APPEND,
  100. .size = SZ_128K,
  101. .mask_flags = 0,
  102. },
  103. /* kernel */
  104. {
  105. .name = "kernel",
  106. .offset = MTDPART_OFS_APPEND,
  107. .size = SZ_2M,
  108. .mask_flags = 0
  109. },
  110. /* file system */
  111. {
  112. .name = "filesystem",
  113. .offset = MTDPART_OFS_APPEND,
  114. .size = MTDPART_SIZ_FULL,
  115. .mask_flags = 0
  116. }
  117. };
  118. static struct flash_platform_data nor_data = {
  119. .map_name = "cfi_probe",
  120. .width = 2,
  121. .parts = nor_partitions,
  122. .nr_parts = ARRAY_SIZE(nor_partitions),
  123. };
  124. static struct resource nor_resource = {
  125. /* This is on CS3, wherever it's mapped */
  126. .flags = IORESOURCE_MEM,
  127. };
  128. static struct platform_device nor_device = {
  129. .name = "omapflash",
  130. .id = 0,
  131. .dev = {
  132. .platform_data = &nor_data,
  133. },
  134. .num_resources = 1,
  135. .resource = &nor_resource,
  136. };
  137. static struct mtd_partition nand_partitions[] = {
  138. #if 0
  139. /* REVISIT: enable these partitions if you make NAND BOOT work */
  140. {
  141. .name = "xloader",
  142. .offset = 0,
  143. .size = 64 * 1024,
  144. .mask_flags = MTD_WRITEABLE, /* force read-only */
  145. },
  146. {
  147. .name = "bootloader",
  148. .offset = MTDPART_OFS_APPEND,
  149. .size = 256 * 1024,
  150. .mask_flags = MTD_WRITEABLE, /* force read-only */
  151. },
  152. {
  153. .name = "params",
  154. .offset = MTDPART_OFS_APPEND,
  155. .size = 192 * 1024,
  156. },
  157. {
  158. .name = "kernel",
  159. .offset = MTDPART_OFS_APPEND,
  160. .size = 2 * SZ_1M,
  161. },
  162. #endif
  163. {
  164. .name = "filesystem",
  165. .size = MTDPART_SIZ_FULL,
  166. .offset = MTDPART_OFS_APPEND,
  167. },
  168. };
  169. /* dip switches control NAND chip access: 8 bit, 16 bit, or neither */
  170. static struct omap_nand_platform_data nand_data = {
  171. .options = NAND_SAMSUNG_LP_OPTIONS,
  172. .parts = nand_partitions,
  173. .nr_parts = ARRAY_SIZE(nand_partitions),
  174. };
  175. static struct resource nand_resource = {
  176. .flags = IORESOURCE_MEM,
  177. };
  178. static struct platform_device nand_device = {
  179. .name = "omapnand",
  180. .id = 0,
  181. .dev = {
  182. .platform_data = &nand_data,
  183. },
  184. .num_resources = 1,
  185. .resource = &nand_resource,
  186. };
  187. static struct resource smc91x_resources[] = {
  188. [0] = {
  189. .start = OMAP1710_ETHR_START, /* Physical */
  190. .end = OMAP1710_ETHR_START + 0xf,
  191. .flags = IORESOURCE_MEM,
  192. },
  193. [1] = {
  194. .start = OMAP_GPIO_IRQ(40),
  195. .end = OMAP_GPIO_IRQ(40),
  196. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWEDGE,
  197. },
  198. };
  199. static struct platform_device smc91x_device = {
  200. .name = "smc91x",
  201. .id = 0,
  202. .num_resources = ARRAY_SIZE(smc91x_resources),
  203. .resource = smc91x_resources,
  204. };
  205. #define GPTIMER_BASE 0xFFFB1400
  206. #define GPTIMER_REGS(x) (0xFFFB1400 + (x * 0x800))
  207. #define GPTIMER_REGS_SIZE 0x46
  208. static struct resource intlat_resources[] = {
  209. [0] = {
  210. .start = GPTIMER_REGS(0), /* Physical */
  211. .end = GPTIMER_REGS(0) + GPTIMER_REGS_SIZE,
  212. .flags = IORESOURCE_MEM,
  213. },
  214. [1] = {
  215. .start = INT_1610_GPTIMER1,
  216. .end = INT_1610_GPTIMER1,
  217. .flags = IORESOURCE_IRQ,
  218. },
  219. };
  220. static struct platform_device intlat_device = {
  221. .name = "omap_intlat",
  222. .id = 0,
  223. .num_resources = ARRAY_SIZE(intlat_resources),
  224. .resource = intlat_resources,
  225. };
  226. static struct resource h3_kp_resources[] = {
  227. [0] = {
  228. .start = INT_KEYBOARD,
  229. .end = INT_KEYBOARD,
  230. .flags = IORESOURCE_IRQ,
  231. },
  232. };
  233. static struct omap_kp_platform_data h3_kp_data = {
  234. .rows = 8,
  235. .cols = 8,
  236. .keymap = h3_keymap,
  237. .keymapsize = ARRAY_SIZE(h3_keymap),
  238. .rep = 1,
  239. .delay = 9,
  240. .dbounce = 1,
  241. };
  242. static struct platform_device h3_kp_device = {
  243. .name = "omap-keypad",
  244. .id = -1,
  245. .dev = {
  246. .platform_data = &h3_kp_data,
  247. },
  248. .num_resources = ARRAY_SIZE(h3_kp_resources),
  249. .resource = h3_kp_resources,
  250. };
  251. /* Select between the IrDA and aGPS module
  252. */
  253. static int h3_select_irda(struct device *dev, int state)
  254. {
  255. unsigned char expa;
  256. int err = 0;
  257. if ((err = read_gpio_expa(&expa, 0x26))) {
  258. printk(KERN_ERR "Error reading from I/O EXPANDER \n");
  259. return err;
  260. }
  261. /* 'P6' enable/disable IRDA_TX and IRDA_RX */
  262. if (state & IR_SEL) { /* IrDA */
  263. if ((err = write_gpio_expa(expa | 0x40, 0x26))) {
  264. printk(KERN_ERR "Error writing to I/O EXPANDER \n");
  265. return err;
  266. }
  267. } else {
  268. if ((err = write_gpio_expa(expa & ~0x40, 0x26))) {
  269. printk(KERN_ERR "Error writing to I/O EXPANDER \n");
  270. return err;
  271. }
  272. }
  273. return err;
  274. }
  275. static void set_trans_mode(struct work_struct *work)
  276. {
  277. struct omap_irda_config *irda_config =
  278. container_of(work, struct omap_irda_config, gpio_expa.work);
  279. int mode = irda_config->mode;
  280. unsigned char expa;
  281. int err = 0;
  282. if ((err = read_gpio_expa(&expa, 0x27)) != 0) {
  283. printk(KERN_ERR "Error reading from I/O expander\n");
  284. }
  285. expa &= ~0x03;
  286. if (mode & IR_SIRMODE) {
  287. expa |= 0x01;
  288. } else { /* MIR/FIR */
  289. expa |= 0x03;
  290. }
  291. if ((err = write_gpio_expa(expa, 0x27)) != 0) {
  292. printk(KERN_ERR "Error writing to I/O expander\n");
  293. }
  294. }
  295. static int h3_transceiver_mode(struct device *dev, int mode)
  296. {
  297. struct omap_irda_config *irda_config = dev->platform_data;
  298. irda_config->mode = mode;
  299. cancel_delayed_work(&irda_config->gpio_expa);
  300. PREPARE_DELAYED_WORK(&irda_config->gpio_expa, set_trans_mode);
  301. schedule_delayed_work(&irda_config->gpio_expa, 0);
  302. return 0;
  303. }
  304. static struct omap_irda_config h3_irda_data = {
  305. .transceiver_cap = IR_SIRMODE | IR_MIRMODE | IR_FIRMODE,
  306. .transceiver_mode = h3_transceiver_mode,
  307. .select_irda = h3_select_irda,
  308. .rx_channel = OMAP_DMA_UART3_RX,
  309. .tx_channel = OMAP_DMA_UART3_TX,
  310. .dest_start = UART3_THR,
  311. .src_start = UART3_RHR,
  312. .tx_trigger = 0,
  313. .rx_trigger = 0,
  314. };
  315. static struct resource h3_irda_resources[] = {
  316. [0] = {
  317. .start = INT_UART3,
  318. .end = INT_UART3,
  319. .flags = IORESOURCE_IRQ,
  320. },
  321. };
  322. static u64 irda_dmamask = 0xffffffff;
  323. static struct platform_device h3_irda_device = {
  324. .name = "omapirda",
  325. .id = 0,
  326. .dev = {
  327. .platform_data = &h3_irda_data,
  328. .dma_mask = &irda_dmamask,
  329. },
  330. .num_resources = ARRAY_SIZE(h3_irda_resources),
  331. .resource = h3_irda_resources,
  332. };
  333. static struct platform_device h3_lcd_device = {
  334. .name = "lcd_h3",
  335. .id = -1,
  336. };
  337. static struct omap_mcbsp_reg_cfg mcbsp_regs = {
  338. .spcr2 = FREE | FRST | GRST | XRST | XINTM(3),
  339. .spcr1 = RINTM(3) | RRST,
  340. .rcr2 = RPHASE | RFRLEN2(OMAP_MCBSP_WORD_8) |
  341. RWDLEN2(OMAP_MCBSP_WORD_16) | RDATDLY(1),
  342. .rcr1 = RFRLEN1(OMAP_MCBSP_WORD_8) | RWDLEN1(OMAP_MCBSP_WORD_16),
  343. .xcr2 = XPHASE | XFRLEN2(OMAP_MCBSP_WORD_8) |
  344. XWDLEN2(OMAP_MCBSP_WORD_16) | XDATDLY(1) | XFIG,
  345. .xcr1 = XFRLEN1(OMAP_MCBSP_WORD_8) | XWDLEN1(OMAP_MCBSP_WORD_16),
  346. .srgr1 = FWID(15),
  347. .srgr2 = GSYNC | CLKSP | FSGM | FPER(31),
  348. .pcr0 = CLKRM | SCLKME | FSXP | FSRP | CLKXP | CLKRP,
  349. /*.pcr0 = CLKXP | CLKRP,*/ /* mcbsp: slave */
  350. };
  351. static struct omap_alsa_codec_config alsa_config = {
  352. .name = "H3 TSC2101",
  353. .mcbsp_regs_alsa = &mcbsp_regs,
  354. .codec_configure_dev = NULL, /* tsc2101_configure, */
  355. .codec_set_samplerate = NULL, /* tsc2101_set_samplerate, */
  356. .codec_clock_setup = NULL, /* tsc2101_clock_setup, */
  357. .codec_clock_on = NULL, /* tsc2101_clock_on, */
  358. .codec_clock_off = NULL, /* tsc2101_clock_off, */
  359. .get_default_samplerate = NULL, /* tsc2101_get_default_samplerate, */
  360. };
  361. static struct platform_device h3_mcbsp1_device = {
  362. .name = "omap_alsa_mcbsp",
  363. .id = 1,
  364. .dev = {
  365. .platform_data = &alsa_config,
  366. },
  367. };
  368. static struct platform_device *devices[] __initdata = {
  369. &nor_device,
  370. &nand_device,
  371. &smc91x_device,
  372. &intlat_device,
  373. &h3_irda_device,
  374. &h3_kp_device,
  375. &h3_lcd_device,
  376. &h3_mcbsp1_device,
  377. };
  378. static struct omap_usb_config h3_usb_config __initdata = {
  379. /* usb1 has a Mini-AB port and external isp1301 transceiver */
  380. .otg = 2,
  381. #ifdef CONFIG_USB_GADGET_OMAP
  382. .hmc_mode = 19, /* 0:host(off) 1:dev|otg 2:disabled */
  383. #elif defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE)
  384. /* NONSTANDARD CABLE NEEDED (B-to-Mini-B) */
  385. .hmc_mode = 20, /* 1:dev|otg(off) 1:host 2:disabled */
  386. #endif
  387. .pins[1] = 3,
  388. };
  389. static struct omap_mmc_config h3_mmc_config __initdata = {
  390. .mmc[0] = {
  391. .enabled = 1,
  392. .wire4 = 1,
  393. },
  394. };
  395. extern struct omap_mmc_platform_data h3_mmc_data;
  396. static struct omap_uart_config h3_uart_config __initdata = {
  397. .enabled_uarts = ((1 << 0) | (1 << 1) | (1 << 2)),
  398. };
  399. static struct omap_lcd_config h3_lcd_config __initdata = {
  400. .ctrl_name = "internal",
  401. };
  402. static struct omap_board_config_kernel h3_config[] = {
  403. { OMAP_TAG_USB, &h3_usb_config },
  404. { OMAP_TAG_MMC, &h3_mmc_config },
  405. { OMAP_TAG_UART, &h3_uart_config },
  406. { OMAP_TAG_LCD, &h3_lcd_config },
  407. };
  408. static struct i2c_board_info __initdata h3_i2c_board_info[] = {
  409. {
  410. I2C_BOARD_INFO("tps65010", 0x48),
  411. .type = "tps65013",
  412. /* .irq = OMAP_GPIO_IRQ(??), */
  413. },
  414. /* TODO when driver support is ready:
  415. * - isp1301 OTG transceiver
  416. * - optional ov9640 camera sensor at 0x30
  417. * - ...
  418. */
  419. };
  420. static struct omap_gpio_switch h3_gpio_switches[] __initdata = {
  421. {
  422. .name = "mmc_slot",
  423. .gpio = OMAP_MPUIO(1),
  424. .type = OMAP_GPIO_SWITCH_TYPE_COVER,
  425. .debounce_rising = 100,
  426. .debounce_falling = 0,
  427. .notify = h3_mmc_slot_cover_handler,
  428. .notify_data = NULL,
  429. },
  430. };
  431. #define H3_NAND_RB_GPIO_PIN 10
  432. static int nand_dev_ready(struct omap_nand_platform_data *data)
  433. {
  434. return omap_get_gpio_datain(H3_NAND_RB_GPIO_PIN);
  435. }
  436. static void __init h3_init(void)
  437. {
  438. /* Here we assume the NOR boot config: NOR on CS3 (possibly swapped
  439. * to address 0 by a dip switch), NAND on CS2B. The NAND driver will
  440. * notice whether a NAND chip is enabled at probe time.
  441. *
  442. * H3 support NAND-boot, with a dip switch to put NOR on CS2B and NAND
  443. * (which on H2 may be 16bit) on CS3. Try detecting that in code here,
  444. * to avoid probing every possible flash configuration...
  445. */
  446. nor_resource.end = nor_resource.start = omap_cs3_phys();
  447. nor_resource.end += SZ_32M - 1;
  448. nand_resource.end = nand_resource.start = OMAP_CS2B_PHYS;
  449. nand_resource.end += SZ_4K - 1;
  450. if (!(omap_request_gpio(H3_NAND_RB_GPIO_PIN)))
  451. nand_data.dev_ready = nand_dev_ready;
  452. /* GPIO10 Func_MUX_CTRL reg bit 29:27, Configure V2 to mode1 as GPIO */
  453. /* GPIO10 pullup/down register, Enable pullup on GPIO10 */
  454. omap_cfg_reg(V2_1710_GPIO10);
  455. platform_add_devices(devices, ARRAY_SIZE(devices));
  456. omap_board_config = h3_config;
  457. omap_board_config_size = ARRAY_SIZE(h3_config);
  458. omap_serial_init();
  459. omap_register_i2c_bus(1, 100, h3_i2c_board_info,
  460. ARRAY_SIZE(h3_i2c_board_info));
  461. h3_mmc_init();
  462. }
  463. static void __init h3_init_smc91x(void)
  464. {
  465. omap_cfg_reg(W15_1710_GPIO40);
  466. if (omap_request_gpio(40) < 0) {
  467. printk("Error requesting gpio 40 for smc91x irq\n");
  468. return;
  469. }
  470. }
  471. static void __init h3_init_irq(void)
  472. {
  473. omap1_init_common_hw();
  474. omap_init_irq();
  475. omap_gpio_init();
  476. h3_init_smc91x();
  477. }
  478. static void __init h3_map_io(void)
  479. {
  480. omap1_map_common_io();
  481. }
  482. #ifdef CONFIG_TPS65010
  483. static int __init h3_tps_init(void)
  484. {
  485. if (!machine_is_omap_h3())
  486. return 0;
  487. /* gpio4 for SD, gpio3 for VDD_DSP */
  488. /* FIXME send power to DSP iff it's configured */
  489. /* Enable LOW_PWR */
  490. tps65013_set_low_pwr(ON);
  491. return 0;
  492. }
  493. fs_initcall(h3_tps_init);
  494. #endif
  495. MACHINE_START(OMAP_H3, "TI OMAP1710 H3 board")
  496. /* Maintainer: Texas Instruments, Inc. */
  497. .phys_io = 0xfff00000,
  498. .io_pg_offst = ((0xfef00000) >> 18) & 0xfffc,
  499. .boot_params = 0x10000100,
  500. .map_io = h3_map_io,
  501. .init_irq = h3_init_irq,
  502. .init_machine = h3_init,
  503. .timer = &omap_timer,
  504. MACHINE_END