mpparse.c 25 KB

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  1. /*
  2. * Intel Multiprocessor Specification 1.1 and 1.4
  3. * compliant MP-table parsing routines.
  4. *
  5. * (c) 1995 Alan Cox, Building #3 <alan@lxorguk.ukuu.org.uk>
  6. * (c) 1998, 1999, 2000 Ingo Molnar <mingo@redhat.com>
  7. * (c) 2008 Alexey Starikovskiy <astarikovskiy@suse.de>
  8. */
  9. #include <linux/mm.h>
  10. #include <linux/init.h>
  11. #include <linux/delay.h>
  12. #include <linux/bootmem.h>
  13. #include <linux/kernel_stat.h>
  14. #include <linux/mc146818rtc.h>
  15. #include <linux/bitops.h>
  16. #include <linux/acpi.h>
  17. #include <linux/module.h>
  18. #include <linux/smp.h>
  19. #include <asm/mtrr.h>
  20. #include <asm/mpspec.h>
  21. #include <asm/pgalloc.h>
  22. #include <asm/io_apic.h>
  23. #include <asm/proto.h>
  24. #include <asm/bios_ebda.h>
  25. #include <asm/e820.h>
  26. #include <asm/trampoline.h>
  27. #include <asm/setup.h>
  28. #include <mach_apic.h>
  29. #ifdef CONFIG_X86_32
  30. #include <mach_apicdef.h>
  31. #include <mach_mpparse.h>
  32. #endif
  33. /*
  34. * Checksum an MP configuration block.
  35. */
  36. static int __init mpf_checksum(unsigned char *mp, int len)
  37. {
  38. int sum = 0;
  39. while (len--)
  40. sum += *mp++;
  41. return sum & 0xFF;
  42. }
  43. static void __init MP_processor_info(struct mpc_cpu *m)
  44. {
  45. int apicid;
  46. char *bootup_cpu = "";
  47. if (!(m->cpuflag & CPU_ENABLED)) {
  48. disabled_cpus++;
  49. return;
  50. }
  51. if (x86_quirks->mpc_apic_id)
  52. apicid = x86_quirks->mpc_apic_id(m);
  53. else
  54. apicid = m->apicid;
  55. if (m->cpuflag & CPU_BOOTPROCESSOR) {
  56. bootup_cpu = " (Bootup-CPU)";
  57. boot_cpu_physical_apicid = m->apicid;
  58. }
  59. printk(KERN_INFO "Processor #%d%s\n", m->apicid, bootup_cpu);
  60. generic_processor_info(apicid, m->apicver);
  61. }
  62. #ifdef CONFIG_X86_IO_APIC
  63. static void __init MP_bus_info(struct mpc_bus *m)
  64. {
  65. char str[7];
  66. memcpy(str, m->bustype, 6);
  67. str[6] = 0;
  68. if (x86_quirks->mpc_oem_bus_info)
  69. x86_quirks->mpc_oem_bus_info(m, str);
  70. else
  71. apic_printk(APIC_VERBOSE, "Bus #%d is %s\n", m->busid, str);
  72. #if MAX_MP_BUSSES < 256
  73. if (m->busid >= MAX_MP_BUSSES) {
  74. printk(KERN_WARNING "MP table busid value (%d) for bustype %s "
  75. " is too large, max. supported is %d\n",
  76. m->busid, str, MAX_MP_BUSSES - 1);
  77. return;
  78. }
  79. #endif
  80. if (strncmp(str, BUSTYPE_ISA, sizeof(BUSTYPE_ISA) - 1) == 0) {
  81. set_bit(m->busid, mp_bus_not_pci);
  82. #if defined(CONFIG_EISA) || defined(CONFIG_MCA)
  83. mp_bus_id_to_type[m->busid] = MP_BUS_ISA;
  84. #endif
  85. } else if (strncmp(str, BUSTYPE_PCI, sizeof(BUSTYPE_PCI) - 1) == 0) {
  86. if (x86_quirks->mpc_oem_pci_bus)
  87. x86_quirks->mpc_oem_pci_bus(m);
  88. clear_bit(m->busid, mp_bus_not_pci);
  89. #if defined(CONFIG_EISA) || defined(CONFIG_MCA)
  90. mp_bus_id_to_type[m->busid] = MP_BUS_PCI;
  91. } else if (strncmp(str, BUSTYPE_EISA, sizeof(BUSTYPE_EISA) - 1) == 0) {
  92. mp_bus_id_to_type[m->busid] = MP_BUS_EISA;
  93. } else if (strncmp(str, BUSTYPE_MCA, sizeof(BUSTYPE_MCA) - 1) == 0) {
  94. mp_bus_id_to_type[m->busid] = MP_BUS_MCA;
  95. #endif
  96. } else
  97. printk(KERN_WARNING "Unknown bustype %s - ignoring\n", str);
  98. }
  99. #endif
  100. #ifdef CONFIG_X86_IO_APIC
  101. static int bad_ioapic(unsigned long address)
  102. {
  103. if (nr_ioapics >= MAX_IO_APICS) {
  104. printk(KERN_ERR "ERROR: Max # of I/O APICs (%d) exceeded "
  105. "(found %d)\n", MAX_IO_APICS, nr_ioapics);
  106. panic("Recompile kernel with bigger MAX_IO_APICS!\n");
  107. }
  108. if (!address) {
  109. printk(KERN_ERR "WARNING: Bogus (zero) I/O APIC address"
  110. " found in table, skipping!\n");
  111. return 1;
  112. }
  113. return 0;
  114. }
  115. static void __init MP_ioapic_info(struct mpc_ioapic *m)
  116. {
  117. if (!(m->flags & MPC_APIC_USABLE))
  118. return;
  119. printk(KERN_INFO "I/O APIC #%d Version %d at 0x%X.\n",
  120. m->apicid, m->apicver, m->apicaddr);
  121. if (bad_ioapic(m->apicaddr))
  122. return;
  123. mp_ioapics[nr_ioapics].mp_apicaddr = m->apicaddr;
  124. mp_ioapics[nr_ioapics].mp_apicid = m->apicid;
  125. mp_ioapics[nr_ioapics].mp_type = m->type;
  126. mp_ioapics[nr_ioapics].mp_apicver = m->apicver;
  127. mp_ioapics[nr_ioapics].mp_flags = m->flags;
  128. nr_ioapics++;
  129. }
  130. static void print_MP_intsrc_info(struct mpc_intsrc *m)
  131. {
  132. apic_printk(APIC_VERBOSE, "Int: type %d, pol %d, trig %d, bus %02x,"
  133. " IRQ %02x, APIC ID %x, APIC INT %02x\n",
  134. m->irqtype, m->irqflag & 3, (m->irqflag >> 2) & 3, m->srcbus,
  135. m->srcbusirq, m->dstapic, m->dstirq);
  136. }
  137. static void __init print_mp_irq_info(struct mp_config_intsrc *mp_irq)
  138. {
  139. apic_printk(APIC_VERBOSE, "Int: type %d, pol %d, trig %d, bus %02x,"
  140. " IRQ %02x, APIC ID %x, APIC INT %02x\n",
  141. mp_irq->mp_irqtype, mp_irq->mp_irqflag & 3,
  142. (mp_irq->mp_irqflag >> 2) & 3, mp_irq->mp_srcbus,
  143. mp_irq->mp_srcbusirq, mp_irq->mp_dstapic, mp_irq->mp_dstirq);
  144. }
  145. static void __init assign_to_mp_irq(struct mpc_intsrc *m,
  146. struct mp_config_intsrc *mp_irq)
  147. {
  148. mp_irq->mp_dstapic = m->dstapic;
  149. mp_irq->mp_type = m->type;
  150. mp_irq->mp_irqtype = m->irqtype;
  151. mp_irq->mp_irqflag = m->irqflag;
  152. mp_irq->mp_srcbus = m->srcbus;
  153. mp_irq->mp_srcbusirq = m->srcbusirq;
  154. mp_irq->mp_dstirq = m->dstirq;
  155. }
  156. static void __init assign_to_mpc_intsrc(struct mp_config_intsrc *mp_irq,
  157. struct mpc_intsrc *m)
  158. {
  159. m->dstapic = mp_irq->mp_dstapic;
  160. m->type = mp_irq->mp_type;
  161. m->irqtype = mp_irq->mp_irqtype;
  162. m->irqflag = mp_irq->mp_irqflag;
  163. m->srcbus = mp_irq->mp_srcbus;
  164. m->srcbusirq = mp_irq->mp_srcbusirq;
  165. m->dstirq = mp_irq->mp_dstirq;
  166. }
  167. static int __init mp_irq_mpc_intsrc_cmp(struct mp_config_intsrc *mp_irq,
  168. struct mpc_intsrc *m)
  169. {
  170. if (mp_irq->mp_dstapic != m->dstapic)
  171. return 1;
  172. if (mp_irq->mp_type != m->type)
  173. return 2;
  174. if (mp_irq->mp_irqtype != m->irqtype)
  175. return 3;
  176. if (mp_irq->mp_irqflag != m->irqflag)
  177. return 4;
  178. if (mp_irq->mp_srcbus != m->srcbus)
  179. return 5;
  180. if (mp_irq->mp_srcbusirq != m->srcbusirq)
  181. return 6;
  182. if (mp_irq->mp_dstirq != m->dstirq)
  183. return 7;
  184. return 0;
  185. }
  186. static void __init MP_intsrc_info(struct mpc_intsrc *m)
  187. {
  188. int i;
  189. print_MP_intsrc_info(m);
  190. for (i = 0; i < mp_irq_entries; i++) {
  191. if (!mp_irq_mpc_intsrc_cmp(&mp_irqs[i], m))
  192. return;
  193. }
  194. assign_to_mp_irq(m, &mp_irqs[mp_irq_entries]);
  195. if (++mp_irq_entries == MAX_IRQ_SOURCES)
  196. panic("Max # of irq sources exceeded!!\n");
  197. }
  198. #endif
  199. static void __init MP_lintsrc_info(struct mpc_lintsrc *m)
  200. {
  201. apic_printk(APIC_VERBOSE, "Lint: type %d, pol %d, trig %d, bus %02x,"
  202. " IRQ %02x, APIC ID %x, APIC LINT %02x\n",
  203. m->irqtype, m->irqflag & 3, (m->irqflag >> 2) & 3, m->srcbusid,
  204. m->srcbusirq, m->destapic, m->destapiclint);
  205. }
  206. /*
  207. * Read/parse the MPC
  208. */
  209. static int __init smp_check_mpc(struct mpc_table *mpc, char *oem, char *str)
  210. {
  211. if (memcmp(mpc->signature, MPC_SIGNATURE, 4)) {
  212. printk(KERN_ERR "MPTABLE: bad signature [%c%c%c%c]!\n",
  213. mpc->signature[0], mpc->signature[1],
  214. mpc->signature[2], mpc->signature[3]);
  215. return 0;
  216. }
  217. if (mpf_checksum((unsigned char *)mpc, mpc->length)) {
  218. printk(KERN_ERR "MPTABLE: checksum error!\n");
  219. return 0;
  220. }
  221. if (mpc->spec != 0x01 && mpc->spec != 0x04) {
  222. printk(KERN_ERR "MPTABLE: bad table version (%d)!!\n",
  223. mpc->spec);
  224. return 0;
  225. }
  226. if (!mpc->lapic) {
  227. printk(KERN_ERR "MPTABLE: null local APIC address!\n");
  228. return 0;
  229. }
  230. memcpy(oem, mpc->oem, 8);
  231. oem[8] = 0;
  232. printk(KERN_INFO "MPTABLE: OEM ID: %s\n", oem);
  233. memcpy(str, mpc->productid, 12);
  234. str[12] = 0;
  235. printk(KERN_INFO "MPTABLE: Product ID: %s\n", str);
  236. printk(KERN_INFO "MPTABLE: APIC at: 0x%X\n", mpc->lapic);
  237. return 1;
  238. }
  239. static int __init smp_read_mpc(struct mpc_table *mpc, unsigned early)
  240. {
  241. char str[16];
  242. char oem[10];
  243. int count = sizeof(*mpc);
  244. unsigned char *mpt = ((unsigned char *)mpc) + count;
  245. if (!smp_check_mpc(mpc, oem, str))
  246. return 0;
  247. #ifdef CONFIG_X86_32
  248. /*
  249. * need to make sure summit and es7000's mps_oem_check is safe to be
  250. * called early via genericarch 's mps_oem_check
  251. */
  252. if (early) {
  253. #ifdef CONFIG_X86_NUMAQ
  254. numaq_mps_oem_check(mpc, oem, str);
  255. #endif
  256. } else
  257. mps_oem_check(mpc, oem, str);
  258. #endif
  259. /* save the local APIC address, it might be non-default */
  260. if (!acpi_lapic)
  261. mp_lapic_addr = mpc->lapic;
  262. if (early)
  263. return 1;
  264. if (mpc->oemptr && x86_quirks->smp_read_mpc_oem) {
  265. struct mpc_oemtable *oem_table = (void *)(long)mpc->oemptr;
  266. x86_quirks->smp_read_mpc_oem(oem_table, mpc->oemsize);
  267. }
  268. /*
  269. * Now process the configuration blocks.
  270. */
  271. if (x86_quirks->mpc_record)
  272. *x86_quirks->mpc_record = 0;
  273. while (count < mpc->length) {
  274. switch (*mpt) {
  275. case MP_PROCESSOR:
  276. {
  277. struct mpc_cpu *m = (struct mpc_cpu *)mpt;
  278. /* ACPI may have already provided this data */
  279. if (!acpi_lapic)
  280. MP_processor_info(m);
  281. mpt += sizeof(*m);
  282. count += sizeof(*m);
  283. break;
  284. }
  285. case MP_BUS:
  286. {
  287. struct mpc_bus *m = (struct mpc_bus *)mpt;
  288. #ifdef CONFIG_X86_IO_APIC
  289. MP_bus_info(m);
  290. #endif
  291. mpt += sizeof(*m);
  292. count += sizeof(*m);
  293. break;
  294. }
  295. case MP_IOAPIC:
  296. {
  297. #ifdef CONFIG_X86_IO_APIC
  298. struct mpc_ioapic *m = (struct mpc_ioapic *)mpt;
  299. MP_ioapic_info(m);
  300. #endif
  301. mpt += sizeof(struct mpc_ioapic);
  302. count += sizeof(struct mpc_ioapic);
  303. break;
  304. }
  305. case MP_INTSRC:
  306. {
  307. #ifdef CONFIG_X86_IO_APIC
  308. struct mpc_intsrc *m = (struct mpc_intsrc *)mpt;
  309. MP_intsrc_info(m);
  310. #endif
  311. mpt += sizeof(struct mpc_intsrc);
  312. count += sizeof(struct mpc_intsrc);
  313. break;
  314. }
  315. case MP_LINTSRC:
  316. {
  317. struct mpc_lintsrc *m =
  318. (struct mpc_lintsrc *)mpt;
  319. MP_lintsrc_info(m);
  320. mpt += sizeof(*m);
  321. count += sizeof(*m);
  322. break;
  323. }
  324. default:
  325. /* wrong mptable */
  326. printk(KERN_ERR "Your mptable is wrong, contact your HW vendor!\n");
  327. printk(KERN_ERR "type %x\n", *mpt);
  328. print_hex_dump(KERN_ERR, " ", DUMP_PREFIX_ADDRESS, 16,
  329. 1, mpc, mpc->length, 1);
  330. count = mpc->length;
  331. break;
  332. }
  333. if (x86_quirks->mpc_record)
  334. (*x86_quirks->mpc_record)++;
  335. }
  336. #ifdef CONFIG_X86_GENERICARCH
  337. generic_bigsmp_probe();
  338. #endif
  339. #ifdef CONFIG_X86_32
  340. setup_apic_routing();
  341. #endif
  342. if (!num_processors)
  343. printk(KERN_ERR "MPTABLE: no processors registered!\n");
  344. return num_processors;
  345. }
  346. #ifdef CONFIG_X86_IO_APIC
  347. static int __init ELCR_trigger(unsigned int irq)
  348. {
  349. unsigned int port;
  350. port = 0x4d0 + (irq >> 3);
  351. return (inb(port) >> (irq & 7)) & 1;
  352. }
  353. static void __init construct_default_ioirq_mptable(int mpc_default_type)
  354. {
  355. struct mpc_intsrc intsrc;
  356. int i;
  357. int ELCR_fallback = 0;
  358. intsrc.type = MP_INTSRC;
  359. intsrc.irqflag = 0; /* conforming */
  360. intsrc.srcbus = 0;
  361. intsrc.dstapic = mp_ioapics[0].mp_apicid;
  362. intsrc.irqtype = mp_INT;
  363. /*
  364. * If true, we have an ISA/PCI system with no IRQ entries
  365. * in the MP table. To prevent the PCI interrupts from being set up
  366. * incorrectly, we try to use the ELCR. The sanity check to see if
  367. * there is good ELCR data is very simple - IRQ0, 1, 2 and 13 can
  368. * never be level sensitive, so we simply see if the ELCR agrees.
  369. * If it does, we assume it's valid.
  370. */
  371. if (mpc_default_type == 5) {
  372. printk(KERN_INFO "ISA/PCI bus type with no IRQ information... "
  373. "falling back to ELCR\n");
  374. if (ELCR_trigger(0) || ELCR_trigger(1) || ELCR_trigger(2) ||
  375. ELCR_trigger(13))
  376. printk(KERN_ERR "ELCR contains invalid data... "
  377. "not using ELCR\n");
  378. else {
  379. printk(KERN_INFO
  380. "Using ELCR to identify PCI interrupts\n");
  381. ELCR_fallback = 1;
  382. }
  383. }
  384. for (i = 0; i < 16; i++) {
  385. switch (mpc_default_type) {
  386. case 2:
  387. if (i == 0 || i == 13)
  388. continue; /* IRQ0 & IRQ13 not connected */
  389. /* fall through */
  390. default:
  391. if (i == 2)
  392. continue; /* IRQ2 is never connected */
  393. }
  394. if (ELCR_fallback) {
  395. /*
  396. * If the ELCR indicates a level-sensitive interrupt, we
  397. * copy that information over to the MP table in the
  398. * irqflag field (level sensitive, active high polarity).
  399. */
  400. if (ELCR_trigger(i))
  401. intsrc.irqflag = 13;
  402. else
  403. intsrc.irqflag = 0;
  404. }
  405. intsrc.srcbusirq = i;
  406. intsrc.dstirq = i ? i : 2; /* IRQ0 to INTIN2 */
  407. MP_intsrc_info(&intsrc);
  408. }
  409. intsrc.irqtype = mp_ExtINT;
  410. intsrc.srcbusirq = 0;
  411. intsrc.dstirq = 0; /* 8259A to INTIN0 */
  412. MP_intsrc_info(&intsrc);
  413. }
  414. static void __init construct_ioapic_table(int mpc_default_type)
  415. {
  416. struct mpc_ioapic ioapic;
  417. struct mpc_bus bus;
  418. bus.type = MP_BUS;
  419. bus.busid = 0;
  420. switch (mpc_default_type) {
  421. default:
  422. printk(KERN_ERR "???\nUnknown standard configuration %d\n",
  423. mpc_default_type);
  424. /* fall through */
  425. case 1:
  426. case 5:
  427. memcpy(bus.bustype, "ISA ", 6);
  428. break;
  429. case 2:
  430. case 6:
  431. case 3:
  432. memcpy(bus.bustype, "EISA ", 6);
  433. break;
  434. case 4:
  435. case 7:
  436. memcpy(bus.bustype, "MCA ", 6);
  437. }
  438. MP_bus_info(&bus);
  439. if (mpc_default_type > 4) {
  440. bus.busid = 1;
  441. memcpy(bus.bustype, "PCI ", 6);
  442. MP_bus_info(&bus);
  443. }
  444. ioapic.type = MP_IOAPIC;
  445. ioapic.apicid = 2;
  446. ioapic.apicver = mpc_default_type > 4 ? 0x10 : 0x01;
  447. ioapic.flags = MPC_APIC_USABLE;
  448. ioapic.apicaddr = 0xFEC00000;
  449. MP_ioapic_info(&ioapic);
  450. /*
  451. * We set up most of the low 16 IO-APIC pins according to MPS rules.
  452. */
  453. construct_default_ioirq_mptable(mpc_default_type);
  454. }
  455. #else
  456. static inline void __init construct_ioapic_table(int mpc_default_type) { }
  457. #endif
  458. static inline void __init construct_default_ISA_mptable(int mpc_default_type)
  459. {
  460. struct mpc_cpu processor;
  461. struct mpc_lintsrc lintsrc;
  462. int linttypes[2] = { mp_ExtINT, mp_NMI };
  463. int i;
  464. /*
  465. * local APIC has default address
  466. */
  467. mp_lapic_addr = APIC_DEFAULT_PHYS_BASE;
  468. /*
  469. * 2 CPUs, numbered 0 & 1.
  470. */
  471. processor.type = MP_PROCESSOR;
  472. /* Either an integrated APIC or a discrete 82489DX. */
  473. processor.apicver = mpc_default_type > 4 ? 0x10 : 0x01;
  474. processor.cpuflag = CPU_ENABLED;
  475. processor.cpufeature = (boot_cpu_data.x86 << 8) |
  476. (boot_cpu_data.x86_model << 4) | boot_cpu_data.x86_mask;
  477. processor.featureflag = boot_cpu_data.x86_capability[0];
  478. processor.reserved[0] = 0;
  479. processor.reserved[1] = 0;
  480. for (i = 0; i < 2; i++) {
  481. processor.apicid = i;
  482. MP_processor_info(&processor);
  483. }
  484. construct_ioapic_table(mpc_default_type);
  485. lintsrc.type = MP_LINTSRC;
  486. lintsrc.irqflag = 0; /* conforming */
  487. lintsrc.srcbusid = 0;
  488. lintsrc.srcbusirq = 0;
  489. lintsrc.destapic = MP_APIC_ALL;
  490. for (i = 0; i < 2; i++) {
  491. lintsrc.irqtype = linttypes[i];
  492. lintsrc.destapiclint = i;
  493. MP_lintsrc_info(&lintsrc);
  494. }
  495. }
  496. static struct mpf_intel *mpf_found;
  497. /*
  498. * Scan the memory blocks for an SMP configuration block.
  499. */
  500. static void __init __get_smp_config(unsigned int early)
  501. {
  502. struct mpf_intel *mpf = mpf_found;
  503. if (!mpf)
  504. return;
  505. if (acpi_lapic && early)
  506. return;
  507. /*
  508. * MPS doesn't support hyperthreading, aka only have
  509. * thread 0 apic id in MPS table
  510. */
  511. if (acpi_lapic && acpi_ioapic)
  512. return;
  513. if (x86_quirks->mach_get_smp_config) {
  514. if (x86_quirks->mach_get_smp_config(early))
  515. return;
  516. }
  517. printk(KERN_INFO "Intel MultiProcessor Specification v1.%d\n",
  518. mpf->specification);
  519. #if defined(CONFIG_X86_LOCAL_APIC) && defined(CONFIG_X86_32)
  520. if (mpf->feature2 & (1 << 7)) {
  521. printk(KERN_INFO " IMCR and PIC compatibility mode.\n");
  522. pic_mode = 1;
  523. } else {
  524. printk(KERN_INFO " Virtual Wire compatibility mode.\n");
  525. pic_mode = 0;
  526. }
  527. #endif
  528. /*
  529. * Now see if we need to read further.
  530. */
  531. if (mpf->feature1 != 0) {
  532. if (early) {
  533. /*
  534. * local APIC has default address
  535. */
  536. mp_lapic_addr = APIC_DEFAULT_PHYS_BASE;
  537. return;
  538. }
  539. printk(KERN_INFO "Default MP configuration #%d\n",
  540. mpf->feature1);
  541. construct_default_ISA_mptable(mpf->feature1);
  542. } else if (mpf->physptr) {
  543. /*
  544. * Read the physical hardware table. Anything here will
  545. * override the defaults.
  546. */
  547. if (!smp_read_mpc(phys_to_virt(mpf->physptr), early)) {
  548. #ifdef CONFIG_X86_LOCAL_APIC
  549. smp_found_config = 0;
  550. #endif
  551. printk(KERN_ERR
  552. "BIOS bug, MP table errors detected!...\n");
  553. printk(KERN_ERR "... disabling SMP support. "
  554. "(tell your hw vendor)\n");
  555. return;
  556. }
  557. if (early)
  558. return;
  559. #ifdef CONFIG_X86_IO_APIC
  560. /*
  561. * If there are no explicit MP IRQ entries, then we are
  562. * broken. We set up most of the low 16 IO-APIC pins to
  563. * ISA defaults and hope it will work.
  564. */
  565. if (!mp_irq_entries) {
  566. struct mpc_bus bus;
  567. printk(KERN_ERR "BIOS bug, no explicit IRQ entries, "
  568. "using default mptable. "
  569. "(tell your hw vendor)\n");
  570. bus.type = MP_BUS;
  571. bus.busid = 0;
  572. memcpy(bus.bustype, "ISA ", 6);
  573. MP_bus_info(&bus);
  574. construct_default_ioirq_mptable(0);
  575. }
  576. #endif
  577. } else
  578. BUG();
  579. if (!early)
  580. printk(KERN_INFO "Processors: %d\n", num_processors);
  581. /*
  582. * Only use the first configuration found.
  583. */
  584. }
  585. void __init early_get_smp_config(void)
  586. {
  587. __get_smp_config(1);
  588. }
  589. void __init get_smp_config(void)
  590. {
  591. __get_smp_config(0);
  592. }
  593. static int __init smp_scan_config(unsigned long base, unsigned long length,
  594. unsigned reserve)
  595. {
  596. unsigned int *bp = phys_to_virt(base);
  597. struct mpf_intel *mpf;
  598. apic_printk(APIC_VERBOSE, "Scan SMP from %p for %ld bytes.\n",
  599. bp, length);
  600. BUILD_BUG_ON(sizeof(*mpf) != 16);
  601. while (length > 0) {
  602. mpf = (struct mpf_intel *)bp;
  603. if ((*bp == SMP_MAGIC_IDENT) &&
  604. (mpf->length == 1) &&
  605. !mpf_checksum((unsigned char *)bp, 16) &&
  606. ((mpf->specification == 1)
  607. || (mpf->specification == 4))) {
  608. #ifdef CONFIG_X86_LOCAL_APIC
  609. smp_found_config = 1;
  610. #endif
  611. mpf_found = mpf;
  612. printk(KERN_INFO "found SMP MP-table at [%p] %08lx\n",
  613. mpf, virt_to_phys(mpf));
  614. if (!reserve)
  615. return 1;
  616. reserve_bootmem_generic(virt_to_phys(mpf), PAGE_SIZE,
  617. BOOTMEM_DEFAULT);
  618. if (mpf->physptr) {
  619. unsigned long size = PAGE_SIZE;
  620. #ifdef CONFIG_X86_32
  621. /*
  622. * We cannot access to MPC table to compute
  623. * table size yet, as only few megabytes from
  624. * the bottom is mapped now.
  625. * PC-9800's MPC table places on the very last
  626. * of physical memory; so that simply reserving
  627. * PAGE_SIZE from mpf->physptr yields BUG()
  628. * in reserve_bootmem.
  629. */
  630. unsigned long end = max_low_pfn * PAGE_SIZE;
  631. if (mpf->physptr + size > end)
  632. size = end - mpf->physptr;
  633. #endif
  634. reserve_bootmem_generic(mpf->physptr, size,
  635. BOOTMEM_DEFAULT);
  636. }
  637. return 1;
  638. }
  639. bp += 4;
  640. length -= 16;
  641. }
  642. return 0;
  643. }
  644. static void __init __find_smp_config(unsigned int reserve)
  645. {
  646. unsigned int address;
  647. if (x86_quirks->mach_find_smp_config) {
  648. if (x86_quirks->mach_find_smp_config(reserve))
  649. return;
  650. }
  651. /*
  652. * FIXME: Linux assumes you have 640K of base ram..
  653. * this continues the error...
  654. *
  655. * 1) Scan the bottom 1K for a signature
  656. * 2) Scan the top 1K of base RAM
  657. * 3) Scan the 64K of bios
  658. */
  659. if (smp_scan_config(0x0, 0x400, reserve) ||
  660. smp_scan_config(639 * 0x400, 0x400, reserve) ||
  661. smp_scan_config(0xF0000, 0x10000, reserve))
  662. return;
  663. /*
  664. * If it is an SMP machine we should know now, unless the
  665. * configuration is in an EISA/MCA bus machine with an
  666. * extended bios data area.
  667. *
  668. * there is a real-mode segmented pointer pointing to the
  669. * 4K EBDA area at 0x40E, calculate and scan it here.
  670. *
  671. * NOTE! There are Linux loaders that will corrupt the EBDA
  672. * area, and as such this kind of SMP config may be less
  673. * trustworthy, simply because the SMP table may have been
  674. * stomped on during early boot. These loaders are buggy and
  675. * should be fixed.
  676. *
  677. * MP1.4 SPEC states to only scan first 1K of 4K EBDA.
  678. */
  679. address = get_bios_ebda();
  680. if (address)
  681. smp_scan_config(address, 0x400, reserve);
  682. }
  683. void __init early_find_smp_config(void)
  684. {
  685. __find_smp_config(0);
  686. }
  687. void __init find_smp_config(void)
  688. {
  689. __find_smp_config(1);
  690. }
  691. #ifdef CONFIG_X86_IO_APIC
  692. static u8 __initdata irq_used[MAX_IRQ_SOURCES];
  693. static int __init get_MP_intsrc_index(struct mpc_intsrc *m)
  694. {
  695. int i;
  696. if (m->irqtype != mp_INT)
  697. return 0;
  698. if (m->irqflag != 0x0f)
  699. return 0;
  700. /* not legacy */
  701. for (i = 0; i < mp_irq_entries; i++) {
  702. if (mp_irqs[i].mp_irqtype != mp_INT)
  703. continue;
  704. if (mp_irqs[i].mp_irqflag != 0x0f)
  705. continue;
  706. if (mp_irqs[i].mp_srcbus != m->srcbus)
  707. continue;
  708. if (mp_irqs[i].mp_srcbusirq != m->srcbusirq)
  709. continue;
  710. if (irq_used[i]) {
  711. /* already claimed */
  712. return -2;
  713. }
  714. irq_used[i] = 1;
  715. return i;
  716. }
  717. /* not found */
  718. return -1;
  719. }
  720. #define SPARE_SLOT_NUM 20
  721. static struct mpc_intsrc __initdata *m_spare[SPARE_SLOT_NUM];
  722. #endif
  723. static int __init replace_intsrc_all(struct mpc_table *mpc,
  724. unsigned long mpc_new_phys,
  725. unsigned long mpc_new_length)
  726. {
  727. #ifdef CONFIG_X86_IO_APIC
  728. int i;
  729. int nr_m_spare = 0;
  730. #endif
  731. int count = sizeof(*mpc);
  732. unsigned char *mpt = ((unsigned char *)mpc) + count;
  733. printk(KERN_INFO "mpc_length %x\n", mpc->length);
  734. while (count < mpc->length) {
  735. switch (*mpt) {
  736. case MP_PROCESSOR:
  737. {
  738. struct mpc_cpu *m = (struct mpc_cpu *)mpt;
  739. mpt += sizeof(*m);
  740. count += sizeof(*m);
  741. break;
  742. }
  743. case MP_BUS:
  744. {
  745. struct mpc_bus *m = (struct mpc_bus *)mpt;
  746. mpt += sizeof(*m);
  747. count += sizeof(*m);
  748. break;
  749. }
  750. case MP_IOAPIC:
  751. {
  752. mpt += sizeof(struct mpc_ioapic);
  753. count += sizeof(struct mpc_ioapic);
  754. break;
  755. }
  756. case MP_INTSRC:
  757. {
  758. #ifdef CONFIG_X86_IO_APIC
  759. struct mpc_intsrc *m = (struct mpc_intsrc *)mpt;
  760. printk(KERN_INFO "OLD ");
  761. print_MP_intsrc_info(m);
  762. i = get_MP_intsrc_index(m);
  763. if (i > 0) {
  764. assign_to_mpc_intsrc(&mp_irqs[i], m);
  765. printk(KERN_INFO "NEW ");
  766. print_mp_irq_info(&mp_irqs[i]);
  767. } else if (!i) {
  768. /* legacy, do nothing */
  769. } else if (nr_m_spare < SPARE_SLOT_NUM) {
  770. /*
  771. * not found (-1), or duplicated (-2)
  772. * are invalid entries,
  773. * we need to use the slot later
  774. */
  775. m_spare[nr_m_spare] = m;
  776. nr_m_spare++;
  777. }
  778. #endif
  779. mpt += sizeof(struct mpc_intsrc);
  780. count += sizeof(struct mpc_intsrc);
  781. break;
  782. }
  783. case MP_LINTSRC:
  784. {
  785. struct mpc_lintsrc *m =
  786. (struct mpc_lintsrc *)mpt;
  787. mpt += sizeof(*m);
  788. count += sizeof(*m);
  789. break;
  790. }
  791. default:
  792. /* wrong mptable */
  793. printk(KERN_ERR "Your mptable is wrong, contact your HW vendor!\n");
  794. printk(KERN_ERR "type %x\n", *mpt);
  795. print_hex_dump(KERN_ERR, " ", DUMP_PREFIX_ADDRESS, 16,
  796. 1, mpc, mpc->length, 1);
  797. goto out;
  798. }
  799. }
  800. #ifdef CONFIG_X86_IO_APIC
  801. for (i = 0; i < mp_irq_entries; i++) {
  802. if (irq_used[i])
  803. continue;
  804. if (mp_irqs[i].mp_irqtype != mp_INT)
  805. continue;
  806. if (mp_irqs[i].mp_irqflag != 0x0f)
  807. continue;
  808. if (nr_m_spare > 0) {
  809. printk(KERN_INFO "*NEW* found ");
  810. nr_m_spare--;
  811. assign_to_mpc_intsrc(&mp_irqs[i], m_spare[nr_m_spare]);
  812. m_spare[nr_m_spare] = NULL;
  813. } else {
  814. struct mpc_intsrc *m = (struct mpc_intsrc *)mpt;
  815. count += sizeof(struct mpc_intsrc);
  816. if (!mpc_new_phys) {
  817. printk(KERN_INFO "No spare slots, try to append...take your risk, new mpc_length %x\n", count);
  818. } else {
  819. if (count <= mpc_new_length)
  820. printk(KERN_INFO "No spare slots, try to append..., new mpc_length %x\n", count);
  821. else {
  822. printk(KERN_ERR "mpc_new_length %lx is too small\n", mpc_new_length);
  823. goto out;
  824. }
  825. }
  826. assign_to_mpc_intsrc(&mp_irqs[i], m);
  827. mpc->length = count;
  828. mpt += sizeof(struct mpc_intsrc);
  829. }
  830. print_mp_irq_info(&mp_irqs[i]);
  831. }
  832. #endif
  833. out:
  834. /* update checksum */
  835. mpc->checksum = 0;
  836. mpc->checksum -= mpf_checksum((unsigned char *)mpc, mpc->length);
  837. return 0;
  838. }
  839. static int __initdata enable_update_mptable;
  840. static int __init update_mptable_setup(char *str)
  841. {
  842. enable_update_mptable = 1;
  843. return 0;
  844. }
  845. early_param("update_mptable", update_mptable_setup);
  846. static unsigned long __initdata mpc_new_phys;
  847. static unsigned long mpc_new_length __initdata = 4096;
  848. /* alloc_mptable or alloc_mptable=4k */
  849. static int __initdata alloc_mptable;
  850. static int __init parse_alloc_mptable_opt(char *p)
  851. {
  852. enable_update_mptable = 1;
  853. alloc_mptable = 1;
  854. if (!p)
  855. return 0;
  856. mpc_new_length = memparse(p, &p);
  857. return 0;
  858. }
  859. early_param("alloc_mptable", parse_alloc_mptable_opt);
  860. void __init early_reserve_e820_mpc_new(void)
  861. {
  862. if (enable_update_mptable && alloc_mptable) {
  863. u64 startt = 0;
  864. #ifdef CONFIG_X86_TRAMPOLINE
  865. startt = TRAMPOLINE_BASE;
  866. #endif
  867. mpc_new_phys = early_reserve_e820(startt, mpc_new_length, 4);
  868. }
  869. }
  870. static int __init update_mp_table(void)
  871. {
  872. char str[16];
  873. char oem[10];
  874. struct mpf_intel *mpf;
  875. struct mpc_table *mpc, *mpc_new;
  876. if (!enable_update_mptable)
  877. return 0;
  878. mpf = mpf_found;
  879. if (!mpf)
  880. return 0;
  881. /*
  882. * Now see if we need to go further.
  883. */
  884. if (mpf->feature1 != 0)
  885. return 0;
  886. if (!mpf->physptr)
  887. return 0;
  888. mpc = phys_to_virt(mpf->physptr);
  889. if (!smp_check_mpc(mpc, oem, str))
  890. return 0;
  891. printk(KERN_INFO "mpf: %lx\n", virt_to_phys(mpf));
  892. printk(KERN_INFO "physptr: %x\n", mpf->physptr);
  893. if (mpc_new_phys && mpc->length > mpc_new_length) {
  894. mpc_new_phys = 0;
  895. printk(KERN_INFO "mpc_new_length is %ld, please use alloc_mptable=8k\n",
  896. mpc_new_length);
  897. }
  898. if (!mpc_new_phys) {
  899. unsigned char old, new;
  900. /* check if we can change the postion */
  901. mpc->checksum = 0;
  902. old = mpf_checksum((unsigned char *)mpc, mpc->length);
  903. mpc->checksum = 0xff;
  904. new = mpf_checksum((unsigned char *)mpc, mpc->length);
  905. if (old == new) {
  906. printk(KERN_INFO "mpc is readonly, please try alloc_mptable instead\n");
  907. return 0;
  908. }
  909. printk(KERN_INFO "use in-positon replacing\n");
  910. } else {
  911. mpf->physptr = mpc_new_phys;
  912. mpc_new = phys_to_virt(mpc_new_phys);
  913. memcpy(mpc_new, mpc, mpc->length);
  914. mpc = mpc_new;
  915. /* check if we can modify that */
  916. if (mpc_new_phys - mpf->physptr) {
  917. struct mpf_intel *mpf_new;
  918. /* steal 16 bytes from [0, 1k) */
  919. printk(KERN_INFO "mpf new: %x\n", 0x400 - 16);
  920. mpf_new = phys_to_virt(0x400 - 16);
  921. memcpy(mpf_new, mpf, 16);
  922. mpf = mpf_new;
  923. mpf->physptr = mpc_new_phys;
  924. }
  925. mpf->checksum = 0;
  926. mpf->checksum -= mpf_checksum((unsigned char *)mpf, 16);
  927. printk(KERN_INFO "physptr new: %x\n", mpf->physptr);
  928. }
  929. /*
  930. * only replace the one with mp_INT and
  931. * MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW,
  932. * already in mp_irqs , stored by ... and mp_config_acpi_gsi,
  933. * may need pci=routeirq for all coverage
  934. */
  935. replace_intsrc_all(mpc, mpc_new_phys, mpc_new_length);
  936. return 0;
  937. }
  938. late_initcall(update_mp_table);