iwl4965-base.c 231 KB

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  1. /******************************************************************************
  2. *
  3. * Copyright(c) 2003 - 2008 Intel Corporation. All rights reserved.
  4. *
  5. * Portions of this file are derived from the ipw3945 project, as well
  6. * as portions of the ieee80211 subsystem header files.
  7. *
  8. * This program is free software; you can redistribute it and/or modify it
  9. * under the terms of version 2 of the GNU General Public License as
  10. * published by the Free Software Foundation.
  11. *
  12. * This program is distributed in the hope that it will be useful, but WITHOUT
  13. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  14. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  15. * more details.
  16. *
  17. * You should have received a copy of the GNU General Public License along with
  18. * this program; if not, write to the Free Software Foundation, Inc.,
  19. * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
  20. *
  21. * The full GNU General Public License is included in this distribution in the
  22. * file called LICENSE.
  23. *
  24. * Contact Information:
  25. * James P. Ketrenos <ipw2100-admin@linux.intel.com>
  26. * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  27. *
  28. *****************************************************************************/
  29. #include <linux/kernel.h>
  30. #include <linux/module.h>
  31. #include <linux/version.h>
  32. #include <linux/init.h>
  33. #include <linux/pci.h>
  34. #include <linux/dma-mapping.h>
  35. #include <linux/delay.h>
  36. #include <linux/skbuff.h>
  37. #include <linux/netdevice.h>
  38. #include <linux/wireless.h>
  39. #include <linux/firmware.h>
  40. #include <linux/etherdevice.h>
  41. #include <linux/if_arp.h>
  42. #include <net/mac80211.h>
  43. #include <asm/div64.h>
  44. #include "iwl-eeprom.h"
  45. #include "iwl-core.h"
  46. #include "iwl-4965.h"
  47. #include "iwl-helpers.h"
  48. static int iwl4965_tx_queue_update_write_ptr(struct iwl_priv *priv,
  49. struct iwl4965_tx_queue *txq);
  50. /******************************************************************************
  51. *
  52. * module boiler plate
  53. *
  54. ******************************************************************************/
  55. /*
  56. * module name, copyright, version, etc.
  57. * NOTE: DRV_NAME is defined in iwlwifi.h for use by iwl-debug.h and printk
  58. */
  59. #define DRV_DESCRIPTION "Intel(R) Wireless WiFi Link 4965AGN driver for Linux"
  60. #ifdef CONFIG_IWLWIFI_DEBUG
  61. #define VD "d"
  62. #else
  63. #define VD
  64. #endif
  65. #ifdef CONFIG_IWL4965_SPECTRUM_MEASUREMENT
  66. #define VS "s"
  67. #else
  68. #define VS
  69. #endif
  70. #define DRV_VERSION IWLWIFI_VERSION VD VS
  71. MODULE_DESCRIPTION(DRV_DESCRIPTION);
  72. MODULE_VERSION(DRV_VERSION);
  73. MODULE_AUTHOR(DRV_COPYRIGHT);
  74. MODULE_LICENSE("GPL");
  75. __le16 *ieee80211_get_qos_ctrl(struct ieee80211_hdr *hdr)
  76. {
  77. u16 fc = le16_to_cpu(hdr->frame_control);
  78. int hdr_len = ieee80211_get_hdrlen(fc);
  79. if ((fc & 0x00cc) == (IEEE80211_STYPE_QOS_DATA | IEEE80211_FTYPE_DATA))
  80. return (__le16 *) ((u8 *) hdr + hdr_len - QOS_CONTROL_LEN);
  81. return NULL;
  82. }
  83. static const struct ieee80211_supported_band *iwl4965_get_hw_mode(
  84. struct iwl_priv *priv, enum ieee80211_band band)
  85. {
  86. return priv->hw->wiphy->bands[band];
  87. }
  88. static int iwl4965_is_empty_essid(const char *essid, int essid_len)
  89. {
  90. /* Single white space is for Linksys APs */
  91. if (essid_len == 1 && essid[0] == ' ')
  92. return 1;
  93. /* Otherwise, if the entire essid is 0, we assume it is hidden */
  94. while (essid_len) {
  95. essid_len--;
  96. if (essid[essid_len] != '\0')
  97. return 0;
  98. }
  99. return 1;
  100. }
  101. static const char *iwl4965_escape_essid(const char *essid, u8 essid_len)
  102. {
  103. static char escaped[IW_ESSID_MAX_SIZE * 2 + 1];
  104. const char *s = essid;
  105. char *d = escaped;
  106. if (iwl4965_is_empty_essid(essid, essid_len)) {
  107. memcpy(escaped, "<hidden>", sizeof("<hidden>"));
  108. return escaped;
  109. }
  110. essid_len = min(essid_len, (u8) IW_ESSID_MAX_SIZE);
  111. while (essid_len--) {
  112. if (*s == '\0') {
  113. *d++ = '\\';
  114. *d++ = '0';
  115. s++;
  116. } else
  117. *d++ = *s++;
  118. }
  119. *d = '\0';
  120. return escaped;
  121. }
  122. /*************** DMA-QUEUE-GENERAL-FUNCTIONS *****
  123. * DMA services
  124. *
  125. * Theory of operation
  126. *
  127. * A Tx or Rx queue resides in host DRAM, and is comprised of a circular buffer
  128. * of buffer descriptors, each of which points to one or more data buffers for
  129. * the device to read from or fill. Driver and device exchange status of each
  130. * queue via "read" and "write" pointers. Driver keeps minimum of 2 empty
  131. * entries in each circular buffer, to protect against confusing empty and full
  132. * queue states.
  133. *
  134. * The device reads or writes the data in the queues via the device's several
  135. * DMA/FIFO channels. Each queue is mapped to a single DMA channel.
  136. *
  137. * For Tx queue, there are low mark and high mark limits. If, after queuing
  138. * the packet for Tx, free space become < low mark, Tx queue stopped. When
  139. * reclaiming packets (on 'tx done IRQ), if free space become > high mark,
  140. * Tx queue resumed.
  141. *
  142. * The 4965 operates with up to 17 queues: One receive queue, one transmit
  143. * queue (#4) for sending commands to the device firmware, and 15 other
  144. * Tx queues that may be mapped to prioritized Tx DMA/FIFO channels.
  145. *
  146. * See more detailed info in iwl-4965-hw.h.
  147. ***************************************************/
  148. int iwl4965_queue_space(const struct iwl4965_queue *q)
  149. {
  150. int s = q->read_ptr - q->write_ptr;
  151. if (q->read_ptr > q->write_ptr)
  152. s -= q->n_bd;
  153. if (s <= 0)
  154. s += q->n_window;
  155. /* keep some reserve to not confuse empty and full situations */
  156. s -= 2;
  157. if (s < 0)
  158. s = 0;
  159. return s;
  160. }
  161. static inline int x2_queue_used(const struct iwl4965_queue *q, int i)
  162. {
  163. return q->write_ptr > q->read_ptr ?
  164. (i >= q->read_ptr && i < q->write_ptr) :
  165. !(i < q->read_ptr && i >= q->write_ptr);
  166. }
  167. static inline u8 get_cmd_index(struct iwl4965_queue *q, u32 index, int is_huge)
  168. {
  169. /* This is for scan command, the big buffer at end of command array */
  170. if (is_huge)
  171. return q->n_window; /* must be power of 2 */
  172. /* Otherwise, use normal size buffers */
  173. return index & (q->n_window - 1);
  174. }
  175. /**
  176. * iwl4965_queue_init - Initialize queue's high/low-water and read/write indexes
  177. */
  178. static int iwl4965_queue_init(struct iwl_priv *priv, struct iwl4965_queue *q,
  179. int count, int slots_num, u32 id)
  180. {
  181. q->n_bd = count;
  182. q->n_window = slots_num;
  183. q->id = id;
  184. /* count must be power-of-two size, otherwise iwl_queue_inc_wrap
  185. * and iwl_queue_dec_wrap are broken. */
  186. BUG_ON(!is_power_of_2(count));
  187. /* slots_num must be power-of-two size, otherwise
  188. * get_cmd_index is broken. */
  189. BUG_ON(!is_power_of_2(slots_num));
  190. q->low_mark = q->n_window / 4;
  191. if (q->low_mark < 4)
  192. q->low_mark = 4;
  193. q->high_mark = q->n_window / 8;
  194. if (q->high_mark < 2)
  195. q->high_mark = 2;
  196. q->write_ptr = q->read_ptr = 0;
  197. return 0;
  198. }
  199. /**
  200. * iwl4965_tx_queue_alloc - Alloc driver data and TFD CB for one Tx/cmd queue
  201. */
  202. static int iwl4965_tx_queue_alloc(struct iwl_priv *priv,
  203. struct iwl4965_tx_queue *txq, u32 id)
  204. {
  205. struct pci_dev *dev = priv->pci_dev;
  206. /* Driver private data, only for Tx (not command) queues,
  207. * not shared with device. */
  208. if (id != IWL_CMD_QUEUE_NUM) {
  209. txq->txb = kmalloc(sizeof(txq->txb[0]) *
  210. TFD_QUEUE_SIZE_MAX, GFP_KERNEL);
  211. if (!txq->txb) {
  212. IWL_ERROR("kmalloc for auxiliary BD "
  213. "structures failed\n");
  214. goto error;
  215. }
  216. } else
  217. txq->txb = NULL;
  218. /* Circular buffer of transmit frame descriptors (TFDs),
  219. * shared with device */
  220. txq->bd = pci_alloc_consistent(dev,
  221. sizeof(txq->bd[0]) * TFD_QUEUE_SIZE_MAX,
  222. &txq->q.dma_addr);
  223. if (!txq->bd) {
  224. IWL_ERROR("pci_alloc_consistent(%zd) failed\n",
  225. sizeof(txq->bd[0]) * TFD_QUEUE_SIZE_MAX);
  226. goto error;
  227. }
  228. txq->q.id = id;
  229. return 0;
  230. error:
  231. if (txq->txb) {
  232. kfree(txq->txb);
  233. txq->txb = NULL;
  234. }
  235. return -ENOMEM;
  236. }
  237. /**
  238. * iwl4965_tx_queue_init - Allocate and initialize one tx/cmd queue
  239. */
  240. int iwl4965_tx_queue_init(struct iwl_priv *priv,
  241. struct iwl4965_tx_queue *txq, int slots_num, u32 txq_id)
  242. {
  243. struct pci_dev *dev = priv->pci_dev;
  244. int len;
  245. int rc = 0;
  246. /*
  247. * Alloc buffer array for commands (Tx or other types of commands).
  248. * For the command queue (#4), allocate command space + one big
  249. * command for scan, since scan command is very huge; the system will
  250. * not have two scans at the same time, so only one is needed.
  251. * For normal Tx queues (all other queues), no super-size command
  252. * space is needed.
  253. */
  254. len = sizeof(struct iwl_cmd) * slots_num;
  255. if (txq_id == IWL_CMD_QUEUE_NUM)
  256. len += IWL_MAX_SCAN_SIZE;
  257. txq->cmd = pci_alloc_consistent(dev, len, &txq->dma_addr_cmd);
  258. if (!txq->cmd)
  259. return -ENOMEM;
  260. /* Alloc driver data array and TFD circular buffer */
  261. rc = iwl4965_tx_queue_alloc(priv, txq, txq_id);
  262. if (rc) {
  263. pci_free_consistent(dev, len, txq->cmd, txq->dma_addr_cmd);
  264. return -ENOMEM;
  265. }
  266. txq->need_update = 0;
  267. /* TFD_QUEUE_SIZE_MAX must be power-of-two size, otherwise
  268. * iwl_queue_inc_wrap and iwl_queue_dec_wrap are broken. */
  269. BUILD_BUG_ON(TFD_QUEUE_SIZE_MAX & (TFD_QUEUE_SIZE_MAX - 1));
  270. /* Initialize queue's high/low-water marks, and head/tail indexes */
  271. iwl4965_queue_init(priv, &txq->q, TFD_QUEUE_SIZE_MAX, slots_num, txq_id);
  272. /* Tell device where to find queue */
  273. iwl4965_hw_tx_queue_init(priv, txq);
  274. return 0;
  275. }
  276. /**
  277. * iwl4965_tx_queue_free - Deallocate DMA queue.
  278. * @txq: Transmit queue to deallocate.
  279. *
  280. * Empty queue by removing and destroying all BD's.
  281. * Free all buffers.
  282. * 0-fill, but do not free "txq" descriptor structure.
  283. */
  284. void iwl4965_tx_queue_free(struct iwl_priv *priv, struct iwl4965_tx_queue *txq)
  285. {
  286. struct iwl4965_queue *q = &txq->q;
  287. struct pci_dev *dev = priv->pci_dev;
  288. int len;
  289. if (q->n_bd == 0)
  290. return;
  291. /* first, empty all BD's */
  292. for (; q->write_ptr != q->read_ptr;
  293. q->read_ptr = iwl_queue_inc_wrap(q->read_ptr, q->n_bd))
  294. iwl4965_hw_txq_free_tfd(priv, txq);
  295. len = sizeof(struct iwl_cmd) * q->n_window;
  296. if (q->id == IWL_CMD_QUEUE_NUM)
  297. len += IWL_MAX_SCAN_SIZE;
  298. /* De-alloc array of command/tx buffers */
  299. pci_free_consistent(dev, len, txq->cmd, txq->dma_addr_cmd);
  300. /* De-alloc circular buffer of TFDs */
  301. if (txq->q.n_bd)
  302. pci_free_consistent(dev, sizeof(struct iwl4965_tfd_frame) *
  303. txq->q.n_bd, txq->bd, txq->q.dma_addr);
  304. /* De-alloc array of per-TFD driver data */
  305. if (txq->txb) {
  306. kfree(txq->txb);
  307. txq->txb = NULL;
  308. }
  309. /* 0-fill queue descriptor structure */
  310. memset(txq, 0, sizeof(*txq));
  311. }
  312. const u8 iwl4965_broadcast_addr[ETH_ALEN] = { 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF };
  313. /*************** STATION TABLE MANAGEMENT ****
  314. * mac80211 should be examined to determine if sta_info is duplicating
  315. * the functionality provided here
  316. */
  317. /**************************************************************/
  318. #if 0 /* temporary disable till we add real remove station */
  319. /**
  320. * iwl4965_remove_station - Remove driver's knowledge of station.
  321. *
  322. * NOTE: This does not remove station from device's station table.
  323. */
  324. static u8 iwl4965_remove_station(struct iwl_priv *priv, const u8 *addr, int is_ap)
  325. {
  326. int index = IWL_INVALID_STATION;
  327. int i;
  328. unsigned long flags;
  329. spin_lock_irqsave(&priv->sta_lock, flags);
  330. if (is_ap)
  331. index = IWL_AP_ID;
  332. else if (is_broadcast_ether_addr(addr))
  333. index = priv->hw_setting.bcast_sta_id;
  334. else
  335. for (i = IWL_STA_ID; i < priv->hw_setting.max_stations; i++)
  336. if (priv->stations[i].used &&
  337. !compare_ether_addr(priv->stations[i].sta.sta.addr,
  338. addr)) {
  339. index = i;
  340. break;
  341. }
  342. if (unlikely(index == IWL_INVALID_STATION))
  343. goto out;
  344. if (priv->stations[index].used) {
  345. priv->stations[index].used = 0;
  346. priv->num_stations--;
  347. }
  348. BUG_ON(priv->num_stations < 0);
  349. out:
  350. spin_unlock_irqrestore(&priv->sta_lock, flags);
  351. return 0;
  352. }
  353. #endif
  354. /**
  355. * iwl4965_add_station_flags - Add station to tables in driver and device
  356. */
  357. u8 iwl4965_add_station_flags(struct iwl_priv *priv, const u8 *addr,
  358. int is_ap, u8 flags, void *ht_data)
  359. {
  360. int i;
  361. int index = IWL_INVALID_STATION;
  362. struct iwl4965_station_entry *station;
  363. unsigned long flags_spin;
  364. DECLARE_MAC_BUF(mac);
  365. spin_lock_irqsave(&priv->sta_lock, flags_spin);
  366. if (is_ap)
  367. index = IWL_AP_ID;
  368. else if (is_broadcast_ether_addr(addr))
  369. index = priv->hw_setting.bcast_sta_id;
  370. else
  371. for (i = IWL_STA_ID; i < priv->hw_setting.max_stations; i++) {
  372. if (!compare_ether_addr(priv->stations[i].sta.sta.addr,
  373. addr)) {
  374. index = i;
  375. break;
  376. }
  377. if (!priv->stations[i].used &&
  378. index == IWL_INVALID_STATION)
  379. index = i;
  380. }
  381. /* These two conditions have the same outcome, but keep them separate
  382. since they have different meanings */
  383. if (unlikely(index == IWL_INVALID_STATION)) {
  384. spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
  385. return index;
  386. }
  387. if (priv->stations[index].used &&
  388. !compare_ether_addr(priv->stations[index].sta.sta.addr, addr)) {
  389. spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
  390. return index;
  391. }
  392. IWL_DEBUG_ASSOC("Add STA ID %d: %s\n", index, print_mac(mac, addr));
  393. station = &priv->stations[index];
  394. station->used = 1;
  395. priv->num_stations++;
  396. /* Set up the REPLY_ADD_STA command to send to device */
  397. memset(&station->sta, 0, sizeof(struct iwl4965_addsta_cmd));
  398. memcpy(station->sta.sta.addr, addr, ETH_ALEN);
  399. station->sta.mode = 0;
  400. station->sta.sta.sta_id = index;
  401. station->sta.station_flags = 0;
  402. #ifdef CONFIG_IWL4965_HT
  403. /* BCAST station and IBSS stations do not work in HT mode */
  404. if (index != priv->hw_setting.bcast_sta_id &&
  405. priv->iw_mode != IEEE80211_IF_TYPE_IBSS)
  406. iwl4965_set_ht_add_station(priv, index,
  407. (struct ieee80211_ht_info *) ht_data);
  408. #endif /*CONFIG_IWL4965_HT*/
  409. spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
  410. /* Add station to device's station table */
  411. iwl4965_send_add_station(priv, &station->sta, flags);
  412. return index;
  413. }
  414. /*************** DRIVER STATUS FUNCTIONS *****/
  415. static inline int iwl4965_is_ready(struct iwl_priv *priv)
  416. {
  417. /* The adapter is 'ready' if READY and GEO_CONFIGURED bits are
  418. * set but EXIT_PENDING is not */
  419. return test_bit(STATUS_READY, &priv->status) &&
  420. test_bit(STATUS_GEO_CONFIGURED, &priv->status) &&
  421. !test_bit(STATUS_EXIT_PENDING, &priv->status);
  422. }
  423. static inline int iwl4965_is_alive(struct iwl_priv *priv)
  424. {
  425. return test_bit(STATUS_ALIVE, &priv->status);
  426. }
  427. static inline int iwl4965_is_init(struct iwl_priv *priv)
  428. {
  429. return test_bit(STATUS_INIT, &priv->status);
  430. }
  431. static inline int iwl4965_is_rfkill(struct iwl_priv *priv)
  432. {
  433. return test_bit(STATUS_RF_KILL_HW, &priv->status) ||
  434. test_bit(STATUS_RF_KILL_SW, &priv->status);
  435. }
  436. static inline int iwl4965_is_ready_rf(struct iwl_priv *priv)
  437. {
  438. if (iwl4965_is_rfkill(priv))
  439. return 0;
  440. return iwl4965_is_ready(priv);
  441. }
  442. /*************** HOST COMMAND QUEUE FUNCTIONS *****/
  443. /**
  444. * iwl4965_enqueue_hcmd - enqueue a uCode command
  445. * @priv: device private data point
  446. * @cmd: a point to the ucode command structure
  447. *
  448. * The function returns < 0 values to indicate the operation is
  449. * failed. On success, it turns the index (> 0) of command in the
  450. * command queue.
  451. */
  452. int iwl4965_enqueue_hcmd(struct iwl_priv *priv, struct iwl_host_cmd *cmd)
  453. {
  454. struct iwl4965_tx_queue *txq = &priv->txq[IWL_CMD_QUEUE_NUM];
  455. struct iwl4965_queue *q = &txq->q;
  456. struct iwl4965_tfd_frame *tfd;
  457. u32 *control_flags;
  458. struct iwl_cmd *out_cmd;
  459. u32 idx;
  460. u16 fix_size = (u16)(cmd->len + sizeof(out_cmd->hdr));
  461. dma_addr_t phys_addr;
  462. int ret;
  463. unsigned long flags;
  464. /* If any of the command structures end up being larger than
  465. * the TFD_MAX_PAYLOAD_SIZE, and it sent as a 'small' command then
  466. * we will need to increase the size of the TFD entries */
  467. BUG_ON((fix_size > TFD_MAX_PAYLOAD_SIZE) &&
  468. !(cmd->meta.flags & CMD_SIZE_HUGE));
  469. if (iwl4965_is_rfkill(priv)) {
  470. IWL_DEBUG_INFO("Not sending command - RF KILL");
  471. return -EIO;
  472. }
  473. if (iwl4965_queue_space(q) < ((cmd->meta.flags & CMD_ASYNC) ? 2 : 1)) {
  474. IWL_ERROR("No space for Tx\n");
  475. return -ENOSPC;
  476. }
  477. spin_lock_irqsave(&priv->hcmd_lock, flags);
  478. tfd = &txq->bd[q->write_ptr];
  479. memset(tfd, 0, sizeof(*tfd));
  480. control_flags = (u32 *) tfd;
  481. idx = get_cmd_index(q, q->write_ptr, cmd->meta.flags & CMD_SIZE_HUGE);
  482. out_cmd = &txq->cmd[idx];
  483. out_cmd->hdr.cmd = cmd->id;
  484. memcpy(&out_cmd->meta, &cmd->meta, sizeof(cmd->meta));
  485. memcpy(&out_cmd->cmd.payload, cmd->data, cmd->len);
  486. /* At this point, the out_cmd now has all of the incoming cmd
  487. * information */
  488. out_cmd->hdr.flags = 0;
  489. out_cmd->hdr.sequence = cpu_to_le16(QUEUE_TO_SEQ(IWL_CMD_QUEUE_NUM) |
  490. INDEX_TO_SEQ(q->write_ptr));
  491. if (out_cmd->meta.flags & CMD_SIZE_HUGE)
  492. out_cmd->hdr.sequence |= cpu_to_le16(SEQ_HUGE_FRAME);
  493. phys_addr = txq->dma_addr_cmd + sizeof(txq->cmd[0]) * idx +
  494. offsetof(struct iwl_cmd, hdr);
  495. iwl4965_hw_txq_attach_buf_to_tfd(priv, tfd, phys_addr, fix_size);
  496. IWL_DEBUG_HC("Sending command %s (#%x), seq: 0x%04X, "
  497. "%d bytes at %d[%d]:%d\n",
  498. get_cmd_string(out_cmd->hdr.cmd),
  499. out_cmd->hdr.cmd, le16_to_cpu(out_cmd->hdr.sequence),
  500. fix_size, q->write_ptr, idx, IWL_CMD_QUEUE_NUM);
  501. txq->need_update = 1;
  502. /* Set up entry in queue's byte count circular buffer */
  503. ret = iwl4965_tx_queue_update_wr_ptr(priv, txq, 0);
  504. /* Increment and update queue's write index */
  505. q->write_ptr = iwl_queue_inc_wrap(q->write_ptr, q->n_bd);
  506. iwl4965_tx_queue_update_write_ptr(priv, txq);
  507. spin_unlock_irqrestore(&priv->hcmd_lock, flags);
  508. return ret ? ret : idx;
  509. }
  510. static void iwl4965_set_rxon_hwcrypto(struct iwl_priv *priv, int hw_decrypt)
  511. {
  512. struct iwl4965_rxon_cmd *rxon = &priv->staging_rxon;
  513. if (hw_decrypt)
  514. rxon->filter_flags &= ~RXON_FILTER_DIS_DECRYPT_MSK;
  515. else
  516. rxon->filter_flags |= RXON_FILTER_DIS_DECRYPT_MSK;
  517. }
  518. int iwl4965_send_statistics_request(struct iwl_priv *priv)
  519. {
  520. u32 flags = 0;
  521. return iwl_send_cmd_pdu(priv, REPLY_STATISTICS_CMD,
  522. sizeof(flags), &flags);
  523. }
  524. /**
  525. * iwl4965_rxon_add_station - add station into station table.
  526. *
  527. * there is only one AP station with id= IWL_AP_ID
  528. * NOTE: mutex must be held before calling this fnction
  529. */
  530. static int iwl4965_rxon_add_station(struct iwl_priv *priv,
  531. const u8 *addr, int is_ap)
  532. {
  533. u8 sta_id;
  534. /* Add station to device's station table */
  535. #ifdef CONFIG_IWL4965_HT
  536. struct ieee80211_conf *conf = &priv->hw->conf;
  537. struct ieee80211_ht_info *cur_ht_config = &conf->ht_conf;
  538. if ((is_ap) &&
  539. (conf->flags & IEEE80211_CONF_SUPPORT_HT_MODE) &&
  540. (priv->iw_mode == IEEE80211_IF_TYPE_STA))
  541. sta_id = iwl4965_add_station_flags(priv, addr, is_ap,
  542. 0, cur_ht_config);
  543. else
  544. #endif /* CONFIG_IWL4965_HT */
  545. sta_id = iwl4965_add_station_flags(priv, addr, is_ap,
  546. 0, NULL);
  547. /* Set up default rate scaling table in device's station table */
  548. iwl4965_add_station(priv, addr, is_ap);
  549. return sta_id;
  550. }
  551. /**
  552. * iwl4965_check_rxon_cmd - validate RXON structure is valid
  553. *
  554. * NOTE: This is really only useful during development and can eventually
  555. * be #ifdef'd out once the driver is stable and folks aren't actively
  556. * making changes
  557. */
  558. static int iwl4965_check_rxon_cmd(struct iwl4965_rxon_cmd *rxon)
  559. {
  560. int error = 0;
  561. int counter = 1;
  562. if (rxon->flags & RXON_FLG_BAND_24G_MSK) {
  563. error |= le32_to_cpu(rxon->flags &
  564. (RXON_FLG_TGJ_NARROW_BAND_MSK |
  565. RXON_FLG_RADAR_DETECT_MSK));
  566. if (error)
  567. IWL_WARNING("check 24G fields %d | %d\n",
  568. counter++, error);
  569. } else {
  570. error |= (rxon->flags & RXON_FLG_SHORT_SLOT_MSK) ?
  571. 0 : le32_to_cpu(RXON_FLG_SHORT_SLOT_MSK);
  572. if (error)
  573. IWL_WARNING("check 52 fields %d | %d\n",
  574. counter++, error);
  575. error |= le32_to_cpu(rxon->flags & RXON_FLG_CCK_MSK);
  576. if (error)
  577. IWL_WARNING("check 52 CCK %d | %d\n",
  578. counter++, error);
  579. }
  580. error |= (rxon->node_addr[0] | rxon->bssid_addr[0]) & 0x1;
  581. if (error)
  582. IWL_WARNING("check mac addr %d | %d\n", counter++, error);
  583. /* make sure basic rates 6Mbps and 1Mbps are supported */
  584. error |= (((rxon->ofdm_basic_rates & IWL_RATE_6M_MASK) == 0) &&
  585. ((rxon->cck_basic_rates & IWL_RATE_1M_MASK) == 0));
  586. if (error)
  587. IWL_WARNING("check basic rate %d | %d\n", counter++, error);
  588. error |= (le16_to_cpu(rxon->assoc_id) > 2007);
  589. if (error)
  590. IWL_WARNING("check assoc id %d | %d\n", counter++, error);
  591. error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK))
  592. == (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK));
  593. if (error)
  594. IWL_WARNING("check CCK and short slot %d | %d\n",
  595. counter++, error);
  596. error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK))
  597. == (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK));
  598. if (error)
  599. IWL_WARNING("check CCK & auto detect %d | %d\n",
  600. counter++, error);
  601. error |= ((rxon->flags & (RXON_FLG_AUTO_DETECT_MSK |
  602. RXON_FLG_TGG_PROTECT_MSK)) == RXON_FLG_TGG_PROTECT_MSK);
  603. if (error)
  604. IWL_WARNING("check TGG and auto detect %d | %d\n",
  605. counter++, error);
  606. if (error)
  607. IWL_WARNING("Tuning to channel %d\n",
  608. le16_to_cpu(rxon->channel));
  609. if (error) {
  610. IWL_ERROR("Not a valid iwl4965_rxon_assoc_cmd field values\n");
  611. return -1;
  612. }
  613. return 0;
  614. }
  615. /**
  616. * iwl4965_full_rxon_required - check if full RXON (vs RXON_ASSOC) cmd is needed
  617. * @priv: staging_rxon is compared to active_rxon
  618. *
  619. * If the RXON structure is changing enough to require a new tune,
  620. * or is clearing the RXON_FILTER_ASSOC_MSK, then return 1 to indicate that
  621. * a new tune (full RXON command, rather than RXON_ASSOC cmd) is required.
  622. */
  623. static int iwl4965_full_rxon_required(struct iwl_priv *priv)
  624. {
  625. /* These items are only settable from the full RXON command */
  626. if (!(priv->active_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) ||
  627. compare_ether_addr(priv->staging_rxon.bssid_addr,
  628. priv->active_rxon.bssid_addr) ||
  629. compare_ether_addr(priv->staging_rxon.node_addr,
  630. priv->active_rxon.node_addr) ||
  631. compare_ether_addr(priv->staging_rxon.wlap_bssid_addr,
  632. priv->active_rxon.wlap_bssid_addr) ||
  633. (priv->staging_rxon.dev_type != priv->active_rxon.dev_type) ||
  634. (priv->staging_rxon.channel != priv->active_rxon.channel) ||
  635. (priv->staging_rxon.air_propagation !=
  636. priv->active_rxon.air_propagation) ||
  637. (priv->staging_rxon.ofdm_ht_single_stream_basic_rates !=
  638. priv->active_rxon.ofdm_ht_single_stream_basic_rates) ||
  639. (priv->staging_rxon.ofdm_ht_dual_stream_basic_rates !=
  640. priv->active_rxon.ofdm_ht_dual_stream_basic_rates) ||
  641. (priv->staging_rxon.rx_chain != priv->active_rxon.rx_chain) ||
  642. (priv->staging_rxon.assoc_id != priv->active_rxon.assoc_id))
  643. return 1;
  644. /* flags, filter_flags, ofdm_basic_rates, and cck_basic_rates can
  645. * be updated with the RXON_ASSOC command -- however only some
  646. * flag transitions are allowed using RXON_ASSOC */
  647. /* Check if we are not switching bands */
  648. if ((priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) !=
  649. (priv->active_rxon.flags & RXON_FLG_BAND_24G_MSK))
  650. return 1;
  651. /* Check if we are switching association toggle */
  652. if ((priv->staging_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) !=
  653. (priv->active_rxon.filter_flags & RXON_FILTER_ASSOC_MSK))
  654. return 1;
  655. return 0;
  656. }
  657. static int iwl4965_send_rxon_assoc(struct iwl_priv *priv)
  658. {
  659. int rc = 0;
  660. struct iwl4965_rx_packet *res = NULL;
  661. struct iwl4965_rxon_assoc_cmd rxon_assoc;
  662. struct iwl_host_cmd cmd = {
  663. .id = REPLY_RXON_ASSOC,
  664. .len = sizeof(rxon_assoc),
  665. .meta.flags = CMD_WANT_SKB,
  666. .data = &rxon_assoc,
  667. };
  668. const struct iwl4965_rxon_cmd *rxon1 = &priv->staging_rxon;
  669. const struct iwl4965_rxon_cmd *rxon2 = &priv->active_rxon;
  670. if ((rxon1->flags == rxon2->flags) &&
  671. (rxon1->filter_flags == rxon2->filter_flags) &&
  672. (rxon1->cck_basic_rates == rxon2->cck_basic_rates) &&
  673. (rxon1->ofdm_ht_single_stream_basic_rates ==
  674. rxon2->ofdm_ht_single_stream_basic_rates) &&
  675. (rxon1->ofdm_ht_dual_stream_basic_rates ==
  676. rxon2->ofdm_ht_dual_stream_basic_rates) &&
  677. (rxon1->rx_chain == rxon2->rx_chain) &&
  678. (rxon1->ofdm_basic_rates == rxon2->ofdm_basic_rates)) {
  679. IWL_DEBUG_INFO("Using current RXON_ASSOC. Not resending.\n");
  680. return 0;
  681. }
  682. rxon_assoc.flags = priv->staging_rxon.flags;
  683. rxon_assoc.filter_flags = priv->staging_rxon.filter_flags;
  684. rxon_assoc.ofdm_basic_rates = priv->staging_rxon.ofdm_basic_rates;
  685. rxon_assoc.cck_basic_rates = priv->staging_rxon.cck_basic_rates;
  686. rxon_assoc.reserved = 0;
  687. rxon_assoc.ofdm_ht_single_stream_basic_rates =
  688. priv->staging_rxon.ofdm_ht_single_stream_basic_rates;
  689. rxon_assoc.ofdm_ht_dual_stream_basic_rates =
  690. priv->staging_rxon.ofdm_ht_dual_stream_basic_rates;
  691. rxon_assoc.rx_chain_select_flags = priv->staging_rxon.rx_chain;
  692. rc = iwl_send_cmd_sync(priv, &cmd);
  693. if (rc)
  694. return rc;
  695. res = (struct iwl4965_rx_packet *)cmd.meta.u.skb->data;
  696. if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
  697. IWL_ERROR("Bad return from REPLY_RXON_ASSOC command\n");
  698. rc = -EIO;
  699. }
  700. priv->alloc_rxb_skb--;
  701. dev_kfree_skb_any(cmd.meta.u.skb);
  702. return rc;
  703. }
  704. /**
  705. * iwl4965_commit_rxon - commit staging_rxon to hardware
  706. *
  707. * The RXON command in staging_rxon is committed to the hardware and
  708. * the active_rxon structure is updated with the new data. This
  709. * function correctly transitions out of the RXON_ASSOC_MSK state if
  710. * a HW tune is required based on the RXON structure changes.
  711. */
  712. static int iwl4965_commit_rxon(struct iwl_priv *priv)
  713. {
  714. /* cast away the const for active_rxon in this function */
  715. struct iwl4965_rxon_cmd *active_rxon = (void *)&priv->active_rxon;
  716. DECLARE_MAC_BUF(mac);
  717. int rc = 0;
  718. if (!iwl4965_is_alive(priv))
  719. return -1;
  720. /* always get timestamp with Rx frame */
  721. priv->staging_rxon.flags |= RXON_FLG_TSF2HOST_MSK;
  722. rc = iwl4965_check_rxon_cmd(&priv->staging_rxon);
  723. if (rc) {
  724. IWL_ERROR("Invalid RXON configuration. Not committing.\n");
  725. return -EINVAL;
  726. }
  727. /* If we don't need to send a full RXON, we can use
  728. * iwl4965_rxon_assoc_cmd which is used to reconfigure filter
  729. * and other flags for the current radio configuration. */
  730. if (!iwl4965_full_rxon_required(priv)) {
  731. rc = iwl4965_send_rxon_assoc(priv);
  732. if (rc) {
  733. IWL_ERROR("Error setting RXON_ASSOC "
  734. "configuration (%d).\n", rc);
  735. return rc;
  736. }
  737. memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
  738. return 0;
  739. }
  740. /* station table will be cleared */
  741. priv->assoc_station_added = 0;
  742. #ifdef CONFIG_IWL4965_SENSITIVITY
  743. priv->sensitivity_data.state = IWL_SENS_CALIB_NEED_REINIT;
  744. if (!priv->error_recovering)
  745. priv->start_calib = 0;
  746. iwl4965_init_sensitivity(priv, CMD_ASYNC, 1);
  747. #endif /* CONFIG_IWL4965_SENSITIVITY */
  748. /* If we are currently associated and the new config requires
  749. * an RXON_ASSOC and the new config wants the associated mask enabled,
  750. * we must clear the associated from the active configuration
  751. * before we apply the new config */
  752. if (iwl4965_is_associated(priv) &&
  753. (priv->staging_rxon.filter_flags & RXON_FILTER_ASSOC_MSK)) {
  754. IWL_DEBUG_INFO("Toggling associated bit on current RXON\n");
  755. active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  756. rc = iwl_send_cmd_pdu(priv, REPLY_RXON,
  757. sizeof(struct iwl4965_rxon_cmd),
  758. &priv->active_rxon);
  759. /* If the mask clearing failed then we set
  760. * active_rxon back to what it was previously */
  761. if (rc) {
  762. active_rxon->filter_flags |= RXON_FILTER_ASSOC_MSK;
  763. IWL_ERROR("Error clearing ASSOC_MSK on current "
  764. "configuration (%d).\n", rc);
  765. return rc;
  766. }
  767. }
  768. IWL_DEBUG_INFO("Sending RXON\n"
  769. "* with%s RXON_FILTER_ASSOC_MSK\n"
  770. "* channel = %d\n"
  771. "* bssid = %s\n",
  772. ((priv->staging_rxon.filter_flags &
  773. RXON_FILTER_ASSOC_MSK) ? "" : "out"),
  774. le16_to_cpu(priv->staging_rxon.channel),
  775. print_mac(mac, priv->staging_rxon.bssid_addr));
  776. iwl4965_set_rxon_hwcrypto(priv, priv->cfg->mod_params->hw_crypto);
  777. /* Apply the new configuration */
  778. rc = iwl_send_cmd_pdu(priv, REPLY_RXON,
  779. sizeof(struct iwl4965_rxon_cmd), &priv->staging_rxon);
  780. if (rc) {
  781. IWL_ERROR("Error setting new configuration (%d).\n", rc);
  782. return rc;
  783. }
  784. iwlcore_clear_stations_table(priv);
  785. #ifdef CONFIG_IWL4965_SENSITIVITY
  786. if (!priv->error_recovering)
  787. priv->start_calib = 0;
  788. priv->sensitivity_data.state = IWL_SENS_CALIB_NEED_REINIT;
  789. iwl4965_init_sensitivity(priv, CMD_ASYNC, 1);
  790. #endif /* CONFIG_IWL4965_SENSITIVITY */
  791. memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
  792. /* If we issue a new RXON command which required a tune then we must
  793. * send a new TXPOWER command or we won't be able to Tx any frames */
  794. rc = iwl4965_hw_reg_send_txpower(priv);
  795. if (rc) {
  796. IWL_ERROR("Error setting Tx power (%d).\n", rc);
  797. return rc;
  798. }
  799. /* Add the broadcast address so we can send broadcast frames */
  800. if (iwl4965_rxon_add_station(priv, iwl4965_broadcast_addr, 0) ==
  801. IWL_INVALID_STATION) {
  802. IWL_ERROR("Error adding BROADCAST address for transmit.\n");
  803. return -EIO;
  804. }
  805. /* If we have set the ASSOC_MSK and we are in BSS mode then
  806. * add the IWL_AP_ID to the station rate table */
  807. if (iwl4965_is_associated(priv) &&
  808. (priv->iw_mode == IEEE80211_IF_TYPE_STA)) {
  809. if (iwl4965_rxon_add_station(priv, priv->active_rxon.bssid_addr, 1)
  810. == IWL_INVALID_STATION) {
  811. IWL_ERROR("Error adding AP address for transmit.\n");
  812. return -EIO;
  813. }
  814. priv->assoc_station_added = 1;
  815. }
  816. return 0;
  817. }
  818. static int iwl4965_send_bt_config(struct iwl_priv *priv)
  819. {
  820. struct iwl4965_bt_cmd bt_cmd = {
  821. .flags = 3,
  822. .lead_time = 0xAA,
  823. .max_kill = 1,
  824. .kill_ack_mask = 0,
  825. .kill_cts_mask = 0,
  826. };
  827. return iwl_send_cmd_pdu(priv, REPLY_BT_CONFIG,
  828. sizeof(struct iwl4965_bt_cmd), &bt_cmd);
  829. }
  830. static int iwl4965_send_scan_abort(struct iwl_priv *priv)
  831. {
  832. int rc = 0;
  833. struct iwl4965_rx_packet *res;
  834. struct iwl_host_cmd cmd = {
  835. .id = REPLY_SCAN_ABORT_CMD,
  836. .meta.flags = CMD_WANT_SKB,
  837. };
  838. /* If there isn't a scan actively going on in the hardware
  839. * then we are in between scan bands and not actually
  840. * actively scanning, so don't send the abort command */
  841. if (!test_bit(STATUS_SCAN_HW, &priv->status)) {
  842. clear_bit(STATUS_SCAN_ABORTING, &priv->status);
  843. return 0;
  844. }
  845. rc = iwl_send_cmd_sync(priv, &cmd);
  846. if (rc) {
  847. clear_bit(STATUS_SCAN_ABORTING, &priv->status);
  848. return rc;
  849. }
  850. res = (struct iwl4965_rx_packet *)cmd.meta.u.skb->data;
  851. if (res->u.status != CAN_ABORT_STATUS) {
  852. /* The scan abort will return 1 for success or
  853. * 2 for "failure". A failure condition can be
  854. * due to simply not being in an active scan which
  855. * can occur if we send the scan abort before we
  856. * the microcode has notified us that a scan is
  857. * completed. */
  858. IWL_DEBUG_INFO("SCAN_ABORT returned %d.\n", res->u.status);
  859. clear_bit(STATUS_SCAN_ABORTING, &priv->status);
  860. clear_bit(STATUS_SCAN_HW, &priv->status);
  861. }
  862. dev_kfree_skb_any(cmd.meta.u.skb);
  863. return rc;
  864. }
  865. static int iwl4965_card_state_sync_callback(struct iwl_priv *priv,
  866. struct iwl_cmd *cmd,
  867. struct sk_buff *skb)
  868. {
  869. return 1;
  870. }
  871. /*
  872. * CARD_STATE_CMD
  873. *
  874. * Use: Sets the device's internal card state to enable, disable, or halt
  875. *
  876. * When in the 'enable' state the card operates as normal.
  877. * When in the 'disable' state, the card enters into a low power mode.
  878. * When in the 'halt' state, the card is shut down and must be fully
  879. * restarted to come back on.
  880. */
  881. static int iwl4965_send_card_state(struct iwl_priv *priv, u32 flags, u8 meta_flag)
  882. {
  883. struct iwl_host_cmd cmd = {
  884. .id = REPLY_CARD_STATE_CMD,
  885. .len = sizeof(u32),
  886. .data = &flags,
  887. .meta.flags = meta_flag,
  888. };
  889. if (meta_flag & CMD_ASYNC)
  890. cmd.meta.u.callback = iwl4965_card_state_sync_callback;
  891. return iwl_send_cmd(priv, &cmd);
  892. }
  893. static int iwl4965_add_sta_sync_callback(struct iwl_priv *priv,
  894. struct iwl_cmd *cmd, struct sk_buff *skb)
  895. {
  896. struct iwl4965_rx_packet *res = NULL;
  897. if (!skb) {
  898. IWL_ERROR("Error: Response NULL in REPLY_ADD_STA.\n");
  899. return 1;
  900. }
  901. res = (struct iwl4965_rx_packet *)skb->data;
  902. if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
  903. IWL_ERROR("Bad return from REPLY_ADD_STA (0x%08X)\n",
  904. res->hdr.flags);
  905. return 1;
  906. }
  907. switch (res->u.add_sta.status) {
  908. case ADD_STA_SUCCESS_MSK:
  909. break;
  910. default:
  911. break;
  912. }
  913. /* We didn't cache the SKB; let the caller free it */
  914. return 1;
  915. }
  916. int iwl4965_send_add_station(struct iwl_priv *priv,
  917. struct iwl4965_addsta_cmd *sta, u8 flags)
  918. {
  919. struct iwl4965_rx_packet *res = NULL;
  920. int rc = 0;
  921. struct iwl_host_cmd cmd = {
  922. .id = REPLY_ADD_STA,
  923. .len = sizeof(struct iwl4965_addsta_cmd),
  924. .meta.flags = flags,
  925. .data = sta,
  926. };
  927. if (flags & CMD_ASYNC)
  928. cmd.meta.u.callback = iwl4965_add_sta_sync_callback;
  929. else
  930. cmd.meta.flags |= CMD_WANT_SKB;
  931. rc = iwl_send_cmd(priv, &cmd);
  932. if (rc || (flags & CMD_ASYNC))
  933. return rc;
  934. res = (struct iwl4965_rx_packet *)cmd.meta.u.skb->data;
  935. if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
  936. IWL_ERROR("Bad return from REPLY_ADD_STA (0x%08X)\n",
  937. res->hdr.flags);
  938. rc = -EIO;
  939. }
  940. if (rc == 0) {
  941. switch (res->u.add_sta.status) {
  942. case ADD_STA_SUCCESS_MSK:
  943. IWL_DEBUG_INFO("REPLY_ADD_STA PASSED\n");
  944. break;
  945. default:
  946. rc = -EIO;
  947. IWL_WARNING("REPLY_ADD_STA failed\n");
  948. break;
  949. }
  950. }
  951. priv->alloc_rxb_skb--;
  952. dev_kfree_skb_any(cmd.meta.u.skb);
  953. return rc;
  954. }
  955. static int iwl4965_set_ccmp_dynamic_key_info(struct iwl_priv *priv,
  956. struct ieee80211_key_conf *keyconf,
  957. u8 sta_id)
  958. {
  959. unsigned long flags;
  960. __le16 key_flags = 0;
  961. key_flags |= (STA_KEY_FLG_CCMP | STA_KEY_FLG_MAP_KEY_MSK);
  962. key_flags |= cpu_to_le16(keyconf->keyidx << STA_KEY_FLG_KEYID_POS);
  963. if (sta_id == priv->hw_setting.bcast_sta_id)
  964. key_flags |= STA_KEY_MULTICAST_MSK;
  965. keyconf->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
  966. keyconf->hw_key_idx = keyconf->keyidx;
  967. key_flags &= ~STA_KEY_FLG_INVALID;
  968. spin_lock_irqsave(&priv->sta_lock, flags);
  969. priv->stations[sta_id].keyinfo.alg = keyconf->alg;
  970. priv->stations[sta_id].keyinfo.keylen = keyconf->keylen;
  971. memcpy(priv->stations[sta_id].keyinfo.key, keyconf->key,
  972. keyconf->keylen);
  973. memcpy(priv->stations[sta_id].sta.key.key, keyconf->key,
  974. keyconf->keylen);
  975. priv->stations[sta_id].sta.key.key_offset
  976. = (sta_id % STA_KEY_MAX_NUM);/*FIXME*/
  977. priv->stations[sta_id].sta.key.key_flags = key_flags;
  978. priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
  979. priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
  980. spin_unlock_irqrestore(&priv->sta_lock, flags);
  981. IWL_DEBUG_INFO("hwcrypto: modify ucode station key info\n");
  982. return iwl4965_send_add_station(priv,
  983. &priv->stations[sta_id].sta, CMD_ASYNC);
  984. }
  985. static int iwl4965_set_tkip_dynamic_key_info(struct iwl_priv *priv,
  986. struct ieee80211_key_conf *keyconf,
  987. u8 sta_id)
  988. {
  989. unsigned long flags;
  990. int ret = 0;
  991. keyconf->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
  992. keyconf->flags |= IEEE80211_KEY_FLAG_GENERATE_MMIC;
  993. keyconf->hw_key_idx = keyconf->keyidx;
  994. spin_lock_irqsave(&priv->sta_lock, flags);
  995. priv->stations[sta_id].keyinfo.alg = keyconf->alg;
  996. priv->stations[sta_id].keyinfo.conf = keyconf;
  997. priv->stations[sta_id].keyinfo.keylen = 16;
  998. /* This copy is acutally not needed: we get the key with each TX */
  999. memcpy(priv->stations[sta_id].keyinfo.key, keyconf->key, 16);
  1000. memcpy(priv->stations[sta_id].sta.key.key, keyconf->key, 16);
  1001. spin_unlock_irqrestore(&priv->sta_lock, flags);
  1002. return ret;
  1003. }
  1004. static int iwl4965_clear_sta_key_info(struct iwl_priv *priv, u8 sta_id)
  1005. {
  1006. unsigned long flags;
  1007. spin_lock_irqsave(&priv->sta_lock, flags);
  1008. memset(&priv->stations[sta_id].keyinfo, 0, sizeof(struct iwl4965_hw_key));
  1009. memset(&priv->stations[sta_id].sta.key, 0, sizeof(struct iwl4965_keyinfo));
  1010. priv->stations[sta_id].sta.key.key_flags = STA_KEY_FLG_NO_ENC;
  1011. priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
  1012. priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
  1013. spin_unlock_irqrestore(&priv->sta_lock, flags);
  1014. IWL_DEBUG_INFO("hwcrypto: clear ucode station key info\n");
  1015. iwl4965_send_add_station(priv, &priv->stations[sta_id].sta, 0);
  1016. return 0;
  1017. }
  1018. static int iwl4965_set_dynamic_key(struct iwl_priv *priv,
  1019. struct ieee80211_key_conf *key, u8 sta_id)
  1020. {
  1021. int ret;
  1022. switch (key->alg) {
  1023. case ALG_CCMP:
  1024. ret = iwl4965_set_ccmp_dynamic_key_info(priv, key, sta_id);
  1025. break;
  1026. case ALG_TKIP:
  1027. ret = iwl4965_set_tkip_dynamic_key_info(priv, key, sta_id);
  1028. break;
  1029. case ALG_WEP:
  1030. ret = -EOPNOTSUPP;
  1031. break;
  1032. default:
  1033. IWL_ERROR("Unknown alg: %s alg = %d\n", __func__, key->alg);
  1034. ret = -EINVAL;
  1035. }
  1036. return ret;
  1037. }
  1038. static int iwl4965_remove_static_key(struct iwl_priv *priv)
  1039. {
  1040. int ret = -EOPNOTSUPP;
  1041. return ret;
  1042. }
  1043. static int iwl4965_set_static_key(struct iwl_priv *priv,
  1044. struct ieee80211_key_conf *key)
  1045. {
  1046. if (key->alg == ALG_WEP)
  1047. return -EOPNOTSUPP;
  1048. IWL_ERROR("Static key invalid: alg %d\n", key->alg);
  1049. return -EINVAL;
  1050. }
  1051. static void iwl4965_clear_free_frames(struct iwl_priv *priv)
  1052. {
  1053. struct list_head *element;
  1054. IWL_DEBUG_INFO("%d frames on pre-allocated heap on clear.\n",
  1055. priv->frames_count);
  1056. while (!list_empty(&priv->free_frames)) {
  1057. element = priv->free_frames.next;
  1058. list_del(element);
  1059. kfree(list_entry(element, struct iwl4965_frame, list));
  1060. priv->frames_count--;
  1061. }
  1062. if (priv->frames_count) {
  1063. IWL_WARNING("%d frames still in use. Did we lose one?\n",
  1064. priv->frames_count);
  1065. priv->frames_count = 0;
  1066. }
  1067. }
  1068. static struct iwl4965_frame *iwl4965_get_free_frame(struct iwl_priv *priv)
  1069. {
  1070. struct iwl4965_frame *frame;
  1071. struct list_head *element;
  1072. if (list_empty(&priv->free_frames)) {
  1073. frame = kzalloc(sizeof(*frame), GFP_KERNEL);
  1074. if (!frame) {
  1075. IWL_ERROR("Could not allocate frame!\n");
  1076. return NULL;
  1077. }
  1078. priv->frames_count++;
  1079. return frame;
  1080. }
  1081. element = priv->free_frames.next;
  1082. list_del(element);
  1083. return list_entry(element, struct iwl4965_frame, list);
  1084. }
  1085. static void iwl4965_free_frame(struct iwl_priv *priv, struct iwl4965_frame *frame)
  1086. {
  1087. memset(frame, 0, sizeof(*frame));
  1088. list_add(&frame->list, &priv->free_frames);
  1089. }
  1090. unsigned int iwl4965_fill_beacon_frame(struct iwl_priv *priv,
  1091. struct ieee80211_hdr *hdr,
  1092. const u8 *dest, int left)
  1093. {
  1094. if (!iwl4965_is_associated(priv) || !priv->ibss_beacon ||
  1095. ((priv->iw_mode != IEEE80211_IF_TYPE_IBSS) &&
  1096. (priv->iw_mode != IEEE80211_IF_TYPE_AP)))
  1097. return 0;
  1098. if (priv->ibss_beacon->len > left)
  1099. return 0;
  1100. memcpy(hdr, priv->ibss_beacon->data, priv->ibss_beacon->len);
  1101. return priv->ibss_beacon->len;
  1102. }
  1103. static u8 iwl4965_rate_get_lowest_plcp(int rate_mask)
  1104. {
  1105. u8 i;
  1106. for (i = IWL_RATE_1M_INDEX; i != IWL_RATE_INVALID;
  1107. i = iwl4965_rates[i].next_ieee) {
  1108. if (rate_mask & (1 << i))
  1109. return iwl4965_rates[i].plcp;
  1110. }
  1111. return IWL_RATE_INVALID;
  1112. }
  1113. static int iwl4965_send_beacon_cmd(struct iwl_priv *priv)
  1114. {
  1115. struct iwl4965_frame *frame;
  1116. unsigned int frame_size;
  1117. int rc;
  1118. u8 rate;
  1119. frame = iwl4965_get_free_frame(priv);
  1120. if (!frame) {
  1121. IWL_ERROR("Could not obtain free frame buffer for beacon "
  1122. "command.\n");
  1123. return -ENOMEM;
  1124. }
  1125. if (!(priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK)) {
  1126. rate = iwl4965_rate_get_lowest_plcp(priv->active_rate_basic &
  1127. 0xFF0);
  1128. if (rate == IWL_INVALID_RATE)
  1129. rate = IWL_RATE_6M_PLCP;
  1130. } else {
  1131. rate = iwl4965_rate_get_lowest_plcp(priv->active_rate_basic & 0xF);
  1132. if (rate == IWL_INVALID_RATE)
  1133. rate = IWL_RATE_1M_PLCP;
  1134. }
  1135. frame_size = iwl4965_hw_get_beacon_cmd(priv, frame, rate);
  1136. rc = iwl_send_cmd_pdu(priv, REPLY_TX_BEACON, frame_size,
  1137. &frame->u.cmd[0]);
  1138. iwl4965_free_frame(priv, frame);
  1139. return rc;
  1140. }
  1141. /******************************************************************************
  1142. *
  1143. * Misc. internal state and helper functions
  1144. *
  1145. ******************************************************************************/
  1146. static void iwl4965_unset_hw_setting(struct iwl_priv *priv)
  1147. {
  1148. if (priv->hw_setting.shared_virt)
  1149. pci_free_consistent(priv->pci_dev,
  1150. sizeof(struct iwl4965_shared),
  1151. priv->hw_setting.shared_virt,
  1152. priv->hw_setting.shared_phys);
  1153. }
  1154. /**
  1155. * iwl4965_supported_rate_to_ie - fill in the supported rate in IE field
  1156. *
  1157. * return : set the bit for each supported rate insert in ie
  1158. */
  1159. static u16 iwl4965_supported_rate_to_ie(u8 *ie, u16 supported_rate,
  1160. u16 basic_rate, int *left)
  1161. {
  1162. u16 ret_rates = 0, bit;
  1163. int i;
  1164. u8 *cnt = ie;
  1165. u8 *rates = ie + 1;
  1166. for (bit = 1, i = 0; i < IWL_RATE_COUNT; i++, bit <<= 1) {
  1167. if (bit & supported_rate) {
  1168. ret_rates |= bit;
  1169. rates[*cnt] = iwl4965_rates[i].ieee |
  1170. ((bit & basic_rate) ? 0x80 : 0x00);
  1171. (*cnt)++;
  1172. (*left)--;
  1173. if ((*left <= 0) ||
  1174. (*cnt >= IWL_SUPPORTED_RATES_IE_LEN))
  1175. break;
  1176. }
  1177. }
  1178. return ret_rates;
  1179. }
  1180. /**
  1181. * iwl4965_fill_probe_req - fill in all required fields and IE for probe request
  1182. */
  1183. static u16 iwl4965_fill_probe_req(struct iwl_priv *priv,
  1184. enum ieee80211_band band,
  1185. struct ieee80211_mgmt *frame,
  1186. int left, int is_direct)
  1187. {
  1188. int len = 0;
  1189. u8 *pos = NULL;
  1190. u16 active_rates, ret_rates, cck_rates, active_rate_basic;
  1191. #ifdef CONFIG_IWL4965_HT
  1192. const struct ieee80211_supported_band *sband =
  1193. iwl4965_get_hw_mode(priv, band);
  1194. #endif /* CONFIG_IWL4965_HT */
  1195. /* Make sure there is enough space for the probe request,
  1196. * two mandatory IEs and the data */
  1197. left -= 24;
  1198. if (left < 0)
  1199. return 0;
  1200. len += 24;
  1201. frame->frame_control = cpu_to_le16(IEEE80211_STYPE_PROBE_REQ);
  1202. memcpy(frame->da, iwl4965_broadcast_addr, ETH_ALEN);
  1203. memcpy(frame->sa, priv->mac_addr, ETH_ALEN);
  1204. memcpy(frame->bssid, iwl4965_broadcast_addr, ETH_ALEN);
  1205. frame->seq_ctrl = 0;
  1206. /* fill in our indirect SSID IE */
  1207. /* ...next IE... */
  1208. left -= 2;
  1209. if (left < 0)
  1210. return 0;
  1211. len += 2;
  1212. pos = &(frame->u.probe_req.variable[0]);
  1213. *pos++ = WLAN_EID_SSID;
  1214. *pos++ = 0;
  1215. /* fill in our direct SSID IE... */
  1216. if (is_direct) {
  1217. /* ...next IE... */
  1218. left -= 2 + priv->essid_len;
  1219. if (left < 0)
  1220. return 0;
  1221. /* ... fill it in... */
  1222. *pos++ = WLAN_EID_SSID;
  1223. *pos++ = priv->essid_len;
  1224. memcpy(pos, priv->essid, priv->essid_len);
  1225. pos += priv->essid_len;
  1226. len += 2 + priv->essid_len;
  1227. }
  1228. /* fill in supported rate */
  1229. /* ...next IE... */
  1230. left -= 2;
  1231. if (left < 0)
  1232. return 0;
  1233. /* ... fill it in... */
  1234. *pos++ = WLAN_EID_SUPP_RATES;
  1235. *pos = 0;
  1236. /* exclude 60M rate */
  1237. active_rates = priv->rates_mask;
  1238. active_rates &= ~IWL_RATE_60M_MASK;
  1239. active_rate_basic = active_rates & IWL_BASIC_RATES_MASK;
  1240. cck_rates = IWL_CCK_RATES_MASK & active_rates;
  1241. ret_rates = iwl4965_supported_rate_to_ie(pos, cck_rates,
  1242. active_rate_basic, &left);
  1243. active_rates &= ~ret_rates;
  1244. ret_rates = iwl4965_supported_rate_to_ie(pos, active_rates,
  1245. active_rate_basic, &left);
  1246. active_rates &= ~ret_rates;
  1247. len += 2 + *pos;
  1248. pos += (*pos) + 1;
  1249. if (active_rates == 0)
  1250. goto fill_end;
  1251. /* fill in supported extended rate */
  1252. /* ...next IE... */
  1253. left -= 2;
  1254. if (left < 0)
  1255. return 0;
  1256. /* ... fill it in... */
  1257. *pos++ = WLAN_EID_EXT_SUPP_RATES;
  1258. *pos = 0;
  1259. iwl4965_supported_rate_to_ie(pos, active_rates,
  1260. active_rate_basic, &left);
  1261. if (*pos > 0)
  1262. len += 2 + *pos;
  1263. #ifdef CONFIG_IWL4965_HT
  1264. if (sband && sband->ht_info.ht_supported) {
  1265. struct ieee80211_ht_cap *ht_cap;
  1266. pos += (*pos) + 1;
  1267. *pos++ = WLAN_EID_HT_CAPABILITY;
  1268. *pos++ = sizeof(struct ieee80211_ht_cap);
  1269. ht_cap = (struct ieee80211_ht_cap *)pos;
  1270. ht_cap->cap_info = cpu_to_le16(sband->ht_info.cap);
  1271. memcpy(ht_cap->supp_mcs_set, sband->ht_info.supp_mcs_set, 16);
  1272. ht_cap->ampdu_params_info =(sband->ht_info.ampdu_factor &
  1273. IEEE80211_HT_CAP_AMPDU_FACTOR) |
  1274. ((sband->ht_info.ampdu_density << 2) &
  1275. IEEE80211_HT_CAP_AMPDU_DENSITY);
  1276. len += 2 + sizeof(struct ieee80211_ht_cap);
  1277. }
  1278. #endif /*CONFIG_IWL4965_HT */
  1279. fill_end:
  1280. return (u16)len;
  1281. }
  1282. /*
  1283. * QoS support
  1284. */
  1285. static int iwl4965_send_qos_params_command(struct iwl_priv *priv,
  1286. struct iwl4965_qosparam_cmd *qos)
  1287. {
  1288. return iwl_send_cmd_pdu(priv, REPLY_QOS_PARAM,
  1289. sizeof(struct iwl4965_qosparam_cmd), qos);
  1290. }
  1291. static void iwl4965_activate_qos(struct iwl_priv *priv, u8 force)
  1292. {
  1293. unsigned long flags;
  1294. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  1295. return;
  1296. if (!priv->qos_data.qos_enable)
  1297. return;
  1298. spin_lock_irqsave(&priv->lock, flags);
  1299. priv->qos_data.def_qos_parm.qos_flags = 0;
  1300. if (priv->qos_data.qos_cap.q_AP.queue_request &&
  1301. !priv->qos_data.qos_cap.q_AP.txop_request)
  1302. priv->qos_data.def_qos_parm.qos_flags |=
  1303. QOS_PARAM_FLG_TXOP_TYPE_MSK;
  1304. if (priv->qos_data.qos_active)
  1305. priv->qos_data.def_qos_parm.qos_flags |=
  1306. QOS_PARAM_FLG_UPDATE_EDCA_MSK;
  1307. #ifdef CONFIG_IWL4965_HT
  1308. if (priv->current_ht_config.is_ht)
  1309. priv->qos_data.def_qos_parm.qos_flags |= QOS_PARAM_FLG_TGN_MSK;
  1310. #endif /* CONFIG_IWL4965_HT */
  1311. spin_unlock_irqrestore(&priv->lock, flags);
  1312. if (force || iwl4965_is_associated(priv)) {
  1313. IWL_DEBUG_QOS("send QoS cmd with Qos active=%d FLAGS=0x%X\n",
  1314. priv->qos_data.qos_active,
  1315. priv->qos_data.def_qos_parm.qos_flags);
  1316. iwl4965_send_qos_params_command(priv,
  1317. &(priv->qos_data.def_qos_parm));
  1318. }
  1319. }
  1320. /*
  1321. * Power management (not Tx power!) functions
  1322. */
  1323. #define MSEC_TO_USEC 1024
  1324. #define NOSLP __constant_cpu_to_le16(0), 0, 0
  1325. #define SLP IWL_POWER_DRIVER_ALLOW_SLEEP_MSK, 0, 0
  1326. #define SLP_TIMEOUT(T) __constant_cpu_to_le32((T) * MSEC_TO_USEC)
  1327. #define SLP_VEC(X0, X1, X2, X3, X4) {__constant_cpu_to_le32(X0), \
  1328. __constant_cpu_to_le32(X1), \
  1329. __constant_cpu_to_le32(X2), \
  1330. __constant_cpu_to_le32(X3), \
  1331. __constant_cpu_to_le32(X4)}
  1332. /* default power management (not Tx power) table values */
  1333. /* for tim 0-10 */
  1334. static struct iwl4965_power_vec_entry range_0[IWL_POWER_AC] = {
  1335. {{NOSLP, SLP_TIMEOUT(0), SLP_TIMEOUT(0), SLP_VEC(0, 0, 0, 0, 0)}, 0},
  1336. {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(500), SLP_VEC(1, 2, 3, 4, 4)}, 0},
  1337. {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(300), SLP_VEC(2, 4, 6, 7, 7)}, 0},
  1338. {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(100), SLP_VEC(2, 6, 9, 9, 10)}, 0},
  1339. {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(25), SLP_VEC(2, 7, 9, 9, 10)}, 1},
  1340. {{SLP, SLP_TIMEOUT(25), SLP_TIMEOUT(25), SLP_VEC(4, 7, 10, 10, 10)}, 1}
  1341. };
  1342. /* for tim > 10 */
  1343. static struct iwl4965_power_vec_entry range_1[IWL_POWER_AC] = {
  1344. {{NOSLP, SLP_TIMEOUT(0), SLP_TIMEOUT(0), SLP_VEC(0, 0, 0, 0, 0)}, 0},
  1345. {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(500),
  1346. SLP_VEC(1, 2, 3, 4, 0xFF)}, 0},
  1347. {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(300),
  1348. SLP_VEC(2, 4, 6, 7, 0xFF)}, 0},
  1349. {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(100),
  1350. SLP_VEC(2, 6, 9, 9, 0xFF)}, 0},
  1351. {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(25), SLP_VEC(2, 7, 9, 9, 0xFF)}, 0},
  1352. {{SLP, SLP_TIMEOUT(25), SLP_TIMEOUT(25),
  1353. SLP_VEC(4, 7, 10, 10, 0xFF)}, 0}
  1354. };
  1355. int iwl4965_power_init_handle(struct iwl_priv *priv)
  1356. {
  1357. int rc = 0, i;
  1358. struct iwl4965_power_mgr *pow_data;
  1359. int size = sizeof(struct iwl4965_power_vec_entry) * IWL_POWER_AC;
  1360. u16 pci_pm;
  1361. IWL_DEBUG_POWER("Initialize power \n");
  1362. pow_data = &(priv->power_data);
  1363. memset(pow_data, 0, sizeof(*pow_data));
  1364. pow_data->active_index = IWL_POWER_RANGE_0;
  1365. pow_data->dtim_val = 0xffff;
  1366. memcpy(&pow_data->pwr_range_0[0], &range_0[0], size);
  1367. memcpy(&pow_data->pwr_range_1[0], &range_1[0], size);
  1368. rc = pci_read_config_word(priv->pci_dev, PCI_LINK_CTRL, &pci_pm);
  1369. if (rc != 0)
  1370. return 0;
  1371. else {
  1372. struct iwl4965_powertable_cmd *cmd;
  1373. IWL_DEBUG_POWER("adjust power command flags\n");
  1374. for (i = 0; i < IWL_POWER_AC; i++) {
  1375. cmd = &pow_data->pwr_range_0[i].cmd;
  1376. if (pci_pm & 0x1)
  1377. cmd->flags &= ~IWL_POWER_PCI_PM_MSK;
  1378. else
  1379. cmd->flags |= IWL_POWER_PCI_PM_MSK;
  1380. }
  1381. }
  1382. return rc;
  1383. }
  1384. static int iwl4965_update_power_cmd(struct iwl_priv *priv,
  1385. struct iwl4965_powertable_cmd *cmd, u32 mode)
  1386. {
  1387. int rc = 0, i;
  1388. u8 skip;
  1389. u32 max_sleep = 0;
  1390. struct iwl4965_power_vec_entry *range;
  1391. u8 period = 0;
  1392. struct iwl4965_power_mgr *pow_data;
  1393. if (mode > IWL_POWER_INDEX_5) {
  1394. IWL_DEBUG_POWER("Error invalid power mode \n");
  1395. return -1;
  1396. }
  1397. pow_data = &(priv->power_data);
  1398. if (pow_data->active_index == IWL_POWER_RANGE_0)
  1399. range = &pow_data->pwr_range_0[0];
  1400. else
  1401. range = &pow_data->pwr_range_1[1];
  1402. memcpy(cmd, &range[mode].cmd, sizeof(struct iwl4965_powertable_cmd));
  1403. #ifdef IWL_MAC80211_DISABLE
  1404. if (priv->assoc_network != NULL) {
  1405. unsigned long flags;
  1406. period = priv->assoc_network->tim.tim_period;
  1407. }
  1408. #endif /*IWL_MAC80211_DISABLE */
  1409. skip = range[mode].no_dtim;
  1410. if (period == 0) {
  1411. period = 1;
  1412. skip = 0;
  1413. }
  1414. if (skip == 0) {
  1415. max_sleep = period;
  1416. cmd->flags &= ~IWL_POWER_SLEEP_OVER_DTIM_MSK;
  1417. } else {
  1418. __le32 slp_itrvl = cmd->sleep_interval[IWL_POWER_VEC_SIZE - 1];
  1419. max_sleep = (le32_to_cpu(slp_itrvl) / period) * period;
  1420. cmd->flags |= IWL_POWER_SLEEP_OVER_DTIM_MSK;
  1421. }
  1422. for (i = 0; i < IWL_POWER_VEC_SIZE; i++) {
  1423. if (le32_to_cpu(cmd->sleep_interval[i]) > max_sleep)
  1424. cmd->sleep_interval[i] = cpu_to_le32(max_sleep);
  1425. }
  1426. IWL_DEBUG_POWER("Flags value = 0x%08X\n", cmd->flags);
  1427. IWL_DEBUG_POWER("Tx timeout = %u\n", le32_to_cpu(cmd->tx_data_timeout));
  1428. IWL_DEBUG_POWER("Rx timeout = %u\n", le32_to_cpu(cmd->rx_data_timeout));
  1429. IWL_DEBUG_POWER("Sleep interval vector = { %d , %d , %d , %d , %d }\n",
  1430. le32_to_cpu(cmd->sleep_interval[0]),
  1431. le32_to_cpu(cmd->sleep_interval[1]),
  1432. le32_to_cpu(cmd->sleep_interval[2]),
  1433. le32_to_cpu(cmd->sleep_interval[3]),
  1434. le32_to_cpu(cmd->sleep_interval[4]));
  1435. return rc;
  1436. }
  1437. static int iwl4965_send_power_mode(struct iwl_priv *priv, u32 mode)
  1438. {
  1439. u32 uninitialized_var(final_mode);
  1440. int rc;
  1441. struct iwl4965_powertable_cmd cmd;
  1442. /* If on battery, set to 3,
  1443. * if plugged into AC power, set to CAM ("continuously aware mode"),
  1444. * else user level */
  1445. switch (mode) {
  1446. case IWL_POWER_BATTERY:
  1447. final_mode = IWL_POWER_INDEX_3;
  1448. break;
  1449. case IWL_POWER_AC:
  1450. final_mode = IWL_POWER_MODE_CAM;
  1451. break;
  1452. default:
  1453. final_mode = mode;
  1454. break;
  1455. }
  1456. cmd.keep_alive_beacons = 0;
  1457. iwl4965_update_power_cmd(priv, &cmd, final_mode);
  1458. rc = iwl_send_cmd_pdu(priv, POWER_TABLE_CMD, sizeof(cmd), &cmd);
  1459. if (final_mode == IWL_POWER_MODE_CAM)
  1460. clear_bit(STATUS_POWER_PMI, &priv->status);
  1461. else
  1462. set_bit(STATUS_POWER_PMI, &priv->status);
  1463. return rc;
  1464. }
  1465. int iwl4965_is_network_packet(struct iwl_priv *priv, struct ieee80211_hdr *header)
  1466. {
  1467. /* Filter incoming packets to determine if they are targeted toward
  1468. * this network, discarding packets coming from ourselves */
  1469. switch (priv->iw_mode) {
  1470. case IEEE80211_IF_TYPE_IBSS: /* Header: Dest. | Source | BSSID */
  1471. /* packets from our adapter are dropped (echo) */
  1472. if (!compare_ether_addr(header->addr2, priv->mac_addr))
  1473. return 0;
  1474. /* {broad,multi}cast packets to our IBSS go through */
  1475. if (is_multicast_ether_addr(header->addr1))
  1476. return !compare_ether_addr(header->addr3, priv->bssid);
  1477. /* packets to our adapter go through */
  1478. return !compare_ether_addr(header->addr1, priv->mac_addr);
  1479. case IEEE80211_IF_TYPE_STA: /* Header: Dest. | AP{BSSID} | Source */
  1480. /* packets from our adapter are dropped (echo) */
  1481. if (!compare_ether_addr(header->addr3, priv->mac_addr))
  1482. return 0;
  1483. /* {broad,multi}cast packets to our BSS go through */
  1484. if (is_multicast_ether_addr(header->addr1))
  1485. return !compare_ether_addr(header->addr2, priv->bssid);
  1486. /* packets to our adapter go through */
  1487. return !compare_ether_addr(header->addr1, priv->mac_addr);
  1488. }
  1489. return 1;
  1490. }
  1491. #define TX_STATUS_ENTRY(x) case TX_STATUS_FAIL_ ## x: return #x
  1492. static const char *iwl4965_get_tx_fail_reason(u32 status)
  1493. {
  1494. switch (status & TX_STATUS_MSK) {
  1495. case TX_STATUS_SUCCESS:
  1496. return "SUCCESS";
  1497. TX_STATUS_ENTRY(SHORT_LIMIT);
  1498. TX_STATUS_ENTRY(LONG_LIMIT);
  1499. TX_STATUS_ENTRY(FIFO_UNDERRUN);
  1500. TX_STATUS_ENTRY(MGMNT_ABORT);
  1501. TX_STATUS_ENTRY(NEXT_FRAG);
  1502. TX_STATUS_ENTRY(LIFE_EXPIRE);
  1503. TX_STATUS_ENTRY(DEST_PS);
  1504. TX_STATUS_ENTRY(ABORTED);
  1505. TX_STATUS_ENTRY(BT_RETRY);
  1506. TX_STATUS_ENTRY(STA_INVALID);
  1507. TX_STATUS_ENTRY(FRAG_DROPPED);
  1508. TX_STATUS_ENTRY(TID_DISABLE);
  1509. TX_STATUS_ENTRY(FRAME_FLUSHED);
  1510. TX_STATUS_ENTRY(INSUFFICIENT_CF_POLL);
  1511. TX_STATUS_ENTRY(TX_LOCKED);
  1512. TX_STATUS_ENTRY(NO_BEACON_ON_RADAR);
  1513. }
  1514. return "UNKNOWN";
  1515. }
  1516. /**
  1517. * iwl4965_scan_cancel - Cancel any currently executing HW scan
  1518. *
  1519. * NOTE: priv->mutex is not required before calling this function
  1520. */
  1521. static int iwl4965_scan_cancel(struct iwl_priv *priv)
  1522. {
  1523. if (!test_bit(STATUS_SCAN_HW, &priv->status)) {
  1524. clear_bit(STATUS_SCANNING, &priv->status);
  1525. return 0;
  1526. }
  1527. if (test_bit(STATUS_SCANNING, &priv->status)) {
  1528. if (!test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
  1529. IWL_DEBUG_SCAN("Queuing scan abort.\n");
  1530. set_bit(STATUS_SCAN_ABORTING, &priv->status);
  1531. queue_work(priv->workqueue, &priv->abort_scan);
  1532. } else
  1533. IWL_DEBUG_SCAN("Scan abort already in progress.\n");
  1534. return test_bit(STATUS_SCANNING, &priv->status);
  1535. }
  1536. return 0;
  1537. }
  1538. /**
  1539. * iwl4965_scan_cancel_timeout - Cancel any currently executing HW scan
  1540. * @ms: amount of time to wait (in milliseconds) for scan to abort
  1541. *
  1542. * NOTE: priv->mutex must be held before calling this function
  1543. */
  1544. static int iwl4965_scan_cancel_timeout(struct iwl_priv *priv, unsigned long ms)
  1545. {
  1546. unsigned long now = jiffies;
  1547. int ret;
  1548. ret = iwl4965_scan_cancel(priv);
  1549. if (ret && ms) {
  1550. mutex_unlock(&priv->mutex);
  1551. while (!time_after(jiffies, now + msecs_to_jiffies(ms)) &&
  1552. test_bit(STATUS_SCANNING, &priv->status))
  1553. msleep(1);
  1554. mutex_lock(&priv->mutex);
  1555. return test_bit(STATUS_SCANNING, &priv->status);
  1556. }
  1557. return ret;
  1558. }
  1559. static void iwl4965_sequence_reset(struct iwl_priv *priv)
  1560. {
  1561. /* Reset ieee stats */
  1562. /* We don't reset the net_device_stats (ieee->stats) on
  1563. * re-association */
  1564. priv->last_seq_num = -1;
  1565. priv->last_frag_num = -1;
  1566. priv->last_packet_time = 0;
  1567. iwl4965_scan_cancel(priv);
  1568. }
  1569. #define MAX_UCODE_BEACON_INTERVAL 4096
  1570. #define INTEL_CONN_LISTEN_INTERVAL __constant_cpu_to_le16(0xA)
  1571. static __le16 iwl4965_adjust_beacon_interval(u16 beacon_val)
  1572. {
  1573. u16 new_val = 0;
  1574. u16 beacon_factor = 0;
  1575. beacon_factor =
  1576. (beacon_val + MAX_UCODE_BEACON_INTERVAL)
  1577. / MAX_UCODE_BEACON_INTERVAL;
  1578. new_val = beacon_val / beacon_factor;
  1579. return cpu_to_le16(new_val);
  1580. }
  1581. static void iwl4965_setup_rxon_timing(struct iwl_priv *priv)
  1582. {
  1583. u64 interval_tm_unit;
  1584. u64 tsf, result;
  1585. unsigned long flags;
  1586. struct ieee80211_conf *conf = NULL;
  1587. u16 beacon_int = 0;
  1588. conf = ieee80211_get_hw_conf(priv->hw);
  1589. spin_lock_irqsave(&priv->lock, flags);
  1590. priv->rxon_timing.timestamp.dw[1] = cpu_to_le32(priv->timestamp1);
  1591. priv->rxon_timing.timestamp.dw[0] = cpu_to_le32(priv->timestamp0);
  1592. priv->rxon_timing.listen_interval = INTEL_CONN_LISTEN_INTERVAL;
  1593. tsf = priv->timestamp1;
  1594. tsf = ((tsf << 32) | priv->timestamp0);
  1595. beacon_int = priv->beacon_int;
  1596. spin_unlock_irqrestore(&priv->lock, flags);
  1597. if (priv->iw_mode == IEEE80211_IF_TYPE_STA) {
  1598. if (beacon_int == 0) {
  1599. priv->rxon_timing.beacon_interval = cpu_to_le16(100);
  1600. priv->rxon_timing.beacon_init_val = cpu_to_le32(102400);
  1601. } else {
  1602. priv->rxon_timing.beacon_interval =
  1603. cpu_to_le16(beacon_int);
  1604. priv->rxon_timing.beacon_interval =
  1605. iwl4965_adjust_beacon_interval(
  1606. le16_to_cpu(priv->rxon_timing.beacon_interval));
  1607. }
  1608. priv->rxon_timing.atim_window = 0;
  1609. } else {
  1610. priv->rxon_timing.beacon_interval =
  1611. iwl4965_adjust_beacon_interval(conf->beacon_int);
  1612. /* TODO: we need to get atim_window from upper stack
  1613. * for now we set to 0 */
  1614. priv->rxon_timing.atim_window = 0;
  1615. }
  1616. interval_tm_unit =
  1617. (le16_to_cpu(priv->rxon_timing.beacon_interval) * 1024);
  1618. result = do_div(tsf, interval_tm_unit);
  1619. priv->rxon_timing.beacon_init_val =
  1620. cpu_to_le32((u32) ((u64) interval_tm_unit - result));
  1621. IWL_DEBUG_ASSOC
  1622. ("beacon interval %d beacon timer %d beacon tim %d\n",
  1623. le16_to_cpu(priv->rxon_timing.beacon_interval),
  1624. le32_to_cpu(priv->rxon_timing.beacon_init_val),
  1625. le16_to_cpu(priv->rxon_timing.atim_window));
  1626. }
  1627. static int iwl4965_scan_initiate(struct iwl_priv *priv)
  1628. {
  1629. if (priv->iw_mode == IEEE80211_IF_TYPE_AP) {
  1630. IWL_ERROR("APs don't scan.\n");
  1631. return 0;
  1632. }
  1633. if (!iwl4965_is_ready_rf(priv)) {
  1634. IWL_DEBUG_SCAN("Aborting scan due to not ready.\n");
  1635. return -EIO;
  1636. }
  1637. if (test_bit(STATUS_SCANNING, &priv->status)) {
  1638. IWL_DEBUG_SCAN("Scan already in progress.\n");
  1639. return -EAGAIN;
  1640. }
  1641. if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
  1642. IWL_DEBUG_SCAN("Scan request while abort pending. "
  1643. "Queuing.\n");
  1644. return -EAGAIN;
  1645. }
  1646. IWL_DEBUG_INFO("Starting scan...\n");
  1647. priv->scan_bands = 2;
  1648. set_bit(STATUS_SCANNING, &priv->status);
  1649. priv->scan_start = jiffies;
  1650. priv->scan_pass_start = priv->scan_start;
  1651. queue_work(priv->workqueue, &priv->request_scan);
  1652. return 0;
  1653. }
  1654. static void iwl4965_set_flags_for_phymode(struct iwl_priv *priv,
  1655. enum ieee80211_band band)
  1656. {
  1657. if (band == IEEE80211_BAND_5GHZ) {
  1658. priv->staging_rxon.flags &=
  1659. ~(RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK
  1660. | RXON_FLG_CCK_MSK);
  1661. priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
  1662. } else {
  1663. /* Copied from iwl4965_bg_post_associate() */
  1664. if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME)
  1665. priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
  1666. else
  1667. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
  1668. if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS)
  1669. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
  1670. priv->staging_rxon.flags |= RXON_FLG_BAND_24G_MSK;
  1671. priv->staging_rxon.flags |= RXON_FLG_AUTO_DETECT_MSK;
  1672. priv->staging_rxon.flags &= ~RXON_FLG_CCK_MSK;
  1673. }
  1674. }
  1675. /*
  1676. * initialize rxon structure with default values from eeprom
  1677. */
  1678. static void iwl4965_connection_init_rx_config(struct iwl_priv *priv)
  1679. {
  1680. const struct iwl_channel_info *ch_info;
  1681. memset(&priv->staging_rxon, 0, sizeof(priv->staging_rxon));
  1682. switch (priv->iw_mode) {
  1683. case IEEE80211_IF_TYPE_AP:
  1684. priv->staging_rxon.dev_type = RXON_DEV_TYPE_AP;
  1685. break;
  1686. case IEEE80211_IF_TYPE_STA:
  1687. priv->staging_rxon.dev_type = RXON_DEV_TYPE_ESS;
  1688. priv->staging_rxon.filter_flags = RXON_FILTER_ACCEPT_GRP_MSK;
  1689. break;
  1690. case IEEE80211_IF_TYPE_IBSS:
  1691. priv->staging_rxon.dev_type = RXON_DEV_TYPE_IBSS;
  1692. priv->staging_rxon.flags = RXON_FLG_SHORT_PREAMBLE_MSK;
  1693. priv->staging_rxon.filter_flags = RXON_FILTER_BCON_AWARE_MSK |
  1694. RXON_FILTER_ACCEPT_GRP_MSK;
  1695. break;
  1696. case IEEE80211_IF_TYPE_MNTR:
  1697. priv->staging_rxon.dev_type = RXON_DEV_TYPE_SNIFFER;
  1698. priv->staging_rxon.filter_flags = RXON_FILTER_PROMISC_MSK |
  1699. RXON_FILTER_CTL2HOST_MSK | RXON_FILTER_ACCEPT_GRP_MSK;
  1700. break;
  1701. }
  1702. #if 0
  1703. /* TODO: Figure out when short_preamble would be set and cache from
  1704. * that */
  1705. if (!hw_to_local(priv->hw)->short_preamble)
  1706. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
  1707. else
  1708. priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
  1709. #endif
  1710. ch_info = iwl_get_channel_info(priv, priv->band,
  1711. le16_to_cpu(priv->staging_rxon.channel));
  1712. if (!ch_info)
  1713. ch_info = &priv->channel_info[0];
  1714. /*
  1715. * in some case A channels are all non IBSS
  1716. * in this case force B/G channel
  1717. */
  1718. if ((priv->iw_mode == IEEE80211_IF_TYPE_IBSS) &&
  1719. !(is_channel_ibss(ch_info)))
  1720. ch_info = &priv->channel_info[0];
  1721. priv->staging_rxon.channel = cpu_to_le16(ch_info->channel);
  1722. priv->band = ch_info->band;
  1723. iwl4965_set_flags_for_phymode(priv, priv->band);
  1724. priv->staging_rxon.ofdm_basic_rates =
  1725. (IWL_OFDM_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
  1726. priv->staging_rxon.cck_basic_rates =
  1727. (IWL_CCK_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF;
  1728. priv->staging_rxon.flags &= ~(RXON_FLG_CHANNEL_MODE_MIXED_MSK |
  1729. RXON_FLG_CHANNEL_MODE_PURE_40_MSK);
  1730. memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
  1731. memcpy(priv->staging_rxon.wlap_bssid_addr, priv->mac_addr, ETH_ALEN);
  1732. priv->staging_rxon.ofdm_ht_single_stream_basic_rates = 0xff;
  1733. priv->staging_rxon.ofdm_ht_dual_stream_basic_rates = 0xff;
  1734. iwl4965_set_rxon_chain(priv);
  1735. }
  1736. static int iwl4965_set_mode(struct iwl_priv *priv, int mode)
  1737. {
  1738. if (mode == IEEE80211_IF_TYPE_IBSS) {
  1739. const struct iwl_channel_info *ch_info;
  1740. ch_info = iwl_get_channel_info(priv,
  1741. priv->band,
  1742. le16_to_cpu(priv->staging_rxon.channel));
  1743. if (!ch_info || !is_channel_ibss(ch_info)) {
  1744. IWL_ERROR("channel %d not IBSS channel\n",
  1745. le16_to_cpu(priv->staging_rxon.channel));
  1746. return -EINVAL;
  1747. }
  1748. }
  1749. priv->iw_mode = mode;
  1750. iwl4965_connection_init_rx_config(priv);
  1751. memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
  1752. iwlcore_clear_stations_table(priv);
  1753. /* dont commit rxon if rf-kill is on*/
  1754. if (!iwl4965_is_ready_rf(priv))
  1755. return -EAGAIN;
  1756. cancel_delayed_work(&priv->scan_check);
  1757. if (iwl4965_scan_cancel_timeout(priv, 100)) {
  1758. IWL_WARNING("Aborted scan still in progress after 100ms\n");
  1759. IWL_DEBUG_MAC80211("leaving - scan abort failed.\n");
  1760. return -EAGAIN;
  1761. }
  1762. iwl4965_commit_rxon(priv);
  1763. return 0;
  1764. }
  1765. static void iwl4965_build_tx_cmd_hwcrypto(struct iwl_priv *priv,
  1766. struct ieee80211_tx_control *ctl,
  1767. struct iwl_cmd *cmd,
  1768. struct sk_buff *skb_frag,
  1769. int sta_id)
  1770. {
  1771. struct iwl4965_hw_key *keyinfo = &priv->stations[sta_id].keyinfo;
  1772. switch (keyinfo->alg) {
  1773. case ALG_CCMP:
  1774. cmd->cmd.tx.sec_ctl = TX_CMD_SEC_CCM;
  1775. memcpy(cmd->cmd.tx.key, keyinfo->key, keyinfo->keylen);
  1776. if (ctl->flags & IEEE80211_TXCTL_AMPDU)
  1777. cmd->cmd.tx.tx_flags |= TX_CMD_FLG_AGG_CCMP_MSK;
  1778. IWL_DEBUG_TX("tx_cmd with aes hwcrypto\n");
  1779. break;
  1780. case ALG_TKIP:
  1781. cmd->cmd.tx.sec_ctl = TX_CMD_SEC_TKIP;
  1782. ieee80211_get_tkip_key(keyinfo->conf, skb_frag,
  1783. IEEE80211_TKIP_P2_KEY, cmd->cmd.tx.key);
  1784. IWL_DEBUG_TX("tx_cmd with tkip hwcrypto\n");
  1785. break;
  1786. case ALG_WEP:
  1787. cmd->cmd.tx.sec_ctl = TX_CMD_SEC_WEP |
  1788. (ctl->key_idx & TX_CMD_SEC_MSK) << TX_CMD_SEC_SHIFT;
  1789. if (keyinfo->keylen == 13)
  1790. cmd->cmd.tx.sec_ctl |= TX_CMD_SEC_KEY128;
  1791. memcpy(&cmd->cmd.tx.key[3], keyinfo->key, keyinfo->keylen);
  1792. IWL_DEBUG_TX("Configuring packet for WEP encryption "
  1793. "with key %d\n", ctl->key_idx);
  1794. break;
  1795. default:
  1796. printk(KERN_ERR "Unknown encode alg %d\n", keyinfo->alg);
  1797. break;
  1798. }
  1799. }
  1800. /*
  1801. * handle build REPLY_TX command notification.
  1802. */
  1803. static void iwl4965_build_tx_cmd_basic(struct iwl_priv *priv,
  1804. struct iwl_cmd *cmd,
  1805. struct ieee80211_tx_control *ctrl,
  1806. struct ieee80211_hdr *hdr,
  1807. int is_unicast, u8 std_id)
  1808. {
  1809. __le16 *qc;
  1810. u16 fc = le16_to_cpu(hdr->frame_control);
  1811. __le32 tx_flags = cmd->cmd.tx.tx_flags;
  1812. cmd->cmd.tx.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
  1813. if (!(ctrl->flags & IEEE80211_TXCTL_NO_ACK)) {
  1814. tx_flags |= TX_CMD_FLG_ACK_MSK;
  1815. if ((fc & IEEE80211_FCTL_FTYPE) == IEEE80211_FTYPE_MGMT)
  1816. tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
  1817. if (ieee80211_is_probe_response(fc) &&
  1818. !(le16_to_cpu(hdr->seq_ctrl) & 0xf))
  1819. tx_flags |= TX_CMD_FLG_TSF_MSK;
  1820. } else {
  1821. tx_flags &= (~TX_CMD_FLG_ACK_MSK);
  1822. tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
  1823. }
  1824. if (ieee80211_is_back_request(fc))
  1825. tx_flags |= TX_CMD_FLG_ACK_MSK | TX_CMD_FLG_IMM_BA_RSP_MASK;
  1826. cmd->cmd.tx.sta_id = std_id;
  1827. if (ieee80211_get_morefrag(hdr))
  1828. tx_flags |= TX_CMD_FLG_MORE_FRAG_MSK;
  1829. qc = ieee80211_get_qos_ctrl(hdr);
  1830. if (qc) {
  1831. cmd->cmd.tx.tid_tspec = (u8) (le16_to_cpu(*qc) & 0xf);
  1832. tx_flags &= ~TX_CMD_FLG_SEQ_CTL_MSK;
  1833. } else
  1834. tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
  1835. if (ctrl->flags & IEEE80211_TXCTL_USE_RTS_CTS) {
  1836. tx_flags |= TX_CMD_FLG_RTS_MSK;
  1837. tx_flags &= ~TX_CMD_FLG_CTS_MSK;
  1838. } else if (ctrl->flags & IEEE80211_TXCTL_USE_CTS_PROTECT) {
  1839. tx_flags &= ~TX_CMD_FLG_RTS_MSK;
  1840. tx_flags |= TX_CMD_FLG_CTS_MSK;
  1841. }
  1842. if ((tx_flags & TX_CMD_FLG_RTS_MSK) || (tx_flags & TX_CMD_FLG_CTS_MSK))
  1843. tx_flags |= TX_CMD_FLG_FULL_TXOP_PROT_MSK;
  1844. tx_flags &= ~(TX_CMD_FLG_ANT_SEL_MSK);
  1845. if ((fc & IEEE80211_FCTL_FTYPE) == IEEE80211_FTYPE_MGMT) {
  1846. if ((fc & IEEE80211_FCTL_STYPE) == IEEE80211_STYPE_ASSOC_REQ ||
  1847. (fc & IEEE80211_FCTL_STYPE) == IEEE80211_STYPE_REASSOC_REQ)
  1848. cmd->cmd.tx.timeout.pm_frame_timeout = cpu_to_le16(3);
  1849. else
  1850. cmd->cmd.tx.timeout.pm_frame_timeout = cpu_to_le16(2);
  1851. } else
  1852. cmd->cmd.tx.timeout.pm_frame_timeout = 0;
  1853. cmd->cmd.tx.driver_txop = 0;
  1854. cmd->cmd.tx.tx_flags = tx_flags;
  1855. cmd->cmd.tx.next_frame_len = 0;
  1856. }
  1857. static void iwl_update_tx_stats(struct iwl_priv *priv, u16 fc, u16 len)
  1858. {
  1859. /* 0 - mgmt, 1 - cnt, 2 - data */
  1860. int idx = (fc & IEEE80211_FCTL_FTYPE) >> 2;
  1861. priv->tx_stats[idx].cnt++;
  1862. priv->tx_stats[idx].bytes += len;
  1863. }
  1864. /**
  1865. * iwl4965_get_sta_id - Find station's index within station table
  1866. *
  1867. * If new IBSS station, create new entry in station table
  1868. */
  1869. static int iwl4965_get_sta_id(struct iwl_priv *priv,
  1870. struct ieee80211_hdr *hdr)
  1871. {
  1872. int sta_id;
  1873. u16 fc = le16_to_cpu(hdr->frame_control);
  1874. DECLARE_MAC_BUF(mac);
  1875. /* If this frame is broadcast or management, use broadcast station id */
  1876. if (((fc & IEEE80211_FCTL_FTYPE) != IEEE80211_FTYPE_DATA) ||
  1877. is_multicast_ether_addr(hdr->addr1))
  1878. return priv->hw_setting.bcast_sta_id;
  1879. switch (priv->iw_mode) {
  1880. /* If we are a client station in a BSS network, use the special
  1881. * AP station entry (that's the only station we communicate with) */
  1882. case IEEE80211_IF_TYPE_STA:
  1883. return IWL_AP_ID;
  1884. /* If we are an AP, then find the station, or use BCAST */
  1885. case IEEE80211_IF_TYPE_AP:
  1886. sta_id = iwl4965_hw_find_station(priv, hdr->addr1);
  1887. if (sta_id != IWL_INVALID_STATION)
  1888. return sta_id;
  1889. return priv->hw_setting.bcast_sta_id;
  1890. /* If this frame is going out to an IBSS network, find the station,
  1891. * or create a new station table entry */
  1892. case IEEE80211_IF_TYPE_IBSS:
  1893. sta_id = iwl4965_hw_find_station(priv, hdr->addr1);
  1894. if (sta_id != IWL_INVALID_STATION)
  1895. return sta_id;
  1896. /* Create new station table entry */
  1897. sta_id = iwl4965_add_station_flags(priv, hdr->addr1,
  1898. 0, CMD_ASYNC, NULL);
  1899. if (sta_id != IWL_INVALID_STATION)
  1900. return sta_id;
  1901. IWL_DEBUG_DROP("Station %s not in station map. "
  1902. "Defaulting to broadcast...\n",
  1903. print_mac(mac, hdr->addr1));
  1904. iwl_print_hex_dump(IWL_DL_DROP, (u8 *) hdr, sizeof(*hdr));
  1905. return priv->hw_setting.bcast_sta_id;
  1906. default:
  1907. IWL_WARNING("Unknown mode of operation: %d", priv->iw_mode);
  1908. return priv->hw_setting.bcast_sta_id;
  1909. }
  1910. }
  1911. /*
  1912. * start REPLY_TX command process
  1913. */
  1914. static int iwl4965_tx_skb(struct iwl_priv *priv,
  1915. struct sk_buff *skb, struct ieee80211_tx_control *ctl)
  1916. {
  1917. struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
  1918. struct iwl4965_tfd_frame *tfd;
  1919. u32 *control_flags;
  1920. int txq_id = ctl->queue;
  1921. struct iwl4965_tx_queue *txq = NULL;
  1922. struct iwl4965_queue *q = NULL;
  1923. dma_addr_t phys_addr;
  1924. dma_addr_t txcmd_phys;
  1925. dma_addr_t scratch_phys;
  1926. struct iwl_cmd *out_cmd = NULL;
  1927. u16 len, idx, len_org;
  1928. u8 id, hdr_len, unicast;
  1929. u8 sta_id;
  1930. u16 seq_number = 0;
  1931. u16 fc;
  1932. __le16 *qc;
  1933. u8 wait_write_ptr = 0;
  1934. unsigned long flags;
  1935. int rc;
  1936. spin_lock_irqsave(&priv->lock, flags);
  1937. if (iwl4965_is_rfkill(priv)) {
  1938. IWL_DEBUG_DROP("Dropping - RF KILL\n");
  1939. goto drop_unlock;
  1940. }
  1941. if (!priv->vif) {
  1942. IWL_DEBUG_DROP("Dropping - !priv->vif\n");
  1943. goto drop_unlock;
  1944. }
  1945. if ((ctl->tx_rate->hw_value & 0xFF) == IWL_INVALID_RATE) {
  1946. IWL_ERROR("ERROR: No TX rate available.\n");
  1947. goto drop_unlock;
  1948. }
  1949. unicast = !is_multicast_ether_addr(hdr->addr1);
  1950. id = 0;
  1951. fc = le16_to_cpu(hdr->frame_control);
  1952. #ifdef CONFIG_IWLWIFI_DEBUG
  1953. if (ieee80211_is_auth(fc))
  1954. IWL_DEBUG_TX("Sending AUTH frame\n");
  1955. else if (ieee80211_is_assoc_request(fc))
  1956. IWL_DEBUG_TX("Sending ASSOC frame\n");
  1957. else if (ieee80211_is_reassoc_request(fc))
  1958. IWL_DEBUG_TX("Sending REASSOC frame\n");
  1959. #endif
  1960. /* drop all data frame if we are not associated */
  1961. if (((fc & IEEE80211_FCTL_FTYPE) == IEEE80211_FTYPE_DATA) &&
  1962. (!iwl4965_is_associated(priv) ||
  1963. ((priv->iw_mode == IEEE80211_IF_TYPE_STA) && !priv->assoc_id) ||
  1964. !priv->assoc_station_added)) {
  1965. IWL_DEBUG_DROP("Dropping - !iwl4965_is_associated\n");
  1966. goto drop_unlock;
  1967. }
  1968. spin_unlock_irqrestore(&priv->lock, flags);
  1969. hdr_len = ieee80211_get_hdrlen(fc);
  1970. /* Find (or create) index into station table for destination station */
  1971. sta_id = iwl4965_get_sta_id(priv, hdr);
  1972. if (sta_id == IWL_INVALID_STATION) {
  1973. DECLARE_MAC_BUF(mac);
  1974. IWL_DEBUG_DROP("Dropping - INVALID STATION: %s\n",
  1975. print_mac(mac, hdr->addr1));
  1976. goto drop;
  1977. }
  1978. IWL_DEBUG_RATE("station Id %d\n", sta_id);
  1979. qc = ieee80211_get_qos_ctrl(hdr);
  1980. if (qc) {
  1981. u8 tid = (u8)(le16_to_cpu(*qc) & 0xf);
  1982. seq_number = priv->stations[sta_id].tid[tid].seq_number &
  1983. IEEE80211_SCTL_SEQ;
  1984. hdr->seq_ctrl = cpu_to_le16(seq_number) |
  1985. (hdr->seq_ctrl &
  1986. __constant_cpu_to_le16(IEEE80211_SCTL_FRAG));
  1987. seq_number += 0x10;
  1988. #ifdef CONFIG_IWL4965_HT
  1989. /* aggregation is on for this <sta,tid> */
  1990. if (ctl->flags & IEEE80211_TXCTL_AMPDU)
  1991. txq_id = priv->stations[sta_id].tid[tid].agg.txq_id;
  1992. priv->stations[sta_id].tid[tid].tfds_in_queue++;
  1993. #endif /* CONFIG_IWL4965_HT */
  1994. }
  1995. /* Descriptor for chosen Tx queue */
  1996. txq = &priv->txq[txq_id];
  1997. q = &txq->q;
  1998. spin_lock_irqsave(&priv->lock, flags);
  1999. /* Set up first empty TFD within this queue's circular TFD buffer */
  2000. tfd = &txq->bd[q->write_ptr];
  2001. memset(tfd, 0, sizeof(*tfd));
  2002. control_flags = (u32 *) tfd;
  2003. idx = get_cmd_index(q, q->write_ptr, 0);
  2004. /* Set up driver data for this TFD */
  2005. memset(&(txq->txb[q->write_ptr]), 0, sizeof(struct iwl4965_tx_info));
  2006. txq->txb[q->write_ptr].skb[0] = skb;
  2007. memcpy(&(txq->txb[q->write_ptr].status.control),
  2008. ctl, sizeof(struct ieee80211_tx_control));
  2009. /* Set up first empty entry in queue's array of Tx/cmd buffers */
  2010. out_cmd = &txq->cmd[idx];
  2011. memset(&out_cmd->hdr, 0, sizeof(out_cmd->hdr));
  2012. memset(&out_cmd->cmd.tx, 0, sizeof(out_cmd->cmd.tx));
  2013. /*
  2014. * Set up the Tx-command (not MAC!) header.
  2015. * Store the chosen Tx queue and TFD index within the sequence field;
  2016. * after Tx, uCode's Tx response will return this value so driver can
  2017. * locate the frame within the tx queue and do post-tx processing.
  2018. */
  2019. out_cmd->hdr.cmd = REPLY_TX;
  2020. out_cmd->hdr.sequence = cpu_to_le16((u16)(QUEUE_TO_SEQ(txq_id) |
  2021. INDEX_TO_SEQ(q->write_ptr)));
  2022. /* Copy MAC header from skb into command buffer */
  2023. memcpy(out_cmd->cmd.tx.hdr, hdr, hdr_len);
  2024. /*
  2025. * Use the first empty entry in this queue's command buffer array
  2026. * to contain the Tx command and MAC header concatenated together
  2027. * (payload data will be in another buffer).
  2028. * Size of this varies, due to varying MAC header length.
  2029. * If end is not dword aligned, we'll have 2 extra bytes at the end
  2030. * of the MAC header (device reads on dword boundaries).
  2031. * We'll tell device about this padding later.
  2032. */
  2033. len = priv->hw_setting.tx_cmd_len +
  2034. sizeof(struct iwl_cmd_header) + hdr_len;
  2035. len_org = len;
  2036. len = (len + 3) & ~3;
  2037. if (len_org != len)
  2038. len_org = 1;
  2039. else
  2040. len_org = 0;
  2041. /* Physical address of this Tx command's header (not MAC header!),
  2042. * within command buffer array. */
  2043. txcmd_phys = txq->dma_addr_cmd + sizeof(struct iwl_cmd) * idx +
  2044. offsetof(struct iwl_cmd, hdr);
  2045. /* Add buffer containing Tx command and MAC(!) header to TFD's
  2046. * first entry */
  2047. iwl4965_hw_txq_attach_buf_to_tfd(priv, tfd, txcmd_phys, len);
  2048. if (!(ctl->flags & IEEE80211_TXCTL_DO_NOT_ENCRYPT))
  2049. iwl4965_build_tx_cmd_hwcrypto(priv, ctl, out_cmd, skb, sta_id);
  2050. /* Set up TFD's 2nd entry to point directly to remainder of skb,
  2051. * if any (802.11 null frames have no payload). */
  2052. len = skb->len - hdr_len;
  2053. if (len) {
  2054. phys_addr = pci_map_single(priv->pci_dev, skb->data + hdr_len,
  2055. len, PCI_DMA_TODEVICE);
  2056. iwl4965_hw_txq_attach_buf_to_tfd(priv, tfd, phys_addr, len);
  2057. }
  2058. /* Tell 4965 about any 2-byte padding after MAC header */
  2059. if (len_org)
  2060. out_cmd->cmd.tx.tx_flags |= TX_CMD_FLG_MH_PAD_MSK;
  2061. /* Total # bytes to be transmitted */
  2062. len = (u16)skb->len;
  2063. out_cmd->cmd.tx.len = cpu_to_le16(len);
  2064. /* TODO need this for burst mode later on */
  2065. iwl4965_build_tx_cmd_basic(priv, out_cmd, ctl, hdr, unicast, sta_id);
  2066. /* set is_hcca to 0; it probably will never be implemented */
  2067. iwl4965_hw_build_tx_cmd_rate(priv, out_cmd, ctl, hdr, sta_id, 0);
  2068. iwl_update_tx_stats(priv, fc, len);
  2069. scratch_phys = txcmd_phys + sizeof(struct iwl_cmd_header) +
  2070. offsetof(struct iwl4965_tx_cmd, scratch);
  2071. out_cmd->cmd.tx.dram_lsb_ptr = cpu_to_le32(scratch_phys);
  2072. out_cmd->cmd.tx.dram_msb_ptr = iwl_get_dma_hi_address(scratch_phys);
  2073. if (!ieee80211_get_morefrag(hdr)) {
  2074. txq->need_update = 1;
  2075. if (qc) {
  2076. u8 tid = (u8)(le16_to_cpu(*qc) & 0xf);
  2077. priv->stations[sta_id].tid[tid].seq_number = seq_number;
  2078. }
  2079. } else {
  2080. wait_write_ptr = 1;
  2081. txq->need_update = 0;
  2082. }
  2083. iwl_print_hex_dump(IWL_DL_TX, out_cmd->cmd.payload,
  2084. sizeof(out_cmd->cmd.tx));
  2085. iwl_print_hex_dump(IWL_DL_TX, (u8 *)out_cmd->cmd.tx.hdr,
  2086. ieee80211_get_hdrlen(fc));
  2087. /* Set up entry for this TFD in Tx byte-count array */
  2088. iwl4965_tx_queue_update_wr_ptr(priv, txq, len);
  2089. /* Tell device the write index *just past* this latest filled TFD */
  2090. q->write_ptr = iwl_queue_inc_wrap(q->write_ptr, q->n_bd);
  2091. rc = iwl4965_tx_queue_update_write_ptr(priv, txq);
  2092. spin_unlock_irqrestore(&priv->lock, flags);
  2093. if (rc)
  2094. return rc;
  2095. if ((iwl4965_queue_space(q) < q->high_mark)
  2096. && priv->mac80211_registered) {
  2097. if (wait_write_ptr) {
  2098. spin_lock_irqsave(&priv->lock, flags);
  2099. txq->need_update = 1;
  2100. iwl4965_tx_queue_update_write_ptr(priv, txq);
  2101. spin_unlock_irqrestore(&priv->lock, flags);
  2102. }
  2103. ieee80211_stop_queue(priv->hw, ctl->queue);
  2104. }
  2105. return 0;
  2106. drop_unlock:
  2107. spin_unlock_irqrestore(&priv->lock, flags);
  2108. drop:
  2109. return -1;
  2110. }
  2111. static void iwl4965_set_rate(struct iwl_priv *priv)
  2112. {
  2113. const struct ieee80211_supported_band *hw = NULL;
  2114. struct ieee80211_rate *rate;
  2115. int i;
  2116. hw = iwl4965_get_hw_mode(priv, priv->band);
  2117. if (!hw) {
  2118. IWL_ERROR("Failed to set rate: unable to get hw mode\n");
  2119. return;
  2120. }
  2121. priv->active_rate = 0;
  2122. priv->active_rate_basic = 0;
  2123. for (i = 0; i < hw->n_bitrates; i++) {
  2124. rate = &(hw->bitrates[i]);
  2125. if (rate->hw_value < IWL_RATE_COUNT)
  2126. priv->active_rate |= (1 << rate->hw_value);
  2127. }
  2128. IWL_DEBUG_RATE("Set active_rate = %0x, active_rate_basic = %0x\n",
  2129. priv->active_rate, priv->active_rate_basic);
  2130. /*
  2131. * If a basic rate is configured, then use it (adding IWL_RATE_1M_MASK)
  2132. * otherwise set it to the default of all CCK rates and 6, 12, 24 for
  2133. * OFDM
  2134. */
  2135. if (priv->active_rate_basic & IWL_CCK_BASIC_RATES_MASK)
  2136. priv->staging_rxon.cck_basic_rates =
  2137. ((priv->active_rate_basic &
  2138. IWL_CCK_RATES_MASK) >> IWL_FIRST_CCK_RATE) & 0xF;
  2139. else
  2140. priv->staging_rxon.cck_basic_rates =
  2141. (IWL_CCK_BASIC_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF;
  2142. if (priv->active_rate_basic & IWL_OFDM_BASIC_RATES_MASK)
  2143. priv->staging_rxon.ofdm_basic_rates =
  2144. ((priv->active_rate_basic &
  2145. (IWL_OFDM_BASIC_RATES_MASK | IWL_RATE_6M_MASK)) >>
  2146. IWL_FIRST_OFDM_RATE) & 0xFF;
  2147. else
  2148. priv->staging_rxon.ofdm_basic_rates =
  2149. (IWL_OFDM_BASIC_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
  2150. }
  2151. static void iwl4965_radio_kill_sw(struct iwl_priv *priv, int disable_radio)
  2152. {
  2153. unsigned long flags;
  2154. if (!!disable_radio == test_bit(STATUS_RF_KILL_SW, &priv->status))
  2155. return;
  2156. IWL_DEBUG_RF_KILL("Manual SW RF KILL set to: RADIO %s\n",
  2157. disable_radio ? "OFF" : "ON");
  2158. if (disable_radio) {
  2159. iwl4965_scan_cancel(priv);
  2160. /* FIXME: This is a workaround for AP */
  2161. if (priv->iw_mode != IEEE80211_IF_TYPE_AP) {
  2162. spin_lock_irqsave(&priv->lock, flags);
  2163. iwl4965_write32(priv, CSR_UCODE_DRV_GP1_SET,
  2164. CSR_UCODE_SW_BIT_RFKILL);
  2165. spin_unlock_irqrestore(&priv->lock, flags);
  2166. iwl4965_send_card_state(priv, CARD_STATE_CMD_DISABLE, 0);
  2167. set_bit(STATUS_RF_KILL_SW, &priv->status);
  2168. }
  2169. return;
  2170. }
  2171. spin_lock_irqsave(&priv->lock, flags);
  2172. iwl4965_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
  2173. clear_bit(STATUS_RF_KILL_SW, &priv->status);
  2174. spin_unlock_irqrestore(&priv->lock, flags);
  2175. /* wake up ucode */
  2176. msleep(10);
  2177. spin_lock_irqsave(&priv->lock, flags);
  2178. iwl4965_read32(priv, CSR_UCODE_DRV_GP1);
  2179. if (!iwl4965_grab_nic_access(priv))
  2180. iwl4965_release_nic_access(priv);
  2181. spin_unlock_irqrestore(&priv->lock, flags);
  2182. if (test_bit(STATUS_RF_KILL_HW, &priv->status)) {
  2183. IWL_DEBUG_RF_KILL("Can not turn radio back on - "
  2184. "disabled by HW switch\n");
  2185. return;
  2186. }
  2187. queue_work(priv->workqueue, &priv->restart);
  2188. return;
  2189. }
  2190. void iwl4965_set_decrypted_flag(struct iwl_priv *priv, struct sk_buff *skb,
  2191. u32 decrypt_res, struct ieee80211_rx_status *stats)
  2192. {
  2193. u16 fc =
  2194. le16_to_cpu(((struct ieee80211_hdr *)skb->data)->frame_control);
  2195. if (priv->active_rxon.filter_flags & RXON_FILTER_DIS_DECRYPT_MSK)
  2196. return;
  2197. if (!(fc & IEEE80211_FCTL_PROTECTED))
  2198. return;
  2199. IWL_DEBUG_RX("decrypt_res:0x%x\n", decrypt_res);
  2200. switch (decrypt_res & RX_RES_STATUS_SEC_TYPE_MSK) {
  2201. case RX_RES_STATUS_SEC_TYPE_TKIP:
  2202. /* The uCode has got a bad phase 1 Key, pushes the packet.
  2203. * Decryption will be done in SW. */
  2204. if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
  2205. RX_RES_STATUS_BAD_KEY_TTAK)
  2206. break;
  2207. if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
  2208. RX_RES_STATUS_BAD_ICV_MIC)
  2209. stats->flag |= RX_FLAG_MMIC_ERROR;
  2210. case RX_RES_STATUS_SEC_TYPE_WEP:
  2211. case RX_RES_STATUS_SEC_TYPE_CCMP:
  2212. if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
  2213. RX_RES_STATUS_DECRYPT_OK) {
  2214. IWL_DEBUG_RX("hw decrypt successfully!!!\n");
  2215. stats->flag |= RX_FLAG_DECRYPTED;
  2216. }
  2217. break;
  2218. default:
  2219. break;
  2220. }
  2221. }
  2222. #define IWL_PACKET_RETRY_TIME HZ
  2223. int iwl4965_is_duplicate_packet(struct iwl_priv *priv, struct ieee80211_hdr *header)
  2224. {
  2225. u16 sc = le16_to_cpu(header->seq_ctrl);
  2226. u16 seq = (sc & IEEE80211_SCTL_SEQ) >> 4;
  2227. u16 frag = sc & IEEE80211_SCTL_FRAG;
  2228. u16 *last_seq, *last_frag;
  2229. unsigned long *last_time;
  2230. switch (priv->iw_mode) {
  2231. case IEEE80211_IF_TYPE_IBSS:{
  2232. struct list_head *p;
  2233. struct iwl4965_ibss_seq *entry = NULL;
  2234. u8 *mac = header->addr2;
  2235. int index = mac[5] & (IWL_IBSS_MAC_HASH_SIZE - 1);
  2236. __list_for_each(p, &priv->ibss_mac_hash[index]) {
  2237. entry = list_entry(p, struct iwl4965_ibss_seq, list);
  2238. if (!compare_ether_addr(entry->mac, mac))
  2239. break;
  2240. }
  2241. if (p == &priv->ibss_mac_hash[index]) {
  2242. entry = kzalloc(sizeof(*entry), GFP_ATOMIC);
  2243. if (!entry) {
  2244. IWL_ERROR("Cannot malloc new mac entry\n");
  2245. return 0;
  2246. }
  2247. memcpy(entry->mac, mac, ETH_ALEN);
  2248. entry->seq_num = seq;
  2249. entry->frag_num = frag;
  2250. entry->packet_time = jiffies;
  2251. list_add(&entry->list, &priv->ibss_mac_hash[index]);
  2252. return 0;
  2253. }
  2254. last_seq = &entry->seq_num;
  2255. last_frag = &entry->frag_num;
  2256. last_time = &entry->packet_time;
  2257. break;
  2258. }
  2259. case IEEE80211_IF_TYPE_STA:
  2260. last_seq = &priv->last_seq_num;
  2261. last_frag = &priv->last_frag_num;
  2262. last_time = &priv->last_packet_time;
  2263. break;
  2264. default:
  2265. return 0;
  2266. }
  2267. if ((*last_seq == seq) &&
  2268. time_after(*last_time + IWL_PACKET_RETRY_TIME, jiffies)) {
  2269. if (*last_frag == frag)
  2270. goto drop;
  2271. if (*last_frag + 1 != frag)
  2272. /* out-of-order fragment */
  2273. goto drop;
  2274. } else
  2275. *last_seq = seq;
  2276. *last_frag = frag;
  2277. *last_time = jiffies;
  2278. return 0;
  2279. drop:
  2280. return 1;
  2281. }
  2282. #ifdef CONFIG_IWL4965_SPECTRUM_MEASUREMENT
  2283. #include "iwl-spectrum.h"
  2284. #define BEACON_TIME_MASK_LOW 0x00FFFFFF
  2285. #define BEACON_TIME_MASK_HIGH 0xFF000000
  2286. #define TIME_UNIT 1024
  2287. /*
  2288. * extended beacon time format
  2289. * time in usec will be changed into a 32-bit value in 8:24 format
  2290. * the high 1 byte is the beacon counts
  2291. * the lower 3 bytes is the time in usec within one beacon interval
  2292. */
  2293. static u32 iwl4965_usecs_to_beacons(u32 usec, u32 beacon_interval)
  2294. {
  2295. u32 quot;
  2296. u32 rem;
  2297. u32 interval = beacon_interval * 1024;
  2298. if (!interval || !usec)
  2299. return 0;
  2300. quot = (usec / interval) & (BEACON_TIME_MASK_HIGH >> 24);
  2301. rem = (usec % interval) & BEACON_TIME_MASK_LOW;
  2302. return (quot << 24) + rem;
  2303. }
  2304. /* base is usually what we get from ucode with each received frame,
  2305. * the same as HW timer counter counting down
  2306. */
  2307. static __le32 iwl4965_add_beacon_time(u32 base, u32 addon, u32 beacon_interval)
  2308. {
  2309. u32 base_low = base & BEACON_TIME_MASK_LOW;
  2310. u32 addon_low = addon & BEACON_TIME_MASK_LOW;
  2311. u32 interval = beacon_interval * TIME_UNIT;
  2312. u32 res = (base & BEACON_TIME_MASK_HIGH) +
  2313. (addon & BEACON_TIME_MASK_HIGH);
  2314. if (base_low > addon_low)
  2315. res += base_low - addon_low;
  2316. else if (base_low < addon_low) {
  2317. res += interval + base_low - addon_low;
  2318. res += (1 << 24);
  2319. } else
  2320. res += (1 << 24);
  2321. return cpu_to_le32(res);
  2322. }
  2323. static int iwl4965_get_measurement(struct iwl_priv *priv,
  2324. struct ieee80211_measurement_params *params,
  2325. u8 type)
  2326. {
  2327. struct iwl4965_spectrum_cmd spectrum;
  2328. struct iwl4965_rx_packet *res;
  2329. struct iwl_host_cmd cmd = {
  2330. .id = REPLY_SPECTRUM_MEASUREMENT_CMD,
  2331. .data = (void *)&spectrum,
  2332. .meta.flags = CMD_WANT_SKB,
  2333. };
  2334. u32 add_time = le64_to_cpu(params->start_time);
  2335. int rc;
  2336. int spectrum_resp_status;
  2337. int duration = le16_to_cpu(params->duration);
  2338. if (iwl4965_is_associated(priv))
  2339. add_time =
  2340. iwl4965_usecs_to_beacons(
  2341. le64_to_cpu(params->start_time) - priv->last_tsf,
  2342. le16_to_cpu(priv->rxon_timing.beacon_interval));
  2343. memset(&spectrum, 0, sizeof(spectrum));
  2344. spectrum.channel_count = cpu_to_le16(1);
  2345. spectrum.flags =
  2346. RXON_FLG_TSF2HOST_MSK | RXON_FLG_ANT_A_MSK | RXON_FLG_DIS_DIV_MSK;
  2347. spectrum.filter_flags = MEASUREMENT_FILTER_FLAG;
  2348. cmd.len = sizeof(spectrum);
  2349. spectrum.len = cpu_to_le16(cmd.len - sizeof(spectrum.len));
  2350. if (iwl4965_is_associated(priv))
  2351. spectrum.start_time =
  2352. iwl4965_add_beacon_time(priv->last_beacon_time,
  2353. add_time,
  2354. le16_to_cpu(priv->rxon_timing.beacon_interval));
  2355. else
  2356. spectrum.start_time = 0;
  2357. spectrum.channels[0].duration = cpu_to_le32(duration * TIME_UNIT);
  2358. spectrum.channels[0].channel = params->channel;
  2359. spectrum.channels[0].type = type;
  2360. if (priv->active_rxon.flags & RXON_FLG_BAND_24G_MSK)
  2361. spectrum.flags |= RXON_FLG_BAND_24G_MSK |
  2362. RXON_FLG_AUTO_DETECT_MSK | RXON_FLG_TGG_PROTECT_MSK;
  2363. rc = iwl_send_cmd_sync(priv, &cmd);
  2364. if (rc)
  2365. return rc;
  2366. res = (struct iwl4965_rx_packet *)cmd.meta.u.skb->data;
  2367. if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
  2368. IWL_ERROR("Bad return from REPLY_RX_ON_ASSOC command\n");
  2369. rc = -EIO;
  2370. }
  2371. spectrum_resp_status = le16_to_cpu(res->u.spectrum.status);
  2372. switch (spectrum_resp_status) {
  2373. case 0: /* Command will be handled */
  2374. if (res->u.spectrum.id != 0xff) {
  2375. IWL_DEBUG_INFO
  2376. ("Replaced existing measurement: %d\n",
  2377. res->u.spectrum.id);
  2378. priv->measurement_status &= ~MEASUREMENT_READY;
  2379. }
  2380. priv->measurement_status |= MEASUREMENT_ACTIVE;
  2381. rc = 0;
  2382. break;
  2383. case 1: /* Command will not be handled */
  2384. rc = -EAGAIN;
  2385. break;
  2386. }
  2387. dev_kfree_skb_any(cmd.meta.u.skb);
  2388. return rc;
  2389. }
  2390. #endif
  2391. static void iwl4965_txstatus_to_ieee(struct iwl_priv *priv,
  2392. struct iwl4965_tx_info *tx_sta)
  2393. {
  2394. tx_sta->status.ack_signal = 0;
  2395. tx_sta->status.excessive_retries = 0;
  2396. tx_sta->status.queue_length = 0;
  2397. tx_sta->status.queue_number = 0;
  2398. if (in_interrupt())
  2399. ieee80211_tx_status_irqsafe(priv->hw,
  2400. tx_sta->skb[0], &(tx_sta->status));
  2401. else
  2402. ieee80211_tx_status(priv->hw,
  2403. tx_sta->skb[0], &(tx_sta->status));
  2404. tx_sta->skb[0] = NULL;
  2405. }
  2406. /**
  2407. * iwl4965_tx_queue_reclaim - Reclaim Tx queue entries already Tx'd
  2408. *
  2409. * When FW advances 'R' index, all entries between old and new 'R' index
  2410. * need to be reclaimed. As result, some free space forms. If there is
  2411. * enough free space (> low mark), wake the stack that feeds us.
  2412. */
  2413. int iwl4965_tx_queue_reclaim(struct iwl_priv *priv, int txq_id, int index)
  2414. {
  2415. struct iwl4965_tx_queue *txq = &priv->txq[txq_id];
  2416. struct iwl4965_queue *q = &txq->q;
  2417. int nfreed = 0;
  2418. if ((index >= q->n_bd) || (x2_queue_used(q, index) == 0)) {
  2419. IWL_ERROR("Read index for DMA queue txq id (%d), index %d, "
  2420. "is out of range [0-%d] %d %d.\n", txq_id,
  2421. index, q->n_bd, q->write_ptr, q->read_ptr);
  2422. return 0;
  2423. }
  2424. for (index = iwl_queue_inc_wrap(index, q->n_bd);
  2425. q->read_ptr != index;
  2426. q->read_ptr = iwl_queue_inc_wrap(q->read_ptr, q->n_bd)) {
  2427. if (txq_id != IWL_CMD_QUEUE_NUM) {
  2428. iwl4965_txstatus_to_ieee(priv,
  2429. &(txq->txb[txq->q.read_ptr]));
  2430. iwl4965_hw_txq_free_tfd(priv, txq);
  2431. } else if (nfreed > 1) {
  2432. IWL_ERROR("HCMD skipped: index (%d) %d %d\n", index,
  2433. q->write_ptr, q->read_ptr);
  2434. queue_work(priv->workqueue, &priv->restart);
  2435. }
  2436. nfreed++;
  2437. }
  2438. /* if (iwl4965_queue_space(q) > q->low_mark && (txq_id >= 0) &&
  2439. (txq_id != IWL_CMD_QUEUE_NUM) &&
  2440. priv->mac80211_registered)
  2441. ieee80211_wake_queue(priv->hw, txq_id); */
  2442. return nfreed;
  2443. }
  2444. static int iwl4965_is_tx_success(u32 status)
  2445. {
  2446. status &= TX_STATUS_MSK;
  2447. return (status == TX_STATUS_SUCCESS)
  2448. || (status == TX_STATUS_DIRECT_DONE);
  2449. }
  2450. /******************************************************************************
  2451. *
  2452. * Generic RX handler implementations
  2453. *
  2454. ******************************************************************************/
  2455. #ifdef CONFIG_IWL4965_HT
  2456. static inline int iwl4965_get_ra_sta_id(struct iwl_priv *priv,
  2457. struct ieee80211_hdr *hdr)
  2458. {
  2459. if (priv->iw_mode == IEEE80211_IF_TYPE_STA)
  2460. return IWL_AP_ID;
  2461. else {
  2462. u8 *da = ieee80211_get_DA(hdr);
  2463. return iwl4965_hw_find_station(priv, da);
  2464. }
  2465. }
  2466. static struct ieee80211_hdr *iwl4965_tx_queue_get_hdr(
  2467. struct iwl_priv *priv, int txq_id, int idx)
  2468. {
  2469. if (priv->txq[txq_id].txb[idx].skb[0])
  2470. return (struct ieee80211_hdr *)priv->txq[txq_id].
  2471. txb[idx].skb[0]->data;
  2472. return NULL;
  2473. }
  2474. static inline u32 iwl4965_get_scd_ssn(struct iwl4965_tx_resp *tx_resp)
  2475. {
  2476. __le32 *scd_ssn = (__le32 *)((u32 *)&tx_resp->status +
  2477. tx_resp->frame_count);
  2478. return le32_to_cpu(*scd_ssn) & MAX_SN;
  2479. }
  2480. /**
  2481. * iwl4965_tx_status_reply_tx - Handle Tx rspnse for frames in aggregation queue
  2482. */
  2483. static int iwl4965_tx_status_reply_tx(struct iwl_priv *priv,
  2484. struct iwl4965_ht_agg *agg,
  2485. struct iwl4965_tx_resp_agg *tx_resp,
  2486. u16 start_idx)
  2487. {
  2488. u16 status;
  2489. struct agg_tx_status *frame_status = &tx_resp->status;
  2490. struct ieee80211_tx_status *tx_status = NULL;
  2491. struct ieee80211_hdr *hdr = NULL;
  2492. int i, sh;
  2493. int txq_id, idx;
  2494. u16 seq;
  2495. if (agg->wait_for_ba)
  2496. IWL_DEBUG_TX_REPLY("got tx response w/o block-ack\n");
  2497. agg->frame_count = tx_resp->frame_count;
  2498. agg->start_idx = start_idx;
  2499. agg->rate_n_flags = le32_to_cpu(tx_resp->rate_n_flags);
  2500. agg->bitmap = 0;
  2501. /* # frames attempted by Tx command */
  2502. if (agg->frame_count == 1) {
  2503. /* Only one frame was attempted; no block-ack will arrive */
  2504. status = le16_to_cpu(frame_status[0].status);
  2505. seq = le16_to_cpu(frame_status[0].sequence);
  2506. idx = SEQ_TO_INDEX(seq);
  2507. txq_id = SEQ_TO_QUEUE(seq);
  2508. /* FIXME: code repetition */
  2509. IWL_DEBUG_TX_REPLY("FrameCnt = %d, StartIdx=%d idx=%d\n",
  2510. agg->frame_count, agg->start_idx, idx);
  2511. tx_status = &(priv->txq[txq_id].txb[idx].status);
  2512. tx_status->retry_count = tx_resp->failure_frame;
  2513. tx_status->queue_number = status & 0xff;
  2514. tx_status->queue_length = tx_resp->failure_rts;
  2515. tx_status->control.flags &= ~IEEE80211_TXCTL_AMPDU;
  2516. tx_status->flags = iwl4965_is_tx_success(status)?
  2517. IEEE80211_TX_STATUS_ACK : 0;
  2518. iwl4965_hwrate_to_tx_control(priv,
  2519. le32_to_cpu(tx_resp->rate_n_flags),
  2520. &tx_status->control);
  2521. /* FIXME: code repetition end */
  2522. IWL_DEBUG_TX_REPLY("1 Frame 0x%x failure :%d\n",
  2523. status & 0xff, tx_resp->failure_frame);
  2524. IWL_DEBUG_TX_REPLY("Rate Info rate_n_flags=%x\n",
  2525. iwl4965_hw_get_rate_n_flags(tx_resp->rate_n_flags));
  2526. agg->wait_for_ba = 0;
  2527. } else {
  2528. /* Two or more frames were attempted; expect block-ack */
  2529. u64 bitmap = 0;
  2530. int start = agg->start_idx;
  2531. /* Construct bit-map of pending frames within Tx window */
  2532. for (i = 0; i < agg->frame_count; i++) {
  2533. u16 sc;
  2534. status = le16_to_cpu(frame_status[i].status);
  2535. seq = le16_to_cpu(frame_status[i].sequence);
  2536. idx = SEQ_TO_INDEX(seq);
  2537. txq_id = SEQ_TO_QUEUE(seq);
  2538. if (status & (AGG_TX_STATE_FEW_BYTES_MSK |
  2539. AGG_TX_STATE_ABORT_MSK))
  2540. continue;
  2541. IWL_DEBUG_TX_REPLY("FrameCnt = %d, txq_id=%d idx=%d\n",
  2542. agg->frame_count, txq_id, idx);
  2543. hdr = iwl4965_tx_queue_get_hdr(priv, txq_id, idx);
  2544. sc = le16_to_cpu(hdr->seq_ctrl);
  2545. if (idx != (SEQ_TO_SN(sc) & 0xff)) {
  2546. IWL_ERROR("BUG_ON idx doesn't match seq control"
  2547. " idx=%d, seq_idx=%d, seq=%d\n",
  2548. idx, SEQ_TO_SN(sc),
  2549. hdr->seq_ctrl);
  2550. return -1;
  2551. }
  2552. IWL_DEBUG_TX_REPLY("AGG Frame i=%d idx %d seq=%d\n",
  2553. i, idx, SEQ_TO_SN(sc));
  2554. sh = idx - start;
  2555. if (sh > 64) {
  2556. sh = (start - idx) + 0xff;
  2557. bitmap = bitmap << sh;
  2558. sh = 0;
  2559. start = idx;
  2560. } else if (sh < -64)
  2561. sh = 0xff - (start - idx);
  2562. else if (sh < 0) {
  2563. sh = start - idx;
  2564. start = idx;
  2565. bitmap = bitmap << sh;
  2566. sh = 0;
  2567. }
  2568. bitmap |= (1 << sh);
  2569. IWL_DEBUG_TX_REPLY("start=%d bitmap=0x%x\n",
  2570. start, (u32)(bitmap & 0xFFFFFFFF));
  2571. }
  2572. agg->bitmap = bitmap;
  2573. agg->start_idx = start;
  2574. agg->rate_n_flags = le32_to_cpu(tx_resp->rate_n_flags);
  2575. IWL_DEBUG_TX_REPLY("Frames %d start_idx=%d bitmap=0x%llx\n",
  2576. agg->frame_count, agg->start_idx,
  2577. agg->bitmap);
  2578. if (bitmap)
  2579. agg->wait_for_ba = 1;
  2580. }
  2581. return 0;
  2582. }
  2583. #endif
  2584. /**
  2585. * iwl4965_rx_reply_tx - Handle standard (non-aggregation) Tx response
  2586. */
  2587. static void iwl4965_rx_reply_tx(struct iwl_priv *priv,
  2588. struct iwl4965_rx_mem_buffer *rxb)
  2589. {
  2590. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  2591. u16 sequence = le16_to_cpu(pkt->hdr.sequence);
  2592. int txq_id = SEQ_TO_QUEUE(sequence);
  2593. int index = SEQ_TO_INDEX(sequence);
  2594. struct iwl4965_tx_queue *txq = &priv->txq[txq_id];
  2595. struct ieee80211_tx_status *tx_status;
  2596. struct iwl4965_tx_resp *tx_resp = (void *)&pkt->u.raw[0];
  2597. u32 status = le32_to_cpu(tx_resp->status);
  2598. #ifdef CONFIG_IWL4965_HT
  2599. int tid = MAX_TID_COUNT, sta_id = IWL_INVALID_STATION;
  2600. struct ieee80211_hdr *hdr;
  2601. __le16 *qc;
  2602. #endif
  2603. if ((index >= txq->q.n_bd) || (x2_queue_used(&txq->q, index) == 0)) {
  2604. IWL_ERROR("Read index for DMA queue txq_id (%d) index %d "
  2605. "is out of range [0-%d] %d %d\n", txq_id,
  2606. index, txq->q.n_bd, txq->q.write_ptr,
  2607. txq->q.read_ptr);
  2608. return;
  2609. }
  2610. #ifdef CONFIG_IWL4965_HT
  2611. hdr = iwl4965_tx_queue_get_hdr(priv, txq_id, index);
  2612. qc = ieee80211_get_qos_ctrl(hdr);
  2613. if (qc)
  2614. tid = le16_to_cpu(*qc) & 0xf;
  2615. sta_id = iwl4965_get_ra_sta_id(priv, hdr);
  2616. if (txq->sched_retry && unlikely(sta_id == IWL_INVALID_STATION)) {
  2617. IWL_ERROR("Station not known\n");
  2618. return;
  2619. }
  2620. if (txq->sched_retry) {
  2621. const u32 scd_ssn = iwl4965_get_scd_ssn(tx_resp);
  2622. struct iwl4965_ht_agg *agg = NULL;
  2623. if (!qc)
  2624. return;
  2625. agg = &priv->stations[sta_id].tid[tid].agg;
  2626. iwl4965_tx_status_reply_tx(priv, agg,
  2627. (struct iwl4965_tx_resp_agg *)tx_resp, index);
  2628. if ((tx_resp->frame_count == 1) &&
  2629. !iwl4965_is_tx_success(status)) {
  2630. /* TODO: send BAR */
  2631. }
  2632. if (txq->q.read_ptr != (scd_ssn & 0xff)) {
  2633. int freed;
  2634. index = iwl_queue_dec_wrap(scd_ssn & 0xff, txq->q.n_bd);
  2635. IWL_DEBUG_TX_REPLY("Retry scheduler reclaim scd_ssn "
  2636. "%d index %d\n", scd_ssn , index);
  2637. freed = iwl4965_tx_queue_reclaim(priv, txq_id, index);
  2638. priv->stations[sta_id].tid[tid].tfds_in_queue -= freed;
  2639. if (iwl4965_queue_space(&txq->q) > txq->q.low_mark &&
  2640. txq_id >= 0 && priv->mac80211_registered &&
  2641. agg->state != IWL_EMPTYING_HW_QUEUE_DELBA)
  2642. ieee80211_wake_queue(priv->hw, txq_id);
  2643. iwl4965_check_empty_hw_queue(priv, sta_id, tid, txq_id);
  2644. }
  2645. } else {
  2646. #endif /* CONFIG_IWL4965_HT */
  2647. tx_status = &(txq->txb[txq->q.read_ptr].status);
  2648. tx_status->retry_count = tx_resp->failure_frame;
  2649. tx_status->queue_number = status;
  2650. tx_status->queue_length = tx_resp->bt_kill_count;
  2651. tx_status->queue_length |= tx_resp->failure_rts;
  2652. tx_status->flags =
  2653. iwl4965_is_tx_success(status) ? IEEE80211_TX_STATUS_ACK : 0;
  2654. iwl4965_hwrate_to_tx_control(priv, le32_to_cpu(tx_resp->rate_n_flags),
  2655. &tx_status->control);
  2656. IWL_DEBUG_TX("Tx queue %d Status %s (0x%08x) rate_n_flags 0x%x "
  2657. "retries %d\n", txq_id, iwl4965_get_tx_fail_reason(status),
  2658. status, le32_to_cpu(tx_resp->rate_n_flags),
  2659. tx_resp->failure_frame);
  2660. IWL_DEBUG_TX_REPLY("Tx queue reclaim %d\n", index);
  2661. if (index != -1) {
  2662. int freed = iwl4965_tx_queue_reclaim(priv, txq_id, index);
  2663. #ifdef CONFIG_IWL4965_HT
  2664. if (tid != MAX_TID_COUNT)
  2665. priv->stations[sta_id].tid[tid].tfds_in_queue -= freed;
  2666. if (iwl4965_queue_space(&txq->q) > txq->q.low_mark &&
  2667. (txq_id >= 0) &&
  2668. priv->mac80211_registered)
  2669. ieee80211_wake_queue(priv->hw, txq_id);
  2670. if (tid != MAX_TID_COUNT)
  2671. iwl4965_check_empty_hw_queue(priv, sta_id, tid, txq_id);
  2672. #endif
  2673. }
  2674. #ifdef CONFIG_IWL4965_HT
  2675. }
  2676. #endif /* CONFIG_IWL4965_HT */
  2677. if (iwl_check_bits(status, TX_ABORT_REQUIRED_MSK))
  2678. IWL_ERROR("TODO: Implement Tx ABORT REQUIRED!!!\n");
  2679. }
  2680. static void iwl4965_rx_reply_alive(struct iwl_priv *priv,
  2681. struct iwl4965_rx_mem_buffer *rxb)
  2682. {
  2683. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  2684. struct iwl4965_alive_resp *palive;
  2685. struct delayed_work *pwork;
  2686. palive = &pkt->u.alive_frame;
  2687. IWL_DEBUG_INFO("Alive ucode status 0x%08X revision "
  2688. "0x%01X 0x%01X\n",
  2689. palive->is_valid, palive->ver_type,
  2690. palive->ver_subtype);
  2691. if (palive->ver_subtype == INITIALIZE_SUBTYPE) {
  2692. IWL_DEBUG_INFO("Initialization Alive received.\n");
  2693. memcpy(&priv->card_alive_init,
  2694. &pkt->u.alive_frame,
  2695. sizeof(struct iwl4965_init_alive_resp));
  2696. pwork = &priv->init_alive_start;
  2697. } else {
  2698. IWL_DEBUG_INFO("Runtime Alive received.\n");
  2699. memcpy(&priv->card_alive, &pkt->u.alive_frame,
  2700. sizeof(struct iwl4965_alive_resp));
  2701. pwork = &priv->alive_start;
  2702. }
  2703. /* We delay the ALIVE response by 5ms to
  2704. * give the HW RF Kill time to activate... */
  2705. if (palive->is_valid == UCODE_VALID_OK)
  2706. queue_delayed_work(priv->workqueue, pwork,
  2707. msecs_to_jiffies(5));
  2708. else
  2709. IWL_WARNING("uCode did not respond OK.\n");
  2710. }
  2711. static void iwl4965_rx_reply_add_sta(struct iwl_priv *priv,
  2712. struct iwl4965_rx_mem_buffer *rxb)
  2713. {
  2714. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  2715. IWL_DEBUG_RX("Received REPLY_ADD_STA: 0x%02X\n", pkt->u.status);
  2716. return;
  2717. }
  2718. static void iwl4965_rx_reply_error(struct iwl_priv *priv,
  2719. struct iwl4965_rx_mem_buffer *rxb)
  2720. {
  2721. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  2722. IWL_ERROR("Error Reply type 0x%08X cmd %s (0x%02X) "
  2723. "seq 0x%04X ser 0x%08X\n",
  2724. le32_to_cpu(pkt->u.err_resp.error_type),
  2725. get_cmd_string(pkt->u.err_resp.cmd_id),
  2726. pkt->u.err_resp.cmd_id,
  2727. le16_to_cpu(pkt->u.err_resp.bad_cmd_seq_num),
  2728. le32_to_cpu(pkt->u.err_resp.error_info));
  2729. }
  2730. #define TX_STATUS_ENTRY(x) case TX_STATUS_FAIL_ ## x: return #x
  2731. static void iwl4965_rx_csa(struct iwl_priv *priv, struct iwl4965_rx_mem_buffer *rxb)
  2732. {
  2733. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  2734. struct iwl4965_rxon_cmd *rxon = (void *)&priv->active_rxon;
  2735. struct iwl4965_csa_notification *csa = &(pkt->u.csa_notif);
  2736. IWL_DEBUG_11H("CSA notif: channel %d, status %d\n",
  2737. le16_to_cpu(csa->channel), le32_to_cpu(csa->status));
  2738. rxon->channel = csa->channel;
  2739. priv->staging_rxon.channel = csa->channel;
  2740. }
  2741. static void iwl4965_rx_spectrum_measure_notif(struct iwl_priv *priv,
  2742. struct iwl4965_rx_mem_buffer *rxb)
  2743. {
  2744. #ifdef CONFIG_IWL4965_SPECTRUM_MEASUREMENT
  2745. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  2746. struct iwl4965_spectrum_notification *report = &(pkt->u.spectrum_notif);
  2747. if (!report->state) {
  2748. IWL_DEBUG(IWL_DL_11H | IWL_DL_INFO,
  2749. "Spectrum Measure Notification: Start\n");
  2750. return;
  2751. }
  2752. memcpy(&priv->measure_report, report, sizeof(*report));
  2753. priv->measurement_status |= MEASUREMENT_READY;
  2754. #endif
  2755. }
  2756. static void iwl4965_rx_pm_sleep_notif(struct iwl_priv *priv,
  2757. struct iwl4965_rx_mem_buffer *rxb)
  2758. {
  2759. #ifdef CONFIG_IWLWIFI_DEBUG
  2760. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  2761. struct iwl4965_sleep_notification *sleep = &(pkt->u.sleep_notif);
  2762. IWL_DEBUG_RX("sleep mode: %d, src: %d\n",
  2763. sleep->pm_sleep_mode, sleep->pm_wakeup_src);
  2764. #endif
  2765. }
  2766. static void iwl4965_rx_pm_debug_statistics_notif(struct iwl_priv *priv,
  2767. struct iwl4965_rx_mem_buffer *rxb)
  2768. {
  2769. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  2770. IWL_DEBUG_RADIO("Dumping %d bytes of unhandled "
  2771. "notification for %s:\n",
  2772. le32_to_cpu(pkt->len), get_cmd_string(pkt->hdr.cmd));
  2773. iwl_print_hex_dump(IWL_DL_RADIO, pkt->u.raw, le32_to_cpu(pkt->len));
  2774. }
  2775. static void iwl4965_bg_beacon_update(struct work_struct *work)
  2776. {
  2777. struct iwl_priv *priv =
  2778. container_of(work, struct iwl_priv, beacon_update);
  2779. struct sk_buff *beacon;
  2780. /* Pull updated AP beacon from mac80211. will fail if not in AP mode */
  2781. beacon = ieee80211_beacon_get(priv->hw, priv->vif, NULL);
  2782. if (!beacon) {
  2783. IWL_ERROR("update beacon failed\n");
  2784. return;
  2785. }
  2786. mutex_lock(&priv->mutex);
  2787. /* new beacon skb is allocated every time; dispose previous.*/
  2788. if (priv->ibss_beacon)
  2789. dev_kfree_skb(priv->ibss_beacon);
  2790. priv->ibss_beacon = beacon;
  2791. mutex_unlock(&priv->mutex);
  2792. iwl4965_send_beacon_cmd(priv);
  2793. }
  2794. static void iwl4965_rx_beacon_notif(struct iwl_priv *priv,
  2795. struct iwl4965_rx_mem_buffer *rxb)
  2796. {
  2797. #ifdef CONFIG_IWLWIFI_DEBUG
  2798. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  2799. struct iwl4965_beacon_notif *beacon = &(pkt->u.beacon_status);
  2800. u8 rate = iwl4965_hw_get_rate(beacon->beacon_notify_hdr.rate_n_flags);
  2801. IWL_DEBUG_RX("beacon status %x retries %d iss %d "
  2802. "tsf %d %d rate %d\n",
  2803. le32_to_cpu(beacon->beacon_notify_hdr.status) & TX_STATUS_MSK,
  2804. beacon->beacon_notify_hdr.failure_frame,
  2805. le32_to_cpu(beacon->ibss_mgr_status),
  2806. le32_to_cpu(beacon->high_tsf),
  2807. le32_to_cpu(beacon->low_tsf), rate);
  2808. #endif
  2809. if ((priv->iw_mode == IEEE80211_IF_TYPE_AP) &&
  2810. (!test_bit(STATUS_EXIT_PENDING, &priv->status)))
  2811. queue_work(priv->workqueue, &priv->beacon_update);
  2812. }
  2813. /* Service response to REPLY_SCAN_CMD (0x80) */
  2814. static void iwl4965_rx_reply_scan(struct iwl_priv *priv,
  2815. struct iwl4965_rx_mem_buffer *rxb)
  2816. {
  2817. #ifdef CONFIG_IWLWIFI_DEBUG
  2818. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  2819. struct iwl4965_scanreq_notification *notif =
  2820. (struct iwl4965_scanreq_notification *)pkt->u.raw;
  2821. IWL_DEBUG_RX("Scan request status = 0x%x\n", notif->status);
  2822. #endif
  2823. }
  2824. /* Service SCAN_START_NOTIFICATION (0x82) */
  2825. static void iwl4965_rx_scan_start_notif(struct iwl_priv *priv,
  2826. struct iwl4965_rx_mem_buffer *rxb)
  2827. {
  2828. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  2829. struct iwl4965_scanstart_notification *notif =
  2830. (struct iwl4965_scanstart_notification *)pkt->u.raw;
  2831. priv->scan_start_tsf = le32_to_cpu(notif->tsf_low);
  2832. IWL_DEBUG_SCAN("Scan start: "
  2833. "%d [802.11%s] "
  2834. "(TSF: 0x%08X:%08X) - %d (beacon timer %u)\n",
  2835. notif->channel,
  2836. notif->band ? "bg" : "a",
  2837. notif->tsf_high,
  2838. notif->tsf_low, notif->status, notif->beacon_timer);
  2839. }
  2840. /* Service SCAN_RESULTS_NOTIFICATION (0x83) */
  2841. static void iwl4965_rx_scan_results_notif(struct iwl_priv *priv,
  2842. struct iwl4965_rx_mem_buffer *rxb)
  2843. {
  2844. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  2845. struct iwl4965_scanresults_notification *notif =
  2846. (struct iwl4965_scanresults_notification *)pkt->u.raw;
  2847. IWL_DEBUG_SCAN("Scan ch.res: "
  2848. "%d [802.11%s] "
  2849. "(TSF: 0x%08X:%08X) - %d "
  2850. "elapsed=%lu usec (%dms since last)\n",
  2851. notif->channel,
  2852. notif->band ? "bg" : "a",
  2853. le32_to_cpu(notif->tsf_high),
  2854. le32_to_cpu(notif->tsf_low),
  2855. le32_to_cpu(notif->statistics[0]),
  2856. le32_to_cpu(notif->tsf_low) - priv->scan_start_tsf,
  2857. jiffies_to_msecs(elapsed_jiffies
  2858. (priv->last_scan_jiffies, jiffies)));
  2859. priv->last_scan_jiffies = jiffies;
  2860. priv->next_scan_jiffies = 0;
  2861. }
  2862. /* Service SCAN_COMPLETE_NOTIFICATION (0x84) */
  2863. static void iwl4965_rx_scan_complete_notif(struct iwl_priv *priv,
  2864. struct iwl4965_rx_mem_buffer *rxb)
  2865. {
  2866. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  2867. struct iwl4965_scancomplete_notification *scan_notif = (void *)pkt->u.raw;
  2868. IWL_DEBUG_SCAN("Scan complete: %d channels (TSF 0x%08X:%08X) - %d\n",
  2869. scan_notif->scanned_channels,
  2870. scan_notif->tsf_low,
  2871. scan_notif->tsf_high, scan_notif->status);
  2872. /* The HW is no longer scanning */
  2873. clear_bit(STATUS_SCAN_HW, &priv->status);
  2874. /* The scan completion notification came in, so kill that timer... */
  2875. cancel_delayed_work(&priv->scan_check);
  2876. IWL_DEBUG_INFO("Scan pass on %sGHz took %dms\n",
  2877. (priv->scan_bands == 2) ? "2.4" : "5.2",
  2878. jiffies_to_msecs(elapsed_jiffies
  2879. (priv->scan_pass_start, jiffies)));
  2880. /* Remove this scanned band from the list
  2881. * of pending bands to scan */
  2882. priv->scan_bands--;
  2883. /* If a request to abort was given, or the scan did not succeed
  2884. * then we reset the scan state machine and terminate,
  2885. * re-queuing another scan if one has been requested */
  2886. if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
  2887. IWL_DEBUG_INFO("Aborted scan completed.\n");
  2888. clear_bit(STATUS_SCAN_ABORTING, &priv->status);
  2889. } else {
  2890. /* If there are more bands on this scan pass reschedule */
  2891. if (priv->scan_bands > 0)
  2892. goto reschedule;
  2893. }
  2894. priv->last_scan_jiffies = jiffies;
  2895. priv->next_scan_jiffies = 0;
  2896. IWL_DEBUG_INFO("Setting scan to off\n");
  2897. clear_bit(STATUS_SCANNING, &priv->status);
  2898. IWL_DEBUG_INFO("Scan took %dms\n",
  2899. jiffies_to_msecs(elapsed_jiffies(priv->scan_start, jiffies)));
  2900. queue_work(priv->workqueue, &priv->scan_completed);
  2901. return;
  2902. reschedule:
  2903. priv->scan_pass_start = jiffies;
  2904. queue_work(priv->workqueue, &priv->request_scan);
  2905. }
  2906. /* Handle notification from uCode that card's power state is changing
  2907. * due to software, hardware, or critical temperature RFKILL */
  2908. static void iwl4965_rx_card_state_notif(struct iwl_priv *priv,
  2909. struct iwl4965_rx_mem_buffer *rxb)
  2910. {
  2911. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  2912. u32 flags = le32_to_cpu(pkt->u.card_state_notif.flags);
  2913. unsigned long status = priv->status;
  2914. IWL_DEBUG_RF_KILL("Card state received: HW:%s SW:%s\n",
  2915. (flags & HW_CARD_DISABLED) ? "Kill" : "On",
  2916. (flags & SW_CARD_DISABLED) ? "Kill" : "On");
  2917. if (flags & (SW_CARD_DISABLED | HW_CARD_DISABLED |
  2918. RF_CARD_DISABLED)) {
  2919. iwl4965_write32(priv, CSR_UCODE_DRV_GP1_SET,
  2920. CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
  2921. if (!iwl4965_grab_nic_access(priv)) {
  2922. iwl4965_write_direct32(
  2923. priv, HBUS_TARG_MBX_C,
  2924. HBUS_TARG_MBX_C_REG_BIT_CMD_BLOCKED);
  2925. iwl4965_release_nic_access(priv);
  2926. }
  2927. if (!(flags & RXON_CARD_DISABLED)) {
  2928. iwl4965_write32(priv, CSR_UCODE_DRV_GP1_CLR,
  2929. CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
  2930. if (!iwl4965_grab_nic_access(priv)) {
  2931. iwl4965_write_direct32(
  2932. priv, HBUS_TARG_MBX_C,
  2933. HBUS_TARG_MBX_C_REG_BIT_CMD_BLOCKED);
  2934. iwl4965_release_nic_access(priv);
  2935. }
  2936. }
  2937. if (flags & RF_CARD_DISABLED) {
  2938. iwl4965_write32(priv, CSR_UCODE_DRV_GP1_SET,
  2939. CSR_UCODE_DRV_GP1_REG_BIT_CT_KILL_EXIT);
  2940. iwl4965_read32(priv, CSR_UCODE_DRV_GP1);
  2941. if (!iwl4965_grab_nic_access(priv))
  2942. iwl4965_release_nic_access(priv);
  2943. }
  2944. }
  2945. if (flags & HW_CARD_DISABLED)
  2946. set_bit(STATUS_RF_KILL_HW, &priv->status);
  2947. else
  2948. clear_bit(STATUS_RF_KILL_HW, &priv->status);
  2949. if (flags & SW_CARD_DISABLED)
  2950. set_bit(STATUS_RF_KILL_SW, &priv->status);
  2951. else
  2952. clear_bit(STATUS_RF_KILL_SW, &priv->status);
  2953. if (!(flags & RXON_CARD_DISABLED))
  2954. iwl4965_scan_cancel(priv);
  2955. if ((test_bit(STATUS_RF_KILL_HW, &status) !=
  2956. test_bit(STATUS_RF_KILL_HW, &priv->status)) ||
  2957. (test_bit(STATUS_RF_KILL_SW, &status) !=
  2958. test_bit(STATUS_RF_KILL_SW, &priv->status)))
  2959. queue_work(priv->workqueue, &priv->rf_kill);
  2960. else
  2961. wake_up_interruptible(&priv->wait_command_queue);
  2962. }
  2963. /**
  2964. * iwl4965_setup_rx_handlers - Initialize Rx handler callbacks
  2965. *
  2966. * Setup the RX handlers for each of the reply types sent from the uCode
  2967. * to the host.
  2968. *
  2969. * This function chains into the hardware specific files for them to setup
  2970. * any hardware specific handlers as well.
  2971. */
  2972. static void iwl4965_setup_rx_handlers(struct iwl_priv *priv)
  2973. {
  2974. priv->rx_handlers[REPLY_ALIVE] = iwl4965_rx_reply_alive;
  2975. priv->rx_handlers[REPLY_ADD_STA] = iwl4965_rx_reply_add_sta;
  2976. priv->rx_handlers[REPLY_ERROR] = iwl4965_rx_reply_error;
  2977. priv->rx_handlers[CHANNEL_SWITCH_NOTIFICATION] = iwl4965_rx_csa;
  2978. priv->rx_handlers[SPECTRUM_MEASURE_NOTIFICATION] =
  2979. iwl4965_rx_spectrum_measure_notif;
  2980. priv->rx_handlers[PM_SLEEP_NOTIFICATION] = iwl4965_rx_pm_sleep_notif;
  2981. priv->rx_handlers[PM_DEBUG_STATISTIC_NOTIFIC] =
  2982. iwl4965_rx_pm_debug_statistics_notif;
  2983. priv->rx_handlers[BEACON_NOTIFICATION] = iwl4965_rx_beacon_notif;
  2984. /*
  2985. * The same handler is used for both the REPLY to a discrete
  2986. * statistics request from the host as well as for the periodic
  2987. * statistics notifications (after received beacons) from the uCode.
  2988. */
  2989. priv->rx_handlers[REPLY_STATISTICS_CMD] = iwl4965_hw_rx_statistics;
  2990. priv->rx_handlers[STATISTICS_NOTIFICATION] = iwl4965_hw_rx_statistics;
  2991. priv->rx_handlers[REPLY_SCAN_CMD] = iwl4965_rx_reply_scan;
  2992. priv->rx_handlers[SCAN_START_NOTIFICATION] = iwl4965_rx_scan_start_notif;
  2993. priv->rx_handlers[SCAN_RESULTS_NOTIFICATION] =
  2994. iwl4965_rx_scan_results_notif;
  2995. priv->rx_handlers[SCAN_COMPLETE_NOTIFICATION] =
  2996. iwl4965_rx_scan_complete_notif;
  2997. priv->rx_handlers[CARD_STATE_NOTIFICATION] = iwl4965_rx_card_state_notif;
  2998. priv->rx_handlers[REPLY_TX] = iwl4965_rx_reply_tx;
  2999. /* Set up hardware specific Rx handlers */
  3000. iwl4965_hw_rx_handler_setup(priv);
  3001. }
  3002. /**
  3003. * iwl4965_tx_cmd_complete - Pull unused buffers off the queue and reclaim them
  3004. * @rxb: Rx buffer to reclaim
  3005. *
  3006. * If an Rx buffer has an async callback associated with it the callback
  3007. * will be executed. The attached skb (if present) will only be freed
  3008. * if the callback returns 1
  3009. */
  3010. static void iwl4965_tx_cmd_complete(struct iwl_priv *priv,
  3011. struct iwl4965_rx_mem_buffer *rxb)
  3012. {
  3013. struct iwl4965_rx_packet *pkt = (struct iwl4965_rx_packet *)rxb->skb->data;
  3014. u16 sequence = le16_to_cpu(pkt->hdr.sequence);
  3015. int txq_id = SEQ_TO_QUEUE(sequence);
  3016. int index = SEQ_TO_INDEX(sequence);
  3017. int huge = sequence & SEQ_HUGE_FRAME;
  3018. int cmd_index;
  3019. struct iwl_cmd *cmd;
  3020. /* If a Tx command is being handled and it isn't in the actual
  3021. * command queue then there a command routing bug has been introduced
  3022. * in the queue management code. */
  3023. if (txq_id != IWL_CMD_QUEUE_NUM)
  3024. IWL_ERROR("Error wrong command queue %d command id 0x%X\n",
  3025. txq_id, pkt->hdr.cmd);
  3026. BUG_ON(txq_id != IWL_CMD_QUEUE_NUM);
  3027. cmd_index = get_cmd_index(&priv->txq[IWL_CMD_QUEUE_NUM].q, index, huge);
  3028. cmd = &priv->txq[IWL_CMD_QUEUE_NUM].cmd[cmd_index];
  3029. /* Input error checking is done when commands are added to queue. */
  3030. if (cmd->meta.flags & CMD_WANT_SKB) {
  3031. cmd->meta.source->u.skb = rxb->skb;
  3032. rxb->skb = NULL;
  3033. } else if (cmd->meta.u.callback &&
  3034. !cmd->meta.u.callback(priv, cmd, rxb->skb))
  3035. rxb->skb = NULL;
  3036. iwl4965_tx_queue_reclaim(priv, txq_id, index);
  3037. if (!(cmd->meta.flags & CMD_ASYNC)) {
  3038. clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
  3039. wake_up_interruptible(&priv->wait_command_queue);
  3040. }
  3041. }
  3042. /************************** RX-FUNCTIONS ****************************/
  3043. /*
  3044. * Rx theory of operation
  3045. *
  3046. * Driver allocates a circular buffer of Receive Buffer Descriptors (RBDs),
  3047. * each of which point to Receive Buffers to be filled by 4965. These get
  3048. * used not only for Rx frames, but for any command response or notification
  3049. * from the 4965. The driver and 4965 manage the Rx buffers by means
  3050. * of indexes into the circular buffer.
  3051. *
  3052. * Rx Queue Indexes
  3053. * The host/firmware share two index registers for managing the Rx buffers.
  3054. *
  3055. * The READ index maps to the first position that the firmware may be writing
  3056. * to -- the driver can read up to (but not including) this position and get
  3057. * good data.
  3058. * The READ index is managed by the firmware once the card is enabled.
  3059. *
  3060. * The WRITE index maps to the last position the driver has read from -- the
  3061. * position preceding WRITE is the last slot the firmware can place a packet.
  3062. *
  3063. * The queue is empty (no good data) if WRITE = READ - 1, and is full if
  3064. * WRITE = READ.
  3065. *
  3066. * During initialization, the host sets up the READ queue position to the first
  3067. * INDEX position, and WRITE to the last (READ - 1 wrapped)
  3068. *
  3069. * When the firmware places a packet in a buffer, it will advance the READ index
  3070. * and fire the RX interrupt. The driver can then query the READ index and
  3071. * process as many packets as possible, moving the WRITE index forward as it
  3072. * resets the Rx queue buffers with new memory.
  3073. *
  3074. * The management in the driver is as follows:
  3075. * + A list of pre-allocated SKBs is stored in iwl->rxq->rx_free. When
  3076. * iwl->rxq->free_count drops to or below RX_LOW_WATERMARK, work is scheduled
  3077. * to replenish the iwl->rxq->rx_free.
  3078. * + In iwl4965_rx_replenish (scheduled) if 'processed' != 'read' then the
  3079. * iwl->rxq is replenished and the READ INDEX is updated (updating the
  3080. * 'processed' and 'read' driver indexes as well)
  3081. * + A received packet is processed and handed to the kernel network stack,
  3082. * detached from the iwl->rxq. The driver 'processed' index is updated.
  3083. * + The Host/Firmware iwl->rxq is replenished at tasklet time from the rx_free
  3084. * list. If there are no allocated buffers in iwl->rxq->rx_free, the READ
  3085. * INDEX is not incremented and iwl->status(RX_STALLED) is set. If there
  3086. * were enough free buffers and RX_STALLED is set it is cleared.
  3087. *
  3088. *
  3089. * Driver sequence:
  3090. *
  3091. * iwl4965_rx_queue_alloc() Allocates rx_free
  3092. * iwl4965_rx_replenish() Replenishes rx_free list from rx_used, and calls
  3093. * iwl4965_rx_queue_restock
  3094. * iwl4965_rx_queue_restock() Moves available buffers from rx_free into Rx
  3095. * queue, updates firmware pointers, and updates
  3096. * the WRITE index. If insufficient rx_free buffers
  3097. * are available, schedules iwl4965_rx_replenish
  3098. *
  3099. * -- enable interrupts --
  3100. * ISR - iwl4965_rx() Detach iwl4965_rx_mem_buffers from pool up to the
  3101. * READ INDEX, detaching the SKB from the pool.
  3102. * Moves the packet buffer from queue to rx_used.
  3103. * Calls iwl4965_rx_queue_restock to refill any empty
  3104. * slots.
  3105. * ...
  3106. *
  3107. */
  3108. /**
  3109. * iwl4965_rx_queue_space - Return number of free slots available in queue.
  3110. */
  3111. static int iwl4965_rx_queue_space(const struct iwl4965_rx_queue *q)
  3112. {
  3113. int s = q->read - q->write;
  3114. if (s <= 0)
  3115. s += RX_QUEUE_SIZE;
  3116. /* keep some buffer to not confuse full and empty queue */
  3117. s -= 2;
  3118. if (s < 0)
  3119. s = 0;
  3120. return s;
  3121. }
  3122. /**
  3123. * iwl4965_rx_queue_update_write_ptr - Update the write pointer for the RX queue
  3124. */
  3125. int iwl4965_rx_queue_update_write_ptr(struct iwl_priv *priv, struct iwl4965_rx_queue *q)
  3126. {
  3127. u32 reg = 0;
  3128. int rc = 0;
  3129. unsigned long flags;
  3130. spin_lock_irqsave(&q->lock, flags);
  3131. if (q->need_update == 0)
  3132. goto exit_unlock;
  3133. /* If power-saving is in use, make sure device is awake */
  3134. if (test_bit(STATUS_POWER_PMI, &priv->status)) {
  3135. reg = iwl4965_read32(priv, CSR_UCODE_DRV_GP1);
  3136. if (reg & CSR_UCODE_DRV_GP1_BIT_MAC_SLEEP) {
  3137. iwl4965_set_bit(priv, CSR_GP_CNTRL,
  3138. CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
  3139. goto exit_unlock;
  3140. }
  3141. rc = iwl4965_grab_nic_access(priv);
  3142. if (rc)
  3143. goto exit_unlock;
  3144. /* Device expects a multiple of 8 */
  3145. iwl4965_write_direct32(priv, FH_RSCSR_CHNL0_WPTR,
  3146. q->write & ~0x7);
  3147. iwl4965_release_nic_access(priv);
  3148. /* Else device is assumed to be awake */
  3149. } else
  3150. /* Device expects a multiple of 8 */
  3151. iwl4965_write32(priv, FH_RSCSR_CHNL0_WPTR, q->write & ~0x7);
  3152. q->need_update = 0;
  3153. exit_unlock:
  3154. spin_unlock_irqrestore(&q->lock, flags);
  3155. return rc;
  3156. }
  3157. /**
  3158. * iwl4965_dma_addr2rbd_ptr - convert a DMA address to a uCode read buffer ptr
  3159. */
  3160. static inline __le32 iwl4965_dma_addr2rbd_ptr(struct iwl_priv *priv,
  3161. dma_addr_t dma_addr)
  3162. {
  3163. return cpu_to_le32((u32)(dma_addr >> 8));
  3164. }
  3165. /**
  3166. * iwl4965_rx_queue_restock - refill RX queue from pre-allocated pool
  3167. *
  3168. * If there are slots in the RX queue that need to be restocked,
  3169. * and we have free pre-allocated buffers, fill the ranks as much
  3170. * as we can, pulling from rx_free.
  3171. *
  3172. * This moves the 'write' index forward to catch up with 'processed', and
  3173. * also updates the memory address in the firmware to reference the new
  3174. * target buffer.
  3175. */
  3176. static int iwl4965_rx_queue_restock(struct iwl_priv *priv)
  3177. {
  3178. struct iwl4965_rx_queue *rxq = &priv->rxq;
  3179. struct list_head *element;
  3180. struct iwl4965_rx_mem_buffer *rxb;
  3181. unsigned long flags;
  3182. int write, rc;
  3183. spin_lock_irqsave(&rxq->lock, flags);
  3184. write = rxq->write & ~0x7;
  3185. while ((iwl4965_rx_queue_space(rxq) > 0) && (rxq->free_count)) {
  3186. /* Get next free Rx buffer, remove from free list */
  3187. element = rxq->rx_free.next;
  3188. rxb = list_entry(element, struct iwl4965_rx_mem_buffer, list);
  3189. list_del(element);
  3190. /* Point to Rx buffer via next RBD in circular buffer */
  3191. rxq->bd[rxq->write] = iwl4965_dma_addr2rbd_ptr(priv, rxb->dma_addr);
  3192. rxq->queue[rxq->write] = rxb;
  3193. rxq->write = (rxq->write + 1) & RX_QUEUE_MASK;
  3194. rxq->free_count--;
  3195. }
  3196. spin_unlock_irqrestore(&rxq->lock, flags);
  3197. /* If the pre-allocated buffer pool is dropping low, schedule to
  3198. * refill it */
  3199. if (rxq->free_count <= RX_LOW_WATERMARK)
  3200. queue_work(priv->workqueue, &priv->rx_replenish);
  3201. /* If we've added more space for the firmware to place data, tell it.
  3202. * Increment device's write pointer in multiples of 8. */
  3203. if ((write != (rxq->write & ~0x7))
  3204. || (abs(rxq->write - rxq->read) > 7)) {
  3205. spin_lock_irqsave(&rxq->lock, flags);
  3206. rxq->need_update = 1;
  3207. spin_unlock_irqrestore(&rxq->lock, flags);
  3208. rc = iwl4965_rx_queue_update_write_ptr(priv, rxq);
  3209. if (rc)
  3210. return rc;
  3211. }
  3212. return 0;
  3213. }
  3214. /**
  3215. * iwl4965_rx_replenish - Move all used packet from rx_used to rx_free
  3216. *
  3217. * When moving to rx_free an SKB is allocated for the slot.
  3218. *
  3219. * Also restock the Rx queue via iwl4965_rx_queue_restock.
  3220. * This is called as a scheduled work item (except for during initialization)
  3221. */
  3222. static void iwl4965_rx_allocate(struct iwl_priv *priv)
  3223. {
  3224. struct iwl4965_rx_queue *rxq = &priv->rxq;
  3225. struct list_head *element;
  3226. struct iwl4965_rx_mem_buffer *rxb;
  3227. unsigned long flags;
  3228. spin_lock_irqsave(&rxq->lock, flags);
  3229. while (!list_empty(&rxq->rx_used)) {
  3230. element = rxq->rx_used.next;
  3231. rxb = list_entry(element, struct iwl4965_rx_mem_buffer, list);
  3232. /* Alloc a new receive buffer */
  3233. rxb->skb =
  3234. alloc_skb(priv->hw_setting.rx_buf_size,
  3235. __GFP_NOWARN | GFP_ATOMIC);
  3236. if (!rxb->skb) {
  3237. if (net_ratelimit())
  3238. printk(KERN_CRIT DRV_NAME
  3239. ": Can not allocate SKB buffers\n");
  3240. /* We don't reschedule replenish work here -- we will
  3241. * call the restock method and if it still needs
  3242. * more buffers it will schedule replenish */
  3243. break;
  3244. }
  3245. priv->alloc_rxb_skb++;
  3246. list_del(element);
  3247. /* Get physical address of RB/SKB */
  3248. rxb->dma_addr =
  3249. pci_map_single(priv->pci_dev, rxb->skb->data,
  3250. priv->hw_setting.rx_buf_size, PCI_DMA_FROMDEVICE);
  3251. list_add_tail(&rxb->list, &rxq->rx_free);
  3252. rxq->free_count++;
  3253. }
  3254. spin_unlock_irqrestore(&rxq->lock, flags);
  3255. }
  3256. /*
  3257. * this should be called while priv->lock is locked
  3258. */
  3259. static void __iwl4965_rx_replenish(void *data)
  3260. {
  3261. struct iwl_priv *priv = data;
  3262. iwl4965_rx_allocate(priv);
  3263. iwl4965_rx_queue_restock(priv);
  3264. }
  3265. void iwl4965_rx_replenish(void *data)
  3266. {
  3267. struct iwl_priv *priv = data;
  3268. unsigned long flags;
  3269. iwl4965_rx_allocate(priv);
  3270. spin_lock_irqsave(&priv->lock, flags);
  3271. iwl4965_rx_queue_restock(priv);
  3272. spin_unlock_irqrestore(&priv->lock, flags);
  3273. }
  3274. /* Assumes that the skb field of the buffers in 'pool' is kept accurate.
  3275. * If an SKB has been detached, the POOL needs to have its SKB set to NULL
  3276. * This free routine walks the list of POOL entries and if SKB is set to
  3277. * non NULL it is unmapped and freed
  3278. */
  3279. static void iwl4965_rx_queue_free(struct iwl_priv *priv, struct iwl4965_rx_queue *rxq)
  3280. {
  3281. int i;
  3282. for (i = 0; i < RX_QUEUE_SIZE + RX_FREE_BUFFERS; i++) {
  3283. if (rxq->pool[i].skb != NULL) {
  3284. pci_unmap_single(priv->pci_dev,
  3285. rxq->pool[i].dma_addr,
  3286. priv->hw_setting.rx_buf_size,
  3287. PCI_DMA_FROMDEVICE);
  3288. dev_kfree_skb(rxq->pool[i].skb);
  3289. }
  3290. }
  3291. pci_free_consistent(priv->pci_dev, 4 * RX_QUEUE_SIZE, rxq->bd,
  3292. rxq->dma_addr);
  3293. rxq->bd = NULL;
  3294. }
  3295. int iwl4965_rx_queue_alloc(struct iwl_priv *priv)
  3296. {
  3297. struct iwl4965_rx_queue *rxq = &priv->rxq;
  3298. struct pci_dev *dev = priv->pci_dev;
  3299. int i;
  3300. spin_lock_init(&rxq->lock);
  3301. INIT_LIST_HEAD(&rxq->rx_free);
  3302. INIT_LIST_HEAD(&rxq->rx_used);
  3303. /* Alloc the circular buffer of Read Buffer Descriptors (RBDs) */
  3304. rxq->bd = pci_alloc_consistent(dev, 4 * RX_QUEUE_SIZE, &rxq->dma_addr);
  3305. if (!rxq->bd)
  3306. return -ENOMEM;
  3307. /* Fill the rx_used queue with _all_ of the Rx buffers */
  3308. for (i = 0; i < RX_FREE_BUFFERS + RX_QUEUE_SIZE; i++)
  3309. list_add_tail(&rxq->pool[i].list, &rxq->rx_used);
  3310. /* Set us so that we have processed and used all buffers, but have
  3311. * not restocked the Rx queue with fresh buffers */
  3312. rxq->read = rxq->write = 0;
  3313. rxq->free_count = 0;
  3314. rxq->need_update = 0;
  3315. return 0;
  3316. }
  3317. void iwl4965_rx_queue_reset(struct iwl_priv *priv, struct iwl4965_rx_queue *rxq)
  3318. {
  3319. unsigned long flags;
  3320. int i;
  3321. spin_lock_irqsave(&rxq->lock, flags);
  3322. INIT_LIST_HEAD(&rxq->rx_free);
  3323. INIT_LIST_HEAD(&rxq->rx_used);
  3324. /* Fill the rx_used queue with _all_ of the Rx buffers */
  3325. for (i = 0; i < RX_FREE_BUFFERS + RX_QUEUE_SIZE; i++) {
  3326. /* In the reset function, these buffers may have been allocated
  3327. * to an SKB, so we need to unmap and free potential storage */
  3328. if (rxq->pool[i].skb != NULL) {
  3329. pci_unmap_single(priv->pci_dev,
  3330. rxq->pool[i].dma_addr,
  3331. priv->hw_setting.rx_buf_size,
  3332. PCI_DMA_FROMDEVICE);
  3333. priv->alloc_rxb_skb--;
  3334. dev_kfree_skb(rxq->pool[i].skb);
  3335. rxq->pool[i].skb = NULL;
  3336. }
  3337. list_add_tail(&rxq->pool[i].list, &rxq->rx_used);
  3338. }
  3339. /* Set us so that we have processed and used all buffers, but have
  3340. * not restocked the Rx queue with fresh buffers */
  3341. rxq->read = rxq->write = 0;
  3342. rxq->free_count = 0;
  3343. spin_unlock_irqrestore(&rxq->lock, flags);
  3344. }
  3345. /* Convert linear signal-to-noise ratio into dB */
  3346. static u8 ratio2dB[100] = {
  3347. /* 0 1 2 3 4 5 6 7 8 9 */
  3348. 0, 0, 6, 10, 12, 14, 16, 17, 18, 19, /* 00 - 09 */
  3349. 20, 21, 22, 22, 23, 23, 24, 25, 26, 26, /* 10 - 19 */
  3350. 26, 26, 26, 27, 27, 28, 28, 28, 29, 29, /* 20 - 29 */
  3351. 29, 30, 30, 30, 31, 31, 31, 31, 32, 32, /* 30 - 39 */
  3352. 32, 32, 32, 33, 33, 33, 33, 33, 34, 34, /* 40 - 49 */
  3353. 34, 34, 34, 34, 35, 35, 35, 35, 35, 35, /* 50 - 59 */
  3354. 36, 36, 36, 36, 36, 36, 36, 37, 37, 37, /* 60 - 69 */
  3355. 37, 37, 37, 37, 37, 38, 38, 38, 38, 38, /* 70 - 79 */
  3356. 38, 38, 38, 38, 38, 39, 39, 39, 39, 39, /* 80 - 89 */
  3357. 39, 39, 39, 39, 39, 40, 40, 40, 40, 40 /* 90 - 99 */
  3358. };
  3359. /* Calculates a relative dB value from a ratio of linear
  3360. * (i.e. not dB) signal levels.
  3361. * Conversion assumes that levels are voltages (20*log), not powers (10*log). */
  3362. int iwl4965_calc_db_from_ratio(int sig_ratio)
  3363. {
  3364. /* 1000:1 or higher just report as 60 dB */
  3365. if (sig_ratio >= 1000)
  3366. return 60;
  3367. /* 100:1 or higher, divide by 10 and use table,
  3368. * add 20 dB to make up for divide by 10 */
  3369. if (sig_ratio >= 100)
  3370. return (20 + (int)ratio2dB[sig_ratio/10]);
  3371. /* We shouldn't see this */
  3372. if (sig_ratio < 1)
  3373. return 0;
  3374. /* Use table for ratios 1:1 - 99:1 */
  3375. return (int)ratio2dB[sig_ratio];
  3376. }
  3377. #define PERFECT_RSSI (-20) /* dBm */
  3378. #define WORST_RSSI (-95) /* dBm */
  3379. #define RSSI_RANGE (PERFECT_RSSI - WORST_RSSI)
  3380. /* Calculate an indication of rx signal quality (a percentage, not dBm!).
  3381. * See http://www.ces.clemson.edu/linux/signal_quality.shtml for info
  3382. * about formulas used below. */
  3383. int iwl4965_calc_sig_qual(int rssi_dbm, int noise_dbm)
  3384. {
  3385. int sig_qual;
  3386. int degradation = PERFECT_RSSI - rssi_dbm;
  3387. /* If we get a noise measurement, use signal-to-noise ratio (SNR)
  3388. * as indicator; formula is (signal dbm - noise dbm).
  3389. * SNR at or above 40 is a great signal (100%).
  3390. * Below that, scale to fit SNR of 0 - 40 dB within 0 - 100% indicator.
  3391. * Weakest usable signal is usually 10 - 15 dB SNR. */
  3392. if (noise_dbm) {
  3393. if (rssi_dbm - noise_dbm >= 40)
  3394. return 100;
  3395. else if (rssi_dbm < noise_dbm)
  3396. return 0;
  3397. sig_qual = ((rssi_dbm - noise_dbm) * 5) / 2;
  3398. /* Else use just the signal level.
  3399. * This formula is a least squares fit of data points collected and
  3400. * compared with a reference system that had a percentage (%) display
  3401. * for signal quality. */
  3402. } else
  3403. sig_qual = (100 * (RSSI_RANGE * RSSI_RANGE) - degradation *
  3404. (15 * RSSI_RANGE + 62 * degradation)) /
  3405. (RSSI_RANGE * RSSI_RANGE);
  3406. if (sig_qual > 100)
  3407. sig_qual = 100;
  3408. else if (sig_qual < 1)
  3409. sig_qual = 0;
  3410. return sig_qual;
  3411. }
  3412. /**
  3413. * iwl4965_rx_handle - Main entry function for receiving responses from uCode
  3414. *
  3415. * Uses the priv->rx_handlers callback function array to invoke
  3416. * the appropriate handlers, including command responses,
  3417. * frame-received notifications, and other notifications.
  3418. */
  3419. static void iwl4965_rx_handle(struct iwl_priv *priv)
  3420. {
  3421. struct iwl4965_rx_mem_buffer *rxb;
  3422. struct iwl4965_rx_packet *pkt;
  3423. struct iwl4965_rx_queue *rxq = &priv->rxq;
  3424. u32 r, i;
  3425. int reclaim;
  3426. unsigned long flags;
  3427. u8 fill_rx = 0;
  3428. u32 count = 8;
  3429. /* uCode's read index (stored in shared DRAM) indicates the last Rx
  3430. * buffer that the driver may process (last buffer filled by ucode). */
  3431. r = iwl4965_hw_get_rx_read(priv);
  3432. i = rxq->read;
  3433. /* Rx interrupt, but nothing sent from uCode */
  3434. if (i == r)
  3435. IWL_DEBUG(IWL_DL_RX | IWL_DL_ISR, "r = %d, i = %d\n", r, i);
  3436. if (iwl4965_rx_queue_space(rxq) > (RX_QUEUE_SIZE / 2))
  3437. fill_rx = 1;
  3438. while (i != r) {
  3439. rxb = rxq->queue[i];
  3440. /* If an RXB doesn't have a Rx queue slot associated with it,
  3441. * then a bug has been introduced in the queue refilling
  3442. * routines -- catch it here */
  3443. BUG_ON(rxb == NULL);
  3444. rxq->queue[i] = NULL;
  3445. pci_dma_sync_single_for_cpu(priv->pci_dev, rxb->dma_addr,
  3446. priv->hw_setting.rx_buf_size,
  3447. PCI_DMA_FROMDEVICE);
  3448. pkt = (struct iwl4965_rx_packet *)rxb->skb->data;
  3449. /* Reclaim a command buffer only if this packet is a response
  3450. * to a (driver-originated) command.
  3451. * If the packet (e.g. Rx frame) originated from uCode,
  3452. * there is no command buffer to reclaim.
  3453. * Ucode should set SEQ_RX_FRAME bit if ucode-originated,
  3454. * but apparently a few don't get set; catch them here. */
  3455. reclaim = !(pkt->hdr.sequence & SEQ_RX_FRAME) &&
  3456. (pkt->hdr.cmd != REPLY_RX_PHY_CMD) &&
  3457. (pkt->hdr.cmd != REPLY_RX) &&
  3458. (pkt->hdr.cmd != REPLY_COMPRESSED_BA) &&
  3459. (pkt->hdr.cmd != STATISTICS_NOTIFICATION) &&
  3460. (pkt->hdr.cmd != REPLY_TX);
  3461. /* Based on type of command response or notification,
  3462. * handle those that need handling via function in
  3463. * rx_handlers table. See iwl4965_setup_rx_handlers() */
  3464. if (priv->rx_handlers[pkt->hdr.cmd]) {
  3465. IWL_DEBUG(IWL_DL_HOST_COMMAND | IWL_DL_RX | IWL_DL_ISR,
  3466. "r = %d, i = %d, %s, 0x%02x\n", r, i,
  3467. get_cmd_string(pkt->hdr.cmd), pkt->hdr.cmd);
  3468. priv->rx_handlers[pkt->hdr.cmd] (priv, rxb);
  3469. } else {
  3470. /* No handling needed */
  3471. IWL_DEBUG(IWL_DL_HOST_COMMAND | IWL_DL_RX | IWL_DL_ISR,
  3472. "r %d i %d No handler needed for %s, 0x%02x\n",
  3473. r, i, get_cmd_string(pkt->hdr.cmd),
  3474. pkt->hdr.cmd);
  3475. }
  3476. if (reclaim) {
  3477. /* Invoke any callbacks, transfer the skb to caller, and
  3478. * fire off the (possibly) blocking iwl_send_cmd()
  3479. * as we reclaim the driver command queue */
  3480. if (rxb && rxb->skb)
  3481. iwl4965_tx_cmd_complete(priv, rxb);
  3482. else
  3483. IWL_WARNING("Claim null rxb?\n");
  3484. }
  3485. /* For now we just don't re-use anything. We can tweak this
  3486. * later to try and re-use notification packets and SKBs that
  3487. * fail to Rx correctly */
  3488. if (rxb->skb != NULL) {
  3489. priv->alloc_rxb_skb--;
  3490. dev_kfree_skb_any(rxb->skb);
  3491. rxb->skb = NULL;
  3492. }
  3493. pci_unmap_single(priv->pci_dev, rxb->dma_addr,
  3494. priv->hw_setting.rx_buf_size,
  3495. PCI_DMA_FROMDEVICE);
  3496. spin_lock_irqsave(&rxq->lock, flags);
  3497. list_add_tail(&rxb->list, &priv->rxq.rx_used);
  3498. spin_unlock_irqrestore(&rxq->lock, flags);
  3499. i = (i + 1) & RX_QUEUE_MASK;
  3500. /* If there are a lot of unused frames,
  3501. * restock the Rx queue so ucode wont assert. */
  3502. if (fill_rx) {
  3503. count++;
  3504. if (count >= 8) {
  3505. priv->rxq.read = i;
  3506. __iwl4965_rx_replenish(priv);
  3507. count = 0;
  3508. }
  3509. }
  3510. }
  3511. /* Backtrack one entry */
  3512. priv->rxq.read = i;
  3513. iwl4965_rx_queue_restock(priv);
  3514. }
  3515. /**
  3516. * iwl4965_tx_queue_update_write_ptr - Send new write index to hardware
  3517. */
  3518. static int iwl4965_tx_queue_update_write_ptr(struct iwl_priv *priv,
  3519. struct iwl4965_tx_queue *txq)
  3520. {
  3521. u32 reg = 0;
  3522. int rc = 0;
  3523. int txq_id = txq->q.id;
  3524. if (txq->need_update == 0)
  3525. return rc;
  3526. /* if we're trying to save power */
  3527. if (test_bit(STATUS_POWER_PMI, &priv->status)) {
  3528. /* wake up nic if it's powered down ...
  3529. * uCode will wake up, and interrupt us again, so next
  3530. * time we'll skip this part. */
  3531. reg = iwl4965_read32(priv, CSR_UCODE_DRV_GP1);
  3532. if (reg & CSR_UCODE_DRV_GP1_BIT_MAC_SLEEP) {
  3533. IWL_DEBUG_INFO("Requesting wakeup, GP1 = 0x%x\n", reg);
  3534. iwl4965_set_bit(priv, CSR_GP_CNTRL,
  3535. CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
  3536. return rc;
  3537. }
  3538. /* restore this queue's parameters in nic hardware. */
  3539. rc = iwl4965_grab_nic_access(priv);
  3540. if (rc)
  3541. return rc;
  3542. iwl4965_write_direct32(priv, HBUS_TARG_WRPTR,
  3543. txq->q.write_ptr | (txq_id << 8));
  3544. iwl4965_release_nic_access(priv);
  3545. /* else not in power-save mode, uCode will never sleep when we're
  3546. * trying to tx (during RFKILL, we're not trying to tx). */
  3547. } else
  3548. iwl4965_write32(priv, HBUS_TARG_WRPTR,
  3549. txq->q.write_ptr | (txq_id << 8));
  3550. txq->need_update = 0;
  3551. return rc;
  3552. }
  3553. #ifdef CONFIG_IWLWIFI_DEBUG
  3554. static void iwl4965_print_rx_config_cmd(struct iwl4965_rxon_cmd *rxon)
  3555. {
  3556. DECLARE_MAC_BUF(mac);
  3557. IWL_DEBUG_RADIO("RX CONFIG:\n");
  3558. iwl_print_hex_dump(IWL_DL_RADIO, (u8 *) rxon, sizeof(*rxon));
  3559. IWL_DEBUG_RADIO("u16 channel: 0x%x\n", le16_to_cpu(rxon->channel));
  3560. IWL_DEBUG_RADIO("u32 flags: 0x%08X\n", le32_to_cpu(rxon->flags));
  3561. IWL_DEBUG_RADIO("u32 filter_flags: 0x%08x\n",
  3562. le32_to_cpu(rxon->filter_flags));
  3563. IWL_DEBUG_RADIO("u8 dev_type: 0x%x\n", rxon->dev_type);
  3564. IWL_DEBUG_RADIO("u8 ofdm_basic_rates: 0x%02x\n",
  3565. rxon->ofdm_basic_rates);
  3566. IWL_DEBUG_RADIO("u8 cck_basic_rates: 0x%02x\n", rxon->cck_basic_rates);
  3567. IWL_DEBUG_RADIO("u8[6] node_addr: %s\n",
  3568. print_mac(mac, rxon->node_addr));
  3569. IWL_DEBUG_RADIO("u8[6] bssid_addr: %s\n",
  3570. print_mac(mac, rxon->bssid_addr));
  3571. IWL_DEBUG_RADIO("u16 assoc_id: 0x%x\n", le16_to_cpu(rxon->assoc_id));
  3572. }
  3573. #endif
  3574. static void iwl4965_enable_interrupts(struct iwl_priv *priv)
  3575. {
  3576. IWL_DEBUG_ISR("Enabling interrupts\n");
  3577. set_bit(STATUS_INT_ENABLED, &priv->status);
  3578. iwl4965_write32(priv, CSR_INT_MASK, CSR_INI_SET_MASK);
  3579. }
  3580. static inline void iwl4965_disable_interrupts(struct iwl_priv *priv)
  3581. {
  3582. clear_bit(STATUS_INT_ENABLED, &priv->status);
  3583. /* disable interrupts from uCode/NIC to host */
  3584. iwl4965_write32(priv, CSR_INT_MASK, 0x00000000);
  3585. /* acknowledge/clear/reset any interrupts still pending
  3586. * from uCode or flow handler (Rx/Tx DMA) */
  3587. iwl4965_write32(priv, CSR_INT, 0xffffffff);
  3588. iwl4965_write32(priv, CSR_FH_INT_STATUS, 0xffffffff);
  3589. IWL_DEBUG_ISR("Disabled interrupts\n");
  3590. }
  3591. static const char *desc_lookup(int i)
  3592. {
  3593. switch (i) {
  3594. case 1:
  3595. return "FAIL";
  3596. case 2:
  3597. return "BAD_PARAM";
  3598. case 3:
  3599. return "BAD_CHECKSUM";
  3600. case 4:
  3601. return "NMI_INTERRUPT";
  3602. case 5:
  3603. return "SYSASSERT";
  3604. case 6:
  3605. return "FATAL_ERROR";
  3606. }
  3607. return "UNKNOWN";
  3608. }
  3609. #define ERROR_START_OFFSET (1 * sizeof(u32))
  3610. #define ERROR_ELEM_SIZE (7 * sizeof(u32))
  3611. static void iwl4965_dump_nic_error_log(struct iwl_priv *priv)
  3612. {
  3613. u32 data2, line;
  3614. u32 desc, time, count, base, data1;
  3615. u32 blink1, blink2, ilink1, ilink2;
  3616. int rc;
  3617. base = le32_to_cpu(priv->card_alive.error_event_table_ptr);
  3618. if (!iwl4965_hw_valid_rtc_data_addr(base)) {
  3619. IWL_ERROR("Not valid error log pointer 0x%08X\n", base);
  3620. return;
  3621. }
  3622. rc = iwl4965_grab_nic_access(priv);
  3623. if (rc) {
  3624. IWL_WARNING("Can not read from adapter at this time.\n");
  3625. return;
  3626. }
  3627. count = iwl4965_read_targ_mem(priv, base);
  3628. if (ERROR_START_OFFSET <= count * ERROR_ELEM_SIZE) {
  3629. IWL_ERROR("Start IWL Error Log Dump:\n");
  3630. IWL_ERROR("Status: 0x%08lX, count: %d\n", priv->status, count);
  3631. }
  3632. desc = iwl4965_read_targ_mem(priv, base + 1 * sizeof(u32));
  3633. blink1 = iwl4965_read_targ_mem(priv, base + 3 * sizeof(u32));
  3634. blink2 = iwl4965_read_targ_mem(priv, base + 4 * sizeof(u32));
  3635. ilink1 = iwl4965_read_targ_mem(priv, base + 5 * sizeof(u32));
  3636. ilink2 = iwl4965_read_targ_mem(priv, base + 6 * sizeof(u32));
  3637. data1 = iwl4965_read_targ_mem(priv, base + 7 * sizeof(u32));
  3638. data2 = iwl4965_read_targ_mem(priv, base + 8 * sizeof(u32));
  3639. line = iwl4965_read_targ_mem(priv, base + 9 * sizeof(u32));
  3640. time = iwl4965_read_targ_mem(priv, base + 11 * sizeof(u32));
  3641. IWL_ERROR("Desc Time "
  3642. "data1 data2 line\n");
  3643. IWL_ERROR("%-13s (#%d) %010u 0x%08X 0x%08X %u\n",
  3644. desc_lookup(desc), desc, time, data1, data2, line);
  3645. IWL_ERROR("blink1 blink2 ilink1 ilink2\n");
  3646. IWL_ERROR("0x%05X 0x%05X 0x%05X 0x%05X\n", blink1, blink2,
  3647. ilink1, ilink2);
  3648. iwl4965_release_nic_access(priv);
  3649. }
  3650. #define EVENT_START_OFFSET (4 * sizeof(u32))
  3651. /**
  3652. * iwl4965_print_event_log - Dump error event log to syslog
  3653. *
  3654. * NOTE: Must be called with iwl4965_grab_nic_access() already obtained!
  3655. */
  3656. static void iwl4965_print_event_log(struct iwl_priv *priv, u32 start_idx,
  3657. u32 num_events, u32 mode)
  3658. {
  3659. u32 i;
  3660. u32 base; /* SRAM byte address of event log header */
  3661. u32 event_size; /* 2 u32s, or 3 u32s if timestamp recorded */
  3662. u32 ptr; /* SRAM byte address of log data */
  3663. u32 ev, time, data; /* event log data */
  3664. if (num_events == 0)
  3665. return;
  3666. base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
  3667. if (mode == 0)
  3668. event_size = 2 * sizeof(u32);
  3669. else
  3670. event_size = 3 * sizeof(u32);
  3671. ptr = base + EVENT_START_OFFSET + (start_idx * event_size);
  3672. /* "time" is actually "data" for mode 0 (no timestamp).
  3673. * place event id # at far right for easier visual parsing. */
  3674. for (i = 0; i < num_events; i++) {
  3675. ev = iwl4965_read_targ_mem(priv, ptr);
  3676. ptr += sizeof(u32);
  3677. time = iwl4965_read_targ_mem(priv, ptr);
  3678. ptr += sizeof(u32);
  3679. if (mode == 0)
  3680. IWL_ERROR("0x%08x\t%04u\n", time, ev); /* data, ev */
  3681. else {
  3682. data = iwl4965_read_targ_mem(priv, ptr);
  3683. ptr += sizeof(u32);
  3684. IWL_ERROR("%010u\t0x%08x\t%04u\n", time, data, ev);
  3685. }
  3686. }
  3687. }
  3688. static void iwl4965_dump_nic_event_log(struct iwl_priv *priv)
  3689. {
  3690. int rc;
  3691. u32 base; /* SRAM byte address of event log header */
  3692. u32 capacity; /* event log capacity in # entries */
  3693. u32 mode; /* 0 - no timestamp, 1 - timestamp recorded */
  3694. u32 num_wraps; /* # times uCode wrapped to top of log */
  3695. u32 next_entry; /* index of next entry to be written by uCode */
  3696. u32 size; /* # entries that we'll print */
  3697. base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
  3698. if (!iwl4965_hw_valid_rtc_data_addr(base)) {
  3699. IWL_ERROR("Invalid event log pointer 0x%08X\n", base);
  3700. return;
  3701. }
  3702. rc = iwl4965_grab_nic_access(priv);
  3703. if (rc) {
  3704. IWL_WARNING("Can not read from adapter at this time.\n");
  3705. return;
  3706. }
  3707. /* event log header */
  3708. capacity = iwl4965_read_targ_mem(priv, base);
  3709. mode = iwl4965_read_targ_mem(priv, base + (1 * sizeof(u32)));
  3710. num_wraps = iwl4965_read_targ_mem(priv, base + (2 * sizeof(u32)));
  3711. next_entry = iwl4965_read_targ_mem(priv, base + (3 * sizeof(u32)));
  3712. size = num_wraps ? capacity : next_entry;
  3713. /* bail out if nothing in log */
  3714. if (size == 0) {
  3715. IWL_ERROR("Start IWL Event Log Dump: nothing in log\n");
  3716. iwl4965_release_nic_access(priv);
  3717. return;
  3718. }
  3719. IWL_ERROR("Start IWL Event Log Dump: display count %d, wraps %d\n",
  3720. size, num_wraps);
  3721. /* if uCode has wrapped back to top of log, start at the oldest entry,
  3722. * i.e the next one that uCode would fill. */
  3723. if (num_wraps)
  3724. iwl4965_print_event_log(priv, next_entry,
  3725. capacity - next_entry, mode);
  3726. /* (then/else) start at top of log */
  3727. iwl4965_print_event_log(priv, 0, next_entry, mode);
  3728. iwl4965_release_nic_access(priv);
  3729. }
  3730. /**
  3731. * iwl4965_irq_handle_error - called for HW or SW error interrupt from card
  3732. */
  3733. static void iwl4965_irq_handle_error(struct iwl_priv *priv)
  3734. {
  3735. /* Set the FW error flag -- cleared on iwl4965_down */
  3736. set_bit(STATUS_FW_ERROR, &priv->status);
  3737. /* Cancel currently queued command. */
  3738. clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
  3739. #ifdef CONFIG_IWLWIFI_DEBUG
  3740. if (iwl_debug_level & IWL_DL_FW_ERRORS) {
  3741. iwl4965_dump_nic_error_log(priv);
  3742. iwl4965_dump_nic_event_log(priv);
  3743. iwl4965_print_rx_config_cmd(&priv->staging_rxon);
  3744. }
  3745. #endif
  3746. wake_up_interruptible(&priv->wait_command_queue);
  3747. /* Keep the restart process from trying to send host
  3748. * commands by clearing the INIT status bit */
  3749. clear_bit(STATUS_READY, &priv->status);
  3750. if (!test_bit(STATUS_EXIT_PENDING, &priv->status)) {
  3751. IWL_DEBUG(IWL_DL_INFO | IWL_DL_FW_ERRORS,
  3752. "Restarting adapter due to uCode error.\n");
  3753. if (iwl4965_is_associated(priv)) {
  3754. memcpy(&priv->recovery_rxon, &priv->active_rxon,
  3755. sizeof(priv->recovery_rxon));
  3756. priv->error_recovering = 1;
  3757. }
  3758. queue_work(priv->workqueue, &priv->restart);
  3759. }
  3760. }
  3761. static void iwl4965_error_recovery(struct iwl_priv *priv)
  3762. {
  3763. unsigned long flags;
  3764. memcpy(&priv->staging_rxon, &priv->recovery_rxon,
  3765. sizeof(priv->staging_rxon));
  3766. priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  3767. iwl4965_commit_rxon(priv);
  3768. iwl4965_rxon_add_station(priv, priv->bssid, 1);
  3769. spin_lock_irqsave(&priv->lock, flags);
  3770. priv->assoc_id = le16_to_cpu(priv->staging_rxon.assoc_id);
  3771. priv->error_recovering = 0;
  3772. spin_unlock_irqrestore(&priv->lock, flags);
  3773. }
  3774. static void iwl4965_irq_tasklet(struct iwl_priv *priv)
  3775. {
  3776. u32 inta, handled = 0;
  3777. u32 inta_fh;
  3778. unsigned long flags;
  3779. #ifdef CONFIG_IWLWIFI_DEBUG
  3780. u32 inta_mask;
  3781. #endif
  3782. spin_lock_irqsave(&priv->lock, flags);
  3783. /* Ack/clear/reset pending uCode interrupts.
  3784. * Note: Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS,
  3785. * and will clear only when CSR_FH_INT_STATUS gets cleared. */
  3786. inta = iwl4965_read32(priv, CSR_INT);
  3787. iwl4965_write32(priv, CSR_INT, inta);
  3788. /* Ack/clear/reset pending flow-handler (DMA) interrupts.
  3789. * Any new interrupts that happen after this, either while we're
  3790. * in this tasklet, or later, will show up in next ISR/tasklet. */
  3791. inta_fh = iwl4965_read32(priv, CSR_FH_INT_STATUS);
  3792. iwl4965_write32(priv, CSR_FH_INT_STATUS, inta_fh);
  3793. #ifdef CONFIG_IWLWIFI_DEBUG
  3794. if (iwl_debug_level & IWL_DL_ISR) {
  3795. /* just for debug */
  3796. inta_mask = iwl4965_read32(priv, CSR_INT_MASK);
  3797. IWL_DEBUG_ISR("inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
  3798. inta, inta_mask, inta_fh);
  3799. }
  3800. #endif
  3801. /* Since CSR_INT and CSR_FH_INT_STATUS reads and clears are not
  3802. * atomic, make sure that inta covers all the interrupts that
  3803. * we've discovered, even if FH interrupt came in just after
  3804. * reading CSR_INT. */
  3805. if (inta_fh & CSR49_FH_INT_RX_MASK)
  3806. inta |= CSR_INT_BIT_FH_RX;
  3807. if (inta_fh & CSR49_FH_INT_TX_MASK)
  3808. inta |= CSR_INT_BIT_FH_TX;
  3809. /* Now service all interrupt bits discovered above. */
  3810. if (inta & CSR_INT_BIT_HW_ERR) {
  3811. IWL_ERROR("Microcode HW error detected. Restarting.\n");
  3812. /* Tell the device to stop sending interrupts */
  3813. iwl4965_disable_interrupts(priv);
  3814. iwl4965_irq_handle_error(priv);
  3815. handled |= CSR_INT_BIT_HW_ERR;
  3816. spin_unlock_irqrestore(&priv->lock, flags);
  3817. return;
  3818. }
  3819. #ifdef CONFIG_IWLWIFI_DEBUG
  3820. if (iwl_debug_level & (IWL_DL_ISR)) {
  3821. /* NIC fires this, but we don't use it, redundant with WAKEUP */
  3822. if (inta & CSR_INT_BIT_SCD)
  3823. IWL_DEBUG_ISR("Scheduler finished to transmit "
  3824. "the frame/frames.\n");
  3825. /* Alive notification via Rx interrupt will do the real work */
  3826. if (inta & CSR_INT_BIT_ALIVE)
  3827. IWL_DEBUG_ISR("Alive interrupt\n");
  3828. }
  3829. #endif
  3830. /* Safely ignore these bits for debug checks below */
  3831. inta &= ~(CSR_INT_BIT_SCD | CSR_INT_BIT_ALIVE);
  3832. /* HW RF KILL switch toggled */
  3833. if (inta & CSR_INT_BIT_RF_KILL) {
  3834. int hw_rf_kill = 0;
  3835. if (!(iwl4965_read32(priv, CSR_GP_CNTRL) &
  3836. CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW))
  3837. hw_rf_kill = 1;
  3838. IWL_DEBUG(IWL_DL_INFO | IWL_DL_RF_KILL | IWL_DL_ISR,
  3839. "RF_KILL bit toggled to %s.\n",
  3840. hw_rf_kill ? "disable radio":"enable radio");
  3841. /* Queue restart only if RF_KILL switch was set to "kill"
  3842. * when we loaded driver, and is now set to "enable".
  3843. * After we're Alive, RF_KILL gets handled by
  3844. * iwl4965_rx_card_state_notif() */
  3845. if (!hw_rf_kill && !test_bit(STATUS_ALIVE, &priv->status)) {
  3846. clear_bit(STATUS_RF_KILL_HW, &priv->status);
  3847. queue_work(priv->workqueue, &priv->restart);
  3848. }
  3849. handled |= CSR_INT_BIT_RF_KILL;
  3850. }
  3851. /* Chip got too hot and stopped itself */
  3852. if (inta & CSR_INT_BIT_CT_KILL) {
  3853. IWL_ERROR("Microcode CT kill error detected.\n");
  3854. handled |= CSR_INT_BIT_CT_KILL;
  3855. }
  3856. /* Error detected by uCode */
  3857. if (inta & CSR_INT_BIT_SW_ERR) {
  3858. IWL_ERROR("Microcode SW error detected. Restarting 0x%X.\n",
  3859. inta);
  3860. iwl4965_irq_handle_error(priv);
  3861. handled |= CSR_INT_BIT_SW_ERR;
  3862. }
  3863. /* uCode wakes up after power-down sleep */
  3864. if (inta & CSR_INT_BIT_WAKEUP) {
  3865. IWL_DEBUG_ISR("Wakeup interrupt\n");
  3866. iwl4965_rx_queue_update_write_ptr(priv, &priv->rxq);
  3867. iwl4965_tx_queue_update_write_ptr(priv, &priv->txq[0]);
  3868. iwl4965_tx_queue_update_write_ptr(priv, &priv->txq[1]);
  3869. iwl4965_tx_queue_update_write_ptr(priv, &priv->txq[2]);
  3870. iwl4965_tx_queue_update_write_ptr(priv, &priv->txq[3]);
  3871. iwl4965_tx_queue_update_write_ptr(priv, &priv->txq[4]);
  3872. iwl4965_tx_queue_update_write_ptr(priv, &priv->txq[5]);
  3873. handled |= CSR_INT_BIT_WAKEUP;
  3874. }
  3875. /* All uCode command responses, including Tx command responses,
  3876. * Rx "responses" (frame-received notification), and other
  3877. * notifications from uCode come through here*/
  3878. if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) {
  3879. iwl4965_rx_handle(priv);
  3880. handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX);
  3881. }
  3882. if (inta & CSR_INT_BIT_FH_TX) {
  3883. IWL_DEBUG_ISR("Tx interrupt\n");
  3884. handled |= CSR_INT_BIT_FH_TX;
  3885. }
  3886. if (inta & ~handled)
  3887. IWL_ERROR("Unhandled INTA bits 0x%08x\n", inta & ~handled);
  3888. if (inta & ~CSR_INI_SET_MASK) {
  3889. IWL_WARNING("Disabled INTA bits 0x%08x were pending\n",
  3890. inta & ~CSR_INI_SET_MASK);
  3891. IWL_WARNING(" with FH_INT = 0x%08x\n", inta_fh);
  3892. }
  3893. /* Re-enable all interrupts */
  3894. iwl4965_enable_interrupts(priv);
  3895. #ifdef CONFIG_IWLWIFI_DEBUG
  3896. if (iwl_debug_level & (IWL_DL_ISR)) {
  3897. inta = iwl4965_read32(priv, CSR_INT);
  3898. inta_mask = iwl4965_read32(priv, CSR_INT_MASK);
  3899. inta_fh = iwl4965_read32(priv, CSR_FH_INT_STATUS);
  3900. IWL_DEBUG_ISR("End inta 0x%08x, enabled 0x%08x, fh 0x%08x, "
  3901. "flags 0x%08lx\n", inta, inta_mask, inta_fh, flags);
  3902. }
  3903. #endif
  3904. spin_unlock_irqrestore(&priv->lock, flags);
  3905. }
  3906. static irqreturn_t iwl4965_isr(int irq, void *data)
  3907. {
  3908. struct iwl_priv *priv = data;
  3909. u32 inta, inta_mask;
  3910. u32 inta_fh;
  3911. if (!priv)
  3912. return IRQ_NONE;
  3913. spin_lock(&priv->lock);
  3914. /* Disable (but don't clear!) interrupts here to avoid
  3915. * back-to-back ISRs and sporadic interrupts from our NIC.
  3916. * If we have something to service, the tasklet will re-enable ints.
  3917. * If we *don't* have something, we'll re-enable before leaving here. */
  3918. inta_mask = iwl4965_read32(priv, CSR_INT_MASK); /* just for debug */
  3919. iwl4965_write32(priv, CSR_INT_MASK, 0x00000000);
  3920. /* Discover which interrupts are active/pending */
  3921. inta = iwl4965_read32(priv, CSR_INT);
  3922. inta_fh = iwl4965_read32(priv, CSR_FH_INT_STATUS);
  3923. /* Ignore interrupt if there's nothing in NIC to service.
  3924. * This may be due to IRQ shared with another device,
  3925. * or due to sporadic interrupts thrown from our NIC. */
  3926. if (!inta && !inta_fh) {
  3927. IWL_DEBUG_ISR("Ignore interrupt, inta == 0, inta_fh == 0\n");
  3928. goto none;
  3929. }
  3930. if ((inta == 0xFFFFFFFF) || ((inta & 0xFFFFFFF0) == 0xa5a5a5a0)) {
  3931. /* Hardware disappeared. It might have already raised
  3932. * an interrupt */
  3933. IWL_WARNING("HARDWARE GONE?? INTA == 0x%080x\n", inta);
  3934. goto unplugged;
  3935. }
  3936. IWL_DEBUG_ISR("ISR inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
  3937. inta, inta_mask, inta_fh);
  3938. inta &= ~CSR_INT_BIT_SCD;
  3939. /* iwl4965_irq_tasklet() will service interrupts and re-enable them */
  3940. if (likely(inta || inta_fh))
  3941. tasklet_schedule(&priv->irq_tasklet);
  3942. unplugged:
  3943. spin_unlock(&priv->lock);
  3944. return IRQ_HANDLED;
  3945. none:
  3946. /* re-enable interrupts here since we don't have anything to service. */
  3947. iwl4965_enable_interrupts(priv);
  3948. spin_unlock(&priv->lock);
  3949. return IRQ_NONE;
  3950. }
  3951. /* For active scan, listen ACTIVE_DWELL_TIME (msec) on each channel after
  3952. * sending probe req. This should be set long enough to hear probe responses
  3953. * from more than one AP. */
  3954. #define IWL_ACTIVE_DWELL_TIME_24 (20) /* all times in msec */
  3955. #define IWL_ACTIVE_DWELL_TIME_52 (10)
  3956. /* For faster active scanning, scan will move to the next channel if fewer than
  3957. * PLCP_QUIET_THRESH packets are heard on this channel within
  3958. * ACTIVE_QUIET_TIME after sending probe request. This shortens the dwell
  3959. * time if it's a quiet channel (nothing responded to our probe, and there's
  3960. * no other traffic).
  3961. * Disable "quiet" feature by setting PLCP_QUIET_THRESH to 0. */
  3962. #define IWL_PLCP_QUIET_THRESH __constant_cpu_to_le16(1) /* packets */
  3963. #define IWL_ACTIVE_QUIET_TIME __constant_cpu_to_le16(5) /* msec */
  3964. /* For passive scan, listen PASSIVE_DWELL_TIME (msec) on each channel.
  3965. * Must be set longer than active dwell time.
  3966. * For the most reliable scan, set > AP beacon interval (typically 100msec). */
  3967. #define IWL_PASSIVE_DWELL_TIME_24 (20) /* all times in msec */
  3968. #define IWL_PASSIVE_DWELL_TIME_52 (10)
  3969. #define IWL_PASSIVE_DWELL_BASE (100)
  3970. #define IWL_CHANNEL_TUNE_TIME 5
  3971. static inline u16 iwl4965_get_active_dwell_time(struct iwl_priv *priv,
  3972. enum ieee80211_band band)
  3973. {
  3974. if (band == IEEE80211_BAND_5GHZ)
  3975. return IWL_ACTIVE_DWELL_TIME_52;
  3976. else
  3977. return IWL_ACTIVE_DWELL_TIME_24;
  3978. }
  3979. static u16 iwl4965_get_passive_dwell_time(struct iwl_priv *priv,
  3980. enum ieee80211_band band)
  3981. {
  3982. u16 active = iwl4965_get_active_dwell_time(priv, band);
  3983. u16 passive = (band != IEEE80211_BAND_5GHZ) ?
  3984. IWL_PASSIVE_DWELL_BASE + IWL_PASSIVE_DWELL_TIME_24 :
  3985. IWL_PASSIVE_DWELL_BASE + IWL_PASSIVE_DWELL_TIME_52;
  3986. if (iwl4965_is_associated(priv)) {
  3987. /* If we're associated, we clamp the maximum passive
  3988. * dwell time to be 98% of the beacon interval (minus
  3989. * 2 * channel tune time) */
  3990. passive = priv->beacon_int;
  3991. if ((passive > IWL_PASSIVE_DWELL_BASE) || !passive)
  3992. passive = IWL_PASSIVE_DWELL_BASE;
  3993. passive = (passive * 98) / 100 - IWL_CHANNEL_TUNE_TIME * 2;
  3994. }
  3995. if (passive <= active)
  3996. passive = active + 1;
  3997. return passive;
  3998. }
  3999. static int iwl4965_get_channels_for_scan(struct iwl_priv *priv,
  4000. enum ieee80211_band band,
  4001. u8 is_active, u8 direct_mask,
  4002. struct iwl4965_scan_channel *scan_ch)
  4003. {
  4004. const struct ieee80211_channel *channels = NULL;
  4005. const struct ieee80211_supported_band *sband;
  4006. const struct iwl_channel_info *ch_info;
  4007. u16 passive_dwell = 0;
  4008. u16 active_dwell = 0;
  4009. int added, i;
  4010. sband = iwl4965_get_hw_mode(priv, band);
  4011. if (!sband)
  4012. return 0;
  4013. channels = sband->channels;
  4014. active_dwell = iwl4965_get_active_dwell_time(priv, band);
  4015. passive_dwell = iwl4965_get_passive_dwell_time(priv, band);
  4016. for (i = 0, added = 0; i < sband->n_channels; i++) {
  4017. if (ieee80211_frequency_to_channel(channels[i].center_freq) ==
  4018. le16_to_cpu(priv->active_rxon.channel)) {
  4019. if (iwl4965_is_associated(priv)) {
  4020. IWL_DEBUG_SCAN
  4021. ("Skipping current channel %d\n",
  4022. le16_to_cpu(priv->active_rxon.channel));
  4023. continue;
  4024. }
  4025. } else if (priv->only_active_channel)
  4026. continue;
  4027. scan_ch->channel = ieee80211_frequency_to_channel(channels[i].center_freq);
  4028. ch_info = iwl_get_channel_info(priv, band,
  4029. scan_ch->channel);
  4030. if (!is_channel_valid(ch_info)) {
  4031. IWL_DEBUG_SCAN("Channel %d is INVALID for this SKU.\n",
  4032. scan_ch->channel);
  4033. continue;
  4034. }
  4035. if (!is_active || is_channel_passive(ch_info) ||
  4036. (channels[i].flags & IEEE80211_CHAN_PASSIVE_SCAN))
  4037. scan_ch->type = 0; /* passive */
  4038. else
  4039. scan_ch->type = 1; /* active */
  4040. if (scan_ch->type & 1)
  4041. scan_ch->type |= (direct_mask << 1);
  4042. if (is_channel_narrow(ch_info))
  4043. scan_ch->type |= (1 << 7);
  4044. scan_ch->active_dwell = cpu_to_le16(active_dwell);
  4045. scan_ch->passive_dwell = cpu_to_le16(passive_dwell);
  4046. /* Set txpower levels to defaults */
  4047. scan_ch->tpc.dsp_atten = 110;
  4048. /* scan_pwr_info->tpc.dsp_atten; */
  4049. /*scan_pwr_info->tpc.tx_gain; */
  4050. if (band == IEEE80211_BAND_5GHZ)
  4051. scan_ch->tpc.tx_gain = ((1 << 5) | (3 << 3)) | 3;
  4052. else {
  4053. scan_ch->tpc.tx_gain = ((1 << 5) | (5 << 3));
  4054. /* NOTE: if we were doing 6Mb OFDM for scans we'd use
  4055. * power level:
  4056. * scan_ch->tpc.tx_gain = ((1 << 5) | (2 << 3)) | 3;
  4057. */
  4058. }
  4059. IWL_DEBUG_SCAN("Scanning %d [%s %d]\n",
  4060. scan_ch->channel,
  4061. (scan_ch->type & 1) ? "ACTIVE" : "PASSIVE",
  4062. (scan_ch->type & 1) ?
  4063. active_dwell : passive_dwell);
  4064. scan_ch++;
  4065. added++;
  4066. }
  4067. IWL_DEBUG_SCAN("total channels to scan %d \n", added);
  4068. return added;
  4069. }
  4070. static void iwl4965_init_hw_rates(struct iwl_priv *priv,
  4071. struct ieee80211_rate *rates)
  4072. {
  4073. int i;
  4074. for (i = 0; i < IWL_RATE_COUNT; i++) {
  4075. rates[i].bitrate = iwl4965_rates[i].ieee * 5;
  4076. rates[i].hw_value = i; /* Rate scaling will work on indexes */
  4077. rates[i].hw_value_short = i;
  4078. rates[i].flags = 0;
  4079. if ((i > IWL_LAST_OFDM_RATE) || (i < IWL_FIRST_OFDM_RATE)) {
  4080. /*
  4081. * If CCK != 1M then set short preamble rate flag.
  4082. */
  4083. rates[i].flags |=
  4084. (iwl4965_rates[i].plcp == IWL_RATE_1M_PLCP) ?
  4085. 0 : IEEE80211_RATE_SHORT_PREAMBLE;
  4086. }
  4087. }
  4088. }
  4089. /**
  4090. * iwl4965_init_geos - Initialize mac80211's geo/channel info based from eeprom
  4091. */
  4092. int iwl4965_init_geos(struct iwl_priv *priv)
  4093. {
  4094. struct iwl_channel_info *ch;
  4095. struct ieee80211_supported_band *sband;
  4096. struct ieee80211_channel *channels;
  4097. struct ieee80211_channel *geo_ch;
  4098. struct ieee80211_rate *rates;
  4099. int i = 0;
  4100. if (priv->bands[IEEE80211_BAND_2GHZ].n_bitrates ||
  4101. priv->bands[IEEE80211_BAND_5GHZ].n_bitrates) {
  4102. IWL_DEBUG_INFO("Geography modes already initialized.\n");
  4103. set_bit(STATUS_GEO_CONFIGURED, &priv->status);
  4104. return 0;
  4105. }
  4106. channels = kzalloc(sizeof(struct ieee80211_channel) *
  4107. priv->channel_count, GFP_KERNEL);
  4108. if (!channels)
  4109. return -ENOMEM;
  4110. rates = kzalloc((sizeof(struct ieee80211_rate) * (IWL_RATE_COUNT + 1)),
  4111. GFP_KERNEL);
  4112. if (!rates) {
  4113. kfree(channels);
  4114. return -ENOMEM;
  4115. }
  4116. /* 5.2GHz channels start after the 2.4GHz channels */
  4117. sband = &priv->bands[IEEE80211_BAND_5GHZ];
  4118. sband->channels = &channels[ARRAY_SIZE(iwl_eeprom_band_1)];
  4119. /* just OFDM */
  4120. sband->bitrates = &rates[IWL_FIRST_OFDM_RATE];
  4121. sband->n_bitrates = IWL_RATE_COUNT - IWL_FIRST_OFDM_RATE;
  4122. iwl4965_init_ht_hw_capab(priv, &sband->ht_info, IEEE80211_BAND_5GHZ);
  4123. sband = &priv->bands[IEEE80211_BAND_2GHZ];
  4124. sband->channels = channels;
  4125. /* OFDM & CCK */
  4126. sband->bitrates = rates;
  4127. sband->n_bitrates = IWL_RATE_COUNT;
  4128. iwl4965_init_ht_hw_capab(priv, &sband->ht_info, IEEE80211_BAND_2GHZ);
  4129. priv->ieee_channels = channels;
  4130. priv->ieee_rates = rates;
  4131. iwl4965_init_hw_rates(priv, rates);
  4132. for (i = 0; i < priv->channel_count; i++) {
  4133. ch = &priv->channel_info[i];
  4134. /* FIXME: might be removed if scan is OK */
  4135. if (!is_channel_valid(ch))
  4136. continue;
  4137. if (is_channel_a_band(ch))
  4138. sband = &priv->bands[IEEE80211_BAND_5GHZ];
  4139. else
  4140. sband = &priv->bands[IEEE80211_BAND_2GHZ];
  4141. geo_ch = &sband->channels[sband->n_channels++];
  4142. geo_ch->center_freq = ieee80211_channel_to_frequency(ch->channel);
  4143. geo_ch->max_power = ch->max_power_avg;
  4144. geo_ch->max_antenna_gain = 0xff;
  4145. geo_ch->hw_value = ch->channel;
  4146. if (is_channel_valid(ch)) {
  4147. if (!(ch->flags & EEPROM_CHANNEL_IBSS))
  4148. geo_ch->flags |= IEEE80211_CHAN_NO_IBSS;
  4149. if (!(ch->flags & EEPROM_CHANNEL_ACTIVE))
  4150. geo_ch->flags |= IEEE80211_CHAN_PASSIVE_SCAN;
  4151. if (ch->flags & EEPROM_CHANNEL_RADAR)
  4152. geo_ch->flags |= IEEE80211_CHAN_RADAR;
  4153. if (ch->max_power_avg > priv->max_channel_txpower_limit)
  4154. priv->max_channel_txpower_limit =
  4155. ch->max_power_avg;
  4156. } else {
  4157. geo_ch->flags |= IEEE80211_CHAN_DISABLED;
  4158. }
  4159. /* Save flags for reg domain usage */
  4160. geo_ch->orig_flags = geo_ch->flags;
  4161. IWL_DEBUG_INFO("Channel %d Freq=%d[%sGHz] %s flag=0%X\n",
  4162. ch->channel, geo_ch->center_freq,
  4163. is_channel_a_band(ch) ? "5.2" : "2.4",
  4164. geo_ch->flags & IEEE80211_CHAN_DISABLED ?
  4165. "restricted" : "valid",
  4166. geo_ch->flags);
  4167. }
  4168. if ((priv->bands[IEEE80211_BAND_5GHZ].n_channels == 0) &&
  4169. priv->cfg->sku & IWL_SKU_A) {
  4170. printk(KERN_INFO DRV_NAME
  4171. ": Incorrectly detected BG card as ABG. Please send "
  4172. "your PCI ID 0x%04X:0x%04X to maintainer.\n",
  4173. priv->pci_dev->device, priv->pci_dev->subsystem_device);
  4174. priv->cfg->sku &= ~IWL_SKU_A;
  4175. }
  4176. printk(KERN_INFO DRV_NAME
  4177. ": Tunable channels: %d 802.11bg, %d 802.11a channels\n",
  4178. priv->bands[IEEE80211_BAND_2GHZ].n_channels,
  4179. priv->bands[IEEE80211_BAND_5GHZ].n_channels);
  4180. priv->hw->wiphy->bands[IEEE80211_BAND_2GHZ] = &priv->bands[IEEE80211_BAND_2GHZ];
  4181. priv->hw->wiphy->bands[IEEE80211_BAND_5GHZ] = &priv->bands[IEEE80211_BAND_5GHZ];
  4182. set_bit(STATUS_GEO_CONFIGURED, &priv->status);
  4183. return 0;
  4184. }
  4185. /*
  4186. * iwl4965_free_geos - undo allocations in iwl4965_init_geos
  4187. */
  4188. void iwl4965_free_geos(struct iwl_priv *priv)
  4189. {
  4190. kfree(priv->ieee_channels);
  4191. kfree(priv->ieee_rates);
  4192. clear_bit(STATUS_GEO_CONFIGURED, &priv->status);
  4193. }
  4194. /******************************************************************************
  4195. *
  4196. * uCode download functions
  4197. *
  4198. ******************************************************************************/
  4199. static void iwl4965_dealloc_ucode_pci(struct iwl_priv *priv)
  4200. {
  4201. iwl_free_fw_desc(priv->pci_dev, &priv->ucode_code);
  4202. iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data);
  4203. iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
  4204. iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init);
  4205. iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init_data);
  4206. iwl_free_fw_desc(priv->pci_dev, &priv->ucode_boot);
  4207. }
  4208. /**
  4209. * iwl4965_verify_inst_full - verify runtime uCode image in card vs. host,
  4210. * looking at all data.
  4211. */
  4212. static int iwl4965_verify_inst_full(struct iwl_priv *priv, __le32 *image,
  4213. u32 len)
  4214. {
  4215. u32 val;
  4216. u32 save_len = len;
  4217. int rc = 0;
  4218. u32 errcnt;
  4219. IWL_DEBUG_INFO("ucode inst image size is %u\n", len);
  4220. rc = iwl4965_grab_nic_access(priv);
  4221. if (rc)
  4222. return rc;
  4223. iwl4965_write_direct32(priv, HBUS_TARG_MEM_RADDR, RTC_INST_LOWER_BOUND);
  4224. errcnt = 0;
  4225. for (; len > 0; len -= sizeof(u32), image++) {
  4226. /* read data comes through single port, auto-incr addr */
  4227. /* NOTE: Use the debugless read so we don't flood kernel log
  4228. * if IWL_DL_IO is set */
  4229. val = _iwl4965_read_direct32(priv, HBUS_TARG_MEM_RDAT);
  4230. if (val != le32_to_cpu(*image)) {
  4231. IWL_ERROR("uCode INST section is invalid at "
  4232. "offset 0x%x, is 0x%x, s/b 0x%x\n",
  4233. save_len - len, val, le32_to_cpu(*image));
  4234. rc = -EIO;
  4235. errcnt++;
  4236. if (errcnt >= 20)
  4237. break;
  4238. }
  4239. }
  4240. iwl4965_release_nic_access(priv);
  4241. if (!errcnt)
  4242. IWL_DEBUG_INFO
  4243. ("ucode image in INSTRUCTION memory is good\n");
  4244. return rc;
  4245. }
  4246. /**
  4247. * iwl4965_verify_inst_sparse - verify runtime uCode image in card vs. host,
  4248. * using sample data 100 bytes apart. If these sample points are good,
  4249. * it's a pretty good bet that everything between them is good, too.
  4250. */
  4251. static int iwl4965_verify_inst_sparse(struct iwl_priv *priv, __le32 *image, u32 len)
  4252. {
  4253. u32 val;
  4254. int rc = 0;
  4255. u32 errcnt = 0;
  4256. u32 i;
  4257. IWL_DEBUG_INFO("ucode inst image size is %u\n", len);
  4258. rc = iwl4965_grab_nic_access(priv);
  4259. if (rc)
  4260. return rc;
  4261. for (i = 0; i < len; i += 100, image += 100/sizeof(u32)) {
  4262. /* read data comes through single port, auto-incr addr */
  4263. /* NOTE: Use the debugless read so we don't flood kernel log
  4264. * if IWL_DL_IO is set */
  4265. iwl4965_write_direct32(priv, HBUS_TARG_MEM_RADDR,
  4266. i + RTC_INST_LOWER_BOUND);
  4267. val = _iwl4965_read_direct32(priv, HBUS_TARG_MEM_RDAT);
  4268. if (val != le32_to_cpu(*image)) {
  4269. #if 0 /* Enable this if you want to see details */
  4270. IWL_ERROR("uCode INST section is invalid at "
  4271. "offset 0x%x, is 0x%x, s/b 0x%x\n",
  4272. i, val, *image);
  4273. #endif
  4274. rc = -EIO;
  4275. errcnt++;
  4276. if (errcnt >= 3)
  4277. break;
  4278. }
  4279. }
  4280. iwl4965_release_nic_access(priv);
  4281. return rc;
  4282. }
  4283. /**
  4284. * iwl4965_verify_ucode - determine which instruction image is in SRAM,
  4285. * and verify its contents
  4286. */
  4287. static int iwl4965_verify_ucode(struct iwl_priv *priv)
  4288. {
  4289. __le32 *image;
  4290. u32 len;
  4291. int rc = 0;
  4292. /* Try bootstrap */
  4293. image = (__le32 *)priv->ucode_boot.v_addr;
  4294. len = priv->ucode_boot.len;
  4295. rc = iwl4965_verify_inst_sparse(priv, image, len);
  4296. if (rc == 0) {
  4297. IWL_DEBUG_INFO("Bootstrap uCode is good in inst SRAM\n");
  4298. return 0;
  4299. }
  4300. /* Try initialize */
  4301. image = (__le32 *)priv->ucode_init.v_addr;
  4302. len = priv->ucode_init.len;
  4303. rc = iwl4965_verify_inst_sparse(priv, image, len);
  4304. if (rc == 0) {
  4305. IWL_DEBUG_INFO("Initialize uCode is good in inst SRAM\n");
  4306. return 0;
  4307. }
  4308. /* Try runtime/protocol */
  4309. image = (__le32 *)priv->ucode_code.v_addr;
  4310. len = priv->ucode_code.len;
  4311. rc = iwl4965_verify_inst_sparse(priv, image, len);
  4312. if (rc == 0) {
  4313. IWL_DEBUG_INFO("Runtime uCode is good in inst SRAM\n");
  4314. return 0;
  4315. }
  4316. IWL_ERROR("NO VALID UCODE IMAGE IN INSTRUCTION SRAM!!\n");
  4317. /* Since nothing seems to match, show first several data entries in
  4318. * instruction SRAM, so maybe visual inspection will give a clue.
  4319. * Selection of bootstrap image (vs. other images) is arbitrary. */
  4320. image = (__le32 *)priv->ucode_boot.v_addr;
  4321. len = priv->ucode_boot.len;
  4322. rc = iwl4965_verify_inst_full(priv, image, len);
  4323. return rc;
  4324. }
  4325. /* check contents of special bootstrap uCode SRAM */
  4326. static int iwl4965_verify_bsm(struct iwl_priv *priv)
  4327. {
  4328. __le32 *image = priv->ucode_boot.v_addr;
  4329. u32 len = priv->ucode_boot.len;
  4330. u32 reg;
  4331. u32 val;
  4332. IWL_DEBUG_INFO("Begin verify bsm\n");
  4333. /* verify BSM SRAM contents */
  4334. val = iwl4965_read_prph(priv, BSM_WR_DWCOUNT_REG);
  4335. for (reg = BSM_SRAM_LOWER_BOUND;
  4336. reg < BSM_SRAM_LOWER_BOUND + len;
  4337. reg += sizeof(u32), image ++) {
  4338. val = iwl4965_read_prph(priv, reg);
  4339. if (val != le32_to_cpu(*image)) {
  4340. IWL_ERROR("BSM uCode verification failed at "
  4341. "addr 0x%08X+%u (of %u), is 0x%x, s/b 0x%x\n",
  4342. BSM_SRAM_LOWER_BOUND,
  4343. reg - BSM_SRAM_LOWER_BOUND, len,
  4344. val, le32_to_cpu(*image));
  4345. return -EIO;
  4346. }
  4347. }
  4348. IWL_DEBUG_INFO("BSM bootstrap uCode image OK\n");
  4349. return 0;
  4350. }
  4351. /**
  4352. * iwl4965_load_bsm - Load bootstrap instructions
  4353. *
  4354. * BSM operation:
  4355. *
  4356. * The Bootstrap State Machine (BSM) stores a short bootstrap uCode program
  4357. * in special SRAM that does not power down during RFKILL. When powering back
  4358. * up after power-saving sleeps (or during initial uCode load), the BSM loads
  4359. * the bootstrap program into the on-board processor, and starts it.
  4360. *
  4361. * The bootstrap program loads (via DMA) instructions and data for a new
  4362. * program from host DRAM locations indicated by the host driver in the
  4363. * BSM_DRAM_* registers. Once the new program is loaded, it starts
  4364. * automatically.
  4365. *
  4366. * When initializing the NIC, the host driver points the BSM to the
  4367. * "initialize" uCode image. This uCode sets up some internal data, then
  4368. * notifies host via "initialize alive" that it is complete.
  4369. *
  4370. * The host then replaces the BSM_DRAM_* pointer values to point to the
  4371. * normal runtime uCode instructions and a backup uCode data cache buffer
  4372. * (filled initially with starting data values for the on-board processor),
  4373. * then triggers the "initialize" uCode to load and launch the runtime uCode,
  4374. * which begins normal operation.
  4375. *
  4376. * When doing a power-save shutdown, runtime uCode saves data SRAM into
  4377. * the backup data cache in DRAM before SRAM is powered down.
  4378. *
  4379. * When powering back up, the BSM loads the bootstrap program. This reloads
  4380. * the runtime uCode instructions and the backup data cache into SRAM,
  4381. * and re-launches the runtime uCode from where it left off.
  4382. */
  4383. static int iwl4965_load_bsm(struct iwl_priv *priv)
  4384. {
  4385. __le32 *image = priv->ucode_boot.v_addr;
  4386. u32 len = priv->ucode_boot.len;
  4387. dma_addr_t pinst;
  4388. dma_addr_t pdata;
  4389. u32 inst_len;
  4390. u32 data_len;
  4391. int rc;
  4392. int i;
  4393. u32 done;
  4394. u32 reg_offset;
  4395. IWL_DEBUG_INFO("Begin load bsm\n");
  4396. /* make sure bootstrap program is no larger than BSM's SRAM size */
  4397. if (len > IWL_MAX_BSM_SIZE)
  4398. return -EINVAL;
  4399. /* Tell bootstrap uCode where to find the "Initialize" uCode
  4400. * in host DRAM ... host DRAM physical address bits 35:4 for 4965.
  4401. * NOTE: iwl4965_initialize_alive_start() will replace these values,
  4402. * after the "initialize" uCode has run, to point to
  4403. * runtime/protocol instructions and backup data cache. */
  4404. pinst = priv->ucode_init.p_addr >> 4;
  4405. pdata = priv->ucode_init_data.p_addr >> 4;
  4406. inst_len = priv->ucode_init.len;
  4407. data_len = priv->ucode_init_data.len;
  4408. rc = iwl4965_grab_nic_access(priv);
  4409. if (rc)
  4410. return rc;
  4411. iwl4965_write_prph(priv, BSM_DRAM_INST_PTR_REG, pinst);
  4412. iwl4965_write_prph(priv, BSM_DRAM_DATA_PTR_REG, pdata);
  4413. iwl4965_write_prph(priv, BSM_DRAM_INST_BYTECOUNT_REG, inst_len);
  4414. iwl4965_write_prph(priv, BSM_DRAM_DATA_BYTECOUNT_REG, data_len);
  4415. /* Fill BSM memory with bootstrap instructions */
  4416. for (reg_offset = BSM_SRAM_LOWER_BOUND;
  4417. reg_offset < BSM_SRAM_LOWER_BOUND + len;
  4418. reg_offset += sizeof(u32), image++)
  4419. _iwl4965_write_prph(priv, reg_offset,
  4420. le32_to_cpu(*image));
  4421. rc = iwl4965_verify_bsm(priv);
  4422. if (rc) {
  4423. iwl4965_release_nic_access(priv);
  4424. return rc;
  4425. }
  4426. /* Tell BSM to copy from BSM SRAM into instruction SRAM, when asked */
  4427. iwl4965_write_prph(priv, BSM_WR_MEM_SRC_REG, 0x0);
  4428. iwl4965_write_prph(priv, BSM_WR_MEM_DST_REG,
  4429. RTC_INST_LOWER_BOUND);
  4430. iwl4965_write_prph(priv, BSM_WR_DWCOUNT_REG, len / sizeof(u32));
  4431. /* Load bootstrap code into instruction SRAM now,
  4432. * to prepare to load "initialize" uCode */
  4433. iwl4965_write_prph(priv, BSM_WR_CTRL_REG,
  4434. BSM_WR_CTRL_REG_BIT_START);
  4435. /* Wait for load of bootstrap uCode to finish */
  4436. for (i = 0; i < 100; i++) {
  4437. done = iwl4965_read_prph(priv, BSM_WR_CTRL_REG);
  4438. if (!(done & BSM_WR_CTRL_REG_BIT_START))
  4439. break;
  4440. udelay(10);
  4441. }
  4442. if (i < 100)
  4443. IWL_DEBUG_INFO("BSM write complete, poll %d iterations\n", i);
  4444. else {
  4445. IWL_ERROR("BSM write did not complete!\n");
  4446. return -EIO;
  4447. }
  4448. /* Enable future boot loads whenever power management unit triggers it
  4449. * (e.g. when powering back up after power-save shutdown) */
  4450. iwl4965_write_prph(priv, BSM_WR_CTRL_REG,
  4451. BSM_WR_CTRL_REG_BIT_START_EN);
  4452. iwl4965_release_nic_access(priv);
  4453. return 0;
  4454. }
  4455. static void iwl4965_nic_start(struct iwl_priv *priv)
  4456. {
  4457. /* Remove all resets to allow NIC to operate */
  4458. iwl4965_write32(priv, CSR_RESET, 0);
  4459. }
  4460. /**
  4461. * iwl4965_read_ucode - Read uCode images from disk file.
  4462. *
  4463. * Copy into buffers for card to fetch via bus-mastering
  4464. */
  4465. static int iwl4965_read_ucode(struct iwl_priv *priv)
  4466. {
  4467. struct iwl4965_ucode *ucode;
  4468. int ret;
  4469. const struct firmware *ucode_raw;
  4470. const char *name = priv->cfg->fw_name;
  4471. u8 *src;
  4472. size_t len;
  4473. u32 ver, inst_size, data_size, init_size, init_data_size, boot_size;
  4474. /* Ask kernel firmware_class module to get the boot firmware off disk.
  4475. * request_firmware() is synchronous, file is in memory on return. */
  4476. ret = request_firmware(&ucode_raw, name, &priv->pci_dev->dev);
  4477. if (ret < 0) {
  4478. IWL_ERROR("%s firmware file req failed: Reason %d\n",
  4479. name, ret);
  4480. goto error;
  4481. }
  4482. IWL_DEBUG_INFO("Got firmware '%s' file (%zd bytes) from disk\n",
  4483. name, ucode_raw->size);
  4484. /* Make sure that we got at least our header! */
  4485. if (ucode_raw->size < sizeof(*ucode)) {
  4486. IWL_ERROR("File size way too small!\n");
  4487. ret = -EINVAL;
  4488. goto err_release;
  4489. }
  4490. /* Data from ucode file: header followed by uCode images */
  4491. ucode = (void *)ucode_raw->data;
  4492. ver = le32_to_cpu(ucode->ver);
  4493. inst_size = le32_to_cpu(ucode->inst_size);
  4494. data_size = le32_to_cpu(ucode->data_size);
  4495. init_size = le32_to_cpu(ucode->init_size);
  4496. init_data_size = le32_to_cpu(ucode->init_data_size);
  4497. boot_size = le32_to_cpu(ucode->boot_size);
  4498. IWL_DEBUG_INFO("f/w package hdr ucode version = 0x%x\n", ver);
  4499. IWL_DEBUG_INFO("f/w package hdr runtime inst size = %u\n",
  4500. inst_size);
  4501. IWL_DEBUG_INFO("f/w package hdr runtime data size = %u\n",
  4502. data_size);
  4503. IWL_DEBUG_INFO("f/w package hdr init inst size = %u\n",
  4504. init_size);
  4505. IWL_DEBUG_INFO("f/w package hdr init data size = %u\n",
  4506. init_data_size);
  4507. IWL_DEBUG_INFO("f/w package hdr boot inst size = %u\n",
  4508. boot_size);
  4509. /* Verify size of file vs. image size info in file's header */
  4510. if (ucode_raw->size < sizeof(*ucode) +
  4511. inst_size + data_size + init_size +
  4512. init_data_size + boot_size) {
  4513. IWL_DEBUG_INFO("uCode file size %d too small\n",
  4514. (int)ucode_raw->size);
  4515. ret = -EINVAL;
  4516. goto err_release;
  4517. }
  4518. /* Verify that uCode images will fit in card's SRAM */
  4519. if (inst_size > IWL_MAX_INST_SIZE) {
  4520. IWL_DEBUG_INFO("uCode instr len %d too large to fit in\n",
  4521. inst_size);
  4522. ret = -EINVAL;
  4523. goto err_release;
  4524. }
  4525. if (data_size > IWL_MAX_DATA_SIZE) {
  4526. IWL_DEBUG_INFO("uCode data len %d too large to fit in\n",
  4527. data_size);
  4528. ret = -EINVAL;
  4529. goto err_release;
  4530. }
  4531. if (init_size > IWL_MAX_INST_SIZE) {
  4532. IWL_DEBUG_INFO
  4533. ("uCode init instr len %d too large to fit in\n",
  4534. init_size);
  4535. ret = -EINVAL;
  4536. goto err_release;
  4537. }
  4538. if (init_data_size > IWL_MAX_DATA_SIZE) {
  4539. IWL_DEBUG_INFO
  4540. ("uCode init data len %d too large to fit in\n",
  4541. init_data_size);
  4542. ret = -EINVAL;
  4543. goto err_release;
  4544. }
  4545. if (boot_size > IWL_MAX_BSM_SIZE) {
  4546. IWL_DEBUG_INFO
  4547. ("uCode boot instr len %d too large to fit in\n",
  4548. boot_size);
  4549. ret = -EINVAL;
  4550. goto err_release;
  4551. }
  4552. /* Allocate ucode buffers for card's bus-master loading ... */
  4553. /* Runtime instructions and 2 copies of data:
  4554. * 1) unmodified from disk
  4555. * 2) backup cache for save/restore during power-downs */
  4556. priv->ucode_code.len = inst_size;
  4557. iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_code);
  4558. priv->ucode_data.len = data_size;
  4559. iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data);
  4560. priv->ucode_data_backup.len = data_size;
  4561. iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
  4562. /* Initialization instructions and data */
  4563. if (init_size && init_data_size) {
  4564. priv->ucode_init.len = init_size;
  4565. iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init);
  4566. priv->ucode_init_data.len = init_data_size;
  4567. iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init_data);
  4568. if (!priv->ucode_init.v_addr || !priv->ucode_init_data.v_addr)
  4569. goto err_pci_alloc;
  4570. }
  4571. /* Bootstrap (instructions only, no data) */
  4572. if (boot_size) {
  4573. priv->ucode_boot.len = boot_size;
  4574. iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_boot);
  4575. if (!priv->ucode_boot.v_addr)
  4576. goto err_pci_alloc;
  4577. }
  4578. /* Copy images into buffers for card's bus-master reads ... */
  4579. /* Runtime instructions (first block of data in file) */
  4580. src = &ucode->data[0];
  4581. len = priv->ucode_code.len;
  4582. IWL_DEBUG_INFO("Copying (but not loading) uCode instr len %Zd\n", len);
  4583. memcpy(priv->ucode_code.v_addr, src, len);
  4584. IWL_DEBUG_INFO("uCode instr buf vaddr = 0x%p, paddr = 0x%08x\n",
  4585. priv->ucode_code.v_addr, (u32)priv->ucode_code.p_addr);
  4586. /* Runtime data (2nd block)
  4587. * NOTE: Copy into backup buffer will be done in iwl4965_up() */
  4588. src = &ucode->data[inst_size];
  4589. len = priv->ucode_data.len;
  4590. IWL_DEBUG_INFO("Copying (but not loading) uCode data len %Zd\n", len);
  4591. memcpy(priv->ucode_data.v_addr, src, len);
  4592. memcpy(priv->ucode_data_backup.v_addr, src, len);
  4593. /* Initialization instructions (3rd block) */
  4594. if (init_size) {
  4595. src = &ucode->data[inst_size + data_size];
  4596. len = priv->ucode_init.len;
  4597. IWL_DEBUG_INFO("Copying (but not loading) init instr len %Zd\n",
  4598. len);
  4599. memcpy(priv->ucode_init.v_addr, src, len);
  4600. }
  4601. /* Initialization data (4th block) */
  4602. if (init_data_size) {
  4603. src = &ucode->data[inst_size + data_size + init_size];
  4604. len = priv->ucode_init_data.len;
  4605. IWL_DEBUG_INFO("Copying (but not loading) init data len %Zd\n",
  4606. len);
  4607. memcpy(priv->ucode_init_data.v_addr, src, len);
  4608. }
  4609. /* Bootstrap instructions (5th block) */
  4610. src = &ucode->data[inst_size + data_size + init_size + init_data_size];
  4611. len = priv->ucode_boot.len;
  4612. IWL_DEBUG_INFO("Copying (but not loading) boot instr len %Zd\n", len);
  4613. memcpy(priv->ucode_boot.v_addr, src, len);
  4614. /* We have our copies now, allow OS release its copies */
  4615. release_firmware(ucode_raw);
  4616. return 0;
  4617. err_pci_alloc:
  4618. IWL_ERROR("failed to allocate pci memory\n");
  4619. ret = -ENOMEM;
  4620. iwl4965_dealloc_ucode_pci(priv);
  4621. err_release:
  4622. release_firmware(ucode_raw);
  4623. error:
  4624. return ret;
  4625. }
  4626. /**
  4627. * iwl4965_set_ucode_ptrs - Set uCode address location
  4628. *
  4629. * Tell initialization uCode where to find runtime uCode.
  4630. *
  4631. * BSM registers initially contain pointers to initialization uCode.
  4632. * We need to replace them to load runtime uCode inst and data,
  4633. * and to save runtime data when powering down.
  4634. */
  4635. static int iwl4965_set_ucode_ptrs(struct iwl_priv *priv)
  4636. {
  4637. dma_addr_t pinst;
  4638. dma_addr_t pdata;
  4639. int rc = 0;
  4640. unsigned long flags;
  4641. /* bits 35:4 for 4965 */
  4642. pinst = priv->ucode_code.p_addr >> 4;
  4643. pdata = priv->ucode_data_backup.p_addr >> 4;
  4644. spin_lock_irqsave(&priv->lock, flags);
  4645. rc = iwl4965_grab_nic_access(priv);
  4646. if (rc) {
  4647. spin_unlock_irqrestore(&priv->lock, flags);
  4648. return rc;
  4649. }
  4650. /* Tell bootstrap uCode where to find image to load */
  4651. iwl4965_write_prph(priv, BSM_DRAM_INST_PTR_REG, pinst);
  4652. iwl4965_write_prph(priv, BSM_DRAM_DATA_PTR_REG, pdata);
  4653. iwl4965_write_prph(priv, BSM_DRAM_DATA_BYTECOUNT_REG,
  4654. priv->ucode_data.len);
  4655. /* Inst bytecount must be last to set up, bit 31 signals uCode
  4656. * that all new ptr/size info is in place */
  4657. iwl4965_write_prph(priv, BSM_DRAM_INST_BYTECOUNT_REG,
  4658. priv->ucode_code.len | BSM_DRAM_INST_LOAD);
  4659. iwl4965_release_nic_access(priv);
  4660. spin_unlock_irqrestore(&priv->lock, flags);
  4661. IWL_DEBUG_INFO("Runtime uCode pointers are set.\n");
  4662. return rc;
  4663. }
  4664. /**
  4665. * iwl4965_init_alive_start - Called after REPLY_ALIVE notification received
  4666. *
  4667. * Called after REPLY_ALIVE notification received from "initialize" uCode.
  4668. *
  4669. * The 4965 "initialize" ALIVE reply contains calibration data for:
  4670. * Voltage, temperature, and MIMO tx gain correction, now stored in priv
  4671. * (3945 does not contain this data).
  4672. *
  4673. * Tell "initialize" uCode to go ahead and load the runtime uCode.
  4674. */
  4675. static void iwl4965_init_alive_start(struct iwl_priv *priv)
  4676. {
  4677. /* Check alive response for "valid" sign from uCode */
  4678. if (priv->card_alive_init.is_valid != UCODE_VALID_OK) {
  4679. /* We had an error bringing up the hardware, so take it
  4680. * all the way back down so we can try again */
  4681. IWL_DEBUG_INFO("Initialize Alive failed.\n");
  4682. goto restart;
  4683. }
  4684. /* Bootstrap uCode has loaded initialize uCode ... verify inst image.
  4685. * This is a paranoid check, because we would not have gotten the
  4686. * "initialize" alive if code weren't properly loaded. */
  4687. if (iwl4965_verify_ucode(priv)) {
  4688. /* Runtime instruction load was bad;
  4689. * take it all the way back down so we can try again */
  4690. IWL_DEBUG_INFO("Bad \"initialize\" uCode load.\n");
  4691. goto restart;
  4692. }
  4693. /* Calculate temperature */
  4694. priv->temperature = iwl4965_get_temperature(priv);
  4695. /* Send pointers to protocol/runtime uCode image ... init code will
  4696. * load and launch runtime uCode, which will send us another "Alive"
  4697. * notification. */
  4698. IWL_DEBUG_INFO("Initialization Alive received.\n");
  4699. if (iwl4965_set_ucode_ptrs(priv)) {
  4700. /* Runtime instruction load won't happen;
  4701. * take it all the way back down so we can try again */
  4702. IWL_DEBUG_INFO("Couldn't set up uCode pointers.\n");
  4703. goto restart;
  4704. }
  4705. return;
  4706. restart:
  4707. queue_work(priv->workqueue, &priv->restart);
  4708. }
  4709. /**
  4710. * iwl4965_alive_start - called after REPLY_ALIVE notification received
  4711. * from protocol/runtime uCode (initialization uCode's
  4712. * Alive gets handled by iwl4965_init_alive_start()).
  4713. */
  4714. static void iwl4965_alive_start(struct iwl_priv *priv)
  4715. {
  4716. int rc = 0;
  4717. IWL_DEBUG_INFO("Runtime Alive received.\n");
  4718. if (priv->card_alive.is_valid != UCODE_VALID_OK) {
  4719. /* We had an error bringing up the hardware, so take it
  4720. * all the way back down so we can try again */
  4721. IWL_DEBUG_INFO("Alive failed.\n");
  4722. goto restart;
  4723. }
  4724. /* Initialize uCode has loaded Runtime uCode ... verify inst image.
  4725. * This is a paranoid check, because we would not have gotten the
  4726. * "runtime" alive if code weren't properly loaded. */
  4727. if (iwl4965_verify_ucode(priv)) {
  4728. /* Runtime instruction load was bad;
  4729. * take it all the way back down so we can try again */
  4730. IWL_DEBUG_INFO("Bad runtime uCode load.\n");
  4731. goto restart;
  4732. }
  4733. iwlcore_clear_stations_table(priv);
  4734. rc = iwl4965_alive_notify(priv);
  4735. if (rc) {
  4736. IWL_WARNING("Could not complete ALIVE transition [ntf]: %d\n",
  4737. rc);
  4738. goto restart;
  4739. }
  4740. /* After the ALIVE response, we can send host commands to 4965 uCode */
  4741. set_bit(STATUS_ALIVE, &priv->status);
  4742. /* Clear out the uCode error bit if it is set */
  4743. clear_bit(STATUS_FW_ERROR, &priv->status);
  4744. if (iwl4965_is_rfkill(priv))
  4745. return;
  4746. ieee80211_start_queues(priv->hw);
  4747. priv->active_rate = priv->rates_mask;
  4748. priv->active_rate_basic = priv->rates_mask & IWL_BASIC_RATES_MASK;
  4749. iwl4965_send_power_mode(priv, IWL_POWER_LEVEL(priv->power_mode));
  4750. if (iwl4965_is_associated(priv)) {
  4751. struct iwl4965_rxon_cmd *active_rxon =
  4752. (struct iwl4965_rxon_cmd *)(&priv->active_rxon);
  4753. memcpy(&priv->staging_rxon, &priv->active_rxon,
  4754. sizeof(priv->staging_rxon));
  4755. active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  4756. } else {
  4757. /* Initialize our rx_config data */
  4758. iwl4965_connection_init_rx_config(priv);
  4759. memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
  4760. }
  4761. /* Configure Bluetooth device coexistence support */
  4762. iwl4965_send_bt_config(priv);
  4763. /* Configure the adapter for unassociated operation */
  4764. iwl4965_commit_rxon(priv);
  4765. /* At this point, the NIC is initialized and operational */
  4766. priv->notif_missed_beacons = 0;
  4767. set_bit(STATUS_READY, &priv->status);
  4768. iwl4965_rf_kill_ct_config(priv);
  4769. IWL_DEBUG_INFO("ALIVE processing complete.\n");
  4770. wake_up_interruptible(&priv->wait_command_queue);
  4771. if (priv->error_recovering)
  4772. iwl4965_error_recovery(priv);
  4773. return;
  4774. restart:
  4775. queue_work(priv->workqueue, &priv->restart);
  4776. }
  4777. static void iwl4965_cancel_deferred_work(struct iwl_priv *priv);
  4778. static void __iwl4965_down(struct iwl_priv *priv)
  4779. {
  4780. unsigned long flags;
  4781. int exit_pending = test_bit(STATUS_EXIT_PENDING, &priv->status);
  4782. struct ieee80211_conf *conf = NULL;
  4783. IWL_DEBUG_INFO(DRV_NAME " is going down\n");
  4784. conf = ieee80211_get_hw_conf(priv->hw);
  4785. if (!exit_pending)
  4786. set_bit(STATUS_EXIT_PENDING, &priv->status);
  4787. iwlcore_clear_stations_table(priv);
  4788. /* Unblock any waiting calls */
  4789. wake_up_interruptible_all(&priv->wait_command_queue);
  4790. /* Wipe out the EXIT_PENDING status bit if we are not actually
  4791. * exiting the module */
  4792. if (!exit_pending)
  4793. clear_bit(STATUS_EXIT_PENDING, &priv->status);
  4794. /* stop and reset the on-board processor */
  4795. iwl4965_write32(priv, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
  4796. /* tell the device to stop sending interrupts */
  4797. iwl4965_disable_interrupts(priv);
  4798. if (priv->mac80211_registered)
  4799. ieee80211_stop_queues(priv->hw);
  4800. /* If we have not previously called iwl4965_init() then
  4801. * clear all bits but the RF Kill and SUSPEND bits and return */
  4802. if (!iwl4965_is_init(priv)) {
  4803. priv->status = test_bit(STATUS_RF_KILL_HW, &priv->status) <<
  4804. STATUS_RF_KILL_HW |
  4805. test_bit(STATUS_RF_KILL_SW, &priv->status) <<
  4806. STATUS_RF_KILL_SW |
  4807. test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
  4808. STATUS_GEO_CONFIGURED |
  4809. test_bit(STATUS_IN_SUSPEND, &priv->status) <<
  4810. STATUS_IN_SUSPEND;
  4811. goto exit;
  4812. }
  4813. /* ...otherwise clear out all the status bits but the RF Kill and
  4814. * SUSPEND bits and continue taking the NIC down. */
  4815. priv->status &= test_bit(STATUS_RF_KILL_HW, &priv->status) <<
  4816. STATUS_RF_KILL_HW |
  4817. test_bit(STATUS_RF_KILL_SW, &priv->status) <<
  4818. STATUS_RF_KILL_SW |
  4819. test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
  4820. STATUS_GEO_CONFIGURED |
  4821. test_bit(STATUS_IN_SUSPEND, &priv->status) <<
  4822. STATUS_IN_SUSPEND |
  4823. test_bit(STATUS_FW_ERROR, &priv->status) <<
  4824. STATUS_FW_ERROR;
  4825. spin_lock_irqsave(&priv->lock, flags);
  4826. iwl4965_clear_bit(priv, CSR_GP_CNTRL,
  4827. CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
  4828. spin_unlock_irqrestore(&priv->lock, flags);
  4829. iwl4965_hw_txq_ctx_stop(priv);
  4830. iwl4965_hw_rxq_stop(priv);
  4831. spin_lock_irqsave(&priv->lock, flags);
  4832. if (!iwl4965_grab_nic_access(priv)) {
  4833. iwl4965_write_prph(priv, APMG_CLK_DIS_REG,
  4834. APMG_CLK_VAL_DMA_CLK_RQT);
  4835. iwl4965_release_nic_access(priv);
  4836. }
  4837. spin_unlock_irqrestore(&priv->lock, flags);
  4838. udelay(5);
  4839. iwl4965_hw_nic_stop_master(priv);
  4840. iwl4965_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_SW_RESET);
  4841. iwl4965_hw_nic_reset(priv);
  4842. exit:
  4843. memset(&priv->card_alive, 0, sizeof(struct iwl4965_alive_resp));
  4844. if (priv->ibss_beacon)
  4845. dev_kfree_skb(priv->ibss_beacon);
  4846. priv->ibss_beacon = NULL;
  4847. /* clear out any free frames */
  4848. iwl4965_clear_free_frames(priv);
  4849. }
  4850. static void iwl4965_down(struct iwl_priv *priv)
  4851. {
  4852. mutex_lock(&priv->mutex);
  4853. __iwl4965_down(priv);
  4854. mutex_unlock(&priv->mutex);
  4855. iwl4965_cancel_deferred_work(priv);
  4856. }
  4857. #define MAX_HW_RESTARTS 5
  4858. static int __iwl4965_up(struct iwl_priv *priv)
  4859. {
  4860. int rc, i;
  4861. if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
  4862. IWL_WARNING("Exit pending; will not bring the NIC up\n");
  4863. return -EIO;
  4864. }
  4865. if (test_bit(STATUS_RF_KILL_SW, &priv->status)) {
  4866. IWL_WARNING("Radio disabled by SW RF kill (module "
  4867. "parameter)\n");
  4868. return -ENODEV;
  4869. }
  4870. if (!priv->ucode_data_backup.v_addr || !priv->ucode_data.v_addr) {
  4871. IWL_ERROR("ucode not available for device bringup\n");
  4872. return -EIO;
  4873. }
  4874. /* If platform's RF_KILL switch is NOT set to KILL */
  4875. if (iwl4965_read32(priv, CSR_GP_CNTRL) &
  4876. CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
  4877. clear_bit(STATUS_RF_KILL_HW, &priv->status);
  4878. else {
  4879. set_bit(STATUS_RF_KILL_HW, &priv->status);
  4880. if (!test_bit(STATUS_IN_SUSPEND, &priv->status)) {
  4881. IWL_WARNING("Radio disabled by HW RF Kill switch\n");
  4882. return -ENODEV;
  4883. }
  4884. }
  4885. iwl4965_write32(priv, CSR_INT, 0xFFFFFFFF);
  4886. rc = iwl4965_hw_nic_init(priv);
  4887. if (rc) {
  4888. IWL_ERROR("Unable to int nic\n");
  4889. return rc;
  4890. }
  4891. /* make sure rfkill handshake bits are cleared */
  4892. iwl4965_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
  4893. iwl4965_write32(priv, CSR_UCODE_DRV_GP1_CLR,
  4894. CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
  4895. /* clear (again), then enable host interrupts */
  4896. iwl4965_write32(priv, CSR_INT, 0xFFFFFFFF);
  4897. iwl4965_enable_interrupts(priv);
  4898. /* really make sure rfkill handshake bits are cleared */
  4899. iwl4965_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
  4900. iwl4965_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
  4901. /* Copy original ucode data image from disk into backup cache.
  4902. * This will be used to initialize the on-board processor's
  4903. * data SRAM for a clean start when the runtime program first loads. */
  4904. memcpy(priv->ucode_data_backup.v_addr, priv->ucode_data.v_addr,
  4905. priv->ucode_data.len);
  4906. /* We return success when we resume from suspend and rf_kill is on. */
  4907. if (test_bit(STATUS_RF_KILL_HW, &priv->status))
  4908. return 0;
  4909. for (i = 0; i < MAX_HW_RESTARTS; i++) {
  4910. iwlcore_clear_stations_table(priv);
  4911. /* load bootstrap state machine,
  4912. * load bootstrap program into processor's memory,
  4913. * prepare to load the "initialize" uCode */
  4914. rc = iwl4965_load_bsm(priv);
  4915. if (rc) {
  4916. IWL_ERROR("Unable to set up bootstrap uCode: %d\n", rc);
  4917. continue;
  4918. }
  4919. /* start card; "initialize" will load runtime ucode */
  4920. iwl4965_nic_start(priv);
  4921. IWL_DEBUG_INFO(DRV_NAME " is coming up\n");
  4922. return 0;
  4923. }
  4924. set_bit(STATUS_EXIT_PENDING, &priv->status);
  4925. __iwl4965_down(priv);
  4926. /* tried to restart and config the device for as long as our
  4927. * patience could withstand */
  4928. IWL_ERROR("Unable to initialize device after %d attempts.\n", i);
  4929. return -EIO;
  4930. }
  4931. /*****************************************************************************
  4932. *
  4933. * Workqueue callbacks
  4934. *
  4935. *****************************************************************************/
  4936. static void iwl4965_bg_init_alive_start(struct work_struct *data)
  4937. {
  4938. struct iwl_priv *priv =
  4939. container_of(data, struct iwl_priv, init_alive_start.work);
  4940. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  4941. return;
  4942. mutex_lock(&priv->mutex);
  4943. iwl4965_init_alive_start(priv);
  4944. mutex_unlock(&priv->mutex);
  4945. }
  4946. static void iwl4965_bg_alive_start(struct work_struct *data)
  4947. {
  4948. struct iwl_priv *priv =
  4949. container_of(data, struct iwl_priv, alive_start.work);
  4950. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  4951. return;
  4952. mutex_lock(&priv->mutex);
  4953. iwl4965_alive_start(priv);
  4954. mutex_unlock(&priv->mutex);
  4955. }
  4956. static void iwl4965_bg_rf_kill(struct work_struct *work)
  4957. {
  4958. struct iwl_priv *priv = container_of(work, struct iwl_priv, rf_kill);
  4959. wake_up_interruptible(&priv->wait_command_queue);
  4960. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  4961. return;
  4962. mutex_lock(&priv->mutex);
  4963. if (!iwl4965_is_rfkill(priv)) {
  4964. IWL_DEBUG(IWL_DL_INFO | IWL_DL_RF_KILL,
  4965. "HW and/or SW RF Kill no longer active, restarting "
  4966. "device\n");
  4967. if (!test_bit(STATUS_EXIT_PENDING, &priv->status))
  4968. queue_work(priv->workqueue, &priv->restart);
  4969. } else {
  4970. if (!test_bit(STATUS_RF_KILL_HW, &priv->status))
  4971. IWL_DEBUG_RF_KILL("Can not turn radio back on - "
  4972. "disabled by SW switch\n");
  4973. else
  4974. IWL_WARNING("Radio Frequency Kill Switch is On:\n"
  4975. "Kill switch must be turned off for "
  4976. "wireless networking to work.\n");
  4977. }
  4978. mutex_unlock(&priv->mutex);
  4979. }
  4980. #define IWL_SCAN_CHECK_WATCHDOG (7 * HZ)
  4981. static void iwl4965_bg_scan_check(struct work_struct *data)
  4982. {
  4983. struct iwl_priv *priv =
  4984. container_of(data, struct iwl_priv, scan_check.work);
  4985. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  4986. return;
  4987. mutex_lock(&priv->mutex);
  4988. if (test_bit(STATUS_SCANNING, &priv->status) ||
  4989. test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
  4990. IWL_DEBUG(IWL_DL_INFO | IWL_DL_SCAN,
  4991. "Scan completion watchdog resetting adapter (%dms)\n",
  4992. jiffies_to_msecs(IWL_SCAN_CHECK_WATCHDOG));
  4993. if (!test_bit(STATUS_EXIT_PENDING, &priv->status))
  4994. iwl4965_send_scan_abort(priv);
  4995. }
  4996. mutex_unlock(&priv->mutex);
  4997. }
  4998. static void iwl4965_bg_request_scan(struct work_struct *data)
  4999. {
  5000. struct iwl_priv *priv =
  5001. container_of(data, struct iwl_priv, request_scan);
  5002. struct iwl_host_cmd cmd = {
  5003. .id = REPLY_SCAN_CMD,
  5004. .len = sizeof(struct iwl4965_scan_cmd),
  5005. .meta.flags = CMD_SIZE_HUGE,
  5006. };
  5007. struct iwl4965_scan_cmd *scan;
  5008. struct ieee80211_conf *conf = NULL;
  5009. u16 cmd_len;
  5010. enum ieee80211_band band;
  5011. u8 direct_mask;
  5012. int ret = 0;
  5013. conf = ieee80211_get_hw_conf(priv->hw);
  5014. mutex_lock(&priv->mutex);
  5015. if (!iwl4965_is_ready(priv)) {
  5016. IWL_WARNING("request scan called when driver not ready.\n");
  5017. goto done;
  5018. }
  5019. /* Make sure the scan wasn't cancelled before this queued work
  5020. * was given the chance to run... */
  5021. if (!test_bit(STATUS_SCANNING, &priv->status))
  5022. goto done;
  5023. /* This should never be called or scheduled if there is currently
  5024. * a scan active in the hardware. */
  5025. if (test_bit(STATUS_SCAN_HW, &priv->status)) {
  5026. IWL_DEBUG_INFO("Multiple concurrent scan requests in parallel. "
  5027. "Ignoring second request.\n");
  5028. ret = -EIO;
  5029. goto done;
  5030. }
  5031. if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
  5032. IWL_DEBUG_SCAN("Aborting scan due to device shutdown\n");
  5033. goto done;
  5034. }
  5035. if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
  5036. IWL_DEBUG_HC("Scan request while abort pending. Queuing.\n");
  5037. goto done;
  5038. }
  5039. if (iwl4965_is_rfkill(priv)) {
  5040. IWL_DEBUG_HC("Aborting scan due to RF Kill activation\n");
  5041. goto done;
  5042. }
  5043. if (!test_bit(STATUS_READY, &priv->status)) {
  5044. IWL_DEBUG_HC("Scan request while uninitialized. Queuing.\n");
  5045. goto done;
  5046. }
  5047. if (!priv->scan_bands) {
  5048. IWL_DEBUG_HC("Aborting scan due to no requested bands\n");
  5049. goto done;
  5050. }
  5051. if (!priv->scan) {
  5052. priv->scan = kmalloc(sizeof(struct iwl4965_scan_cmd) +
  5053. IWL_MAX_SCAN_SIZE, GFP_KERNEL);
  5054. if (!priv->scan) {
  5055. ret = -ENOMEM;
  5056. goto done;
  5057. }
  5058. }
  5059. scan = priv->scan;
  5060. memset(scan, 0, sizeof(struct iwl4965_scan_cmd) + IWL_MAX_SCAN_SIZE);
  5061. scan->quiet_plcp_th = IWL_PLCP_QUIET_THRESH;
  5062. scan->quiet_time = IWL_ACTIVE_QUIET_TIME;
  5063. if (iwl4965_is_associated(priv)) {
  5064. u16 interval = 0;
  5065. u32 extra;
  5066. u32 suspend_time = 100;
  5067. u32 scan_suspend_time = 100;
  5068. unsigned long flags;
  5069. IWL_DEBUG_INFO("Scanning while associated...\n");
  5070. spin_lock_irqsave(&priv->lock, flags);
  5071. interval = priv->beacon_int;
  5072. spin_unlock_irqrestore(&priv->lock, flags);
  5073. scan->suspend_time = 0;
  5074. scan->max_out_time = cpu_to_le32(200 * 1024);
  5075. if (!interval)
  5076. interval = suspend_time;
  5077. extra = (suspend_time / interval) << 22;
  5078. scan_suspend_time = (extra |
  5079. ((suspend_time % interval) * 1024));
  5080. scan->suspend_time = cpu_to_le32(scan_suspend_time);
  5081. IWL_DEBUG_SCAN("suspend_time 0x%X beacon interval %d\n",
  5082. scan_suspend_time, interval);
  5083. }
  5084. /* We should add the ability for user to lock to PASSIVE ONLY */
  5085. if (priv->one_direct_scan) {
  5086. IWL_DEBUG_SCAN
  5087. ("Kicking off one direct scan for '%s'\n",
  5088. iwl4965_escape_essid(priv->direct_ssid,
  5089. priv->direct_ssid_len));
  5090. scan->direct_scan[0].id = WLAN_EID_SSID;
  5091. scan->direct_scan[0].len = priv->direct_ssid_len;
  5092. memcpy(scan->direct_scan[0].ssid,
  5093. priv->direct_ssid, priv->direct_ssid_len);
  5094. direct_mask = 1;
  5095. } else if (!iwl4965_is_associated(priv) && priv->essid_len) {
  5096. scan->direct_scan[0].id = WLAN_EID_SSID;
  5097. scan->direct_scan[0].len = priv->essid_len;
  5098. memcpy(scan->direct_scan[0].ssid, priv->essid, priv->essid_len);
  5099. direct_mask = 1;
  5100. } else {
  5101. direct_mask = 0;
  5102. }
  5103. scan->tx_cmd.tx_flags = TX_CMD_FLG_SEQ_CTL_MSK;
  5104. scan->tx_cmd.sta_id = priv->hw_setting.bcast_sta_id;
  5105. scan->tx_cmd.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
  5106. switch (priv->scan_bands) {
  5107. case 2:
  5108. scan->flags = RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK;
  5109. scan->tx_cmd.rate_n_flags =
  5110. iwl4965_hw_set_rate_n_flags(IWL_RATE_1M_PLCP,
  5111. RATE_MCS_ANT_B_MSK|RATE_MCS_CCK_MSK);
  5112. scan->good_CRC_th = 0;
  5113. band = IEEE80211_BAND_2GHZ;
  5114. break;
  5115. case 1:
  5116. scan->tx_cmd.rate_n_flags =
  5117. iwl4965_hw_set_rate_n_flags(IWL_RATE_6M_PLCP,
  5118. RATE_MCS_ANT_B_MSK);
  5119. scan->good_CRC_th = IWL_GOOD_CRC_TH;
  5120. band = IEEE80211_BAND_5GHZ;
  5121. break;
  5122. default:
  5123. IWL_WARNING("Invalid scan band count\n");
  5124. goto done;
  5125. }
  5126. /* We don't build a direct scan probe request; the uCode will do
  5127. * that based on the direct_mask added to each channel entry */
  5128. cmd_len = iwl4965_fill_probe_req(priv, band,
  5129. (struct ieee80211_mgmt *)scan->data,
  5130. IWL_MAX_SCAN_SIZE - sizeof(*scan), 0);
  5131. scan->tx_cmd.len = cpu_to_le16(cmd_len);
  5132. /* select Rx chains */
  5133. /* Force use of chains B and C (0x6) for scan Rx.
  5134. * Avoid A (0x1) because of its off-channel reception on A-band.
  5135. * MIMO is not used here, but value is required to make uCode happy. */
  5136. scan->rx_chain = RXON_RX_CHAIN_DRIVER_FORCE_MSK |
  5137. cpu_to_le16((0x7 << RXON_RX_CHAIN_VALID_POS) |
  5138. (0x6 << RXON_RX_CHAIN_FORCE_SEL_POS) |
  5139. (0x7 << RXON_RX_CHAIN_FORCE_MIMO_SEL_POS));
  5140. if (priv->iw_mode == IEEE80211_IF_TYPE_MNTR)
  5141. scan->filter_flags = RXON_FILTER_PROMISC_MSK;
  5142. if (direct_mask) {
  5143. IWL_DEBUG_SCAN
  5144. ("Initiating direct scan for %s.\n",
  5145. iwl4965_escape_essid(priv->essid, priv->essid_len));
  5146. scan->channel_count =
  5147. iwl4965_get_channels_for_scan(
  5148. priv, band, 1, /* active */
  5149. direct_mask,
  5150. (void *)&scan->data[le16_to_cpu(scan->tx_cmd.len)]);
  5151. } else {
  5152. IWL_DEBUG_SCAN("Initiating indirect scan.\n");
  5153. scan->channel_count =
  5154. iwl4965_get_channels_for_scan(
  5155. priv, band, 0, /* passive */
  5156. direct_mask,
  5157. (void *)&scan->data[le16_to_cpu(scan->tx_cmd.len)]);
  5158. }
  5159. cmd.len += le16_to_cpu(scan->tx_cmd.len) +
  5160. scan->channel_count * sizeof(struct iwl4965_scan_channel);
  5161. cmd.data = scan;
  5162. scan->len = cpu_to_le16(cmd.len);
  5163. set_bit(STATUS_SCAN_HW, &priv->status);
  5164. ret = iwl_send_cmd_sync(priv, &cmd);
  5165. if (ret)
  5166. goto done;
  5167. queue_delayed_work(priv->workqueue, &priv->scan_check,
  5168. IWL_SCAN_CHECK_WATCHDOG);
  5169. mutex_unlock(&priv->mutex);
  5170. return;
  5171. done:
  5172. /* inform mac80211 scan aborted */
  5173. queue_work(priv->workqueue, &priv->scan_completed);
  5174. mutex_unlock(&priv->mutex);
  5175. }
  5176. static void iwl4965_bg_up(struct work_struct *data)
  5177. {
  5178. struct iwl_priv *priv = container_of(data, struct iwl_priv, up);
  5179. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  5180. return;
  5181. mutex_lock(&priv->mutex);
  5182. __iwl4965_up(priv);
  5183. mutex_unlock(&priv->mutex);
  5184. }
  5185. static void iwl4965_bg_restart(struct work_struct *data)
  5186. {
  5187. struct iwl_priv *priv = container_of(data, struct iwl_priv, restart);
  5188. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  5189. return;
  5190. iwl4965_down(priv);
  5191. queue_work(priv->workqueue, &priv->up);
  5192. }
  5193. static void iwl4965_bg_rx_replenish(struct work_struct *data)
  5194. {
  5195. struct iwl_priv *priv =
  5196. container_of(data, struct iwl_priv, rx_replenish);
  5197. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  5198. return;
  5199. mutex_lock(&priv->mutex);
  5200. iwl4965_rx_replenish(priv);
  5201. mutex_unlock(&priv->mutex);
  5202. }
  5203. #define IWL_DELAY_NEXT_SCAN (HZ*2)
  5204. static void iwl4965_bg_post_associate(struct work_struct *data)
  5205. {
  5206. struct iwl_priv *priv = container_of(data, struct iwl_priv,
  5207. post_associate.work);
  5208. struct ieee80211_conf *conf = NULL;
  5209. int ret = 0;
  5210. DECLARE_MAC_BUF(mac);
  5211. if (priv->iw_mode == IEEE80211_IF_TYPE_AP) {
  5212. IWL_ERROR("%s Should not be called in AP mode\n", __FUNCTION__);
  5213. return;
  5214. }
  5215. IWL_DEBUG_ASSOC("Associated as %d to: %s\n",
  5216. priv->assoc_id,
  5217. print_mac(mac, priv->active_rxon.bssid_addr));
  5218. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  5219. return;
  5220. mutex_lock(&priv->mutex);
  5221. if (!priv->vif || !priv->is_open) {
  5222. mutex_unlock(&priv->mutex);
  5223. return;
  5224. }
  5225. iwl4965_scan_cancel_timeout(priv, 200);
  5226. conf = ieee80211_get_hw_conf(priv->hw);
  5227. priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  5228. iwl4965_commit_rxon(priv);
  5229. memset(&priv->rxon_timing, 0, sizeof(struct iwl4965_rxon_time_cmd));
  5230. iwl4965_setup_rxon_timing(priv);
  5231. ret = iwl_send_cmd_pdu(priv, REPLY_RXON_TIMING,
  5232. sizeof(priv->rxon_timing), &priv->rxon_timing);
  5233. if (ret)
  5234. IWL_WARNING("REPLY_RXON_TIMING failed - "
  5235. "Attempting to continue.\n");
  5236. priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
  5237. #ifdef CONFIG_IWL4965_HT
  5238. if (priv->current_ht_config.is_ht)
  5239. iwl4965_set_rxon_ht(priv, &priv->current_ht_config);
  5240. #endif /* CONFIG_IWL4965_HT*/
  5241. iwl4965_set_rxon_chain(priv);
  5242. priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
  5243. IWL_DEBUG_ASSOC("assoc id %d beacon interval %d\n",
  5244. priv->assoc_id, priv->beacon_int);
  5245. if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
  5246. priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
  5247. else
  5248. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
  5249. if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
  5250. if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME)
  5251. priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
  5252. else
  5253. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
  5254. if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS)
  5255. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
  5256. }
  5257. iwl4965_commit_rxon(priv);
  5258. switch (priv->iw_mode) {
  5259. case IEEE80211_IF_TYPE_STA:
  5260. iwl4965_rate_scale_init(priv->hw, IWL_AP_ID);
  5261. break;
  5262. case IEEE80211_IF_TYPE_IBSS:
  5263. /* clear out the station table */
  5264. iwlcore_clear_stations_table(priv);
  5265. iwl4965_rxon_add_station(priv, iwl4965_broadcast_addr, 0);
  5266. iwl4965_rxon_add_station(priv, priv->bssid, 0);
  5267. iwl4965_rate_scale_init(priv->hw, IWL_STA_ID);
  5268. iwl4965_send_beacon_cmd(priv);
  5269. break;
  5270. default:
  5271. IWL_ERROR("%s Should not be called in %d mode\n",
  5272. __FUNCTION__, priv->iw_mode);
  5273. break;
  5274. }
  5275. iwl4965_sequence_reset(priv);
  5276. #ifdef CONFIG_IWL4965_SENSITIVITY
  5277. /* Enable Rx differential gain and sensitivity calibrations */
  5278. iwl4965_chain_noise_reset(priv);
  5279. priv->start_calib = 1;
  5280. #endif /* CONFIG_IWL4965_SENSITIVITY */
  5281. if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS)
  5282. priv->assoc_station_added = 1;
  5283. iwl4965_activate_qos(priv, 0);
  5284. /* we have just associated, don't start scan too early */
  5285. priv->next_scan_jiffies = jiffies + IWL_DELAY_NEXT_SCAN;
  5286. mutex_unlock(&priv->mutex);
  5287. }
  5288. static void iwl4965_bg_abort_scan(struct work_struct *work)
  5289. {
  5290. struct iwl_priv *priv = container_of(work, struct iwl_priv, abort_scan);
  5291. if (!iwl4965_is_ready(priv))
  5292. return;
  5293. mutex_lock(&priv->mutex);
  5294. set_bit(STATUS_SCAN_ABORTING, &priv->status);
  5295. iwl4965_send_scan_abort(priv);
  5296. mutex_unlock(&priv->mutex);
  5297. }
  5298. static int iwl4965_mac_config(struct ieee80211_hw *hw, struct ieee80211_conf *conf);
  5299. static void iwl4965_bg_scan_completed(struct work_struct *work)
  5300. {
  5301. struct iwl_priv *priv =
  5302. container_of(work, struct iwl_priv, scan_completed);
  5303. IWL_DEBUG(IWL_DL_INFO | IWL_DL_SCAN, "SCAN complete scan\n");
  5304. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  5305. return;
  5306. if (test_bit(STATUS_CONF_PENDING, &priv->status))
  5307. iwl4965_mac_config(priv->hw, ieee80211_get_hw_conf(priv->hw));
  5308. ieee80211_scan_completed(priv->hw);
  5309. /* Since setting the TXPOWER may have been deferred while
  5310. * performing the scan, fire one off */
  5311. mutex_lock(&priv->mutex);
  5312. iwl4965_hw_reg_send_txpower(priv);
  5313. mutex_unlock(&priv->mutex);
  5314. }
  5315. /*****************************************************************************
  5316. *
  5317. * mac80211 entry point functions
  5318. *
  5319. *****************************************************************************/
  5320. #define UCODE_READY_TIMEOUT (2 * HZ)
  5321. static int iwl4965_mac_start(struct ieee80211_hw *hw)
  5322. {
  5323. struct iwl_priv *priv = hw->priv;
  5324. int ret;
  5325. IWL_DEBUG_MAC80211("enter\n");
  5326. if (pci_enable_device(priv->pci_dev)) {
  5327. IWL_ERROR("Fail to pci_enable_device\n");
  5328. return -ENODEV;
  5329. }
  5330. pci_restore_state(priv->pci_dev);
  5331. pci_enable_msi(priv->pci_dev);
  5332. ret = request_irq(priv->pci_dev->irq, iwl4965_isr, IRQF_SHARED,
  5333. DRV_NAME, priv);
  5334. if (ret) {
  5335. IWL_ERROR("Error allocating IRQ %d\n", priv->pci_dev->irq);
  5336. goto out_disable_msi;
  5337. }
  5338. /* we should be verifying the device is ready to be opened */
  5339. mutex_lock(&priv->mutex);
  5340. memset(&priv->staging_rxon, 0, sizeof(struct iwl4965_rxon_cmd));
  5341. /* fetch ucode file from disk, alloc and copy to bus-master buffers ...
  5342. * ucode filename and max sizes are card-specific. */
  5343. if (!priv->ucode_code.len) {
  5344. ret = iwl4965_read_ucode(priv);
  5345. if (ret) {
  5346. IWL_ERROR("Could not read microcode: %d\n", ret);
  5347. mutex_unlock(&priv->mutex);
  5348. goto out_release_irq;
  5349. }
  5350. }
  5351. ret = __iwl4965_up(priv);
  5352. mutex_unlock(&priv->mutex);
  5353. if (ret)
  5354. goto out_release_irq;
  5355. IWL_DEBUG_INFO("Start UP work done.\n");
  5356. if (test_bit(STATUS_IN_SUSPEND, &priv->status))
  5357. return 0;
  5358. /* Wait for START_ALIVE from ucode. Otherwise callbacks from
  5359. * mac80211 will not be run successfully. */
  5360. ret = wait_event_interruptible_timeout(priv->wait_command_queue,
  5361. test_bit(STATUS_READY, &priv->status),
  5362. UCODE_READY_TIMEOUT);
  5363. if (!ret) {
  5364. if (!test_bit(STATUS_READY, &priv->status)) {
  5365. IWL_ERROR("Wait for START_ALIVE timeout after %dms.\n",
  5366. jiffies_to_msecs(UCODE_READY_TIMEOUT));
  5367. ret = -ETIMEDOUT;
  5368. goto out_release_irq;
  5369. }
  5370. }
  5371. priv->is_open = 1;
  5372. IWL_DEBUG_MAC80211("leave\n");
  5373. return 0;
  5374. out_release_irq:
  5375. free_irq(priv->pci_dev->irq, priv);
  5376. out_disable_msi:
  5377. pci_disable_msi(priv->pci_dev);
  5378. pci_disable_device(priv->pci_dev);
  5379. priv->is_open = 0;
  5380. IWL_DEBUG_MAC80211("leave - failed\n");
  5381. return ret;
  5382. }
  5383. static void iwl4965_mac_stop(struct ieee80211_hw *hw)
  5384. {
  5385. struct iwl_priv *priv = hw->priv;
  5386. IWL_DEBUG_MAC80211("enter\n");
  5387. if (!priv->is_open) {
  5388. IWL_DEBUG_MAC80211("leave - skip\n");
  5389. return;
  5390. }
  5391. priv->is_open = 0;
  5392. if (iwl4965_is_ready_rf(priv)) {
  5393. /* stop mac, cancel any scan request and clear
  5394. * RXON_FILTER_ASSOC_MSK BIT
  5395. */
  5396. mutex_lock(&priv->mutex);
  5397. iwl4965_scan_cancel_timeout(priv, 100);
  5398. cancel_delayed_work(&priv->post_associate);
  5399. mutex_unlock(&priv->mutex);
  5400. }
  5401. iwl4965_down(priv);
  5402. flush_workqueue(priv->workqueue);
  5403. free_irq(priv->pci_dev->irq, priv);
  5404. pci_disable_msi(priv->pci_dev);
  5405. pci_save_state(priv->pci_dev);
  5406. pci_disable_device(priv->pci_dev);
  5407. IWL_DEBUG_MAC80211("leave\n");
  5408. }
  5409. static int iwl4965_mac_tx(struct ieee80211_hw *hw, struct sk_buff *skb,
  5410. struct ieee80211_tx_control *ctl)
  5411. {
  5412. struct iwl_priv *priv = hw->priv;
  5413. IWL_DEBUG_MAC80211("enter\n");
  5414. if (priv->iw_mode == IEEE80211_IF_TYPE_MNTR) {
  5415. IWL_DEBUG_MAC80211("leave - monitor\n");
  5416. return -1;
  5417. }
  5418. IWL_DEBUG_TX("dev->xmit(%d bytes) at rate 0x%02x\n", skb->len,
  5419. ctl->tx_rate->bitrate);
  5420. if (iwl4965_tx_skb(priv, skb, ctl))
  5421. dev_kfree_skb_any(skb);
  5422. IWL_DEBUG_MAC80211("leave\n");
  5423. return 0;
  5424. }
  5425. static int iwl4965_mac_add_interface(struct ieee80211_hw *hw,
  5426. struct ieee80211_if_init_conf *conf)
  5427. {
  5428. struct iwl_priv *priv = hw->priv;
  5429. unsigned long flags;
  5430. DECLARE_MAC_BUF(mac);
  5431. IWL_DEBUG_MAC80211("enter: type %d\n", conf->type);
  5432. if (priv->vif) {
  5433. IWL_DEBUG_MAC80211("leave - vif != NULL\n");
  5434. return -EOPNOTSUPP;
  5435. }
  5436. spin_lock_irqsave(&priv->lock, flags);
  5437. priv->vif = conf->vif;
  5438. spin_unlock_irqrestore(&priv->lock, flags);
  5439. mutex_lock(&priv->mutex);
  5440. if (conf->mac_addr) {
  5441. IWL_DEBUG_MAC80211("Set %s\n", print_mac(mac, conf->mac_addr));
  5442. memcpy(priv->mac_addr, conf->mac_addr, ETH_ALEN);
  5443. }
  5444. if (iwl4965_is_ready(priv))
  5445. iwl4965_set_mode(priv, conf->type);
  5446. mutex_unlock(&priv->mutex);
  5447. IWL_DEBUG_MAC80211("leave\n");
  5448. return 0;
  5449. }
  5450. /**
  5451. * iwl4965_mac_config - mac80211 config callback
  5452. *
  5453. * We ignore conf->flags & IEEE80211_CONF_SHORT_SLOT_TIME since it seems to
  5454. * be set inappropriately and the driver currently sets the hardware up to
  5455. * use it whenever needed.
  5456. */
  5457. static int iwl4965_mac_config(struct ieee80211_hw *hw, struct ieee80211_conf *conf)
  5458. {
  5459. struct iwl_priv *priv = hw->priv;
  5460. const struct iwl_channel_info *ch_info;
  5461. unsigned long flags;
  5462. int ret = 0;
  5463. mutex_lock(&priv->mutex);
  5464. IWL_DEBUG_MAC80211("enter to channel %d\n", conf->channel->hw_value);
  5465. priv->add_radiotap = !!(conf->flags & IEEE80211_CONF_RADIOTAP);
  5466. if (!iwl4965_is_ready(priv)) {
  5467. IWL_DEBUG_MAC80211("leave - not ready\n");
  5468. ret = -EIO;
  5469. goto out;
  5470. }
  5471. if (unlikely(!priv->cfg->mod_params->disable_hw_scan &&
  5472. test_bit(STATUS_SCANNING, &priv->status))) {
  5473. IWL_DEBUG_MAC80211("leave - scanning\n");
  5474. set_bit(STATUS_CONF_PENDING, &priv->status);
  5475. mutex_unlock(&priv->mutex);
  5476. return 0;
  5477. }
  5478. spin_lock_irqsave(&priv->lock, flags);
  5479. ch_info = iwl_get_channel_info(priv, conf->channel->band,
  5480. ieee80211_frequency_to_channel(conf->channel->center_freq));
  5481. if (!is_channel_valid(ch_info)) {
  5482. IWL_DEBUG_MAC80211("leave - invalid channel\n");
  5483. spin_unlock_irqrestore(&priv->lock, flags);
  5484. ret = -EINVAL;
  5485. goto out;
  5486. }
  5487. #ifdef CONFIG_IWL4965_HT
  5488. /* if we are switching from ht to 2.4 clear flags
  5489. * from any ht related info since 2.4 does not
  5490. * support ht */
  5491. if ((le16_to_cpu(priv->staging_rxon.channel) != conf->channel->hw_value)
  5492. #ifdef IEEE80211_CONF_CHANNEL_SWITCH
  5493. && !(conf->flags & IEEE80211_CONF_CHANNEL_SWITCH)
  5494. #endif
  5495. )
  5496. priv->staging_rxon.flags = 0;
  5497. #endif /* CONFIG_IWL4965_HT */
  5498. iwlcore_set_rxon_channel(priv, conf->channel->band,
  5499. ieee80211_frequency_to_channel(conf->channel->center_freq));
  5500. iwl4965_set_flags_for_phymode(priv, conf->channel->band);
  5501. /* The list of supported rates and rate mask can be different
  5502. * for each band; since the band may have changed, reset
  5503. * the rate mask to what mac80211 lists */
  5504. iwl4965_set_rate(priv);
  5505. spin_unlock_irqrestore(&priv->lock, flags);
  5506. #ifdef IEEE80211_CONF_CHANNEL_SWITCH
  5507. if (conf->flags & IEEE80211_CONF_CHANNEL_SWITCH) {
  5508. iwl4965_hw_channel_switch(priv, conf->channel);
  5509. goto out;
  5510. }
  5511. #endif
  5512. iwl4965_radio_kill_sw(priv, !conf->radio_enabled);
  5513. if (!conf->radio_enabled) {
  5514. IWL_DEBUG_MAC80211("leave - radio disabled\n");
  5515. goto out;
  5516. }
  5517. if (iwl4965_is_rfkill(priv)) {
  5518. IWL_DEBUG_MAC80211("leave - RF kill\n");
  5519. ret = -EIO;
  5520. goto out;
  5521. }
  5522. iwl4965_set_rate(priv);
  5523. if (memcmp(&priv->active_rxon,
  5524. &priv->staging_rxon, sizeof(priv->staging_rxon)))
  5525. iwl4965_commit_rxon(priv);
  5526. else
  5527. IWL_DEBUG_INFO("No re-sending same RXON configuration.\n");
  5528. IWL_DEBUG_MAC80211("leave\n");
  5529. out:
  5530. clear_bit(STATUS_CONF_PENDING, &priv->status);
  5531. mutex_unlock(&priv->mutex);
  5532. return ret;
  5533. }
  5534. static void iwl4965_config_ap(struct iwl_priv *priv)
  5535. {
  5536. int ret = 0;
  5537. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  5538. return;
  5539. /* The following should be done only at AP bring up */
  5540. if ((priv->active_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) == 0) {
  5541. /* RXON - unassoc (to set timing command) */
  5542. priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  5543. iwl4965_commit_rxon(priv);
  5544. /* RXON Timing */
  5545. memset(&priv->rxon_timing, 0, sizeof(struct iwl4965_rxon_time_cmd));
  5546. iwl4965_setup_rxon_timing(priv);
  5547. ret = iwl_send_cmd_pdu(priv, REPLY_RXON_TIMING,
  5548. sizeof(priv->rxon_timing), &priv->rxon_timing);
  5549. if (ret)
  5550. IWL_WARNING("REPLY_RXON_TIMING failed - "
  5551. "Attempting to continue.\n");
  5552. iwl4965_set_rxon_chain(priv);
  5553. /* FIXME: what should be the assoc_id for AP? */
  5554. priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
  5555. if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
  5556. priv->staging_rxon.flags |=
  5557. RXON_FLG_SHORT_PREAMBLE_MSK;
  5558. else
  5559. priv->staging_rxon.flags &=
  5560. ~RXON_FLG_SHORT_PREAMBLE_MSK;
  5561. if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
  5562. if (priv->assoc_capability &
  5563. WLAN_CAPABILITY_SHORT_SLOT_TIME)
  5564. priv->staging_rxon.flags |=
  5565. RXON_FLG_SHORT_SLOT_MSK;
  5566. else
  5567. priv->staging_rxon.flags &=
  5568. ~RXON_FLG_SHORT_SLOT_MSK;
  5569. if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS)
  5570. priv->staging_rxon.flags &=
  5571. ~RXON_FLG_SHORT_SLOT_MSK;
  5572. }
  5573. /* restore RXON assoc */
  5574. priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
  5575. iwl4965_commit_rxon(priv);
  5576. iwl4965_activate_qos(priv, 1);
  5577. iwl4965_rxon_add_station(priv, iwl4965_broadcast_addr, 0);
  5578. }
  5579. iwl4965_send_beacon_cmd(priv);
  5580. /* FIXME - we need to add code here to detect a totally new
  5581. * configuration, reset the AP, unassoc, rxon timing, assoc,
  5582. * clear sta table, add BCAST sta... */
  5583. }
  5584. static int iwl4965_mac_config_interface(struct ieee80211_hw *hw,
  5585. struct ieee80211_vif *vif,
  5586. struct ieee80211_if_conf *conf)
  5587. {
  5588. struct iwl_priv *priv = hw->priv;
  5589. DECLARE_MAC_BUF(mac);
  5590. unsigned long flags;
  5591. int rc;
  5592. if (conf == NULL)
  5593. return -EIO;
  5594. if (priv->vif != vif) {
  5595. IWL_DEBUG_MAC80211("leave - priv->vif != vif\n");
  5596. mutex_unlock(&priv->mutex);
  5597. return 0;
  5598. }
  5599. if ((priv->iw_mode == IEEE80211_IF_TYPE_AP) &&
  5600. (!conf->beacon || !conf->ssid_len)) {
  5601. IWL_DEBUG_MAC80211
  5602. ("Leaving in AP mode because HostAPD is not ready.\n");
  5603. return 0;
  5604. }
  5605. if (!iwl4965_is_alive(priv))
  5606. return -EAGAIN;
  5607. mutex_lock(&priv->mutex);
  5608. if (conf->bssid)
  5609. IWL_DEBUG_MAC80211("bssid: %s\n",
  5610. print_mac(mac, conf->bssid));
  5611. /*
  5612. * very dubious code was here; the probe filtering flag is never set:
  5613. *
  5614. if (unlikely(test_bit(STATUS_SCANNING, &priv->status)) &&
  5615. !(priv->hw->flags & IEEE80211_HW_NO_PROBE_FILTERING)) {
  5616. */
  5617. if (priv->iw_mode == IEEE80211_IF_TYPE_AP) {
  5618. if (!conf->bssid) {
  5619. conf->bssid = priv->mac_addr;
  5620. memcpy(priv->bssid, priv->mac_addr, ETH_ALEN);
  5621. IWL_DEBUG_MAC80211("bssid was set to: %s\n",
  5622. print_mac(mac, conf->bssid));
  5623. }
  5624. if (priv->ibss_beacon)
  5625. dev_kfree_skb(priv->ibss_beacon);
  5626. priv->ibss_beacon = conf->beacon;
  5627. }
  5628. if (iwl4965_is_rfkill(priv))
  5629. goto done;
  5630. if (conf->bssid && !is_zero_ether_addr(conf->bssid) &&
  5631. !is_multicast_ether_addr(conf->bssid)) {
  5632. /* If there is currently a HW scan going on in the background
  5633. * then we need to cancel it else the RXON below will fail. */
  5634. if (iwl4965_scan_cancel_timeout(priv, 100)) {
  5635. IWL_WARNING("Aborted scan still in progress "
  5636. "after 100ms\n");
  5637. IWL_DEBUG_MAC80211("leaving - scan abort failed.\n");
  5638. mutex_unlock(&priv->mutex);
  5639. return -EAGAIN;
  5640. }
  5641. memcpy(priv->staging_rxon.bssid_addr, conf->bssid, ETH_ALEN);
  5642. /* TODO: Audit driver for usage of these members and see
  5643. * if mac80211 deprecates them (priv->bssid looks like it
  5644. * shouldn't be there, but I haven't scanned the IBSS code
  5645. * to verify) - jpk */
  5646. memcpy(priv->bssid, conf->bssid, ETH_ALEN);
  5647. if (priv->iw_mode == IEEE80211_IF_TYPE_AP)
  5648. iwl4965_config_ap(priv);
  5649. else {
  5650. rc = iwl4965_commit_rxon(priv);
  5651. if ((priv->iw_mode == IEEE80211_IF_TYPE_STA) && rc)
  5652. iwl4965_rxon_add_station(
  5653. priv, priv->active_rxon.bssid_addr, 1);
  5654. }
  5655. } else {
  5656. iwl4965_scan_cancel_timeout(priv, 100);
  5657. priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  5658. iwl4965_commit_rxon(priv);
  5659. }
  5660. done:
  5661. spin_lock_irqsave(&priv->lock, flags);
  5662. if (!conf->ssid_len)
  5663. memset(priv->essid, 0, IW_ESSID_MAX_SIZE);
  5664. else
  5665. memcpy(priv->essid, conf->ssid, conf->ssid_len);
  5666. priv->essid_len = conf->ssid_len;
  5667. spin_unlock_irqrestore(&priv->lock, flags);
  5668. IWL_DEBUG_MAC80211("leave\n");
  5669. mutex_unlock(&priv->mutex);
  5670. return 0;
  5671. }
  5672. static void iwl4965_configure_filter(struct ieee80211_hw *hw,
  5673. unsigned int changed_flags,
  5674. unsigned int *total_flags,
  5675. int mc_count, struct dev_addr_list *mc_list)
  5676. {
  5677. /*
  5678. * XXX: dummy
  5679. * see also iwl4965_connection_init_rx_config
  5680. */
  5681. *total_flags = 0;
  5682. }
  5683. static void iwl4965_mac_remove_interface(struct ieee80211_hw *hw,
  5684. struct ieee80211_if_init_conf *conf)
  5685. {
  5686. struct iwl_priv *priv = hw->priv;
  5687. IWL_DEBUG_MAC80211("enter\n");
  5688. mutex_lock(&priv->mutex);
  5689. if (iwl4965_is_ready_rf(priv)) {
  5690. iwl4965_scan_cancel_timeout(priv, 100);
  5691. cancel_delayed_work(&priv->post_associate);
  5692. priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  5693. iwl4965_commit_rxon(priv);
  5694. }
  5695. if (priv->vif == conf->vif) {
  5696. priv->vif = NULL;
  5697. memset(priv->bssid, 0, ETH_ALEN);
  5698. memset(priv->essid, 0, IW_ESSID_MAX_SIZE);
  5699. priv->essid_len = 0;
  5700. }
  5701. mutex_unlock(&priv->mutex);
  5702. IWL_DEBUG_MAC80211("leave\n");
  5703. }
  5704. static void iwl4965_bss_info_changed(struct ieee80211_hw *hw,
  5705. struct ieee80211_vif *vif,
  5706. struct ieee80211_bss_conf *bss_conf,
  5707. u32 changes)
  5708. {
  5709. struct iwl_priv *priv = hw->priv;
  5710. if (changes & BSS_CHANGED_ERP_PREAMBLE) {
  5711. if (bss_conf->use_short_preamble)
  5712. priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
  5713. else
  5714. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
  5715. }
  5716. if (changes & BSS_CHANGED_ERP_CTS_PROT) {
  5717. if (bss_conf->use_cts_prot && (priv->band != IEEE80211_BAND_5GHZ))
  5718. priv->staging_rxon.flags |= RXON_FLG_TGG_PROTECT_MSK;
  5719. else
  5720. priv->staging_rxon.flags &= ~RXON_FLG_TGG_PROTECT_MSK;
  5721. }
  5722. if (changes & BSS_CHANGED_ASSOC) {
  5723. /*
  5724. * TODO:
  5725. * do stuff instead of sniffing assoc resp
  5726. */
  5727. }
  5728. if (iwl4965_is_associated(priv))
  5729. iwl4965_send_rxon_assoc(priv);
  5730. }
  5731. static int iwl4965_mac_hw_scan(struct ieee80211_hw *hw, u8 *ssid, size_t len)
  5732. {
  5733. int rc = 0;
  5734. unsigned long flags;
  5735. struct iwl_priv *priv = hw->priv;
  5736. IWL_DEBUG_MAC80211("enter\n");
  5737. mutex_lock(&priv->mutex);
  5738. spin_lock_irqsave(&priv->lock, flags);
  5739. if (!iwl4965_is_ready_rf(priv)) {
  5740. rc = -EIO;
  5741. IWL_DEBUG_MAC80211("leave - not ready or exit pending\n");
  5742. goto out_unlock;
  5743. }
  5744. if (priv->iw_mode == IEEE80211_IF_TYPE_AP) { /* APs don't scan */
  5745. rc = -EIO;
  5746. IWL_ERROR("ERROR: APs don't scan\n");
  5747. goto out_unlock;
  5748. }
  5749. /* we don't schedule scan within next_scan_jiffies period */
  5750. if (priv->next_scan_jiffies &&
  5751. time_after(priv->next_scan_jiffies, jiffies)) {
  5752. rc = -EAGAIN;
  5753. goto out_unlock;
  5754. }
  5755. /* if we just finished scan ask for delay */
  5756. if (priv->last_scan_jiffies && time_after(priv->last_scan_jiffies +
  5757. IWL_DELAY_NEXT_SCAN, jiffies)) {
  5758. rc = -EAGAIN;
  5759. goto out_unlock;
  5760. }
  5761. if (len) {
  5762. IWL_DEBUG_SCAN("direct scan for %s [%d]\n ",
  5763. iwl4965_escape_essid(ssid, len), (int)len);
  5764. priv->one_direct_scan = 1;
  5765. priv->direct_ssid_len = (u8)
  5766. min((u8) len, (u8) IW_ESSID_MAX_SIZE);
  5767. memcpy(priv->direct_ssid, ssid, priv->direct_ssid_len);
  5768. } else
  5769. priv->one_direct_scan = 0;
  5770. rc = iwl4965_scan_initiate(priv);
  5771. IWL_DEBUG_MAC80211("leave\n");
  5772. out_unlock:
  5773. spin_unlock_irqrestore(&priv->lock, flags);
  5774. mutex_unlock(&priv->mutex);
  5775. return rc;
  5776. }
  5777. static void iwl4965_mac_update_tkip_key(struct ieee80211_hw *hw,
  5778. struct ieee80211_key_conf *keyconf, const u8 *addr,
  5779. u32 iv32, u16 *phase1key)
  5780. {
  5781. struct iwl_priv *priv = hw->priv;
  5782. u8 sta_id = IWL_INVALID_STATION;
  5783. unsigned long flags;
  5784. __le16 key_flags = 0;
  5785. int i;
  5786. DECLARE_MAC_BUF(mac);
  5787. IWL_DEBUG_MAC80211("enter\n");
  5788. sta_id = iwl4965_hw_find_station(priv, addr);
  5789. if (sta_id == IWL_INVALID_STATION) {
  5790. IWL_DEBUG_MAC80211("leave - %s not in station map.\n",
  5791. print_mac(mac, addr));
  5792. return;
  5793. }
  5794. iwl4965_scan_cancel_timeout(priv, 100);
  5795. key_flags |= (STA_KEY_FLG_TKIP | STA_KEY_FLG_MAP_KEY_MSK);
  5796. key_flags |= cpu_to_le16(keyconf->keyidx << STA_KEY_FLG_KEYID_POS);
  5797. key_flags &= ~STA_KEY_FLG_INVALID;
  5798. if (sta_id == priv->hw_setting.bcast_sta_id)
  5799. key_flags |= STA_KEY_MULTICAST_MSK;
  5800. spin_lock_irqsave(&priv->sta_lock, flags);
  5801. priv->stations[sta_id].sta.key.key_offset =
  5802. (sta_id % STA_KEY_MAX_NUM);/* FIXME */
  5803. priv->stations[sta_id].sta.key.key_flags = key_flags;
  5804. priv->stations[sta_id].sta.key.tkip_rx_tsc_byte2 = (u8) iv32;
  5805. for (i = 0; i < 5; i++)
  5806. priv->stations[sta_id].sta.key.tkip_rx_ttak[i] =
  5807. cpu_to_le16(phase1key[i]);
  5808. priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
  5809. priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
  5810. iwl4965_send_add_station(priv, &priv->stations[sta_id].sta, CMD_ASYNC);
  5811. spin_unlock_irqrestore(&priv->sta_lock, flags);
  5812. IWL_DEBUG_MAC80211("leave\n");
  5813. }
  5814. static int iwl4965_mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
  5815. const u8 *local_addr, const u8 *addr,
  5816. struct ieee80211_key_conf *key)
  5817. {
  5818. struct iwl_priv *priv = hw->priv;
  5819. DECLARE_MAC_BUF(mac);
  5820. int ret = 0;
  5821. u8 sta_id = IWL_INVALID_STATION;
  5822. u8 static_key;
  5823. IWL_DEBUG_MAC80211("enter\n");
  5824. if (!priv->cfg->mod_params->hw_crypto) {
  5825. IWL_DEBUG_MAC80211("leave - hwcrypto disabled\n");
  5826. return -EOPNOTSUPP;
  5827. }
  5828. if (is_zero_ether_addr(addr))
  5829. /* only support pairwise keys */
  5830. return -EOPNOTSUPP;
  5831. /* FIXME: need to differenciate between static and dynamic key
  5832. * in the level of mac80211 */
  5833. static_key = !iwl4965_is_associated(priv);
  5834. if (!static_key) {
  5835. sta_id = iwl4965_hw_find_station(priv, addr);
  5836. if (sta_id == IWL_INVALID_STATION) {
  5837. IWL_DEBUG_MAC80211("leave - %s not in station map.\n",
  5838. print_mac(mac, addr));
  5839. return -EINVAL;
  5840. }
  5841. }
  5842. iwl4965_scan_cancel_timeout(priv, 100);
  5843. switch (cmd) {
  5844. case SET_KEY:
  5845. if (static_key)
  5846. ret = iwl4965_set_static_key(priv, key);
  5847. else
  5848. ret = iwl4965_set_dynamic_key(priv, key, sta_id);
  5849. IWL_DEBUG_MAC80211("enable hwcrypto key\n");
  5850. break;
  5851. case DISABLE_KEY:
  5852. if (static_key)
  5853. ret = iwl4965_remove_static_key(priv);
  5854. else
  5855. ret = iwl4965_clear_sta_key_info(priv, sta_id);
  5856. IWL_DEBUG_MAC80211("disable hwcrypto key\n");
  5857. break;
  5858. default:
  5859. ret = -EINVAL;
  5860. }
  5861. IWL_DEBUG_MAC80211("leave\n");
  5862. return ret;
  5863. }
  5864. static int iwl4965_mac_conf_tx(struct ieee80211_hw *hw, int queue,
  5865. const struct ieee80211_tx_queue_params *params)
  5866. {
  5867. struct iwl_priv *priv = hw->priv;
  5868. unsigned long flags;
  5869. int q;
  5870. IWL_DEBUG_MAC80211("enter\n");
  5871. if (!iwl4965_is_ready_rf(priv)) {
  5872. IWL_DEBUG_MAC80211("leave - RF not ready\n");
  5873. return -EIO;
  5874. }
  5875. if (queue >= AC_NUM) {
  5876. IWL_DEBUG_MAC80211("leave - queue >= AC_NUM %d\n", queue);
  5877. return 0;
  5878. }
  5879. if (!priv->qos_data.qos_enable) {
  5880. priv->qos_data.qos_active = 0;
  5881. IWL_DEBUG_MAC80211("leave - qos not enabled\n");
  5882. return 0;
  5883. }
  5884. q = AC_NUM - 1 - queue;
  5885. spin_lock_irqsave(&priv->lock, flags);
  5886. priv->qos_data.def_qos_parm.ac[q].cw_min = cpu_to_le16(params->cw_min);
  5887. priv->qos_data.def_qos_parm.ac[q].cw_max = cpu_to_le16(params->cw_max);
  5888. priv->qos_data.def_qos_parm.ac[q].aifsn = params->aifs;
  5889. priv->qos_data.def_qos_parm.ac[q].edca_txop =
  5890. cpu_to_le16((params->txop * 32));
  5891. priv->qos_data.def_qos_parm.ac[q].reserved1 = 0;
  5892. priv->qos_data.qos_active = 1;
  5893. spin_unlock_irqrestore(&priv->lock, flags);
  5894. mutex_lock(&priv->mutex);
  5895. if (priv->iw_mode == IEEE80211_IF_TYPE_AP)
  5896. iwl4965_activate_qos(priv, 1);
  5897. else if (priv->assoc_id && iwl4965_is_associated(priv))
  5898. iwl4965_activate_qos(priv, 0);
  5899. mutex_unlock(&priv->mutex);
  5900. IWL_DEBUG_MAC80211("leave\n");
  5901. return 0;
  5902. }
  5903. static int iwl4965_mac_get_tx_stats(struct ieee80211_hw *hw,
  5904. struct ieee80211_tx_queue_stats *stats)
  5905. {
  5906. struct iwl_priv *priv = hw->priv;
  5907. int i, avail;
  5908. struct iwl4965_tx_queue *txq;
  5909. struct iwl4965_queue *q;
  5910. unsigned long flags;
  5911. IWL_DEBUG_MAC80211("enter\n");
  5912. if (!iwl4965_is_ready_rf(priv)) {
  5913. IWL_DEBUG_MAC80211("leave - RF not ready\n");
  5914. return -EIO;
  5915. }
  5916. spin_lock_irqsave(&priv->lock, flags);
  5917. for (i = 0; i < AC_NUM; i++) {
  5918. txq = &priv->txq[i];
  5919. q = &txq->q;
  5920. avail = iwl4965_queue_space(q);
  5921. stats->data[i].len = q->n_window - avail;
  5922. stats->data[i].limit = q->n_window - q->high_mark;
  5923. stats->data[i].count = q->n_window;
  5924. }
  5925. spin_unlock_irqrestore(&priv->lock, flags);
  5926. IWL_DEBUG_MAC80211("leave\n");
  5927. return 0;
  5928. }
  5929. static int iwl4965_mac_get_stats(struct ieee80211_hw *hw,
  5930. struct ieee80211_low_level_stats *stats)
  5931. {
  5932. IWL_DEBUG_MAC80211("enter\n");
  5933. IWL_DEBUG_MAC80211("leave\n");
  5934. return 0;
  5935. }
  5936. static u64 iwl4965_mac_get_tsf(struct ieee80211_hw *hw)
  5937. {
  5938. IWL_DEBUG_MAC80211("enter\n");
  5939. IWL_DEBUG_MAC80211("leave\n");
  5940. return 0;
  5941. }
  5942. static void iwl4965_mac_reset_tsf(struct ieee80211_hw *hw)
  5943. {
  5944. struct iwl_priv *priv = hw->priv;
  5945. unsigned long flags;
  5946. mutex_lock(&priv->mutex);
  5947. IWL_DEBUG_MAC80211("enter\n");
  5948. priv->lq_mngr.lq_ready = 0;
  5949. #ifdef CONFIG_IWL4965_HT
  5950. spin_lock_irqsave(&priv->lock, flags);
  5951. memset(&priv->current_ht_config, 0, sizeof(struct iwl_ht_info));
  5952. spin_unlock_irqrestore(&priv->lock, flags);
  5953. #endif /* CONFIG_IWL4965_HT */
  5954. iwlcore_reset_qos(priv);
  5955. cancel_delayed_work(&priv->post_associate);
  5956. spin_lock_irqsave(&priv->lock, flags);
  5957. priv->assoc_id = 0;
  5958. priv->assoc_capability = 0;
  5959. priv->call_post_assoc_from_beacon = 0;
  5960. priv->assoc_station_added = 0;
  5961. /* new association get rid of ibss beacon skb */
  5962. if (priv->ibss_beacon)
  5963. dev_kfree_skb(priv->ibss_beacon);
  5964. priv->ibss_beacon = NULL;
  5965. priv->beacon_int = priv->hw->conf.beacon_int;
  5966. priv->timestamp1 = 0;
  5967. priv->timestamp0 = 0;
  5968. if ((priv->iw_mode == IEEE80211_IF_TYPE_STA))
  5969. priv->beacon_int = 0;
  5970. spin_unlock_irqrestore(&priv->lock, flags);
  5971. if (!iwl4965_is_ready_rf(priv)) {
  5972. IWL_DEBUG_MAC80211("leave - not ready\n");
  5973. mutex_unlock(&priv->mutex);
  5974. return;
  5975. }
  5976. /* we are restarting association process
  5977. * clear RXON_FILTER_ASSOC_MSK bit
  5978. */
  5979. if (priv->iw_mode != IEEE80211_IF_TYPE_AP) {
  5980. iwl4965_scan_cancel_timeout(priv, 100);
  5981. priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  5982. iwl4965_commit_rxon(priv);
  5983. }
  5984. /* Per mac80211.h: This is only used in IBSS mode... */
  5985. if (priv->iw_mode != IEEE80211_IF_TYPE_IBSS) {
  5986. IWL_DEBUG_MAC80211("leave - not in IBSS\n");
  5987. mutex_unlock(&priv->mutex);
  5988. return;
  5989. }
  5990. priv->only_active_channel = 0;
  5991. iwl4965_set_rate(priv);
  5992. mutex_unlock(&priv->mutex);
  5993. IWL_DEBUG_MAC80211("leave\n");
  5994. }
  5995. static int iwl4965_mac_beacon_update(struct ieee80211_hw *hw, struct sk_buff *skb,
  5996. struct ieee80211_tx_control *control)
  5997. {
  5998. struct iwl_priv *priv = hw->priv;
  5999. unsigned long flags;
  6000. mutex_lock(&priv->mutex);
  6001. IWL_DEBUG_MAC80211("enter\n");
  6002. if (!iwl4965_is_ready_rf(priv)) {
  6003. IWL_DEBUG_MAC80211("leave - RF not ready\n");
  6004. mutex_unlock(&priv->mutex);
  6005. return -EIO;
  6006. }
  6007. if (priv->iw_mode != IEEE80211_IF_TYPE_IBSS) {
  6008. IWL_DEBUG_MAC80211("leave - not IBSS\n");
  6009. mutex_unlock(&priv->mutex);
  6010. return -EIO;
  6011. }
  6012. spin_lock_irqsave(&priv->lock, flags);
  6013. if (priv->ibss_beacon)
  6014. dev_kfree_skb(priv->ibss_beacon);
  6015. priv->ibss_beacon = skb;
  6016. priv->assoc_id = 0;
  6017. IWL_DEBUG_MAC80211("leave\n");
  6018. spin_unlock_irqrestore(&priv->lock, flags);
  6019. iwlcore_reset_qos(priv);
  6020. queue_work(priv->workqueue, &priv->post_associate.work);
  6021. mutex_unlock(&priv->mutex);
  6022. return 0;
  6023. }
  6024. #ifdef CONFIG_IWL4965_HT
  6025. static void iwl4965_ht_info_fill(struct ieee80211_conf *conf,
  6026. struct iwl_priv *priv)
  6027. {
  6028. struct iwl_ht_info *iwl_conf = &priv->current_ht_config;
  6029. struct ieee80211_ht_info *ht_conf = &conf->ht_conf;
  6030. struct ieee80211_ht_bss_info *ht_bss_conf = &conf->ht_bss_conf;
  6031. IWL_DEBUG_MAC80211("enter: \n");
  6032. if (!(conf->flags & IEEE80211_CONF_SUPPORT_HT_MODE)) {
  6033. iwl_conf->is_ht = 0;
  6034. return;
  6035. }
  6036. iwl_conf->is_ht = 1;
  6037. priv->ps_mode = (u8)((ht_conf->cap & IEEE80211_HT_CAP_MIMO_PS) >> 2);
  6038. if (ht_conf->cap & IEEE80211_HT_CAP_SGI_20)
  6039. iwl_conf->sgf |= 0x1;
  6040. if (ht_conf->cap & IEEE80211_HT_CAP_SGI_40)
  6041. iwl_conf->sgf |= 0x2;
  6042. iwl_conf->is_green_field = !!(ht_conf->cap & IEEE80211_HT_CAP_GRN_FLD);
  6043. iwl_conf->max_amsdu_size =
  6044. !!(ht_conf->cap & IEEE80211_HT_CAP_MAX_AMSDU);
  6045. iwl_conf->supported_chan_width =
  6046. !!(ht_conf->cap & IEEE80211_HT_CAP_SUP_WIDTH);
  6047. iwl_conf->extension_chan_offset =
  6048. ht_bss_conf->bss_cap & IEEE80211_HT_IE_CHA_SEC_OFFSET;
  6049. /* If no above or below channel supplied disable FAT channel */
  6050. if (iwl_conf->extension_chan_offset != IWL_EXT_CHANNEL_OFFSET_ABOVE &&
  6051. iwl_conf->extension_chan_offset != IWL_EXT_CHANNEL_OFFSET_BELOW)
  6052. iwl_conf->supported_chan_width = 0;
  6053. iwl_conf->tx_mimo_ps_mode =
  6054. (u8)((ht_conf->cap & IEEE80211_HT_CAP_MIMO_PS) >> 2);
  6055. memcpy(iwl_conf->supp_mcs_set, ht_conf->supp_mcs_set, 16);
  6056. iwl_conf->control_channel = ht_bss_conf->primary_channel;
  6057. iwl_conf->tx_chan_width =
  6058. !!(ht_bss_conf->bss_cap & IEEE80211_HT_IE_CHA_WIDTH);
  6059. iwl_conf->ht_protection =
  6060. ht_bss_conf->bss_op_mode & IEEE80211_HT_IE_HT_PROTECTION;
  6061. iwl_conf->non_GF_STA_present =
  6062. !!(ht_bss_conf->bss_op_mode & IEEE80211_HT_IE_NON_GF_STA_PRSNT);
  6063. IWL_DEBUG_MAC80211("control channel %d\n",
  6064. iwl_conf->control_channel);
  6065. IWL_DEBUG_MAC80211("leave\n");
  6066. }
  6067. static int iwl4965_mac_conf_ht(struct ieee80211_hw *hw,
  6068. struct ieee80211_conf *conf)
  6069. {
  6070. struct iwl_priv *priv = hw->priv;
  6071. IWL_DEBUG_MAC80211("enter: \n");
  6072. iwl4965_ht_info_fill(conf, priv);
  6073. iwl4965_set_rxon_chain(priv);
  6074. if (priv && priv->assoc_id &&
  6075. (priv->iw_mode == IEEE80211_IF_TYPE_STA)) {
  6076. unsigned long flags;
  6077. spin_lock_irqsave(&priv->lock, flags);
  6078. if (priv->beacon_int)
  6079. queue_work(priv->workqueue, &priv->post_associate.work);
  6080. else
  6081. priv->call_post_assoc_from_beacon = 1;
  6082. spin_unlock_irqrestore(&priv->lock, flags);
  6083. }
  6084. IWL_DEBUG_MAC80211("leave:\n");
  6085. return 0;
  6086. }
  6087. #endif /*CONFIG_IWL4965_HT*/
  6088. /*****************************************************************************
  6089. *
  6090. * sysfs attributes
  6091. *
  6092. *****************************************************************************/
  6093. #ifdef CONFIG_IWLWIFI_DEBUG
  6094. /*
  6095. * The following adds a new attribute to the sysfs representation
  6096. * of this device driver (i.e. a new file in /sys/bus/pci/drivers/iwl/)
  6097. * used for controlling the debug level.
  6098. *
  6099. * See the level definitions in iwl for details.
  6100. */
  6101. static ssize_t show_debug_level(struct device_driver *d, char *buf)
  6102. {
  6103. return sprintf(buf, "0x%08X\n", iwl_debug_level);
  6104. }
  6105. static ssize_t store_debug_level(struct device_driver *d,
  6106. const char *buf, size_t count)
  6107. {
  6108. char *p = (char *)buf;
  6109. u32 val;
  6110. val = simple_strtoul(p, &p, 0);
  6111. if (p == buf)
  6112. printk(KERN_INFO DRV_NAME
  6113. ": %s is not in hex or decimal form.\n", buf);
  6114. else
  6115. iwl_debug_level = val;
  6116. return strnlen(buf, count);
  6117. }
  6118. static DRIVER_ATTR(debug_level, S_IWUSR | S_IRUGO,
  6119. show_debug_level, store_debug_level);
  6120. #endif /* CONFIG_IWLWIFI_DEBUG */
  6121. static ssize_t show_rf_kill(struct device *d,
  6122. struct device_attribute *attr, char *buf)
  6123. {
  6124. /*
  6125. * 0 - RF kill not enabled
  6126. * 1 - SW based RF kill active (sysfs)
  6127. * 2 - HW based RF kill active
  6128. * 3 - Both HW and SW based RF kill active
  6129. */
  6130. struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
  6131. int val = (test_bit(STATUS_RF_KILL_SW, &priv->status) ? 0x1 : 0x0) |
  6132. (test_bit(STATUS_RF_KILL_HW, &priv->status) ? 0x2 : 0x0);
  6133. return sprintf(buf, "%i\n", val);
  6134. }
  6135. static ssize_t store_rf_kill(struct device *d,
  6136. struct device_attribute *attr,
  6137. const char *buf, size_t count)
  6138. {
  6139. struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
  6140. mutex_lock(&priv->mutex);
  6141. iwl4965_radio_kill_sw(priv, buf[0] == '1');
  6142. mutex_unlock(&priv->mutex);
  6143. return count;
  6144. }
  6145. static DEVICE_ATTR(rf_kill, S_IWUSR | S_IRUGO, show_rf_kill, store_rf_kill);
  6146. static ssize_t show_temperature(struct device *d,
  6147. struct device_attribute *attr, char *buf)
  6148. {
  6149. struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
  6150. if (!iwl4965_is_alive(priv))
  6151. return -EAGAIN;
  6152. return sprintf(buf, "%d\n", iwl4965_hw_get_temperature(priv));
  6153. }
  6154. static DEVICE_ATTR(temperature, S_IRUGO, show_temperature, NULL);
  6155. static ssize_t show_rs_window(struct device *d,
  6156. struct device_attribute *attr,
  6157. char *buf)
  6158. {
  6159. struct iwl_priv *priv = d->driver_data;
  6160. return iwl4965_fill_rs_info(priv->hw, buf, IWL_AP_ID);
  6161. }
  6162. static DEVICE_ATTR(rs_window, S_IRUGO, show_rs_window, NULL);
  6163. static ssize_t show_tx_power(struct device *d,
  6164. struct device_attribute *attr, char *buf)
  6165. {
  6166. struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
  6167. return sprintf(buf, "%d\n", priv->user_txpower_limit);
  6168. }
  6169. static ssize_t store_tx_power(struct device *d,
  6170. struct device_attribute *attr,
  6171. const char *buf, size_t count)
  6172. {
  6173. struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
  6174. char *p = (char *)buf;
  6175. u32 val;
  6176. val = simple_strtoul(p, &p, 10);
  6177. if (p == buf)
  6178. printk(KERN_INFO DRV_NAME
  6179. ": %s is not in decimal form.\n", buf);
  6180. else
  6181. iwl4965_hw_reg_set_txpower(priv, val);
  6182. return count;
  6183. }
  6184. static DEVICE_ATTR(tx_power, S_IWUSR | S_IRUGO, show_tx_power, store_tx_power);
  6185. static ssize_t show_flags(struct device *d,
  6186. struct device_attribute *attr, char *buf)
  6187. {
  6188. struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
  6189. return sprintf(buf, "0x%04X\n", priv->active_rxon.flags);
  6190. }
  6191. static ssize_t store_flags(struct device *d,
  6192. struct device_attribute *attr,
  6193. const char *buf, size_t count)
  6194. {
  6195. struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
  6196. u32 flags = simple_strtoul(buf, NULL, 0);
  6197. mutex_lock(&priv->mutex);
  6198. if (le32_to_cpu(priv->staging_rxon.flags) != flags) {
  6199. /* Cancel any currently running scans... */
  6200. if (iwl4965_scan_cancel_timeout(priv, 100))
  6201. IWL_WARNING("Could not cancel scan.\n");
  6202. else {
  6203. IWL_DEBUG_INFO("Committing rxon.flags = 0x%04X\n",
  6204. flags);
  6205. priv->staging_rxon.flags = cpu_to_le32(flags);
  6206. iwl4965_commit_rxon(priv);
  6207. }
  6208. }
  6209. mutex_unlock(&priv->mutex);
  6210. return count;
  6211. }
  6212. static DEVICE_ATTR(flags, S_IWUSR | S_IRUGO, show_flags, store_flags);
  6213. static ssize_t show_filter_flags(struct device *d,
  6214. struct device_attribute *attr, char *buf)
  6215. {
  6216. struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
  6217. return sprintf(buf, "0x%04X\n",
  6218. le32_to_cpu(priv->active_rxon.filter_flags));
  6219. }
  6220. static ssize_t store_filter_flags(struct device *d,
  6221. struct device_attribute *attr,
  6222. const char *buf, size_t count)
  6223. {
  6224. struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
  6225. u32 filter_flags = simple_strtoul(buf, NULL, 0);
  6226. mutex_lock(&priv->mutex);
  6227. if (le32_to_cpu(priv->staging_rxon.filter_flags) != filter_flags) {
  6228. /* Cancel any currently running scans... */
  6229. if (iwl4965_scan_cancel_timeout(priv, 100))
  6230. IWL_WARNING("Could not cancel scan.\n");
  6231. else {
  6232. IWL_DEBUG_INFO("Committing rxon.filter_flags = "
  6233. "0x%04X\n", filter_flags);
  6234. priv->staging_rxon.filter_flags =
  6235. cpu_to_le32(filter_flags);
  6236. iwl4965_commit_rxon(priv);
  6237. }
  6238. }
  6239. mutex_unlock(&priv->mutex);
  6240. return count;
  6241. }
  6242. static DEVICE_ATTR(filter_flags, S_IWUSR | S_IRUGO, show_filter_flags,
  6243. store_filter_flags);
  6244. #ifdef CONFIG_IWL4965_SPECTRUM_MEASUREMENT
  6245. static ssize_t show_measurement(struct device *d,
  6246. struct device_attribute *attr, char *buf)
  6247. {
  6248. struct iwl_priv *priv = dev_get_drvdata(d);
  6249. struct iwl4965_spectrum_notification measure_report;
  6250. u32 size = sizeof(measure_report), len = 0, ofs = 0;
  6251. u8 *data = (u8 *) & measure_report;
  6252. unsigned long flags;
  6253. spin_lock_irqsave(&priv->lock, flags);
  6254. if (!(priv->measurement_status & MEASUREMENT_READY)) {
  6255. spin_unlock_irqrestore(&priv->lock, flags);
  6256. return 0;
  6257. }
  6258. memcpy(&measure_report, &priv->measure_report, size);
  6259. priv->measurement_status = 0;
  6260. spin_unlock_irqrestore(&priv->lock, flags);
  6261. while (size && (PAGE_SIZE - len)) {
  6262. hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
  6263. PAGE_SIZE - len, 1);
  6264. len = strlen(buf);
  6265. if (PAGE_SIZE - len)
  6266. buf[len++] = '\n';
  6267. ofs += 16;
  6268. size -= min(size, 16U);
  6269. }
  6270. return len;
  6271. }
  6272. static ssize_t store_measurement(struct device *d,
  6273. struct device_attribute *attr,
  6274. const char *buf, size_t count)
  6275. {
  6276. struct iwl_priv *priv = dev_get_drvdata(d);
  6277. struct ieee80211_measurement_params params = {
  6278. .channel = le16_to_cpu(priv->active_rxon.channel),
  6279. .start_time = cpu_to_le64(priv->last_tsf),
  6280. .duration = cpu_to_le16(1),
  6281. };
  6282. u8 type = IWL_MEASURE_BASIC;
  6283. u8 buffer[32];
  6284. u8 channel;
  6285. if (count) {
  6286. char *p = buffer;
  6287. strncpy(buffer, buf, min(sizeof(buffer), count));
  6288. channel = simple_strtoul(p, NULL, 0);
  6289. if (channel)
  6290. params.channel = channel;
  6291. p = buffer;
  6292. while (*p && *p != ' ')
  6293. p++;
  6294. if (*p)
  6295. type = simple_strtoul(p + 1, NULL, 0);
  6296. }
  6297. IWL_DEBUG_INFO("Invoking measurement of type %d on "
  6298. "channel %d (for '%s')\n", type, params.channel, buf);
  6299. iwl4965_get_measurement(priv, &params, type);
  6300. return count;
  6301. }
  6302. static DEVICE_ATTR(measurement, S_IRUSR | S_IWUSR,
  6303. show_measurement, store_measurement);
  6304. #endif /* CONFIG_IWL4965_SPECTRUM_MEASUREMENT */
  6305. static ssize_t store_retry_rate(struct device *d,
  6306. struct device_attribute *attr,
  6307. const char *buf, size_t count)
  6308. {
  6309. struct iwl_priv *priv = dev_get_drvdata(d);
  6310. priv->retry_rate = simple_strtoul(buf, NULL, 0);
  6311. if (priv->retry_rate <= 0)
  6312. priv->retry_rate = 1;
  6313. return count;
  6314. }
  6315. static ssize_t show_retry_rate(struct device *d,
  6316. struct device_attribute *attr, char *buf)
  6317. {
  6318. struct iwl_priv *priv = dev_get_drvdata(d);
  6319. return sprintf(buf, "%d", priv->retry_rate);
  6320. }
  6321. static DEVICE_ATTR(retry_rate, S_IWUSR | S_IRUSR, show_retry_rate,
  6322. store_retry_rate);
  6323. static ssize_t store_power_level(struct device *d,
  6324. struct device_attribute *attr,
  6325. const char *buf, size_t count)
  6326. {
  6327. struct iwl_priv *priv = dev_get_drvdata(d);
  6328. int rc;
  6329. int mode;
  6330. mode = simple_strtoul(buf, NULL, 0);
  6331. mutex_lock(&priv->mutex);
  6332. if (!iwl4965_is_ready(priv)) {
  6333. rc = -EAGAIN;
  6334. goto out;
  6335. }
  6336. if ((mode < 1) || (mode > IWL_POWER_LIMIT) || (mode == IWL_POWER_AC))
  6337. mode = IWL_POWER_AC;
  6338. else
  6339. mode |= IWL_POWER_ENABLED;
  6340. if (mode != priv->power_mode) {
  6341. rc = iwl4965_send_power_mode(priv, IWL_POWER_LEVEL(mode));
  6342. if (rc) {
  6343. IWL_DEBUG_MAC80211("failed setting power mode.\n");
  6344. goto out;
  6345. }
  6346. priv->power_mode = mode;
  6347. }
  6348. rc = count;
  6349. out:
  6350. mutex_unlock(&priv->mutex);
  6351. return rc;
  6352. }
  6353. #define MAX_WX_STRING 80
  6354. /* Values are in microsecond */
  6355. static const s32 timeout_duration[] = {
  6356. 350000,
  6357. 250000,
  6358. 75000,
  6359. 37000,
  6360. 25000,
  6361. };
  6362. static const s32 period_duration[] = {
  6363. 400000,
  6364. 700000,
  6365. 1000000,
  6366. 1000000,
  6367. 1000000
  6368. };
  6369. static ssize_t show_power_level(struct device *d,
  6370. struct device_attribute *attr, char *buf)
  6371. {
  6372. struct iwl_priv *priv = dev_get_drvdata(d);
  6373. int level = IWL_POWER_LEVEL(priv->power_mode);
  6374. char *p = buf;
  6375. p += sprintf(p, "%d ", level);
  6376. switch (level) {
  6377. case IWL_POWER_MODE_CAM:
  6378. case IWL_POWER_AC:
  6379. p += sprintf(p, "(AC)");
  6380. break;
  6381. case IWL_POWER_BATTERY:
  6382. p += sprintf(p, "(BATTERY)");
  6383. break;
  6384. default:
  6385. p += sprintf(p,
  6386. "(Timeout %dms, Period %dms)",
  6387. timeout_duration[level - 1] / 1000,
  6388. period_duration[level - 1] / 1000);
  6389. }
  6390. if (!(priv->power_mode & IWL_POWER_ENABLED))
  6391. p += sprintf(p, " OFF\n");
  6392. else
  6393. p += sprintf(p, " \n");
  6394. return (p - buf + 1);
  6395. }
  6396. static DEVICE_ATTR(power_level, S_IWUSR | S_IRUSR, show_power_level,
  6397. store_power_level);
  6398. static ssize_t show_channels(struct device *d,
  6399. struct device_attribute *attr, char *buf)
  6400. {
  6401. /* all this shit doesn't belong into sysfs anyway */
  6402. return 0;
  6403. }
  6404. static DEVICE_ATTR(channels, S_IRUSR, show_channels, NULL);
  6405. static ssize_t show_statistics(struct device *d,
  6406. struct device_attribute *attr, char *buf)
  6407. {
  6408. struct iwl_priv *priv = dev_get_drvdata(d);
  6409. u32 size = sizeof(struct iwl4965_notif_statistics);
  6410. u32 len = 0, ofs = 0;
  6411. u8 *data = (u8 *) & priv->statistics;
  6412. int rc = 0;
  6413. if (!iwl4965_is_alive(priv))
  6414. return -EAGAIN;
  6415. mutex_lock(&priv->mutex);
  6416. rc = iwl4965_send_statistics_request(priv);
  6417. mutex_unlock(&priv->mutex);
  6418. if (rc) {
  6419. len = sprintf(buf,
  6420. "Error sending statistics request: 0x%08X\n", rc);
  6421. return len;
  6422. }
  6423. while (size && (PAGE_SIZE - len)) {
  6424. hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
  6425. PAGE_SIZE - len, 1);
  6426. len = strlen(buf);
  6427. if (PAGE_SIZE - len)
  6428. buf[len++] = '\n';
  6429. ofs += 16;
  6430. size -= min(size, 16U);
  6431. }
  6432. return len;
  6433. }
  6434. static DEVICE_ATTR(statistics, S_IRUGO, show_statistics, NULL);
  6435. static ssize_t show_antenna(struct device *d,
  6436. struct device_attribute *attr, char *buf)
  6437. {
  6438. struct iwl_priv *priv = dev_get_drvdata(d);
  6439. if (!iwl4965_is_alive(priv))
  6440. return -EAGAIN;
  6441. return sprintf(buf, "%d\n", priv->antenna);
  6442. }
  6443. static ssize_t store_antenna(struct device *d,
  6444. struct device_attribute *attr,
  6445. const char *buf, size_t count)
  6446. {
  6447. int ant;
  6448. struct iwl_priv *priv = dev_get_drvdata(d);
  6449. if (count == 0)
  6450. return 0;
  6451. if (sscanf(buf, "%1i", &ant) != 1) {
  6452. IWL_DEBUG_INFO("not in hex or decimal form.\n");
  6453. return count;
  6454. }
  6455. if ((ant >= 0) && (ant <= 2)) {
  6456. IWL_DEBUG_INFO("Setting antenna select to %d.\n", ant);
  6457. priv->antenna = (enum iwl4965_antenna)ant;
  6458. } else
  6459. IWL_DEBUG_INFO("Bad antenna select value %d.\n", ant);
  6460. return count;
  6461. }
  6462. static DEVICE_ATTR(antenna, S_IWUSR | S_IRUGO, show_antenna, store_antenna);
  6463. static ssize_t show_status(struct device *d,
  6464. struct device_attribute *attr, char *buf)
  6465. {
  6466. struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
  6467. if (!iwl4965_is_alive(priv))
  6468. return -EAGAIN;
  6469. return sprintf(buf, "0x%08x\n", (int)priv->status);
  6470. }
  6471. static DEVICE_ATTR(status, S_IRUGO, show_status, NULL);
  6472. static ssize_t dump_error_log(struct device *d,
  6473. struct device_attribute *attr,
  6474. const char *buf, size_t count)
  6475. {
  6476. char *p = (char *)buf;
  6477. if (p[0] == '1')
  6478. iwl4965_dump_nic_error_log((struct iwl_priv *)d->driver_data);
  6479. return strnlen(buf, count);
  6480. }
  6481. static DEVICE_ATTR(dump_errors, S_IWUSR, NULL, dump_error_log);
  6482. static ssize_t dump_event_log(struct device *d,
  6483. struct device_attribute *attr,
  6484. const char *buf, size_t count)
  6485. {
  6486. char *p = (char *)buf;
  6487. if (p[0] == '1')
  6488. iwl4965_dump_nic_event_log((struct iwl_priv *)d->driver_data);
  6489. return strnlen(buf, count);
  6490. }
  6491. static DEVICE_ATTR(dump_events, S_IWUSR, NULL, dump_event_log);
  6492. /*****************************************************************************
  6493. *
  6494. * driver setup and teardown
  6495. *
  6496. *****************************************************************************/
  6497. static void iwl4965_setup_deferred_work(struct iwl_priv *priv)
  6498. {
  6499. priv->workqueue = create_workqueue(DRV_NAME);
  6500. init_waitqueue_head(&priv->wait_command_queue);
  6501. INIT_WORK(&priv->up, iwl4965_bg_up);
  6502. INIT_WORK(&priv->restart, iwl4965_bg_restart);
  6503. INIT_WORK(&priv->rx_replenish, iwl4965_bg_rx_replenish);
  6504. INIT_WORK(&priv->scan_completed, iwl4965_bg_scan_completed);
  6505. INIT_WORK(&priv->request_scan, iwl4965_bg_request_scan);
  6506. INIT_WORK(&priv->abort_scan, iwl4965_bg_abort_scan);
  6507. INIT_WORK(&priv->rf_kill, iwl4965_bg_rf_kill);
  6508. INIT_WORK(&priv->beacon_update, iwl4965_bg_beacon_update);
  6509. INIT_DELAYED_WORK(&priv->post_associate, iwl4965_bg_post_associate);
  6510. INIT_DELAYED_WORK(&priv->init_alive_start, iwl4965_bg_init_alive_start);
  6511. INIT_DELAYED_WORK(&priv->alive_start, iwl4965_bg_alive_start);
  6512. INIT_DELAYED_WORK(&priv->scan_check, iwl4965_bg_scan_check);
  6513. iwl4965_hw_setup_deferred_work(priv);
  6514. tasklet_init(&priv->irq_tasklet, (void (*)(unsigned long))
  6515. iwl4965_irq_tasklet, (unsigned long)priv);
  6516. }
  6517. static void iwl4965_cancel_deferred_work(struct iwl_priv *priv)
  6518. {
  6519. iwl4965_hw_cancel_deferred_work(priv);
  6520. cancel_delayed_work_sync(&priv->init_alive_start);
  6521. cancel_delayed_work(&priv->scan_check);
  6522. cancel_delayed_work(&priv->alive_start);
  6523. cancel_delayed_work(&priv->post_associate);
  6524. cancel_work_sync(&priv->beacon_update);
  6525. }
  6526. static struct attribute *iwl4965_sysfs_entries[] = {
  6527. &dev_attr_antenna.attr,
  6528. &dev_attr_channels.attr,
  6529. &dev_attr_dump_errors.attr,
  6530. &dev_attr_dump_events.attr,
  6531. &dev_attr_flags.attr,
  6532. &dev_attr_filter_flags.attr,
  6533. #ifdef CONFIG_IWL4965_SPECTRUM_MEASUREMENT
  6534. &dev_attr_measurement.attr,
  6535. #endif
  6536. &dev_attr_power_level.attr,
  6537. &dev_attr_retry_rate.attr,
  6538. &dev_attr_rf_kill.attr,
  6539. &dev_attr_rs_window.attr,
  6540. &dev_attr_statistics.attr,
  6541. &dev_attr_status.attr,
  6542. &dev_attr_temperature.attr,
  6543. &dev_attr_tx_power.attr,
  6544. NULL
  6545. };
  6546. static struct attribute_group iwl4965_attribute_group = {
  6547. .name = NULL, /* put in device directory */
  6548. .attrs = iwl4965_sysfs_entries,
  6549. };
  6550. static struct ieee80211_ops iwl4965_hw_ops = {
  6551. .tx = iwl4965_mac_tx,
  6552. .start = iwl4965_mac_start,
  6553. .stop = iwl4965_mac_stop,
  6554. .add_interface = iwl4965_mac_add_interface,
  6555. .remove_interface = iwl4965_mac_remove_interface,
  6556. .config = iwl4965_mac_config,
  6557. .config_interface = iwl4965_mac_config_interface,
  6558. .configure_filter = iwl4965_configure_filter,
  6559. .set_key = iwl4965_mac_set_key,
  6560. .update_tkip_key = iwl4965_mac_update_tkip_key,
  6561. .get_stats = iwl4965_mac_get_stats,
  6562. .get_tx_stats = iwl4965_mac_get_tx_stats,
  6563. .conf_tx = iwl4965_mac_conf_tx,
  6564. .get_tsf = iwl4965_mac_get_tsf,
  6565. .reset_tsf = iwl4965_mac_reset_tsf,
  6566. .beacon_update = iwl4965_mac_beacon_update,
  6567. .bss_info_changed = iwl4965_bss_info_changed,
  6568. #ifdef CONFIG_IWL4965_HT
  6569. .conf_ht = iwl4965_mac_conf_ht,
  6570. .ampdu_action = iwl4965_mac_ampdu_action,
  6571. #endif /* CONFIG_IWL4965_HT */
  6572. .hw_scan = iwl4965_mac_hw_scan
  6573. };
  6574. static int iwl4965_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
  6575. {
  6576. int err = 0;
  6577. struct iwl_priv *priv;
  6578. struct ieee80211_hw *hw;
  6579. struct iwl_cfg *cfg = (struct iwl_cfg *)(ent->driver_data);
  6580. DECLARE_MAC_BUF(mac);
  6581. /************************
  6582. * 1. Allocating HW data
  6583. ************************/
  6584. /* Disabling hardware scan means that mac80211 will perform scans
  6585. * "the hard way", rather than using device's scan. */
  6586. if (cfg->mod_params->disable_hw_scan) {
  6587. IWL_DEBUG_INFO("Disabling hw_scan\n");
  6588. iwl4965_hw_ops.hw_scan = NULL;
  6589. }
  6590. hw = iwl_alloc_all(cfg, &iwl4965_hw_ops);
  6591. if (!hw) {
  6592. err = -ENOMEM;
  6593. goto out;
  6594. }
  6595. priv = hw->priv;
  6596. /* At this point both hw and priv are allocated. */
  6597. SET_IEEE80211_DEV(hw, &pdev->dev);
  6598. IWL_DEBUG_INFO("*** LOAD DRIVER ***\n");
  6599. priv->cfg = cfg;
  6600. priv->pci_dev = pdev;
  6601. #ifdef CONFIG_IWLWIFI_DEBUG
  6602. iwl_debug_level = priv->cfg->mod_params->debug;
  6603. atomic_set(&priv->restrict_refcnt, 0);
  6604. #endif
  6605. /**************************
  6606. * 2. Initializing PCI bus
  6607. **************************/
  6608. if (pci_enable_device(pdev)) {
  6609. err = -ENODEV;
  6610. goto out_ieee80211_free_hw;
  6611. }
  6612. pci_set_master(pdev);
  6613. err = pci_set_dma_mask(pdev, DMA_32BIT_MASK);
  6614. if (!err)
  6615. err = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK);
  6616. if (err) {
  6617. printk(KERN_WARNING DRV_NAME
  6618. ": No suitable DMA available.\n");
  6619. goto out_pci_disable_device;
  6620. }
  6621. err = pci_request_regions(pdev, DRV_NAME);
  6622. if (err)
  6623. goto out_pci_disable_device;
  6624. pci_set_drvdata(pdev, priv);
  6625. /* We disable the RETRY_TIMEOUT register (0x41) to keep
  6626. * PCI Tx retries from interfering with C3 CPU state */
  6627. pci_write_config_byte(pdev, 0x41, 0x00);
  6628. /***********************
  6629. * 3. Read REV register
  6630. ***********************/
  6631. priv->hw_base = pci_iomap(pdev, 0, 0);
  6632. if (!priv->hw_base) {
  6633. err = -ENODEV;
  6634. goto out_pci_release_regions;
  6635. }
  6636. IWL_DEBUG_INFO("pci_resource_len = 0x%08llx\n",
  6637. (unsigned long long) pci_resource_len(pdev, 0));
  6638. IWL_DEBUG_INFO("pci_resource_base = %p\n", priv->hw_base);
  6639. printk(KERN_INFO DRV_NAME
  6640. ": Detected Intel Wireless WiFi Link %s\n", priv->cfg->name);
  6641. /*****************
  6642. * 4. Read EEPROM
  6643. *****************/
  6644. /* nic init */
  6645. iwl4965_set_bit(priv, CSR_GIO_CHICKEN_BITS,
  6646. CSR_GIO_CHICKEN_BITS_REG_BIT_DIS_L0S_EXIT_TIMER);
  6647. iwl4965_set_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
  6648. err = iwl4965_poll_bit(priv, CSR_GP_CNTRL,
  6649. CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY,
  6650. CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, 25000);
  6651. if (err < 0) {
  6652. IWL_DEBUG_INFO("Failed to init the card\n");
  6653. goto out_iounmap;
  6654. }
  6655. /* Read the EEPROM */
  6656. err = iwl_eeprom_init(priv);
  6657. if (err) {
  6658. IWL_ERROR("Unable to init EEPROM\n");
  6659. goto out_iounmap;
  6660. }
  6661. /* MAC Address location in EEPROM same for 3945/4965 */
  6662. iwl_eeprom_get_mac(priv, priv->mac_addr);
  6663. IWL_DEBUG_INFO("MAC address: %s\n", print_mac(mac, priv->mac_addr));
  6664. SET_IEEE80211_PERM_ADDR(priv->hw, priv->mac_addr);
  6665. /************************
  6666. * 5. Setup HW constants
  6667. ************************/
  6668. /* Device-specific setup */
  6669. if (iwl4965_hw_set_hw_setting(priv)) {
  6670. IWL_ERROR("failed to set hw settings\n");
  6671. goto out_iounmap;
  6672. }
  6673. /*******************
  6674. * 6. Setup hw/priv
  6675. *******************/
  6676. err = iwl_setup(priv);
  6677. if (err)
  6678. goto out_unset_hw_settings;
  6679. /* At this point both hw and priv are initialized. */
  6680. /**********************************
  6681. * 7. Initialize module parameters
  6682. **********************************/
  6683. /* Disable radio (SW RF KILL) via parameter when loading driver */
  6684. if (priv->cfg->mod_params->disable) {
  6685. set_bit(STATUS_RF_KILL_SW, &priv->status);
  6686. IWL_DEBUG_INFO("Radio disabled.\n");
  6687. }
  6688. if (priv->cfg->mod_params->enable_qos)
  6689. priv->qos_data.qos_enable = 1;
  6690. /********************
  6691. * 8. Setup services
  6692. ********************/
  6693. iwl4965_disable_interrupts(priv);
  6694. err = sysfs_create_group(&pdev->dev.kobj, &iwl4965_attribute_group);
  6695. if (err) {
  6696. IWL_ERROR("failed to create sysfs device attributes\n");
  6697. goto out_unset_hw_settings;
  6698. }
  6699. err = iwl_dbgfs_register(priv, DRV_NAME);
  6700. if (err) {
  6701. IWL_ERROR("failed to create debugfs files\n");
  6702. goto out_remove_sysfs;
  6703. }
  6704. iwl4965_setup_deferred_work(priv);
  6705. iwl4965_setup_rx_handlers(priv);
  6706. /********************
  6707. * 9. Conclude
  6708. ********************/
  6709. pci_save_state(pdev);
  6710. pci_disable_device(pdev);
  6711. return 0;
  6712. out_remove_sysfs:
  6713. sysfs_remove_group(&pdev->dev.kobj, &iwl4965_attribute_group);
  6714. out_unset_hw_settings:
  6715. iwl4965_unset_hw_setting(priv);
  6716. out_iounmap:
  6717. pci_iounmap(pdev, priv->hw_base);
  6718. out_pci_release_regions:
  6719. pci_release_regions(pdev);
  6720. pci_set_drvdata(pdev, NULL);
  6721. out_pci_disable_device:
  6722. pci_disable_device(pdev);
  6723. out_ieee80211_free_hw:
  6724. ieee80211_free_hw(priv->hw);
  6725. out:
  6726. return err;
  6727. }
  6728. static void iwl4965_pci_remove(struct pci_dev *pdev)
  6729. {
  6730. struct iwl_priv *priv = pci_get_drvdata(pdev);
  6731. struct list_head *p, *q;
  6732. int i;
  6733. if (!priv)
  6734. return;
  6735. IWL_DEBUG_INFO("*** UNLOAD DRIVER ***\n");
  6736. set_bit(STATUS_EXIT_PENDING, &priv->status);
  6737. iwl4965_down(priv);
  6738. /* Free MAC hash list for ADHOC */
  6739. for (i = 0; i < IWL_IBSS_MAC_HASH_SIZE; i++) {
  6740. list_for_each_safe(p, q, &priv->ibss_mac_hash[i]) {
  6741. list_del(p);
  6742. kfree(list_entry(p, struct iwl4965_ibss_seq, list));
  6743. }
  6744. }
  6745. iwl_dbgfs_unregister(priv);
  6746. sysfs_remove_group(&pdev->dev.kobj, &iwl4965_attribute_group);
  6747. iwl4965_dealloc_ucode_pci(priv);
  6748. if (priv->rxq.bd)
  6749. iwl4965_rx_queue_free(priv, &priv->rxq);
  6750. iwl4965_hw_txq_ctx_free(priv);
  6751. iwl4965_unset_hw_setting(priv);
  6752. iwlcore_clear_stations_table(priv);
  6753. if (priv->mac80211_registered) {
  6754. ieee80211_unregister_hw(priv->hw);
  6755. iwl4965_rate_control_unregister(priv->hw);
  6756. }
  6757. /*netif_stop_queue(dev); */
  6758. flush_workqueue(priv->workqueue);
  6759. /* ieee80211_unregister_hw calls iwl4965_mac_stop, which flushes
  6760. * priv->workqueue... so we can't take down the workqueue
  6761. * until now... */
  6762. destroy_workqueue(priv->workqueue);
  6763. priv->workqueue = NULL;
  6764. pci_iounmap(pdev, priv->hw_base);
  6765. pci_release_regions(pdev);
  6766. pci_disable_device(pdev);
  6767. pci_set_drvdata(pdev, NULL);
  6768. iwl_free_channel_map(priv);
  6769. iwl4965_free_geos(priv);
  6770. if (priv->ibss_beacon)
  6771. dev_kfree_skb(priv->ibss_beacon);
  6772. ieee80211_free_hw(priv->hw);
  6773. }
  6774. #ifdef CONFIG_PM
  6775. static int iwl4965_pci_suspend(struct pci_dev *pdev, pm_message_t state)
  6776. {
  6777. struct iwl_priv *priv = pci_get_drvdata(pdev);
  6778. if (priv->is_open) {
  6779. set_bit(STATUS_IN_SUSPEND, &priv->status);
  6780. iwl4965_mac_stop(priv->hw);
  6781. priv->is_open = 1;
  6782. }
  6783. pci_set_power_state(pdev, PCI_D3hot);
  6784. return 0;
  6785. }
  6786. static int iwl4965_pci_resume(struct pci_dev *pdev)
  6787. {
  6788. struct iwl_priv *priv = pci_get_drvdata(pdev);
  6789. pci_set_power_state(pdev, PCI_D0);
  6790. if (priv->is_open)
  6791. iwl4965_mac_start(priv->hw);
  6792. clear_bit(STATUS_IN_SUSPEND, &priv->status);
  6793. return 0;
  6794. }
  6795. #endif /* CONFIG_PM */
  6796. /*****************************************************************************
  6797. *
  6798. * driver and module entry point
  6799. *
  6800. *****************************************************************************/
  6801. static struct pci_driver iwl4965_driver = {
  6802. .name = DRV_NAME,
  6803. .id_table = iwl4965_hw_card_ids,
  6804. .probe = iwl4965_pci_probe,
  6805. .remove = __devexit_p(iwl4965_pci_remove),
  6806. #ifdef CONFIG_PM
  6807. .suspend = iwl4965_pci_suspend,
  6808. .resume = iwl4965_pci_resume,
  6809. #endif
  6810. };
  6811. static int __init iwl4965_init(void)
  6812. {
  6813. int ret;
  6814. printk(KERN_INFO DRV_NAME ": " DRV_DESCRIPTION ", " DRV_VERSION "\n");
  6815. printk(KERN_INFO DRV_NAME ": " DRV_COPYRIGHT "\n");
  6816. ret = pci_register_driver(&iwl4965_driver);
  6817. if (ret) {
  6818. IWL_ERROR("Unable to initialize PCI module\n");
  6819. return ret;
  6820. }
  6821. #ifdef CONFIG_IWLWIFI_DEBUG
  6822. ret = driver_create_file(&iwl4965_driver.driver, &driver_attr_debug_level);
  6823. if (ret) {
  6824. IWL_ERROR("Unable to create driver sysfs file\n");
  6825. pci_unregister_driver(&iwl4965_driver);
  6826. return ret;
  6827. }
  6828. #endif
  6829. return ret;
  6830. }
  6831. static void __exit iwl4965_exit(void)
  6832. {
  6833. #ifdef CONFIG_IWLWIFI_DEBUG
  6834. driver_remove_file(&iwl4965_driver.driver, &driver_attr_debug_level);
  6835. #endif
  6836. pci_unregister_driver(&iwl4965_driver);
  6837. }
  6838. module_exit(iwl4965_exit);
  6839. module_init(iwl4965_init);