common.c 7.9 KB

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  1. /*
  2. * arch/arm/mach-dove/common.c
  3. *
  4. * Core functions for Marvell Dove 88AP510 System On Chip
  5. *
  6. * This file is licensed under the terms of the GNU General Public
  7. * License version 2. This program is licensed "as is" without any
  8. * warranty of any kind, whether express or implied.
  9. */
  10. #include <linux/kernel.h>
  11. #include <linux/delay.h>
  12. #include <linux/init.h>
  13. #include <linux/platform_device.h>
  14. #include <linux/pci.h>
  15. #include <linux/serial_8250.h>
  16. #include <linux/clk.h>
  17. #include <linux/mbus.h>
  18. #include <linux/ata_platform.h>
  19. #include <linux/serial_8250.h>
  20. #include <linux/gpio.h>
  21. #include <asm/page.h>
  22. #include <asm/setup.h>
  23. #include <asm/timex.h>
  24. #include <asm/hardware/cache-tauros2.h>
  25. #include <asm/mach/map.h>
  26. #include <asm/mach/time.h>
  27. #include <asm/mach/pci.h>
  28. #include <mach/dove.h>
  29. #include <mach/bridge-regs.h>
  30. #include <asm/mach/arch.h>
  31. #include <linux/irq.h>
  32. #include <plat/time.h>
  33. #include <plat/common.h>
  34. #include "common.h"
  35. static int get_tclk(void);
  36. /*****************************************************************************
  37. * I/O Address Mapping
  38. ****************************************************************************/
  39. static struct map_desc dove_io_desc[] __initdata = {
  40. {
  41. .virtual = DOVE_SB_REGS_VIRT_BASE,
  42. .pfn = __phys_to_pfn(DOVE_SB_REGS_PHYS_BASE),
  43. .length = DOVE_SB_REGS_SIZE,
  44. .type = MT_DEVICE,
  45. }, {
  46. .virtual = DOVE_NB_REGS_VIRT_BASE,
  47. .pfn = __phys_to_pfn(DOVE_NB_REGS_PHYS_BASE),
  48. .length = DOVE_NB_REGS_SIZE,
  49. .type = MT_DEVICE,
  50. }, {
  51. .virtual = DOVE_PCIE0_IO_VIRT_BASE,
  52. .pfn = __phys_to_pfn(DOVE_PCIE0_IO_PHYS_BASE),
  53. .length = DOVE_PCIE0_IO_SIZE,
  54. .type = MT_DEVICE,
  55. }, {
  56. .virtual = DOVE_PCIE1_IO_VIRT_BASE,
  57. .pfn = __phys_to_pfn(DOVE_PCIE1_IO_PHYS_BASE),
  58. .length = DOVE_PCIE1_IO_SIZE,
  59. .type = MT_DEVICE,
  60. },
  61. };
  62. void __init dove_map_io(void)
  63. {
  64. iotable_init(dove_io_desc, ARRAY_SIZE(dove_io_desc));
  65. }
  66. /*****************************************************************************
  67. * EHCI0
  68. ****************************************************************************/
  69. void __init dove_ehci0_init(void)
  70. {
  71. orion_ehci_init(&dove_mbus_dram_info,
  72. DOVE_USB0_PHYS_BASE, IRQ_DOVE_USB0);
  73. }
  74. /*****************************************************************************
  75. * EHCI1
  76. ****************************************************************************/
  77. void __init dove_ehci1_init(void)
  78. {
  79. orion_ehci_1_init(&dove_mbus_dram_info,
  80. DOVE_USB1_PHYS_BASE, IRQ_DOVE_USB1);
  81. }
  82. /*****************************************************************************
  83. * GE00
  84. ****************************************************************************/
  85. void __init dove_ge00_init(struct mv643xx_eth_platform_data *eth_data)
  86. {
  87. orion_ge00_init(eth_data, &dove_mbus_dram_info,
  88. DOVE_GE00_PHYS_BASE, IRQ_DOVE_GE00_SUM,
  89. 0, get_tclk());
  90. }
  91. /*****************************************************************************
  92. * SoC RTC
  93. ****************************************************************************/
  94. void __init dove_rtc_init(void)
  95. {
  96. orion_rtc_init(DOVE_RTC_PHYS_BASE, IRQ_DOVE_RTC);
  97. }
  98. /*****************************************************************************
  99. * SATA
  100. ****************************************************************************/
  101. void __init dove_sata_init(struct mv_sata_platform_data *sata_data)
  102. {
  103. orion_sata_init(sata_data, &dove_mbus_dram_info,
  104. DOVE_SATA_PHYS_BASE, IRQ_DOVE_SATA);
  105. }
  106. /*****************************************************************************
  107. * UART0
  108. ****************************************************************************/
  109. void __init dove_uart0_init(void)
  110. {
  111. orion_uart0_init(DOVE_UART0_VIRT_BASE, DOVE_UART0_PHYS_BASE,
  112. IRQ_DOVE_UART_0, get_tclk());
  113. }
  114. /*****************************************************************************
  115. * UART1
  116. ****************************************************************************/
  117. void __init dove_uart1_init(void)
  118. {
  119. orion_uart1_init(DOVE_UART1_VIRT_BASE, DOVE_UART1_PHYS_BASE,
  120. IRQ_DOVE_UART_1, get_tclk());
  121. }
  122. /*****************************************************************************
  123. * UART2
  124. ****************************************************************************/
  125. void __init dove_uart2_init(void)
  126. {
  127. orion_uart2_init(DOVE_UART2_VIRT_BASE, DOVE_UART2_PHYS_BASE,
  128. IRQ_DOVE_UART_2, get_tclk());
  129. }
  130. /*****************************************************************************
  131. * UART3
  132. ****************************************************************************/
  133. void __init dove_uart3_init(void)
  134. {
  135. orion_uart3_init(DOVE_UART3_VIRT_BASE, DOVE_UART3_PHYS_BASE,
  136. IRQ_DOVE_UART_3, get_tclk());
  137. }
  138. /*****************************************************************************
  139. * SPI
  140. ****************************************************************************/
  141. void __init dove_spi0_init(void)
  142. {
  143. orion_spi_init(DOVE_SPI0_PHYS_BASE, get_tclk());
  144. }
  145. void __init dove_spi1_init(void)
  146. {
  147. orion_spi_init(DOVE_SPI1_PHYS_BASE, get_tclk());
  148. }
  149. /*****************************************************************************
  150. * I2C
  151. ****************************************************************************/
  152. void __init dove_i2c_init(void)
  153. {
  154. orion_i2c_init(DOVE_I2C_PHYS_BASE, IRQ_DOVE_I2C, 10);
  155. }
  156. /*****************************************************************************
  157. * Time handling
  158. ****************************************************************************/
  159. void __init dove_init_early(void)
  160. {
  161. orion_time_set_base(TIMER_VIRT_BASE);
  162. }
  163. static int get_tclk(void)
  164. {
  165. /* use DOVE_RESET_SAMPLE_HI/LO to detect tclk */
  166. return 166666667;
  167. }
  168. static void dove_timer_init(void)
  169. {
  170. orion_time_init(BRIDGE_VIRT_BASE, BRIDGE_INT_TIMER1_CLR,
  171. IRQ_DOVE_BRIDGE, get_tclk());
  172. }
  173. struct sys_timer dove_timer = {
  174. .init = dove_timer_init,
  175. };
  176. /*****************************************************************************
  177. * XOR 0
  178. ****************************************************************************/
  179. void __init dove_xor0_init(void)
  180. {
  181. orion_xor0_init(&dove_mbus_dram_info,
  182. DOVE_XOR0_PHYS_BASE, DOVE_XOR0_HIGH_PHYS_BASE,
  183. IRQ_DOVE_XOR_00, IRQ_DOVE_XOR_01);
  184. }
  185. /*****************************************************************************
  186. * XOR 1
  187. ****************************************************************************/
  188. void __init dove_xor1_init(void)
  189. {
  190. orion_xor1_init(DOVE_XOR1_PHYS_BASE, DOVE_XOR1_HIGH_PHYS_BASE,
  191. IRQ_DOVE_XOR_10, IRQ_DOVE_XOR_11);
  192. }
  193. /*****************************************************************************
  194. * SDIO
  195. ****************************************************************************/
  196. static u64 sdio_dmamask = DMA_BIT_MASK(32);
  197. static struct resource dove_sdio0_resources[] = {
  198. {
  199. .start = DOVE_SDIO0_PHYS_BASE,
  200. .end = DOVE_SDIO0_PHYS_BASE + 0xff,
  201. .flags = IORESOURCE_MEM,
  202. }, {
  203. .start = IRQ_DOVE_SDIO0,
  204. .end = IRQ_DOVE_SDIO0,
  205. .flags = IORESOURCE_IRQ,
  206. },
  207. };
  208. static struct platform_device dove_sdio0 = {
  209. .name = "sdhci-dove",
  210. .id = 0,
  211. .dev = {
  212. .dma_mask = &sdio_dmamask,
  213. .coherent_dma_mask = DMA_BIT_MASK(32),
  214. },
  215. .resource = dove_sdio0_resources,
  216. .num_resources = ARRAY_SIZE(dove_sdio0_resources),
  217. };
  218. void __init dove_sdio0_init(void)
  219. {
  220. platform_device_register(&dove_sdio0);
  221. }
  222. static struct resource dove_sdio1_resources[] = {
  223. {
  224. .start = DOVE_SDIO1_PHYS_BASE,
  225. .end = DOVE_SDIO1_PHYS_BASE + 0xff,
  226. .flags = IORESOURCE_MEM,
  227. }, {
  228. .start = IRQ_DOVE_SDIO1,
  229. .end = IRQ_DOVE_SDIO1,
  230. .flags = IORESOURCE_IRQ,
  231. },
  232. };
  233. static struct platform_device dove_sdio1 = {
  234. .name = "sdhci-dove",
  235. .id = 1,
  236. .dev = {
  237. .dma_mask = &sdio_dmamask,
  238. .coherent_dma_mask = DMA_BIT_MASK(32),
  239. },
  240. .resource = dove_sdio1_resources,
  241. .num_resources = ARRAY_SIZE(dove_sdio1_resources),
  242. };
  243. void __init dove_sdio1_init(void)
  244. {
  245. platform_device_register(&dove_sdio1);
  246. }
  247. void __init dove_init(void)
  248. {
  249. int tclk;
  250. tclk = get_tclk();
  251. printk(KERN_INFO "Dove 88AP510 SoC, ");
  252. printk(KERN_INFO "TCLK = %dMHz\n", (tclk + 499999) / 1000000);
  253. #ifdef CONFIG_CACHE_TAUROS2
  254. tauros2_init();
  255. #endif
  256. dove_setup_cpu_mbus();
  257. /* internal devices that every board has */
  258. dove_rtc_init();
  259. dove_xor0_init();
  260. dove_xor1_init();
  261. }