intel_lvds.c 37 KB

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  1. /*
  2. * Copyright © 2006-2007 Intel Corporation
  3. * Copyright (c) 2006 Dave Airlie <airlied@linux.ie>
  4. *
  5. * Permission is hereby granted, free of charge, to any person obtaining a
  6. * copy of this software and associated documentation files (the "Software"),
  7. * to deal in the Software without restriction, including without limitation
  8. * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  9. * and/or sell copies of the Software, and to permit persons to whom the
  10. * Software is furnished to do so, subject to the following conditions:
  11. *
  12. * The above copyright notice and this permission notice (including the next
  13. * paragraph) shall be included in all copies or substantial portions of the
  14. * Software.
  15. *
  16. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18. * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  19. * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  20. * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  21. * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  22. * DEALINGS IN THE SOFTWARE.
  23. *
  24. * Authors:
  25. * Eric Anholt <eric@anholt.net>
  26. * Dave Airlie <airlied@linux.ie>
  27. * Jesse Barnes <jesse.barnes@intel.com>
  28. */
  29. #include <acpi/button.h>
  30. #include <linux/dmi.h>
  31. #include <linux/i2c.h>
  32. #include <linux/slab.h>
  33. #include <drm/drmP.h>
  34. #include <drm/drm_crtc.h>
  35. #include <drm/drm_edid.h>
  36. #include "intel_drv.h"
  37. #include <drm/i915_drm.h>
  38. #include "i915_drv.h"
  39. #include <linux/acpi.h>
  40. /* Private structure for the integrated LVDS support */
  41. struct intel_lvds_connector {
  42. struct intel_connector base;
  43. struct notifier_block lid_notifier;
  44. };
  45. struct intel_lvds_encoder {
  46. struct intel_encoder base;
  47. u32 pfit_control;
  48. u32 pfit_pgm_ratios;
  49. bool is_dual_link;
  50. u32 reg;
  51. struct intel_lvds_connector *attached_connector;
  52. };
  53. static struct intel_lvds_encoder *to_lvds_encoder(struct drm_encoder *encoder)
  54. {
  55. return container_of(encoder, struct intel_lvds_encoder, base.base);
  56. }
  57. static struct intel_lvds_connector *to_lvds_connector(struct drm_connector *connector)
  58. {
  59. return container_of(connector, struct intel_lvds_connector, base.base);
  60. }
  61. static bool intel_lvds_get_hw_state(struct intel_encoder *encoder,
  62. enum pipe *pipe)
  63. {
  64. struct drm_device *dev = encoder->base.dev;
  65. struct drm_i915_private *dev_priv = dev->dev_private;
  66. struct intel_lvds_encoder *lvds_encoder = to_lvds_encoder(&encoder->base);
  67. u32 tmp;
  68. tmp = I915_READ(lvds_encoder->reg);
  69. if (!(tmp & LVDS_PORT_EN))
  70. return false;
  71. if (HAS_PCH_CPT(dev))
  72. *pipe = PORT_TO_PIPE_CPT(tmp);
  73. else
  74. *pipe = PORT_TO_PIPE(tmp);
  75. return true;
  76. }
  77. /* The LVDS pin pair needs to be on before the DPLLs are enabled.
  78. * This is an exception to the general rule that mode_set doesn't turn
  79. * things on.
  80. */
  81. static void intel_pre_pll_enable_lvds(struct intel_encoder *encoder)
  82. {
  83. struct intel_lvds_encoder *lvds_encoder = to_lvds_encoder(&encoder->base);
  84. struct drm_device *dev = encoder->base.dev;
  85. struct drm_i915_private *dev_priv = dev->dev_private;
  86. struct intel_crtc *intel_crtc = to_intel_crtc(encoder->base.crtc);
  87. struct drm_display_mode *fixed_mode =
  88. lvds_encoder->attached_connector->base.panel.fixed_mode;
  89. int pipe = intel_crtc->pipe;
  90. u32 temp;
  91. temp = I915_READ(lvds_encoder->reg);
  92. temp |= LVDS_PORT_EN | LVDS_A0A2_CLKA_POWER_UP;
  93. if (HAS_PCH_CPT(dev)) {
  94. temp &= ~PORT_TRANS_SEL_MASK;
  95. temp |= PORT_TRANS_SEL_CPT(pipe);
  96. } else {
  97. if (pipe == 1) {
  98. temp |= LVDS_PIPEB_SELECT;
  99. } else {
  100. temp &= ~LVDS_PIPEB_SELECT;
  101. }
  102. }
  103. /* set the corresponsding LVDS_BORDER bit */
  104. temp |= dev_priv->lvds_border_bits;
  105. /* Set the B0-B3 data pairs corresponding to whether we're going to
  106. * set the DPLLs for dual-channel mode or not.
  107. */
  108. if (lvds_encoder->is_dual_link)
  109. temp |= LVDS_B0B3_POWER_UP | LVDS_CLKB_POWER_UP;
  110. else
  111. temp &= ~(LVDS_B0B3_POWER_UP | LVDS_CLKB_POWER_UP);
  112. /* It would be nice to set 24 vs 18-bit mode (LVDS_A3_POWER_UP)
  113. * appropriately here, but we need to look more thoroughly into how
  114. * panels behave in the two modes.
  115. */
  116. /* Set the dithering flag on LVDS as needed, note that there is no
  117. * special lvds dither control bit on pch-split platforms, dithering is
  118. * only controlled through the PIPECONF reg. */
  119. if (INTEL_INFO(dev)->gen == 4) {
  120. if (dev_priv->lvds_dither)
  121. temp |= LVDS_ENABLE_DITHER;
  122. else
  123. temp &= ~LVDS_ENABLE_DITHER;
  124. }
  125. temp &= ~(LVDS_HSYNC_POLARITY | LVDS_VSYNC_POLARITY);
  126. if (fixed_mode->flags & DRM_MODE_FLAG_NHSYNC)
  127. temp |= LVDS_HSYNC_POLARITY;
  128. if (fixed_mode->flags & DRM_MODE_FLAG_NVSYNC)
  129. temp |= LVDS_VSYNC_POLARITY;
  130. I915_WRITE(lvds_encoder->reg, temp);
  131. }
  132. static void intel_pre_enable_lvds(struct intel_encoder *encoder)
  133. {
  134. struct drm_device *dev = encoder->base.dev;
  135. struct intel_lvds_encoder *enc = to_lvds_encoder(&encoder->base);
  136. struct drm_i915_private *dev_priv = dev->dev_private;
  137. if (HAS_PCH_SPLIT(dev) || !enc->pfit_control)
  138. return;
  139. /*
  140. * Enable automatic panel scaling so that non-native modes
  141. * fill the screen. The panel fitter should only be
  142. * adjusted whilst the pipe is disabled, according to
  143. * register description and PRM.
  144. */
  145. DRM_DEBUG_KMS("applying panel-fitter: %x, %x\n",
  146. enc->pfit_control,
  147. enc->pfit_pgm_ratios);
  148. I915_WRITE(PFIT_PGM_RATIOS, enc->pfit_pgm_ratios);
  149. I915_WRITE(PFIT_CONTROL, enc->pfit_control);
  150. }
  151. /**
  152. * Sets the power state for the panel.
  153. */
  154. static void intel_enable_lvds(struct intel_encoder *encoder)
  155. {
  156. struct drm_device *dev = encoder->base.dev;
  157. struct intel_lvds_encoder *lvds_encoder = to_lvds_encoder(&encoder->base);
  158. struct intel_crtc *intel_crtc = to_intel_crtc(encoder->base.crtc);
  159. struct drm_i915_private *dev_priv = dev->dev_private;
  160. u32 ctl_reg, stat_reg;
  161. if (HAS_PCH_SPLIT(dev)) {
  162. ctl_reg = PCH_PP_CONTROL;
  163. stat_reg = PCH_PP_STATUS;
  164. } else {
  165. ctl_reg = PP_CONTROL;
  166. stat_reg = PP_STATUS;
  167. }
  168. I915_WRITE(lvds_encoder->reg, I915_READ(lvds_encoder->reg) | LVDS_PORT_EN);
  169. I915_WRITE(ctl_reg, I915_READ(ctl_reg) | POWER_TARGET_ON);
  170. POSTING_READ(lvds_encoder->reg);
  171. if (wait_for((I915_READ(stat_reg) & PP_ON) != 0, 1000))
  172. DRM_ERROR("timed out waiting for panel to power on\n");
  173. intel_panel_enable_backlight(dev, intel_crtc->pipe);
  174. }
  175. static void intel_disable_lvds(struct intel_encoder *encoder)
  176. {
  177. struct drm_device *dev = encoder->base.dev;
  178. struct intel_lvds_encoder *lvds_encoder = to_lvds_encoder(&encoder->base);
  179. struct drm_i915_private *dev_priv = dev->dev_private;
  180. u32 ctl_reg, stat_reg;
  181. if (HAS_PCH_SPLIT(dev)) {
  182. ctl_reg = PCH_PP_CONTROL;
  183. stat_reg = PCH_PP_STATUS;
  184. } else {
  185. ctl_reg = PP_CONTROL;
  186. stat_reg = PP_STATUS;
  187. }
  188. intel_panel_disable_backlight(dev);
  189. I915_WRITE(ctl_reg, I915_READ(ctl_reg) & ~POWER_TARGET_ON);
  190. if (wait_for((I915_READ(stat_reg) & PP_ON) == 0, 1000))
  191. DRM_ERROR("timed out waiting for panel to power off\n");
  192. I915_WRITE(lvds_encoder->reg, I915_READ(lvds_encoder->reg) & ~LVDS_PORT_EN);
  193. POSTING_READ(lvds_encoder->reg);
  194. }
  195. static int intel_lvds_mode_valid(struct drm_connector *connector,
  196. struct drm_display_mode *mode)
  197. {
  198. struct intel_connector *intel_connector = to_intel_connector(connector);
  199. struct drm_display_mode *fixed_mode = intel_connector->panel.fixed_mode;
  200. if (mode->hdisplay > fixed_mode->hdisplay)
  201. return MODE_PANEL;
  202. if (mode->vdisplay > fixed_mode->vdisplay)
  203. return MODE_PANEL;
  204. return MODE_OK;
  205. }
  206. static void
  207. centre_horizontally(struct drm_display_mode *mode,
  208. int width)
  209. {
  210. u32 border, sync_pos, blank_width, sync_width;
  211. /* keep the hsync and hblank widths constant */
  212. sync_width = mode->crtc_hsync_end - mode->crtc_hsync_start;
  213. blank_width = mode->crtc_hblank_end - mode->crtc_hblank_start;
  214. sync_pos = (blank_width - sync_width + 1) / 2;
  215. border = (mode->hdisplay - width + 1) / 2;
  216. border += border & 1; /* make the border even */
  217. mode->crtc_hdisplay = width;
  218. mode->crtc_hblank_start = width + border;
  219. mode->crtc_hblank_end = mode->crtc_hblank_start + blank_width;
  220. mode->crtc_hsync_start = mode->crtc_hblank_start + sync_pos;
  221. mode->crtc_hsync_end = mode->crtc_hsync_start + sync_width;
  222. }
  223. static void
  224. centre_vertically(struct drm_display_mode *mode,
  225. int height)
  226. {
  227. u32 border, sync_pos, blank_width, sync_width;
  228. /* keep the vsync and vblank widths constant */
  229. sync_width = mode->crtc_vsync_end - mode->crtc_vsync_start;
  230. blank_width = mode->crtc_vblank_end - mode->crtc_vblank_start;
  231. sync_pos = (blank_width - sync_width + 1) / 2;
  232. border = (mode->vdisplay - height + 1) / 2;
  233. mode->crtc_vdisplay = height;
  234. mode->crtc_vblank_start = height + border;
  235. mode->crtc_vblank_end = mode->crtc_vblank_start + blank_width;
  236. mode->crtc_vsync_start = mode->crtc_vblank_start + sync_pos;
  237. mode->crtc_vsync_end = mode->crtc_vsync_start + sync_width;
  238. }
  239. static inline u32 panel_fitter_scaling(u32 source, u32 target)
  240. {
  241. /*
  242. * Floating point operation is not supported. So the FACTOR
  243. * is defined, which can avoid the floating point computation
  244. * when calculating the panel ratio.
  245. */
  246. #define ACCURACY 12
  247. #define FACTOR (1 << ACCURACY)
  248. u32 ratio = source * FACTOR / target;
  249. return (FACTOR * ratio + FACTOR/2) / FACTOR;
  250. }
  251. static bool intel_lvds_compute_config(struct intel_encoder *intel_encoder,
  252. struct intel_crtc_config *pipe_config)
  253. {
  254. struct drm_device *dev = intel_encoder->base.dev;
  255. struct drm_i915_private *dev_priv = dev->dev_private;
  256. struct intel_lvds_encoder *lvds_encoder =
  257. to_lvds_encoder(&intel_encoder->base);
  258. struct intel_connector *intel_connector =
  259. &lvds_encoder->attached_connector->base;
  260. struct drm_display_mode *adjusted_mode = &pipe_config->adjusted_mode;
  261. struct drm_display_mode *mode = &pipe_config->requested_mode;
  262. struct intel_crtc *intel_crtc = lvds_encoder->base.new_crtc;
  263. u32 pfit_control = 0, pfit_pgm_ratios = 0, border = 0;
  264. unsigned int lvds_bpp;
  265. int pipe;
  266. /* Should never happen!! */
  267. if (INTEL_INFO(dev)->gen < 4 && intel_crtc->pipe == 0) {
  268. DRM_ERROR("Can't support LVDS on pipe A\n");
  269. return false;
  270. }
  271. if (intel_encoder_check_is_cloned(&lvds_encoder->base))
  272. return false;
  273. if ((I915_READ(lvds_encoder->reg) & LVDS_A3_POWER_MASK) ==
  274. LVDS_A3_POWER_UP)
  275. lvds_bpp = 8*3;
  276. else
  277. lvds_bpp = 6*3;
  278. if (lvds_bpp != pipe_config->pipe_bpp) {
  279. DRM_DEBUG_KMS("forcing display bpp (was %d) to LVDS (%d)\n",
  280. pipe_config->pipe_bpp, lvds_bpp);
  281. pipe_config->pipe_bpp = lvds_bpp;
  282. }
  283. /*
  284. * We have timings from the BIOS for the panel, put them in
  285. * to the adjusted mode. The CRTC will be set up for this mode,
  286. * with the panel scaling set up to source from the H/VDisplay
  287. * of the original mode.
  288. */
  289. intel_fixed_panel_mode(intel_connector->panel.fixed_mode,
  290. adjusted_mode);
  291. if (HAS_PCH_SPLIT(dev)) {
  292. pipe_config->has_pch_encoder = true;
  293. intel_pch_panel_fitting(dev,
  294. intel_connector->panel.fitting_mode,
  295. mode, adjusted_mode);
  296. return true;
  297. }
  298. /* Native modes don't need fitting */
  299. if (adjusted_mode->hdisplay == mode->hdisplay &&
  300. adjusted_mode->vdisplay == mode->vdisplay)
  301. goto out;
  302. /* 965+ wants fuzzy fitting */
  303. if (INTEL_INFO(dev)->gen >= 4)
  304. pfit_control |= ((intel_crtc->pipe << PFIT_PIPE_SHIFT) |
  305. PFIT_FILTER_FUZZY);
  306. /*
  307. * Enable automatic panel scaling for non-native modes so that they fill
  308. * the screen. Should be enabled before the pipe is enabled, according
  309. * to register description and PRM.
  310. * Change the value here to see the borders for debugging
  311. */
  312. for_each_pipe(pipe)
  313. I915_WRITE(BCLRPAT(pipe), 0);
  314. drm_mode_set_crtcinfo(adjusted_mode, 0);
  315. pipe_config->timings_set = true;
  316. switch (intel_connector->panel.fitting_mode) {
  317. case DRM_MODE_SCALE_CENTER:
  318. /*
  319. * For centered modes, we have to calculate border widths &
  320. * heights and modify the values programmed into the CRTC.
  321. */
  322. centre_horizontally(adjusted_mode, mode->hdisplay);
  323. centre_vertically(adjusted_mode, mode->vdisplay);
  324. border = LVDS_BORDER_ENABLE;
  325. break;
  326. case DRM_MODE_SCALE_ASPECT:
  327. /* Scale but preserve the aspect ratio */
  328. if (INTEL_INFO(dev)->gen >= 4) {
  329. u32 scaled_width = adjusted_mode->hdisplay * mode->vdisplay;
  330. u32 scaled_height = mode->hdisplay * adjusted_mode->vdisplay;
  331. /* 965+ is easy, it does everything in hw */
  332. if (scaled_width > scaled_height)
  333. pfit_control |= PFIT_ENABLE | PFIT_SCALING_PILLAR;
  334. else if (scaled_width < scaled_height)
  335. pfit_control |= PFIT_ENABLE | PFIT_SCALING_LETTER;
  336. else if (adjusted_mode->hdisplay != mode->hdisplay)
  337. pfit_control |= PFIT_ENABLE | PFIT_SCALING_AUTO;
  338. } else {
  339. u32 scaled_width = adjusted_mode->hdisplay * mode->vdisplay;
  340. u32 scaled_height = mode->hdisplay * adjusted_mode->vdisplay;
  341. /*
  342. * For earlier chips we have to calculate the scaling
  343. * ratio by hand and program it into the
  344. * PFIT_PGM_RATIO register
  345. */
  346. if (scaled_width > scaled_height) { /* pillar */
  347. centre_horizontally(adjusted_mode, scaled_height / mode->vdisplay);
  348. border = LVDS_BORDER_ENABLE;
  349. if (mode->vdisplay != adjusted_mode->vdisplay) {
  350. u32 bits = panel_fitter_scaling(mode->vdisplay, adjusted_mode->vdisplay);
  351. pfit_pgm_ratios |= (bits << PFIT_HORIZ_SCALE_SHIFT |
  352. bits << PFIT_VERT_SCALE_SHIFT);
  353. pfit_control |= (PFIT_ENABLE |
  354. VERT_INTERP_BILINEAR |
  355. HORIZ_INTERP_BILINEAR);
  356. }
  357. } else if (scaled_width < scaled_height) { /* letter */
  358. centre_vertically(adjusted_mode, scaled_width / mode->hdisplay);
  359. border = LVDS_BORDER_ENABLE;
  360. if (mode->hdisplay != adjusted_mode->hdisplay) {
  361. u32 bits = panel_fitter_scaling(mode->hdisplay, adjusted_mode->hdisplay);
  362. pfit_pgm_ratios |= (bits << PFIT_HORIZ_SCALE_SHIFT |
  363. bits << PFIT_VERT_SCALE_SHIFT);
  364. pfit_control |= (PFIT_ENABLE |
  365. VERT_INTERP_BILINEAR |
  366. HORIZ_INTERP_BILINEAR);
  367. }
  368. } else
  369. /* Aspects match, Let hw scale both directions */
  370. pfit_control |= (PFIT_ENABLE |
  371. VERT_AUTO_SCALE | HORIZ_AUTO_SCALE |
  372. VERT_INTERP_BILINEAR |
  373. HORIZ_INTERP_BILINEAR);
  374. }
  375. break;
  376. case DRM_MODE_SCALE_FULLSCREEN:
  377. /*
  378. * Full scaling, even if it changes the aspect ratio.
  379. * Fortunately this is all done for us in hw.
  380. */
  381. if (mode->vdisplay != adjusted_mode->vdisplay ||
  382. mode->hdisplay != adjusted_mode->hdisplay) {
  383. pfit_control |= PFIT_ENABLE;
  384. if (INTEL_INFO(dev)->gen >= 4)
  385. pfit_control |= PFIT_SCALING_AUTO;
  386. else
  387. pfit_control |= (VERT_AUTO_SCALE |
  388. VERT_INTERP_BILINEAR |
  389. HORIZ_AUTO_SCALE |
  390. HORIZ_INTERP_BILINEAR);
  391. }
  392. break;
  393. default:
  394. break;
  395. }
  396. out:
  397. /* If not enabling scaling, be consistent and always use 0. */
  398. if ((pfit_control & PFIT_ENABLE) == 0) {
  399. pfit_control = 0;
  400. pfit_pgm_ratios = 0;
  401. }
  402. /* Make sure pre-965 set dither correctly */
  403. if (INTEL_INFO(dev)->gen < 4 && dev_priv->lvds_dither)
  404. pfit_control |= PANEL_8TO6_DITHER_ENABLE;
  405. if (pfit_control != lvds_encoder->pfit_control ||
  406. pfit_pgm_ratios != lvds_encoder->pfit_pgm_ratios) {
  407. lvds_encoder->pfit_control = pfit_control;
  408. lvds_encoder->pfit_pgm_ratios = pfit_pgm_ratios;
  409. }
  410. dev_priv->lvds_border_bits = border;
  411. /*
  412. * XXX: It would be nice to support lower refresh rates on the
  413. * panels to reduce power consumption, and perhaps match the
  414. * user's requested refresh rate.
  415. */
  416. return true;
  417. }
  418. static void intel_lvds_mode_set(struct drm_encoder *encoder,
  419. struct drm_display_mode *mode,
  420. struct drm_display_mode *adjusted_mode)
  421. {
  422. /*
  423. * The LVDS pin pair will already have been turned on in the
  424. * intel_crtc_mode_set since it has a large impact on the DPLL
  425. * settings.
  426. */
  427. }
  428. /**
  429. * Detect the LVDS connection.
  430. *
  431. * Since LVDS doesn't have hotlug, we use the lid as a proxy. Open means
  432. * connected and closed means disconnected. We also send hotplug events as
  433. * needed, using lid status notification from the input layer.
  434. */
  435. static enum drm_connector_status
  436. intel_lvds_detect(struct drm_connector *connector, bool force)
  437. {
  438. struct drm_device *dev = connector->dev;
  439. enum drm_connector_status status;
  440. status = intel_panel_detect(dev);
  441. if (status != connector_status_unknown)
  442. return status;
  443. return connector_status_connected;
  444. }
  445. /**
  446. * Return the list of DDC modes if available, or the BIOS fixed mode otherwise.
  447. */
  448. static int intel_lvds_get_modes(struct drm_connector *connector)
  449. {
  450. struct intel_lvds_connector *lvds_connector = to_lvds_connector(connector);
  451. struct drm_device *dev = connector->dev;
  452. struct drm_display_mode *mode;
  453. /* use cached edid if we have one */
  454. if (!IS_ERR_OR_NULL(lvds_connector->base.edid))
  455. return drm_add_edid_modes(connector, lvds_connector->base.edid);
  456. mode = drm_mode_duplicate(dev, lvds_connector->base.panel.fixed_mode);
  457. if (mode == NULL)
  458. return 0;
  459. drm_mode_probed_add(connector, mode);
  460. return 1;
  461. }
  462. static int intel_no_modeset_on_lid_dmi_callback(const struct dmi_system_id *id)
  463. {
  464. DRM_INFO("Skipping forced modeset for %s\n", id->ident);
  465. return 1;
  466. }
  467. /* The GPU hangs up on these systems if modeset is performed on LID open */
  468. static const struct dmi_system_id intel_no_modeset_on_lid[] = {
  469. {
  470. .callback = intel_no_modeset_on_lid_dmi_callback,
  471. .ident = "Toshiba Tecra A11",
  472. .matches = {
  473. DMI_MATCH(DMI_SYS_VENDOR, "TOSHIBA"),
  474. DMI_MATCH(DMI_PRODUCT_NAME, "TECRA A11"),
  475. },
  476. },
  477. { } /* terminating entry */
  478. };
  479. /*
  480. * Lid events. Note the use of 'modeset':
  481. * - we set it to MODESET_ON_LID_OPEN on lid close,
  482. * and set it to MODESET_DONE on open
  483. * - we use it as a "only once" bit (ie we ignore
  484. * duplicate events where it was already properly set)
  485. * - the suspend/resume paths will set it to
  486. * MODESET_SUSPENDED and ignore the lid open event,
  487. * because they restore the mode ("lid open").
  488. */
  489. static int intel_lid_notify(struct notifier_block *nb, unsigned long val,
  490. void *unused)
  491. {
  492. struct intel_lvds_connector *lvds_connector =
  493. container_of(nb, struct intel_lvds_connector, lid_notifier);
  494. struct drm_connector *connector = &lvds_connector->base.base;
  495. struct drm_device *dev = connector->dev;
  496. struct drm_i915_private *dev_priv = dev->dev_private;
  497. if (dev->switch_power_state != DRM_SWITCH_POWER_ON)
  498. return NOTIFY_OK;
  499. mutex_lock(&dev_priv->modeset_restore_lock);
  500. if (dev_priv->modeset_restore == MODESET_SUSPENDED)
  501. goto exit;
  502. /*
  503. * check and update the status of LVDS connector after receiving
  504. * the LID nofication event.
  505. */
  506. connector->status = connector->funcs->detect(connector, false);
  507. /* Don't force modeset on machines where it causes a GPU lockup */
  508. if (dmi_check_system(intel_no_modeset_on_lid))
  509. goto exit;
  510. if (!acpi_lid_open()) {
  511. /* do modeset on next lid open event */
  512. dev_priv->modeset_restore = MODESET_ON_LID_OPEN;
  513. goto exit;
  514. }
  515. if (dev_priv->modeset_restore == MODESET_DONE)
  516. goto exit;
  517. drm_modeset_lock_all(dev);
  518. intel_modeset_setup_hw_state(dev, true);
  519. drm_modeset_unlock_all(dev);
  520. dev_priv->modeset_restore = MODESET_DONE;
  521. exit:
  522. mutex_unlock(&dev_priv->modeset_restore_lock);
  523. return NOTIFY_OK;
  524. }
  525. /**
  526. * intel_lvds_destroy - unregister and free LVDS structures
  527. * @connector: connector to free
  528. *
  529. * Unregister the DDC bus for this connector then free the driver private
  530. * structure.
  531. */
  532. static void intel_lvds_destroy(struct drm_connector *connector)
  533. {
  534. struct intel_lvds_connector *lvds_connector =
  535. to_lvds_connector(connector);
  536. if (lvds_connector->lid_notifier.notifier_call)
  537. acpi_lid_notifier_unregister(&lvds_connector->lid_notifier);
  538. if (!IS_ERR_OR_NULL(lvds_connector->base.edid))
  539. kfree(lvds_connector->base.edid);
  540. intel_panel_destroy_backlight(connector->dev);
  541. intel_panel_fini(&lvds_connector->base.panel);
  542. drm_sysfs_connector_remove(connector);
  543. drm_connector_cleanup(connector);
  544. kfree(connector);
  545. }
  546. static int intel_lvds_set_property(struct drm_connector *connector,
  547. struct drm_property *property,
  548. uint64_t value)
  549. {
  550. struct intel_connector *intel_connector = to_intel_connector(connector);
  551. struct drm_device *dev = connector->dev;
  552. if (property == dev->mode_config.scaling_mode_property) {
  553. struct drm_crtc *crtc;
  554. if (value == DRM_MODE_SCALE_NONE) {
  555. DRM_DEBUG_KMS("no scaling not supported\n");
  556. return -EINVAL;
  557. }
  558. if (intel_connector->panel.fitting_mode == value) {
  559. /* the LVDS scaling property is not changed */
  560. return 0;
  561. }
  562. intel_connector->panel.fitting_mode = value;
  563. crtc = intel_attached_encoder(connector)->base.crtc;
  564. if (crtc && crtc->enabled) {
  565. /*
  566. * If the CRTC is enabled, the display will be changed
  567. * according to the new panel fitting mode.
  568. */
  569. intel_crtc_restore_mode(crtc);
  570. }
  571. }
  572. return 0;
  573. }
  574. static const struct drm_encoder_helper_funcs intel_lvds_helper_funcs = {
  575. .mode_set = intel_lvds_mode_set,
  576. };
  577. static const struct drm_connector_helper_funcs intel_lvds_connector_helper_funcs = {
  578. .get_modes = intel_lvds_get_modes,
  579. .mode_valid = intel_lvds_mode_valid,
  580. .best_encoder = intel_best_encoder,
  581. };
  582. static const struct drm_connector_funcs intel_lvds_connector_funcs = {
  583. .dpms = intel_connector_dpms,
  584. .detect = intel_lvds_detect,
  585. .fill_modes = drm_helper_probe_single_connector_modes,
  586. .set_property = intel_lvds_set_property,
  587. .destroy = intel_lvds_destroy,
  588. };
  589. static const struct drm_encoder_funcs intel_lvds_enc_funcs = {
  590. .destroy = intel_encoder_destroy,
  591. };
  592. static int __init intel_no_lvds_dmi_callback(const struct dmi_system_id *id)
  593. {
  594. DRM_INFO("Skipping LVDS initialization for %s\n", id->ident);
  595. return 1;
  596. }
  597. /* These systems claim to have LVDS, but really don't */
  598. static const struct dmi_system_id intel_no_lvds[] = {
  599. {
  600. .callback = intel_no_lvds_dmi_callback,
  601. .ident = "Apple Mac Mini (Core series)",
  602. .matches = {
  603. DMI_MATCH(DMI_SYS_VENDOR, "Apple"),
  604. DMI_MATCH(DMI_PRODUCT_NAME, "Macmini1,1"),
  605. },
  606. },
  607. {
  608. .callback = intel_no_lvds_dmi_callback,
  609. .ident = "Apple Mac Mini (Core 2 series)",
  610. .matches = {
  611. DMI_MATCH(DMI_SYS_VENDOR, "Apple"),
  612. DMI_MATCH(DMI_PRODUCT_NAME, "Macmini2,1"),
  613. },
  614. },
  615. {
  616. .callback = intel_no_lvds_dmi_callback,
  617. .ident = "MSI IM-945GSE-A",
  618. .matches = {
  619. DMI_MATCH(DMI_SYS_VENDOR, "MSI"),
  620. DMI_MATCH(DMI_PRODUCT_NAME, "A9830IMS"),
  621. },
  622. },
  623. {
  624. .callback = intel_no_lvds_dmi_callback,
  625. .ident = "Dell Studio Hybrid",
  626. .matches = {
  627. DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
  628. DMI_MATCH(DMI_PRODUCT_NAME, "Studio Hybrid 140g"),
  629. },
  630. },
  631. {
  632. .callback = intel_no_lvds_dmi_callback,
  633. .ident = "Dell OptiPlex FX170",
  634. .matches = {
  635. DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
  636. DMI_MATCH(DMI_PRODUCT_NAME, "OptiPlex FX170"),
  637. },
  638. },
  639. {
  640. .callback = intel_no_lvds_dmi_callback,
  641. .ident = "AOpen Mini PC",
  642. .matches = {
  643. DMI_MATCH(DMI_SYS_VENDOR, "AOpen"),
  644. DMI_MATCH(DMI_PRODUCT_NAME, "i965GMx-IF"),
  645. },
  646. },
  647. {
  648. .callback = intel_no_lvds_dmi_callback,
  649. .ident = "AOpen Mini PC MP915",
  650. .matches = {
  651. DMI_MATCH(DMI_BOARD_VENDOR, "AOpen"),
  652. DMI_MATCH(DMI_BOARD_NAME, "i915GMx-F"),
  653. },
  654. },
  655. {
  656. .callback = intel_no_lvds_dmi_callback,
  657. .ident = "AOpen i915GMm-HFS",
  658. .matches = {
  659. DMI_MATCH(DMI_BOARD_VENDOR, "AOpen"),
  660. DMI_MATCH(DMI_BOARD_NAME, "i915GMm-HFS"),
  661. },
  662. },
  663. {
  664. .callback = intel_no_lvds_dmi_callback,
  665. .ident = "AOpen i45GMx-I",
  666. .matches = {
  667. DMI_MATCH(DMI_BOARD_VENDOR, "AOpen"),
  668. DMI_MATCH(DMI_BOARD_NAME, "i45GMx-I"),
  669. },
  670. },
  671. {
  672. .callback = intel_no_lvds_dmi_callback,
  673. .ident = "Aopen i945GTt-VFA",
  674. .matches = {
  675. DMI_MATCH(DMI_PRODUCT_VERSION, "AO00001JW"),
  676. },
  677. },
  678. {
  679. .callback = intel_no_lvds_dmi_callback,
  680. .ident = "Clientron U800",
  681. .matches = {
  682. DMI_MATCH(DMI_SYS_VENDOR, "Clientron"),
  683. DMI_MATCH(DMI_PRODUCT_NAME, "U800"),
  684. },
  685. },
  686. {
  687. .callback = intel_no_lvds_dmi_callback,
  688. .ident = "Clientron E830",
  689. .matches = {
  690. DMI_MATCH(DMI_SYS_VENDOR, "Clientron"),
  691. DMI_MATCH(DMI_PRODUCT_NAME, "E830"),
  692. },
  693. },
  694. {
  695. .callback = intel_no_lvds_dmi_callback,
  696. .ident = "Asus EeeBox PC EB1007",
  697. .matches = {
  698. DMI_MATCH(DMI_SYS_VENDOR, "ASUSTeK Computer INC."),
  699. DMI_MATCH(DMI_PRODUCT_NAME, "EB1007"),
  700. },
  701. },
  702. {
  703. .callback = intel_no_lvds_dmi_callback,
  704. .ident = "Asus AT5NM10T-I",
  705. .matches = {
  706. DMI_MATCH(DMI_BOARD_VENDOR, "ASUSTeK Computer INC."),
  707. DMI_MATCH(DMI_BOARD_NAME, "AT5NM10T-I"),
  708. },
  709. },
  710. {
  711. .callback = intel_no_lvds_dmi_callback,
  712. .ident = "Hewlett-Packard HP t5740e Thin Client",
  713. .matches = {
  714. DMI_MATCH(DMI_BOARD_VENDOR, "Hewlett-Packard"),
  715. DMI_MATCH(DMI_PRODUCT_NAME, "HP t5740e Thin Client"),
  716. },
  717. },
  718. {
  719. .callback = intel_no_lvds_dmi_callback,
  720. .ident = "Hewlett-Packard t5745",
  721. .matches = {
  722. DMI_MATCH(DMI_BOARD_VENDOR, "Hewlett-Packard"),
  723. DMI_MATCH(DMI_PRODUCT_NAME, "hp t5745"),
  724. },
  725. },
  726. {
  727. .callback = intel_no_lvds_dmi_callback,
  728. .ident = "Hewlett-Packard st5747",
  729. .matches = {
  730. DMI_MATCH(DMI_BOARD_VENDOR, "Hewlett-Packard"),
  731. DMI_MATCH(DMI_PRODUCT_NAME, "hp st5747"),
  732. },
  733. },
  734. {
  735. .callback = intel_no_lvds_dmi_callback,
  736. .ident = "MSI Wind Box DC500",
  737. .matches = {
  738. DMI_MATCH(DMI_BOARD_VENDOR, "MICRO-STAR INTERNATIONAL CO., LTD"),
  739. DMI_MATCH(DMI_BOARD_NAME, "MS-7469"),
  740. },
  741. },
  742. {
  743. .callback = intel_no_lvds_dmi_callback,
  744. .ident = "Gigabyte GA-D525TUD",
  745. .matches = {
  746. DMI_MATCH(DMI_BOARD_VENDOR, "Gigabyte Technology Co., Ltd."),
  747. DMI_MATCH(DMI_BOARD_NAME, "D525TUD"),
  748. },
  749. },
  750. {
  751. .callback = intel_no_lvds_dmi_callback,
  752. .ident = "Supermicro X7SPA-H",
  753. .matches = {
  754. DMI_MATCH(DMI_SYS_VENDOR, "Supermicro"),
  755. DMI_MATCH(DMI_PRODUCT_NAME, "X7SPA-H"),
  756. },
  757. },
  758. {
  759. .callback = intel_no_lvds_dmi_callback,
  760. .ident = "Fujitsu Esprimo Q900",
  761. .matches = {
  762. DMI_MATCH(DMI_SYS_VENDOR, "FUJITSU"),
  763. DMI_MATCH(DMI_PRODUCT_NAME, "ESPRIMO Q900"),
  764. },
  765. },
  766. { } /* terminating entry */
  767. };
  768. /**
  769. * intel_find_lvds_downclock - find the reduced downclock for LVDS in EDID
  770. * @dev: drm device
  771. * @connector: LVDS connector
  772. *
  773. * Find the reduced downclock for LVDS in EDID.
  774. */
  775. static void intel_find_lvds_downclock(struct drm_device *dev,
  776. struct drm_display_mode *fixed_mode,
  777. struct drm_connector *connector)
  778. {
  779. struct drm_i915_private *dev_priv = dev->dev_private;
  780. struct drm_display_mode *scan;
  781. int temp_downclock;
  782. temp_downclock = fixed_mode->clock;
  783. list_for_each_entry(scan, &connector->probed_modes, head) {
  784. /*
  785. * If one mode has the same resolution with the fixed_panel
  786. * mode while they have the different refresh rate, it means
  787. * that the reduced downclock is found for the LVDS. In such
  788. * case we can set the different FPx0/1 to dynamically select
  789. * between low and high frequency.
  790. */
  791. if (scan->hdisplay == fixed_mode->hdisplay &&
  792. scan->hsync_start == fixed_mode->hsync_start &&
  793. scan->hsync_end == fixed_mode->hsync_end &&
  794. scan->htotal == fixed_mode->htotal &&
  795. scan->vdisplay == fixed_mode->vdisplay &&
  796. scan->vsync_start == fixed_mode->vsync_start &&
  797. scan->vsync_end == fixed_mode->vsync_end &&
  798. scan->vtotal == fixed_mode->vtotal) {
  799. if (scan->clock < temp_downclock) {
  800. /*
  801. * The downclock is already found. But we
  802. * expect to find the lower downclock.
  803. */
  804. temp_downclock = scan->clock;
  805. }
  806. }
  807. }
  808. if (temp_downclock < fixed_mode->clock && i915_lvds_downclock) {
  809. /* We found the downclock for LVDS. */
  810. dev_priv->lvds_downclock_avail = 1;
  811. dev_priv->lvds_downclock = temp_downclock;
  812. DRM_DEBUG_KMS("LVDS downclock is found in EDID. "
  813. "Normal clock %dKhz, downclock %dKhz\n",
  814. fixed_mode->clock, temp_downclock);
  815. }
  816. }
  817. /*
  818. * Enumerate the child dev array parsed from VBT to check whether
  819. * the LVDS is present.
  820. * If it is present, return 1.
  821. * If it is not present, return false.
  822. * If no child dev is parsed from VBT, it assumes that the LVDS is present.
  823. */
  824. static bool lvds_is_present_in_vbt(struct drm_device *dev,
  825. u8 *i2c_pin)
  826. {
  827. struct drm_i915_private *dev_priv = dev->dev_private;
  828. int i;
  829. if (!dev_priv->child_dev_num)
  830. return true;
  831. for (i = 0; i < dev_priv->child_dev_num; i++) {
  832. struct child_device_config *child = dev_priv->child_dev + i;
  833. /* If the device type is not LFP, continue.
  834. * We have to check both the new identifiers as well as the
  835. * old for compatibility with some BIOSes.
  836. */
  837. if (child->device_type != DEVICE_TYPE_INT_LFP &&
  838. child->device_type != DEVICE_TYPE_LFP)
  839. continue;
  840. if (intel_gmbus_is_port_valid(child->i2c_pin))
  841. *i2c_pin = child->i2c_pin;
  842. /* However, we cannot trust the BIOS writers to populate
  843. * the VBT correctly. Since LVDS requires additional
  844. * information from AIM blocks, a non-zero addin offset is
  845. * a good indicator that the LVDS is actually present.
  846. */
  847. if (child->addin_offset)
  848. return true;
  849. /* But even then some BIOS writers perform some black magic
  850. * and instantiate the device without reference to any
  851. * additional data. Trust that if the VBT was written into
  852. * the OpRegion then they have validated the LVDS's existence.
  853. */
  854. if (dev_priv->opregion.vbt)
  855. return true;
  856. }
  857. return false;
  858. }
  859. static int intel_dual_link_lvds_callback(const struct dmi_system_id *id)
  860. {
  861. DRM_INFO("Forcing lvds to dual link mode on %s\n", id->ident);
  862. return 1;
  863. }
  864. static const struct dmi_system_id intel_dual_link_lvds[] = {
  865. {
  866. .callback = intel_dual_link_lvds_callback,
  867. .ident = "Apple MacBook Pro (Core i5/i7 Series)",
  868. .matches = {
  869. DMI_MATCH(DMI_SYS_VENDOR, "Apple Inc."),
  870. DMI_MATCH(DMI_PRODUCT_NAME, "MacBookPro8,2"),
  871. },
  872. },
  873. { } /* terminating entry */
  874. };
  875. bool intel_is_dual_link_lvds(struct drm_device *dev)
  876. {
  877. struct intel_encoder *encoder;
  878. struct intel_lvds_encoder *lvds_encoder;
  879. list_for_each_entry(encoder, &dev->mode_config.encoder_list,
  880. base.head) {
  881. if (encoder->type == INTEL_OUTPUT_LVDS) {
  882. lvds_encoder = to_lvds_encoder(&encoder->base);
  883. return lvds_encoder->is_dual_link;
  884. }
  885. }
  886. return false;
  887. }
  888. static bool compute_is_dual_link_lvds(struct intel_lvds_encoder *lvds_encoder)
  889. {
  890. struct drm_device *dev = lvds_encoder->base.base.dev;
  891. unsigned int val;
  892. struct drm_i915_private *dev_priv = dev->dev_private;
  893. /* use the module option value if specified */
  894. if (i915_lvds_channel_mode > 0)
  895. return i915_lvds_channel_mode == 2;
  896. if (dmi_check_system(intel_dual_link_lvds))
  897. return true;
  898. /* BIOS should set the proper LVDS register value at boot, but
  899. * in reality, it doesn't set the value when the lid is closed;
  900. * we need to check "the value to be set" in VBT when LVDS
  901. * register is uninitialized.
  902. */
  903. val = I915_READ(lvds_encoder->reg);
  904. if (!(val & ~(LVDS_PIPE_MASK | LVDS_DETECTED)))
  905. val = dev_priv->bios_lvds_val;
  906. return (val & LVDS_CLKB_POWER_MASK) == LVDS_CLKB_POWER_UP;
  907. }
  908. static bool intel_lvds_supported(struct drm_device *dev)
  909. {
  910. /* With the introduction of the PCH we gained a dedicated
  911. * LVDS presence pin, use it. */
  912. if (HAS_PCH_IBX(dev) || HAS_PCH_CPT(dev))
  913. return true;
  914. /* Otherwise LVDS was only attached to mobile products,
  915. * except for the inglorious 830gm */
  916. if (INTEL_INFO(dev)->gen <= 4 && IS_MOBILE(dev) && !IS_I830(dev))
  917. return true;
  918. return false;
  919. }
  920. /**
  921. * intel_lvds_init - setup LVDS connectors on this device
  922. * @dev: drm device
  923. *
  924. * Create the connector, register the LVDS DDC bus, and try to figure out what
  925. * modes we can display on the LVDS panel (if present).
  926. */
  927. bool intel_lvds_init(struct drm_device *dev)
  928. {
  929. struct drm_i915_private *dev_priv = dev->dev_private;
  930. struct intel_lvds_encoder *lvds_encoder;
  931. struct intel_encoder *intel_encoder;
  932. struct intel_lvds_connector *lvds_connector;
  933. struct intel_connector *intel_connector;
  934. struct drm_connector *connector;
  935. struct drm_encoder *encoder;
  936. struct drm_display_mode *scan; /* *modes, *bios_mode; */
  937. struct drm_display_mode *fixed_mode = NULL;
  938. struct edid *edid;
  939. struct drm_crtc *crtc;
  940. u32 lvds;
  941. int pipe;
  942. u8 pin;
  943. if (!intel_lvds_supported(dev))
  944. return false;
  945. /* Skip init on machines we know falsely report LVDS */
  946. if (dmi_check_system(intel_no_lvds))
  947. return false;
  948. pin = GMBUS_PORT_PANEL;
  949. if (!lvds_is_present_in_vbt(dev, &pin)) {
  950. DRM_DEBUG_KMS("LVDS is not present in VBT\n");
  951. return false;
  952. }
  953. if (HAS_PCH_SPLIT(dev)) {
  954. if ((I915_READ(PCH_LVDS) & LVDS_DETECTED) == 0)
  955. return false;
  956. if (dev_priv->edp.support) {
  957. DRM_DEBUG_KMS("disable LVDS for eDP support\n");
  958. return false;
  959. }
  960. }
  961. lvds_encoder = kzalloc(sizeof(struct intel_lvds_encoder), GFP_KERNEL);
  962. if (!lvds_encoder)
  963. return false;
  964. lvds_connector = kzalloc(sizeof(struct intel_lvds_connector), GFP_KERNEL);
  965. if (!lvds_connector) {
  966. kfree(lvds_encoder);
  967. return false;
  968. }
  969. lvds_encoder->attached_connector = lvds_connector;
  970. if (!HAS_PCH_SPLIT(dev)) {
  971. lvds_encoder->pfit_control = I915_READ(PFIT_CONTROL);
  972. }
  973. intel_encoder = &lvds_encoder->base;
  974. encoder = &intel_encoder->base;
  975. intel_connector = &lvds_connector->base;
  976. connector = &intel_connector->base;
  977. drm_connector_init(dev, &intel_connector->base, &intel_lvds_connector_funcs,
  978. DRM_MODE_CONNECTOR_LVDS);
  979. drm_encoder_init(dev, &intel_encoder->base, &intel_lvds_enc_funcs,
  980. DRM_MODE_ENCODER_LVDS);
  981. intel_encoder->enable = intel_enable_lvds;
  982. intel_encoder->pre_enable = intel_pre_enable_lvds;
  983. intel_encoder->pre_pll_enable = intel_pre_pll_enable_lvds;
  984. intel_encoder->compute_config = intel_lvds_compute_config;
  985. intel_encoder->disable = intel_disable_lvds;
  986. intel_encoder->get_hw_state = intel_lvds_get_hw_state;
  987. intel_connector->get_hw_state = intel_connector_get_hw_state;
  988. intel_connector_attach_encoder(intel_connector, intel_encoder);
  989. intel_encoder->type = INTEL_OUTPUT_LVDS;
  990. intel_encoder->cloneable = false;
  991. if (HAS_PCH_SPLIT(dev))
  992. intel_encoder->crtc_mask = (1 << 0) | (1 << 1) | (1 << 2);
  993. else if (IS_GEN4(dev))
  994. intel_encoder->crtc_mask = (1 << 0) | (1 << 1);
  995. else
  996. intel_encoder->crtc_mask = (1 << 1);
  997. drm_encoder_helper_add(encoder, &intel_lvds_helper_funcs);
  998. drm_connector_helper_add(connector, &intel_lvds_connector_helper_funcs);
  999. connector->display_info.subpixel_order = SubPixelHorizontalRGB;
  1000. connector->interlace_allowed = false;
  1001. connector->doublescan_allowed = false;
  1002. if (HAS_PCH_SPLIT(dev)) {
  1003. lvds_encoder->reg = PCH_LVDS;
  1004. } else {
  1005. lvds_encoder->reg = LVDS;
  1006. }
  1007. /* create the scaling mode property */
  1008. drm_mode_create_scaling_mode_property(dev);
  1009. drm_object_attach_property(&connector->base,
  1010. dev->mode_config.scaling_mode_property,
  1011. DRM_MODE_SCALE_ASPECT);
  1012. intel_connector->panel.fitting_mode = DRM_MODE_SCALE_ASPECT;
  1013. /*
  1014. * LVDS discovery:
  1015. * 1) check for EDID on DDC
  1016. * 2) check for VBT data
  1017. * 3) check to see if LVDS is already on
  1018. * if none of the above, no panel
  1019. * 4) make sure lid is open
  1020. * if closed, act like it's not there for now
  1021. */
  1022. /*
  1023. * Attempt to get the fixed panel mode from DDC. Assume that the
  1024. * preferred mode is the right one.
  1025. */
  1026. edid = drm_get_edid(connector, intel_gmbus_get_adapter(dev_priv, pin));
  1027. if (edid) {
  1028. if (drm_add_edid_modes(connector, edid)) {
  1029. drm_mode_connector_update_edid_property(connector,
  1030. edid);
  1031. } else {
  1032. kfree(edid);
  1033. edid = ERR_PTR(-EINVAL);
  1034. }
  1035. } else {
  1036. edid = ERR_PTR(-ENOENT);
  1037. }
  1038. lvds_connector->base.edid = edid;
  1039. if (IS_ERR_OR_NULL(edid)) {
  1040. /* Didn't get an EDID, so
  1041. * Set wide sync ranges so we get all modes
  1042. * handed to valid_mode for checking
  1043. */
  1044. connector->display_info.min_vfreq = 0;
  1045. connector->display_info.max_vfreq = 200;
  1046. connector->display_info.min_hfreq = 0;
  1047. connector->display_info.max_hfreq = 200;
  1048. }
  1049. list_for_each_entry(scan, &connector->probed_modes, head) {
  1050. if (scan->type & DRM_MODE_TYPE_PREFERRED) {
  1051. DRM_DEBUG_KMS("using preferred mode from EDID: ");
  1052. drm_mode_debug_printmodeline(scan);
  1053. fixed_mode = drm_mode_duplicate(dev, scan);
  1054. if (fixed_mode) {
  1055. intel_find_lvds_downclock(dev, fixed_mode,
  1056. connector);
  1057. goto out;
  1058. }
  1059. }
  1060. }
  1061. /* Failed to get EDID, what about VBT? */
  1062. if (dev_priv->lfp_lvds_vbt_mode) {
  1063. DRM_DEBUG_KMS("using mode from VBT: ");
  1064. drm_mode_debug_printmodeline(dev_priv->lfp_lvds_vbt_mode);
  1065. fixed_mode = drm_mode_duplicate(dev, dev_priv->lfp_lvds_vbt_mode);
  1066. if (fixed_mode) {
  1067. fixed_mode->type |= DRM_MODE_TYPE_PREFERRED;
  1068. goto out;
  1069. }
  1070. }
  1071. /*
  1072. * If we didn't get EDID, try checking if the panel is already turned
  1073. * on. If so, assume that whatever is currently programmed is the
  1074. * correct mode.
  1075. */
  1076. /* Ironlake: FIXME if still fail, not try pipe mode now */
  1077. if (HAS_PCH_SPLIT(dev))
  1078. goto failed;
  1079. lvds = I915_READ(LVDS);
  1080. pipe = (lvds & LVDS_PIPEB_SELECT) ? 1 : 0;
  1081. crtc = intel_get_crtc_for_pipe(dev, pipe);
  1082. if (crtc && (lvds & LVDS_PORT_EN)) {
  1083. fixed_mode = intel_crtc_mode_get(dev, crtc);
  1084. if (fixed_mode) {
  1085. DRM_DEBUG_KMS("using current (BIOS) mode: ");
  1086. drm_mode_debug_printmodeline(fixed_mode);
  1087. fixed_mode->type |= DRM_MODE_TYPE_PREFERRED;
  1088. goto out;
  1089. }
  1090. }
  1091. /* If we still don't have a mode after all that, give up. */
  1092. if (!fixed_mode)
  1093. goto failed;
  1094. out:
  1095. lvds_encoder->is_dual_link = compute_is_dual_link_lvds(lvds_encoder);
  1096. DRM_DEBUG_KMS("detected %s-link lvds configuration\n",
  1097. lvds_encoder->is_dual_link ? "dual" : "single");
  1098. /*
  1099. * Unlock registers and just
  1100. * leave them unlocked
  1101. */
  1102. if (HAS_PCH_SPLIT(dev)) {
  1103. I915_WRITE(PCH_PP_CONTROL,
  1104. I915_READ(PCH_PP_CONTROL) | PANEL_UNLOCK_REGS);
  1105. } else {
  1106. I915_WRITE(PP_CONTROL,
  1107. I915_READ(PP_CONTROL) | PANEL_UNLOCK_REGS);
  1108. }
  1109. lvds_connector->lid_notifier.notifier_call = intel_lid_notify;
  1110. if (acpi_lid_notifier_register(&lvds_connector->lid_notifier)) {
  1111. DRM_DEBUG_KMS("lid notifier registration failed\n");
  1112. lvds_connector->lid_notifier.notifier_call = NULL;
  1113. }
  1114. drm_sysfs_connector_add(connector);
  1115. intel_panel_init(&intel_connector->panel, fixed_mode);
  1116. intel_panel_setup_backlight(connector);
  1117. return true;
  1118. failed:
  1119. DRM_DEBUG_KMS("No LVDS modes found, disabling.\n");
  1120. drm_connector_cleanup(connector);
  1121. drm_encoder_cleanup(encoder);
  1122. if (fixed_mode)
  1123. drm_mode_destroy(dev, fixed_mode);
  1124. kfree(lvds_encoder);
  1125. kfree(lvds_connector);
  1126. return false;
  1127. }