fw_common.c 24 KB

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  1. /******************************************************************************
  2. *
  3. * Copyright(c) 2009-2010 Realtek Corporation.
  4. *
  5. * This program is free software; you can redistribute it and/or modify it
  6. * under the terms of version 2 of the GNU General Public License as
  7. * published by the Free Software Foundation.
  8. *
  9. * This program is distributed in the hope that it will be useful, but WITHOUT
  10. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  12. * more details.
  13. *
  14. * You should have received a copy of the GNU General Public License along with
  15. * this program; if not, write to the Free Software Foundation, Inc.,
  16. * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
  17. *
  18. * The full GNU General Public License is included in this distribution in the
  19. * file called LICENSE.
  20. *
  21. * Contact Information:
  22. * wlanfae <wlanfae@realtek.com>
  23. * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
  24. * Hsinchu 300, Taiwan.
  25. *
  26. * Larry Finger <Larry.Finger@lwfinger.net>
  27. *
  28. *****************************************************************************/
  29. #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  30. #include <linux/firmware.h>
  31. #include "../wifi.h"
  32. #include "../pci.h"
  33. #include "../base.h"
  34. #include "../rtl8192ce/reg.h"
  35. #include "../rtl8192ce/def.h"
  36. #include "fw_common.h"
  37. static void _rtl92c_enable_fw_download(struct ieee80211_hw *hw, bool enable)
  38. {
  39. struct rtl_priv *rtlpriv = rtl_priv(hw);
  40. struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
  41. if (rtlhal->hw_type == HARDWARE_TYPE_RTL8192CU) {
  42. u32 value32 = rtl_read_dword(rtlpriv, REG_MCUFWDL);
  43. if (enable)
  44. value32 |= MCUFWDL_EN;
  45. else
  46. value32 &= ~MCUFWDL_EN;
  47. rtl_write_dword(rtlpriv, REG_MCUFWDL, value32);
  48. } else if (rtlhal->hw_type == HARDWARE_TYPE_RTL8192CE) {
  49. u8 tmp;
  50. if (enable) {
  51. tmp = rtl_read_byte(rtlpriv, REG_SYS_FUNC_EN + 1);
  52. rtl_write_byte(rtlpriv, REG_SYS_FUNC_EN + 1,
  53. tmp | 0x04);
  54. tmp = rtl_read_byte(rtlpriv, REG_MCUFWDL);
  55. rtl_write_byte(rtlpriv, REG_MCUFWDL, tmp | 0x01);
  56. tmp = rtl_read_byte(rtlpriv, REG_MCUFWDL + 2);
  57. rtl_write_byte(rtlpriv, REG_MCUFWDL + 2, tmp & 0xf7);
  58. } else {
  59. tmp = rtl_read_byte(rtlpriv, REG_MCUFWDL);
  60. rtl_write_byte(rtlpriv, REG_MCUFWDL, tmp & 0xfe);
  61. rtl_write_byte(rtlpriv, REG_MCUFWDL + 1, 0x00);
  62. }
  63. }
  64. }
  65. static void rtl_block_fw_writeN(struct ieee80211_hw *hw, const u8 *buffer,
  66. u32 size)
  67. {
  68. struct rtl_priv *rtlpriv = rtl_priv(hw);
  69. u32 blockSize = REALTEK_USB_VENQT_MAX_BUF_SIZE - 20;
  70. u8 *bufferPtr = (u8 *) buffer;
  71. u32 i, offset, blockCount, remainSize;
  72. blockCount = size / blockSize;
  73. remainSize = size % blockSize;
  74. for (i = 0; i < blockCount; i++) {
  75. offset = i * blockSize;
  76. rtlpriv->io.writeN_sync(rtlpriv,
  77. (FW_8192C_START_ADDRESS + offset),
  78. (void *)(bufferPtr + offset),
  79. blockSize);
  80. }
  81. if (remainSize) {
  82. offset = blockCount * blockSize;
  83. rtlpriv->io.writeN_sync(rtlpriv,
  84. (FW_8192C_START_ADDRESS + offset),
  85. (void *)(bufferPtr + offset),
  86. remainSize);
  87. }
  88. }
  89. static void _rtl92c_fw_block_write(struct ieee80211_hw *hw,
  90. const u8 *buffer, u32 size)
  91. {
  92. struct rtl_priv *rtlpriv = rtl_priv(hw);
  93. u32 blockSize = sizeof(u32);
  94. u8 *bufferPtr = (u8 *) buffer;
  95. u32 *pu4BytePtr = (u32 *) buffer;
  96. u32 i, offset, blockCount, remainSize;
  97. u32 data;
  98. if (rtlpriv->io.writeN_sync) {
  99. rtl_block_fw_writeN(hw, buffer, size);
  100. return;
  101. }
  102. blockCount = size / blockSize;
  103. remainSize = size % blockSize;
  104. if (remainSize) {
  105. /* the last word is < 4 bytes - pad it with zeros */
  106. for (i = 0; i < 4 - remainSize; i++)
  107. *(bufferPtr + size + i) = 0;
  108. blockCount++;
  109. }
  110. for (i = 0; i < blockCount; i++) {
  111. offset = i * blockSize;
  112. /* for big-endian platforms, the firmware data need to be byte
  113. * swapped as it was read as a byte string and will be written
  114. * as 32-bit dwords and byte swapped when written
  115. */
  116. data = le32_to_cpu(*(__le32 *)(pu4BytePtr + i));
  117. rtl_write_dword(rtlpriv, (FW_8192C_START_ADDRESS + offset),
  118. data);
  119. }
  120. }
  121. static void _rtl92c_fw_page_write(struct ieee80211_hw *hw,
  122. u32 page, const u8 *buffer, u32 size)
  123. {
  124. struct rtl_priv *rtlpriv = rtl_priv(hw);
  125. u8 value8;
  126. u8 u8page = (u8) (page & 0x07);
  127. value8 = (rtl_read_byte(rtlpriv, REG_MCUFWDL + 2) & 0xF8) | u8page;
  128. rtl_write_byte(rtlpriv, (REG_MCUFWDL + 2), value8);
  129. _rtl92c_fw_block_write(hw, buffer, size);
  130. }
  131. static void _rtl92c_fill_dummy(u8 *pfwbuf, u32 *pfwlen)
  132. {
  133. u32 fwlen = *pfwlen;
  134. u8 remain = (u8) (fwlen % 4);
  135. remain = (remain == 0) ? 0 : (4 - remain);
  136. while (remain > 0) {
  137. pfwbuf[fwlen] = 0;
  138. fwlen++;
  139. remain--;
  140. }
  141. *pfwlen = fwlen;
  142. }
  143. static void _rtl92c_write_fw(struct ieee80211_hw *hw,
  144. enum version_8192c version, u8 *buffer, u32 size)
  145. {
  146. struct rtl_priv *rtlpriv = rtl_priv(hw);
  147. struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
  148. u8 *bufferPtr = (u8 *) buffer;
  149. RT_TRACE(rtlpriv, COMP_FW, DBG_TRACE, ("FW size is %d bytes,\n", size));
  150. if (IS_CHIP_VER_B(version)) {
  151. u32 pageNums, remainSize;
  152. u32 page, offset;
  153. if (IS_HARDWARE_TYPE_8192CE(rtlhal))
  154. _rtl92c_fill_dummy(bufferPtr, &size);
  155. pageNums = size / FW_8192C_PAGE_SIZE;
  156. remainSize = size % FW_8192C_PAGE_SIZE;
  157. if (pageNums > 4) {
  158. RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
  159. ("Page numbers should not greater then 4\n"));
  160. }
  161. for (page = 0; page < pageNums; page++) {
  162. offset = page * FW_8192C_PAGE_SIZE;
  163. _rtl92c_fw_page_write(hw, page, (bufferPtr + offset),
  164. FW_8192C_PAGE_SIZE);
  165. }
  166. if (remainSize) {
  167. offset = pageNums * FW_8192C_PAGE_SIZE;
  168. page = pageNums;
  169. _rtl92c_fw_page_write(hw, page, (bufferPtr + offset),
  170. remainSize);
  171. }
  172. } else {
  173. _rtl92c_fw_block_write(hw, buffer, size);
  174. }
  175. }
  176. static int _rtl92c_fw_free_to_go(struct ieee80211_hw *hw)
  177. {
  178. struct rtl_priv *rtlpriv = rtl_priv(hw);
  179. u32 counter = 0;
  180. u32 value32;
  181. do {
  182. value32 = rtl_read_dword(rtlpriv, REG_MCUFWDL);
  183. } while ((counter++ < FW_8192C_POLLING_TIMEOUT_COUNT) &&
  184. (!(value32 & FWDL_ChkSum_rpt)));
  185. if (counter >= FW_8192C_POLLING_TIMEOUT_COUNT) {
  186. RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
  187. ("chksum report faill ! REG_MCUFWDL:0x%08x .\n",
  188. value32));
  189. return -EIO;
  190. }
  191. RT_TRACE(rtlpriv, COMP_FW, DBG_TRACE,
  192. ("Checksum report OK ! REG_MCUFWDL:0x%08x .\n", value32));
  193. value32 = rtl_read_dword(rtlpriv, REG_MCUFWDL);
  194. value32 |= MCUFWDL_RDY;
  195. value32 &= ~WINTINI_RDY;
  196. rtl_write_dword(rtlpriv, REG_MCUFWDL, value32);
  197. counter = 0;
  198. do {
  199. value32 = rtl_read_dword(rtlpriv, REG_MCUFWDL);
  200. if (value32 & WINTINI_RDY) {
  201. RT_TRACE(rtlpriv, COMP_FW, DBG_TRACE,
  202. ("Polling FW ready success!!"
  203. " REG_MCUFWDL:0x%08x .\n",
  204. value32));
  205. return 0;
  206. }
  207. mdelay(FW_8192C_POLLING_DELAY);
  208. } while (counter++ < FW_8192C_POLLING_TIMEOUT_COUNT);
  209. RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
  210. ("Polling FW ready fail!! REG_MCUFWDL:0x%08x .\n", value32));
  211. return -EIO;
  212. }
  213. int rtl92c_download_fw(struct ieee80211_hw *hw)
  214. {
  215. struct rtl_priv *rtlpriv = rtl_priv(hw);
  216. struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
  217. struct rtl92c_firmware_header *pfwheader;
  218. u8 *pfwdata;
  219. u32 fwsize;
  220. enum version_8192c version = rtlhal->version;
  221. pr_info("Loading firmware file %s\n", rtlpriv->cfg->fw_name);
  222. if (!rtlhal->pfirmware)
  223. return 1;
  224. pfwheader = (struct rtl92c_firmware_header *)rtlhal->pfirmware;
  225. pfwdata = (u8 *) rtlhal->pfirmware;
  226. fwsize = rtlhal->fwsize;
  227. if (IS_FW_HEADER_EXIST(pfwheader)) {
  228. RT_TRACE(rtlpriv, COMP_FW, DBG_DMESG,
  229. ("Firmware Version(%d), Signature(%#x),Size(%d)\n",
  230. le16_to_cpu(pfwheader->version),
  231. le16_to_cpu(pfwheader->signature),
  232. (uint)sizeof(struct rtl92c_firmware_header)));
  233. pfwdata = pfwdata + sizeof(struct rtl92c_firmware_header);
  234. fwsize = fwsize - sizeof(struct rtl92c_firmware_header);
  235. }
  236. _rtl92c_enable_fw_download(hw, true);
  237. _rtl92c_write_fw(hw, version, pfwdata, fwsize);
  238. _rtl92c_enable_fw_download(hw, false);
  239. if (_rtl92c_fw_free_to_go(hw)) {
  240. RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
  241. ("Firmware is not ready to run!\n"));
  242. } else {
  243. RT_TRACE(rtlpriv, COMP_FW, DBG_TRACE,
  244. ("Firmware is ready to run!\n"));
  245. }
  246. return 0;
  247. }
  248. EXPORT_SYMBOL(rtl92c_download_fw);
  249. static bool _rtl92c_check_fw_read_last_h2c(struct ieee80211_hw *hw, u8 boxnum)
  250. {
  251. struct rtl_priv *rtlpriv = rtl_priv(hw);
  252. u8 val_hmetfr, val_mcutst_1;
  253. bool result = false;
  254. val_hmetfr = rtl_read_byte(rtlpriv, REG_HMETFR);
  255. val_mcutst_1 = rtl_read_byte(rtlpriv, (REG_MCUTST_1 + boxnum));
  256. if (((val_hmetfr >> boxnum) & BIT(0)) == 0 && val_mcutst_1 == 0)
  257. result = true;
  258. return result;
  259. }
  260. static void _rtl92c_fill_h2c_command(struct ieee80211_hw *hw,
  261. u8 element_id, u32 cmd_len, u8 *p_cmdbuffer)
  262. {
  263. struct rtl_priv *rtlpriv = rtl_priv(hw);
  264. struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
  265. u8 boxnum;
  266. u16 box_reg = 0, box_extreg = 0;
  267. u8 u1b_tmp;
  268. bool isfw_read = false;
  269. bool bwrite_sucess = false;
  270. u8 wait_h2c_limmit = 100;
  271. u8 wait_writeh2c_limmit = 100;
  272. u8 boxcontent[4], boxextcontent[2];
  273. u32 h2c_waitcounter = 0;
  274. unsigned long flag;
  275. u8 idx;
  276. RT_TRACE(rtlpriv, COMP_CMD, DBG_LOUD, ("come in\n"));
  277. while (true) {
  278. spin_lock_irqsave(&rtlpriv->locks.h2c_lock, flag);
  279. if (rtlhal->h2c_setinprogress) {
  280. RT_TRACE(rtlpriv, COMP_CMD, DBG_LOUD,
  281. ("H2C set in progress! Wait to set.."
  282. "element_id(%d).\n", element_id));
  283. while (rtlhal->h2c_setinprogress) {
  284. spin_unlock_irqrestore(&rtlpriv->locks.h2c_lock,
  285. flag);
  286. h2c_waitcounter++;
  287. RT_TRACE(rtlpriv, COMP_CMD, DBG_LOUD,
  288. ("Wait 100 us (%d times)...\n",
  289. h2c_waitcounter));
  290. udelay(100);
  291. if (h2c_waitcounter > 1000)
  292. return;
  293. spin_lock_irqsave(&rtlpriv->locks.h2c_lock,
  294. flag);
  295. }
  296. spin_unlock_irqrestore(&rtlpriv->locks.h2c_lock, flag);
  297. } else {
  298. rtlhal->h2c_setinprogress = true;
  299. spin_unlock_irqrestore(&rtlpriv->locks.h2c_lock, flag);
  300. break;
  301. }
  302. }
  303. while (!bwrite_sucess) {
  304. wait_writeh2c_limmit--;
  305. if (wait_writeh2c_limmit == 0) {
  306. RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
  307. ("Write H2C fail because no trigger "
  308. "for FW INT!\n"));
  309. break;
  310. }
  311. boxnum = rtlhal->last_hmeboxnum;
  312. switch (boxnum) {
  313. case 0:
  314. box_reg = REG_HMEBOX_0;
  315. box_extreg = REG_HMEBOX_EXT_0;
  316. break;
  317. case 1:
  318. box_reg = REG_HMEBOX_1;
  319. box_extreg = REG_HMEBOX_EXT_1;
  320. break;
  321. case 2:
  322. box_reg = REG_HMEBOX_2;
  323. box_extreg = REG_HMEBOX_EXT_2;
  324. break;
  325. case 3:
  326. box_reg = REG_HMEBOX_3;
  327. box_extreg = REG_HMEBOX_EXT_3;
  328. break;
  329. default:
  330. RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
  331. ("switch case not process\n"));
  332. break;
  333. }
  334. isfw_read = _rtl92c_check_fw_read_last_h2c(hw, boxnum);
  335. while (!isfw_read) {
  336. wait_h2c_limmit--;
  337. if (wait_h2c_limmit == 0) {
  338. RT_TRACE(rtlpriv, COMP_CMD, DBG_LOUD,
  339. ("Wating too long for FW read "
  340. "clear HMEBox(%d)!\n", boxnum));
  341. break;
  342. }
  343. udelay(10);
  344. isfw_read = _rtl92c_check_fw_read_last_h2c(hw, boxnum);
  345. u1b_tmp = rtl_read_byte(rtlpriv, 0x1BF);
  346. RT_TRACE(rtlpriv, COMP_CMD, DBG_LOUD,
  347. ("Wating for FW read clear HMEBox(%d)!!! "
  348. "0x1BF = %2x\n", boxnum, u1b_tmp));
  349. }
  350. if (!isfw_read) {
  351. RT_TRACE(rtlpriv, COMP_CMD, DBG_LOUD,
  352. ("Write H2C register BOX[%d] fail!!!!! "
  353. "Fw do not read.\n", boxnum));
  354. break;
  355. }
  356. memset(boxcontent, 0, sizeof(boxcontent));
  357. memset(boxextcontent, 0, sizeof(boxextcontent));
  358. boxcontent[0] = element_id;
  359. RT_TRACE(rtlpriv, COMP_CMD, DBG_LOUD,
  360. ("Write element_id box_reg(%4x) = %2x\n",
  361. box_reg, element_id));
  362. switch (cmd_len) {
  363. case 1:
  364. boxcontent[0] &= ~(BIT(7));
  365. memcpy((u8 *) (boxcontent) + 1,
  366. p_cmdbuffer, 1);
  367. for (idx = 0; idx < 4; idx++) {
  368. rtl_write_byte(rtlpriv, box_reg + idx,
  369. boxcontent[idx]);
  370. }
  371. break;
  372. case 2:
  373. boxcontent[0] &= ~(BIT(7));
  374. memcpy((u8 *) (boxcontent) + 1,
  375. p_cmdbuffer, 2);
  376. for (idx = 0; idx < 4; idx++) {
  377. rtl_write_byte(rtlpriv, box_reg + idx,
  378. boxcontent[idx]);
  379. }
  380. break;
  381. case 3:
  382. boxcontent[0] &= ~(BIT(7));
  383. memcpy((u8 *) (boxcontent) + 1,
  384. p_cmdbuffer, 3);
  385. for (idx = 0; idx < 4; idx++) {
  386. rtl_write_byte(rtlpriv, box_reg + idx,
  387. boxcontent[idx]);
  388. }
  389. break;
  390. case 4:
  391. boxcontent[0] |= (BIT(7));
  392. memcpy((u8 *) (boxextcontent),
  393. p_cmdbuffer, 2);
  394. memcpy((u8 *) (boxcontent) + 1,
  395. p_cmdbuffer + 2, 2);
  396. for (idx = 0; idx < 2; idx++) {
  397. rtl_write_byte(rtlpriv, box_extreg + idx,
  398. boxextcontent[idx]);
  399. }
  400. for (idx = 0; idx < 4; idx++) {
  401. rtl_write_byte(rtlpriv, box_reg + idx,
  402. boxcontent[idx]);
  403. }
  404. break;
  405. case 5:
  406. boxcontent[0] |= (BIT(7));
  407. memcpy((u8 *) (boxextcontent),
  408. p_cmdbuffer, 2);
  409. memcpy((u8 *) (boxcontent) + 1,
  410. p_cmdbuffer + 2, 3);
  411. for (idx = 0; idx < 2; idx++) {
  412. rtl_write_byte(rtlpriv, box_extreg + idx,
  413. boxextcontent[idx]);
  414. }
  415. for (idx = 0; idx < 4; idx++) {
  416. rtl_write_byte(rtlpriv, box_reg + idx,
  417. boxcontent[idx]);
  418. }
  419. break;
  420. default:
  421. RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
  422. ("switch case not process\n"));
  423. break;
  424. }
  425. bwrite_sucess = true;
  426. rtlhal->last_hmeboxnum = boxnum + 1;
  427. if (rtlhal->last_hmeboxnum == 4)
  428. rtlhal->last_hmeboxnum = 0;
  429. RT_TRACE(rtlpriv, COMP_CMD, DBG_LOUD,
  430. ("pHalData->last_hmeboxnum = %d\n",
  431. rtlhal->last_hmeboxnum));
  432. }
  433. spin_lock_irqsave(&rtlpriv->locks.h2c_lock, flag);
  434. rtlhal->h2c_setinprogress = false;
  435. spin_unlock_irqrestore(&rtlpriv->locks.h2c_lock, flag);
  436. RT_TRACE(rtlpriv, COMP_CMD, DBG_LOUD, ("go out\n"));
  437. }
  438. void rtl92c_fill_h2c_cmd(struct ieee80211_hw *hw,
  439. u8 element_id, u32 cmd_len, u8 *p_cmdbuffer)
  440. {
  441. struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
  442. u32 tmp_cmdbuf[2];
  443. if (rtlhal->fw_ready == false) {
  444. RT_ASSERT(false, ("return H2C cmd because of Fw "
  445. "download fail!!!\n"));
  446. return;
  447. }
  448. memset(tmp_cmdbuf, 0, 8);
  449. memcpy(tmp_cmdbuf, p_cmdbuffer, cmd_len);
  450. _rtl92c_fill_h2c_command(hw, element_id, cmd_len, (u8 *)&tmp_cmdbuf);
  451. return;
  452. }
  453. EXPORT_SYMBOL(rtl92c_fill_h2c_cmd);
  454. void rtl92c_firmware_selfreset(struct ieee80211_hw *hw)
  455. {
  456. u8 u1b_tmp;
  457. u8 delay = 100;
  458. struct rtl_priv *rtlpriv = rtl_priv(hw);
  459. rtl_write_byte(rtlpriv, REG_HMETFR + 3, 0x20);
  460. u1b_tmp = rtl_read_byte(rtlpriv, REG_SYS_FUNC_EN + 1);
  461. while (u1b_tmp & BIT(2)) {
  462. delay--;
  463. if (delay == 0) {
  464. RT_ASSERT(false, ("8051 reset fail.\n"));
  465. break;
  466. }
  467. udelay(50);
  468. u1b_tmp = rtl_read_byte(rtlpriv, REG_SYS_FUNC_EN + 1);
  469. }
  470. }
  471. EXPORT_SYMBOL(rtl92c_firmware_selfreset);
  472. void rtl92c_set_fw_pwrmode_cmd(struct ieee80211_hw *hw, u8 mode)
  473. {
  474. struct rtl_priv *rtlpriv = rtl_priv(hw);
  475. u8 u1_h2c_set_pwrmode[3] = {0};
  476. struct rtl_ps_ctl *ppsc = rtl_psc(rtl_priv(hw));
  477. RT_TRACE(rtlpriv, COMP_POWER, DBG_LOUD, ("FW LPS mode = %d\n", mode));
  478. SET_H2CCMD_PWRMODE_PARM_MODE(u1_h2c_set_pwrmode, mode);
  479. SET_H2CCMD_PWRMODE_PARM_SMART_PS(u1_h2c_set_pwrmode, 1);
  480. SET_H2CCMD_PWRMODE_PARM_BCN_PASS_TIME(u1_h2c_set_pwrmode,
  481. ppsc->reg_max_lps_awakeintvl);
  482. RT_PRINT_DATA(rtlpriv, COMP_CMD, DBG_DMESG,
  483. "rtl92c_set_fw_rsvdpagepkt(): u1_h2c_set_pwrmode\n",
  484. u1_h2c_set_pwrmode, 3);
  485. rtl92c_fill_h2c_cmd(hw, H2C_SETPWRMODE, 3, u1_h2c_set_pwrmode);
  486. }
  487. EXPORT_SYMBOL(rtl92c_set_fw_pwrmode_cmd);
  488. static bool _rtl92c_cmd_send_packet(struct ieee80211_hw *hw,
  489. struct sk_buff *skb)
  490. {
  491. struct rtl_priv *rtlpriv = rtl_priv(hw);
  492. struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
  493. struct rtl8192_tx_ring *ring;
  494. struct rtl_tx_desc *pdesc;
  495. unsigned long flags;
  496. struct sk_buff *pskb = NULL;
  497. ring = &rtlpci->tx_ring[BEACON_QUEUE];
  498. pskb = __skb_dequeue(&ring->queue);
  499. if (pskb)
  500. kfree_skb(pskb);
  501. spin_lock_irqsave(&rtlpriv->locks.irq_th_lock, flags);
  502. pdesc = &ring->desc[0];
  503. rtlpriv->cfg->ops->fill_tx_cmddesc(hw, (u8 *) pdesc, 1, 1, skb);
  504. __skb_queue_tail(&ring->queue, skb);
  505. spin_unlock_irqrestore(&rtlpriv->locks.irq_th_lock, flags);
  506. rtlpriv->cfg->ops->tx_polling(hw, BEACON_QUEUE);
  507. return true;
  508. }
  509. #define BEACON_PG 0 /*->1*/
  510. #define PSPOLL_PG 2
  511. #define NULL_PG 3
  512. #define PROBERSP_PG 4 /*->5*/
  513. #define TOTAL_RESERVED_PKT_LEN 768
  514. static u8 reserved_page_packet[TOTAL_RESERVED_PKT_LEN] = {
  515. /* page 0 beacon */
  516. 0x80, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF,
  517. 0xFF, 0xFF, 0x00, 0xE0, 0x4C, 0x76, 0x00, 0x42,
  518. 0x00, 0x40, 0x10, 0x10, 0x00, 0x03, 0x50, 0x08,
  519. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  520. 0x64, 0x00, 0x00, 0x04, 0x00, 0x0C, 0x6C, 0x69,
  521. 0x6E, 0x6B, 0x73, 0x79, 0x73, 0x5F, 0x77, 0x6C,
  522. 0x61, 0x6E, 0x01, 0x04, 0x82, 0x84, 0x8B, 0x96,
  523. 0x03, 0x01, 0x01, 0x06, 0x02, 0x00, 0x00, 0x2A,
  524. 0x01, 0x00, 0x32, 0x08, 0x24, 0x30, 0x48, 0x6C,
  525. 0x0C, 0x12, 0x18, 0x60, 0x2D, 0x1A, 0x6C, 0x18,
  526. 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  527. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  528. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  529. 0x3D, 0x00, 0xDD, 0x06, 0x00, 0xE0, 0x4C, 0x02,
  530. 0x01, 0x70, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  531. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  532. /* page 1 beacon */
  533. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  534. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  535. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  536. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  537. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  538. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  539. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  540. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  541. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  542. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  543. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  544. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  545. 0x10, 0x00, 0x20, 0x8C, 0x00, 0x12, 0x10, 0x00,
  546. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  547. 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  548. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  549. /* page 2 ps-poll */
  550. 0xA4, 0x10, 0x01, 0xC0, 0x00, 0x40, 0x10, 0x10,
  551. 0x00, 0x03, 0x00, 0xE0, 0x4C, 0x76, 0x00, 0x42,
  552. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  553. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  554. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  555. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  556. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  557. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  558. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  559. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  560. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  561. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  562. 0x18, 0x00, 0x20, 0x8C, 0x00, 0x12, 0x00, 0x00,
  563. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80,
  564. 0x80, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  565. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  566. /* page 3 null */
  567. 0x48, 0x01, 0x00, 0x00, 0x00, 0x40, 0x10, 0x10,
  568. 0x00, 0x03, 0x00, 0xE0, 0x4C, 0x76, 0x00, 0x42,
  569. 0x00, 0x40, 0x10, 0x10, 0x00, 0x03, 0x00, 0x00,
  570. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  571. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  572. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  573. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  574. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  575. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  576. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  577. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  578. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  579. 0x72, 0x00, 0x20, 0x8C, 0x00, 0x12, 0x00, 0x00,
  580. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80,
  581. 0x80, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  582. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  583. /* page 4 probe_resp */
  584. 0x50, 0x00, 0x00, 0x00, 0x00, 0x40, 0x10, 0x10,
  585. 0x00, 0x03, 0x00, 0xE0, 0x4C, 0x76, 0x00, 0x42,
  586. 0x00, 0x40, 0x10, 0x10, 0x00, 0x03, 0x00, 0x00,
  587. 0x9E, 0x46, 0x15, 0x32, 0x27, 0xF2, 0x2D, 0x00,
  588. 0x64, 0x00, 0x00, 0x04, 0x00, 0x0C, 0x6C, 0x69,
  589. 0x6E, 0x6B, 0x73, 0x79, 0x73, 0x5F, 0x77, 0x6C,
  590. 0x61, 0x6E, 0x01, 0x04, 0x82, 0x84, 0x8B, 0x96,
  591. 0x03, 0x01, 0x01, 0x06, 0x02, 0x00, 0x00, 0x2A,
  592. 0x01, 0x00, 0x32, 0x08, 0x24, 0x30, 0x48, 0x6C,
  593. 0x0C, 0x12, 0x18, 0x60, 0x2D, 0x1A, 0x6C, 0x18,
  594. 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  595. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  596. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  597. 0x3D, 0x00, 0xDD, 0x06, 0x00, 0xE0, 0x4C, 0x02,
  598. 0x01, 0x70, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  599. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  600. /* page 5 probe_resp */
  601. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  602. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  603. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  604. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  605. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  606. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  607. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  608. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  609. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  610. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  611. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  612. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  613. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  614. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  615. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  616. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  617. };
  618. void rtl92c_set_fw_rsvdpagepkt(struct ieee80211_hw *hw, bool dl_finished)
  619. {
  620. struct rtl_priv *rtlpriv = rtl_priv(hw);
  621. struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
  622. struct sk_buff *skb = NULL;
  623. u32 totalpacketlen;
  624. bool rtstatus;
  625. u8 u1RsvdPageLoc[3] = {0};
  626. bool dlok = false;
  627. u8 *beacon;
  628. u8 *pspoll;
  629. u8 *nullfunc;
  630. u8 *probersp;
  631. /*---------------------------------------------------------
  632. (1) beacon
  633. ---------------------------------------------------------*/
  634. beacon = &reserved_page_packet[BEACON_PG * 128];
  635. SET_80211_HDR_ADDRESS2(beacon, mac->mac_addr);
  636. SET_80211_HDR_ADDRESS3(beacon, mac->bssid);
  637. /*-------------------------------------------------------
  638. (2) ps-poll
  639. --------------------------------------------------------*/
  640. pspoll = &reserved_page_packet[PSPOLL_PG * 128];
  641. SET_80211_PS_POLL_AID(pspoll, (mac->assoc_id | 0xc000));
  642. SET_80211_PS_POLL_BSSID(pspoll, mac->bssid);
  643. SET_80211_PS_POLL_TA(pspoll, mac->mac_addr);
  644. SET_H2CCMD_RSVDPAGE_LOC_PSPOLL(u1RsvdPageLoc, PSPOLL_PG);
  645. /*--------------------------------------------------------
  646. (3) null data
  647. ---------------------------------------------------------*/
  648. nullfunc = &reserved_page_packet[NULL_PG * 128];
  649. SET_80211_HDR_ADDRESS1(nullfunc, mac->bssid);
  650. SET_80211_HDR_ADDRESS2(nullfunc, mac->mac_addr);
  651. SET_80211_HDR_ADDRESS3(nullfunc, mac->bssid);
  652. SET_H2CCMD_RSVDPAGE_LOC_NULL_DATA(u1RsvdPageLoc, NULL_PG);
  653. /*---------------------------------------------------------
  654. (4) probe response
  655. ----------------------------------------------------------*/
  656. probersp = &reserved_page_packet[PROBERSP_PG * 128];
  657. SET_80211_HDR_ADDRESS1(probersp, mac->bssid);
  658. SET_80211_HDR_ADDRESS2(probersp, mac->mac_addr);
  659. SET_80211_HDR_ADDRESS3(probersp, mac->bssid);
  660. SET_H2CCMD_RSVDPAGE_LOC_PROBE_RSP(u1RsvdPageLoc, PROBERSP_PG);
  661. totalpacketlen = TOTAL_RESERVED_PKT_LEN;
  662. RT_PRINT_DATA(rtlpriv, COMP_CMD, DBG_LOUD,
  663. "rtl92c_set_fw_rsvdpagepkt(): HW_VAR_SET_TX_CMD: ALL\n",
  664. &reserved_page_packet[0], totalpacketlen);
  665. RT_PRINT_DATA(rtlpriv, COMP_CMD, DBG_DMESG,
  666. "rtl92c_set_fw_rsvdpagepkt(): HW_VAR_SET_TX_CMD: ALL\n",
  667. u1RsvdPageLoc, 3);
  668. skb = dev_alloc_skb(totalpacketlen);
  669. memcpy((u8 *) skb_put(skb, totalpacketlen),
  670. &reserved_page_packet, totalpacketlen);
  671. rtstatus = _rtl92c_cmd_send_packet(hw, skb);
  672. if (rtstatus)
  673. dlok = true;
  674. if (dlok) {
  675. RT_TRACE(rtlpriv, COMP_POWER, DBG_LOUD,
  676. ("Set RSVD page location to Fw.\n"));
  677. RT_PRINT_DATA(rtlpriv, COMP_CMD, DBG_DMESG,
  678. "H2C_RSVDPAGE:\n",
  679. u1RsvdPageLoc, 3);
  680. rtl92c_fill_h2c_cmd(hw, H2C_RSVDPAGE,
  681. sizeof(u1RsvdPageLoc), u1RsvdPageLoc);
  682. } else
  683. RT_TRACE(rtlpriv, COMP_ERR, DBG_WARNING,
  684. ("Set RSVD page location to Fw FAIL!!!!!!.\n"));
  685. }
  686. EXPORT_SYMBOL(rtl92c_set_fw_rsvdpagepkt);
  687. void rtl92c_set_fw_joinbss_report_cmd(struct ieee80211_hw *hw, u8 mstatus)
  688. {
  689. u8 u1_joinbssrpt_parm[1] = {0};
  690. SET_H2CCMD_JOINBSSRPT_PARM_OPMODE(u1_joinbssrpt_parm, mstatus);
  691. rtl92c_fill_h2c_cmd(hw, H2C_JOINBSSRPT, 1, u1_joinbssrpt_parm);
  692. }
  693. EXPORT_SYMBOL(rtl92c_set_fw_joinbss_report_cmd);